/*
 * Copyright 2016 Freescale Semiconductor, Inc.
 * Copyright 2016-2018 NXP
 * To be used with MCUXpresso Config Tools under its Software License Agreement.
 */
var _dma_request_source = {
  "DMA": {
    "0|0x100":[{"id":"kDmaRequestMux0Disable", "description":"DMAMUX TriggerDisabled."}],
    "1|0x100":[{"id":"kDmaRequestMux0Reserved1", "description":"Reserved1"}],
    "2|0x100":[{"id":"kDmaRequestMux0UART0Rx", "description":"UART0 receive complete"}, {"id":"kDmaRequestMux0LPSCI0Rx", "description":"UART0 receive complete"}],
    "3|0x100":[{"id":"kDmaRequestMux0UART0Tx", "description":"UART0 transmit complete"}, {"id":"kDmaRequestMux0LPSCI0Tx", "description":"UART0 transmit complete"}],
    "4|0x100":[{"id":"kDmaRequestMux0UART1Rx", "description":"UART1 receive complete"}],
    "5|0x100":[{"id":"kDmaRequestMux0UART1Tx", "description":"UART1 transmit complete"}],
    "6|0x100":[{"id":"kDmaRequestMux0UART2Rx", "description":"UART2 receive complete"}],
    "7|0x100":[{"id":"kDmaRequestMux0UART2Tx", "description":"UART2 transmit complete"}],
    "8|0x100":[{"id":"kDmaRequestMux0Reserved8", "description":"Reserved8"}],
    "9|0x100":[{"id":"kDmaRequestMux0Reserved9", "description":"Reserved9"}],
    "10|0x100":[{"id":"kDmaRequestMux0Reserved10", "description":"Reserved10"}],
    "11|0x100":[{"id":"kDmaRequestMux0Reserved11", "description":"Reserved11"}],
    "12|0x100":[{"id":"kDmaRequestMux0Reserved12", "description":"Reserved12"}],
    "13|0x100":[{"id":"kDmaRequestMux0Reserved13", "description":"Reserved13"}],
    "14|0x100":[{"id":"kDmaRequestMux0I2S0Rx", "description":"I2S0 receive complete"}],
    "15|0x100":[{"id":"kDmaRequestMux0I2S0Tx", "description":"I2S0 transmit complete"}],
    "16|0x100":[{"id":"kDmaRequestMux0SPI0Rx", "description":"SPI0 receive complete"}],
    "17|0x100":[{"id":"kDmaRequestMux0SPI0Tx", "description":"SPI0 transmit complete"}],
    "18|0x100":[{"id":"kDmaRequestMux0SPI1Rx", "description":"SPI1 receive complete"}],
    "19|0x100":[{"id":"kDmaRequestMux0SPI1Tx", "description":"SPI1 transmit complete"}],
    "20|0x100":[{"id":"kDmaRequestMux0Reserved20", "description":"Reserved20"}],
    "21|0x100":[{"id":"kDmaRequestMux0Reserved21", "description":"Reserved21"}],
    "22|0x100":[{"id":"kDmaRequestMux0I2C0", "description":"I2C0 transmission complete"}],
    "23|0x100":[{"id":"kDmaRequestMux0I2C1", "description":"I2C1 transmission complete"}],
    "24|0x100":[{"id":"kDmaRequestMux0TPM0Channel0", "description":"TPM0 channel 0 event (CMP or CAP)"}],
    "25|0x100":[{"id":"kDmaRequestMux0TPM0Channel1", "description":"TPM0 channel 1 event (CMP or CAP)"}],
    "26|0x100":[{"id":"kDmaRequestMux0TPM0Channel2", "description":"TPM0 channel 2 event (CMP or CAP)"}],
    "27|0x100":[{"id":"kDmaRequestMux0TPM0Channel3", "description":"TPM0 channel 3 event (CMP or CAP)"}],
    "28|0x100":[{"id":"kDmaRequestMux0TPM0Channel4", "description":"TPM0 channel 4 event (CMP or CAP)"}],
    "29|0x100":[{"id":"kDmaRequestMux0TPM0Channel5", "description":"TPM0 channel 5 event (CMP or CAP)"}],
    "30|0x100":[{"id":"kDmaRequestMux0Reserved30", "description":"Reserved30"}],
    "31|0x100":[{"id":"kDmaRequestMux0Reserved31", "description":"Reserved31"}],
    "32|0x100":[{"id":"kDmaRequestMux0TPM1Channel0", "description":"TPM1 channel 0 event (CMP or CAP)"}],
    "33|0x100":[{"id":"kDmaRequestMux0TPM1Channel1", "description":"TPM1 channel 1 event (CMP or CAP)"}],
    "34|0x100":[{"id":"kDmaRequestMux0TPM2Channel0", "description":"TPM2 channel 0 event (CMP or CAP)"}],
    "35|0x100":[{"id":"kDmaRequestMux0TPM2Channel1", "description":"TPM2 channel 1 event (CMP or CAP)"}],
    "36|0x100":[{"id":"kDmaRequestMux0Reserved36", "description":"Reserved36"}],
    "37|0x100":[{"id":"kDmaRequestMux0Reserved37", "description":"Reserved37"}],
    "38|0x100":[{"id":"kDmaRequestMux0Reserved38", "description":"Reserved38"}],
    "39|0x100":[{"id":"kDmaRequestMux0Reserved39", "description":"Reserved39"}],
    "40|0x100":[{"id":"kDmaRequestMux0ADC0", "description":"ADC0 conversion complete"}],
    "41|0x100":[{"id":"kDmaRequestMux0Reserved41", "description":"Reserved41"}],
    "42|0x100":[{"id":"kDmaRequestMux0CMP0", "description":"CMP0 Output"}],
    "43|0x100":[{"id":"kDmaRequestMux0Reserved43", "description":"Reserved43"}],
    "44|0x100":[{"id":"kDmaRequestMux0Reserved44", "description":"Reserved44"}],
    "45|0x100":[{"id":"kDmaRequestMux0DAC0", "description":"DAC0 buffer pointer reaches upper or lower limit"}],
    "46|0x100":[{"id":"kDmaRequestMux0Reserved46", "description":"Reserved46"}],
    "47|0x100":[{"id":"kDmaRequestMux0Reserved47", "description":"Reserved47"}],
    "48|0x100":[{"id":"kDmaRequestMux0Reserved48", "description":"Reserved48"}],
    "49|0x100":[{"id":"kDmaRequestMux0PortA", "description":"PORTA rising, falling or both edges"}],
    "50|0x100":[{"id":"kDmaRequestMux0Reserved50", "description":"Reserved50"}],
    "51|0x100":[{"id":"kDmaRequestMux0PortC", "description":"PORTC rising, falling or both edges"}],
    "52|0x100":[{"id":"kDmaRequestMux0PortD", "description":"PORTD rising, falling or both edges"}],
    "53|0x100":[{"id":"kDmaRequestMux0Reserved53", "description":"Reserved53"}],
    "54|0x100":[{"id":"kDmaRequestMux0TPM0Overflow", "description":"TPM0 overflow"}],
    "55|0x100":[{"id":"kDmaRequestMux0TPM1Overflow", "description":"TPM1 overflow"}],
    "56|0x100":[{"id":"kDmaRequestMux0TPM2Overflow", "description":"TPM2 overflow"}],
    "57|0x100":[{"id":"kDmaRequestMux0TSI", "description":"TSI0 event"}],
    "58|0x100":[{"id":"kDmaRequestMux0Reserved58", "description":"Reserved58"}],
    "59|0x100":[{"id":"kDmaRequestMux0Reserved59", "description":"Reserved59"}],
    "60|0x100":[{"id":"kDmaRequestMux0AlwaysOn60", "description":"DMAMUX Always Enabled slot."}],
    "61|0x100":[{"id":"kDmaRequestMux0AlwaysOn61", "description":"DMAMUX Always Enabled slot."}],
    "62|0x100":[{"id":"kDmaRequestMux0AlwaysOn62", "description":"DMAMUX Always Enabled slot."}],
    "63|0x100":[{"id":"kDmaRequestMux0AlwaysOn63", "description":"DMAMUX Always Enabled slot."}]
  }
};
PExProcessor.putPersistentObject("dma_request_source", _dma_request_source);
_dma_request_source = null;
