Peripheral features
Features
- A GPIO pin can be configured in different operation modes
- As GPIO input with or without pull resistor
- As GPIO output with push-pull mode or open-drain mode
- As a peripheral pin when multiplexed with another module
- GPIO pins are placed on SoC in groups of one to 16 bits, called ports and designated as A, B, C and so on. For available pins and port, it is different from SoC to SoC, please refer to SoC's data sheet for the specific definition of each GPIO port on the chip.
- Pin functionality muxing
- GPIO pin can be muxed as GPIO mode or peripheral mode. Usually GPIO peripheral set whether pin is configured as Peripheral or GPIO and SIM peripheral do with specific peripheral configuration.
- Peripheral mode: The peripheral module controls the pin. However, if the pin is not configured as an analog input/output, drive strength, edge slew rate control, push-pull or open-drain output and pull resistor enable and type select remain controlled by GPIO registers.
- GPIO mode: The GPIO module controls the pin. Any data output and input an be written to or read from GPIO data registers. Pull resistor enables and type select are controlled by a GPIO register. GPIO pins can generated the edge interrupt and insert the software interrupt.
- GPIO pin configuration
- Individual pull resistor enable/disable and type configuration for either GPIO mode or Peripheral mode.
- Individual selection of output push-pull mode or open-drain mode.
- Individual output drive strength control for each pin.
- Individual output edge slew rate control for each pin to reduce switch noise.
- Ability to monitor each pins' logic when pin is in either GPIO mode or peripheral mode by using raw data(RDATA) register.
- Pin Interrupt
- Each pin has the ability to generate an interrupt with programmable rising or falling edge detection.
- Each pin can generate an interrupt from software interrupt which usually set by user
- 5V tolerance.
How this driver is designed to make this peripheral work
This driver provide multiple definitions/functions to tell the configuration operation for each GPIO Pin/Port. Here are several important definition and parameters usage to note
- Most of API are requiring user provide parameter for the base address of GPIO port and pin. User provide the GPIOA like base address pointer to specify which GPIO PORT to operate with and provide the _gpio_pin to tell which Pin to operate. However, as mentioned in features section, though each PORT can get 16 pin groups but it is not necessary all these 16 pins are available in the SoC user is using. User need be quite careful to configure only the available pin. Driver is able to be created with enumeration to get only exited pin listed but it may reduce performance thus this way is not adopted.
- 2 kinds of API sets are provided in this driver. One is for a single pin and another is for whole PORT. PORT API can operate whole port with synchronization satisfied. All Pin APIs are actually implemented by invoking PORT API cause these pin stuff are actually provided in PORT level from aspect of register arrangement and layout. Pin API require single pin specified by _gpio_pin and PORT API require multiple pins information that user can OR several pins and provide it as parameter. E.g. kGPIO_Pin0 | kGPIO_Pin1 means operation upon Pin 0 and Pin 1 in the specified PORT.
- Initialization and De-initialization Interfaces
- Configure the GPIO to certain state with all feature covered.
- Only Pin API is provided
- Pin MUX Interfaces
- Configure the GPIO pin as GPIO or peripheral MUX functionalities. Note that GPIO driver will access the SIM registers to do all necessary PIN MUX configuration to offer better user experience.
- Only Pin API is provided
- GPIO Pin Configuration Interfaces
- Functions to configure the pin or port attribute.
- Only Pin API is provided
- GPIO Write/Read/Toggle Interfaces
- Functions to Write/Read/Clear/Set Toggle GPIO.
- Note that Toggle is not atomic operation and it is implemented by read the value back and revert the output.
- Pin/Port API are all provided
- GPIO Interrupt Interfaces
- Interrupt Enable/Disable function
- Check whether Interrupt is enabled
- Assert/De-assert software interrupt which can generate interrupt by user.
- Configure the interrupt detect condition as rising edge or falling edge.
- Pin/Port API are all provided
- GPIO Status flags Interface
- Get/Clear status flags
- Separate APIs are provided by different status flags to achieve best performance.
- Pin/Port API are all provided
How to use this driver
- Steps shall be done outside GPIO driver
- SoC level interrupt controller configuration shall be configured/enabled in application codes if PIN is expected to generate interrupt on raising/falling edge or software interrupt.
- Interrupt entry function shall be added in the application codes and interrupt handler function shall be placed in the entry function to make sure the implemented interrupt handling codes will be invoked on a generation of interrupt.
- Initialize the pin with expected features configured by calling GPIO_PinInit or alternatively user can call sperate functional API to initialize different pad attributes or peripheral mux seperately. This is oftenly used when user switch the GPIO configuration runtime for non-reset state.
- If GPIO is used as Interrupt Mode
- Implement the interrupt handling function by calling GPIO_PortGetInterruptPendingStatusFlag and GPIO_PortGetEdgeDetectedStatusFlag to know which pin trigger the interrupt and clear that interrupt status to avoid next triggering with actually no new interrupt trigger condition happen.
Typical Use Case
- GPIO Initialization:
- Configure the multiplexing of GPIO pins to different peripheral:
- Configure the GPIO pin as Input/Output for one pin:
- Toggle the GPIO output voltage level when configured as Output.
- Set GPIO Pin as High voltage level on Output.
- Read High/Low voltage level for one GPIO pin from the pin or the data bus.
- Enable interrupt detection for one pin.
- Get interrupt pending status flags for one pin.