FlexCAN Peripheral and Driver Overview

Content including 1) peripheral features, work logic and work method; 2) driver design logic and use method; 3) typical use case. More...

Peripheral feature and how this peripheral works

The FlexCAN module is a full implementation of the CAN protocol specification, the CAN with Flexible Data rate (CAN FD) protocol, and the CAN 2.0 version B protocol, which supports both standard and extended message frames and long payloads up to 64 bytes, transferred at faster rates (up to 8 Mbps). The FlexCAN module can be divided into several submodules : The "Protocol Engine" (PE) submodule, The "Controller Host Interface" (CHI) submodule and The "Bus Interface Unit" (BIU) submodule.

Features

• Protocol level support
  • Support for Flexible Data Rate (CAN FD) protocol specification and CAN 2.0 B protocol specifications.
  • Compliant with the ISO 11898-1 standard.
• Multiple functional modes
  • Normal mode, operates receiving and/or transmitting message frames, errors are managed normally, and all CAN Protocol functions are enabled. It can be further divided into user mode and supervisor mode, which differ in the access to some restricted control registers.
  • Freeze mode, in this mode, no transmission or reception of frames is done and synchronicity to the CAN bus is lost. All memory-mapped register are configurable, except the PE submodule clock source select bit CTRL1[CLKSRC].
  • Loop-Back mode, in this mode, FlexCAN performs an internal loop back that can be used for self-test operation. The bit stream output of the transmitter is internally fed back to the receiver input. The Rx input pin will be ignored and the Tx output pin always to the recessive state (means logic 1).
  • Listen-Only mode, in this mode, transmission is disabled, all error counters are frozen, and the module operates in a CAN Error Passive mode. Only messages acknowledged by another CAN station will be received.
  • CAN FD Active mode, in this mode, FlexCAN is capable of transmitting and receiving all messages formatted according to the CAN FD Protocol and CAN 2.0 Protocol 2.0 in an interleaved fashion.
• Multiple low-power modes with programmable wake up on bus activity (only Doze/Stop mode)
  • Disable mode, this low-power mode is entered when MCR[MDIS] is asserted by the software and MCR[LPM_ACK] is asserted by FlexCAN. When in disable mode, the module issues a request to disable the clocks to the CAN Protocol Engine and Controller Host Interface submodules.
  • Doze modes, this low power mode is entered when MCR[DOZE] is asserted and Doze mode is requested at chip level, and MCR[ LPM_ACK] is asserted by FlexCAN. When in Doze mode, the module issues a request to disable the clocks to the CAN Protocol Engine and the CAN Controller-Host Interface submodules.
  • Stop modes, this low power mode is entered when Stop mode is requested at chip level and MCR[LPM_ACK] is asserted by the FlexCAN. When in Stop Mode, the module puts itself in an inactive state and then informs the CPU that the clocks can be shut down globally.
• Flexible message buffers (MBs) RAM to storing Rx/Tx CAN/CANFD frame
  • Each MBs can configurable as Rx or Tx, all supporting standard (11 bits ID) and extended (29 bits ID) frame.
  • MBs RAM not used by reception or transmission can be used as general purpose RAM space.
  • Support configurable MBs size to 8/16/32/64 bytes, and the corresponding number of MB is 32/21/12/7.
  • Support individual/global Rx Mask for each MBs.
  • Support record Rx/Tx frames time stamp based on 16-bit free running timer, with an optional external time tick.
  • Support configure MB0~5 to be full-featured Rx FIFO under no-FD mode, with storage capacity for up to six 8 bytes frames and automatic internal pointer handling with DMA support.
  • Support powerful Rx FIFO ID filtering, capable of matching incoming IDs against either 128 extended, 256 standard, or 512 partial (8 bit) IDs, with up to 32 individual masking capability.
  • Support selectable priority between MBs and Rx FIFO during matching process.
  • Support indicates which Identifier Acceptance filter was hit by the received message in Rx FIFO.
  • Support programmable Tx MBs priority scheme: lowest ID, lowest buffer number, or highest priority.
    • lowest ID : the Tx MB's frame have a lowest ID will be sent in the next opportunity.
    • lowest buffer number : the first (lowest number) active Tx MB found will be sent in the next opportunity.
    • highest priority : the Tx MB's frame have a highest local PRIO value (3 bits) will be sent in the next opportunity.
• Clock and bit timing
  • Support programmable clock source to the PE submodule, either peripheral clock or oscillator clock.
  • Support extends CAN bit timing settings, which extends the range of the timing variables defined by protocol.
  • Support a second set of CAN bit timing variables to be applied at the data phase of CAN FD frames with the Bit Rate Switch (BRS) set.
  • Support transceiver delay compensation feature when transmitting CAN FD frames with the Bit Rate Switch (BRS) set.
• Other software programmable features
  • Self reception capability, can't be enabled under Loop-Back mode.
  • Transmission abort capability.
  • Support global network time, which resets the free running timer each time a specific message received.
  • Support configure remote request frames be managed automatically or by software.
• Interrupts support
  • Message buffers interrupt.
  • Bus Off interrupt.
  • Error interrupt.
  • Rx Warning interrupt.
  • Tx Warning interrupt.
  • Wake Up interrupt.
• DMA support
  • Support DMA feature for RX FIFO.

How this driver are designed to make this peripheral works

The FlexCAN driver provides APIs with Functional layer and Transactional layer. The Functional Layer is provided with highly optimized implementation and highly flexible usage of the peripheral features. The Transactional layer is provided with high abstraction, limited flexibility/optimization, and not all features are covered.

Functional Layer

• Initialization and De-initialization Interfaces. The APIs in this function group can be used to initialize or de-initialize the FlexCAN module.
• Freeze Mode Operation. The APIs in this function group used to make FlexCAN module enter/exit the freeze mode.
• Timing Calculation Helper Functions. The APIs in this function group used to help user get improved timing values for CAN and CAN FD by specific baudrates.
• Timing Configuration. The APIs in this function group used to configure the CAN and CAN FD timing characteristic.
• Message Buffer Configuration. The APIs in this function group can be used to configure Message Buffer (MB) mask status, clean and select as Tx/Rx MB, configures the Rx FIFO feature.
• Status Interface. The APIs in this function group can be used to get or clear the FlexCAN module status flag, get the Tx/Rx error counter value.
• Message Buffer Status Get/Clear Interfaces. The APIs in this function group can be used to get or clear the status flag of MBs.
• Interrupt Interfaces. The APIs in this function group can be used to enable/disable FlexCAN module interrupts.
• Message Buffer Interrupts Interfaces. The APIs in this function group can be used to enable/disable MBs interrupts.
• DMA Control Interfaces. The APIs in this function group used to enable/disable FlexCAN Rx FIFO DMA request, get the Rx FIFO Head address.
• Bus Operations. The APIs in this function group used to enable/disable FlexCAN module, write/read the MBs' frame.
• Transactional Blocking Interface. The APIs in this function group used to send/receive frame to/from CAN bus with polling mode.

Transactional Layer

Transactional layer is state retained thus it use the flexcan_handle_t to specify the peripheral. User need to initialize the handle by calling FLEXCAN_TransferCreateHandle API.

• Transactional Non-Blocking Interfaces. The APIs in this function group used to send/receive frame to/from CAN bus with interrupt way.

How to use this driver

General Control Macro

• FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL SDK genneral Macro, controls whether to ungate/gate peripheral's clock source inside driver. Set it to none-zero value then driver will not ungate/gate clock source during initialization/de-initialization.
• FLEXCAN_WAIT_TIMEOUT FlexCAN specific Macro, controls the timeout ticks about wait Low-Power mode acknowledge.

Configuration Items Before Calling FlexCAN Driver APIs

• Mux the FlexCAN TX/RX signals to on-board pins, and configure them with expected feature.
• Ungate the FlexCAN clock if user wish to do it outside driver by setting FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL to non-zero value.
• If user wish to use interrupt for FlexCAN transfer while other modules' interrupt sources are also enabled, set proper interrupt priority before initiating FlexCAN transfer, so that FlexCAN IRQ service can be properly executed.
• Enable DMA and configure DMA channel trigger source in application codes if FlexCAN module is expected to generator DMA request on RX FIFO full/empty.

Initialize

• Init CAN as classic CAN or CAN FD. FLEXCAN_GetDefaultConfig or FLEXCAN_GetFDDefaultConfig can help user to get a ready-to-use init data structure. Note the CAN FD mode need use both GetDefaultConfig APIs.

CAN Timing calculation

• Calculation classic CAN bit rate or CAN FD data phase bit rate. Note the CAN FD need both bit rate and data phase bit rate.

Message buffer configure and transaction

• For send node.
  • Setup Tx Message Buffer.
  • Send frame use Non-Blocking/Blocking way.
• For receive node.
  • Setup Rx Message Buffer.
  • Receive frame use Non-Blocking/Blocking way.

Typical Use Case

1. Send/receive CAN FD frame to/from CAN bus with interrupt mode.
   Send node

   *        flexcan_handle_t g_sFlexcanHandle;
   *        flexcan_config_t sFlexcanConfig;
   *        flexcan_fd_config_t sFDConfig;
   *        FLEXCAN_GetDefaultConfig(&sFlexcanConfig, EXAMPLE_CAN_CLK_FREQ);
   *        FLEXCAN_GetFDDefaultConfig(&sFlexcanConfig, &sFDConfig);
   *        FLEXCAN_Init(CAN, &sFlexcanConfig);
   *        flexcan_mb_transfer_t g_sTxXfer;
   *        flexcan_frame_t g_sFrame;
   *        FLEXCAN_TransferCreateHandle(CAN, &g_sFlexcanHandle, flexcan_callback, NULL);
   *        FLEXCAN_SetFDTxMbConfig(CAN, TX_MESSAGE_BUFFER_NUM, true);
   *        g_sFrame.bitsId     = FLEXCAN_ID_STD(g_u32TxIdentifier);
   *        g_sFrame.bitFormat  = (uint8_t)kFLEXCAN_FrameFormatStandard;
   *        g_sFrame.bitType    = (uint8_t)kFLEXCAN_FrameTypeData;
   *        g_sFrame.bitsLength = 15U;
   *        g_sFrame.bitBrs = 1U;
   *        g_sFrame.bitEdl = 1U;
   *        g_sTxXfer.u8MsgBufIdx = (uint8_t)TX_MESSAGE_BUFFER_NUM;
   *        g_sTxXfer.psFrameFD = &g_sFrame;
   *        FLEXCAN_TransferFDSendNonBlocking(&g_sFlexcanHandle, &g_sTxXfer);
   *     

   Receive node

   *        flexcan_handle_t g_sFlexcanHandle;
   *        flexcan_config_t sFlexcanConfig;
   *        flexcan_fd_config_t sFDConfig;
   *        FLEXCAN_GetDefaultConfig(&sFlexcanConfig, EXAMPLE_CAN_CLK_FREQ);
   *        FLEXCAN_GetFDDefaultConfig(&sFlexcanConfig, &sFDConfig);
   *        FLEXCAN_Init(CAN, &sFlexcanConfig);
   *        flexcan_mb_transfer_t g_sTxXfer;
   *        flexcan_frame_t g_sFrame;
   *        FLEXCAN_TransferCreateHandle(CAN, &g_sFlexcanHandle, flexcan_callback, NULL);
   *        FLEXCAN_SetRxMbGlobalMask(CAN, FLEXCAN_RX_MB_STD_MASK(g_u32RxIdentifier, 0, 0));
   *        sRxMbConfig.eFormat = kFLEXCAN_FrameFormatStandard;
   *        sRxMbConfig.eType   = kFLEXCAN_FrameTypeData;
   *        sRxMbConfig.u32Id   = FLEXCAN_ID_STD(g_u32RxIdentifier);
   *        FLEXCAN_SetFDRxMbConfig(CAN, RX_MESSAGE_BUFFER_NUM, &sRxMbConfig, true);
   *        g_sTxXfer.u8MsgBufIdx = (uint8_t)RX_MESSAGE_BUFFER_NUM;
   *        g_sTxXfer.psFrameFD = &g_sFrame;
   *        FLEXCAN_TransferFDSendNonBlocking(&g_sFlexcanHandle, &g_sTxXfer);
   *