MCUX CLNS
MCUX Crypto Library Normal Secure
 
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mcuxClOscca_FunctionIdentifiers.h
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1/*--------------------------------------------------------------------------*/
2/* Copyright 2020-2024 NXP */
3/* */
4/* NXP Confidential. This software is owned or controlled by NXP and may */
5/* only be used strictly in accordance with the applicable license terms. */
6/* By expressly accepting such terms or by downloading, installing, */
7/* activating and/or otherwise using the software, you are agreeing that */
8/* you have read, and that you agree to comply with and are bound by, such */
9/* license terms. If you do not agree to be bound by the applicable license */
10/* terms, then you may not retain, install, activate or otherwise use the */
11/* software. */
12/*--------------------------------------------------------------------------*/
13
22#ifndef MCUX_OSCCACL_FLOW_PROTECTION_FUNCTION_IDENTIFIERS_H_
23#define MCUX_OSCCACL_FLOW_PROTECTION_FUNCTION_IDENTIFIERS_H_
24
25#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Cipher_init_encrypt (0x1766u)
26#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaCipherModes_finish_internal_encrypt_Sm4 (0x5AE4u)
27#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaCipherModes_finish_internal_decrypt_Sm4 (0x7C26u)
28#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Signature_OnlyVerify_SelfTest (0x1F43u)
29#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Signature_SignVerify_SelfTest (0x3BE0u)
30#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Cipher_EncDec_selftest (0x3A2Bu)
31#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_KeyExchange_SelfTest (0x3A8Eu)
32#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaMacModes_finish (0x1E63u)
33#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaMacModes_process (0x1B8Du)
34#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaMacModes_compute (0x5A87u)
35#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaMacModes_init (0x2E4Bu)
36#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaMacModes_SM4_Gen_K1K2 (0x413Fu)
37#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaMacModes_Engine_CBCMAC_Finalize (0x52D9u)
38#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaMacModes_Engine_CMAC_Finalize (0x14EDu)
39#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaMacModes_Engine_CBCMAC_Update (0x7247u)
40#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaMacModes_Engine_CMAC_Update (0x14B7u)
41#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaMacModes_Engine_CBCMAC_Init (0x06F5u)
42#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaMacModes_Engine_CMAC_Init (0x489Fu)
43#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaMacModes_Engine_CBCMAC_Oneshot (0x3BA2u)
44#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaMacModes_Engine_CMAC_Oneshot (0x11BDu)
45#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaRandomModes_ROtrng_reseed (0x49DCu)
46#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaCipherModes_finish_Sm4 (0x724Eu)
47#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaCipherModes_process_Sm4 (0x68AEu)
48#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaCipherModes_init_decrypt_Sm4 (0x7D0Au)
49#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaCipherModes_init_encrypt_Sm4 (0x54C7u)
50#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaCipherModes_decrypt_Sm4 (0x39ACu)
51#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaCipherModes_encrypt_Sm4 (0x21DEu)
52#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_FastSecureXor (0x6C35u)
53#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_switch_endianness (0x2C1Fu)
54#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm3_sw_finish_sm3 (0x60EDu)
55#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm3_sw_process_sm3 (0x519Du)
56#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm3_sw_oneShotSkeleton_sm3 (0x5572u)
57#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm3_sm3_finishSkeleton (0x70A7u)
58#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm3_sm3_processSkeleton (0x06EBu)
59#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm3_sm3_oneShotSkeleton (0x574Au)
60#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaRandomModes_ROtrng_selftest (0x5335u)
61#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaRandomModes_ROtrng_PowerOnTest (0x155Eu)
62#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaRandomModes_ROtrng_DeliverySimpleTest (0x6E49u)
63#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaRandomModes_ROtrng_PokerTest (0x31ABu)
64#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaRandomModes_ROtrng_generate (0x563Cu)
65#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaRandomModes_ROtrng_init (0x7BC0u)
66#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaAeadModes_SkeletonCcm (0x30BEu)
67#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaPkc_CalcMontInverse (0x6B2Cu)
68#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaAeadModes_EngineCcm (0x2E47u)
69#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaAeadModes_SM4_Crypt_Internal_Ctr (0x457Cu)
70#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaPkc_ComputeModInv (0x2BB1u)
71#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaPkc_LeadingZeros (0x496Eu)
72#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaPkc_MultipleShiftRotate_Index (0x52F8u)
73#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaPkc_GeneratePointerTable (0x6D54u)
74#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaPkc_ComputeQSquared (0x1A57u)
75#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaPkc_ComputeNDash (0x3B61u)
76#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaPkc_StartFupProgram (0x161Fu)
77#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaPkc_Op (0x5A6Cu)
78#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaPkc_SetFupTable (0x339Au)
79#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaPkc_WaitforFinish (0x156Du)
80#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaPkc_GetWordSize (0x1E4Du)
81#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaPkc_SetWordSize (0x6798u)
82#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaPkc_Init (0x16ABu)
83#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaPkc_Reset (0x4C73u)
84#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaAeadModes_init (0x61CBu)
85#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaAeadModes_init_encrypt (0x168Fu)
86#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaAeadModes_init_decrypt (0x6F82u)
87#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaAeadModes_process (0x2BD1u)
88#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaAeadModes_process_adata (0x0B2Fu)
89#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaAeadModes_finish (0x1D8Bu)
90#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaAeadModes_verify (0x4B87u)
91#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaAeadModes_crypt (0x4BD4u)
92#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaAeadModes_encrypt (0x5CA9u)
93#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaAeadModes_decrypt (0x6A5Au)
94#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaMacModes_prepareHMACKey (0x469Bu)
95#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaMacModes_Engine_HMAC_Init (0x2787u)
96#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm4_Tprime (0x3B43u)
97#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm4_Lprime (0x2CBAu)
98#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm4_T (0x6D45u)
99#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm4_L (0x743Cu)
100#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaMacModes_Engine_HMAC_Finalize (0x45B5u)
101#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaMacModes_Engine_HMAC_Oneshot (0x2BA3u)
102#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm4_Tau (0x383Du)
103#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaMacModes_Engine_HMAC_Update (0x5C0Fu)
104#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Cipher_SkeletonSM2 (0x41F6u)
105#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Cipher_finish (0x3F11u)
106#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Cipher_process (0x5A5Cu)
107#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Cipher_init_decrypt (0x1C5Du)
108#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_GenerateKeyPair (0x392Bu)
109#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm3_Safo_Hash_PreLoad (0x0DAEu)
110#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm3_Safo_Hash_Auto (0x1CC7u)
111#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm3_Safo_Hash_Norm (0x39E2u)
112#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm3_SetMessagePreLoadIV_Sgi (0x5F24u)
113#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm3_ProcessMessageBlock_Sgi (0x4D17u)
114#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_RobustCompareToZero (0x50FAu)
115#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_RobustCompareBoolean (0x5D62u)
116#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_SignVerify_SelfTest (0x6437u)
117#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_EncDec_SelfTest (0x21CFu)
118#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_KeyExchange (0x52ABu)
119#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Decrypt (0x6E38u)
120#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Encrypt (0x4D0Fu)
121#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_ComputePrehash (0x60F6u)
122#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_InvertPrivateKey (0x5EB0u)
123#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Verify (0x48F9u)
124#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Sign (0x3947u)
125#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Export (0x5933u)
126#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Import (0x1B4Bu)
127#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_EccPointCheckCoordinate (0x4B71u)
128#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_EccPointAddOrDouble (0x4A7Au)
129#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_EccTransAffinePoint2Jac (0x09E7u)
130#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_EccGenRandomBytes (0x5E62u)
131#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_EccPointMultMontgomery (0x5C63u)
132#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_EccPointAdd (0x0D6Eu)
133#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_EccPointDouble (0x0D9Du)
134#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_EccPointConvert2Affine (0x4973u)
135#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_EccJacPointCheck (0x2A97u)
136#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_EccImportInputPointYNegNoInit (0x2E78u)
137#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_EccImportInputPointWithInit (0x2F62u)
138#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_EccGenerateZ (0x4B55u)
139#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_EccPrepareParameters (0x722Eu)
140#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_EccInit (0x11E7u)
141#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_WrapHash (0x6E58u)
142#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_ValidateEncDecCtx (0x7496u)
143#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_EncDec_UpdatePhase (0x7345u)
144#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_SecondPartOfInitPhase (0x7670u)
145#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_KDF (0x63B4u)
146#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Cipher_decrypt (0x16B3u)
147#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Cipher_encrypt (0x293Du)
148#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm4_ScheduleSM4Key (0x58B9u)
149#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaCipherModes_SkeletonSM4 (0x65CAu)
150#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_key_agreement (0x362Eu)
151#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaMacModes_compare (0x3D94u)
152#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaMacModes_verify (0x532Eu)
153#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Signature_Init (0x43A7u)
154#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Signature_Finish (0x387Cu)
155#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Signature_PreHash (0x22D7u)
156#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_KeyAgreement_SelfTest (0x70F2u)
157#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Signature_PrepareDigest (0x1DF0u)
158#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaAeadModes_SM4_Crypt_IncCounter (0x2BACu)
159#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaPkc_CountLeadingZerosWord (0x7741u)
160#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm3_core_sm3_processMessageBlock (0x4B74u)
161#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm4_Engine (0x153Eu)
162#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm4_ScheduleKey (0x1774u)
163#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_EccSecurePointMult (0x398Eu)
164#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_EccPointMultSplitScalar (0x70C7u)
165#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_SecureExport (0x3D51u)
166#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_SecureImport (0x09FCu)
167#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Signature_Internal_Init (0x31B9u)
168#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Signature_Internal_Finish (0x25DCu)
169#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaCipherModes_Sm4Ecb_EncDec_SelfTest (0x1747u)
170#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaCipherModes_Sm4Cbc_EncDec_SelfTest (0x06E7u)
171#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaMacModes_Sm4Cmac_SelfTest (0x29BAu)
172#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaMacModes_Sm4CbcMac_SelfTest (0x53D8u)
173#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaAeadModes_Sm4Ccm_EncDec_SelfTest (0x2D0Fu)
174#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm3_selftest (0x7474u)
175#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaAeadModes_Ccm_Internal_Init (0x13F1u)
176#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaAeadModes_Ccm_Internal_ProcessAad (0x5D15u)
177#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaAeadModes_Ccm_Internal_Process (0x3DB0u)
178#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaAeadModes_Ccm_Internal_Finish (0x472Du)
179#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaCipherModes_SkeletonSM4_Init (0x7E18u)
180#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaCipherModes_SkeletonSM4_Process (0x1576u)
181#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaCipherModes_SkeletonSM4_Finish (0x5C36u)
182#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaCipherModes_SM4_Crypt_IncCounter (0x3A65u)
183#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaCipherModes_SkeletonSM4_Pre (0x0B73u)
184#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaCipherModes_SkeletonSM4_OneShot (0x29ABu)
185#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaCipherModes_SkeletonSM4Ctr_LastBlockPro (0x6D85u)
186#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaCipherModes_SkeletonSM4NoCtr_LastBlockPro (0x4F83u)
187#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaCipherModes_SkeletonSM4NoCtr_BlockPro (0x09BDu)
188#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaCipherModes_SkeletonSM4Ctr_BlockPro (0x6167u)
189#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_EncDec_UpdatePhase_Common (0x6A2Du)
190#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_EncDec_UpdatePhase_Pre (0x1BD4u)
191#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Encrypt_Internal_Init (0x554Du)
192#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Encrypt_Internal_Final (0x6F60u)
193#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Decrypt_Internal_Init (0x46A7u)
194#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Decrypt_Internal_Final (0x1BE1u)
195#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_HandleKeyConfirmation (0x4EA9u)
196#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_ComputeKeyConfirmation_Init (0x59ACu)
197#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_KeyExchange_Init (0x7A89u)
198#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_InvertPrivateKey_EccInit (0x7691u)
199#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_PrivateKey_Check (0x2277u)
200#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Encrypt_Internal_PointMult (0x6EA2u)
201#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Decrypt_Internal_Init_EccPrepare (0x3F14u)
202#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Decrypt_Internal_Init_PointMult (0x164Fu)
203#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Verify_Init (0x3D0Eu)
204#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Signature_Internal_Finish_ComputeS (0x0D7Au)
205#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Cipher_SkeletonSM2_Core (0x13B3u)
206#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Cipher_SkeletonSM2_Encrypt (0x60E7u)
207#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Cipher_SkeletonSM2_Decrypt (0x6794u)
208#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaSm2_Cipher_SkeletonSM2_Decrypt_Process (0x127Du)
209#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaRandomModes_ROtrng_generate_words (0x255Eu)
210#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaRandomModes_ROtrng_generate_tail (0x583Eu)
211#define MCUX_CSSL_FP_FUNCID_mcuxClOsccaRandomModes_ROtrng_generate_head (0x235Du)
212#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_54 (0x4793u)
213#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_55 (0x4A79u)
214#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_56 (0x7E06u)
215#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_57 (0x4E74u)
216#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_58 (0x2CA7u)
217#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_59 (0x65AAu)
218#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_60 (0x553Cu)
219#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_61 (0x4DA3u)
220#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_62 (0x179Cu)
221#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_63 (0x36A6u)
222#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_64 (0x16DAu)
223#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_65 (0x661Du)
224#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_66 (0x0FA5u)
225#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_67 (0x49CEu)
226#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_68 (0x0B3Du)
227#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_69 (0x7E22u)
228#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_70 (0x52E5u)
229#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_71 (0x133Du)
230#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_72 (0x3B91u)
231#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_73 (0x5C55u)
232#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_74 (0x2C5Bu)
233#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_75 (0x31E6u)
234#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_76 (0x16F8u)
235#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_77 (0x21F5u)
236#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_78 (0x7B14u)
237#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_79 (0x6F42u)
238#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_80 (0x36A5u)
239#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_81 (0x3565u)
240#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_82 (0x6715u)
241#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_83 (0x4D4Eu)
242#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_84 (0x21FAu)
243#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_85 (0x1D8Eu)
244#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_86 (0x0E9Eu)
245#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_87 (0x4E39u)
246#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_88 (0x12EBu)
247#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_89 (0x431Fu)
248#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_90 (0x12EDu)
249#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_91 (0x3333u)
250#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_92 (0x5E8Cu)
251#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_93 (0x56CAu)
252#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_94 (0x5566u)
253#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_95 (0x151Fu)
254#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_96 (0x5BA2u)
255#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_97 (0x4F25u)
256#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_98 (0x5077u)
257#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_99 (0x59A6u)
258#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_100 (0x354Du)
259#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_101 (0x2EB1u)
260#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_102 (0x3762u)
261#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_103 (0x5764u)
262#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_104 (0x651Du)
263#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_105 (0x0F2Bu)
264#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_106 (0x23BAu)
265#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_107 (0x65C9u)
266#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_108 (0x393Au)
267#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_109 (0x5273u)
268#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_110 (0x239Eu)
269#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_111 (0x6876u)
270#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_112 (0x37C4u)
271#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_113 (0x5CA3u)
272#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_114 (0x792Cu)
273#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_115 (0x4C5Bu)
274#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_116 (0x5E8Au)
275#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_117 (0x27E2u)
276#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_118 (0x3EA1u)
277#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_119 (0x6DC4u)
278#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_120 (0x09F6u)
279#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_121 (0x5656u)
280#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_122 (0x59B1u)
281#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_123 (0x4D71u)
282#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_124 (0x7265u)
283#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_125 (0x78D8u)
284#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_126 (0x0E57u)
285#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_127 (0x217Bu)
286#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_128 (0x525Du)
287#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_129 (0x3873u)
288#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_130 (0x4C7Au)
289#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_131 (0x0F4Du)
290#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_132 (0x364Eu)
291#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_133 (0x1AEAu)
292#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_134 (0x3E85u)
293#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_135 (0x2C37u)
294#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_136 (0x2A6Du)
295#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_137 (0x38D6u)
296#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_138 (0x6707u)
297#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_139 (0x51CDu)
298#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_140 (0x7859u)
299#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_141 (0x3713u)
300#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_142 (0x45F2u)
301#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_143 (0x29B3u)
302#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_144 (0x51F2u)
303#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_145 (0x5671u)
304#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_146 (0x435Bu)
305#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_147 (0x18DBu)
306#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_148 (0x1B71u)
307#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_149 (0x45B9u)
308#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_150 (0x46DAu)
309#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_151 (0x233Du)
310#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_152 (0x689Bu)
311#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_153 (0x2E8Eu)
312#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_154 (0x2E93u)
313#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_155 (0x7B28u)
314#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_156 (0x469Eu)
315#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_157 (0x3A2Du)
316#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_158 (0x714Bu)
317#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_159 (0x7AA1u)
318#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_160 (0x2C9Du)
319#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_161 (0x19D9u)
320#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_162 (0x5E16u)
321#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_163 (0x0BD5u)
322#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_164 (0x6517u)
323#define MCUX_CSSL_FP_FUNCID_mcuxClOscca_165 (0x433Eu)
324#endif /* MCUX_OSCCACL_FLOW_PROTECTION_FUNCTION_IDENTIFIERS_H_ */