MIMX8MQ6

CACHE: LMEM CACHE Memory Controller

static inline void ICACHE_InvalidateByRange(uint32_t address, uint32_t size_byte)

Invalidates instruction cache by range.

Note

Address and size should be aligned to 16-Byte due to the cache operation unit FSL_FEATURE_L1ICACHE_LINESIZE_BYTE. The startAddr here will be forced to align to the cache line size if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:
  • address – The physical address.

  • size_byte – size of the memory to be invalidated.

static inline void DCACHE_InvalidateByRange(uint32_t address, uint32_t size_byte)

Invalidates data cache by range.

Note

Address and size should be aligned to 16-Byte due to the cache operation unit FSL_FEATURE_L1DCACHE_LINESIZE_BYTE. The startAddr here will be forced to align to the cache line size if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:
  • address – The physical address.

  • size_byte – size of the memory to be invalidated.

static inline void DCACHE_CleanByRange(uint32_t address, uint32_t size_byte)

Clean data cache by range.

Note

Address and size should be aligned to 16-Byte due to the cache operation unit FSL_FEATURE_L1DCACHE_LINESIZE_BYTE. The startAddr here will be forced to align to the cache line size if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:
  • address – The physical address.

  • size_byte – size of the memory to be cleaned.

static inline void DCACHE_CleanInvalidateByRange(uint32_t address, uint32_t size_byte)

Cleans and Invalidates data cache by range.

Note

Address and size should be aligned to 16-Byte due to the cache operation unit FSL_FEATURE_L1DCACHE_LINESIZE_BYTE. The startAddr here will be forced to align to the cache line size if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:
  • address – The physical address.

  • size_byte – size of the memory to be Cleaned and Invalidated.

FSL_CACHE_DRIVER_VERSION

cache driver version.

L1CODEBUSCACHE_LINESIZE_BYTE

code bus cache line size is equal to system bus line size, so the unified I/D cache line size equals too.

The code bus CACHE line size is 16B = 128b.

L1SYSTEMBUSCACHE_LINESIZE_BYTE

The system bus CACHE line size is 16B = 128b.

Clock

enum _clock_name

Clock name used to get clock frequency.

Values:

enumerator kCLOCK_CoreM4Clk

ARM M4 Core clock

enumerator kCLOCK_AxiClk

Main AXI bus clock.

enumerator kCLOCK_AhbClk

AHB bus clock.

enumerator kCLOCK_IpgClk

IPG bus clock.

enumerator kCLOCK_Osc25MClk

OSC 25M clock.

enumerator kCLOCK_Osc27MClk

OSC 27M clock.

enumerator kCLOCK_ArmPllClk

Arm PLL clock.

enumerator kCLOCK_VpuPllClk

Vpu PLL clock.

enumerator kCLOCK_DramPllClk

Dram PLL clock.

enumerator kCLOCK_SysPll1Clk

Sys PLL1 clock.

enumerator kCLOCK_SysPll1Div2Clk

Sys PLL1 clock divided by 2.

enumerator kCLOCK_SysPll1Div3Clk

Sys PLL1 clock divided by 3.

enumerator kCLOCK_SysPll1Div4Clk

Sys PLL1 clock divided by 4.

enumerator kCLOCK_SysPll1Div5Clk

Sys PLL1 clock divided by 5.

enumerator kCLOCK_SysPll1Div6Clk

Sys PLL1 clock divided by 6.

enumerator kCLOCK_SysPll1Div8Clk

Sys PLL1 clock divided by 8.

enumerator kCLOCK_SysPll1Div10Clk

Sys PLL1 clock divided by 10.

enumerator kCLOCK_SysPll1Div20Clk

Sys PLL1 clock divided by 20.

enumerator kCLOCK_SysPll2Clk

Sys PLL2 clock.

enumerator kCLOCK_SysPll2Div2Clk

Sys PLL2 clock divided by 2.

enumerator kCLOCK_SysPll2Div3Clk

Sys PLL2 clock divided by 3.

enumerator kCLOCK_SysPll2Div4Clk

Sys PLL2 clock divided by 4.

enumerator kCLOCK_SysPll2Div5Clk

Sys PLL2 clock divided by 5.

enumerator kCLOCK_SysPll2Div6Clk

Sys PLL2 clock divided by 6.

enumerator kCLOCK_SysPll2Div8Clk

Sys PLL2 clock divided by 8.

enumerator kCLOCK_SysPll2Div10Clk

Sys PLL2 clock divided by 10.

enumerator kCLOCK_SysPll2Div20Clk

Sys PLL2 clock divided by 20.

enumerator kCLOCK_SysPll3Clk

Sys PLL3 clock.

enumerator kCLOCK_AudioPll1Clk

Audio PLL1 clock.

enumerator kCLOCK_AudioPll2Clk

Audio PLL2 clock.

enumerator kCLOCK_VideoPll1Clk

Video PLL1 clock.

enumerator kCLOCK_ExtClk1

External clock1.

enumerator kCLOCK_ExtClk2

External clock2.

enumerator kCLOCK_ExtClk3

External clock3.

enumerator kCLOCK_ExtClk4

External clock4.

enumerator kCLOCK_NoneName

None Clock Name.

enum _clock_ip_name

CCM CCGR gate control.

Values:

enumerator kCLOCK_IpInvalid
enumerator kCLOCK_Debug

DEBUG Clock Gate.

enumerator kCLOCK_Dram

DRAM Clock Gate.

enumerator kCLOCK_Ecspi1

ECSPI1 Clock Gate.

enumerator kCLOCK_Ecspi2

ECSPI2 Clock Gate.

enumerator kCLOCK_Ecspi3

ECSPI3 Clock Gate.

enumerator kCLOCK_Gpio1

GPIO1 Clock Gate.

enumerator kCLOCK_Gpio2

GPIO2 Clock Gate.

enumerator kCLOCK_Gpio3

GPIO3 Clock Gate.

enumerator kCLOCK_Gpio4

GPIO4 Clock Gate.

enumerator kCLOCK_Gpio5

GPIO5 Clock Gate.

enumerator kCLOCK_Gpt1

GPT1 Clock Gate.

enumerator kCLOCK_Gpt2

GPT2 Clock Gate.

enumerator kCLOCK_Gpt3

GPT3 Clock Gate.

enumerator kCLOCK_Gpt4

GPT4 Clock Gate.

enumerator kCLOCK_Gpt5

GPT5 Clock Gate.

enumerator kCLOCK_Gpt6

GPT6 Clock Gate.

enumerator kCLOCK_I2c1

I2C1 Clock Gate.

enumerator kCLOCK_I2c2

I2C2 Clock Gate.

enumerator kCLOCK_I2c3

I2C3 Clock Gate.

enumerator kCLOCK_I2c4

I2C4 Clock Gate.

enumerator kCLOCK_Iomux

IOMUX Clock Gate.

enumerator kCLOCK_Ipmux1

IPMUX1 Clock Gate.

enumerator kCLOCK_Ipmux2

IPMUX2 Clock Gate.

enumerator kCLOCK_Ipmux3

IPMUX3 Clock Gate.

enumerator kCLOCK_Ipmux4

IPMUX4 Clock Gate.

enumerator kCLOCK_M4

M4 Clock Gate.

enumerator kCLOCK_Mu

MU Clock Gate.

enumerator kCLOCK_Ocram

OCRAM Clock Gate.

enumerator kCLOCK_OcramS

OCRAM S Clock Gate.

enumerator kCLOCK_Pwm1

PWM1 Clock Gate.

enumerator kCLOCK_Pwm2

PWM2 Clock Gate.

enumerator kCLOCK_Pwm3

PWM3 Clock Gate.

enumerator kCLOCK_Pwm4

PWM4 Clock Gate.

enumerator kCLOCK_Qspi

QSPI Clock Gate.

enumerator kCLOCK_Rdc

RDC Clock Gate.

enumerator kCLOCK_Sai1

SAI1 Clock Gate.

enumerator kCLOCK_Sai2

SAI2 Clock Gate.

enumerator kCLOCK_Sai3

SAI3 Clock Gate.

enumerator kCLOCK_Sai4

SAI4 Clock Gate.

enumerator kCLOCK_Sai5

SAI5 Clock Gate.

enumerator kCLOCK_Sai6

SAI6 Clock Gate.

enumerator kCLOCK_Sdma1

SDMA1 Clock Gate.

enumerator kCLOCK_Sdma2

SDMA2 Clock Gate.

enumerator kCLOCK_Sec_Debug

SEC_DEBUG Clock Gate.

enumerator kCLOCK_Sema42_1

RDC SEMA42 Clock Gate.

enumerator kCLOCK_Sema42_2

RDC SEMA42 Clock Gate.

enumerator kCLOCK_Sim_display

SIM_Display Clock Gate.

enumerator kCLOCK_Sim_m

SIM_M Clock Gate.

enumerator kCLOCK_Sim_main

SIM_MAIN Clock Gate.

enumerator kCLOCK_Sim_s

SIM_S Clock Gate.

enumerator kCLOCK_Sim_wakeup

SIM_WAKEUP Clock Gate.

enumerator kCLOCK_Uart1

UART1 Clock Gate.

enumerator kCLOCK_Uart2

UART2 Clock Gate.

enumerator kCLOCK_Uart3

UART3 Clock Gate.

enumerator kCLOCK_Uart4

UART4 Clock Gate.

enumerator kCLOCK_Wdog1

WDOG1 Clock Gate.

enumerator kCLOCK_Wdog2

WDOG2 Clock Gate.

enumerator kCLOCK_Wdog3

WDOG3 Clock Gate.

enumerator kCLOCK_TempSensor

TempSensor Clock Gate.

enum _clock_root_control

ccm root name used to get clock frequency.

Values:

enumerator kCLOCK_RootM4

ARM Cortex-M4 Clock control name.

enumerator kCLOCK_RootAxi

AXI Clock control name.

enumerator kCLOCK_RootNoc

NOC Clock control name.

enumerator kCLOCK_RootAhb

AHB Clock control name.

enumerator kCLOCK_RootIpg

IPG Clock control name.

enumerator kCLOCK_RootDramAlt

DRAM ALT Clock control name.

enumerator kCLOCK_RootSai1

SAI1 Clock control name.

enumerator kCLOCK_RootSai2

SAI2 Clock control name.

enumerator kCLOCK_RootSai3

SAI3 Clock control name.

enumerator kCLOCK_RootSai4

SAI4 Clock control name.

enumerator kCLOCK_RootSai5

SAI5 Clock control name.

enumerator kCLOCK_RootSai6

SAI6 Clock control name.

enumerator kCLOCK_RootQspi

QSPI Clock control name.

enumerator kCLOCK_RootI2c1

I2C1 Clock control name.

enumerator kCLOCK_RootI2c2

I2C2 Clock control name.

enumerator kCLOCK_RootI2c3

I2C3 Clock control name.

enumerator kCLOCK_RootI2c4

I2C4 Clock control name.

enumerator kCLOCK_RootUart1

UART1 Clock control name.

enumerator kCLOCK_RootUart2

UART2 Clock control name.

enumerator kCLOCK_RootUart3

UART3 Clock control name.

enumerator kCLOCK_RootUart4

UART4 Clock control name.

enumerator kCLOCK_RootEcspi1

ECSPI1 Clock control name.

enumerator kCLOCK_RootEcspi2

ECSPI2 Clock control name.

enumerator kCLOCK_RootEcspi3

ECSPI3 Clock control name.

enumerator kCLOCK_RootPwm1

PWM1 Clock control name.

enumerator kCLOCK_RootPwm2

PWM2 Clock control name.

enumerator kCLOCK_RootPwm3

PWM3 Clock control name.

enumerator kCLOCK_RootPwm4

PWM4 Clock control name.

enumerator kCLOCK_RootGpt1

GPT1 Clock control name.

enumerator kCLOCK_RootGpt2

GPT2 Clock control name.

enumerator kCLOCK_RootGpt3

GPT3 Clock control name.

enumerator kCLOCK_RootGpt4

GPT4 Clock control name.

enumerator kCLOCK_RootGpt5

GPT5 Clock control name.

enumerator kCLOCK_RootGpt6

GPT6 Clock control name.

enumerator kCLOCK_RootWdog

WDOG Clock control name.

enum _clock_root

ccm clock root used to get clock frequency.

Values:

enumerator kCLOCK_M4ClkRoot

ARM Cortex-M4 Clock control name.

enumerator kCLOCK_AxiClkRoot

AXI Clock control name.

enumerator kCLOCK_NocClkRoot

NOC Clock control name.

enumerator kCLOCK_AhbClkRoot

AHB Clock control name.

enumerator kCLOCK_IpgClkRoot

IPG Clock control name.

enumerator kCLOCK_DramAltClkRoot

DRAM ALT Clock control name.

enumerator kCLOCK_Sai1ClkRoot

SAI1 Clock control name.

enumerator kCLOCK_Sai2ClkRoot

SAI2 Clock control name.

enumerator kCLOCK_Sai3ClkRoot

SAI3 Clock control name.

enumerator kCLOCK_Sai4ClkRoot

SAI4 Clock control name.

enumerator kCLOCK_Sai5ClkRoot

SAI5 Clock control name.

enumerator kCLOCK_Sai6ClkRoot

SAI6 Clock control name.

enumerator kCLOCK_QspiClkRoot

QSPI Clock control name.

enumerator kCLOCK_I2c1ClkRoot

I2C1 Clock control name.

enumerator kCLOCK_I2c2ClkRoot

I2C2 Clock control name.

enumerator kCLOCK_I2c3ClkRoot

I2C3 Clock control name.

enumerator kCLOCK_I2c4ClkRoot

I2C4 Clock control name.

enumerator kCLOCK_Uart1ClkRoot

UART1 Clock control name.

enumerator kCLOCK_Uart2ClkRoot

UART2 Clock control name.

enumerator kCLOCK_Uart3ClkRoot

UART3 Clock control name.

enumerator kCLOCK_Uart4ClkRoot

UART4 Clock control name.

enumerator kCLOCK_Ecspi1ClkRoot

ECSPI1 Clock control name.

enumerator kCLOCK_Ecspi2ClkRoot

ECSPI2 Clock control name.

enumerator kCLOCK_Ecspi3ClkRoot

ECSPI3 Clock control name.

enumerator kCLOCK_Pwm1ClkRoot

PWM1 Clock control name.

enumerator kCLOCK_Pwm2ClkRoot

PWM2 Clock control name.

enumerator kCLOCK_Pwm3ClkRoot

PWM3 Clock control name.

enumerator kCLOCK_Pwm4ClkRoot

PWM4 Clock control name.

enumerator kCLOCK_Gpt1ClkRoot

GPT1 Clock control name.

enumerator kCLOCK_Gpt2ClkRoot

GPT2 Clock control name.

enumerator kCLOCK_Gpt3ClkRoot

GPT3 Clock control name.

enumerator kCLOCK_Gpt4ClkRoot

GPT4 Clock control name.

enumerator kCLOCK_Gpt5ClkRoot

GPT5 Clock control name.

enumerator kCLOCK_Gpt6ClkRoot

GPT6 Clock control name.

enumerator kCLOCK_WdogClkRoot

WDOG Clock control name.

enum _clock_rootmux_m4_clk_sel

Root clock select enumeration for ARM Cortex-M4 core.

Values:

enumerator kCLOCK_M4RootmuxOsc25m

ARM Cortex-M4 Clock from OSC 25M.

enumerator kCLOCK_M4RootmuxSysPll2Div5

ARM Cortex-M4 Clock from SYSTEM PLL2 divided by 5.

enumerator kCLOCK_M4RootmuxSysPll2Div4

ARM Cortex-M4 Clock from SYSTEM PLL2 divided by 4.

enumerator kCLOCK_M4RootmuxSysPll1Div3

ARM Cortex-M4 Clock from SYSTEM PLL1 divided by 3.

enumerator kCLOCK_M4RootmuxSysPll1

ARM Cortex-M4 Clock from SYSTEM PLL1.

enumerator kCLOCK_M4RootmuxAudioPll1

ARM Cortex-M4 Clock from AUDIO PLL1.

enumerator kCLOCK_M4RootmuxVideoPll1

ARM Cortex-M4 Clock from VIDEO PLL1.

enumerator kCLOCK_M4RootmuxSysPll3

ARM Cortex-M4 Clock from SYSTEM PLL3.

enum _clock_rootmux_axi_clk_sel

Root clock select enumeration for AXI bus.

Values:

enumerator kCLOCK_AxiRootmuxOsc25m

ARM AXI Clock from OSC 25M.

enumerator kCLOCK_AxiRootmuxSysPll2Div3

ARM AXI Clock from SYSTEM PLL2 divided by 3.

enumerator kCLOCK_AxiRootmuxSysPll1

ARM AXI Clock from SYSTEM PLL1.

enumerator kCLOCK_AxiRootmuxSysPll2Div4

ARM AXI Clock from SYSTEM PLL2 divided by 4.

enumerator kCLOCK_AxiRootmuxSysPll2

ARM AXI Clock from SYSTEM PLL2.

enumerator kCLOCK_AxiRootmuxAudioPll1

ARM AXI Clock from AUDIO PLL1.

enumerator kCLOCK_AxiRootmuxVideoPll1

ARM AXI Clock from VIDEO PLL1.

enumerator kCLOCK_AxiRootmuxSysPll1Div8

ARM AXI Clock from SYSTEM PLL1 divided by 8.

enum _clock_rootmux_ahb_clk_sel

Root clock select enumeration for AHB bus.

Values:

enumerator kCLOCK_AhbRootmuxOsc25m

ARM AHB Clock from OSC 25M.

enumerator kCLOCK_AhbRootmuxSysPll1Div6

ARM AHB Clock from SYSTEM PLL1 divided by 6.

enumerator kCLOCK_AhbRootmuxSysPll1

ARM AHB Clock from SYSTEM PLL1.

enumerator kCLOCK_AhbRootmuxSysPll1Div2

ARM AHB Clock from SYSTEM PLL1 divided by 2.

enumerator kCLOCK_AhbRootmuxSysPll2Div8

ARM AHB Clock from SYSTEM PLL2 divided by 8.

enumerator kCLOCK_AhbRootmuxSysPll3

ARM AHB Clock from SYSTEM PLL3.

enumerator kCLOCK_AhbRootmuxAudioPll1

ARM AHB Clock from AUDIO PLL1.

enumerator kCLOCK_AhbRootmuxVideoPll1

ARM AHB Clock from VIDEO PLL1.

enum _clock_rootmux_qspi_clk_sel

Root clock select enumeration for QSPI peripheral.

Values:

enumerator kCLOCK_QspiRootmuxOsc25m

ARM QSPI Clock from OSC 25M.

enumerator kCLOCK_QspiRootmuxSysPll1Div2

ARM QSPI Clock from SYSTEM PLL1 divided by 2.

enumerator kCLOCK_QspiRootmuxSysPll1

ARM QSPI Clock from SYSTEM PLL1.

enumerator kCLOCK_QspiRootmuxSysPll2Div2

ARM QSPI Clock from SYSTEM PLL2 divided by 2.

enumerator kCLOCK_QspiRootmuxAudioPll2

ARM QSPI Clock from AUDIO PLL2.

enumerator kCLOCK_QspiRootmuxSysPll1Div3

ARM QSPI Clock from SYSTEM PLL1 divided by 3

enumerator kCLOCK_QspiRootmuxSysPll3

ARM QSPI Clock from SYSTEM PLL3.

enumerator kCLOCK_QspiRootmuxSysPll1Div8

ARM QSPI Clock from SYSTEM PLL1 divided by 8.

enum _clock_rootmux_ecspi_clk_sel

Root clock select enumeration for ECSPI peripheral.

Values:

enumerator kCLOCK_EcspiRootmuxOsc25m

ECSPI Clock from OSC 25M.

enumerator kCLOCK_EcspiRootmuxSysPll2Div5

ECSPI Clock from SYSTEM PLL2 divided by 5.

enumerator kCLOCK_EcspiRootmuxSysPll1Div20

ECSPI Clock from SYSTEM PLL1 divided by 20.

enumerator kCLOCK_EcspiRootmuxSysPll1Div5

ECSPI Clock from SYSTEM PLL1 divided by 5.

enumerator kCLOCK_EcspiRootmuxSysPll1

ECSPI Clock from SYSTEM PLL1.

enumerator kCLOCK_EcspiRootmuxSysPll3

ECSPI Clock from SYSTEM PLL3.

enumerator kCLOCK_EcspiRootmuxSysPll2Div4

ECSPI Clock from SYSTEM PLL2 divided by 4.

enumerator kCLOCK_EcspiRootmuxAudioPll2

ECSPI Clock from AUDIO PLL2.

enum _clock_rootmux_i2c_clk_sel

Root clock select enumeration for I2C peripheral.

Values:

enumerator kCLOCK_I2cRootmuxOsc25m

I2C Clock from OSC 25M.

enumerator kCLOCK_I2cRootmuxSysPll1Div5

I2C Clock from SYSTEM PLL1 divided by 5.

enumerator kCLOCK_I2cRootmuxSysPll2Div20

I2C Clock from SYSTEM PLL2 divided by 20.

enumerator kCLOCK_I2cRootmuxSysPll3

I2C Clock from SYSTEM PLL3 .

enumerator kCLOCK_I2cRootmuxAudioPll1

I2C Clock from AUDIO PLL1.

enumerator kCLOCK_I2cRootmuxVideoPll1

I2C Clock from VIDEO PLL1.

enumerator kCLOCK_I2cRootmuxAudioPll2

I2C Clock from AUDIO PLL2.

enumerator kCLOCK_I2cRootmuxSysPll1Div6

I2C Clock from SYSTEM PLL1 divided by 6.

enum _clock_rootmux_uart_clk_sel

Root clock select enumeration for UART peripheral.

Values:

enumerator kCLOCK_UartRootmuxOsc25m

UART Clock from OSC 25M.

enumerator kCLOCK_UartRootmuxSysPll1Div10

UART Clock from SYSTEM PLL1 divided by 10.

enumerator kCLOCK_UartRootmuxSysPll2Div5

UART Clock from SYSTEM PLL2 divided by 5.

enumerator kCLOCK_UartRootmuxSysPll2Div10

UART Clock from SYSTEM PLL2 divided by 10.

enumerator kCLOCK_UartRootmuxSysPll3

UART Clock from SYSTEM PLL3.

enumerator kCLOCK_UartRootmuxExtClk2

UART Clock from External Clock 2.

enumerator kCLOCK_UartRootmuxExtClk34

UART Clock from External Clock 3, External Clock 4.

enumerator kCLOCK_UartRootmuxAudioPll2

UART Clock from Audio PLL2.

enum _clock_rootmux_gpt

Root clock select enumeration for GPT peripheral.

Values:

enumerator kCLOCK_GptRootmuxOsc25m

GPT Clock from OSC 25M.

enumerator kCLOCK_GptRootmuxSystemPll2Div10

GPT Clock from SYSTEM PLL2 divided by 10.

enumerator kCLOCK_GptRootmuxSysPll1Div2

GPT Clock from SYSTEM PLL1 divided by 2.

enumerator kCLOCK_GptRootmuxSysPll1Div20

GPT Clock from SYSTEM PLL1 divided by 20.

enumerator kCLOCK_GptRootmuxVideoPll1

GPT Clock from VIDEO PLL1.

enumerator kCLOCK_GptRootmuxSystemPll1Div10

GPT Clock from SYSTEM PLL1 divided by 10.

enumerator kCLOCK_GptRootmuxAudioPll1

GPT Clock from AUDIO PLL1.

enumerator kCLOCK_GptRootmuxExtClk123

GPT Clock from External Clock1, External Clock2, External Clock3.

enum _clock_rootmux_wdog_clk_sel

Root clock select enumeration for WDOG peripheral.

Values:

enumerator kCLOCK_WdogRootmuxOsc25m

WDOG Clock from OSC 25M.

enumerator kCLOCK_WdogRootmuxSysPll1Div6

WDOG Clock from SYSTEM PLL1 divided by 6.

enumerator kCLOCK_WdogRootmuxSysPll1Div5

WDOG Clock from SYSTEM PLL1 divided by 5.

enumerator kCLOCK_WdogRootmuxVpuPll

WDOG Clock from VPU DLL.

enumerator kCLOCK_WdogRootmuxSystemPll2Div8

WDOG Clock from SYSTEM PLL2 divided by 8.

enumerator kCLOCK_WdogRootmuxSystemPll3

WDOG Clock from SYSTEM PLL3.

enumerator kCLOCK_WdogRootmuxSystemPll1Div10

WDOG Clock from SYSTEM PLL1 divided by 10.

enumerator kCLOCK_WdogRootmuxSystemPll2Div6

WDOG Clock from SYSTEM PLL2 divided by 6.

enum _clock_rootmux_pwm_clk_sel

Root clock select enumeration for PWM peripheral.

Values:

enumerator kCLOCK_PwmRootmuxOsc25m

PWM Clock from OSC 25M.

enumerator kCLOCK_PwmRootmuxSysPll2Div10

PWM Clock from SYSTEM PLL2 divided by 10.

enumerator kCLOCK_PwmRootmuxSysPll1Div5

PWM Clock from SYSTEM PLL1 divided by 5.

enumerator kCLOCK_PwmRootmuxSysPll1Div20

PWM Clock from SYSTEM PLL1 divided by 20.

enumerator kCLOCK_PwmRootmuxSystemPll3

PWM Clock from SYSTEM PLL3.

enumerator kCLOCK_PwmRootmuxExtClk12

PWM Clock from External Clock1, External Clock2.

enumerator kCLOCK_PwmRootmuxSystemPll1Div10

PWM Clock from SYSTEM PLL1 divided by 10.

enumerator kCLOCK_PwmRootmuxVideoPll1

PWM Clock from VIDEO PLL1.

enum _clock_rootmux_sai_clk_sel

Root clock select enumeration for SAI peripheral.

Values:

enumerator kCLOCK_SaiRootmuxOsc25m

SAI Clock from OSC 25M.

enumerator kCLOCK_SaiRootmuxAudioPll1

SAI Clock from AUDIO PLL1.

enumerator kCLOCK_SaiRootmuxAudioPll2

SAI Clock from AUDIO PLL2.

enumerator kCLOCK_SaiRootmuxVideoPll1

SAI Clock from VIDEO PLL1.

enumerator kCLOCK_SaiRootmuxSysPll1Div6

SAI Clock from SYSTEM PLL1 divided by 6.

enumerator kCLOCK_SaiRootmuxOsc27m

SAI Clock from OSC 27M.

enumerator kCLOCK_SaiRootmuxExtClk123

SAI Clock from External Clock1, External Clock2, External Clock3.

enumerator kCLOCK_SaiRootmuxExtClk234

SAI Clock from External Clock2, External Clock3, External Clock4.

enum _clock_rootmux_noc_clk_sel

Root clock select enumeration for NOC CLK.

Values:

enumerator kCLOCK_NocRootmuxOsc25m

NOC Clock from OSC 25M.

enumerator kCLOCK_NocRootmuxSysPll1

NOC Clock from SYSTEM PLL1.

enumerator kCLOCK_NocRootmuxSysPll3

NOC Clock from SYSTEM PLL3.

enumerator kCLOCK_NocRootmuxSysPll2

NOC Clock from SYSTEM PLL2.

enumerator kCLOCK_NocRootmuxSysPll2Div2

NOC Clock from SYSTEM PLL2 divided by 2.

enumerator kCLOCK_NocRootmuxAudioPll1

NOC Clock from AUDIO PLL1.

enumerator kCLOCK_NocRootmuxVideoPll1

NOC Clock from VIDEO PLL1.

enumerator kCLOCK_NocRootmuxAudioPll2

NOC Clock from AUDIO PLL2.

enum _clock_pll_gate

CCM PLL gate control.

Values:

enumerator kCLOCK_ArmPllGate

ARM PLL Gate.

enumerator kCLOCK_GpuPllGate

GPU PLL Gate.

enumerator kCLOCK_VpuPllGate

VPU PLL Gate.

enumerator kCLOCK_DramPllGate

DRAM PLL1 Gate.

enumerator kCLOCK_SysPll1Gate

SYSTEM PLL1 Gate.

enumerator kCLOCK_SysPll1Div2Gate

SYSTEM PLL1 Div2 Gate.

enumerator kCLOCK_SysPll1Div3Gate

SYSTEM PLL1 Div3 Gate.

enumerator kCLOCK_SysPll1Div4Gate

SYSTEM PLL1 Div4 Gate.

enumerator kCLOCK_SysPll1Div5Gate

SYSTEM PLL1 Div5 Gate.

enumerator kCLOCK_SysPll1Div6Gate

SYSTEM PLL1 Div6 Gate.

enumerator kCLOCK_SysPll1Div8Gate

SYSTEM PLL1 Div8 Gate.

enumerator kCLOCK_SysPll1Div10Gate

SYSTEM PLL1 Div10 Gate.

enumerator kCLOCK_SysPll1Div20Gate

SYSTEM PLL1 Div20 Gate.

enumerator kCLOCK_SysPll2Gate

SYSTEM PLL2 Gate.

enumerator kCLOCK_SysPll2Div2Gate

SYSTEM PLL2 Div2 Gate.

enumerator kCLOCK_SysPll2Div3Gate

SYSTEM PLL2 Div3 Gate.

enumerator kCLOCK_SysPll2Div4Gate

SYSTEM PLL2 Div4 Gate.

enumerator kCLOCK_SysPll2Div5Gate

SYSTEM PLL2 Div5 Gate.

enumerator kCLOCK_SysPll2Div6Gate

SYSTEM PLL2 Div6 Gate.

enumerator kCLOCK_SysPll2Div8Gate

SYSTEM PLL2 Div8 Gate.

enumerator kCLOCK_SysPll2Div10Gate

SYSTEM PLL2 Div10 Gate.

enumerator kCLOCK_SysPll2Div20Gate

SYSTEM PLL2 Div20 Gate.

enumerator kCLOCK_SysPll3Gate

SYSTEM PLL3 Gate.

enumerator kCLOCK_AudioPll1Gate

AUDIO PLL1 Gate.

enumerator kCLOCK_AudioPll2Gate

AUDIO PLL2 Gate.

enumerator kCLOCK_VideoPll1Gate

VIDEO PLL1 Gate.

enumerator kCLOCK_VideoPll2Gate

VIDEO PLL2 Gate.

enum _clock_gate_value

CCM gate control value.

Values:

enumerator kCLOCK_ClockNotNeeded

Clock always disabled.

enumerator kCLOCK_ClockNeededRun

Clock enabled when CPU is running.

enumerator kCLOCK_ClockNeededRunWait

Clock enabled when CPU is running or in WAIT mode.

enumerator kCLOCK_ClockNeededAll

Clock always enabled.

enum _clock_pll_bypass_ctrl

PLL control names for PLL bypass.

These constants define the PLL control names for PLL bypass.

  • 0:15: REG offset to CCM_ANALOG_BASE in bytes.

  • 16:20: bypass bit shift.

Values:

enumerator kCLOCK_AudioPll1BypassCtrl

CCM Audio PLL1 bypass Control.

enumerator kCLOCK_AudioPll2BypassCtrl

CCM Audio PLL2 bypass Control.

enumerator kCLOCK_VideoPll1BypassCtrl

CCM Video Pll1 bypass Control.

enumerator kCLOCK_GpuPLLPwrBypassCtrl

CCM Gpu PLL bypass Control.

enumerator kCLOCK_VpuPllPwrBypassCtrl

CCM Vpu PLL bypass Control.

enumerator kCLOCK_ArmPllPwrBypassCtrl

CCM Arm PLL bypass Control.

enumerator kCLOCK_SysPll1InternalPll1BypassCtrl

CCM System PLL1 internal pll1 bypass Control.

enumerator kCLOCK_SysPll1InternalPll2BypassCtrl

CCM System PLL1 internal pll2 bypass Control.

enumerator kCLOCK_SysPll2InternalPll1BypassCtrl

CCM Analog System PLL1 internal pll1 bypass Control.

enumerator kCLOCK_SysPll2InternalPll2BypassCtrl

CCM Analog VIDEO System PLL1 internal pll1 bypass Control.

enumerator kCLOCK_SysPll3InternalPll1BypassCtrl

CCM Analog VIDEO PLL bypass Control.

enumerator kCLOCK_SysPll3InternalPll2BypassCtrl

CCM Analog VIDEO PLL bypass Control.

enumerator kCLOCK_VideoPll2InternalPll1BypassCtrl

CCM Analog 480M PLL bypass Control.

enumerator kCLOCK_VideoPll2InternalPll2BypassCtrl

CCM Analog 480M PLL bypass Control.

enumerator kCLOCK_DramPllInternalPll1BypassCtrl

CCM Analog 480M PLL bypass Control.

enumerator kCLOCK_DramPllInternalPll2BypassCtrl

CCM Analog 480M PLL bypass Control.

enum _ccm_analog_pll_clke

PLL clock names for clock enable/disable settings.

These constants define the PLL clock names for PLL clock enable/disable operations.

  • 0:15: REG offset to CCM_ANALOG_BASE in bytes.

  • 16:20: Clock enable bit shift.

Values:

enumerator kCLOCK_AudioPll1Clke

Audio pll1 clke

enumerator kCLOCK_AudioPll2Clke

Audio pll2 clke

enumerator kCLOCK_VideoPll1Clke

Video pll1 clke

enumerator kCLOCK_GpuPllClke

Gpu pll clke

enumerator kCLOCK_VpuPllClke

Vpu pll clke

enumerator kCLOCK_ArmPllClke

Arm pll clke

enumerator kCLOCK_SystemPll1Clke

System pll1 clke

enumerator kCLOCK_SystemPll1Div2Clke

System pll1 Div2 clke

enumerator kCLOCK_SystemPll1Div3Clke

System pll1 Div3 clke

enumerator kCLOCK_SystemPll1Div4Clke

System pll1 Div4 clke

enumerator kCLOCK_SystemPll1Div5Clke

System pll1 Div5 clke

enumerator kCLOCK_SystemPll1Div6Clke

System pll1 Div6 clke

enumerator kCLOCK_SystemPll1Div8Clke

System pll1 Div8 clke

enumerator kCLOCK_SystemPll1Div10Clke

System pll1 Div10 clke

enumerator kCLOCK_SystemPll1Div20Clke

System pll1 Div20 clke

enumerator kCLOCK_SystemPll2Clke

System pll2 clke

enumerator kCLOCK_SystemPll2Div2Clke

System pll2 Div2 clke

enumerator kCLOCK_SystemPll2Div3Clke

System pll2 Div3 clke

enumerator kCLOCK_SystemPll2Div4Clke

System pll2 Div4 clke

enumerator kCLOCK_SystemPll2Div5Clke

System pll2 Div5 clke

enumerator kCLOCK_SystemPll2Div6Clke

System pll2 Div6 clke

enumerator kCLOCK_SystemPll2Div8Clke

System pll2 Div8 clke

enumerator kCLOCK_SystemPll2Div10Clke

System pll2 Div10 clke

enumerator kCLOCK_SystemPll2Div20Clke

System pll2 Div20 clke

enumerator kCLOCK_SystemPll3Clke

System pll3 clke

enumerator kCLOCK_VideoPll2Clke

Video pll2 clke

enumerator kCLOCK_DramPllClke

Dram pll clke

enumerator kCLOCK_OSC25MClke

OSC25M clke

enumerator kCLOCK_OSC27MClke

OSC27M clke

enum _clock_pll_ctrl

ANALOG Power down override control.

Values:

enumerator kCLOCK_AudioPll1Ctrl
enumerator kCLOCK_AudioPll2Ctrl
enumerator kCLOCK_VideoPll1Ctrl
enumerator kCLOCK_GpuPllCtrl
enumerator kCLOCK_VpuPllCtrl
enumerator kCLOCK_ArmPllCtrl
enumerator kCLOCK_SystemPll1Ctrl
enumerator kCLOCK_SystemPll2Ctrl
enumerator kCLOCK_SystemPll3Ctrl
enumerator kCLOCK_VideoPll2Ctrl
enumerator kCLOCK_DramPllCtrl
enum _osc_mode

OSC work mode.

Values:

enumerator kOSC_OscMode

OSC oscillator mode

enumerator kOSC_ExtMode

OSC external mode

enum _osc32_src

OSC 32K input select.

Values:

enumerator kOSC32_Src25MDiv800

source from 25M divide 800

enumerator kOSC32_SrcRTC

source from RTC

enum _ccm_analog_pll_ref_clk

PLL reference clock select.

Values:

enumerator kANALOG_PllRefOsc25M

reference OSC 25M

enumerator kANALOG_PllRefOsc27M

reference OSC 27M

enumerator kANALOG_PllRefOscHdmiPhy27M

reference HDMI PHY 27M

enumerator kANALOG_PllRefClkPN

reference CLK_P_N

typedef enum _clock_name clock_name_t

Clock name used to get clock frequency.

typedef enum _clock_ip_name clock_ip_name_t

CCM CCGR gate control.

typedef enum _clock_root_control clock_root_control_t

ccm root name used to get clock frequency.

typedef enum _clock_root clock_root_t

ccm clock root used to get clock frequency.

typedef enum _clock_rootmux_m4_clk_sel clock_rootmux_m4_clk_sel_t

Root clock select enumeration for ARM Cortex-M4 core.

typedef enum _clock_rootmux_axi_clk_sel clock_rootmux_axi_clk_sel_t

Root clock select enumeration for AXI bus.

typedef enum _clock_rootmux_ahb_clk_sel clock_rootmux_ahb_clk_sel_t

Root clock select enumeration for AHB bus.

typedef enum _clock_rootmux_qspi_clk_sel clock_rootmux_qspi_clk_sel_t

Root clock select enumeration for QSPI peripheral.

typedef enum _clock_rootmux_ecspi_clk_sel clock_rootmux_ecspi_clk_sel_t

Root clock select enumeration for ECSPI peripheral.

typedef enum _clock_rootmux_i2c_clk_sel clock_rootmux_i2c_clk_sel_t

Root clock select enumeration for I2C peripheral.

typedef enum _clock_rootmux_uart_clk_sel clock_rootmux_uart_clk_sel_t

Root clock select enumeration for UART peripheral.

typedef enum _clock_rootmux_gpt clock_rootmux_gpt_t

Root clock select enumeration for GPT peripheral.

typedef enum _clock_rootmux_wdog_clk_sel clock_rootmux_wdog_clk_sel_t

Root clock select enumeration for WDOG peripheral.

typedef enum _clock_rootmux_pwm_clk_sel clock_rootmux_Pwm_clk_sel_t

Root clock select enumeration for PWM peripheral.

typedef enum _clock_rootmux_sai_clk_sel clock_rootmux_sai_clk_sel_t

Root clock select enumeration for SAI peripheral.

typedef enum _clock_rootmux_noc_clk_sel clock_rootmux_noc_clk_sel_t

Root clock select enumeration for NOC CLK.

typedef enum _clock_pll_gate clock_pll_gate_t

CCM PLL gate control.

typedef enum _clock_gate_value clock_gate_value_t

CCM gate control value.

typedef enum _clock_pll_bypass_ctrl clock_pll_bypass_ctrl_t

PLL control names for PLL bypass.

These constants define the PLL control names for PLL bypass.

  • 0:15: REG offset to CCM_ANALOG_BASE in bytes.

  • 16:20: bypass bit shift.

typedef enum _ccm_analog_pll_clke clock_pll_clke_t

PLL clock names for clock enable/disable settings.

These constants define the PLL clock names for PLL clock enable/disable operations.

  • 0:15: REG offset to CCM_ANALOG_BASE in bytes.

  • 16:20: Clock enable bit shift.

typedef enum _clock_pll_ctrl clock_pll_ctrl_t

ANALOG Power down override control.

typedef enum _osc32_src osc32_src_t

OSC 32K input select.

typedef struct _osc_config osc_config_t

OSC configuration structure.

typedef struct _ccm_analog_frac_pll_config ccm_analog_frac_pll_config_t

Fractional-N PLL configuration. Note: all the dividers in this configuration structure are the actually divider, software will map it to register value.

typedef struct _ccm_analog_sscg_pll_config ccm_analog_sscg_pll_config_t

SSCG PLL configuration. Note: all the dividers in this configuration structure are the actually divider, software will map it to register value.

FSL_CLOCK_DRIVER_VERSION

CLOCK driver version 2.4.1.

SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY
OSC25M_CLK_FREQ

XTAL 25M clock frequency.

OSC27M_CLK_FREQ

XTAL 27M clock frequency.

HDMI_PHY_27M_FREQ

HDMI PHY 27M clock frequency.

CLKPN_FREQ

clock1PN frequency.

ECSPI_CLOCKS

Clock ip name array for ECSPI.

GPIO_CLOCKS

Clock ip name array for GPIO.

GPT_CLOCKS

Clock ip name array for GPT.

I2C_CLOCKS

Clock ip name array for I2C.

IOMUX_CLOCKS

Clock ip name array for IOMUX.

IPMUX_CLOCKS

Clock ip name array for IPMUX.

PWM_CLOCKS

Clock ip name array for PWM.

RDC_CLOCKS

Clock ip name array for RDC.

SAI_CLOCKS

Clock ip name array for SAI.

RDC_SEMA42_CLOCKS

Clock ip name array for RDC SEMA42.

UART_CLOCKS

Clock ip name array for UART.

USDHC_CLOCKS

Clock ip name array for USDHC.

WDOG_CLOCKS

Clock ip name array for WDOG.

TMU_CLOCKS

Clock ip name array for TEMPSENSOR.

SDMA_CLOCKS

Clock ip name array for SDMA.

MU_CLOCKS

Clock ip name array for MU.

QSPI_CLOCKS

Clock ip name array for QSPI.

CCM_BIT_FIELD_EXTRACTION(val, mask, shift)

CCM reg macros to extract corresponding registers bit field.

CCM_REG_OFF(root, off)

CCM reg macros to map corresponding registers.

CCM_REG(root)
CCM_REG_SET(root)
CCM_REG_CLR(root)
AUDIO_PLL1_CFG0_OFFSET

CCM Analog registers offset.

AUDIO_PLL2_CFG0_OFFSET
VIDEO_PLL1_CFG0_OFFSET
GPU_PLL_CFG0_OFFSET
VPU_PLL_CFG0_OFFSET
ARM_PLL_CFG0_OFFSET
SYS_PLL1_CFG0_OFFSET
SYS_PLL2_CFG0_OFFSET
SYS_PLL3_CFG0_OFFSET
VIDEO_PLL2_CFG0_OFFSET
DRAM_PLL_CFG0_OFFSET
OSC_MISC_CFG_OFFSET
CCM_ANALOG_TUPLE(reg, shift)

CCM ANALOG tuple macros to map corresponding registers and bit fields.

CCM_ANALOG_TUPLE_SHIFT(tuple)
CCM_ANALOG_TUPLE_REG_OFF(base, tuple, off)
CCM_ANALOG_TUPLE_REG(base, tuple)
CCM_TUPLE(ccgr, root)

CCM CCGR and root tuple.

CCM_TUPLE_CCGR(tuple)
CCM_TUPLE_ROOT(tuple)
CLOCK_ROOT_SOURCE

clock root source

CLOCK_ROOT_CONTROL_TUPLE
kCLOCK_CoreSysClk

For compatible with other platforms without CCM.

CLOCK_GetCoreSysClkFreq

For compatible with other platforms without CCM.

static inline void CLOCK_SetRootMux(clock_root_control_t rootClk, uint32_t mux)

Set clock root mux. User maybe need to set more than one mux ROOT according to the clock tree description in the reference manual.

Parameters:
  • rootClk – Root clock control (see clock_root_control_t enumeration).

  • mux – Root mux value (see _ccm_rootmux_xxx enumeration).

static inline uint32_t CLOCK_GetRootMux(clock_root_control_t rootClk)

Get clock root mux. In order to get the clock source of root, user maybe need to get more than one ROOT’s mux value to obtain the final clock source of root.

Parameters:
  • rootClk – Root clock control (see clock_root_control_t enumeration).

Returns:

Root mux value (see _ccm_rootmux_xxx enumeration).

static inline void CLOCK_EnableRoot(clock_root_control_t rootClk)

Enable clock root.

Parameters:
  • rootClk – Root clock control (see clock_root_control_t enumeration)

static inline void CLOCK_DisableRoot(clock_root_control_t rootClk)

Disable clock root.

Parameters:
  • rootClk – Root control (see clock_root_control_t enumeration)

static inline bool CLOCK_IsRootEnabled(clock_root_control_t rootClk)

Check whether clock root is enabled.

Parameters:
  • rootClk – Root control (see clock_root_control_t enumeration)

Returns:

CCM root enabled or not.

  • true: Clock root is enabled.

  • false: Clock root is disabled.

void CLOCK_UpdateRoot(clock_root_control_t ccmRootClk, uint32_t mux, uint32_t pre, uint32_t post)

Update clock root in one step, for dynamical clock switching Note: The PRE and POST dividers in this function are the actually divider, software will map it to register value.

Parameters:
  • ccmRootClk – Root control (see clock_root_control_t enumeration)

  • mux – root mux value (see _ccm_rootmux_xxx enumeration)

  • pre – Pre divider value (0-7, divider=n+1)

  • post – Post divider value (0-63, divider=n+1)

void CLOCK_SetRootDivider(clock_root_control_t ccmRootClk, uint32_t pre, uint32_t post)

Set root clock divider Note: The PRE and POST dividers in this function are the actually divider, software will map it to register value.

Parameters:
  • ccmRootClk – Root control (see clock_root_control_t enumeration)

  • pre – Pre divider value (1-8)

  • post – Post divider value (1-64)

static inline uint32_t CLOCK_GetRootPreDivider(clock_root_control_t rootClk)

Get clock root PRE_PODF. In order to get the clock source of root, user maybe need to get more than one ROOT’s mux value to obtain the final clock source of root.

Parameters:
  • rootClk – Root clock name (see clock_root_control_t enumeration).

Returns:

Root Pre divider value.

static inline uint32_t CLOCK_GetRootPostDivider(clock_root_control_t rootClk)

Get clock root POST_PODF. In order to get the clock source of root, user maybe need to get more than one ROOT’s mux value to obtain the final clock source of root.

Parameters:
  • rootClk – Root clock name (see clock_root_control_t enumeration).

Returns:

Root Post divider value.

void CLOCK_InitOSC25M(const osc_config_t *config)

OSC25M init.

Parameters:
  • config – osc configuration.

void CLOCK_DeinitOSC25M(void)

OSC25M deinit.

void CLOCK_InitOSC27M(const osc_config_t *config)

OSC27M init.

Parameters:
  • config – osc configuration.

void CLOCK_DeinitOSC27M(void)

OSC27M deinit.

static inline void CLOCK_SwitchOSC32Src(osc32_src_t sel)

switch 32KHZ OSC input

Parameters:
  • sel – OSC32 input clock select

static inline void CLOCK_ControlGate(uint32_t ccmGate, clock_gate_value_t control)

Set PLL or CCGR gate control.

Parameters:
  • ccmGate – Gate control (see clock_pll_gate_t and clock_ip_name_t enumeration)

  • control – Gate control value (see clock_gate_value_t)

void CLOCK_EnableClock(clock_ip_name_t ccmGate)

Enable CCGR clock gate and root clock gate for each module User should set specific gate for each module according to the description of the table of system clocks, gating and override in CCM chapter of reference manual. Take care of that one module may need to set more than one clock gate.

Parameters:
  • ccmGate – Gate control for each module (see clock_ip_name_t enumeration).

void CLOCK_DisableClock(clock_ip_name_t ccmGate)

Disable CCGR clock gate for the each module User should set specific gate for each module according to the description of the table of system clocks, gating and override in CCM chapter of reference manual. Take care of that one module may need to set more than one clock gate.

Parameters:
  • ccmGate – Gate control for each module (see clock_ip_name_t enumeration).

static inline void CLOCK_PowerUpPll(CCM_ANALOG_Type *base, clock_pll_ctrl_t pllControl)

Power up PLL.

Parameters:
  • base – CCM_ANALOG base pointer.

  • pllControl – PLL control name (see clock_pll_ctrl_t enumeration)

static inline void CLOCK_PowerDownPll(CCM_ANALOG_Type *base, clock_pll_ctrl_t pllControl)

Power down PLL.

Parameters:
  • base – CCM_ANALOG base pointer.

  • pllControl – PLL control name (see clock_pll_ctrl_t enumeration)

static inline void CLOCK_SetPllBypass(CCM_ANALOG_Type *base, clock_pll_bypass_ctrl_t pllControl, bool bypass)

PLL bypass setting.

Parameters:
  • base – CCM_ANALOG base pointer.

  • pllControl – PLL control name (see ccm_analog_pll_control_t enumeration)

  • bypass – Bypass the PLL.

    • true: Bypass the PLL.

    • false: Do not bypass the PLL.

static inline bool CLOCK_IsPllBypassed(CCM_ANALOG_Type *base, clock_pll_bypass_ctrl_t pllControl)

Check if PLL is bypassed.

Parameters:
  • base – CCM_ANALOG base pointer.

  • pllControl – PLL control name (see ccm_analog_pll_control_t enumeration)

Returns:

PLL bypass status.

  • true: The PLL is bypassed.

  • false: The PLL is not bypassed.

static inline bool CLOCK_IsPllLocked(CCM_ANALOG_Type *base, clock_pll_ctrl_t pllControl)

Check if PLL clock is locked.

Parameters:
  • base – CCM_ANALOG base pointer.

  • pllControl – PLL control name (see clock_pll_ctrl_t enumeration)

Returns:

PLL lock status.

  • true: The PLL clock is locked.

  • false: The PLL clock is not locked.

static inline void CLOCK_EnableAnalogClock(CCM_ANALOG_Type *base, clock_pll_clke_t pllClock)

Enable PLL clock.

Parameters:
  • base – CCM_ANALOG base pointer.

  • pllClock – PLL clock name (see ccm_analog_pll_clock_t enumeration)

static inline void CLOCK_DisableAnalogClock(CCM_ANALOG_Type *base, clock_pll_clke_t pllClock)

Disable PLL clock.

Parameters:
  • base – CCM_ANALOG base pointer.

  • pllClock – PLL clock name (see ccm_analog_pll_clock_t enumeration)

static inline void CLOCK_OverrideAnalogClke(CCM_ANALOG_Type *base, clock_pll_clke_t ovClock, bool override)

Override PLL clock output enable.

Parameters:
  • base – CCM_ANALOG base pointer.

  • ovClock – PLL clock name (see clock_pll_clke_t enumeration)

  • override – Override the PLL.

    • true: Override the PLL clke, CCM will handle it.

    • false: Do not override the PLL clke.

static inline void CLOCK_OverridePllPd(CCM_ANALOG_Type *base, clock_pll_ctrl_t pdClock, bool override)

Override PLL power down.

Parameters:
  • base – CCM_ANALOG base pointer.

  • pdClock – PLL clock name (see clock_pll_ctrl_t enumeration)

  • override – Override the PLL.

    • true: Override the PLL clke, CCM will handle it.

    • false: Do not override the PLL clke.

void CLOCK_InitArmPll(const ccm_analog_frac_pll_config_t *config)

Initializes the ANALOG ARM PLL.

Note

This function can’t detect whether the Arm PLL has been enabled and used by some IPs.

Parameters:
  • config – Pointer to the configuration structure(see ccm_analog_frac_pll_config_t enumeration).

void CLOCK_DeinitArmPll(void)

De-initialize the ARM PLL.

void CLOCK_InitSysPll1(const ccm_analog_sscg_pll_config_t *config)

Initializes the ANALOG SYS PLL1.

Note

This function can’t detect whether the SYS PLL has been enabled and used by some IPs.

Parameters:
  • config – Pointer to the configuration structure(see ccm_analog_sscg_pll_config_t enumeration).

void CLOCK_DeinitSysPll1(void)

De-initialize the System PLL1.

void CLOCK_InitSysPll2(const ccm_analog_sscg_pll_config_t *config)

Initializes the ANALOG SYS PLL2.

Note

This function can’t detect whether the SYS PLL has been enabled and used by some IPs.

Parameters:
  • config – Pointer to the configuration structure(see ccm_analog_sscg_pll_config_t enumeration).

void CLOCK_DeinitSysPll2(void)

De-initialize the System PLL2.

void CLOCK_InitSysPll3(const ccm_analog_sscg_pll_config_t *config)

Initializes the ANALOG SYS PLL3.

Note

This function can’t detect whether the SYS PLL has been enabled and used by some IPs.

Parameters:
  • config – Pointer to the configuration structure(see ccm_analog_sscg_pll_config_t enumeration).

void CLOCK_DeinitSysPll3(void)

De-initialize the System PLL3.

void CLOCK_InitDramPll(const ccm_analog_sscg_pll_config_t *config)

Initializes the ANALOG DDR PLL.

Note

This function can’t detect whether the DDR PLL has been enabled and used by some IPs.

Parameters:
  • config – Pointer to the configuration structure(see ccm_analog_sscg_pll_config_t enumeration).

void CLOCK_DeinitDramPll(void)

De-initialize the Dram PLL.

void CLOCK_InitAudioPll1(const ccm_analog_frac_pll_config_t *config)

Initializes the ANALOG AUDIO PLL1.

Note

This function can’t detect whether the AUDIO PLL has been enabled and used by some IPs.

Parameters:
  • config – Pointer to the configuration structure(see ccm_analog_frac_pll_config_t enumeration).

void CLOCK_DeinitAudioPll1(void)

De-initialize the Audio PLL1.

void CLOCK_InitAudioPll2(const ccm_analog_frac_pll_config_t *config)

Initializes the ANALOG AUDIO PLL2.

Note

This function can’t detect whether the AUDIO PLL has been enabled and used by some IPs.

Parameters:
  • config – Pointer to the configuration structure(see ccm_analog_frac_pll_config_t enumeration).

void CLOCK_DeinitAudioPll2(void)

De-initialize the Audio PLL2.

void CLOCK_InitVideoPll1(const ccm_analog_frac_pll_config_t *config)

Initializes the ANALOG VIDEO PLL1.

Parameters:
  • config – Pointer to the configuration structure(see ccm_analog_frac_pll_config_t enumeration).

void CLOCK_DeinitVideoPll1(void)

De-initialize the Video PLL1.

void CLOCK_InitVideoPll2(const ccm_analog_sscg_pll_config_t *config)

Initializes the ANALOG VIDEO PLL2.

Note

This function can’t detect whether the VIDEO PLL has been enabled and used by some IPs.

Parameters:
  • config – Pointer to the configuration structure(see ccm_analog_sscg_pll_config_t enumeration).

void CLOCK_DeinitVideoPll2(void)

De-initialize the Video PLL2.

void CLOCK_InitSSCGPll(CCM_ANALOG_Type *base, const ccm_analog_sscg_pll_config_t *config, clock_pll_ctrl_t type)

Initializes the ANALOG SSCG PLL.

Parameters:
  • base – CCM ANALOG base address

  • config – Pointer to the configuration structure(see ccm_analog_sscg_pll_config_t enumeration).

  • type – sscg pll type

uint32_t CLOCK_GetSSCGPllFreq(CCM_ANALOG_Type *base, clock_pll_ctrl_t type, uint32_t refClkFreq, bool pll1Bypass)

Get the ANALOG SSCG PLL clock frequency.

Parameters:
  • base – CCM ANALOG base address.

  • type – sscg pll type

  • refClkFreq – reference clock frequency

  • pll1Bypass – pll1 bypass flag

Returns:

Clock frequency

void CLOCK_InitFracPll(CCM_ANALOG_Type *base, const ccm_analog_frac_pll_config_t *config, clock_pll_ctrl_t type)

Initializes the ANALOG Fractional PLL.

Parameters:
  • base – CCM ANALOG base address.

  • config – Pointer to the configuration structure(see ccm_analog_frac_pll_config_t enumeration).

  • type – fractional pll type.

uint32_t CLOCK_GetFracPllFreq(CCM_ANALOG_Type *base, clock_pll_ctrl_t type, uint32_t refClkFreq)

Gets the ANALOG Fractional PLL clock frequency.

Parameters:
  • base – CCM_ANALOG base pointer.

  • type – fractional pll type.

  • refClkFreq – reference clock frequency

Returns:

Clock frequency

uint32_t CLOCK_GetPllFreq(clock_pll_ctrl_t pll)

Gets PLL clock frequency.

Parameters:
  • pll – fractional pll type.

Returns:

Clock frequency

uint32_t CLOCK_GetPllRefClkFreq(clock_pll_ctrl_t ctrl)

Gets PLL reference clock frequency.

Parameters:
  • ctrl – fractional pll type.

Returns:

Clock frequency

uint32_t CLOCK_GetFreq(clock_name_t clockName)

Gets the clock frequency for a specific clock name.

This function checks the current clock configurations and then calculates the clock frequency for a specific clock name defined in clock_name_t.

Parameters:
  • clockName – Clock names defined in clock_name_t

Returns:

Clock frequency value in hertz

uint32_t CLOCK_GetClockRootFreq(clock_root_t clockRoot)

Gets the frequency of selected clock root.

Parameters:
  • clockRoot – The clock root used to get the frequency, please refer to clock_root_t.

Returns:

The frequency of selected clock root.

uint32_t CLOCK_GetCoreM4Freq(void)

Get the CCM Cortex M4 core frequency.

Returns:

Clock frequency; If the clock is invalid, returns 0.

uint32_t CLOCK_GetAxiFreq(void)

Get the CCM Axi bus frequency.

Returns:

Clock frequency; If the clock is invalid, returns 0.

uint32_t CLOCK_GetAhbFreq(void)

Get the CCM Ahb bus frequency.

Returns:

Clock frequency; If the clock is invalid, returns 0.

uint8_t oscMode

ext or osc mode

uint8_t oscDiv

osc divider

uint8_t refSel

pll reference clock sel

uint8_t refDiv

A 6bit divider to make sure the REF must be within the range 10MHZ~300MHZ

uint32_t fractionDiv

Inlcude fraction divider(divider:1:2^24) output clock range is 2000MHZ-4000MHZ

uint8_t intDiv
uint8_t outDiv

output clock divide, output clock range is 30MHZ to 2000MHZ, must be a even value

uint8_t refSel

pll reference clock sel

uint8_t refDiv1

A 3bit divider to make sure the REF must be within the range 25MHZ~235MHZ ,post_divide REF must be within the range 25MHZ~54MHZ

uint8_t refDiv2

A 6bit divider to make sure the post_divide REF must be within the range 54MHZ~75MHZ

uint32_t loopDivider1

A 6bit internal PLL1 feedback clock divider, output clock range must be within the range 1600MHZ-2400MHZ

uint32_t loopDivider2

A 6bit internal PLL2 feedback clock divider, output clock range must be within the range 1200MHZ-2400MHZ

uint8_t outDiv

A 6bit output clock divide, output clock range is 20MHZ to 1200MHZ

struct _osc_config
#include <fsl_clock.h>

OSC configuration structure.

struct _ccm_analog_frac_pll_config
#include <fsl_clock.h>

Fractional-N PLL configuration. Note: all the dividers in this configuration structure are the actually divider, software will map it to register value.

struct _ccm_analog_sscg_pll_config
#include <fsl_clock.h>

SSCG PLL configuration. Note: all the dividers in this configuration structure are the actually divider, software will map it to register value.

MIPI CSI2 RX: MIPI CSI2 RX Driver

FSL_CSI2RX_DRIVER_VERSION

CSI2RX driver version.

enum _csi2rx_data_lane

CSI2RX data lanes.

Values:

enumerator kCSI2RX_DataLane0

Data lane 0.

enumerator kCSI2RX_DataLane1

Data lane 1.

enumerator kCSI2RX_DataLane2

Data lane 2.

enumerator kCSI2RX_DataLane3

Data lane 3.

enum _csi2rx_payload

CSI2RX payload type.

Values:

enumerator kCSI2RX_PayloadGroup0Null

NULL.

enumerator kCSI2RX_PayloadGroup0Blank

Blank.

enumerator kCSI2RX_PayloadGroup0Embedded

Embedded.

enumerator kCSI2RX_PayloadGroup0YUV420_8Bit

Legacy YUV420 8 bit.

enumerator kCSI2RX_PayloadGroup0YUV422_8Bit

YUV422 8 bit.

enumerator kCSI2RX_PayloadGroup0YUV422_10Bit

YUV422 10 bit.

enumerator kCSI2RX_PayloadGroup0RGB444

RGB444.

enumerator kCSI2RX_PayloadGroup0RGB555

RGB555.

enumerator kCSI2RX_PayloadGroup0RGB565

RGB565.

enumerator kCSI2RX_PayloadGroup0RGB666

RGB666.

enumerator kCSI2RX_PayloadGroup0RGB888

RGB888.

enumerator kCSI2RX_PayloadGroup0Raw6

Raw 6.

enumerator kCSI2RX_PayloadGroup0Raw7

Raw 7.

enumerator kCSI2RX_PayloadGroup0Raw8

Raw 8.

enumerator kCSI2RX_PayloadGroup0Raw10

Raw 10.

enumerator kCSI2RX_PayloadGroup0Raw12

Raw 12.

enumerator kCSI2RX_PayloadGroup0Raw14

Raw 14.

enumerator kCSI2RX_PayloadGroup1UserDefined1

User defined 8-bit data type 1, 0x30.

enumerator kCSI2RX_PayloadGroup1UserDefined2

User defined 8-bit data type 2, 0x31.

enumerator kCSI2RX_PayloadGroup1UserDefined3

User defined 8-bit data type 3, 0x32.

enumerator kCSI2RX_PayloadGroup1UserDefined4

User defined 8-bit data type 4, 0x33.

enumerator kCSI2RX_PayloadGroup1UserDefined5

User defined 8-bit data type 5, 0x34.

enumerator kCSI2RX_PayloadGroup1UserDefined6

User defined 8-bit data type 6, 0x35.

enumerator kCSI2RX_PayloadGroup1UserDefined7

User defined 8-bit data type 7, 0x36.

enumerator kCSI2RX_PayloadGroup1UserDefined8

User defined 8-bit data type 8, 0x37.

enum _csi2rx_bit_error

MIPI CSI2RX bit errors.

Values:

enumerator kCSI2RX_BitErrorEccTwoBit

ECC two bit error has occurred.

enumerator kCSI2RX_BitErrorEccOneBit

ECC one bit error has occurred.

enum _csi2rx_ppi_error

MIPI CSI2RX PPI error types.

Values:

enumerator kCSI2RX_PpiErrorSotHs

CSI2RX DPHY PPI error ErrSotHS.

enumerator kCSI2RX_PpiErrorSotSyncHs

CSI2RX DPHY PPI error ErrSotSync_HS.

enumerator kCSI2RX_PpiErrorEsc

CSI2RX DPHY PPI error ErrEsc.

enumerator kCSI2RX_PpiErrorSyncEsc

CSI2RX DPHY PPI error ErrSyncEsc.

enumerator kCSI2RX_PpiErrorControl

CSI2RX DPHY PPI error ErrControl.

enum _csi2rx_interrupt

MIPI CSI2RX interrupt.

Values:

enumerator kCSI2RX_InterruptCrcError
enumerator kCSI2RX_InterruptEccOneBitError
enumerator kCSI2RX_InterruptEccTwoBitError
enumerator kCSI2RX_InterruptUlpsStatusChange
enumerator kCSI2RX_InterruptErrorSotHs
enumerator kCSI2RX_InterruptErrorSotSyncHs
enumerator kCSI2RX_InterruptErrorEsc
enumerator kCSI2RX_InterruptErrorSyncEsc
enumerator kCSI2RX_InterruptErrorControl
enum _csi2rx_ulps_status

MIPI CSI2RX D-PHY ULPS state.

Values:

enumerator kCSI2RX_ClockLaneUlps

Clock lane is in ULPS state.

enumerator kCSI2RX_DataLane0Ulps

Data lane 0 is in ULPS state.

enumerator kCSI2RX_DataLane1Ulps

Data lane 1 is in ULPS state.

enumerator kCSI2RX_DataLane2Ulps

Data lane 2 is in ULPS state.

enumerator kCSI2RX_DataLane3Ulps

Data lane 3 is in ULPS state.

enumerator kCSI2RX_ClockLaneMark

Clock lane is in mark state.

enumerator kCSI2RX_DataLane0Mark

Data lane 0 is in mark state.

enumerator kCSI2RX_DataLane1Mark

Data lane 1 is in mark state.

enumerator kCSI2RX_DataLane2Mark

Data lane 2 is in mark state.

enumerator kCSI2RX_DataLane3Mark

Data lane 3 is in mark state.

typedef struct _csi2rx_config csi2rx_config_t

CSI2RX configuration.

typedef enum _csi2rx_ppi_error csi2rx_ppi_error_t

MIPI CSI2RX PPI error types.

void CSI2RX_Init(MIPI_CSI2RX_Type *base, const csi2rx_config_t *config)

Enables and configures the CSI2RX peripheral module.

Parameters:
  • base – CSI2RX peripheral address.

  • config – CSI2RX module configuration structure.

void CSI2RX_Deinit(MIPI_CSI2RX_Type *base)

Disables the CSI2RX peripheral module.

Parameters:
  • base – CSI2RX peripheral address.

static inline uint32_t CSI2RX_GetBitError(MIPI_CSI2RX_Type *base)

Gets the MIPI CSI2RX bit error status.

This function gets the RX bit error status, the return value could be compared with _csi2rx_bit_error. If one bit ECC error detected, the return value could be passed to the function CSI2RX_GetEccBitErrorPosition to get the position of the ECC error bit.

Example:

uint32_t bitError;
uint32_t bitErrorPosition;

bitError = CSI2RX_GetBitError(MIPI_CSI2RX);

if (kCSI2RX_BitErrorEccTwoBit & bitError)
{
    Two bits error;
}
else if (kCSI2RX_BitErrorEccOneBit & bitError)
{
    One bits error;
    bitErrorPosition = CSI2RX_GetEccBitErrorPosition(bitError);
}

Parameters:
  • base – CSI2RX peripheral address.

Returns:

The RX bit error status.

static inline uint32_t CSI2RX_GetEccBitErrorPosition(uint32_t bitError)

Get ECC one bit error bit position.

If CSI2RX_GetBitError detects ECC one bit error, this function could extract the error bit position from the return value of CSI2RX_GetBitError.

Parameters:
  • bitError – The bit error returned by CSI2RX_GetBitError.

Returns:

The position of error bit.

static inline uint32_t CSI2RX_GetUlpsStatus(MIPI_CSI2RX_Type *base)

Gets the MIPI CSI2RX D-PHY ULPS status.

Example to check whether data lane 0 is in ULPS status.

uint32_t status = CSI2RX_GetUlpsStatus(MIPI_CSI2RX);

if (kCSI2RX_DataLane0Ulps & status)
{
    Data lane 0 is in ULPS status.
}

Parameters:
  • base – CSI2RX peripheral address.

Returns:

The MIPI CSI2RX D-PHY ULPS status, it is OR’ed value or _csi2rx_ulps_status.

static inline uint32_t CSI2RX_GetPpiErrorDataLanes(MIPI_CSI2RX_Type *base, csi2rx_ppi_error_t errorType)

Gets the MIPI CSI2RX D-PHY PPI error lanes.

This function checks the PPI error occurred on which data lanes, the returned value is OR’ed value of csi2rx_ppi_error_t. For example, if the ErrSotHS is detected, to check the ErrSotHS occurred on which data lanes, use like this:

uint32_t errorDataLanes = CSI2RX_GetPpiErrorDataLanes(MIPI_CSI2RX, kCSI2RX_PpiErrorSotHs);

if (kCSI2RX_DataLane0 & errorDataLanes)
{
    ErrSotHS occurred on data lane 0.
}

if (kCSI2RX_DataLane1 & errorDataLanes)
{
    ErrSotHS occurred on data lane 1.
}
Parameters:
  • base – CSI2RX peripheral address.

  • errorType – What kind of error to check.

Returns:

The data lane mask that error errorType occurred.

static inline void CSI2RX_EnableInterrupts(MIPI_CSI2RX_Type *base, uint32_t mask)

Enable the MIPI CSI2RX interrupts.

This function enables the MIPI CSI2RX interrupts. The interrupts to enable are passed in as an OR’ed value of _csi2rx_interrupt. For example, to enable one bit and two bit ECC error interrupts, use like this:

CSI2RX_EnableInterrupts(MIPI_CSI2RX, kCSI2RX_InterruptEccOneBitError | kCSI2RX_InterruptEccTwoBitError);
Parameters:
  • base – CSI2RX peripheral address.

  • mask – OR’ed value of _csi2rx_interrupt.

static inline void CSI2RX_DisableInterrupts(MIPI_CSI2RX_Type *base, uint32_t mask)

Disable the MIPI CSI2RX interrupts.

This function disables the MIPI CSI2RX interrupts. The interrupts to disable are passed in as an OR’ed value of _csi2rx_interrupt. For example, to disable one bit and two bit ECC error interrupts, use like this:

CSI2RX_DisableInterrupts(MIPI_CSI2RX, kCSI2RX_InterruptEccOneBitError | kCSI2RX_InterruptEccTwoBitError);
Parameters:
  • base – CSI2RX peripheral address.

  • mask – OR’ed value of _csi2rx_interrupt.

static inline uint32_t CSI2RX_GetInterruptStatus(MIPI_CSI2RX_Type *base)

Get the MIPI CSI2RX interrupt status.

This function returns the MIPI CSI2RX interrupts status as an OR’ed value of _csi2rx_interrupt.

Parameters:
  • base – CSI2RX peripheral address.

Returns:

OR’ed value of _csi2rx_interrupt.

CSI2RX_REG_CFG_NUM_LANES(base)
CSI2RX_REG_CFG_DISABLE_DATA_LANES(base)
CSI2RX_REG_BIT_ERR(base)
CSI2RX_REG_IRQ_STATUS(base)
CSI2RX_REG_IRQ_MASK(base)
CSI2RX_REG_ULPS_STATUS(base)
CSI2RX_REG_PPI_ERRSOT_HS(base)
CSI2RX_REG_PPI_ERRSOTSYNC_HS(base)
CSI2RX_REG_PPI_ERRESC(base)
CSI2RX_REG_PPI_ERRSYNCESC(base)
CSI2RX_REG_PPI_ERRCONTROL(base)
CSI2RX_REG_CFG_DISABLE_PAYLOAD_0(base)
CSI2RX_REG_CFG_DISABLE_PAYLOAD_1(base)
CSI2RX_REG_CFG_IGNORE_VC(base)
CSI2RX_REG_CFG_VID_VC(base)
CSI2RX_REG_CFG_VID_P_FIFO_SEND_LEVEL(base)
CSI2RX_REG_CFG_VID_VSYNC(base)
CSI2RX_REG_CFG_VID_HSYNC_FP(base)
CSI2RX_REG_CFG_VID_HSYNC(base)
CSI2RX_REG_CFG_VID_HSYNC_BP(base)
MIPI_CSI2RX_CSI2RX_CFG_NUM_LANES_csi2rx_cfg_num_lanes_MASK
MIPI_CSI2RX_CSI2RX_IRQ_MASK_csi2rx_irq_mask_MASK
struct _csi2rx_config
#include <fsl_mipi_csi2rx.h>

CSI2RX configuration.

Public Members

uint8_t laneNum

Number of active lanes used for receiving data.

uint8_t tHsSettle_EscClk

Number of rx_clk_esc clock periods for T_HS_SETTLE. The T_HS_SETTLE should be in the range of 85ns + 6UI to 145ns + 10UI.

ECSPI: Enhanced Configurable Serial Peripheral Interface Driver

ECSPI Driver

void ECSPI_MasterGetDefaultConfig(ecspi_master_config_t *config)

Sets the ECSPI configuration structure to default values.

The purpose of this API is to get the configuration structure initialized for use in ECSPI_MasterInit(). User may use the initialized structure unchanged in ECSPI_MasterInit, or modify some fields of the structure before calling ECSPI_MasterInit. After calling this API, the master is ready to transfer. Example:

ecspi_master_config_t config;
ECSPI_MasterGetDefaultConfig(&config);

Parameters:
  • config – pointer to config structure

void ECSPI_MasterInit(ECSPI_Type *base, const ecspi_master_config_t *config, uint32_t srcClock_Hz)

Initializes the ECSPI with configuration.

The configuration structure can be filled by user from scratch, or be set with default values by ECSPI_MasterGetDefaultConfig(). After calling this API, the slave is ready to transfer. Example

ecspi_master_config_t config = {
.baudRate_Bps = 400000,
...
};
ECSPI_MasterInit(ECSPI0, &config);

Parameters:
  • base – ECSPI base pointer

  • config – pointer to master configuration structure

  • srcClock_Hz – Source clock frequency.

void ECSPI_SlaveGetDefaultConfig(ecspi_slave_config_t *config)

Sets the ECSPI configuration structure to default values.

The purpose of this API is to get the configuration structure initialized for use in ECSPI_SlaveInit(). User may use the initialized structure unchanged in ECSPI_SlaveInit(), or modify some fields of the structure before calling ECSPI_SlaveInit(). After calling this API, the master is ready to transfer. Example:

ecspi_Slaveconfig_t config;
ECSPI_SlaveGetDefaultConfig(&config);

Parameters:
  • config – pointer to config structure

void ECSPI_SlaveInit(ECSPI_Type *base, const ecspi_slave_config_t *config)

Initializes the ECSPI with configuration.

The configuration structure can be filled by user from scratch, or be set with default values by ECSPI_SlaveGetDefaultConfig(). After calling this API, the slave is ready to transfer. Example

ecspi_Salveconfig_t config = {
.baudRate_Bps = 400000,
...
};
ECSPI_SlaveInit(ECSPI1, &config);

Parameters:
  • base – ECSPI base pointer

  • config – pointer to master configuration structure

void ECSPI_Deinit(ECSPI_Type *base)

De-initializes the ECSPI.

Calling this API resets the ECSPI module, gates the ECSPI clock. The ECSPI module can’t work unless calling the ECSPI_MasterInit/ECSPI_SlaveInit to initialize module.

Parameters:
  • base – ECSPI base pointer

static inline void ECSPI_Enable(ECSPI_Type *base, bool enable)

Enables or disables the ECSPI.

Parameters:
  • base – ECSPI base pointer

  • enable – pass true to enable module, false to disable module

static inline uint32_t ECSPI_GetStatusFlags(ECSPI_Type *base)

Gets the status flag.

Parameters:
  • base – ECSPI base pointer

Returns:

ECSPI Status, use status flag to AND _ecspi_flags could get the related status.

static inline void ECSPI_ClearStatusFlags(ECSPI_Type *base, uint32_t mask)

Clear the status flag.

Parameters:
  • base – ECSPI base pointer

  • mask – ECSPI Status, use status flag to AND _ecspi_flags could get the related status.

static inline void ECSPI_EnableInterrupts(ECSPI_Type *base, uint32_t mask)

Enables the interrupt for the ECSPI.

Parameters:
  • base – ECSPI base pointer

  • mask – ECSPI interrupt source. The parameter can be any combination of the following values:

    • kECSPI_TxfifoEmptyInterruptEnable

    • kECSPI_TxFifoDataRequstInterruptEnable

    • kECSPI_TxFifoFullInterruptEnable

    • kECSPI_RxFifoReadyInterruptEnable

    • kECSPI_RxFifoDataRequstInterruptEnable

    • kECSPI_RxFifoFullInterruptEnable

    • kECSPI_RxFifoOverFlowInterruptEnable

    • kECSPI_TransferCompleteInterruptEnable

    • kECSPI_AllInterruptEnable

static inline void ECSPI_DisableInterrupts(ECSPI_Type *base, uint32_t mask)

Disables the interrupt for the ECSPI.

Parameters:
  • base – ECSPI base pointer

  • mask – ECSPI interrupt source. The parameter can be any combination of the following values:

    • kECSPI_TxfifoEmptyInterruptEnable

    • kECSPI_TxFifoDataRequstInterruptEnable

    • kECSPI_TxFifoFullInterruptEnable

    • kECSPI_RxFifoReadyInterruptEnable

    • kECSPI_RxFifoDataRequstInterruptEnable

    • kECSPI_RxFifoFullInterruptEnable

    • kECSPI_RxFifoOverFlowInterruptEnable

    • kECSPI_TransferCompleteInterruptEnable

    • kECSPI_AllInterruptEnable

static inline void ECSPI_SoftwareReset(ECSPI_Type *base)

Software reset.

Parameters:
  • base – ECSPI base pointer

static inline bool ECSPI_IsMaster(ECSPI_Type *base, ecspi_channel_source_t channel)

Mode check.

Parameters:
  • base – ECSPI base pointer

  • channel – ECSPI channel source

Returns:

mode of channel

static inline void ECSPI_EnableDMA(ECSPI_Type *base, uint32_t mask, bool enable)

Enables the DMA source for ECSPI.

Parameters:
  • base – ECSPI base pointer

  • mask – ECSPI DMA source. The parameter can be any of the following values:

    • kECSPI_TxDmaEnable

    • kECSPI_RxDmaEnable

    • kECSPI_DmaAllEnable

  • enable – True means enable DMA, false means disable DMA

static inline uint8_t ECSPI_GetTxFifoCount(ECSPI_Type *base)

Get the Tx FIFO data count.

Parameters:
  • base – ECSPI base pointer.

Returns:

the number of words in Tx FIFO buffer.

static inline uint8_t ECSPI_GetRxFifoCount(ECSPI_Type *base)

Get the Rx FIFO data count.

Parameters:
  • base – ECSPI base pointer.

Returns:

the number of words in Rx FIFO buffer.

static inline void ECSPI_SetChannelSelect(ECSPI_Type *base, ecspi_channel_source_t channel)

Set channel select for transfer.

Parameters:
  • base – ECSPI base pointer

  • channel – Channel source.

void ECSPI_SetChannelConfig(ECSPI_Type *base, ecspi_channel_source_t channel, const ecspi_channel_config_t *config)

Set channel select configuration for transfer.

The purpose of this API is to set the channel will be use to transfer. User may use this API after instance has been initialized or before transfer start. The configuration structure ecspi_channel_config can be filled by user from scratch. After calling this API, user can select this channel as transfer channel.

Parameters:
  • base – ECSPI base pointer

  • channel – Channel source.

  • config – Configuration struct of channel

void ECSPI_SetBaudRate(ECSPI_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz)

Sets the baud rate for ECSPI transfer. This is only used in master.

Parameters:
  • base – ECSPI base pointer

  • baudRate_Bps – baud rate needed in Hz.

  • srcClock_Hz – ECSPI source clock frequency in Hz.

status_t ECSPI_WriteBlocking(ECSPI_Type *base, const uint32_t *buffer, size_t size)

Sends a buffer of data bytes using a blocking method.

Note

This function blocks via polling until all bytes have been sent.

Parameters:
  • base – ECSPI base pointer

  • buffer – The data bytes to send

  • size – The number of data bytes to send

Return values:
  • kStatus_Success – Successfully start a transfer.

  • kStatus_ECSPI_Timeout – The transfer timed out and was aborted.

static inline void ECSPI_WriteData(ECSPI_Type *base, uint32_t data)

Writes a data into the ECSPI data register.

Parameters:
  • base – ECSPI base pointer

  • data – Data needs to be write.

static inline uint32_t ECSPI_ReadData(ECSPI_Type *base)

Gets a data from the ECSPI data register.

Parameters:
  • base – ECSPI base pointer

Returns:

Data in the register.

void ECSPI_MasterTransferCreateHandle(ECSPI_Type *base, ecspi_master_handle_t *handle, ecspi_master_callback_t callback, void *userData)

Initializes the ECSPI master handle.

This function initializes the ECSPI master handle which can be used for other ECSPI master transactional APIs. Usually, for a specified ECSPI instance, call this API once to get the initialized handle.

Parameters:
  • base – ECSPI peripheral base address.

  • handle – ECSPI handle pointer.

  • callback – Callback function.

  • userData – User data.

status_t ECSPI_MasterTransferBlocking(ECSPI_Type *base, ecspi_transfer_t *xfer)

Transfers a block of data using a polling method.

Parameters:
  • base – SPI base pointer

  • xfer – pointer to spi_xfer_config_t structure

Return values:
  • kStatus_Success – Successfully start a transfer.

  • kStatus_InvalidArgument – Input argument is invalid.

  • kStatus_ECSPI_Timeout – The transfer timed out and was aborted.

status_t ECSPI_MasterTransferNonBlocking(ECSPI_Type *base, ecspi_master_handle_t *handle, ecspi_transfer_t *xfer)

Performs a non-blocking ECSPI interrupt transfer.

Note

The API immediately returns after transfer initialization is finished.

Note

If ECSPI transfer data frame size is 16 bits, the transfer size cannot be an odd number.

Parameters:
  • base – ECSPI peripheral base address.

  • handle – pointer to ecspi_master_handle_t structure which stores the transfer state

  • xfer – pointer to ecspi_transfer_t structure

Return values:
  • kStatus_Success – Successfully start a transfer.

  • kStatus_InvalidArgument – Input argument is invalid.

  • kStatus_ECSPI_Busy – ECSPI is not idle, is running another transfer.

status_t ECSPI_MasterTransferGetCount(ECSPI_Type *base, ecspi_master_handle_t *handle, size_t *count)

Gets the bytes of the ECSPI interrupt transferred.

Parameters:
  • base – ECSPI peripheral base address.

  • handle – Pointer to ECSPI transfer handle, this should be a static variable.

  • count – Transferred bytes of ECSPI master.

Return values:
  • kStatus_ECSPI_Success – Succeed get the transfer count.

  • kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.

void ECSPI_MasterTransferAbort(ECSPI_Type *base, ecspi_master_handle_t *handle)

Aborts an ECSPI transfer using interrupt.

Parameters:
  • base – ECSPI peripheral base address.

  • handle – Pointer to ECSPI transfer handle, this should be a static variable.

void ECSPI_MasterTransferHandleIRQ(ECSPI_Type *base, ecspi_master_handle_t *handle)

Interrupts the handler for the ECSPI.

Parameters:
  • base – ECSPI peripheral base address.

  • handle – pointer to ecspi_master_handle_t structure which stores the transfer state.

void ECSPI_SlaveTransferCreateHandle(ECSPI_Type *base, ecspi_slave_handle_t *handle, ecspi_slave_callback_t callback, void *userData)

Initializes the ECSPI slave handle.

This function initializes the ECSPI slave handle which can be used for other ECSPI slave transactional APIs. Usually, for a specified ECSPI instance, call this API once to get the initialized handle.

Parameters:
  • base – ECSPI peripheral base address.

  • handle – ECSPI handle pointer.

  • callback – Callback function.

  • userData – User data.

static inline status_t ECSPI_SlaveTransferNonBlocking(ECSPI_Type *base, ecspi_slave_handle_t *handle, ecspi_transfer_t *xfer)

Performs a non-blocking ECSPI slave interrupt transfer.

Note

The API returns immediately after the transfer initialization is finished.

Parameters:
  • base – ECSPI peripheral base address.

  • handle – pointer to ecspi_master_handle_t structure which stores the transfer state

  • xfer – pointer to ecspi_transfer_t structure

Return values:
  • kStatus_Success – Successfully start a transfer.

  • kStatus_InvalidArgument – Input argument is invalid.

  • kStatus_ECSPI_Busy – ECSPI is not idle, is running another transfer.

static inline status_t ECSPI_SlaveTransferGetCount(ECSPI_Type *base, ecspi_slave_handle_t *handle, size_t *count)

Gets the bytes of the ECSPI interrupt transferred.

Parameters:
  • base – ECSPI peripheral base address.

  • handle – Pointer to ECSPI transfer handle, this should be a static variable.

  • count – Transferred bytes of ECSPI slave.

Return values:
  • kStatus_ECSPI_Success – Succeed get the transfer count.

  • kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.

static inline void ECSPI_SlaveTransferAbort(ECSPI_Type *base, ecspi_slave_handle_t *handle)

Aborts an ECSPI slave transfer using interrupt.

Parameters:
  • base – ECSPI peripheral base address.

  • handle – Pointer to ECSPI transfer handle, this should be a static variable.

void ECSPI_SlaveTransferHandleIRQ(ECSPI_Type *base, ecspi_slave_handle_t *handle)

Interrupts a handler for the ECSPI slave.

Parameters:
  • base – ECSPI peripheral base address.

  • handle – pointer to ecspi_slave_handle_t structure which stores the transfer state

FSL_ECSPI_DRIVER_VERSION

ECSPI driver version.

Return status for the ECSPI driver.

Values:

enumerator kStatus_ECSPI_Busy

ECSPI bus is busy

enumerator kStatus_ECSPI_Idle

ECSPI is idle

enumerator kStatus_ECSPI_Error

ECSPI error

enumerator kStatus_ECSPI_HardwareOverFlow

ECSPI hardware overflow

enumerator kStatus_ECSPI_Timeout

ECSPI timeout polling status flags.

enum _ecspi_clock_polarity

ECSPI clock polarity configuration.

Values:

enumerator kECSPI_PolarityActiveHigh

Active-high ECSPI polarity high (idles low).

enumerator kECSPI_PolarityActiveLow

Active-low ECSPI polarity low (idles high).

enum _ecspi_clock_phase

ECSPI clock phase configuration.

Values:

enumerator kECSPI_ClockPhaseFirstEdge

First edge on SPSCK occurs at the middle of the first cycle of a data transfer.

enumerator kECSPI_ClockPhaseSecondEdge

First edge on SPSCK occurs at the start of the first cycle of a data transfer.

ECSPI interrupt sources.

Values:

enumerator kECSPI_TxfifoEmptyInterruptEnable

Transmit FIFO buffer empty interrupt

enumerator kECSPI_TxFifoDataRequstInterruptEnable

Transmit FIFO data requst interrupt

enumerator kECSPI_TxFifoFullInterruptEnable

Transmit FIFO full interrupt

enumerator kECSPI_RxFifoReadyInterruptEnable

Receiver FIFO ready interrupt

enumerator kECSPI_RxFifoDataRequstInterruptEnable

Receiver FIFO data requst interrupt

enumerator kECSPI_RxFifoFullInterruptEnable

Receiver FIFO full interrupt

enumerator kECSPI_RxFifoOverFlowInterruptEnable

Receiver FIFO buffer overflow interrupt

enumerator kECSPI_TransferCompleteInterruptEnable

Transfer complete interrupt

enumerator kECSPI_AllInterruptEnable

All interrupt

ECSPI status flags.

Values:

enumerator kECSPI_TxfifoEmptyFlag

Transmit FIFO buffer empty flag

enumerator kECSPI_TxFifoDataRequstFlag

Transmit FIFO data requst flag

enumerator kECSPI_TxFifoFullFlag

Transmit FIFO full flag

enumerator kECSPI_RxFifoReadyFlag

Receiver FIFO ready flag

enumerator kECSPI_RxFifoDataRequstFlag

Receiver FIFO data requst flag

enumerator kECSPI_RxFifoFullFlag

Receiver FIFO full flag

enumerator kECSPI_RxFifoOverFlowFlag

Receiver FIFO buffer overflow flag

enumerator kECSPI_TransferCompleteFlag

Transfer complete flag

ECSPI DMA enable.

Values:

enumerator kECSPI_TxDmaEnable

Tx DMA request source

enumerator kECSPI_RxDmaEnable

Rx DMA request source

enumerator kECSPI_DmaAllEnable

All DMA request source

enum _ecspi_data_ready

ECSPI SPI_RDY signal configuration.

Values:

enumerator kECSPI_DataReadyIgnore

SPI_RDY signal is ignored

enumerator kECSPI_DataReadyFallingEdge

SPI_RDY signal will be triggerd by the falling edge

enumerator kECSPI_DataReadyLowLevel

SPI_RDY signal will be triggerd by a low level

enum _ecspi_channel_source

ECSPI channel select source.

Values:

enumerator kECSPI_Channel0

Channel 0 is selectd

enumerator kECSPI_Channel1

Channel 1 is selectd

enumerator kECSPI_Channel2

Channel 2 is selectd

enumerator kECSPI_Channel3

Channel 3 is selectd

enum _ecspi_master_slave_mode

ECSPI master or slave mode configuration.

Values:

enumerator kECSPI_Slave

ECSPI peripheral operates in slave mode.

enumerator kECSPI_Master

ECSPI peripheral operates in master mode.

enum _ecspi_data_line_inactive_state_t

ECSPI data line inactive state configuration.

Values:

enumerator kECSPI_DataLineInactiveStateHigh

The data line inactive state stays high.

enumerator kECSPI_DataLineInactiveStateLow

The data line inactive state stays low.

enum _ecspi_clock_inactive_state_t

ECSPI clock inactive state configuration.

Values:

enumerator kECSPI_ClockInactiveStateLow

The SCLK inactive state stays low.

enumerator kECSPI_ClockInactiveStateHigh

The SCLK inactive state stays high.

enum _ecspi_chip_select_active_state_t

ECSPI active state configuration.

Values:

enumerator kECSPI_ChipSelectActiveStateLow

The SS signal line active stays low.

enumerator kECSPI_ChipSelectActiveStateHigh

The SS signal line active stays high.

enum _ecspi_sample_period_clock_source

ECSPI sample period clock configuration.

Values:

enumerator kECSPI_spiClock

The sample period clock source is SCLK.

enumerator kECSPI_lowFreqClock

The sample seriod clock source is low_frequency reference clock(32.768 kHz).

typedef enum _ecspi_clock_polarity ecspi_clock_polarity_t

ECSPI clock polarity configuration.

typedef enum _ecspi_clock_phase ecspi_clock_phase_t

ECSPI clock phase configuration.

typedef enum _ecspi_data_ready ecspi_Data_ready_t

ECSPI SPI_RDY signal configuration.

typedef enum _ecspi_channel_source ecspi_channel_source_t

ECSPI channel select source.

typedef enum _ecspi_master_slave_mode ecspi_master_slave_mode_t

ECSPI master or slave mode configuration.

typedef enum _ecspi_data_line_inactive_state_t ecspi_data_line_inactive_state_t

ECSPI data line inactive state configuration.

typedef enum _ecspi_clock_inactive_state_t ecspi_clock_inactive_state_t

ECSPI clock inactive state configuration.

typedef enum _ecspi_chip_select_active_state_t ecspi_chip_select_active_state_t

ECSPI active state configuration.

typedef enum _ecspi_sample_period_clock_source ecspi_sample_period_clock_source_t

ECSPI sample period clock configuration.

typedef struct _ecspi_channel_config ecspi_channel_config_t

ECSPI user channel configure structure.

typedef struct _ecspi_master_config ecspi_master_config_t

ECSPI master configure structure.

typedef struct _ecspi_slave_config ecspi_slave_config_t

ECSPI slave configure structure.

typedef struct _ecspi_transfer ecspi_transfer_t

ECSPI transfer structure.

typedef struct _ecspi_master_handle ecspi_master_handle_t
typedef ecspi_master_handle_t ecspi_slave_handle_t

Slave handle is the same with master handle

typedef void (*ecspi_master_callback_t)(ECSPI_Type *base, ecspi_master_handle_t *handle, status_t status, void *userData)

ECSPI master callback for finished transmit.

typedef void (*ecspi_slave_callback_t)(ECSPI_Type *base, ecspi_slave_handle_t *handle, status_t status, void *userData)

ECSPI slave callback for finished transmit.

uint32_t ECSPI_GetInstance(ECSPI_Type *base)

Get the instance for ECSPI module.

Parameters:
  • base – ECSPI base address

ECSPI_DUMMYDATA

ECSPI dummy transfer data, the data is sent while txBuff is NULL.

SPI_RETRY_TIMES

Retry times for waiting flag.

struct _ecspi_channel_config
#include <fsl_ecspi.h>

ECSPI user channel configure structure.

Public Members

ecspi_master_slave_mode_t channelMode

Channel mode

ecspi_clock_inactive_state_t clockInactiveState

Clock line (SCLK) inactive state

ecspi_data_line_inactive_state_t dataLineInactiveState

Data line (MOSI&MISO) inactive state

ecspi_chip_select_active_state_t chipSlectActiveState

Chip select(SS) line active state

ecspi_clock_polarity_t polarity

Clock polarity

ecspi_clock_phase_t phase

Clock phase

struct _ecspi_master_config
#include <fsl_ecspi.h>

ECSPI master configure structure.

Public Members

ecspi_channel_source_t channel

Channel number

ecspi_channel_config_t channelConfig

Channel configuration

ecspi_sample_period_clock_source_t samplePeriodClock

Sample period clock source

uint16_t burstLength

Burst length. The length shall be less than 4096 bits

uint8_t chipSelectDelay

SS delay time

uint16_t samplePeriod

Sample period

uint8_t txFifoThreshold

TX Threshold

uint8_t rxFifoThreshold

RX Threshold

uint32_t baudRate_Bps

ECSPI baud rate for master mode

bool enableLoopback

Enable the ECSPI loopback test.

struct _ecspi_slave_config
#include <fsl_ecspi.h>

ECSPI slave configure structure.

Public Members

uint16_t burstLength

Burst length. The length shall be less than 4096 bits

uint8_t txFifoThreshold

TX Threshold

uint8_t rxFifoThreshold

RX Threshold

ecspi_channel_config_t channelConfig

Channel configuration

struct _ecspi_transfer
#include <fsl_ecspi.h>

ECSPI transfer structure.

Public Members

const uint32_t *txData

Send buffer

uint32_t *rxData

Receive buffer

size_t dataSize

Transfer bytes

ecspi_channel_source_t channel

ECSPI channel select

struct _ecspi_master_handle
#include <fsl_ecspi.h>

ECSPI master handle structure.

Public Members

ecspi_channel_source_t channel

Channel number

const uint32_t *volatile txData

Transfer buffer

uint32_t *volatile rxData

Receive buffer

volatile size_t txRemainingBytes

Send data remaining in bytes

volatile size_t rxRemainingBytes

Receive data remaining in bytes

volatile uint32_t state

ECSPI internal state

size_t transferSize

Bytes to be transferred

ecspi_master_callback_t callback

ECSPI callback

void *userData

Callback parameter

ECSPI SDMA Driver

void ECSPI_MasterTransferCreateHandleSDMA(ECSPI_Type *base, ecspi_sdma_handle_t *handle, ecspi_sdma_callback_t callback, void *userData, sdma_handle_t *txHandle, sdma_handle_t *rxHandle, uint32_t eventSourceTx, uint32_t eventSourceRx, uint32_t TxChannel, uint32_t RxChannel)

Initialize the ECSPI master SDMA handle.

This function initializes the ECSPI master SDMA handle which can be used for other SPI master transactional APIs. Usually, for a specified ECSPI instance, user need only call this API once to get the initialized handle.

Parameters:
  • base – ECSPI peripheral base address.

  • handle – ECSPI handle pointer.

  • callback – User callback function called at the end of a transfer.

  • userData – User data for callback.

  • txHandle – SDMA handle pointer for ECSPI Tx, the handle shall be static allocated by users.

  • rxHandle – SDMA handle pointer for ECSPI Rx, the handle shall be static allocated by users.

  • eventSourceTx – event source for ECSPI send, which can be found in SDMA mapping.

  • eventSourceRx – event source for ECSPI receive, which can be found in SDMA mapping.

  • TxChannel – SDMA channel for ECSPI send.

  • RxChannel – SDMA channel for ECSPI receive.

void ECSPI_SlaveTransferCreateHandleSDMA(ECSPI_Type *base, ecspi_sdma_handle_t *handle, ecspi_sdma_callback_t callback, void *userData, sdma_handle_t *txHandle, sdma_handle_t *rxHandle, uint32_t eventSourceTx, uint32_t eventSourceRx, uint32_t TxChannel, uint32_t RxChannel)

Initialize the ECSPI Slave SDMA handle.

This function initializes the ECSPI Slave SDMA handle which can be used for other SPI Slave transactional APIs. Usually, for a specified ECSPI instance, user need only call this API once to get the initialized handle.

Parameters:
  • base – ECSPI peripheral base address.

  • handle – ECSPI handle pointer.

  • callback – User callback function called at the end of a transfer.

  • userData – User data for callback.

  • txHandle – SDMA handle pointer for ECSPI Tx, the handle shall be static allocated by users.

  • rxHandle – SDMA handle pointer for ECSPI Rx, the handle shall be static allocated by users.

  • eventSourceTx – event source for ECSPI send, which can be found in SDMA mapping.

  • eventSourceRx – event source for ECSPI receive, which can be found in SDMA mapping.

  • TxChannel – SDMA channel for ECSPI send.

  • RxChannel – SDMA channel for ECSPI receive.

status_t ECSPI_MasterTransferSDMA(ECSPI_Type *base, ecspi_sdma_handle_t *handle, ecspi_transfer_t *xfer)

Perform a non-blocking ECSPI master transfer using SDMA.

Note

This interface returned immediately after transfer initiates.

Parameters:
  • base – ECSPI peripheral base address.

  • handle – ECSPI SDMA handle pointer.

  • xfer – Pointer to sdma transfer structure.

Return values:
  • kStatus_Success – Successfully start a transfer.

  • kStatus_InvalidArgument – Input argument is invalid.

  • kStatus_ECSPI_Busy – EECSPI is not idle, is running another transfer.

status_t ECSPI_SlaveTransferSDMA(ECSPI_Type *base, ecspi_sdma_handle_t *handle, ecspi_transfer_t *xfer)

Perform a non-blocking ECSPI slave transfer using SDMA.

Note

This interface returned immediately after transfer initiates.

Parameters:
  • base – ECSPI peripheral base address.

  • handle – ECSPI SDMA handle pointer.

  • xfer – Pointer to sdma transfer structure.

Return values:
  • kStatus_Success – Successfully start a transfer.

  • kStatus_InvalidArgument – Input argument is invalid.

  • kStatus_ECSPI_Busy – EECSPI is not idle, is running another transfer.

void ECSPI_MasterTransferAbortSDMA(ECSPI_Type *base, ecspi_sdma_handle_t *handle)

Abort a ECSPI master transfer using SDMA.

Parameters:
  • base – ECSPI peripheral base address.

  • handle – ECSPI SDMA handle pointer.

void ECSPI_SlaveTransferAbortSDMA(ECSPI_Type *base, ecspi_sdma_handle_t *handle)

Abort a ECSPI slave transfer using SDMA.

Parameters:
  • base – ECSPI peripheral base address.

  • handle – ECSPI SDMA handle pointer.

FSL_ECSPI_FREERTOS_DRIVER_VERSION

ECSPI FreeRTOS driver version.

typedef struct _ecspi_sdma_handle ecspi_sdma_handle_t
typedef void (*ecspi_sdma_callback_t)(ECSPI_Type *base, ecspi_sdma_handle_t *handle, status_t status, void *userData)

ECSPI SDMA callback called at the end of transfer.

struct _ecspi_sdma_handle
#include <fsl_ecspi_sdma.h>

ECSPI SDMA transfer handle, users should not touch the content of the handle.

Public Members

bool txInProgress

Send transfer finished

bool rxInProgress

Receive transfer finished

sdma_handle_t *txSdmaHandle

DMA handler for ECSPI send

sdma_handle_t *rxSdmaHandle

DMA handler for ECSPI receive

ecspi_sdma_callback_t callback

Callback for ECSPI SDMA transfer

void *userData

User Data for ECSPI SDMA callback

uint32_t state

Internal state of ECSPI SDMA transfer

uint32_t ChannelTx

Channel for send handle

uint32_t ChannelRx

Channel for receive handler

GPC: General Power Controller Driver

static inline void GPC_EnableMemoryGate(GPC_Type *base, uint32_t modules, bool enable)

Control power for memory.

Parameters:
  • base – GPC peripheral base address.

  • modules – Mask value for Modules to be operated, see to _gpc_memory_power_gate.

  • enable – Enable the power or not.

void GPC_EnablePartialSleepWakeupSource(GPC_Type *base, gpc_wakeup_source_t source, bool enable)

Enable the modules as wakeup sources of PSLEEP (Partial Sleep) mode.

In PSLEEP mode, HP domain is powered down, while LP domain remains powered on so peripherals in LP domain can wakeup the system from PSLEEP mode via interrupts. In PSLEEP mode, system clocks are stopped and peripheral clocks of LP domain can be optionally on. LP domain peripherals can generate interrupt either asynchronously or need its peripheral clock on, depending on what kind of wakeup event is expected. Refer to the corresponding module description about what kind of interrupts are supported by the module.

Parameters:
  • base – GPC peripheral base address.

  • source – Wakeup source for responding module, see to gpc_wakeup_source_t.

  • enable – Enable the wakeup source or not.

bool GPC_GetPartialSleepWakeupFlag(GPC_Type *base, gpc_wakeup_source_t source)

Get if indicated wakeup module just caused the wakeup event to exit PSLEEP mode.

This function returns if the responding wakeup module just caused the MCU to exit PSLEEP mode. In hardware level, the flags of wakeup source are read only and will be cleared by cleaning the interrupt status of the corresponding wakeup module.

Parameters:
  • base – GPC peripheral base address.

  • source – Wakeup source for responding module, see to gpc_wakeup_source_t.

Return values:
  • true – - Indicated wakeup flag is asserted.

  • false – - Indicated wakeup flag is not asserted.

static inline void GPC_EnablePartialSleepMode(GPC_Type *base, bool enable)

Switch to the Partial Sleep mode.

This function controls if the system will enter Partial SLEEP mode or remain in STOP mode.

Parameters:
  • base – GPC peripheral base address.

  • enable – Enable the gate or not.

static inline void GPC_ConfigPowerUpSequence(GPC_Type *base, uint32_t sw, uint32_t sw2iso)

Configure the power up sequence.

There will be two steps for power up sequence:

  • After a power up request, GPC waits for a number of IP BUS clocks equal to the value of SW before turning on the power of HP domain. SW must not be programmed to zero.

  • After GPC turnning on the power of HP domain, it waits for a number of IP BUS clocks equal to the value of SW2ISO before disable the isolation of HP domain. SW2ISO must not be programmed to zero.

Parameters:
  • base – GPC peripheral base address.

  • sw – Count of IP BUS clocks before disabling the isolation of HP domain.

  • sw2iso – Count of IP BUS clocks before turning on the power of HP domain.

static inline void GPC_ConfigPowerDownSequence(GPC_Type *base, uint32_t iso, uint32_t iso2w)

Configure the power down sequence.

There will be two steps for power down sequence:

  • After a power down request, the GPC waits for a number of IP BUS clocks equal to the value of ISO before it enables the isolation of HP domain. ISO must not be programmed to zero.

  • After HP domain is isolated, GPC waits for a number of IPG BUS clocks equal to the value of ISO2SW before it turning off the power of HP domain. ISO2SW must not be programmed to zero.

Parameters:
  • base – GPC peripheral base address.

  • iso – Count of IP BUS clocks before it enables the isolation of HP domain.

  • iso2w – Count of IP BUS clocks before it turning off the power of HP domain.

static inline uint32_t GPC_GetStatusFlags(GPC_Type *base)

Get the status flags of GPC.

Parameters:
  • base – GPC peripheral base address.

Returns:

Mask value of flags, see to _gpc_status_flags.

static inline void GPC_ClearStatusFlags(GPC_Type *base, uint32_t flags)

Clear the status flags of GPC.

Parameters:
  • base – GPC peripheral base address.

  • flags – Mask value of flags to be cleared, see to _gpc_status_flags.

FSL_GPC_DRIVER_VERSION

GPC driver version 2.0.0.

enum _gpc_memory_power_gate

Enumeration of the memory power gate control.

Once the clock gate is enabled, the responding part would be powered off and contents are not retained in Partial SLEEP mode.

Values:

enumerator kGPC_MemoryPowerGateL2Cache

L2 Cache Power Gate.

enumerator kGPC_MemoryPowerGateITCM

ITCM Power Gate Enable.

enumerator kGPC_MemoryPowerGateDTCM

DTCM Power Gate Enable.

enum _gpc_status_flags

GPC flags.

Values:

enumerator kGPC_PoweredDownFlag

Power status. HP domain was powered down for the previous power down request.

GPIO: General-Purpose Input/Output Driver

void GPIO_PinInit(GPIO_Type *base, uint32_t pin, const gpio_pin_config_t *Config)

Initializes the GPIO peripheral according to the specified parameters in the initConfig.

Parameters:
  • base – GPIO base pointer.

  • pin – Specifies the pin number

  • Config – pointer to a gpio_pin_config_t structure that contains the configuration information.

void GPIO_PinWrite(GPIO_Type *base, uint32_t pin, uint8_t output)

Sets the output level of the individual GPIO pin to logic 1 or 0.

Parameters:
  • base – GPIO base pointer.

  • pin – GPIO port pin number.

  • output – GPIOpin output logic level.

    • 0: corresponding pin output low-logic level.

    • 1: corresponding pin output high-logic level.

static inline void GPIO_WritePinOutput(GPIO_Type *base, uint32_t pin, uint8_t output)

Sets the output level of the individual GPIO pin to logic 1 or 0.

Deprecated:

Do not use this function. It has been superceded by GPIO_PinWrite.

static inline void GPIO_PortSet(GPIO_Type *base, uint32_t mask)

Sets the output level of the multiple GPIO pins to the logic 1.

Parameters:
  • base – GPIO peripheral base pointer (GPIO1, GPIO2, GPIO3, and so on.)

  • mask – GPIO pin number macro

static inline void GPIO_SetPinsOutput(GPIO_Type *base, uint32_t mask)

Sets the output level of the multiple GPIO pins to the logic 1.

Deprecated:

Do not use this function. It has been superceded by GPIO_PortSet.

static inline void GPIO_PortClear(GPIO_Type *base, uint32_t mask)

Sets the output level of the multiple GPIO pins to the logic 0.

Parameters:
  • base – GPIO peripheral base pointer (GPIO1, GPIO2, GPIO3, and so on.)

  • mask – GPIO pin number macro

static inline void GPIO_ClearPinsOutput(GPIO_Type *base, uint32_t mask)

Sets the output level of the multiple GPIO pins to the logic 0.

Deprecated:

Do not use this function. It has been superceded by GPIO_PortClear.

static inline void GPIO_PortToggle(GPIO_Type *base, uint32_t mask)

Reverses the current output logic of the multiple GPIO pins.

Parameters:
  • base – GPIO peripheral base pointer (GPIO1, GPIO2, GPIO3, and so on.)

  • mask – GPIO pin number macro

static inline uint32_t GPIO_PinRead(GPIO_Type *base, uint32_t pin)

Reads the current input value of the GPIO port.

Parameters:
  • base – GPIO base pointer.

  • pin – GPIO port pin number.

Return values:

GPIO – port input value.

static inline uint32_t GPIO_ReadPinInput(GPIO_Type *base, uint32_t pin)

Reads the current input value of the GPIO port.

Deprecated:

Do not use this function. It has been superceded by GPIO_PinRead.

static inline uint8_t GPIO_PinReadPadStatus(GPIO_Type *base, uint32_t pin)

Reads the current GPIO pin pad status.

Parameters:
  • base – GPIO base pointer.

  • pin – GPIO port pin number.

Return values:

GPIO – pin pad status value.

static inline uint8_t GPIO_ReadPadStatus(GPIO_Type *base, uint32_t pin)

Reads the current GPIO pin pad status.

Deprecated:

Do not use this function. It has been superceded by GPIO_PinReadPadStatus.

void GPIO_PinSetInterruptConfig(GPIO_Type *base, uint32_t pin, gpio_interrupt_mode_t pinInterruptMode)

Sets the current pin interrupt mode.

Parameters:
  • base – GPIO base pointer.

  • pin – GPIO port pin number.

  • pinInterruptMode – pointer to a gpio_interrupt_mode_t structure that contains the interrupt mode information.

static inline void GPIO_SetPinInterruptConfig(GPIO_Type *base, uint32_t pin, gpio_interrupt_mode_t pinInterruptMode)

Sets the current pin interrupt mode.

Deprecated:

Do not use this function. It has been superceded by GPIO_PinSetInterruptConfig.

static inline void GPIO_PortEnableInterrupts(GPIO_Type *base, uint32_t mask)

Enables the specific pin interrupt.

Parameters:
  • base – GPIO base pointer.

  • mask – GPIO pin number macro.

static inline void GPIO_EnableInterrupts(GPIO_Type *base, uint32_t mask)

Enables the specific pin interrupt.

Parameters:
  • base – GPIO base pointer.

  • mask – GPIO pin number macro.

static inline void GPIO_PortDisableInterrupts(GPIO_Type *base, uint32_t mask)

Disables the specific pin interrupt.

Parameters:
  • base – GPIO base pointer.

  • mask – GPIO pin number macro.

static inline void GPIO_DisableInterrupts(GPIO_Type *base, uint32_t mask)

Disables the specific pin interrupt.

Deprecated:

Do not use this function. It has been superceded by GPIO_PortDisableInterrupts.

static inline uint32_t GPIO_PortGetInterruptFlags(GPIO_Type *base)

Reads individual pin interrupt status.

Parameters:
  • base – GPIO base pointer.

Return values:

current – pin interrupt status flag.

static inline uint32_t GPIO_GetPinsInterruptFlags(GPIO_Type *base)

Reads individual pin interrupt status.

Parameters:
  • base – GPIO base pointer.

Return values:

current – pin interrupt status flag.

static inline void GPIO_PortClearInterruptFlags(GPIO_Type *base, uint32_t mask)

Clears pin interrupt flag. Status flags are cleared by writing a 1 to the corresponding bit position.

Parameters:
  • base – GPIO base pointer.

  • mask – GPIO pin number macro.

static inline void GPIO_ClearPinsInterruptFlags(GPIO_Type *base, uint32_t mask)

Clears pin interrupt flag. Status flags are cleared by writing a 1 to the corresponding bit position.

Parameters:
  • base – GPIO base pointer.

  • mask – GPIO pin number macro.

FSL_GPIO_DRIVER_VERSION

GPIO driver version.

enum _gpio_pin_direction

GPIO direction definition.

Values:

enumerator kGPIO_DigitalInput

Set current pin as digital input.

enumerator kGPIO_DigitalOutput

Set current pin as digital output.

enum _gpio_interrupt_mode

GPIO interrupt mode definition.

Values:

enumerator kGPIO_NoIntmode

Set current pin general IO functionality.

enumerator kGPIO_IntLowLevel

Set current pin interrupt is low-level sensitive.

enumerator kGPIO_IntHighLevel

Set current pin interrupt is high-level sensitive.

enumerator kGPIO_IntRisingEdge

Set current pin interrupt is rising-edge sensitive.

enumerator kGPIO_IntFallingEdge

Set current pin interrupt is falling-edge sensitive.

enumerator kGPIO_IntRisingOrFallingEdge

Enable the edge select bit to override the ICR register’s configuration.

typedef enum _gpio_pin_direction gpio_pin_direction_t

GPIO direction definition.

typedef enum _gpio_interrupt_mode gpio_interrupt_mode_t

GPIO interrupt mode definition.

typedef struct _gpio_pin_config gpio_pin_config_t

GPIO Init structure definition.

struct _gpio_pin_config
#include <fsl_gpio.h>

GPIO Init structure definition.

Public Members

gpio_pin_direction_t direction

Specifies the pin direction.

uint8_t outputLogic

Set a default output logic, which has no use in input

gpio_interrupt_mode_t interruptMode

Specifies the pin interrupt mode, a value of gpio_interrupt_mode_t.

GPT: General Purpose Timer

void GPT_Init(GPT_Type *base, const gpt_config_t *initConfig)

Initialize GPT to reset state and initialize running mode.

Parameters:
  • base – GPT peripheral base address.

  • initConfig – GPT mode setting configuration.

void GPT_Deinit(GPT_Type *base)

Disables the module and gates the GPT clock.

Parameters:
  • base – GPT peripheral base address.

void GPT_GetDefaultConfig(gpt_config_t *config)

Fills in the GPT configuration structure with default settings.

The default values are:

config->clockSource = kGPT_ClockSource_Periph;
config->divider = 1U;
config->enableRunInStop = true;
config->enableRunInWait = true;
config->enableRunInDoze = false;
config->enableRunInDbg = false;
config->enableFreeRun = false;
config->enableMode  = true;

Parameters:
  • config – Pointer to the user configuration structure.

static inline void GPT_SoftwareReset(GPT_Type *base)

Software reset of GPT module.

Parameters:
  • base – GPT peripheral base address.

static inline void GPT_SetClockSource(GPT_Type *base, gpt_clock_source_t gptClkSource)

Set clock source of GPT.

Parameters:
  • base – GPT peripheral base address.

  • gptClkSource – Clock source (see gpt_clock_source_t typedef enumeration).

static inline gpt_clock_source_t GPT_GetClockSource(GPT_Type *base)

Get clock source of GPT.

Parameters:
  • base – GPT peripheral base address.

Returns:

clock source (see gpt_clock_source_t typedef enumeration).

static inline void GPT_SetClockDivider(GPT_Type *base, uint32_t divider)

Set pre scaler of GPT.

Parameters:
  • base – GPT peripheral base address.

  • divider – Divider of GPT (1-4096).

static inline uint32_t GPT_GetClockDivider(GPT_Type *base)

Get clock divider in GPT module.

Parameters:
  • base – GPT peripheral base address.

Returns:

clock divider in GPT module (1-4096).

static inline void GPT_SetOscClockDivider(GPT_Type *base, uint32_t divider)

OSC 24M pre-scaler before selected by clock source.

Parameters:
  • base – GPT peripheral base address.

  • divider – OSC Divider(1-16).

static inline uint32_t GPT_GetOscClockDivider(GPT_Type *base)

Get OSC 24M clock divider in GPT module.

Parameters:
  • base – GPT peripheral base address.

Returns:

OSC clock divider in GPT module (1-16).

static inline void GPT_StartTimer(GPT_Type *base)

Start GPT timer.

Parameters:
  • base – GPT peripheral base address.

static inline void GPT_StopTimer(GPT_Type *base)

Stop GPT timer.

Parameters:
  • base – GPT peripheral base address.

static inline uint32_t GPT_GetCurrentTimerCount(GPT_Type *base)

Reads the current GPT counting value.

Parameters:
  • base – GPT peripheral base address.

Returns:

Current GPT counter value.

static inline void GPT_SetInputOperationMode(GPT_Type *base, gpt_input_capture_channel_t channel, gpt_input_operation_mode_t mode)

Set GPT operation mode of input capture channel.

Parameters:
  • base – GPT peripheral base address.

  • channel – GPT capture channel (see gpt_input_capture_channel_t typedef enumeration).

  • mode – GPT input capture operation mode (see gpt_input_operation_mode_t typedef enumeration).

static inline gpt_input_operation_mode_t GPT_GetInputOperationMode(GPT_Type *base, gpt_input_capture_channel_t channel)

Get GPT operation mode of input capture channel.

Parameters:
  • base – GPT peripheral base address.

  • channel – GPT capture channel (see gpt_input_capture_channel_t typedef enumeration).

Returns:

GPT input capture operation mode (see gpt_input_operation_mode_t typedef enumeration).

static inline uint32_t GPT_GetInputCaptureValue(GPT_Type *base, gpt_input_capture_channel_t channel)

Get GPT input capture value of certain channel.

Parameters:
  • base – GPT peripheral base address.

  • channel – GPT capture channel (see gpt_input_capture_channel_t typedef enumeration).

Returns:

GPT input capture value.

static inline void GPT_SetOutputOperationMode(GPT_Type *base, gpt_output_compare_channel_t channel, gpt_output_operation_mode_t mode)

Set GPT operation mode of output compare channel.

Parameters:
  • base – GPT peripheral base address.

  • channel – GPT output compare channel (see gpt_output_compare_channel_t typedef enumeration).

  • mode – GPT output operation mode (see gpt_output_operation_mode_t typedef enumeration).

static inline gpt_output_operation_mode_t GPT_GetOutputOperationMode(GPT_Type *base, gpt_output_compare_channel_t channel)

Get GPT operation mode of output compare channel.

Parameters:
  • base – GPT peripheral base address.

  • channel – GPT output compare channel (see gpt_output_compare_channel_t typedef enumeration).

Returns:

GPT output operation mode (see gpt_output_operation_mode_t typedef enumeration).

static inline void GPT_SetOutputCompareValue(GPT_Type *base, gpt_output_compare_channel_t channel, uint32_t value)

Set GPT output compare value of output compare channel.

Parameters:
  • base – GPT peripheral base address.

  • channel – GPT output compare channel (see gpt_output_compare_channel_t typedef enumeration).

  • value – GPT output compare value.

static inline uint32_t GPT_GetOutputCompareValue(GPT_Type *base, gpt_output_compare_channel_t channel)

Get GPT output compare value of output compare channel.

Parameters:
  • base – GPT peripheral base address.

  • channel – GPT output compare channel (see gpt_output_compare_channel_t typedef enumeration).

Returns:

GPT output compare value.

static inline void GPT_ForceOutput(GPT_Type *base, gpt_output_compare_channel_t channel)

Force GPT output action on output compare channel, ignoring comparator.

Parameters:
  • base – GPT peripheral base address.

  • channel – GPT output compare channel (see gpt_output_compare_channel_t typedef enumeration).

static inline void GPT_EnableInterrupts(GPT_Type *base, uint32_t mask)

Enables the selected GPT interrupts.

Parameters:
  • base – GPT peripheral base address.

  • mask – The interrupts to enable. This is a logical OR of members of the enumeration gpt_interrupt_enable_t

static inline void GPT_DisableInterrupts(GPT_Type *base, uint32_t mask)

Disables the selected GPT interrupts.

Parameters:
  • base – GPT peripheral base address

  • mask – The interrupts to disable. This is a logical OR of members of the enumeration gpt_interrupt_enable_t

static inline uint32_t GPT_GetEnabledInterrupts(GPT_Type *base)

Gets the enabled GPT interrupts.

Parameters:
  • base – GPT peripheral base address

Returns:

The enabled interrupts. This is the logical OR of members of the enumeration gpt_interrupt_enable_t

static inline uint32_t GPT_GetStatusFlags(GPT_Type *base, gpt_status_flag_t flags)

Get GPT status flags.

Parameters:
  • base – GPT peripheral base address.

  • flags – GPT status flag mask (see gpt_status_flag_t for bit definition).

Returns:

GPT status, each bit represents one status flag.

static inline void GPT_ClearStatusFlags(GPT_Type *base, gpt_status_flag_t flags)

Clears the GPT status flags.

Parameters:
  • base – GPT peripheral base address.

  • flags – GPT status flag mask (see gpt_status_flag_t for bit definition).

FSL_GPT_DRIVER_VERSION
enum _gpt_clock_source

List of clock sources.

Note

Actual number of clock sources is SoC dependent

Values:

enumerator kGPT_ClockSource_Off

GPT Clock Source Off.

enumerator kGPT_ClockSource_Periph

GPT Clock Source from Peripheral Clock.

enumerator kGPT_ClockSource_HighFreq

GPT Clock Source from High Frequency Reference Clock.

enumerator kGPT_ClockSource_Ext

GPT Clock Source from external pin.

enumerator kGPT_ClockSource_LowFreq

GPT Clock Source from Low Frequency Reference Clock.

enumerator kGPT_ClockSource_Osc

GPT Clock Source from Crystal oscillator.

enum _gpt_input_capture_channel

List of input capture channel number.

Values:

enumerator kGPT_InputCapture_Channel1

GPT Input Capture Channel1.

enumerator kGPT_InputCapture_Channel2

GPT Input Capture Channel2.

enum _gpt_input_operation_mode

List of input capture operation mode.

Values:

enumerator kGPT_InputOperation_Disabled

Don’t capture.

enumerator kGPT_InputOperation_RiseEdge

Capture on rising edge of input pin.

enumerator kGPT_InputOperation_FallEdge

Capture on falling edge of input pin.

enumerator kGPT_InputOperation_BothEdge

Capture on both edges of input pin.

enum _gpt_output_compare_channel

List of output compare channel number.

Values:

enumerator kGPT_OutputCompare_Channel1

Output Compare Channel1.

enumerator kGPT_OutputCompare_Channel2

Output Compare Channel2.

enumerator kGPT_OutputCompare_Channel3

Output Compare Channel3.

enum _gpt_output_operation_mode

List of output compare operation mode.

Values:

enumerator kGPT_OutputOperation_Disconnected

Don’t change output pin.

enumerator kGPT_OutputOperation_Toggle

Toggle output pin.

enumerator kGPT_OutputOperation_Clear

Set output pin low.

enumerator kGPT_OutputOperation_Set

Set output pin high.

enumerator kGPT_OutputOperation_Activelow

Generate a active low pulse on output pin.

enum _gpt_interrupt_enable

List of GPT interrupts.

Values:

enumerator kGPT_OutputCompare1InterruptEnable

Output Compare Channel1 interrupt enable

enumerator kGPT_OutputCompare2InterruptEnable

Output Compare Channel2 interrupt enable

enumerator kGPT_OutputCompare3InterruptEnable

Output Compare Channel3 interrupt enable

enumerator kGPT_InputCapture1InterruptEnable

Input Capture Channel1 interrupt enable

enumerator kGPT_InputCapture2InterruptEnable

Input Capture Channel1 interrupt enable

enumerator kGPT_RollOverFlagInterruptEnable

Counter rolled over interrupt enable

enum _gpt_status_flag

Status flag.

Values:

enumerator kGPT_OutputCompare1Flag

Output compare channel 1 event.

enumerator kGPT_OutputCompare2Flag

Output compare channel 2 event.

enumerator kGPT_OutputCompare3Flag

Output compare channel 3 event.

enumerator kGPT_InputCapture1Flag

Input Capture channel 1 event.

enumerator kGPT_InputCapture2Flag

Input Capture channel 2 event.

enumerator kGPT_RollOverFlag

Counter reaches maximum value and rolled over to 0 event.

typedef enum _gpt_clock_source gpt_clock_source_t

List of clock sources.

Note

Actual number of clock sources is SoC dependent

typedef enum _gpt_input_capture_channel gpt_input_capture_channel_t

List of input capture channel number.

typedef enum _gpt_input_operation_mode gpt_input_operation_mode_t

List of input capture operation mode.

typedef enum _gpt_output_compare_channel gpt_output_compare_channel_t

List of output compare channel number.

typedef enum _gpt_output_operation_mode gpt_output_operation_mode_t

List of output compare operation mode.

typedef enum _gpt_interrupt_enable gpt_interrupt_enable_t

List of GPT interrupts.

typedef enum _gpt_status_flag gpt_status_flag_t

Status flag.

typedef struct _gpt_init_config gpt_config_t

Structure to configure the running mode.

struct _gpt_init_config
#include <fsl_gpt.h>

Structure to configure the running mode.

Public Members

gpt_clock_source_t clockSource

clock source for GPT module.

uint32_t divider

clock divider (prescaler+1) from clock source to counter.

bool enableFreeRun

true: FreeRun mode, false: Restart mode.

bool enableRunInWait

GPT enabled in wait mode.

bool enableRunInStop

GPT enabled in stop mode.

bool enableRunInDoze

GPT enabled in doze mode.

bool enableRunInDbg

GPT enabled in debug mode.

bool enableMode

true: counter reset to 0 when enabled; false: counter retain its value when enabled.

I2C: Inter-Integrated Circuit Driver

I2C Driver

void I2C_MasterInit(I2C_Type *base, const i2c_master_config_t *masterConfig, uint32_t srcClock_Hz)

Initializes the I2C peripheral. Call this API to ungate the I2C clock and configure the I2C with master configuration.

Note

This API should be called at the beginning of the application. Otherwise, any operation to the I2C module can cause a hard fault because the clock is not enabled. The configuration structure can be custom filled or it can be set with default values by using the I2C_MasterGetDefaultConfig(). After calling this API, the master is ready to transfer. This is an example.

i2c_master_config_t config = {
.enableMaster = true,
.baudRate_Bps = 100000
};
I2C_MasterInit(I2C0, &config, 12000000U);

Parameters:
  • base – I2C base pointer

  • masterConfig – A pointer to the master configuration structure

  • srcClock_Hz – I2C peripheral clock frequency in Hz

void I2C_MasterDeinit(I2C_Type *base)

De-initializes the I2C master peripheral. Call this API to gate the I2C clock. The I2C master module can’t work unless the I2C_MasterInit is called.

Parameters:
  • base – I2C base pointer

void I2C_MasterGetDefaultConfig(i2c_master_config_t *masterConfig)

Sets the I2C master configuration structure to default values.

The purpose of this API is to get the configuration structure initialized for use in the I2C_MasterInit(). Use the initialized structure unchanged in the I2C_MasterInit() or modify the structure before calling the I2C_MasterInit(). This is an example.

i2c_master_config_t config;
I2C_MasterGetDefaultConfig(&config);

Parameters:
  • masterConfig – A pointer to the master configuration structure.

void I2C_SlaveInit(I2C_Type *base, const i2c_slave_config_t *slaveConfig)

Initializes the I2C peripheral. Call this API to ungate the I2C clock and initialize the I2C with the slave configuration.

Note

This API should be called at the beginning of the application. Otherwise, any operation to the I2C module can cause a hard fault because the clock is not enabled. The configuration structure can partly be set with default values by I2C_SlaveGetDefaultConfig() or it can be custom filled by the user. This is an example.

i2c_slave_config_t config = {
.enableSlave = true,
.slaveAddress = 0x1DU,
};
I2C_SlaveInit(I2C0, &config);

Parameters:
  • base – I2C base pointer

  • slaveConfig – A pointer to the slave configuration structure

void I2C_SlaveDeinit(I2C_Type *base)

De-initializes the I2C slave peripheral. Calling this API gates the I2C clock. The I2C slave module can’t work unless the I2C_SlaveInit is called to enable the clock.

Parameters:
  • base – I2C base pointer

void I2C_SlaveGetDefaultConfig(i2c_slave_config_t *slaveConfig)

Sets the I2C slave configuration structure to default values.

The purpose of this API is to get the configuration structure initialized for use in the I2C_SlaveInit(). Modify fields of the structure before calling the I2C_SlaveInit(). This is an example.

i2c_slave_config_t config;
I2C_SlaveGetDefaultConfig(&config);

Parameters:
  • slaveConfig – A pointer to the slave configuration structure.

static inline void I2C_Enable(I2C_Type *base, bool enable)

Enables or disables the I2C peripheral operation.

Parameters:
  • base – I2C base pointer

  • enable – Pass true to enable and false to disable the module.

static inline uint32_t I2C_MasterGetStatusFlags(I2C_Type *base)

Gets the I2C status flags.

Parameters:
  • base – I2C base pointer

Returns:

status flag, use status flag to AND _i2c_flags to get the related status.

static inline void I2C_MasterClearStatusFlags(I2C_Type *base, uint32_t statusMask)

Clears the I2C status flag state.

The following status register flags can be cleared kI2C_ArbitrationLostFlag and kI2C_IntPendingFlag.

Parameters:
  • base – I2C base pointer

  • statusMask – The status flag mask, defined in type i2c_status_flag_t. The parameter can be any combination of the following values:

    • kI2C_ArbitrationLostFlag

    • kI2C_IntPendingFlag

static inline uint32_t I2C_SlaveGetStatusFlags(I2C_Type *base)

Gets the I2C status flags.

Parameters:
  • base – I2C base pointer

Returns:

status flag, use status flag to AND _i2c_flags to get the related status.

static inline void I2C_SlaveClearStatusFlags(I2C_Type *base, uint32_t statusMask)

Clears the I2C status flag state.

The following status register flags can be cleared kI2C_ArbitrationLostFlag and kI2C_IntPendingFlag

Parameters:
  • base – I2C base pointer

  • statusMask – The status flag mask, defined in type i2c_status_flag_t. The parameter can be any combination of the following values:

    • kI2C_IntPendingFlagFlag

void I2C_EnableInterrupts(I2C_Type *base, uint32_t mask)

Enables I2C interrupt requests.

Parameters:
  • base – I2C base pointer

  • mask – interrupt source The parameter can be combination of the following source if defined:

    • kI2C_GlobalInterruptEnable

    • kI2C_StopDetectInterruptEnable/kI2C_StartDetectInterruptEnable

    • kI2C_SdaTimeoutInterruptEnable

void I2C_DisableInterrupts(I2C_Type *base, uint32_t mask)

Disables I2C interrupt requests.

Parameters:
  • base – I2C base pointer

  • mask – interrupt source The parameter can be combination of the following source if defined:

    • kI2C_GlobalInterruptEnable

    • kI2C_StopDetectInterruptEnable/kI2C_StartDetectInterruptEnable

    • kI2C_SdaTimeoutInterruptEnable

void I2C_MasterSetBaudRate(I2C_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz)

Sets the I2C master transfer baud rate.

Parameters:
  • base – I2C base pointer

  • baudRate_Bps – the baud rate value in bps

  • srcClock_Hz – Source clock

status_t I2C_MasterStart(I2C_Type *base, uint8_t address, i2c_direction_t direction)

Sends a START on the I2C bus.

This function is used to initiate a new master mode transfer by sending the START signal. The slave address is sent following the I2C START signal.

Parameters:
  • base – I2C peripheral base pointer

  • address – 7-bit slave device address.

  • direction – Master transfer directions(transmit/receive).

Return values:
  • kStatus_Success – Successfully send the start signal.

  • kStatus_I2C_Busy – Current bus is busy.

status_t I2C_MasterStop(I2C_Type *base)

Sends a STOP signal on the I2C bus.

Return values:
  • kStatus_Success – Successfully send the stop signal.

  • kStatus_I2C_Timeout – Send stop signal failed, timeout.

status_t I2C_MasterRepeatedStart(I2C_Type *base, uint8_t address, i2c_direction_t direction)

Sends a REPEATED START on the I2C bus.

Parameters:
  • base – I2C peripheral base pointer

  • address – 7-bit slave device address.

  • direction – Master transfer directions(transmit/receive).

Return values:
  • kStatus_Success – Successfully send the start signal.

  • kStatus_I2C_Busy – Current bus is busy but not occupied by current I2C master.

status_t I2C_MasterWriteBlocking(I2C_Type *base, const uint8_t *txBuff, size_t txSize, uint32_t flags)

Performs a polling send transaction on the I2C bus.

Parameters:
  • base – The I2C peripheral base pointer.

  • txBuff – The pointer to the data to be transferred.

  • txSize – The length in bytes of the data to be transferred.

  • flags – Transfer control flag to decide whether need to send a stop, use kI2C_TransferDefaultFlag to issue a stop and kI2C_TransferNoStop to not send a stop.

Return values:
  • kStatus_Success – Successfully complete the data transmission.

  • kStatus_I2C_ArbitrationLost – Transfer error, arbitration lost.

  • kStataus_I2C_Nak – Transfer error, receive NAK during transfer.

status_t I2C_MasterReadBlocking(I2C_Type *base, uint8_t *rxBuff, size_t rxSize, uint32_t flags)

Performs a polling receive transaction on the I2C bus.

Note

The I2C_MasterReadBlocking function stops the bus before reading the final byte. Without stopping the bus prior for the final read, the bus issues another read, resulting in garbage data being read into the data register.

Parameters:
  • base – I2C peripheral base pointer.

  • rxBuff – The pointer to the data to store the received data.

  • rxSize – The length in bytes of the data to be received.

  • flags – Transfer control flag to decide whether need to send a stop, use kI2C_TransferDefaultFlag to issue a stop and kI2C_TransferNoStop to not send a stop.

Return values:
  • kStatus_Success – Successfully complete the data transmission.

  • kStatus_I2C_Timeout – Send stop signal failed, timeout.

status_t I2C_SlaveWriteBlocking(I2C_Type *base, const uint8_t *txBuff, size_t txSize)

Performs a polling send transaction on the I2C bus.

Parameters:
  • base – The I2C peripheral base pointer.

  • txBuff – The pointer to the data to be transferred.

  • txSize – The length in bytes of the data to be transferred.

Return values:
  • kStatus_Success – Successfully complete the data transmission.

  • kStatus_I2C_ArbitrationLost – Transfer error, arbitration lost.

  • kStataus_I2C_Nak – Transfer error, receive NAK during transfer.

status_t I2C_SlaveReadBlocking(I2C_Type *base, uint8_t *rxBuff, size_t rxSize)

Performs a polling receive transaction on the I2C bus.

Parameters:
  • base – I2C peripheral base pointer.

  • rxBuff – The pointer to the data to store the received data.

  • rxSize – The length in bytes of the data to be received.

status_t I2C_MasterTransferBlocking(I2C_Type *base, i2c_master_transfer_t *xfer)

Performs a master polling transfer on the I2C bus.

Note

The API does not return until the transfer succeeds or fails due to arbitration lost or receiving a NAK.

Parameters:
  • base – I2C peripheral base address.

  • xfer – Pointer to the transfer structure.

Return values:
  • kStatus_Success – Successfully complete the data transmission.

  • kStatus_I2C_Busy – Previous transmission still not finished.

  • kStatus_I2C_Timeout – Transfer error, wait signal timeout.

  • kStatus_I2C_ArbitrationLost – Transfer error, arbitration lost.

  • kStataus_I2C_Nak – Transfer error, receive NAK during transfer.

void I2C_MasterTransferCreateHandle(I2C_Type *base, i2c_master_handle_t *handle, i2c_master_transfer_callback_t callback, void *userData)

Initializes the I2C handle which is used in transactional functions.

Parameters:
  • base – I2C base pointer.

  • handle – pointer to i2c_master_handle_t structure to store the transfer state.

  • callback – pointer to user callback function.

  • userData – user parameter passed to the callback function.

status_t I2C_MasterTransferNonBlocking(I2C_Type *base, i2c_master_handle_t *handle, i2c_master_transfer_t *xfer)

Performs a master interrupt non-blocking transfer on the I2C bus.

Note

Calling the API returns immediately after transfer initiates. The user needs to call I2C_MasterGetTransferCount to poll the transfer status to check whether the transfer is finished. If the return status is not kStatus_I2C_Busy, the transfer is finished.

Parameters:
  • base – I2C base pointer.

  • handle – pointer to i2c_master_handle_t structure which stores the transfer state.

  • xfer – pointer to i2c_master_transfer_t structure.

Return values:
  • kStatus_Success – Successfully start the data transmission.

  • kStatus_I2C_Busy – Previous transmission still not finished.

  • kStatus_I2C_Timeout – Transfer error, wait signal timeout.

status_t I2C_MasterTransferGetCount(I2C_Type *base, i2c_master_handle_t *handle, size_t *count)

Gets the master transfer status during a interrupt non-blocking transfer.

Parameters:
  • base – I2C base pointer.

  • handle – pointer to i2c_master_handle_t structure which stores the transfer state.

  • count – Number of bytes transferred so far by the non-blocking transaction.

Return values:
  • kStatus_InvalidArgument – count is Invalid.

  • kStatus_Success – Successfully return the count.

status_t I2C_MasterTransferAbort(I2C_Type *base, i2c_master_handle_t *handle)

Aborts an interrupt non-blocking transfer early.

Note

This API can be called at any time when an interrupt non-blocking transfer initiates to abort the transfer early.

Parameters:
  • base – I2C base pointer.

  • handle – pointer to i2c_master_handle_t structure which stores the transfer state

Return values:
  • kStatus_I2C_Timeout – Timeout during polling flag.

  • kStatus_Success – Successfully abort the transfer.

void I2C_MasterTransferHandleIRQ(I2C_Type *base, void *i2cHandle)

Master interrupt handler.

Parameters:
  • base – I2C base pointer.

  • i2cHandle – pointer to i2c_master_handle_t structure.

void I2C_SlaveTransferCreateHandle(I2C_Type *base, i2c_slave_handle_t *handle, i2c_slave_transfer_callback_t callback, void *userData)

Initializes the I2C handle which is used in transactional functions.

Parameters:
  • base – I2C base pointer.

  • handle – pointer to i2c_slave_handle_t structure to store the transfer state.

  • callback – pointer to user callback function.

  • userData – user parameter passed to the callback function.

status_t I2C_SlaveTransferNonBlocking(I2C_Type *base, i2c_slave_handle_t *handle, uint32_t eventMask)

Starts accepting slave transfers.

Call this API after calling the I2C_SlaveInit() and I2C_SlaveTransferCreateHandle() to start processing transactions driven by an I2C master. The slave monitors the I2C bus and passes events to the callback that was passed into the call to I2C_SlaveTransferCreateHandle(). The callback is always invoked from the interrupt context.

The set of events received by the callback is customizable. To do so, set the eventMask parameter to the OR’d combination of i2c_slave_transfer_event_t enumerators for the events you wish to receive. The kI2C_SlaveTransmitEvent and kLPI2C_SlaveReceiveEvent events are always enabled and do not need to be included in the mask. Alternatively, pass 0 to get a default set of only the transmit and receive events that are always enabled. In addition, the kI2C_SlaveAllEvents constant is provided as a convenient way to enable all events.

Parameters:
  • base – The I2C peripheral base address.

  • handle – Pointer to i2c_slave_handle_t structure which stores the transfer state.

  • eventMask – Bit mask formed by OR’ing together i2c_slave_transfer_event_t enumerators to specify which events to send to the callback. Other accepted values are 0 to get a default set of only the transmit and receive events, and kI2C_SlaveAllEvents to enable all events.

Return values:
  • kStatus_Success – Slave transfers were successfully started.

  • kStatus_I2C_Busy – Slave transfers have already been started on this handle.

void I2C_SlaveTransferAbort(I2C_Type *base, i2c_slave_handle_t *handle)

Aborts the slave transfer.

Note

This API can be called at any time to stop slave for handling the bus events.

Parameters:
  • base – I2C base pointer.

  • handle – pointer to i2c_slave_handle_t structure which stores the transfer state.

status_t I2C_SlaveTransferGetCount(I2C_Type *base, i2c_slave_handle_t *handle, size_t *count)

Gets the slave transfer remaining bytes during a interrupt non-blocking transfer.

Parameters:
  • base – I2C base pointer.

  • handle – pointer to i2c_slave_handle_t structure.

  • count – Number of bytes transferred so far by the non-blocking transaction.

Return values:
  • kStatus_InvalidArgument – count is Invalid.

  • kStatus_Success – Successfully return the count.

void I2C_SlaveTransferHandleIRQ(I2C_Type *base, void *i2cHandle)

Slave interrupt handler.

Parameters:
  • base – I2C base pointer.

  • i2cHandle – pointer to i2c_slave_handle_t structure which stores the transfer state

FSL_I2C_DRIVER_VERSION

I2C driver version.

I2C status return codes.

Values:

enumerator kStatus_I2C_Busy

I2C is busy with current transfer.

enumerator kStatus_I2C_Idle

Bus is Idle.

enumerator kStatus_I2C_Nak

NAK received during transfer.

enumerator kStatus_I2C_ArbitrationLost

Arbitration lost during transfer.

enumerator kStatus_I2C_Timeout

Timeout polling status flags.

enumerator kStatus_I2C_Addr_Nak

NAK received during the address probe.

enum _i2c_flags

I2C peripheral flags.

The following status register flags can be cleared:

  • kI2C_ArbitrationLostFlag

  • kI2C_IntPendingFlag

Note

These enumerations are meant to be OR’d together to form a bit mask.

Values:

enumerator kI2C_ReceiveNakFlag

I2C receive NAK flag.

enumerator kI2C_IntPendingFlag

I2C interrupt pending flag.

enumerator kI2C_TransferDirectionFlag

I2C transfer direction flag.

enumerator kI2C_ArbitrationLostFlag

I2C arbitration lost flag.

enumerator kI2C_BusBusyFlag

I2C bus busy flag.

enumerator kI2C_AddressMatchFlag

I2C address match flag.

enumerator kI2C_TransferCompleteFlag

I2C transfer complete flag.

enum _i2c_interrupt_enable

I2C feature interrupt source.

Values:

enumerator kI2C_GlobalInterruptEnable

I2C global interrupt.

enum _i2c_direction

The direction of master and slave transfers.

Values:

enumerator kI2C_Write

Master transmits to the slave.

enumerator kI2C_Read

Master receives from the slave.

enum _i2c_master_transfer_flags

I2C transfer control flag.

Values:

enumerator kI2C_TransferDefaultFlag

A transfer starts with a start signal, stops with a stop signal.

enumerator kI2C_TransferNoStartFlag

A transfer starts without a start signal, only support write only or write+read with no start flag, do not support read only with no start flag.

enumerator kI2C_TransferRepeatedStartFlag

A transfer starts with a repeated start signal.

enumerator kI2C_TransferNoStopFlag

A transfer ends without a stop signal.

enum _i2c_slave_transfer_event

Set of events sent to the callback for nonblocking slave transfers.

These event enumerations are used for two related purposes. First, a bit mask created by OR’ing together events is passed to I2C_SlaveTransferNonBlocking() to specify which events to enable. Then, when the slave callback is invoked, it is passed the current event through its transfer parameter.

Note

These enumerations are meant to be OR’d together to form a bit mask of events.

Values:

enumerator kI2C_SlaveAddressMatchEvent

Received the slave address after a start or repeated start.

enumerator kI2C_SlaveTransmitEvent

A callback is requested to provide data to transmit (slave-transmitter role).

enumerator kI2C_SlaveReceiveEvent

A callback is requested to provide a buffer in which to place received data (slave-receiver role).

enumerator kI2C_SlaveTransmitAckEvent

A callback needs to either transmit an ACK or NACK.

enumerator kI2C_SlaveCompletionEvent

A stop was detected or finished transfer, completing the transfer.

enumerator kI2C_SlaveAllEvents

A bit mask of all available events.

typedef enum _i2c_direction i2c_direction_t

The direction of master and slave transfers.

typedef struct _i2c_master_config i2c_master_config_t

I2C master user configuration.

typedef struct _i2c_master_handle i2c_master_handle_t

I2C master handle typedef.

typedef void (*i2c_master_transfer_callback_t)(I2C_Type *base, i2c_master_handle_t *handle, status_t status, void *userData)

I2C master transfer callback typedef.

typedef struct _i2c_master_transfer i2c_master_transfer_t

I2C master transfer structure.

typedef enum _i2c_slave_transfer_event i2c_slave_transfer_event_t

Set of events sent to the callback for nonblocking slave transfers.

These event enumerations are used for two related purposes. First, a bit mask created by OR’ing together events is passed to I2C_SlaveTransferNonBlocking() to specify which events to enable. Then, when the slave callback is invoked, it is passed the current event through its transfer parameter.

Note

These enumerations are meant to be OR’d together to form a bit mask of events.

typedef struct _i2c_slave_handle i2c_slave_handle_t

I2C slave handle typedef.

typedef struct _i2c_slave_config i2c_slave_config_t

I2C slave user configuration.

typedef struct _i2c_slave_transfer i2c_slave_transfer_t

I2C slave transfer structure.

typedef void (*i2c_slave_transfer_callback_t)(I2C_Type *base, i2c_slave_transfer_t *xfer, void *userData)

I2C slave transfer callback typedef.

I2C_RETRY_TIMES

Retry times for waiting flag.

struct _i2c_master_config
#include <fsl_i2c.h>

I2C master user configuration.

Public Members

bool enableMaster

Enables the I2C peripheral at initialization time.

uint32_t baudRate_Bps

Baud rate configuration of I2C peripheral.

struct _i2c_master_transfer
#include <fsl_i2c.h>

I2C master transfer structure.

Public Members

uint32_t flags

A transfer flag which controls the transfer.

uint8_t slaveAddress

7-bit slave address.

i2c_direction_t direction

A transfer direction, read or write.

uint32_t subaddress

A sub address. Transferred MSB first.

uint8_t subaddressSize

A size of the command buffer.

uint8_t *volatile data

A transfer buffer.

volatile size_t dataSize

A transfer size.

struct _i2c_master_handle
#include <fsl_i2c.h>

I2C master handle structure.

Public Members

i2c_master_transfer_t transfer

I2C master transfer copy.

size_t transferSize

Total bytes to be transferred.

uint8_t state

A transfer state maintained during transfer.

i2c_master_transfer_callback_t completionCallback

A callback function called when the transfer is finished.

void *userData

A callback parameter passed to the callback function.

struct _i2c_slave_config
#include <fsl_i2c.h>

I2C slave user configuration.

Public Members

bool enableSlave

Enables the I2C peripheral at initialization time.

uint16_t slaveAddress

A slave address configuration.

struct _i2c_slave_transfer
#include <fsl_i2c.h>

I2C slave transfer structure.

Public Members

i2c_slave_transfer_event_t event

A reason that the callback is invoked.

uint8_t *volatile data

A transfer buffer.

volatile size_t dataSize

A transfer size.

status_t completionStatus

Success or error code describing how the transfer completed. Only applies for kI2C_SlaveCompletionEvent.

size_t transferredCount

A number of bytes actually transferred since the start or since the last repeated start.

struct _i2c_slave_handle
#include <fsl_i2c.h>

I2C slave handle structure.

Public Members

volatile uint8_t state

A transfer state maintained during transfer.

i2c_slave_transfer_t transfer

I2C slave transfer copy.

uint32_t eventMask

A mask of enabled events.

i2c_slave_transfer_callback_t callback

A callback function called at the transfer event.

void *userData

A callback parameter passed to the callback.

Iomuxc_driver

static inline void IOMUXC_SetPinMux(uint32_t muxRegister, uint32_t muxMode, uint32_t inputRegister, uint32_t inputDaisy, uint32_t configRegister, uint32_t inputOnfield)

Sets the IOMUXC pin mux mode.

This is an example to set the I2C4_SDA as the pwm1_OUT:

IOMUXC_SetPinMux(IOMUXC_I2C4_SDA_PWM1_OUT, 0);

Note

The first five parameters can be filled with the pin function ID macros.

Parameters:
  • muxRegister – The pin mux register_

  • muxMode – The pin mux mode_

  • inputRegister – The select input register_

  • inputDaisy – The input daisy_

  • configRegister – The config register_

  • inputOnfield – The pad->module input inversion_

static inline void IOMUXC_SetPinConfig(uint32_t muxRegister, uint32_t muxMode, uint32_t inputRegister, uint32_t inputDaisy, uint32_t configRegister, uint32_t configValue)

Sets the IOMUXC pin configuration.

This is an example to set pin configuration for IOMUXC_I2C4_SDA_PWM1_OUT:

IOMUXC_SetPinConfig(IOMUXC_I2C4_SDA_PWM1_OUT, IOMUXC_SW_PAD_CTL_PAD_ODE_MASK | IOMUXC0_SW_PAD_CTL_PAD_DSE(2U))

Note

The previous five parameters can be filled with the pin function ID macros.

Parameters:
  • muxRegister – The pin mux register_

  • muxMode – The pin mux mode_

  • inputRegister – The select input register_

  • inputDaisy – The input daisy_

  • configRegister – The config register_

  • configValue – The pin config value_

FSL_IOMUXC_DRIVER_VERSION

IOMUXC driver version 2.0.1.

IOMUXC_PMIC_STBY_REQ
IOMUXC_PMIC_ON_REQ
IOMUXC_ONOFF
IOMUXC_POR_B
IOMUXC_RTC_RESET_B
IOMUXC_GPIO1_IO00_GPIO1_IO00
IOMUXC_GPIO1_IO00_CCM_ENET_PHY_REF_CLK_ROOT
IOMUXC_GPIO1_IO00_XTALOSC_REF_CLK_32K
IOMUXC_GPIO1_IO00_CCM_EXT_CLK1
IOMUXC_GPIO1_IO01_GPIO1_IO01
IOMUXC_GPIO1_IO01_PWM1_OUT
IOMUXC_GPIO1_IO01_XTALOSC_REF_CLK_24M
IOMUXC_GPIO1_IO01_CCM_EXT_CLK2
IOMUXC_GPIO1_IO02_GPIO1_IO02
IOMUXC_GPIO1_IO02_WDOG1_WDOG_B
IOMUXC_GPIO1_IO02_WDOG1_WDOG_ANY
IOMUXC_GPIO1_IO03_GPIO1_IO03
IOMUXC_GPIO1_IO03_USDHC1_VSELECT
IOMUXC_GPIO1_IO03_SDMA1_EXT_EVENT0
IOMUXC_GPIO1_IO04_GPIO1_IO04
IOMUXC_GPIO1_IO04_USDHC2_VSELECT
IOMUXC_GPIO1_IO04_SDMA1_EXT_EVENT1
IOMUXC_GPIO1_IO05_GPIO1_IO05
IOMUXC_GPIO1_IO05_M4_NMI
IOMUXC_GPIO1_IO05_CCM_PMIC_READY
IOMUXC_GPIO1_IO06_GPIO1_IO06
IOMUXC_GPIO1_IO06_ENET1_MDC
IOMUXC_GPIO1_IO06_USDHC1_CD_B
IOMUXC_GPIO1_IO06_CCM_EXT_CLK3
IOMUXC_GPIO1_IO07_GPIO1_IO07
IOMUXC_GPIO1_IO07_ENET1_MDIO
IOMUXC_GPIO1_IO07_USDHC1_WP
IOMUXC_GPIO1_IO07_CCM_EXT_CLK4
IOMUXC_GPIO1_IO08_GPIO1_IO08
IOMUXC_GPIO1_IO08_ENET1_1588_EVENT0_IN
IOMUXC_GPIO1_IO08_USDHC2_RESET_B
IOMUXC_GPIO1_IO09_GPIO1_IO09
IOMUXC_GPIO1_IO09_ENET1_1588_EVENT0_OUT
IOMUXC_GPIO1_IO09_SDMA2_EXT_EVENT0
IOMUXC_GPIO1_IO10_GPIO1_IO10
IOMUXC_GPIO1_IO10_USB1_OTG_ID
IOMUXC_GPIO1_IO11_GPIO1_IO11
IOMUXC_GPIO1_IO11_USB2_OTG_ID
IOMUXC_GPIO1_IO11_CCM_PMIC_READY
IOMUXC_GPIO1_IO12_GPIO1_IO12
IOMUXC_GPIO1_IO12_USB1_OTG_PWR
IOMUXC_GPIO1_IO12_SDMA2_EXT_EVENT1
IOMUXC_GPIO1_IO13_GPIO1_IO13
IOMUXC_GPIO1_IO13_USB1_OTG_OC
IOMUXC_GPIO1_IO13_PWM2_OUT
IOMUXC_GPIO1_IO14_GPIO1_IO14
IOMUXC_GPIO1_IO14_USB2_OTG_PWR
IOMUXC_GPIO1_IO14_PWM3_OUT
IOMUXC_GPIO1_IO14_CCM_CLKO1
IOMUXC_GPIO1_IO15_GPIO1_IO15
IOMUXC_GPIO1_IO15_USB2_OTG_OC
IOMUXC_GPIO1_IO15_PWM4_OUT
IOMUXC_GPIO1_IO15_CCM_CLKO2
IOMUXC_ENET_MDC_ENET1_MDC
IOMUXC_ENET_MDC_GPIO1_IO16
IOMUXC_ENET_MDIO_ENET1_MDIO
IOMUXC_ENET_MDIO_GPIO1_IO17
IOMUXC_ENET_TD3_ENET1_RGMII_TD3
IOMUXC_ENET_TD3_GPIO1_IO18
IOMUXC_ENET_TD2_ENET1_RGMII_TD2
IOMUXC_ENET_TD2_ENET1_TX_CLK
IOMUXC_ENET_TD2_GPIO1_IO19
IOMUXC_ENET_TD1_ENET1_RGMII_TD1
IOMUXC_ENET_TD1_GPIO1_IO20
IOMUXC_ENET_TD0_ENET1_RGMII_TD0
IOMUXC_ENET_TD0_GPIO1_IO21
IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL
IOMUXC_ENET_TX_CTL_GPIO1_IO22
IOMUXC_ENET_TXC_ENET1_RGMII_TXC
IOMUXC_ENET_TXC_ENET1_TX_ER
IOMUXC_ENET_TXC_GPIO1_IO23
IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL
IOMUXC_ENET_RX_CTL_GPIO1_IO24
IOMUXC_ENET_RXC_ENET1_RGMII_RXC
IOMUXC_ENET_RXC_ENET1_RX_ER
IOMUXC_ENET_RXC_GPIO1_IO25
IOMUXC_ENET_RD0_ENET1_RGMII_RD0
IOMUXC_ENET_RD0_GPIO1_IO26
IOMUXC_ENET_RD1_ENET1_RGMII_RD1
IOMUXC_ENET_RD1_GPIO1_IO27
IOMUXC_ENET_RD2_ENET1_RGMII_RD2
IOMUXC_ENET_RD2_GPIO1_IO28
IOMUXC_ENET_RD3_ENET1_RGMII_RD3
IOMUXC_ENET_RD3_GPIO1_IO29
IOMUXC_SD1_CLK_USDHC1_CLK
IOMUXC_SD1_CLK_GPIO2_IO00
IOMUXC_SD1_CMD_USDHC1_CMD
IOMUXC_SD1_CMD_GPIO2_IO01
IOMUXC_SD1_DATA0_USDHC1_DATA0
IOMUXC_SD1_DATA0_GPIO2_IO02
IOMUXC_SD1_DATA1_USDHC1_DATA1
IOMUXC_SD1_DATA1_GPIO2_IO03
IOMUXC_SD1_DATA2_USDHC1_DATA2
IOMUXC_SD1_DATA2_GPIO2_IO04
IOMUXC_SD1_DATA3_USDHC1_DATA3
IOMUXC_SD1_DATA3_GPIO2_IO05
IOMUXC_SD1_DATA4_USDHC1_DATA4
IOMUXC_SD1_DATA4_GPIO2_IO06
IOMUXC_SD1_DATA5_USDHC1_DATA5
IOMUXC_SD1_DATA5_GPIO2_IO07
IOMUXC_SD1_DATA6_USDHC1_DATA6
IOMUXC_SD1_DATA6_GPIO2_IO08
IOMUXC_SD1_DATA7_USDHC1_DATA7
IOMUXC_SD1_DATA7_GPIO2_IO09
IOMUXC_SD1_RESET_B_USDHC1_RESET_B
IOMUXC_SD1_RESET_B_GPIO2_IO10
IOMUXC_SD1_STROBE_USDHC1_STROBE
IOMUXC_SD1_STROBE_GPIO2_IO11
IOMUXC_SD2_CD_B_USDHC2_CD_B
IOMUXC_SD2_CD_B_GPIO2_IO12
IOMUXC_SD2_CLK_USDHC2_CLK
IOMUXC_SD2_CLK_GPIO2_IO13
IOMUXC_SD2_CMD_USDHC2_CMD
IOMUXC_SD2_CMD_GPIO2_IO14
IOMUXC_SD2_DATA0_USDHC2_DATA0
IOMUXC_SD2_DATA0_GPIO2_IO15
IOMUXC_SD2_DATA1_USDHC2_DATA1
IOMUXC_SD2_DATA1_GPIO2_IO16
IOMUXC_SD2_DATA2_USDHC2_DATA2
IOMUXC_SD2_DATA2_GPIO2_IO17
IOMUXC_SD2_DATA3_USDHC2_DATA3
IOMUXC_SD2_DATA3_GPIO2_IO18
IOMUXC_SD2_RESET_B_USDHC2_RESET_B
IOMUXC_SD2_RESET_B_GPIO2_IO19
IOMUXC_SD2_WP_USDHC2_WP
IOMUXC_SD2_WP_GPIO2_IO20
IOMUXC_NAND_ALE_RAWNAND_ALE
IOMUXC_NAND_ALE_QSPI_A_SCLK
IOMUXC_NAND_ALE_GPIO3_IO00
IOMUXC_NAND_CE0_B_RAWNAND_CE0_B
IOMUXC_NAND_CE0_B_QSPI_A_SS0_B
IOMUXC_NAND_CE0_B_GPIO3_IO01
IOMUXC_NAND_CE1_B_RAWNAND_CE1_B
IOMUXC_NAND_CE1_B_QSPI_A_SS1_B
IOMUXC_NAND_CE1_B_GPIO3_IO02
IOMUXC_NAND_CE2_B_RAWNAND_CE2_B
IOMUXC_NAND_CE2_B_QSPI_B_SS0_B
IOMUXC_NAND_CE2_B_GPIO3_IO03
IOMUXC_NAND_CE3_B_RAWNAND_CE3_B
IOMUXC_NAND_CE3_B_QSPI_B_SS1_B
IOMUXC_NAND_CE3_B_GPIO3_IO04
IOMUXC_NAND_CLE_RAWNAND_CLE
IOMUXC_NAND_CLE_QSPI_B_SCLK
IOMUXC_NAND_CLE_GPIO3_IO05
IOMUXC_NAND_DATA00_RAWNAND_DATA00
IOMUXC_NAND_DATA00_QSPI_A_DATA0
IOMUXC_NAND_DATA00_GPIO3_IO06
IOMUXC_NAND_DATA01_RAWNAND_DATA01
IOMUXC_NAND_DATA01_QSPI_A_DATA1
IOMUXC_NAND_DATA01_GPIO3_IO07
IOMUXC_NAND_DATA02_RAWNAND_DATA02
IOMUXC_NAND_DATA02_QSPI_A_DATA2
IOMUXC_NAND_DATA02_GPIO3_IO08
IOMUXC_NAND_DATA03_RAWNAND_DATA03
IOMUXC_NAND_DATA03_QSPI_A_DATA3
IOMUXC_NAND_DATA03_GPIO3_IO09
IOMUXC_NAND_DATA04_RAWNAND_DATA04
IOMUXC_NAND_DATA04_QSPI_B_DATA0
IOMUXC_NAND_DATA04_GPIO3_IO10
IOMUXC_NAND_DATA05_RAWNAND_DATA05
IOMUXC_NAND_DATA05_QSPI_B_DATA1
IOMUXC_NAND_DATA05_GPIO3_IO11
IOMUXC_NAND_DATA06_RAWNAND_DATA06
IOMUXC_NAND_DATA06_QSPI_B_DATA2
IOMUXC_NAND_DATA06_GPIO3_IO12
IOMUXC_NAND_DATA07_RAWNAND_DATA07
IOMUXC_NAND_DATA07_QSPI_B_DATA3
IOMUXC_NAND_DATA07_GPIO3_IO13
IOMUXC_NAND_DQS_RAWNAND_DQS
IOMUXC_NAND_DQS_QSPI_A_DQS
IOMUXC_NAND_DQS_GPIO3_IO14
IOMUXC_NAND_RE_B_RAWNAND_RE_B
IOMUXC_NAND_RE_B_QSPI_B_DQS
IOMUXC_NAND_RE_B_GPIO3_IO15
IOMUXC_NAND_READY_B_RAWNAND_READY_B
IOMUXC_NAND_READY_B_GPIO3_IO16
IOMUXC_NAND_WE_B_RAWNAND_WE_B
IOMUXC_NAND_WE_B_GPIO3_IO17
IOMUXC_NAND_WP_B_RAWNAND_WP_B
IOMUXC_NAND_WP_B_GPIO3_IO18
IOMUXC_SAI5_RXFS_SAI5_RX_SYNC
IOMUXC_SAI5_RXFS_SAI1_TX_DATA0
IOMUXC_SAI5_RXFS_GPIO3_IO19
IOMUXC_SAI5_RXC_SAI5_RX_BCLK
IOMUXC_SAI5_RXC_SAI1_TX_DATA1
IOMUXC_SAI5_RXC_GPIO3_IO20
IOMUXC_SAI5_RXD0_SAI5_RX_DATA0
IOMUXC_SAI5_RXD0_SAI1_TX_DATA2
IOMUXC_SAI5_RXD0_GPIO3_IO21
IOMUXC_SAI5_RXD1_SAI5_RX_DATA1
IOMUXC_SAI5_RXD1_SAI1_TX_DATA3
IOMUXC_SAI5_RXD1_SAI1_TX_SYNC
IOMUXC_SAI5_RXD1_SAI5_TX_SYNC
IOMUXC_SAI5_RXD1_GPIO3_IO22
IOMUXC_SAI5_RXD2_SAI5_RX_DATA2
IOMUXC_SAI5_RXD2_SAI1_TX_DATA4
IOMUXC_SAI5_RXD2_SAI1_TX_SYNC
IOMUXC_SAI5_RXD2_SAI5_TX_BCLK
IOMUXC_SAI5_RXD2_GPIO3_IO23
IOMUXC_SAI5_RXD3_SAI5_RX_DATA3
IOMUXC_SAI5_RXD3_SAI1_TX_DATA5
IOMUXC_SAI5_RXD3_SAI1_TX_SYNC
IOMUXC_SAI5_RXD3_SAI5_TX_DATA0
IOMUXC_SAI5_RXD3_GPIO3_IO24
IOMUXC_SAI5_MCLK_SAI5_MCLK
IOMUXC_SAI5_MCLK_SAI1_TX_BCLK
IOMUXC_SAI5_MCLK_SAI4_MCLK
IOMUXC_SAI5_MCLK_GPIO3_IO25
IOMUXC_SAI1_RXFS_SAI1_RX_SYNC
IOMUXC_SAI1_RXFS_SAI5_RX_SYNC
IOMUXC_SAI1_RXFS_CORESIGHT_TRACE_CLK
IOMUXC_SAI1_RXFS_GPIO4_IO00
IOMUXC_SAI1_RXC_SAI1_RX_BCLK
IOMUXC_SAI1_RXC_SAI5_RX_BCLK
IOMUXC_SAI1_RXC_CORESIGHT_TRACE_CTL
IOMUXC_SAI1_RXC_GPIO4_IO01
IOMUXC_SAI1_RXD0_SAI1_RX_DATA0
IOMUXC_SAI1_RXD0_SAI5_RX_DATA0
IOMUXC_SAI1_RXD0_CORESIGHT_TRACE0
IOMUXC_SAI1_RXD0_GPIO4_IO02
IOMUXC_SAI1_RXD0_SRC_BOOT_CFG0
IOMUXC_SAI1_RXD1_SAI1_RX_DATA1
IOMUXC_SAI1_RXD1_SAI5_RX_DATA1
IOMUXC_SAI1_RXD1_CORESIGHT_TRACE1
IOMUXC_SAI1_RXD1_GPIO4_IO03
IOMUXC_SAI1_RXD1_SRC_BOOT_CFG1
IOMUXC_SAI1_RXD2_SAI1_RX_DATA2
IOMUXC_SAI1_RXD2_SAI5_RX_DATA2
IOMUXC_SAI1_RXD2_CORESIGHT_TRACE2
IOMUXC_SAI1_RXD2_GPIO4_IO04
IOMUXC_SAI1_RXD2_SRC_BOOT_CFG2
IOMUXC_SAI1_RXD3_SAI1_RX_DATA3
IOMUXC_SAI1_RXD3_SAI5_RX_DATA3
IOMUXC_SAI1_RXD3_CORESIGHT_TRACE3
IOMUXC_SAI1_RXD3_GPIO4_IO05
IOMUXC_SAI1_RXD3_SRC_BOOT_CFG3
IOMUXC_SAI1_RXD4_SAI1_RX_DATA4
IOMUXC_SAI1_RXD4_SAI6_TX_BCLK
IOMUXC_SAI1_RXD4_SAI6_RX_BCLK
IOMUXC_SAI1_RXD4_CORESIGHT_TRACE4
IOMUXC_SAI1_RXD4_GPIO4_IO06
IOMUXC_SAI1_RXD4_SRC_BOOT_CFG4
IOMUXC_SAI1_RXD5_SAI1_RX_DATA5
IOMUXC_SAI1_RXD5_SAI6_TX_DATA0
IOMUXC_SAI1_RXD5_SAI6_RX_DATA0
IOMUXC_SAI1_RXD5_SAI1_RX_SYNC
IOMUXC_SAI1_RXD5_CORESIGHT_TRACE5
IOMUXC_SAI1_RXD5_GPIO4_IO07
IOMUXC_SAI1_RXD5_SRC_BOOT_CFG5
IOMUXC_SAI1_RXD6_SAI1_RX_DATA6
IOMUXC_SAI1_RXD6_SAI6_TX_SYNC
IOMUXC_SAI1_RXD6_SAI6_RX_SYNC
IOMUXC_SAI1_RXD6_CORESIGHT_TRACE6
IOMUXC_SAI1_RXD6_GPIO4_IO08
IOMUXC_SAI1_RXD6_SRC_BOOT_CFG6
IOMUXC_SAI1_RXD7_SAI1_RX_DATA7
IOMUXC_SAI1_RXD7_SAI6_MCLK
IOMUXC_SAI1_RXD7_SAI1_TX_SYNC
IOMUXC_SAI1_RXD7_SAI1_TX_DATA4
IOMUXC_SAI1_RXD7_CORESIGHT_TRACE7
IOMUXC_SAI1_RXD7_GPIO4_IO09
IOMUXC_SAI1_RXD7_SRC_BOOT_CFG7
IOMUXC_SAI1_TXFS_SAI1_TX_SYNC
IOMUXC_SAI1_TXFS_SAI5_TX_SYNC
IOMUXC_SAI1_TXFS_CORESIGHT_EVENTO
IOMUXC_SAI1_TXFS_GPIO4_IO10
IOMUXC_SAI1_TXC_SAI1_TX_BCLK
IOMUXC_SAI1_TXC_SAI5_TX_BCLK
IOMUXC_SAI1_TXC_CORESIGHT_EVENTI
IOMUXC_SAI1_TXC_GPIO4_IO11
IOMUXC_SAI1_TXD0_SAI1_TX_DATA0
IOMUXC_SAI1_TXD0_SAI5_TX_DATA0
IOMUXC_SAI1_TXD0_CORESIGHT_TRACE8
IOMUXC_SAI1_TXD0_GPIO4_IO12
IOMUXC_SAI1_TXD0_SRC_BOOT_CFG8
IOMUXC_SAI1_TXD1_SAI1_TX_DATA1
IOMUXC_SAI1_TXD1_SAI5_TX_DATA1
IOMUXC_SAI1_TXD1_CORESIGHT_TRACE9
IOMUXC_SAI1_TXD1_GPIO4_IO13
IOMUXC_SAI1_TXD1_SRC_BOOT_CFG9
IOMUXC_SAI1_TXD2_SAI1_TX_DATA2
IOMUXC_SAI1_TXD2_SAI5_TX_DATA2
IOMUXC_SAI1_TXD2_CORESIGHT_TRACE10
IOMUXC_SAI1_TXD2_GPIO4_IO14
IOMUXC_SAI1_TXD2_SRC_BOOT_CFG10
IOMUXC_SAI1_TXD3_SAI1_TX_DATA3
IOMUXC_SAI1_TXD3_SAI5_TX_DATA3
IOMUXC_SAI1_TXD3_CORESIGHT_TRACE11
IOMUXC_SAI1_TXD3_GPIO4_IO15
IOMUXC_SAI1_TXD3_SRC_BOOT_CFG11
IOMUXC_SAI1_TXD4_SAI1_TX_DATA4
IOMUXC_SAI1_TXD4_SAI6_RX_BCLK
IOMUXC_SAI1_TXD4_SAI6_TX_BCLK
IOMUXC_SAI1_TXD4_CORESIGHT_TRACE12
IOMUXC_SAI1_TXD4_GPIO4_IO16
IOMUXC_SAI1_TXD4_SRC_BOOT_CFG12
IOMUXC_SAI1_TXD5_SAI1_TX_DATA5
IOMUXC_SAI1_TXD5_SAI6_RX_DATA0
IOMUXC_SAI1_TXD5_SAI6_TX_DATA0
IOMUXC_SAI1_TXD5_CORESIGHT_TRACE13
IOMUXC_SAI1_TXD5_GPIO4_IO17
IOMUXC_SAI1_TXD5_SRC_BOOT_CFG13
IOMUXC_SAI1_TXD6_SAI1_TX_DATA6
IOMUXC_SAI1_TXD6_SAI6_RX_SYNC
IOMUXC_SAI1_TXD6_SAI6_TX_SYNC
IOMUXC_SAI1_TXD6_CORESIGHT_TRACE14
IOMUXC_SAI1_TXD6_GPIO4_IO18
IOMUXC_SAI1_TXD6_SRC_BOOT_CFG14
IOMUXC_SAI1_TXD7_SAI1_TX_DATA7
IOMUXC_SAI1_TXD7_SAI6_MCLK
IOMUXC_SAI1_TXD7_CORESIGHT_TRACE15
IOMUXC_SAI1_TXD7_GPIO4_IO19
IOMUXC_SAI1_TXD7_SRC_BOOT_CFG15
IOMUXC_SAI1_MCLK_SAI1_MCLK
IOMUXC_SAI1_MCLK_SAI5_MCLK
IOMUXC_SAI1_MCLK_SAI1_TX_BCLK
IOMUXC_SAI1_MCLK_GPIO4_IO20
IOMUXC_SAI2_RXFS_SAI2_RX_SYNC
IOMUXC_SAI2_RXFS_SAI5_TX_SYNC
IOMUXC_SAI2_RXFS_GPIO4_IO21
IOMUXC_SAI2_RXC_SAI2_RX_BCLK
IOMUXC_SAI2_RXC_SAI5_TX_BCLK
IOMUXC_SAI2_RXC_GPIO4_IO22
IOMUXC_SAI2_RXD0_SAI2_RX_DATA0
IOMUXC_SAI2_RXD0_SAI5_TX_DATA0
IOMUXC_SAI2_RXD0_GPIO4_IO23
IOMUXC_SAI2_TXFS_SAI2_TX_SYNC
IOMUXC_SAI2_TXFS_SAI5_TX_DATA1
IOMUXC_SAI2_TXFS_GPIO4_IO24
IOMUXC_SAI2_TXC_SAI2_TX_BCLK
IOMUXC_SAI2_TXC_SAI5_TX_DATA2
IOMUXC_SAI2_TXC_GPIO4_IO25
IOMUXC_SAI2_TXD0_SAI2_TX_DATA0
IOMUXC_SAI2_TXD0_SAI5_TX_DATA3
IOMUXC_SAI2_TXD0_GPIO4_IO26
IOMUXC_SAI2_MCLK_SAI2_MCLK
IOMUXC_SAI2_MCLK_SAI5_MCLK
IOMUXC_SAI2_MCLK_GPIO4_IO27
IOMUXC_SAI3_RXFS_SAI3_RX_SYNC
IOMUXC_SAI3_RXFS_GPT1_CAPTURE1
IOMUXC_SAI3_RXFS_SAI5_RX_SYNC
IOMUXC_SAI3_RXFS_GPIO4_IO28
IOMUXC_SAI3_RXC_SAI3_RX_BCLK
IOMUXC_SAI3_RXC_GPT1_CAPTURE2
IOMUXC_SAI3_RXC_SAI5_RX_BCLK
IOMUXC_SAI3_RXC_GPIO4_IO29
IOMUXC_SAI3_RXD_SAI3_RX_DATA0
IOMUXC_SAI3_RXD_GPT1_COMPARE1
IOMUXC_SAI3_RXD_SAI5_RX_DATA0
IOMUXC_SAI3_RXD_GPIO4_IO30
IOMUXC_SAI3_TXFS_SAI3_TX_SYNC
IOMUXC_SAI3_TXFS_GPT1_CLK
IOMUXC_SAI3_TXFS_SAI5_RX_DATA1
IOMUXC_SAI3_TXFS_GPIO4_IO31
IOMUXC_SAI3_TXC_SAI3_TX_BCLK
IOMUXC_SAI3_TXC_GPT1_COMPARE2
IOMUXC_SAI3_TXC_SAI5_RX_DATA2
IOMUXC_SAI3_TXC_GPIO5_IO00
IOMUXC_SAI3_TXD_SAI3_TX_DATA0
IOMUXC_SAI3_TXD_GPT1_COMPARE3
IOMUXC_SAI3_TXD_SAI5_RX_DATA3
IOMUXC_SAI3_TXD_GPIO5_IO01
IOMUXC_SAI3_MCLK_SAI3_MCLK
IOMUXC_SAI3_MCLK_PWM4_OUT
IOMUXC_SAI3_MCLK_SAI5_MCLK
IOMUXC_SAI3_MCLK_GPIO5_IO02
IOMUXC_SPDIF_TX_SPDIF1_OUT
IOMUXC_SPDIF_TX_PWM3_OUT
IOMUXC_SPDIF_TX_GPIO5_IO03
IOMUXC_SPDIF_RX_SPDIF1_IN
IOMUXC_SPDIF_RX_PWM2_OUT
IOMUXC_SPDIF_RX_GPIO5_IO04
IOMUXC_SPDIF_EXT_CLK_SPDIF1_EXT_CLK
IOMUXC_SPDIF_EXT_CLK_PWM1_OUT
IOMUXC_SPDIF_EXT_CLK_GPIO5_IO05
IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK
IOMUXC_ECSPI1_SCLK_UART3_RX
IOMUXC_ECSPI1_SCLK_UART3_TX
IOMUXC_ECSPI1_SCLK_GPIO5_IO06
IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI
IOMUXC_ECSPI1_MOSI_UART3_TX
IOMUXC_ECSPI1_MOSI_UART3_RX
IOMUXC_ECSPI1_MOSI_GPIO5_IO07
IOMUXC_ECSPI1_MISO_ECSPI1_MISO
IOMUXC_ECSPI1_MISO_UART3_CTS_B
IOMUXC_ECSPI1_MISO_UART3_RTS_B
IOMUXC_ECSPI1_MISO_GPIO5_IO08
IOMUXC_ECSPI1_SS0_ECSPI1_SS0
IOMUXC_ECSPI1_SS0_UART3_RTS_B
IOMUXC_ECSPI1_SS0_UART3_CTS_B
IOMUXC_ECSPI1_SS0_GPIO5_IO09
IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK
IOMUXC_ECSPI2_SCLK_UART4_RX
IOMUXC_ECSPI2_SCLK_UART4_TX
IOMUXC_ECSPI2_SCLK_GPIO5_IO10
IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI
IOMUXC_ECSPI2_MOSI_UART4_TX
IOMUXC_ECSPI2_MOSI_UART4_RX
IOMUXC_ECSPI2_MOSI_GPIO5_IO11
IOMUXC_ECSPI2_MISO_ECSPI2_MISO
IOMUXC_ECSPI2_MISO_UART4_CTS_B
IOMUXC_ECSPI2_MISO_UART4_RTS_B
IOMUXC_ECSPI2_MISO_GPIO5_IO12
IOMUXC_ECSPI2_SS0_ECSPI2_SS0
IOMUXC_ECSPI2_SS0_UART4_RTS_B
IOMUXC_ECSPI2_SS0_UART4_CTS_B
IOMUXC_ECSPI2_SS0_GPIO5_IO13
IOMUXC_I2C1_SCL_I2C1_SCL
IOMUXC_I2C1_SCL_ENET1_MDC
IOMUXC_I2C1_SCL_GPIO5_IO14
IOMUXC_I2C1_SDA_I2C1_SDA
IOMUXC_I2C1_SDA_ENET1_MDIO
IOMUXC_I2C1_SDA_GPIO5_IO15
IOMUXC_I2C2_SCL_I2C2_SCL
IOMUXC_I2C2_SCL_ENET1_1588_EVENT1_IN
IOMUXC_I2C2_SCL_GPIO5_IO16
IOMUXC_I2C2_SDA_I2C2_SDA
IOMUXC_I2C2_SDA_ENET1_1588_EVENT1_OUT
IOMUXC_I2C2_SDA_GPIO5_IO17
IOMUXC_I2C3_SCL_I2C3_SCL
IOMUXC_I2C3_SCL_PWM4_OUT
IOMUXC_I2C3_SCL_GPT2_CLK
IOMUXC_I2C3_SCL_GPIO5_IO18
IOMUXC_I2C3_SDA_I2C3_SDA
IOMUXC_I2C3_SDA_PWM3_OUT
IOMUXC_I2C3_SDA_GPT3_CLK
IOMUXC_I2C3_SDA_GPIO5_IO19
IOMUXC_I2C4_SCL_I2C4_SCL
IOMUXC_I2C4_SCL_PWM2_OUT
IOMUXC_I2C4_SCL_PCIE1_CLKREQ_B
IOMUXC_I2C4_SCL_GPIO5_IO20
IOMUXC_I2C4_SDA_I2C4_SDA
IOMUXC_I2C4_SDA_PWM1_OUT
IOMUXC_I2C4_SDA_PCIE2_CLKREQ_B
IOMUXC_I2C4_SDA_GPIO5_IO21
IOMUXC_UART1_RXD_UART1_RX
IOMUXC_UART1_RXD_UART1_TX
IOMUXC_UART1_RXD_ECSPI3_SCLK
IOMUXC_UART1_RXD_GPIO5_IO22
IOMUXC_UART1_TXD_UART1_TX
IOMUXC_UART1_TXD_UART1_RX
IOMUXC_UART1_TXD_ECSPI3_MOSI
IOMUXC_UART1_TXD_GPIO5_IO23
IOMUXC_UART2_RXD_UART2_RX
IOMUXC_UART2_RXD_UART2_TX
IOMUXC_UART2_RXD_ECSPI3_MISO
IOMUXC_UART2_RXD_GPIO5_IO24
IOMUXC_UART2_TXD_UART2_TX
IOMUXC_UART2_TXD_UART2_RX
IOMUXC_UART2_TXD_ECSPI3_SS0
IOMUXC_UART2_TXD_GPIO5_IO25
IOMUXC_UART3_RXD_UART3_RX
IOMUXC_UART3_RXD_UART3_TX
IOMUXC_UART3_RXD_UART1_CTS_B
IOMUXC_UART3_RXD_UART1_RTS_B
IOMUXC_UART3_RXD_GPIO5_IO26
IOMUXC_UART3_TXD_UART3_TX
IOMUXC_UART3_TXD_UART3_RX
IOMUXC_UART3_TXD_UART1_RTS_B
IOMUXC_UART3_TXD_UART1_CTS_B
IOMUXC_UART3_TXD_GPIO5_IO27
IOMUXC_UART4_RXD_UART4_RX
IOMUXC_UART4_RXD_UART4_TX
IOMUXC_UART4_RXD_UART2_CTS_B
IOMUXC_UART4_RXD_UART2_RTS_B
IOMUXC_UART4_RXD_PCIE1_CLKREQ_B
IOMUXC_UART4_RXD_GPIO5_IO28
IOMUXC_UART4_TXD_UART4_TX
IOMUXC_UART4_TXD_UART4_RX
IOMUXC_UART4_TXD_UART2_RTS_B
IOMUXC_UART4_TXD_UART2_CTS_B
IOMUXC_UART4_TXD_PCIE2_CLKREQ_B
IOMUXC_UART4_TXD_GPIO5_IO29
IOMUXC_TEST_MODE
IOMUXC_BOOT_MODE0
IOMUXC_BOOT_MODE1
IOMUXC_JTAG_MOD
IOMUXC_JTAG_TRST_B
IOMUXC_JTAG_TDI
IOMUXC_JTAG_TMS
IOMUXC_JTAG_TCK
IOMUXC_JTAG_TDO
IOMUXC_RTC
FSL_COMPONENT_ID

IRQSTEER: Interrupt Request Steering Driver

void IRQSTEER_Init(IRQSTEER_Type *base)

Initializes the IRQSTEER module.

This function enables the clock gate for the specified IRQSTEER.

Parameters:
  • base – IRQSTEER peripheral base address.

void IRQSTEER_Deinit(IRQSTEER_Type *base)

Deinitializes an IRQSTEER instance for operation.

The clock gate for the specified IRQSTEER is disabled.

Parameters:
  • base – IRQSTEER peripheral base address.

static inline void IRQSTEER_EnableInterrupt(IRQSTEER_Type *base, IRQn_Type irq)

Enables an interrupt source.

Parameters:
  • base – IRQSTEER peripheral base address.

  • irq – Interrupt to be routed. The interrupt must be an IRQSTEER source.

static inline void IRQSTEER_DisableInterrupt(IRQSTEER_Type *base, IRQn_Type irq)

Disables an interrupt source.

Parameters:
  • base – IRQSTEER peripheral base address.

  • irq – Interrupt source number. The interrupt must be an IRQSTEER source.

static inline bool IRQSTEER_InterruptIsEnabled(IRQSTEER_Type *base, IRQn_Type irq)

Check if an interrupt source is enabled.

Parameters:
  • base – IRQSTEER peripheral base address.

  • irq – Interrupt to be queried. The interrupt must be an IRQSTEER source.

Returns:

true if the interrupt is not masked, false otherwise.

static inline void IRQSTEER_SetInterrupt(IRQSTEER_Type *base, IRQn_Type irq, bool set)

Sets/Forces an interrupt.

Note

This function is not affected by the function IRQSTEER_DisableInterrupt and IRQSTEER_EnableInterrupt.

Parameters:
  • base – IRQSTEER peripheral base address.

  • irq – Interrupt to be set/forced. The interrupt must be an IRQSTEER source.

  • set – Switcher of the interrupt set/force function. “true” means to set. “false” means not (normal operation).

static inline void IRQSTEER_EnableMasterInterrupt(IRQSTEER_Type *base, irqsteer_int_master_t intMasterIndex)

Enables a master interrupt. By default, all the master interrupts are enabled.

For example, to enable the interrupt sources of master 1:

IRQSTEER_EnableMasterInterrupt(IRQSTEER_M4_0, kIRQSTEER_InterruptMaster1);

Parameters:
  • base – IRQSTEER peripheral base address.

  • intMasterIndex – Master index of interrupt sources to be routed, options available in enumeration irqsteer_int_master_t.

static inline void IRQSTEER_DisableMasterInterrupt(IRQSTEER_Type *base, irqsteer_int_master_t intMasterIndex)

Disables a master interrupt.

For example, to disable the interrupt sources of master 1:

IRQSTEER_DisableMasterInterrupt(IRQSTEER_M4_0, kIRQSTEER_InterruptMaster1);

Parameters:
  • base – IRQSTEER peripheral base address.

  • intMasterIndex – Master index of interrupt sources to be disabled, options available in enumeration irqsteer_int_master_t.

static inline bool IRQSTEER_IsInterruptSet(IRQSTEER_Type *base, IRQn_Type irq)

Checks the status of one specific IRQSTEER interrupt.

For example, to check whether interrupt from output 0 of Display 1 is set:

if (IRQSTEER_IsInterruptSet(IRQSTEER_DISPLAY1_INT_OUT0)
{
    ...
}

Parameters:
  • base – IRQSTEER peripheral base address.

  • irq – Interrupt source status to be checked. The interrupt must be an IRQSTEER source.

Returns:

The interrupt status. “true” means interrupt set. “false” means not.

static inline bool IRQSTEER_IsMasterInterruptSet(IRQSTEER_Type *base)

Checks the status of IRQSTEER master interrupt. The master interrupt status represents at least one interrupt is asserted or not among ALL interrupts.

Note

The master interrupt status is not affected by the function IRQSTEER_DisableMasterInterrupt.

Parameters:
  • base – IRQSTEER peripheral base address.

Returns:

The master interrupt status. “true” means at least one interrupt set. “false” means not.

static inline uint32_t IRQSTEER_GetGroupInterruptStatus(IRQSTEER_Type *base, irqsteer_int_group_t intGroupIndex)

Gets the status of IRQSTEER group interrupt. The group interrupt status represents all the interrupt status within the group specified. This API aims for facilitating the status return of one set of interrupts.

Parameters:
  • base – IRQSTEER peripheral base address.

  • intGroupIndex – Index of the interrupt group status to get.

Returns:

The mask of the group interrupt status. Bit[n] set means the source with bit offset n in group intGroupIndex of IRQSTEER is asserted.

IRQn_Type IRQSTEER_GetMasterNextInterrupt(IRQSTEER_Type *base, irqsteer_int_master_t intMasterIndex)

Gets the next interrupt source (currently set) of one specific master.

Parameters:
  • base – IRQSTEER peripheral base address.

  • intMasterIndex – Master index of interrupt sources, options available in enumeration irqsteer_int_master_t.

Returns:

The current set next interrupt source number of one specific master. Return IRQSTEER_INT_Invalid if no interrupt set.

uint32_t IRQSTEER_GetMasterIrqCount(IRQSTEER_Type *base, irqsteer_int_master_t intMasterIndex)

Get the number of interrupt for a given master.

Parameters:
  • base – IRQSTEER peripheral base address.

  • intMasterIndex – Master index of interrupt sources, options available in enumeration irqsteer_int_master_t.

Returns:

Number of interrupts for a given master.

uint64_t IRQSTEER_GetMasterInterruptsStatus(IRQSTEER_Type *base, irqsteer_int_master_t intMasterIndex)

Get the status of the interrupts a master is in charge of.

What this function does is it takes the CHn_STATUS registers associated with the interrupts a master is in charge of and puts them in 64-bit variable. The order they are put in the 64-bit variable is the following: CHn_STATUS[i] : CHn_STATUS[i + 1], where CHn_STATUS[i + 1] is placed in the least significant half of the 64-bit variable. Assuming a master is in charge of 64 interrupts, the user may use the result of this function as such: BIT(i) & IRQSTEER_GetMasterInterrupts() to check if interrupt i is asserted.

Parameters:
  • base – IRQSTEER peripheral base address.

  • intMasterIndex – Master index of interrupt sources, options available in enumeration irqsteer_int_master_t.

Returns:

64-bit variable containing the status of the interrupts a master is in charge of.

FSL_IRQSTEER_DRIVER_VERSION

Driver version.

enum _irqsteer_int_group

IRQSTEER interrupt groups.

Values:

enumerator kIRQSTEER_InterruptGroup0

Interrupt Group 0: interrupt source 31 - 0

enumerator kIRQSTEER_InterruptGroup1

Interrupt Group 1: interrupt source 63 - 32

enumerator kIRQSTEER_InterruptGroup2

Interrupt Group 2: interrupt source 95 - 64

enumerator kIRQSTEER_InterruptGroup3

Interrupt Group 3: interrupt source 127 - 96

enumerator kIRQSTEER_InterruptGroup4

Interrupt Group 4: interrupt source 159 - 128

enumerator kIRQSTEER_InterruptGroup5

Interrupt Group 5: interrupt source 191 - 160

enumerator kIRQSTEER_InterruptGroup6

Interrupt Group 6: interrupt source 223 - 192

enumerator kIRQSTEER_InterruptGroup7

Interrupt Group 7: interrupt source 255 - 224

enumerator kIRQSTEER_InterruptGroup8

Interrupt Group 8: interrupt source 287 - 256

enumerator kIRQSTEER_InterruptGroup9

Interrupt Group 9: interrupt source 319 - 288

enumerator kIRQSTEER_InterruptGroup10

Interrupt Group 10: interrupt source 351 - 320

enumerator kIRQSTEER_InterruptGroup11

Interrupt Group 11: interrupt source 383 - 352

enumerator kIRQSTEER_InterruptGroup12

Interrupt Group 12: interrupt source 415 - 384

enumerator kIRQSTEER_InterruptGroup13

Interrupt Group 13: interrupt source 447 - 416

enumerator kIRQSTEER_InterruptGroup14

Interrupt Group 14: interrupt source 479 - 448

enumerator kIRQSTEER_InterruptGroup15

Interrupt Group 15: interrupt source 511 - 480

enum _irqsteer_int_master

IRQSTEER master interrupts mapping.

Values:

enumerator kIRQSTEER_InterruptMaster0

Interrupt Master 0: interrupt source 63 - 0

enumerator kIRQSTEER_InterruptMaster1

Interrupt Master 1: interrupt source 127 - 64

enumerator kIRQSTEER_InterruptMaster2

Interrupt Master 2: interrupt source 191 - 128

enumerator kIRQSTEER_InterruptMaster3

Interrupt Master 3: interrupt source 255 - 192

enumerator kIRQSTEER_InterruptMaster4

Interrupt Master 4: interrupt source 319 - 256

enumerator kIRQSTEER_InterruptMaster5

Interrupt Master 5: interrupt source 383 - 320

enumerator kIRQSTEER_InterruptMaster6

Interrupt Master 6: interrupt source 447 - 384

enumerator kIRQSTEER_InterruptMaster7

Interrupt Master 7: interrupt source 511 - 448

typedef enum _irqsteer_int_group irqsteer_int_group_t

IRQSTEER interrupt groups.

typedef enum _irqsteer_int_master irqsteer_int_master_t

IRQSTEER master interrupts mapping.

FSL_IRQSTEER_USE_DRIVER_IRQ_HANDLER

Use the IRQSTEER driver IRQ Handler or not.

When define as 1, IRQSTEER driver implements the IRQSTEER ISR, otherwise user shall implement it. Currently the IRQSTEER ISR is only available for Cortex-M platforms.

FSL_IRQSTEER_ENABLE_MASTER_INT

IRQSTEER_Init/IRQSTEER_Deinit enables/disables IRQSTEER master interrupt or not.

When define as 1, IRQSTEER_Init will enable the IRQSTEER master interrupt in system level interrupt controller (such as NVIC, GIC), IRQSTEER_Deinit will disable it. Otherwise IRQSTEER_Init/IRQSTEER_Deinit won’t touch.

IRQSTEER_INT_SRC_REG_WIDTH

IRQSTEER interrupt source register width.

IRQSTEER_INT_MASTER_AGGREGATED_INT_NUM

IRQSTEER aggregated interrupt source number for each master.

IRQSTEER_INT_SRC_REG_INDEX(irq)

IRQSTEER interrupt source mapping register index.

IRQSTEER_INT_SRC_BIT_OFFSET(irq)

IRQSTEER interrupt source mapping bit offset.

IRQSTEER_INT_SRC_NUM(regIndex, bitOffset)

IRQSTEER interrupt source number.

Common Driver

FSL_COMMON_DRIVER_VERSION

common driver version.

DEBUG_CONSOLE_DEVICE_TYPE_NONE

No debug console.

DEBUG_CONSOLE_DEVICE_TYPE_UART

Debug console based on UART.

DEBUG_CONSOLE_DEVICE_TYPE_LPUART

Debug console based on LPUART.

DEBUG_CONSOLE_DEVICE_TYPE_LPSCI

Debug console based on LPSCI.

DEBUG_CONSOLE_DEVICE_TYPE_USBCDC

Debug console based on USBCDC.

DEBUG_CONSOLE_DEVICE_TYPE_FLEXCOMM

Debug console based on FLEXCOMM.

DEBUG_CONSOLE_DEVICE_TYPE_IUART

Debug console based on i.MX UART.

DEBUG_CONSOLE_DEVICE_TYPE_VUSART

Debug console based on LPC_VUSART.

DEBUG_CONSOLE_DEVICE_TYPE_MINI_USART

Debug console based on LPC_USART.

DEBUG_CONSOLE_DEVICE_TYPE_SWO

Debug console based on SWO.

DEBUG_CONSOLE_DEVICE_TYPE_QSCI

Debug console based on QSCI.

MIN(a, b)

Computes the minimum of a and b.

MAX(a, b)

Computes the maximum of a and b.

UINT16_MAX

Max value of uint16_t type.

UINT32_MAX

Max value of uint32_t type.

SDK_ATOMIC_LOCAL_ADD(addr, val)

Add value val from the variable at address address.

SDK_ATOMIC_LOCAL_SUB(addr, val)

Subtract value val to the variable at address address.

SDK_ATOMIC_LOCAL_SET(addr, bits)

Set the bits specifiled by bits to the variable at address address.

SDK_ATOMIC_LOCAL_CLEAR(addr, bits)

Clear the bits specifiled by bits to the variable at address address.

SDK_ATOMIC_LOCAL_TOGGLE(addr, bits)

Toggle the bits specifiled by bits to the variable at address address.

SDK_ATOMIC_LOCAL_CLEAR_AND_SET(addr, clearBits, setBits)

For the variable at address address, clear the bits specifiled by clearBits and set the bits specifiled by setBits.

SDK_ATOMIC_LOCAL_COMPARE_AND_SET(addr, expected, newValue)

For the variable at address address, check whether the value equal to expected. If value same as expected then update newValue to address and return true , else return false .

SDK_ATOMIC_LOCAL_TEST_AND_SET(addr, newValue)

For the variable at address address, set as newValue value and return old value.

USEC_TO_COUNT(us, clockFreqInHz)

Macro to convert a microsecond period to raw count value

COUNT_TO_USEC(count, clockFreqInHz)

Macro to convert a raw count value to microsecond

MSEC_TO_COUNT(ms, clockFreqInHz)

Macro to convert a millisecond period to raw count value

COUNT_TO_MSEC(count, clockFreqInHz)

Macro to convert a raw count value to millisecond

SDK_ISR_EXIT_BARRIER
SDK_SIZEALIGN(var, alignbytes)

Macro to define a variable with L1 d-cache line size alignment

Macro to define a variable with L2 cache line size alignment

Macro to change a value to a given size aligned value

AT_NONCACHEABLE_SECTION(var)

Define a variable var, and place it in non-cacheable section.

AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes)

Define a variable var, and place it in non-cacheable section, the start address of the variable is aligned to alignbytes.

AT_NONCACHEABLE_SECTION_INIT(var)

Define a variable var with initial value, and place it in non-cacheable section.

AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes)

Define a variable var with initial value, and place it in non-cacheable section, the start address of the variable is aligned to alignbytes.

enum _status_groups

Status group numbers.

Values:

enumerator kStatusGroup_Generic

Group number for generic status codes.

enumerator kStatusGroup_FLASH

Group number for FLASH status codes.

enumerator kStatusGroup_LPSPI

Group number for LPSPI status codes.

enumerator kStatusGroup_FLEXIO_SPI

Group number for FLEXIO SPI status codes.

enumerator kStatusGroup_DSPI

Group number for DSPI status codes.

enumerator kStatusGroup_FLEXIO_UART

Group number for FLEXIO UART status codes.

enumerator kStatusGroup_FLEXIO_I2C

Group number for FLEXIO I2C status codes.

enumerator kStatusGroup_LPI2C

Group number for LPI2C status codes.

enumerator kStatusGroup_UART

Group number for UART status codes.

enumerator kStatusGroup_I2C

Group number for UART status codes.

enumerator kStatusGroup_LPSCI

Group number for LPSCI status codes.

enumerator kStatusGroup_LPUART

Group number for LPUART status codes.

enumerator kStatusGroup_SPI

Group number for SPI status code.

enumerator kStatusGroup_XRDC

Group number for XRDC status code.

enumerator kStatusGroup_SEMA42

Group number for SEMA42 status code.

enumerator kStatusGroup_SDHC

Group number for SDHC status code

enumerator kStatusGroup_SDMMC

Group number for SDMMC status code

enumerator kStatusGroup_SAI

Group number for SAI status code

enumerator kStatusGroup_MCG

Group number for MCG status codes.

enumerator kStatusGroup_SCG

Group number for SCG status codes.

enumerator kStatusGroup_SDSPI

Group number for SDSPI status codes.

enumerator kStatusGroup_FLEXIO_I2S

Group number for FLEXIO I2S status codes

enumerator kStatusGroup_FLEXIO_MCULCD

Group number for FLEXIO LCD status codes

enumerator kStatusGroup_FLASHIAP

Group number for FLASHIAP status codes

enumerator kStatusGroup_FLEXCOMM_I2C

Group number for FLEXCOMM I2C status codes

enumerator kStatusGroup_I2S

Group number for I2S status codes

enumerator kStatusGroup_IUART

Group number for IUART status codes

enumerator kStatusGroup_CSI

Group number for CSI status codes

enumerator kStatusGroup_MIPI_DSI

Group number for MIPI DSI status codes

enumerator kStatusGroup_SDRAMC

Group number for SDRAMC status codes.

enumerator kStatusGroup_POWER

Group number for POWER status codes.

enumerator kStatusGroup_ENET

Group number for ENET status codes.

enumerator kStatusGroup_PHY

Group number for PHY status codes.

enumerator kStatusGroup_TRGMUX

Group number for TRGMUX status codes.

enumerator kStatusGroup_SMARTCARD

Group number for SMARTCARD status codes.

enumerator kStatusGroup_LMEM

Group number for LMEM status codes.

enumerator kStatusGroup_QSPI

Group number for QSPI status codes.

enumerator kStatusGroup_DMA

Group number for DMA status codes.

enumerator kStatusGroup_EDMA

Group number for EDMA status codes.

enumerator kStatusGroup_DMAMGR

Group number for DMAMGR status codes.

enumerator kStatusGroup_FLEXCAN

Group number for FlexCAN status codes.

enumerator kStatusGroup_LTC

Group number for LTC status codes.

enumerator kStatusGroup_FLEXIO_CAMERA

Group number for FLEXIO CAMERA status codes.

enumerator kStatusGroup_LPC_SPI

Group number for LPC_SPI status codes.

enumerator kStatusGroup_LPC_USART

Group number for LPC_USART status codes.

enumerator kStatusGroup_DMIC

Group number for DMIC status codes.

enumerator kStatusGroup_SDIF

Group number for SDIF status codes.

enumerator kStatusGroup_SPIFI

Group number for SPIFI status codes.

enumerator kStatusGroup_OTP

Group number for OTP status codes.

enumerator kStatusGroup_MCAN

Group number for MCAN status codes.

enumerator kStatusGroup_CAAM

Group number for CAAM status codes.

enumerator kStatusGroup_ECSPI

Group number for ECSPI status codes.

enumerator kStatusGroup_USDHC

Group number for USDHC status codes.

enumerator kStatusGroup_LPC_I2C

Group number for LPC_I2C status codes.

enumerator kStatusGroup_DCP

Group number for DCP status codes.

enumerator kStatusGroup_MSCAN

Group number for MSCAN status codes.

enumerator kStatusGroup_ESAI

Group number for ESAI status codes.

enumerator kStatusGroup_FLEXSPI

Group number for FLEXSPI status codes.

enumerator kStatusGroup_MMDC

Group number for MMDC status codes.

enumerator kStatusGroup_PDM

Group number for MIC status codes.

enumerator kStatusGroup_SDMA

Group number for SDMA status codes.

enumerator kStatusGroup_ICS

Group number for ICS status codes.

enumerator kStatusGroup_SPDIF

Group number for SPDIF status codes.

enumerator kStatusGroup_LPC_MINISPI

Group number for LPC_MINISPI status codes.

enumerator kStatusGroup_HASHCRYPT

Group number for Hashcrypt status codes

enumerator kStatusGroup_LPC_SPI_SSP

Group number for LPC_SPI_SSP status codes.

enumerator kStatusGroup_I3C

Group number for I3C status codes

enumerator kStatusGroup_LPC_I2C_1

Group number for LPC_I2C_1 status codes.

enumerator kStatusGroup_NOTIFIER

Group number for NOTIFIER status codes.

enumerator kStatusGroup_DebugConsole

Group number for debug console status codes.

enumerator kStatusGroup_SEMC

Group number for SEMC status codes.

enumerator kStatusGroup_ApplicationRangeStart

Starting number for application groups.

enumerator kStatusGroup_IAP

Group number for IAP status codes

enumerator kStatusGroup_SFA

Group number for SFA status codes

enumerator kStatusGroup_SPC

Group number for SPC status codes.

enumerator kStatusGroup_PUF

Group number for PUF status codes.

enumerator kStatusGroup_TOUCH_PANEL

Group number for touch panel status codes

enumerator kStatusGroup_VBAT

Group number for VBAT status codes

enumerator kStatusGroup_XSPI

Group number for XSPI status codes

enumerator kStatusGroup_PNGDEC

Group number for PNGDEC status codes

enumerator kStatusGroup_JPEGDEC

Group number for JPEGDEC status codes

enumerator kStatusGroup_HAL_GPIO

Group number for HAL GPIO status codes.

enumerator kStatusGroup_HAL_UART

Group number for HAL UART status codes.

enumerator kStatusGroup_HAL_TIMER

Group number for HAL TIMER status codes.

enumerator kStatusGroup_HAL_SPI

Group number for HAL SPI status codes.

enumerator kStatusGroup_HAL_I2C

Group number for HAL I2C status codes.

enumerator kStatusGroup_HAL_FLASH

Group number for HAL FLASH status codes.

enumerator kStatusGroup_HAL_PWM

Group number for HAL PWM status codes.

enumerator kStatusGroup_HAL_RNG

Group number for HAL RNG status codes.

enumerator kStatusGroup_HAL_I2S

Group number for HAL I2S status codes.

enumerator kStatusGroup_HAL_ADC_SENSOR

Group number for HAL ADC SENSOR status codes.

enumerator kStatusGroup_TIMERMANAGER

Group number for TiMER MANAGER status codes.

enumerator kStatusGroup_SERIALMANAGER

Group number for SERIAL MANAGER status codes.

enumerator kStatusGroup_LED

Group number for LED status codes.

enumerator kStatusGroup_BUTTON

Group number for BUTTON status codes.

enumerator kStatusGroup_EXTERN_EEPROM

Group number for EXTERN EEPROM status codes.

enumerator kStatusGroup_SHELL

Group number for SHELL status codes.

enumerator kStatusGroup_MEM_MANAGER

Group number for MEM MANAGER status codes.

enumerator kStatusGroup_LIST

Group number for List status codes.

enumerator kStatusGroup_OSA

Group number for OSA status codes.

enumerator kStatusGroup_COMMON_TASK

Group number for Common task status codes.

enumerator kStatusGroup_MSG

Group number for messaging status codes.

enumerator kStatusGroup_SDK_OCOTP

Group number for OCOTP status codes.

enumerator kStatusGroup_SDK_FLEXSPINOR

Group number for FLEXSPINOR status codes.

enumerator kStatusGroup_CODEC

Group number for codec status codes.

enumerator kStatusGroup_ASRC

Group number for codec status ASRC.

enumerator kStatusGroup_OTFAD

Group number for codec status codes.

enumerator kStatusGroup_SDIOSLV

Group number for SDIOSLV status codes.

enumerator kStatusGroup_MECC

Group number for MECC status codes.

enumerator kStatusGroup_ENET_QOS

Group number for ENET_QOS status codes.

enumerator kStatusGroup_LOG

Group number for LOG status codes.

enumerator kStatusGroup_I3CBUS

Group number for I3CBUS status codes.

enumerator kStatusGroup_QSCI

Group number for QSCI status codes.

enumerator kStatusGroup_ELEMU

Group number for ELEMU status codes.

enumerator kStatusGroup_QUEUEDSPI

Group number for QSPI status codes.

enumerator kStatusGroup_POWER_MANAGER

Group number for POWER_MANAGER status codes.

enumerator kStatusGroup_IPED

Group number for IPED status codes.

enumerator kStatusGroup_ELS_PKC

Group number for ELS PKC status codes.

enumerator kStatusGroup_CSS_PKC

Group number for CSS PKC status codes.

enumerator kStatusGroup_HOSTIF

Group number for HOSTIF status codes.

enumerator kStatusGroup_CLIF

Group number for CLIF status codes.

enumerator kStatusGroup_BMA

Group number for BMA status codes.

enumerator kStatusGroup_NETC

Group number for NETC status codes.

enumerator kStatusGroup_ELE

Group number for ELE status codes.

enumerator kStatusGroup_GLIKEY

Group number for GLIKEY status codes.

enumerator kStatusGroup_AON_POWER

Group number for AON_POWER status codes.

enumerator kStatusGroup_AON_COMMON

Group number for AON_COMMON status codes.

enumerator kStatusGroup_ENDAT3

Group number for ENDAT3 status codes.

enumerator kStatusGroup_HIPERFACE

Group number for HIPERFACE status codes.

Generic status return codes.

Values:

enumerator kStatus_Success

Generic status for Success.

enumerator kStatus_Fail

Generic status for Fail.

enumerator kStatus_ReadOnly

Generic status for read only failure.

enumerator kStatus_OutOfRange

Generic status for out of range access.

enumerator kStatus_InvalidArgument

Generic status for invalid argument check.

enumerator kStatus_Timeout

Generic status for timeout.

enumerator kStatus_NoTransferInProgress

Generic status for no transfer in progress.

enumerator kStatus_Busy

Generic status for module is busy.

enumerator kStatus_NoData

Generic status for no data is found for the operation.

typedef int32_t status_t

Type used for all status and error return values.

void *SDK_Malloc(size_t size, size_t alignbytes)

Allocate memory with given alignment and aligned size.

This is provided to support the dynamically allocated memory used in cache-able region.

Parameters:
  • size – The length required to malloc.

  • alignbytes – The alignment size.

Return values:

The – allocated memory.

void SDK_Free(void *ptr)

Free memory.

Parameters:
  • ptr – The memory to be release.

void SDK_DelayAtLeastUs(uint32_t delayTime_us, uint32_t coreClock_Hz)

Delay at least for some time. Please note that, this API uses while loop for delay, different run-time environments make the time not precise, if precise delay count was needed, please implement a new delay function with hardware timer.

Parameters:
  • delayTime_us – Delay time in unit of microsecond.

  • coreClock_Hz – Core clock frequency with Hz.

static inline status_t EnableIRQ(IRQn_Type interrupt)

Enable specific interrupt.

Enable LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.

This function only enables the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:
  • interrupt – The IRQ number.

Return values:
  • kStatus_Success – Interrupt enabled successfully

  • kStatus_Fail – Failed to enable the interrupt

static inline status_t DisableIRQ(IRQn_Type interrupt)

Disable specific interrupt.

Disable LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.

This function only disables the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:
  • interrupt – The IRQ number.

Return values:
  • kStatus_Success – Interrupt disabled successfully

  • kStatus_Fail – Failed to disable the interrupt

static inline status_t EnableIRQWithPriority(IRQn_Type interrupt, uint8_t priNum)

Enable the IRQ, and also set the interrupt priority.

Only handle LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.

This function only handles the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:
  • interrupt – The IRQ to Enable.

  • priNum – Priority number set to interrupt controller register.

Return values:
  • kStatus_Success – Interrupt priority set successfully

  • kStatus_Fail – Failed to set the interrupt priority.

static inline status_t IRQ_SetPriority(IRQn_Type interrupt, uint8_t priNum)

Set the IRQ priority.

Only handle LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.

This function only handles the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:
  • interrupt – The IRQ to set.

  • priNum – Priority number set to interrupt controller register.

Return values:
  • kStatus_Success – Interrupt priority set successfully

  • kStatus_Fail – Failed to set the interrupt priority.

static inline status_t IRQ_ClearPendingIRQ(IRQn_Type interrupt)

Clear the pending IRQ flag.

Only handle LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.

This function only handles the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:
  • interrupt – The flag which IRQ to clear.

Return values:
  • kStatus_Success – Interrupt priority set successfully

  • kStatus_Fail – Failed to set the interrupt priority.

static inline uint32_t DisableGlobalIRQ(void)

Disable the global IRQ.

Disable the global interrupt and return the current primask register. User is required to provided the primask register for the EnableGlobalIRQ().

Returns:

Current primask value.

static inline void EnableGlobalIRQ(uint32_t primask)

Enable the global IRQ.

Set the primask register with the provided primask value but not just enable the primask. The idea is for the convenience of integration of RTOS. some RTOS get its own management mechanism of primask. User is required to use the EnableGlobalIRQ() and DisableGlobalIRQ() in pair.

Parameters:
  • primask – value of primask register to be restored. The primask value is supposed to be provided by the DisableGlobalIRQ().

static inline bool _SDK_AtomicLocalCompareAndSet(uint32_t *addr, uint32_t expected, uint32_t newValue)
static inline uint32_t _SDK_AtomicTestAndSet(uint32_t *addr, uint32_t newValue)
FSL_DRIVER_TRANSFER_DOUBLE_WEAK_IRQ

Macro to use the default weak IRQ handler in drivers.

MAKE_STATUS(group, code)

Construct a status code value from a group and code number.

MAKE_VERSION(major, minor, bugfix)

Construct the version number for drivers.

The driver version is a 32-bit number, for both 32-bit platforms(such as Cortex M) and 16-bit platforms(such as DSC).

| Unused    || Major Version || Minor Version ||  Bug Fix    |
31        25  24           17  16            9  8            0
ARRAY_SIZE(x)

Computes the number of elements in an array.

UINT64_H(X)

Macro to get upper 32 bits of a 64-bit value

UINT64_L(X)

Macro to get lower 32 bits of a 64-bit value

SUPPRESS_FALL_THROUGH_WARNING()

For switch case code block, if case section ends without “break;” statement, there wil be fallthrough warning with compiler flag -Wextra or -Wimplicit-fallthrough=n when using armgcc. To suppress this warning, “SUPPRESS_FALL_THROUGH_WARNING();” need to be added at the end of each case section which misses “break;”statement.

MSDK_REG_SECURE_ADDR(x)

Convert the register address to the one used in secure mode.

MSDK_REG_NONSECURE_ADDR(x)

Convert the register address to the one used in non-secure mode.

LCDIF: LCD interface

status_t LCDIF_Init(LCDIF_Type *base)

Initialize the LCDIF.

This function initializes the LCDIF to work.

Parameters:
  • base – LCDIF peripheral base address.

Return values:

kStatus_Success – Initialize successfully.

void LCDIF_Deinit(LCDIF_Type *base)

De-initialize the LCDIF.

This function disables the LCDIF peripheral clock.

Parameters:
  • base – LCDIF peripheral base address.

void LCDIF_DpiModeGetDefaultConfig(lcdif_dpi_config_t *config)

Get the default configuration for to initialize the LCDIF.

The default configuration value is:

config->panelWidth = 0;
config->panelHeight = 0;
config->hsw = 0;
config->hfp = 0;
config->hbp = 0;
config->vsw = 0;
config->vfp = 0;
config->vbp = 0;
config->polarityFlags = kLCDIF_VsyncActiveLow | kLCDIF_HsyncActiveLow | kLCDIF_DataEnableActiveHigh |
kLCDIF_DriveDataOnFallingClkEdge; config->format = kLCDIF_Output24Bit;
Parameters:
  • config – Pointer to the LCDIF configuration.

status_t LCDIF_DpiModeSetConfig(LCDIF_Type *base, uint8_t displayIndex, const lcdif_dpi_config_t *config)

Initialize the LCDIF to work in DPI mode.

This function configures the LCDIF DPI display.

Parameters:
  • base – LCDIF peripheral base address.

  • displayIndex – Display index.

  • config – Pointer to the configuration structure.

Return values:
  • kStatus_Success – Initialize successfully.

  • kStatus_InvalidArgument – Initialize failed because of invalid argument.

status_t LCDIF_DbiModeSetConfig(LCDIF_Type *base, uint8_t displayIndex, const lcdif_dbi_config_t *config)

Initialize the LCDIF to work in DBI mode.

This function configures the LCDIF DBI display.

Parameters:
  • base – LCDIF peripheral base address.

  • displayIndex – Display index.

  • config – Pointer to the configuration structure.

Return values:
  • kStatus_Success – Initialize successfully.

  • kStatus_InvalidArgument – Initialize failed because of invalid argument.

void LCDIF_DbiModeGetDefaultConfig(lcdif_dbi_config_t *config)

Get the default configuration to initialize the LCDIF DBI mode.

The default configuration value is:

config->swizzle         = kLCDIF_DbiOutSwizzleRGB;
config->format          = kLCDIF_DbiOutD8RGB332;
config->acTimeUnit      = 0;
config->type            = kLCDIF_DbiTypeA_ClockedE;
config->reversePolarity = false;
config->writeWRPeriod   = 3U;
config->writeWRAssert   = 0U;
config->writeCSAssert   = 0U;
config->writeWRDeassert = 0U;
config->writeCSDeassert = 0U;
config->typeCTas        = 1U;
config->typeCSCLTwrl    = 1U;
config->typeCSCLTwrh    = 1U;
Parameters:
  • config – Pointer to the LCDIF DBI configuration.

static inline void LCDIF_DbiReset(LCDIF_Type *base, uint8_t displayIndex)

Reset the DBI module.

Parameters:
  • displayIndex – Display index.

  • base – LCDIF peripheral base address.

void LCDIF_DbiSelectArea(LCDIF_Type *base, uint8_t displayIndex, uint16_t startX, uint16_t startY, uint16_t endX, uint16_t endY, bool isTiled)

Select the update area in DBI mode.

Parameters:
  • base – LCDIF peripheral base address.

  • displayIndex – Display index.

  • startX – X coordinate for start pixel.

  • startY – Y coordinate for start pixel.

  • endX – X coordinate for end pixel.

  • endY – Y coordinate for end pixel.

  • isTiled – true if the pixel data is tiled.

static inline void LCDIF_DbiSendCommand(LCDIF_Type *base, uint8_t displayIndex, uint8_t cmd)

Send command to DBI port.

Parameters:
  • base – LCDIF peripheral base address.

  • displayIndex – Display index.

  • cmd – the DBI command to send.

void LCDIF_DbiSendData(LCDIF_Type *base, uint8_t displayIndex, const uint8_t *data, uint32_t dataLen_Byte)

brief Send data to DBI port.

Can be used to send light weight data to panel. To send pixel data in frame buffer, use LCDIF_DbiWriteMem.

param base LCDIF peripheral base address. param displayIndex Display index. param data pointer to data buffer. param dataLen_Byte data buffer length in byte.

void LCDIF_DbiSendCommandAndData(LCDIF_Type *base, uint8_t displayIndex, uint8_t cmd, const uint8_t *data, uint32_t dataLen_Byte)

Send command followed by data to DBI port.

Parameters:
  • base – LCDIF peripheral base address.

  • displayIndex – Display index.

  • cmd – the DBI command to send.

  • data – pointer to data buffer.

  • dataLen_Byte – data buffer length in byte.

static inline void LCDIF_DbiWriteMem(LCDIF_Type *base, uint8_t displayIndex)

Send pixel data in frame buffer to panel controller memory.

This function starts sending the pixel data in frame buffer to panel controller, user can monitor interrupt kLCDIF_Display0FrameDoneInterrupt to know when then data sending finished.

Parameters:
  • base – LCDIF peripheral base address.

  • displayIndex – Display index.

void LCDIF_SetFrameBufferConfig(LCDIF_Type *base, uint8_t displayIndex, const lcdif_fb_config_t *config)

Configure the LCDIF frame buffer.

@Note: For LCDIF of version DC8000 there can be 3 layers in the pre-processing, compared with the older version. Apart from the video layer, there are also 2 overlay layers which shares the same configurations. Use this API to configure the legacy video layer, and use LCDIF_SetOverlayFrameBufferConfig to configure the overlay layers.

Parameters:
  • base – LCDIF peripheral base address.

  • displayIndex – Display index.

  • config – Pointer to the configuration structure.

void LCDIF_FrameBufferGetDefaultConfig(lcdif_fb_config_t *config)

Get default frame buffer configuration.

@Note: For LCDIF of version DC8000 there can be 3 layers in the pre-processing, compared with the older version. Apart from the video layer, there are also 2 overlay layers which shares the same configurations. Use this API to get the default configuration for all the 3 layers.

The default configuration is

config->enable = true;
config->enableGamma = false;
config->format = kLCDIF_PixelFormatRGB565;

Parameters:
  • config – Pointer to the configuration structure.

static inline void LCDIF_SetFrameBufferAddr(LCDIF_Type *base, uint8_t displayIndex, uint32_t address)

Set the frame buffer to LCDIF.

Note

The address must be 128 bytes aligned.

Parameters:
  • base – LCDIF peripheral base address.

  • displayIndex – Display index.

  • address – Frame buffer address.

void LCDIF_SetFrameBufferStride(LCDIF_Type *base, uint8_t displayIndex, uint32_t strideBytes)

Set the frame buffer stride.

Parameters:
  • base – LCDIF peripheral base address.

  • displayIndex – Display index.

  • strideBytes – The stride in byte.

void LCDIF_SetDitherConfig(LCDIF_Type *base, uint8_t displayIndex, const lcdif_dither_config_t *config)

Set the dither configuration.

Parameters:
  • base – LCDIF peripheral base address.

  • displayIndex – Index to configure.

  • config – Pointer to the configuration structure.

void LCDIF_SetGammaData(LCDIF_Type *base, uint8_t displayIndex, uint16_t startIndex, const uint32_t *gamma, uint16_t gammaLen)

Set the gamma translation values to the LCDIF gamma table.

Parameters:
  • base – LCDIF peripheral base address.

  • displayIndex – Display index.

  • startIndex – Start index in the gamma table that the value will be set to.

  • gamma – The gamma values to set to the gamma table in LCDIF, could be defined using LCDIF_MAKE_GAMMA_VALUE.

  • gammaLen – The length of the gamma.

static inline void LCDIF_EnableInterrupts(LCDIF_Type *base, uint32_t mask)

Enables LCDIF interrupt requests.

Parameters:
  • base – LCDIF peripheral base address.

  • mask – The interrupts to enable, pass in as OR’ed value of _lcdif_interrupt.

static inline void LCDIF_DisableInterrupts(LCDIF_Type *base, uint32_t mask)

Disable LCDIF interrupt requests.

Parameters:
  • base – LCDIF peripheral base address.

  • mask – The interrupts to disable, pass in as OR’ed value of _lcdif_interrupt.

static inline uint32_t LCDIF_GetAndClearInterruptPendingFlags(LCDIF_Type *base)

Get and clear LCDIF interrupt pending status.

Note

The interrupt must be enabled, otherwise the interrupt flags will not assert.

Parameters:
  • base – LCDIF peripheral base address.

Returns:

The interrupt pending status.

void LCDIF_CursorGetDefaultConfig(lcdif_cursor_config_t *config)

Get the hardware cursor default configuration.

The default configuration values are:

config->enable = true;
config->format = kLCDIF_CursorMasked;
config->hotspotOffsetX = 0;
config->hotspotOffsetY = 0;
Parameters:
  • config – Pointer to the hardware cursor configuration structure.

void LCDIF_SetCursorConfig(LCDIF_Type *base, const lcdif_cursor_config_t *config)

Configure the cursor.

Parameters:
  • base – LCDIF peripheral base address.

  • config – Cursor configuration.

static inline void LCDIF_SetCursorHotspotPosition(LCDIF_Type *base, uint16_t x, uint16_t y)

Set the cursor hotspot postion.

Parameters:
  • base – LCDIF peripheral base address.

  • x – X coordinate of the hotspot, range 0 ~ 8191.

  • y – Y coordinate of the hotspot, range 0 ~ 8191.

static inline void LCDIF_SetCursorBufferAddress(LCDIF_Type *base, uint32_t address)

Set the cursor memory address.

Parameters:
  • base – LCDIF peripheral base address.

  • address – Memory address.

void LCDIF_SetCursorColor(LCDIF_Type *base, uint32_t background, uint32_t foreground)

Set the cursor color.

Parameters:
  • base – LCDIF peripheral base address.

  • background – Background color, could be defined use LCDIF_MAKE_CURSOR_COLOR

  • foreground – Foreground color, could be defined use LCDIF_MAKE_CURSOR_COLOR

FSL_LCDIF_DRIVER_VERSION
enum _lcdif_polarity_flags

LCDIF signal polarity flags.

Values:

enumerator kLCDIF_VsyncActiveLow

VSYNC active low.

enumerator kLCDIF_VsyncActiveHigh

VSYNC active high.

enumerator kLCDIF_HsyncActiveLow

HSYNC active low.

enumerator kLCDIF_HsyncActiveHigh

HSYNC active high.

enumerator kLCDIF_DataEnableActiveLow

Data enable line active low.

enumerator kLCDIF_DataEnableActiveHigh

Data enable line active high.

enumerator kLCDIF_DriveDataOnFallingClkEdge

Drive data on falling clock edge, capture data on rising clock edge.

enumerator kLCDIF_DriveDataOnRisingClkEdge

Drive data on falling clock edge, capture data on rising clock edge.

enum _lcdif_output_format

LCDIF DPI output format.

Values:

enumerator kLCDIF_Output16BitConfig1

16-bit configuration 1. RGB565: XXXXXXXX_RRRRRGGG_GGGBBBBB.

enumerator kLCDIF_Output16BitConfig2

16-bit configuration 2. RGB565: XXXRRRRR_XXGGGGGG_XXXBBBBB.

enumerator kLCDIF_Output16BitConfig3

16-bit configuration 3. RGB565: XXRRRRRX_XXGGGGGG_XXBBBBBX.

enumerator kLCDIF_Output18BitConfig1

18-bit configuration 1. RGB666: XXXXXXRR_RRRRGGGG_GGBBBBBB.

enumerator kLCDIF_Output18BitConfig2

18-bit configuration 2. RGB666: XXRRRRRR_XXGGGGGG_XXBBBBBB.

enumerator kLCDIF_Output24Bit

24-bit.

enum _lcdif_fb_format

LCDIF frame buffer pixel format.

Values:

enumerator kLCDIF_PixelFormatXRGB444

XRGB4444, deprecated, use kLCDIF_PixelFormatXRGB4444 instead.

enumerator kLCDIF_PixelFormatXRGB4444

XRGB4444, 16-bit each pixel, 4-bit each element. R4G4B4 in reference manual.

enumerator kLCDIF_PixelFormatXRGB1555

XRGB1555, 16-bit each pixel, 5-bit each element. R5G5B5 in reference manual.

enumerator kLCDIF_PixelFormatRGB565

RGB565, 16-bit each pixel. R5G6B5 in reference manual.

enumerator kLCDIF_PixelFormatXRGB8888

XRGB8888, 32-bit each pixel, 8-bit each element. R8G8B8 in reference manual.

enum _lcdif_interrupt

LCDIF interrupt and status.

Values:

enumerator kLCDIF_Display0FrameDoneInterrupt

The last pixel of visible area in frame is shown.

enum _lcdif_cursor_format

LCDIF cursor format.

Values:

enumerator kLCDIF_CursorMasked

Masked format.

enumerator kLCDIF_CursorARGB8888

ARGB8888.

enum _lcdif_dbi_cmd_flag

LCDIF DBI command flag.

Values:

enumerator kLCDIF_DbiCmdAddress

Send address (or command).

enumerator kLCDIF_DbiCmdWriteMem

Start write memory.

enumerator kLCDIF_DbiCmdData

Send data.

enumerator kLCDIF_DbiCmdReadMem

Start read memory.

enum _lcdif_dbi_out_format

LCDIF DBI output format.

Values:

enumerator kLCDIF_DbiOutD8RGB332

8-bit data bus width, pixel RGB332. For type A or B. 1 pixel sent in 1 cycle.

enumerator kLCDIF_DbiOutD8RGB444

8-bit data bus width, pixel RGB444. For type A or B. 2 pixels sent in 3 cycles.

enumerator kLCDIF_DbiOutD8RGB565

8-bit data bus width, pixel RGB565. For type A or B. 1 pixel sent in 2 cycles.

enumerator kLCDIF_DbiOutD8RGB666

8-bit data bus width, pixel RGB666. For type A or B. 1 pixel sent in 3 cycles, data bus 2 LSB not used.

enumerator kLCDIF_DbiOutD8RGB888

8-bit data bus width, pixel RGB888. For type A or B. 1 pixel sent in 3 cycles.

enumerator kLCDIF_DbiOutD9RGB666

9-bit data bus width, pixel RGB666. For type A or B. 1 pixel sent in 2 cycles.

enumerator kLCDIF_DbiOutD16RGB332

16-bit data bus width, pixel RGB332. For type A or B. 2 pixels sent in 1 cycle.

enumerator kLCDIF_DbiOutD16RGB444

16-bit data bus width, pixel RGB444. For type A or B. 1 pixel sent in 1 cycle, data bus 4 MSB not used.

enumerator kLCDIF_DbiOutD16RGB565

16-bit data bus width, pixel RGB565. For type A or B. 1 pixel sent in 1 cycle.

enumerator kLCDIF_DbiOutD16RGB666Option1

16-bit data bus width, pixel RGB666. For type A or B. 2 pixels sent in 3 cycles.

enumerator kLCDIF_DbiOutD16RGB666Option2

16-bit data bus width, pixel RGB666. For type A or B. 1 pixel sent in 2 cycles.

enumerator kLCDIF_DbiOutD16RGB888Option1

16-bit data bus width, pixel RGB888. For type A or B. 2 pixels sent in 3 cycles.

enumerator kLCDIF_DbiOutD16RGB888Option2

16-bit data bus width, pixel RGB888. For type A or B. 1 pixel sent in 2 cycles.

enum _lcdif_dbi_type

LCDIF DBI type.

Values:

enumerator kLCDIF_DbiTypeA_FixedE

Selects DBI type A fixed E mode, 68000, Motorola mode.

enumerator kLCDIF_DbiTypeA_ClockedE

Selects DBI Type A Clocked E mode, 68000, Motorola mode.

enumerator kLCDIF_DbiTypeB

Selects DBI type B, 8080, Intel mode.

enum _lcdif_dbi_out_swizzle

LCDIF DBI output swizzle.

Values:

enumerator kLCDIF_DbiOutSwizzleRGB

RGB

enumerator kLCDIF_DbiOutSwizzleBGR

BGR

typedef enum _lcdif_output_format lcdif_output_format_t

LCDIF DPI output format.

typedef struct _lcdif_dpi_config lcdif_dpi_config_t

Configuration for LCDIF module to work in DBI mode.

typedef enum _lcdif_fb_format lcdif_fb_format_t

LCDIF frame buffer pixel format.

typedef struct _lcdif_fb_config lcdif_fb_config_t

LCDIF frame buffer configuration.

typedef enum _lcdif_cursor_format lcdif_cursor_format_t

LCDIF cursor format.

typedef struct _lcdif_cursor_config lcdif_cursor_config_t

LCDIF cursor configuration.

typedef struct _lcdif_dither_config lcdif_dither_config_t

LCDIF dither configuration.

  1. Decide which bit of pixel color to enhance. This is configured by the lcdif_dither_config_t::redSize, lcdif_dither_config_t::greenSize, and lcdif_dither_config_t::blueSize. For example, setting redSize=6 means it is the 6th bit starting from the MSB that we want to enhance, in other words, it is the RedColor[2]bit from RedColor[7:0]. greenSize and blueSize function in the same way.

  2. Create the look-up table. a. The Look-Up Table includes 16 entries, 4 bits for each. b. The Look-Up Table provides a value U[3:0] through the index X[1:0] and Y[1:0]. c. The color value RedColor[3:0] is used to compare with this U[3:0]. d. If RedColor[3:0] > U[3:0], and RedColor[7:2] is not 6’b111111, then the final color value is: NewRedColor = RedColor[7:2] + 1’b1. e. If RedColor[3:0] <= U[3:0], then NewRedColor = RedColor[7:2].

typedef enum _lcdif_dbi_out_format lcdif_dbi_out_format_t

LCDIF DBI output format.

typedef enum _lcdif_dbi_type lcdif_dbi_type_t

LCDIF DBI type.

typedef enum _lcdif_dbi_out_swizzle lcdif_dbi_out_swizzle_t

LCDIF DBI output swizzle.

typedef struct _lcdif_dbi_config lcdif_dbi_config_t

LCDIF DBI configuration.

LCDIF_MAKE_CURSOR_COLOR(r, g, b)

Construct the cursor color, every element should be in the range of 0 ~ 255.

LCDIF_MAKE_GAMMA_VALUE(r, g, b)

Construct the gamma value set to LCDIF gamma table, every element should be in the range of 0~255.

LCDIF_ALIGN_ADDR(addr, align)

Calculate the aligned address for LCDIF buffer.

LCDIF_FB_ALIGN

The frame buffer should be 128 byte aligned.

LCDIF_GAMMA_INDEX_MAX

Gamma index max value.

LCDIF_CURSOR_SIZE

The cursor size is 32 x 32.

LCDIF_FRAMEBUFFERCONFIG0_OUTPUT_MASK
LCDIF_ADDR_CPU_2_IP(addr)
struct _lcdif_dpi_config
#include <fsl_lcdif.h>

Configuration for LCDIF module to work in DBI mode.

Public Members

uint16_t panelWidth

Display panel width, pixels per line.

uint16_t panelHeight

Display panel height, how many lines per panel.

uint8_t hsw

HSYNC pulse width.

uint8_t hfp

Horizontal front porch.

uint8_t hbp

Horizontal back porch.

uint8_t vsw

VSYNC pulse width.

uint8_t vfp

Vrtical front porch.

uint8_t vbp

Vertical back porch.

uint32_t polarityFlags

OR’ed value of _lcdif_polarity_flags, used to contol the signal polarity.

lcdif_output_format_t format

DPI output format.

struct _lcdif_fb_config
#include <fsl_lcdif.h>

LCDIF frame buffer configuration.

Public Members

bool enable

Enable the frame buffer output.

bool enableGamma

Enable the gamma correction.

lcdif_fb_format_t format

Frame buffer pixel format.

struct _lcdif_cursor_config
#include <fsl_lcdif.h>

LCDIF cursor configuration.

Public Members

bool enable

Enable the cursor or not.

lcdif_cursor_format_t format

Cursor format.

uint8_t hotspotOffsetX

Offset of the hotspot to top left point, range 0 ~ 31

uint8_t hotspotOffsetY

Offset of the hotspot to top left point, range 0 ~ 31

struct _lcdif_dither_config
#include <fsl_lcdif.h>

LCDIF dither configuration.

  1. Decide which bit of pixel color to enhance. This is configured by the lcdif_dither_config_t::redSize, lcdif_dither_config_t::greenSize, and lcdif_dither_config_t::blueSize. For example, setting redSize=6 means it is the 6th bit starting from the MSB that we want to enhance, in other words, it is the RedColor[2]bit from RedColor[7:0]. greenSize and blueSize function in the same way.

  2. Create the look-up table. a. The Look-Up Table includes 16 entries, 4 bits for each. b. The Look-Up Table provides a value U[3:0] through the index X[1:0] and Y[1:0]. c. The color value RedColor[3:0] is used to compare with this U[3:0]. d. If RedColor[3:0] > U[3:0], and RedColor[7:2] is not 6’b111111, then the final color value is: NewRedColor = RedColor[7:2] + 1’b1. e. If RedColor[3:0] <= U[3:0], then NewRedColor = RedColor[7:2].

Public Members

bool enable

Enable or not.

uint8_t redSize

Red color size, valid region 4-8.

uint8_t greenSize

Green color size, valid region 4-8.

uint8_t blueSize

Blue color size, valid region 4-8.

uint32_t low

Low part of the look up table.

uint32_t high

High part of the look up table.

struct _lcdif_dbi_config
#include <fsl_lcdif.h>

LCDIF DBI configuration.

Public Members

lcdif_dbi_out_swizzle_t swizzle

Swizzle.

lcdif_dbi_out_format_t format

Output format.

uint8_t acTimeUnit

Time unit for AC characteristics.

lcdif_dbi_type_t type

DBI type.

uint16_t writeWRPeriod

WR signal period, Cycle number = writeWRPeriod * (acTimeUnit + 1), must be no less than 3. Only for type A and type b.

uint8_t writeWRAssert

Cycle number = writeWRAssert * (acTimeUnit + 1), only for type A and type B. With kLCDIF_DbiTypeA_FixedE: Not used. With kLCDIF_DbiTypeA_ClockedE: Time to assert E. With kLCDIF_DbiTypeB: Time to assert WRX.

uint8_t writeCSAssert

Cycle number = writeCSAssert * (acTimeUnit + 1), only for type A and type B. With kLCDIF_DbiTypeA_FixedE: Time to assert CSX. With kLCDIF_DbiTypeA_ClockedE: Not used. With kLCDIF_DbiTypeB: Time to assert CSX.

uint16_t writeWRDeassert

Cycle number = writeWRDeassert * (acTimeUnit + 1), only for type A and type B. With kLCDIF_DbiTypeA_FixedE: Not used. With kLCDIF_DbiTypeA_ClockedE: Time to de-assert E. With kLCDIF_DbiTypeB: Time to de-assert WRX.

uint16_t writeCSDeassert

Cycle number = writeCSDeassert * (acTimeUnit + 1), only for type A and type B. With kLCDIF_DbiTypeA_FixedE: Time to de-assert CSX. With kLCDIF_DbiTypeA_ClockedE: Not used. With kLCDIF_DbiTypeB: Time to de-assert CSX.

MCM: Miscellaneous Control Module

FSL_MCM_DRIVER_VERSION

MCM driver version.

Enum _mcm_interrupt_flag. Interrupt status flag mask. .

Values:

enumerator kMCM_CacheWriteBuffer

Cache Write Buffer Error Enable.

enumerator kMCM_ParityError

Cache Parity Error Enable.

enumerator kMCM_FPUInvalidOperation

FPU Invalid Operation Interrupt Enable.

enumerator kMCM_FPUDivideByZero

FPU Divide-by-zero Interrupt Enable.

enumerator kMCM_FPUOverflow

FPU Overflow Interrupt Enable.

enumerator kMCM_FPUUnderflow

FPU Underflow Interrupt Enable.

enumerator kMCM_FPUInexact

FPU Inexact Interrupt Enable.

enumerator kMCM_FPUInputDenormalInterrupt

FPU Input Denormal Interrupt Enable.

typedef union _mcm_buffer_fault_attribute mcm_buffer_fault_attribute_t

The union of buffer fault attribute.

typedef union _mcm_lmem_fault_attribute mcm_lmem_fault_attribute_t

The union of LMEM fault attribute.

static inline void MCM_EnableCrossbarRoundRobin(MCM_Type *base, bool enable)

Enables/Disables crossbar round robin.

Parameters:
  • base – MCM peripheral base address.

  • enable – Used to enable/disable crossbar round robin.

    • true Enable crossbar round robin.

    • false disable crossbar round robin.

static inline void MCM_EnableInterruptStatus(MCM_Type *base, uint32_t mask)

Enables the interrupt.

Parameters:
  • base – MCM peripheral base address.

  • mask – Interrupt status flags mask(_mcm_interrupt_flag).

static inline void MCM_DisableInterruptStatus(MCM_Type *base, uint32_t mask)

Disables the interrupt.

Parameters:
  • base – MCM peripheral base address.

  • mask – Interrupt status flags mask(_mcm_interrupt_flag).

static inline uint16_t MCM_GetInterruptStatus(MCM_Type *base)

Gets the Interrupt status .

Parameters:
  • base – MCM peripheral base address.

static inline void MCM_ClearCacheWriteBufferErroStatus(MCM_Type *base)

Clears the Interrupt status .

Parameters:
  • base – MCM peripheral base address.

static inline uint32_t MCM_GetBufferFaultAddress(MCM_Type *base)

Gets buffer fault address.

Parameters:
  • base – MCM peripheral base address.

static inline void MCM_GetBufferFaultAttribute(MCM_Type *base, mcm_buffer_fault_attribute_t *bufferfault)

Gets buffer fault attributes.

Parameters:
  • base – MCM peripheral base address.

static inline uint32_t MCM_GetBufferFaultData(MCM_Type *base)

Gets buffer fault data.

Parameters:
  • base – MCM peripheral base address.

static inline void MCM_LimitCodeCachePeripheralWriteBuffering(MCM_Type *base, bool enable)

Limit code cache peripheral write buffering.

Parameters:
  • base – MCM peripheral base address.

  • enable – Used to enable/disable limit code cache peripheral write buffering.

    • true Enable limit code cache peripheral write buffering.

    • false disable limit code cache peripheral write buffering.

static inline void MCM_BypassFixedCodeCacheMap(MCM_Type *base, bool enable)

Bypass fixed code cache map.

Parameters:
  • base – MCM peripheral base address.

  • enable – Used to enable/disable bypass fixed code cache map.

    • true Enable bypass fixed code cache map.

    • false disable bypass fixed code cache map.

static inline void MCM_EnableCodeBusCache(MCM_Type *base, bool enable)

Enables/Disables code bus cache.

Parameters:
  • base – MCM peripheral base address.

  • enable – Used to disable/enable code bus cache.

    • true Enable code bus cache.

    • false disable code bus cache.

static inline void MCM_ForceCodeCacheToNoAllocation(MCM_Type *base, bool enable)

Force code cache to no allocation.

Parameters:
  • base – MCM peripheral base address.

  • enable – Used to force code cache to allocation or no allocation.

    • true Force code cache to no allocation.

    • false Force code cache to allocation.

static inline void MCM_EnableCodeCacheWriteBuffer(MCM_Type *base, bool enable)

Enables/Disables code cache write buffer.

Parameters:
  • base – MCM peripheral base address.

  • enable – Used to enable/disable code cache write buffer.

    • true Enable code cache write buffer.

    • false Disable code cache write buffer.

static inline void MCM_ClearCodeBusCache(MCM_Type *base)

Clear code bus cache.

Parameters:
  • base – MCM peripheral base address.

static inline void MCM_EnablePcParityFaultReport(MCM_Type *base, bool enable)

Enables/Disables PC Parity Fault Report.

Parameters:
  • base – MCM peripheral base address.

  • enable – Used to enable/disable PC Parity Fault Report.

    • true Enable PC Parity Fault Report.

    • false disable PC Parity Fault Report.

static inline void MCM_EnablePcParity(MCM_Type *base, bool enable)

Enables/Disables PC Parity.

Parameters:
  • base – MCM peripheral base address.

  • enable – Used to enable/disable PC Parity.

    • true Enable PC Parity.

    • false disable PC Parity.

static inline void MCM_LockConfigState(MCM_Type *base)

Lock the configuration state.

Parameters:
  • base – MCM peripheral base address.

static inline void MCM_EnableCacheParityReporting(MCM_Type *base, bool enable)

Enables/Disables cache parity reporting.

Parameters:
  • base – MCM peripheral base address.

  • enable – Used to enable/disable cache parity reporting.

    • true Enable cache parity reporting.

    • false disable cache parity reporting.

static inline uint32_t MCM_GetLmemFaultAddress(MCM_Type *base)

Gets LMEM fault address.

Parameters:
  • base – MCM peripheral base address.

static inline void MCM_GetLmemFaultAttribute(MCM_Type *base, mcm_lmem_fault_attribute_t *lmemFault)

Get LMEM fault attributes.

Parameters:
  • base – MCM peripheral base address.

static inline uint64_t MCM_GetLmemFaultData(MCM_Type *base)

Gets LMEM fault data.

Parameters:
  • base – MCM peripheral base address.

MCM_LMFATR_TYPE_MASK
MCM_LMFATR_MODE_MASK
MCM_LMFATR_BUFF_MASK
MCM_LMFATR_CACH_MASK
MCM_ISCR_STAT_MASK
MCM_ISCR_CPEE_MASK
FSL_COMPONENT_ID
union _mcm_buffer_fault_attribute
#include <fsl_mcm.h>

The union of buffer fault attribute.

Public Members

uint32_t attribute

Indicates the faulting attributes, when a properly-enabled cache write buffer error interrupt event is detected.

struct _mcm_buffer_fault_attribute._mcm_buffer_fault_attribut attribute_memory
struct _mcm_buffer_fault_attribut
#include <fsl_mcm.h>

Public Members

uint32_t busErrorDataAccessType

Indicates the type of cache write buffer access.

uint32_t busErrorPrivilegeLevel

Indicates the privilege level of the cache write buffer access.

uint32_t busErrorSize

Indicates the size of the cache write buffer access.

uint32_t busErrorAccess

Indicates the type of system bus access.

uint32_t busErrorMasterID

Indicates the crossbar switch bus master number of the captured cache write buffer bus error.

uint32_t busErrorOverrun

Indicates if another cache write buffer bus error is detected.

union _mcm_lmem_fault_attribute
#include <fsl_mcm.h>

The union of LMEM fault attribute.

Public Members

uint32_t attribute

Indicates the attributes of the LMEM fault detected.

struct _mcm_lmem_fault_attribute._mcm_lmem_fault_attribut attribute_memory
struct _mcm_lmem_fault_attribut
#include <fsl_mcm.h>

Public Members

uint32_t parityFaultProtectionSignal

Indicates the features of parity fault protection signal.

uint32_t parityFaultMasterSize

Indicates the parity fault master size.

uint32_t parityFaultWrite

Indicates the parity fault is caused by read or write.

uint32_t backdoorAccess

Indicates the LMEM access fault is initiated by core access or backdoor access.

uint32_t parityFaultSyndrome

Indicates the parity fault syndrome.

uint32_t overrun

Indicates the number of faultss.

MIPI DSI Driver

void DSI_Init(MIPI_DSI_HOST_Type *base, const dsi_config_t *config)

Initializes an MIPI DSI host with the user configuration.

This function initializes the MIPI DSI host with the configuration, it should be called first before other MIPI DSI driver functions.

Parameters:
  • base – MIPI DSI host peripheral base address.

  • config – Pointer to a user-defined configuration structure.

void DSI_Deinit(MIPI_DSI_HOST_Type *base)

Deinitializes an MIPI DSI host.

This function should be called after all bother MIPI DSI driver functions.

Parameters:
  • base – MIPI DSI host peripheral base address.

void DSI_GetDefaultConfig(dsi_config_t *config)

Get the default configuration to initialize the MIPI DSI host.

The default value is:

config->numLanes = 4;
config->enableNonContinuousHsClk = false;
config->enableTxUlps = false;
config->autoInsertEoTp = true;
config->numExtraEoTp = 0;
config->htxTo_ByteClk = 0;
config->lrxHostTo_ByteClk = 0;
config->btaTo_ByteClk = 0;

Parameters:
  • config – Pointer to a user-defined configuration structure.

void DSI_SetDpiConfig(MIPI_DSI_HOST_Type *base, const dsi_dpi_config_t *config, uint8_t numLanes, uint32_t dpiPixelClkFreq_Hz, uint32_t dsiHsBitClkFreq_Hz)

Configure the DPI interface core.

This function sets the DPI interface configuration, it should be used in video mode.

Parameters:
  • base – MIPI DSI host peripheral base address.

  • config – Pointer to the DPI interface configuration.

  • numLanes – Lane number, should be same with the setting in dsi_dpi_config_t.

  • dpiPixelClkFreq_Hz – The DPI pixel clock frequency in Hz.

  • dsiHsBitClkFreq_Hz – The DSI high speed bit clock frequency in Hz. It is the same with DPHY PLL output.

uint32_t DSI_InitDphy(MIPI_DSI_HOST_Type *base, const dsi_dphy_config_t *config, uint32_t refClkFreq_Hz)

Initializes the D-PHY.

This function configures the D-PHY timing and setups the D-PHY PLL based on user configuration. The configuration structure could be got by the function DSI_GetDphyDefaultConfig.

For some platforms there is not dedicated D-PHY PLL, indicated by the macro FSL_FEATURE_MIPI_DSI_NO_DPHY_PLL. For these platforms, the refClkFreq_Hz is useless.

Parameters:
  • base – MIPI DSI host peripheral base address.

  • config – Pointer to the D-PHY configuration.

  • refClkFreq_Hz – The REFCLK frequency in Hz.

Returns:

The actual D-PHY PLL output frequency. If could not configure the PLL to the target frequency, the return value is 0.

void DSI_DeinitDphy(MIPI_DSI_HOST_Type *base)

Deinitializes the D-PHY.

Power down the D-PHY PLL and shut down D-PHY.

Parameters:
  • base – MIPI DSI host peripheral base address.

void DSI_GetDphyDefaultConfig(dsi_dphy_config_t *config, uint32_t txHsBitClk_Hz, uint32_t txEscClk_Hz)

Get the default D-PHY configuration.

Gets the default D-PHY configuration, the timing parameters are set according to D-PHY specification. User could use the configuration directly, or change some parameters according to the special device.

Parameters:
  • config – Pointer to the D-PHY configuration.

  • txHsBitClk_Hz – High speed bit clock in Hz.

  • txEscClk_Hz – Esc clock in Hz.

static inline void DSI_EnableInterrupts(MIPI_DSI_HOST_Type *base, uint32_t intGroup1, uint32_t intGroup2)

Enable the interrupts.

The interrupts to enable are passed in as OR’ed mask value of _dsi_interrupt.

Parameters:
  • base – MIPI DSI host peripheral base address.

  • intGroup1 – Interrupts to enable in group 1.

  • intGroup2 – Interrupts to enable in group 2.

static inline void DSI_DisableInterrupts(MIPI_DSI_HOST_Type *base, uint32_t intGroup1, uint32_t intGroup2)

Disable the interrupts.

The interrupts to disable are passed in as OR’ed mask value of _dsi_interrupt.

Parameters:
  • base – MIPI DSI host peripheral base address.

  • intGroup1 – Interrupts to disable in group 1.

  • intGroup2 – Interrupts to disable in group 2.

static inline void DSI_GetAndClearInterruptStatus(MIPI_DSI_HOST_Type *base, uint32_t *intGroup1, uint32_t *intGroup2)

Get and clear the interrupt status.

Parameters:
  • base – MIPI DSI host peripheral base address.

  • intGroup1 – Group 1 interrupt status.

  • intGroup2 – Group 2 interrupt status.

static inline void DSI_SetDbiPixelFifoSendLevel(MIPI_DSI_HOST_Type *base, uint16_t sendLevel)

Configure the DBI pixel FIFO send level.

This controls the level at which the DBI Host bridge begins sending pixels

Parameters:
  • base – MIPI DSI host peripheral base address.

  • sendLevel – Send level value set to register.

static inline void DSI_SetDbiPixelPayloadSize(MIPI_DSI_HOST_Type *base, uint16_t payloadSize)

Configure the DBI pixel payload size.

Configures maximum number of pixels that should be sent as one DSI packet. Recommended to be evenly divisible by the line size (in pixels).

Parameters:
  • base – MIPI DSI host peripheral base address.

  • payloadSize – Payload size value set to register.

void DSI_SetApbPacketControl(MIPI_DSI_HOST_Type *base, uint16_t wordCount, uint8_t virtualChannel, dsi_tx_data_type_t dataType, uint8_t flags)

Configure the APB packet to send.

This function configures the next APB packet transfer. After configuration, the packet transfer could be started with function DSI_SendApbPacket. If the packet is long packet, Use DSI_WriteApbTxPayload to fill the payload before start transfer.

Parameters:
  • base – MIPI DSI host peripheral base address.

  • wordCount – For long packet, this is the byte count of the payload. For short packet, this is (data1 << 8) | data0.

  • virtualChannel – Virtual channel.

  • dataType – The packet data type, (DI).

  • flags – The transfer control flags, see _dsi_transfer_flags.

void DSI_WriteApbTxPayload(MIPI_DSI_HOST_Type *base, const uint8_t *payload, uint16_t payloadSize)

Fill the long APB packet payload.

Write the long packet payload to TX FIFO.

Parameters:
  • base – MIPI DSI host peripheral base address.

  • payload – Pointer to the payload.

  • payloadSize – Payload size in byte.

void DSI_WriteApbTxPayloadExt(MIPI_DSI_HOST_Type *base, const uint8_t *payload, uint16_t payloadSize, bool sendDcsCmd, uint8_t dcsCmd)

Extended function to fill the payload to TX FIFO.

Write the long packet payload to TX FIFO. This function could be used in two ways

  1. Include the DCS command in parameter payload. In this case, the DCS command is the first byte of payload. The parameter sendDcsCmd is set to false, the dcsCmd is not used. This function is the same as DSI_WriteApbTxPayload when used in this way.

  2. The DCS command in not in parameter payload, but specified by parameter dcsCmd. In this case, the parameter sendDcsCmd is set to true, the dcsCmd is the DCS command to send. The payload is sent after dcsCmd.

Parameters:
  • base – MIPI DSI host peripheral base address.

  • payload – Pointer to the payload.

  • payloadSize – Payload size in byte.

  • sendDcsCmd – If set to true, the DCS command is specified by dcsCmd, otherwise the DCS command is included in the payload.

  • dcsCmd – The DCS command to send, only used when sendDCSCmd is true.

void DSI_ReadApbRxPayload(MIPI_DSI_HOST_Type *base, uint8_t *payload, uint16_t payloadSize)

Read the long APB packet payload.

Read the long packet payload from RX FIFO. This function reads directly but does not check the RX FIFO status. Upper layer should make sure there are available data.

Parameters:
  • base – MIPI DSI host peripheral base address.

  • payload – Pointer to the payload.

  • payloadSize – Payload size in byte.

static inline void DSI_SendApbPacket(MIPI_DSI_HOST_Type *base)

Trigger the controller to send out APB packet.

Send the packet set by DSI_SetApbPacketControl.

Parameters:
  • base – MIPI DSI host peripheral base address.

static inline uint32_t DSI_GetApbStatus(MIPI_DSI_HOST_Type *base)

Get the APB status.

The return value is OR’ed value of _dsi_apb_status.

Parameters:
  • base – MIPI DSI host peripheral base address.

Returns:

The APB status.

static inline uint32_t DSI_GetRxErrorStatus(MIPI_DSI_HOST_Type *base)

Get the error status during data transfer.

The return value is OR’ed value of _dsi_rx_error_status.

Parameters:
  • base – MIPI DSI host peripheral base address.

Returns:

The error status.

static inline uint8_t DSI_GetEccRxErrorPosition(uint32_t rxErrorStatus)

Get the one-bit RX ECC error position.

When one-bit ECC RX error detected using DSI_GetRxErrorStatus, this function could be used to get the error bit position.

uint8_t eccErrorPos;
uint32_t rxErrorStatus = DSI_GetRxErrorStatus(MIPI_DSI);
if (kDSI_RxErrorEccOneBit & rxErrorStatus)
{
    eccErrorPos = DSI_GetEccRxErrorPosition(rxErrorStatus);
}
Parameters:
  • rxErrorStatus – The error status returned by DSI_GetRxErrorStatus.

Returns:

The 1-bit ECC error position.

static inline uint32_t DSI_GetAndClearHostStatus(MIPI_DSI_HOST_Type *base)

Get and clear the DSI host status.

The host status are returned as mask value of _dsi_host_status.

Parameters:
  • base – MIPI DSI host peripheral base address.

Returns:

The DSI host status.

static inline uint32_t DSI_GetRxPacketHeader(MIPI_DSI_HOST_Type *base)

Get the RX packet header.

Parameters:
  • base – MIPI DSI host peripheral base address.

Returns:

The RX packet header.

static inline dsi_rx_data_type_t DSI_GetRxPacketType(uint32_t rxPktHeader)

Extract the RX packet type from the packet header.

Extract the RX packet type from the packet header get by DSI_GetRxPacketHeader.

Parameters:
  • rxPktHeader – The RX packet header get by DSI_GetRxPacketHeader.

Returns:

The RX packet type.

static inline uint16_t DSI_GetRxPacketWordCount(uint32_t rxPktHeader)

Extract the RX packet word count from the packet header.

Extract the RX packet word count from the packet header get by DSI_GetRxPacketHeader.

Parameters:
  • rxPktHeader – The RX packet header get by DSI_GetRxPacketHeader.

Returns:

For long packet, return the payload word count (byte). For short packet, return the (data0 << 8) | data1.

static inline uint8_t DSI_GetRxPacketVirtualChannel(uint32_t rxPktHeader)

Extract the RX packet virtual channel from the packet header.

Extract the RX packet virtual channel from the packet header get by DSI_GetRxPacketHeader.

Parameters:
  • rxPktHeader – The RX packet header get by DSI_GetRxPacketHeader.

Returns:

The virtual channel.

status_t DSI_TransferBlocking(MIPI_DSI_HOST_Type *base, dsi_transfer_t *xfer)

APB data transfer using blocking method.

Perform APB data transfer using blocking method. This function waits until all data send or received, or timeout happens.

When using this API to read data, the actually read data count could be got from xfer->rxDataSize.

Parameters:
  • base – MIPI DSI host peripheral base address.

  • xfer – Pointer to the transfer structure.

Return values:
  • kStatus_Success – Data transfer finished with no error.

  • kStatus_Timeout – Transfer failed because of timeout.

  • kStatus_DSI_RxDataError – RX data error, user could use DSI_GetRxErrorStatus to check the error details.

  • kStatus_DSI_ErrorReportReceived – Error Report packet received, user could use DSI_GetAndClearHostStatus to check the error report status.

  • kStatus_DSI_NotSupported – Transfer format not supported.

  • kStatus_DSI_Fail – Transfer failed for other reasons.

status_t DSI_TransferCreateHandle(MIPI_DSI_HOST_Type *base, dsi_handle_t *handle, dsi_callback_t callback, void *userData)

Create the MIPI DSI handle.

This function initializes the MIPI DSI handle which can be used for other transactional APIs.

Parameters:
  • base – MIPI DSI host peripheral base address.

  • handle – Handle pointer.

  • callback – Callback function.

  • userData – User data.

status_t DSI_TransferNonBlocking(MIPI_DSI_HOST_Type *base, dsi_handle_t *handle, dsi_transfer_t *xfer)

APB data transfer using interrupt method.

Perform APB data transfer using interrupt method, when transfer finished, upper layer could be informed through callback function.

When using this API to read data, the actually read data count could be got from handle->xfer->rxDataSize after read finished.

Parameters:
  • base – MIPI DSI host peripheral base address.

  • handle – pointer to dsi_handle_t structure which stores the transfer state.

  • xfer – Pointer to the transfer structure.

Return values:
  • kStatus_Success – Data transfer started successfully.

  • kStatus_DSI_Busy – Failed to start transfer because DSI is busy with pervious transfer.

  • kStatus_DSI_NotSupported – Transfer format not supported.

void DSI_TransferAbort(MIPI_DSI_HOST_Type *base, dsi_handle_t *handle)

Abort current APB data transfer.

Parameters:
  • base – MIPI DSI host peripheral base address.

  • handle – pointer to dsi_handle_t structure which stores the transfer state.

void DSI_TransferHandleIRQ(MIPI_DSI_HOST_Type *base, dsi_handle_t *handle)

Interrupt handler for the DSI.

Parameters:
  • base – MIPI DSI host peripheral base address.

  • handle – pointer to dsi_handle_t structure which stores the transfer state.

FSL_MIPI_DSI_DRIVER_VERSION

Error codes for the MIPI DSI driver.

Values:

enumerator kStatus_DSI_Busy

DSI is busy.

enumerator kStatus_DSI_RxDataError

Read data error.

enumerator kStatus_DSI_ErrorReportReceived

Error report package received.

enumerator kStatus_DSI_NotSupported

The transfer type not supported.

enum _dsi_dpi_color_coding

MIPI DPI interface color coding.

Values:

enumerator kDSI_Dpi16BitConfig1

16-bit configuration 1. RGB565: XXXXXXXX_RRRRRGGG_GGGBBBBB.

enumerator kDSI_Dpi16BitConfig2

16-bit configuration 2. RGB565: XXXRRRRR_XXGGGGGG_XXXBBBBB.

enumerator kDSI_Dpi16BitConfig3

16-bit configuration 3. RGB565: XXRRRRRX_XXGGGGGG_XXBBBBBX.

enumerator kDSI_Dpi18BitConfig1

18-bit configuration 1. RGB666: XXXXXXRR_RRRRGGGG_GGBBBBBB.

enumerator kDSI_Dpi18BitConfig2

18-bit configuration 2. RGB666: XXRRRRRR_XXGGGGGG_XXBBBBBB.

enumerator kDSI_Dpi24Bit

24-bit.

enum _dsi_dpi_pixel_packet

MIPI DSI pixel packet type send through DPI interface.

Values:

enumerator kDSI_PixelPacket16Bit

16 bit RGB565.

enumerator kDSI_PixelPacket18Bit

18 bit RGB666 packed.

enumerator kDSI_PixelPacket18BitLoosely

18 bit RGB666 loosely packed into three bytes.

enumerator kDSI_PixelPacket24Bit

24 bit RGB888, each pixel uses three bytes.

_dsi_dpi_polarity_flag DPI signal polarity.

Values:

enumerator kDSI_DpiVsyncActiveLow

VSYNC active low.

enumerator kDSI_DpiHsyncActiveLow

HSYNC active low.

enumerator kDSI_DpiVsyncActiveHigh

VSYNC active high.

enumerator kDSI_DpiHsyncActiveHigh

HSYNC active high.

enum _dsi_dpi_video_mode

DPI video mode.

Values:

enumerator kDSI_DpiNonBurstWithSyncPulse

Non-Burst mode with Sync Pulses.

enumerator kDSI_DpiNonBurstWithSyncEvent

Non-Burst mode with Sync Events.

enumerator kDSI_DpiBurst

Burst mode.

enum _dsi_dpi_bllp_mode

Behavior in BLLP (Blanking or Low-Power Interval).

Values:

enumerator kDSI_DpiBllpLowPower

LP mode used in BLLP periods.

enumerator kDSI_DpiBllpBlanking

Blanking packets used in BLLP periods.

enumerator kDSI_DpiBllpNull

Null packets used in BLLP periods.

_dsi_apb_status Status of APB to packet interface.

Values:

enumerator kDSI_ApbNotIdle

State machine not idle

enumerator kDSI_ApbTxDone

Tx packet done

enumerator kDSI_ApbRxControl

DPHY direction 0 - tx had control, 1 - rx has control

enumerator kDSI_ApbTxOverflow

TX fifo overflow

enumerator kDSI_ApbTxUnderflow

TX fifo underflow

enumerator kDSI_ApbRxOverflow

RX fifo overflow

enumerator kDSI_ApbRxUnderflow

RX fifo underflow

enumerator kDSI_ApbRxHeaderReceived

RX packet header has been received

enumerator kDSI_ApbRxPacketReceived

All RX packet payload data has been received

_dsi_rx_error_status Host receive error status.

Values:

enumerator kDSI_RxErrorEccOneBit

ECC single bit error detected.

enumerator kDSI_RxErrorEccMultiBit

ECC multi bit error detected.

enumerator kDSI_RxErrorCrc

CRC error detected.

enumerator kDSI_RxErrorHtxTo

High Speed forward TX timeout detected.

enumerator kDSI_RxErrorLrxTo

Reverse Low power data receive timeout detected.

enumerator kDSI_RxErrorBtaTo

BTA timeout detected.

enum _dsi_host_status

DSI host controller status (status_out)

Values:

enumerator kDSI_HostSoTError

SoT error from peripheral error report.

enumerator kDSI_HostSoTSyncError

SoT Sync error from peripheral error report.

enumerator kDSI_HostEoTSyncError

EoT Sync error from peripheral error report.

enumerator kDSI_HostEscEntryCmdError

Escape Mode Entry Command Error from peripheral error report.

enumerator kDSI_HostLpTxSyncError

Low-power transmit Sync Error from peripheral error report.

enumerator kDSI_HostPeriphToError

Peripheral timeout error from peripheral error report.

enumerator kDSI_HostFalseControlError

False control error from peripheral error report.

enumerator kDSI_HostContentionDetected

Contention detected from peripheral error report.

enumerator kDSI_HostEccErrorOneBit

Single bit ECC error (corrected) from peripheral error report.

enumerator kDSI_HostEccErrorMultiBit

Multi bit ECC error (not corrected) from peripheral error report.

enumerator kDSI_HostChecksumError

Checksum error from peripheral error report.

enumerator kDSI_HostInvalidDataType

DSI data type not recognized.

enumerator kDSI_HostInvalidVcId

DSI VC ID invalid.

enumerator kDSI_HostInvalidTxLength

Invalid transmission length.

enumerator kDSI_HostProtocalViolation

DSI protocal violation.

enumerator kDSI_HostResetTriggerReceived

Reset trigger received.

enumerator kDSI_HostTearTriggerReceived

Tear effect trigger receive.

enumerator kDSI_HostAckTriggerReceived

Acknowledge trigger message received.

_dsi_interrupt DSI interrupt.

Values:

enumerator kDSI_InterruptGroup1ApbNotIdle

State machine not idle

enumerator kDSI_InterruptGroup1ApbTxDone

Tx packet done

enumerator kDSI_InterruptGroup1ApbRxControl

DPHY direction 0 - tx control, 1 - rx control

enumerator kDSI_InterruptGroup1ApbTxOverflow

TX fifo overflow

enumerator kDSI_InterruptGroup1ApbTxUnderflow

TX fifo underflow

enumerator kDSI_InterruptGroup1ApbRxOverflow

RX fifo overflow

enumerator kDSI_InterruptGroup1ApbRxUnderflow

RX fifo underflow

enumerator kDSI_InterruptGroup1ApbRxHeaderReceived

RX packet header has been received

enumerator kDSI_InterruptGroup1ApbRxPacketReceived

All RX packet payload data has been received

enumerator kDSI_InterruptGroup1SoTError

SoT error from peripheral error report.

enumerator kDSI_InterruptGroup1SoTSyncError

SoT Sync error from peripheral error report.

enumerator kDSI_InterruptGroup1EoTSyncError

EoT Sync error from peripheral error report.

enumerator kDSI_InterruptGroup1EscEntryCmdError

Escape Mode Entry Command Error from peripheral error report.

enumerator kDSI_InterruptGroup1LpTxSyncError

Low-power transmit Sync Error from peripheral error report.

enumerator kDSI_InterruptGroup1PeriphToError

Peripheral timeout error from peripheral error report.

enumerator kDSI_InterruptGroup1FalseControlError

False control error from peripheral error report.

enumerator kDSI_InterruptGroup1ContentionDetected

Contention detected from peripheral error report.

enumerator kDSI_InterruptGroup1EccErrorOneBit

Single bit ECC error (corrected) from peripheral error report.

enumerator kDSI_InterruptGroup1EccErrorMultiBit

Multi bit ECC error (not corrected) from peripheral error report.

enumerator kDSI_InterruptGroup1ChecksumError

Checksum error from peripheral error report.

enumerator kDSI_InterruptGroup1InvalidDataType

DSI data type not recognized.

enumerator kDSI_InterruptGroup1InvalidVcId

DSI VC ID invalid.

enumerator kDSI_InterruptGroup1InvalidTxLength

Invalid transmission length.

enumerator kDSI_InterruptGroup1ProtocalViolation

DSI protocal violation.

enumerator kDSI_InterruptGroup1ResetTriggerReceived

Reset trigger received.

enumerator kDSI_InterruptGroup1TearTriggerReceived

Tear effect trigger receive.

enumerator kDSI_InterruptGroup1AckTriggerReceived

Acknowledge trigger message received.

enumerator kDSI_InterruptGroup1HtxTo

High speed TX timeout.

enumerator kDSI_InterruptGroup1LrxTo

Low power RX timeout.

enumerator kDSI_InterruptGroup1BtaTo

Host BTA timeout.

enumerator kDSI_InterruptGroup2EccOneBit

Sinle bit ECC error.

enumerator kDSI_InterruptGroup2EccMultiBit

Multi bit ECC error.

enumerator kDSI_InterruptGroup2CrcError

CRC error.

enum _dsi_tx_data_type

DSI TX data type.

Values:

enumerator kDSI_TxDataVsyncStart

V Sync start.

enumerator kDSI_TxDataVsyncEnd

V Sync end.

enumerator kDSI_TxDataHsyncStart

H Sync start.

enumerator kDSI_TxDataHsyncEnd

H Sync end.

enumerator kDSI_TxDataEoTp

End of transmission packet.

enumerator kDSI_TxDataCmOff

Color mode off.

enumerator kDSI_TxDataCmOn

Color mode on.

enumerator kDSI_TxDataShutDownPeriph

Shut down peripheral.

enumerator kDSI_TxDataTurnOnPeriph

Turn on peripheral.

enumerator kDSI_TxDataGenShortWrNoParam

Generic Short WRITE, no parameters.

enumerator kDSI_TxDataGenShortWrOneParam

Generic Short WRITE, one parameter.

enumerator kDSI_TxDataGenShortWrTwoParam

Generic Short WRITE, two parameter.

enumerator kDSI_TxDataGenShortRdNoParam

Generic Short READ, no parameters.

enumerator kDSI_TxDataGenShortRdOneParam

Generic Short READ, one parameter.

enumerator kDSI_TxDataGenShortRdTwoParam

Generic Short READ, two parameter.

enumerator kDSI_TxDataDcsShortWrNoParam

DCS Short WRITE, no parameters.

enumerator kDSI_TxDataDcsShortWrOneParam

DCS Short WRITE, one parameter.

enumerator kDSI_TxDataDcsShortRdNoParam

DCS Short READ, no parameters.

enumerator kDSI_TxDataSetMaxReturnPktSize

Set the Maximum Return Packet Size.

enumerator kDSI_TxDataNull

Null Packet, no data.

enumerator kDSI_TxDataBlanking

Blanking Packet, no data.

enumerator kDSI_TxDataGenLongWr

Generic long write.

enumerator kDSI_TxDataDcsLongWr

DCS Long Write/write_LUT Command Packet.

enumerator kDSI_TxDataLooselyPackedPixel20BitYCbCr

Loosely Packed Pixel Stream, 20-bit YCbCr, 4:2:2 Format.

enumerator kDSI_TxDataPackedPixel24BitYCbCr

Packed Pixel Stream, 24-bit YCbCr, 4:2:2 Format.

enumerator kDSI_TxDataPackedPixel16BitYCbCr

Packed Pixel Stream, 16-bit YCbCr, 4:2:2 Format.

enumerator kDSI_TxDataPackedPixel30BitRGB

Packed Pixel Stream, 30-bit RGB, 10-10-10 Format.

enumerator kDSI_TxDataPackedPixel36BitRGB

Packed Pixel Stream, 36-bit RGB, 12-12-12 Format.

enumerator kDSI_TxDataPackedPixel12BitYCrCb

Packed Pixel Stream, 12-bit YCbCr, 4:2:0 Format.

enumerator kDSI_TxDataPackedPixel16BitRGB

Packed Pixel Stream, 16-bit RGB, 5-6-5 Format.

enumerator kDSI_TxDataPackedPixel18BitRGB

Packed Pixel Stream, 18-bit RGB, 6-6-6 Format.

enumerator kDSI_TxDataLooselyPackedPixel18BitRGB

Loosely Packed Pixel Stream, 18-bit RGB, 6-6-6 Format.

enumerator kDSI_TxDataPackedPixel24BitRGB

Packed Pixel Stream, 24-bit RGB, 8-8-8 Format.

enum _dsi_rx_data_type

DSI RX data type.

Values:

enumerator kDSI_RxDataAckAndErrorReport

Acknowledge and Error Report

enumerator kDSI_RxDataEoTp

End of Transmission packet.

enumerator kDSI_RxDataGenShortRdResponseOneByte

Generic Short READ Response, 1 byte returned.

enumerator kDSI_RxDataGenShortRdResponseTwoByte

Generic Short READ Response, 2 byte returned.

enumerator kDSI_RxDataGenLongRdResponse

Generic Long READ Response.

enumerator kDSI_RxDataDcsLongRdResponse

DCS Long READ Response.

enumerator kDSI_RxDataDcsShortRdResponseOneByte

DCS Short READ Response, 1 byte returned.

enumerator kDSI_RxDataDcsShortRdResponseTwoByte

DCS Short READ Response, 2 byte returned.

_dsi_transfer_flags DSI transfer control flags.

Values:

enumerator kDSI_TransferUseHighSpeed

Use high speed mode or not.

enumerator kDSI_TransferPerformBTA

Perform BTA or not.

typedef struct _dsi_config dsi_config_t

MIPI DSI controller configuration.

typedef enum _dsi_dpi_color_coding dsi_dpi_color_coding_t

MIPI DPI interface color coding.

typedef enum _dsi_dpi_pixel_packet dsi_dpi_pixel_packet_t

MIPI DSI pixel packet type send through DPI interface.

typedef enum _dsi_dpi_video_mode dsi_dpi_video_mode_t

DPI video mode.

typedef enum _dsi_dpi_bllp_mode dsi_dpi_bllp_mode_t

Behavior in BLLP (Blanking or Low-Power Interval).

typedef struct _dsi_dpi_config dsi_dpi_config_t

MIPI DSI controller DPI interface configuration.

typedef struct _dsi_dphy_config dsi_dphy_config_t

MIPI DSI D-PHY configuration.

typedef enum _dsi_tx_data_type dsi_tx_data_type_t

DSI TX data type.

typedef enum _dsi_rx_data_type dsi_rx_data_type_t

DSI RX data type.

typedef struct _dsi_transfer dsi_transfer_t

Structure for the data transfer.

typedef struct _dsi_handle dsi_handle_t

MIPI DSI transfer handle.

typedef void (*dsi_callback_t)(MIPI_DSI_HOST_Type *base, dsi_handle_t *handle, status_t status, void *userData)

MIPI DSI callback for finished transfer.

When transfer finished, one of these status values will be passed to the user:

  • kStatus_Success Data transfer finished with no error.

  • kStatus_Timeout Transfer failed because of timeout.

  • kStatus_DSI_RxDataError RX data error, user could use DSI_GetRxErrorStatus to check the error details.

  • kStatus_DSI_ErrorReportReceived Error Report packet received, user could use DSI_GetAndClearHostStatus to check the error report status.

  • kStatus_Fail Transfer failed for other reasons.

FSL_DSI_TX_MAX_PAYLOAD_BYTE
FSL_DSI_RX_MAX_PAYLOAD_BYTE
struct _dsi_config
#include <fsl_mipi_dsi.h>

MIPI DSI controller configuration.

Public Members

uint8_t numLanes

Number of lanes.

bool enableNonContinuousHsClk

In enabled, the high speed clock will enter low power mode between transmissions.

bool autoInsertEoTp

Insert an EoTp short package when switching from HS to LP.

uint8_t numExtraEoTp

How many extra EoTp to send after the end of a packet.

uint32_t htxTo_ByteClk

HS TX timeout count (HTX_TO) in byte clock.

uint32_t lrxHostTo_ByteClk

LP RX host timeout count (LRX-H_TO) in byte clock.

uint32_t btaTo_ByteClk

Bus turn around timeout count (TA_TO) in byte clock.

struct _dsi_dpi_config
#include <fsl_mipi_dsi.h>

MIPI DSI controller DPI interface configuration.

Public Members

uint16_t pixelPayloadSize

Maximum number of pixels that should be sent as one DSI packet. Recommended that the line size (in pixels) is evenly divisible by this parameter.

dsi_dpi_color_coding_t dpiColorCoding

DPI color coding.

dsi_dpi_pixel_packet_t pixelPacket

Pixel packet format.

dsi_dpi_video_mode_t videoMode

Video mode.

dsi_dpi_bllp_mode_t bllpMode

Behavior in BLLP.

uint8_t polarityFlags

OR’ed value of _dsi_dpi_polarity_flag controls signal polarity.

uint16_t hfp

Horizontal front porch, in dpi pixel clock.

uint16_t hbp

Horizontal back porch, in dpi pixel clock.

uint16_t hsw

Horizontal sync width, in dpi pixel clock.

uint8_t vfp

Number of lines in vertical front porch.

uint8_t vbp

Number of lines in vertical back porch.

uint16_t panelHeight

Line number in vertical active area.

uint8_t virtualChannel

Virtual channel.

struct _dsi_dphy_config
#include <fsl_mipi_dsi.h>

MIPI DSI D-PHY configuration.

Public Members

uint32_t txHsBitClk_Hz

The generated HS TX bit clock in Hz.

uint8_t tClkPre_ByteClk

TLPX + TCLK-PREPARE + TCLK-ZERO + TCLK-PRE in byte clock. Set how long the controller will wait after enabling clock lane for HS before enabling data lanes for HS.

uint8_t tClkPost_ByteClk

TCLK-POST + T_CLK-TRAIL in byte clock. Set how long the controller will wait before putting clock lane into LP mode after data lanes detected in stop state.

uint8_t tHsExit_ByteClk

THS-EXIT in byte clock. Set how long the controller will wait after the clock lane has been put into LP mode before enabling clock lane for HS again.

uint8_t tHsPrepare_HalfEscClk

THS-PREPARE in clk_esc/2. Set how long to drive the LP-00 state before HS transmissions, available values are 2, 3, 4, 5.

uint8_t tClkPrepare_HalfEscClk

TCLK-PREPARE in clk_esc/2. Set how long to drive the LP-00 state before HS transmissions, available values are 2, 3.

uint8_t tHsZero_ByteClk

THS-ZERO in clk_byte. Set how long that controller drives data lane HS-0 state before transmit the Sync sequence. Available values are 6, 7, …, 37.

uint8_t tClkZero_ByteClk

TCLK-ZERO in clk_byte. Set how long that controller drives clock lane HS-0 state before transmit the Sync sequence. Available values are 3, 4, …, 66.

uint8_t tHsTrail_ByteClk

THS-TRAIL + 4*UI in clk_byte. Set the time of the flipped differential state after last payload data bit of HS transmission burst. Available values are 0, 1, …, 15.

uint8_t tClkTrail_ByteClk

TCLK-TRAIL + 4*UI in clk_byte. Set the time of the flipped differential state after last payload data bit of HS transmission burst. Available values are 0, 1, …, 15.

struct _dsi_transfer
#include <fsl_mipi_dsi.h>

Structure for the data transfer.

Public Members

uint8_t virtualChannel

Virtual channel.

dsi_tx_data_type_t txDataType

TX data type.

uint8_t flags

Flags to control the transfer, see _dsi_transfer_flags.

const uint8_t *txData

The TX data buffer.

uint8_t *rxData

The RX data buffer.

uint16_t txDataSize

Size of the TX data.

uint16_t rxDataSize

Size of the RX data.

bool sendDscCmd

If set to true, the DCS command is specified by dscCmd, otherwise the DCS command is included in the txData.

uint8_t dscCmd

The DCS command to send, only valid when sendDscCmd is true.

struct _dsi_handle
#include <fsl_mipi_dsi.h>

MIPI DSI transfer handle structure.

Public Members

volatile bool isBusy

MIPI DSI is busy with APB data transfer.

dsi_transfer_t xfer

Transfer information.

dsi_callback_t callback

DSI callback

void *userData

Callback parameter

MIPI_DSI: MIPI DSI Host Controller

MU: Messaging Unit

void MU_Init(MU_Type *base)

Initializes the MU module.

This function enables the MU clock only.

Parameters:
  • base – MU peripheral base address.

void MU_Deinit(MU_Type *base)

De-initializes the MU module.

This function disables the MU clock only.

Parameters:
  • base – MU peripheral base address.

static inline void MU_SendMsgNonBlocking(MU_Type *base, uint32_t regIndex, uint32_t msg)

Writes a message to the TX register.

This function writes a message to the specific TX register. It does not check whether the TX register is empty or not. The upper layer should make sure the TX register is empty before calling this function. This function can be used in ISR for better performance.

while (!(kMU_Tx0EmptyFlag & MU_GetStatusFlags(base))) { }  Wait for TX0 register empty.
MU_SendMsgNonBlocking(base, kMU_MsgReg0, MSG_VAL);  Write message to the TX0 register.
Parameters:
  • base – MU peripheral base address.

  • regIndex – TX register index, see mu_msg_reg_index_t.

  • msg – Message to send.

void MU_SendMsg(MU_Type *base, uint32_t regIndex, uint32_t msg)

Blocks to send a message.

This function waits until the TX register is empty and sends the message.

Parameters:
  • base – MU peripheral base address.

  • regIndex – MU message register, see mu_msg_reg_index_t.

  • msg – Message to send.

static inline uint32_t MU_ReceiveMsgNonBlocking(MU_Type *base, uint32_t regIndex)

Reads a message from the RX register.

This function reads a message from the specific RX register. It does not check whether the RX register is full or not. The upper layer should make sure the RX register is full before calling this function. This function can be used in ISR for better performance.

uint32_t msg;
while (!(kMU_Rx0FullFlag & MU_GetStatusFlags(base)))
{
}  Wait for the RX0 register full.

msg = MU_ReceiveMsgNonBlocking(base, kMU_MsgReg0);  Read message from RX0 register.
Parameters:
  • base – MU peripheral base address.

  • regIndex – RX register index, see mu_msg_reg_index_t.

Returns:

The received message.

uint32_t MU_ReceiveMsg(MU_Type *base, uint32_t regIndex)

Blocks to receive a message.

This function waits until the RX register is full and receives the message.

Parameters:
  • base – MU peripheral base address.

  • regIndex – MU message register, see mu_msg_reg_index_t

Returns:

The received message.

static inline void MU_SetFlagsNonBlocking(MU_Type *base, uint32_t flags)

Sets the 3-bit MU flags reflect on the other MU side.

This function sets the 3-bit MU flags directly. Every time the 3-bit MU flags are changed, the status flag kMU_FlagsUpdatingFlag asserts indicating the 3-bit MU flags are updating to the other side. After the 3-bit MU flags are updated, the status flag kMU_FlagsUpdatingFlag is cleared by hardware. During the flags updating period, the flags cannot be changed. The upper layer should make sure the status flag kMU_FlagsUpdatingFlag is cleared before calling this function.

while (kMU_FlagsUpdatingFlag & MU_GetStatusFlags(base))
{
}  Wait for previous MU flags updating.

MU_SetFlagsNonBlocking(base, 0U);  Set the mU flags.
Parameters:
  • base – MU peripheral base address.

  • flags – The 3-bit MU flags to set.

void MU_SetFlags(MU_Type *base, uint32_t flags)

Blocks setting the 3-bit MU flags reflect on the other MU side.

This function blocks setting the 3-bit MU flags. Every time the 3-bit MU flags are changed, the status flag kMU_FlagsUpdatingFlag asserts indicating the 3-bit MU flags are updating to the other side. After the 3-bit MU flags are updated, the status flag kMU_FlagsUpdatingFlag is cleared by hardware. During the flags updating period, the flags cannot be changed. This function waits for the MU status flag kMU_FlagsUpdatingFlag cleared and sets the 3-bit MU flags.

Parameters:
  • base – MU peripheral base address.

  • flags – The 3-bit MU flags to set.

static inline uint32_t MU_GetFlags(MU_Type *base)

Gets the current value of the 3-bit MU flags set by the other side.

This function gets the current 3-bit MU flags on the current side.

Parameters:
  • base – MU peripheral base address.

Returns:

flags Current value of the 3-bit flags.

static inline uint32_t MU_GetStatusFlags(MU_Type *base)

Gets the MU status flags.

This function returns the bit mask of the MU status flags. See _mu_status_flags.

uint32_t flags;
flags = MU_GetStatusFlags(base);  Get all status flags.
if (kMU_Tx0EmptyFlag & flags)
{
    The TX0 register is empty. Message can be sent.
    MU_SendMsgNonBlocking(base, kMU_MsgReg0, MSG0_VAL);
}
if (kMU_Tx1EmptyFlag & flags)
{
    The TX1 register is empty. Message can be sent.
    MU_SendMsgNonBlocking(base, kMU_MsgReg1, MSG1_VAL);
}
Parameters:
  • base – MU peripheral base address.

Returns:

Bit mask of the MU status flags, see _mu_status_flags.

static inline uint32_t MU_GetRxStatusFlags(MU_Type *base)

Return the RX status flags.

This function return the RX status flags. Note: RFn bits of SR[27-24](mu status register) are mapped in reverse numerical order: RF0 -> SR[27] RF1 -> SR[26] RF2 -> SR[25] RF3 -> SR[24]

status_reg = MU_GetRxStatusFlags(base);
Parameters:
  • base – MU peripheral base address.

Returns:

MU RX status

static inline uint32_t MU_GetInterruptsPending(MU_Type *base)

Gets the MU IRQ pending status of enabled interrupts.

This function returns the bit mask of the pending MU IRQs of enabled interrupts. Only these flags are checked. kMU_Tx0EmptyFlag kMU_Tx1EmptyFlag kMU_Tx2EmptyFlag kMU_Tx3EmptyFlag kMU_Rx0FullFlag kMU_Rx1FullFlag kMU_Rx2FullFlag kMU_Rx3FullFlag kMU_GenInt0Flag kMU_GenInt1Flag kMU_GenInt2Flag kMU_GenInt3Flag

Parameters:
  • base – MU peripheral base address.

Returns:

Bit mask of the MU IRQs pending.

static inline void MU_ClearStatusFlags(MU_Type *base, uint32_t mask)

Clears the specific MU status flags.

This function clears the specific MU status flags. The flags to clear should be passed in as bit mask. See _mu_status_flags.

Clear general interrupt 0 and general interrupt 1 pending flags.
MU_ClearStatusFlags(base, kMU_GenInt0Flag | kMU_GenInt1Flag);
Parameters:
  • base – MU peripheral base address.

  • mask – Bit mask of the MU status flags. See _mu_status_flags. The following flags are cleared by hardware, this function could not clear them.

    • kMU_Tx0EmptyFlag

    • kMU_Tx1EmptyFlag

    • kMU_Tx2EmptyFlag

    • kMU_Tx3EmptyFlag

    • kMU_Rx0FullFlag

    • kMU_Rx1FullFlag

    • kMU_Rx2FullFlag

    • kMU_Rx3FullFlag

    • kMU_EventPendingFlag

    • kMU_FlagsUpdatingFlag

    • kMU_OtherSideInResetFlag

static inline void MU_EnableInterrupts(MU_Type *base, uint32_t mask)

Enables the specific MU interrupts.

This function enables the specific MU interrupts. The interrupts to enable should be passed in as bit mask. See _mu_interrupt_enable.

   Enable general interrupt 0 and TX0 empty interrupt.
MU_EnableInterrupts(base, kMU_GenInt0InterruptEnable | kMU_Tx0EmptyInterruptEnable);
Parameters:
  • base – MU peripheral base address.

  • mask – Bit mask of the MU interrupts. See _mu_interrupt_enable.

static inline void MU_DisableInterrupts(MU_Type *base, uint32_t mask)

Disables the specific MU interrupts.

This function disables the specific MU interrupts. The interrupts to disable should be passed in as bit mask. See _mu_interrupt_enable.

   Disable general interrupt 0 and TX0 empty interrupt.
MU_DisableInterrupts(base, kMU_GenInt0InterruptEnable | kMU_Tx0EmptyInterruptEnable);
Parameters:
  • base – MU peripheral base address.

  • mask – Bit mask of the MU interrupts. See _mu_interrupt_enable.

status_t MU_TriggerInterrupts(MU_Type *base, uint32_t mask)

Triggers interrupts to the other core.

This function triggers the specific interrupts to the other core. The interrupts to trigger are passed in as bit mask. See _mu_interrupt_trigger. The MU should not trigger an interrupt to the other core when the previous interrupt has not been processed by the other core. This function checks whether the previous interrupts have been processed. If not, it returns an error.

if (kStatus_Success != MU_TriggerInterrupts(base, kMU_GenInt0InterruptTrigger | kMU_GenInt2InterruptTrigger))
{
     Previous general purpose interrupt 0 or general purpose interrupt 2
     has not been processed by the other core.
}
Parameters:
  • base – MU peripheral base address.

  • mask – Bit mask of the interrupts to trigger. See _mu_interrupt_trigger.

Return values:
  • kStatus_Success – Interrupts have been triggered successfully.

  • kStatus_Fail – Previous interrupts have not been accepted.

static inline void MU_ClearNmi(MU_Type *base)

Clear non-maskable interrupt (NMI) sent by the other core.

This function clears non-maskable interrupt (NMI) sent by the other core.

Parameters:
  • base – MU peripheral base address.

void MU_BootCoreB(MU_Type *base, mu_core_boot_mode_t mode)

Boots the core at B side.

This function sets the B side core’s boot configuration and releases the core from reset.

Note

Only MU side A can use this function.

Parameters:
  • base – MU peripheral base address.

  • mode – Core B boot mode.

static inline void MU_HoldCoreBReset(MU_Type *base)

Holds the core reset of B side.

This function causes the core of B side to be held in reset following any reset event.

Note

Only A side could call this function.

Parameters:
  • base – MU peripheral base address.

void MU_BootOtherCore(MU_Type *base, mu_core_boot_mode_t mode)

Boots the other core.

This function boots the other core with a boot configuration.

Parameters:
  • base – MU peripheral base address.

  • mode – The other core boot mode.

static inline void MU_HoldOtherCoreReset(MU_Type *base)

Holds the other core reset.

This function causes the other core to be held in reset following any reset event.

Parameters:
  • base – MU peripheral base address.

static inline void MU_ResetBothSides(MU_Type *base)

Resets the MU for both A side and B side.

This function resets the MU for both A side and B side. Before reset, it is recommended to interrupt processor B, because this function may affect the ongoing processor B programs.

Note

For some platforms, only MU side A could use this function, check reference manual for details.

Parameters:
  • base – MU peripheral base address.

void MU_HardwareResetOtherCore(MU_Type *base, bool waitReset, bool holdReset, mu_core_boot_mode_t bootMode)

Hardware reset the other core.

This function resets the other core, the other core could mask the hardware reset by calling MU_MaskHardwareReset. The hardware reset mask feature is only available for some platforms. This function could be used together with MU_BootOtherCore to control the other core reset workflow.

Example 1: Reset the other core, and no hold reset

MU_HardwareResetOtherCore(MU_A, true, false, bootMode);
In this example, the core at MU side B will reset with the specified boot mode.

Example 2: Reset the other core and hold it, then boot the other core later.

 Here the other core enters reset, and the reset is hold
MU_HardwareResetOtherCore(MU_A, true, true, modeDontCare);
 Current core boot the other core when necessary.
MU_BootOtherCore(MU_A, bootMode);

Parameters:
  • base – MU peripheral base address.

  • waitReset – Wait the other core enters reset.

    • true: Wait until the other core enters reset, if the other core has masked the hardware reset, then this function will be blocked.

    • false: Don’t wait the reset.

  • holdReset – Hold the other core reset or not.

    • true: Hold the other core in reset, this function returns directly when the other core enters reset.

    • false: Don’t hold the other core in reset, this function waits until the other core out of reset.

  • bootMode – Boot mode of the other core, if holdReset is true, this parameter is useless.

static inline void MU_SetClockOnOtherCoreEnable(MU_Type *base, bool enable)

Enables or disables the clock on the other core.

This function enables or disables the platform clock on the other core when that core enters a stop mode. If disabled, the platform clock for the other core is disabled when it enters stop mode. If enabled, the platform clock keeps running on the other core in stop mode, until this core also enters stop mode.

Parameters:
  • base – MU peripheral base address.

  • enable – Enable or disable the clock on the other core.

static inline mu_power_mode_t MU_GetOtherCorePowerMode(MU_Type *base)

Gets the power mode of the other core.

This function gets the power mode of the other core.

Parameters:
  • base – MU peripheral base address.

Returns:

Power mode of the other core.

FSL_MU_DRIVER_VERSION

MU driver version.

enum _mu_status_flags

MU status flags.

Values:

enumerator kMU_Tx0EmptyFlag

TX0 empty.

enumerator kMU_Tx1EmptyFlag

TX1 empty.

enumerator kMU_Tx2EmptyFlag

TX2 empty.

enumerator kMU_Tx3EmptyFlag

TX3 empty.

enumerator kMU_Rx0FullFlag

RX0 full.

enumerator kMU_Rx1FullFlag

RX1 full.

enumerator kMU_Rx2FullFlag

RX2 full.

enumerator kMU_Rx3FullFlag

RX3 full.

enumerator kMU_GenInt0Flag

General purpose interrupt 0 pending.

enumerator kMU_GenInt1Flag

General purpose interrupt 1 pending.

enumerator kMU_GenInt2Flag

General purpose interrupt 2 pending.

enumerator kMU_GenInt3Flag

General purpose interrupt 3 pending.

enumerator kMU_EventPendingFlag

MU event pending.

enumerator kMU_FlagsUpdatingFlag

MU flags update is on-going.

enum _mu_interrupt_enable

MU interrupt source to enable.

Values:

enumerator kMU_Tx0EmptyInterruptEnable

TX0 empty.

enumerator kMU_Tx1EmptyInterruptEnable

TX1 empty.

enumerator kMU_Tx2EmptyInterruptEnable

TX2 empty.

enumerator kMU_Tx3EmptyInterruptEnable

TX3 empty.

enumerator kMU_Rx0FullInterruptEnable

RX0 full.

enumerator kMU_Rx1FullInterruptEnable

RX1 full.

enumerator kMU_Rx2FullInterruptEnable

RX2 full.

enumerator kMU_Rx3FullInterruptEnable

RX3 full.

enumerator kMU_GenInt0InterruptEnable

General purpose interrupt 0.

enumerator kMU_GenInt1InterruptEnable

General purpose interrupt 1.

enumerator kMU_GenInt2InterruptEnable

General purpose interrupt 2.

enumerator kMU_GenInt3InterruptEnable

General purpose interrupt 3.

enum _mu_interrupt_trigger

MU interrupt that could be triggered to the other core.

Values:

enumerator kMU_NmiInterruptTrigger

NMI interrupt.

enumerator kMU_GenInt0InterruptTrigger

General purpose interrupt 0.

enumerator kMU_GenInt1InterruptTrigger

General purpose interrupt 1.

enumerator kMU_GenInt2InterruptTrigger

General purpose interrupt 2.

enumerator kMU_GenInt3InterruptTrigger

General purpose interrupt 3.

enum _mu_msg_reg_index

MU message register.

Values:

enumerator kMU_MsgReg0
enumerator kMU_MsgReg1
enumerator kMU_MsgReg2
enumerator kMU_MsgReg3
typedef enum _mu_msg_reg_index mu_msg_reg_index_t

MU message register.

MU_CR_NMI_MASK
MU_GET_CORE_FLAG(flags)
MU_GET_STAT_FLAG(flags)
MU_GET_TX_FLAG(flags)
MU_GET_RX_FLAG(flags)
MU_GET_GI_FLAG(flags)

OCOTP: On Chip One-Time Programmable controller.

FSL_OCOTP_DRIVER_VERSION

OCOTP driver version.

_ocotp_status Error codes for the OCOTP driver.

Values:

enumerator kStatus_OCOTP_AccessError

eFuse and shadow register access error.

enumerator kStatus_OCOTP_CrcFail

CRC check failed.

enumerator kStatus_OCOTP_ReloadError

Error happens during reload shadow register.

enumerator kStatus_OCOTP_ProgramFail

Fuse programming failed.

enumerator kStatus_OCOTP_Locked

Fuse is locked and cannot be programmed.

void OCOTP_Init(OCOTP_Type *base, uint32_t srcClock_Hz)

Initializes OCOTP controller.

Parameters:
  • base – OCOTP peripheral base address.

  • srcClock_Hz – source clock frequency in unit of Hz. When the macro FSL_FEATURE_OCOTP_HAS_TIMING_CTRL is defined as 0, this parameter is not used, application could pass in 0 in this case.

void OCOTP_Deinit(OCOTP_Type *base)

De-initializes OCOTP controller.

Return values:

kStatus_Success – upon successful execution, error status otherwise.

static inline bool OCOTP_CheckBusyStatus(OCOTP_Type *base)

Checking the BUSY bit in CTRL register. Checking this BUSY bit will help confirm if the OCOTP controller is ready for access.

Parameters:
  • base – OCOTP peripheral base address.

Return values:

true – for bit set and false for cleared.

static inline bool OCOTP_CheckErrorStatus(OCOTP_Type *base)

Checking the ERROR bit in CTRL register.

Parameters:
  • base – OCOTP peripheral base address.

Return values:

true – for bit set and false for cleared.

static inline void OCOTP_ClearErrorStatus(OCOTP_Type *base)

Clear the error bit if this bit is set.

Parameters:
  • base – OCOTP peripheral base address.

status_t OCOTP_ReloadShadowRegister(OCOTP_Type *base)

Reload the shadow register. This function will help reload the shadow register without reseting the OCOTP module. Please make sure the OCOTP has been initialized before calling this API.

Parameters:
  • base – OCOTP peripheral base addess.

Return values:
  • kStatus_Success – Reload success.

  • kStatus_OCOTP_ReloadError – Reload failed.

uint32_t OCOTP_ReadFuseShadowRegister(OCOTP_Type *base, uint32_t address)

Read the fuse shadow register with the fuse addess.

Deprecated:

Use OCOTP_ReadFuseShadowRegisterExt instead of this function.

Parameters:
  • base – OCOTP peripheral base address.

  • address – the fuse address to be read from.

Returns:

The read out data.

status_t OCOTP_ReadFuseShadowRegisterExt(OCOTP_Type *base, uint32_t address, uint32_t *data, uint8_t fuseWords)

Read the fuse shadow register from the fuse addess.

This function reads fuse from address, how many words to read is specified by the parameter fuseWords. This function could read at most OCOTP_READ_FUSE_DATA_COUNT fuse word one time.

Parameters:
  • base – OCOTP peripheral base address.

  • address – the fuse address to be read from.

  • data – Data array to save the readout fuse value.

  • fuseWords – How many words to read.

Return values:
  • kStatus_Success – Read success.

  • kStatus_Fail – Error occurs during read.

status_t OCOTP_WriteFuseShadowRegister(OCOTP_Type *base, uint32_t address, uint32_t data)

Write the fuse shadow register with the fuse addess and data. Please make sure the wrtie address is not locked while calling this API.

Parameters:
  • base – OCOTP peripheral base address.

  • address – the fuse address to be written.

  • data – the value will be writen to fuse address.

Return values:

write – status, kStatus_Success for success and kStatus_Fail for failed.

status_t OCOTP_WriteFuseShadowRegisterWithLock(OCOTP_Type *base, uint32_t address, uint32_t data, bool lock)

Write the fuse shadow register and lock it.

Please make sure the wrtie address is not locked while calling this API.

Some OCOTP controller supports ECC mode and redundancy mode (see reference mananual for more details). OCOTP controller will auto select ECC or redundancy mode to program the fuse word according to fuse map definition. In ECC mode, the 32 fuse bits in one word can only be written once. In redundancy mode, the word can be written more than once as long as they are different fuse bits. Set parameter lock as true to force use ECC mode.

Parameters:
  • base – OCOTP peripheral base address.

  • address – The fuse address to be written.

  • data – The value will be writen to fuse address.

  • lock – Lock or unlock write fuse shadow register operation.

Return values:
  • kStatus_Success – Program and reload success.

  • kStatus_OCOTP_Locked – The eFuse word is locked and cannot be programmed.

  • kStatus_OCOTP_ProgramFail – eFuse word programming failed.

  • kStatus_OCOTP_ReloadError – eFuse word programming success, but error happens during reload the values.

  • kStatus_OCOTP_AccessError – Cannot access eFuse word.

static inline uint32_t OCOTP_GetVersion(OCOTP_Type *base)

Get the OCOTP controller version from the register.

Parameters:
  • base – OCOTP peripheral base address.

Return values:

return – the version value.

OCOTP_READ_FUSE_DATA_COUNT

PWM: Pulse Width Modulation Driver

status_t PWM_Init(PWM_Type *base, const pwm_config_t *config)

Ungates the PWM clock and configures the peripheral for basic operation.

Note

This API should be called at the beginning of the application using the PWM driver.

Parameters:
  • base – PWM peripheral base address

  • config – Pointer to user’s PWM config structure.

Returns:

kStatus_Success means success; else failed.

void PWM_Deinit(PWM_Type *base)

Gate the PWM submodule clock.

Parameters:
  • base – PWM peripheral base address

void PWM_GetDefaultConfig(pwm_config_t *config)

Fill in the PWM config struct with the default settings.

The default values are:

config->enableStopMode = false;
config->enableDozeMode = false;
config->enableWaitMode = false;
config->enableDozeMode = false;
config->clockSource = kPWM_LowFrequencyClock;
config->prescale = 0U;
config->outputConfig = kPWM_SetAtRolloverAndClearAtcomparison;
config->fifoWater = kPWM_FIFOWaterMark_2;
config->sampleRepeat = kPWM_EachSampleOnce;
config->byteSwap = kPWM_ByteNoSwap;
config->halfWordSwap = kPWM_HalfWordNoSwap;

Parameters:
  • config – Pointer to user’s PWM config structure.

static inline void PWM_StartTimer(PWM_Type *base)

Starts the PWM counter when the PWM is enabled.

When the PWM is enabled, it begins a new period, the output pin is set to start a new period while the prescaler and counter are released and counting begins.

Parameters:
  • base – PWM peripheral base address

static inline void PWM_StopTimer(PWM_Type *base)

Stops the PWM counter when the pwm is disabled.

Parameters:
  • base – PWM peripheral base address

static inline void PWM_EnableInterrupts(PWM_Type *base, uint32_t mask)

Enables the selected PWM interrupts.

Parameters:
  • base – PWM peripheral base address

  • mask – The interrupts to enable. This is a logical OR of members of the enumeration pwm_interrupt_enable_t

static inline void PWM_DisableInterrupts(PWM_Type *base, uint32_t mask)

Disables the selected PWM interrupts.

Parameters:
  • base – PWM peripheral base address

  • mask – The interrupts to disable. This is a logical OR of members of the enumeration pwm_interrupt_enable_t

static inline uint32_t PWM_GetEnabledInterrupts(PWM_Type *base)

Gets the enabled PWM interrupts.

Parameters:
  • base – PWM peripheral base address

Returns:

The enabled interrupts. This is the logical OR of members of the enumeration pwm_interrupt_enable_t

static inline uint32_t PWM_GetStatusFlags(PWM_Type *base)

Gets the PWM status flags.

Parameters:
  • base – PWM peripheral base address

Returns:

The status flags. This is the logical OR of members of the enumeration pwm_status_flags_t

static inline void PWM_clearStatusFlags(PWM_Type *base, uint32_t mask)

Clears the PWM status flags.

Parameters:
  • base – PWM peripheral base address

  • mask – The status flags to clear. This is a logical OR of members of the enumeration pwm_status_flags_t

static inline uint32_t PWM_GetFIFOAvailable(PWM_Type *base)

Gets the PWM FIFO available.

Parameters:
  • base – PWM peripheral base address

Returns:

The status flags. This is the logical OR of members of the enumeration pwm_fifo_available_t

static inline void PWM_SetSampleValue(PWM_Type *base, uint32_t value)

Sets the PWM sample value.

Parameters:
  • base – PWM peripheral base address

  • value – The sample value. This is the input to the 4x16 FIFO. The value in this register denotes the value of the sample being currently used.

static inline uint32_t PWM_GetSampleValue(PWM_Type *base)

Gets the PWM sample value.

Parameters:
  • base – PWM peripheral base address

Returns:

The sample value. It can be read only when the PWM is enable.

FSL_PWM_DRIVER_VERSION
enum _pwm_clock_source

PWM clock source select.

Values:

enumerator kPWM_PeripheralClock

The Peripheral clock is used as the clock

enumerator kPWM_HighFrequencyClock

High-frequency reference clock is used as the clock

enumerator kPWM_LowFrequencyClock

Low-frequency reference clock(32KHz) is used as the clock

enum _pwm_fifo_water_mark

PWM FIFO water mark select. Sets the data level at which the FIFO empty flag will be set.

Values:

enumerator kPWM_FIFOWaterMark_1

FIFO empty flag is set when there are more than or equal to 1 empty slots

enumerator kPWM_FIFOWaterMark_2

FIFO empty flag is set when there are more than or equal to 2 empty slots

enumerator kPWM_FIFOWaterMark_3

FIFO empty flag is set when there are more than or equal to 3 empty slots

enumerator kPWM_FIFOWaterMark_4

FIFO empty flag is set when there are more than or equal to 4 empty slots

enum _pwm_byte_data_swap

PWM byte data swap select. It determines the byte ordering of the 16-bit data when it goes into the FIFO from the sample register.

Values:

enumerator kPWM_ByteNoSwap

byte ordering remains the same

enumerator kPWM_ByteSwap

byte ordering is reversed

enum _pwm_half_word_data_swap

PWM half-word data swap select.

Values:

enumerator kPWM_HalfWordNoSwap

Half word swapping does not take place

enumerator kPWM_HalfWordSwap

Half word from write data bus are swapped

enum _pwm_output_configuration

PWM Output Configuration.

Values:

enumerator kPWM_SetAtRolloverAndClearAtcomparison

Output pin is set at rollover and cleared at comparison

enumerator kPWM_ClearAtRolloverAndSetAtcomparison

Output pin is cleared at rollover and set at comparison

enumerator kPWM_NoConfigure

PWM output is disconnected

enum _pwm_sample_repeat

PWM FIFO sample repeat It determines the number of times each sample from the FIFO is to be used.

Values:

enumerator kPWM_EachSampleOnce

Use each sample once

enumerator kPWM_EachSampletwice

Use each sample twice

enumerator kPWM_EachSampleFourTimes

Use each sample four times

enumerator kPWM_EachSampleEightTimes

Use each sample eight times

enum _pwm_interrupt_enable

List of PWM interrupt options.

Values:

enumerator kPWM_FIFOEmptyInterruptEnable

This bit controls the generation of the FIFO Empty interrupt.

enumerator kPWM_RolloverInterruptEnable

This bit controls the generation of the Rollover interrupt.

enumerator kPWM_CompareInterruptEnable

This bit controls the generation of the Compare interrupt

enum _pwm_status_flags

List of PWM status flags.

Values:

enumerator kPWM_FIFOEmptyFlag

This bit indicates the FIFO data level in comparison to the water level set by FWM field in the control register.

enumerator kPWM_RolloverFlag

This bit shows that a roll-over event has occurred.

enumerator kPWM_CompareFlag

This bit shows that a compare event has occurred.

enumerator kPWM_FIFOWriteErrorFlag

This bit shows that an attempt has been made to write FIFO when it is full.

enum _pwm_fifo_available

List of PWM FIFO available.

Values:

enumerator kPWM_NoDataInFIFOFlag

No data available

enumerator kPWM_OneWordInFIFOFlag

1 word of data in FIFO

enumerator kPWM_TwoWordsInFIFOFlag

2 word of data in FIFO

enumerator kPWM_ThreeWordsInFIFOFlag

3 word of data in FIFO

enumerator kPWM_FourWordsInFIFOFlag

4 word of data in FIFO

typedef enum _pwm_clock_source pwm_clock_source_t

PWM clock source select.

typedef enum _pwm_fifo_water_mark pwm_fifo_water_mark_t

PWM FIFO water mark select. Sets the data level at which the FIFO empty flag will be set.

typedef enum _pwm_byte_data_swap pwm_byte_data_swap_t

PWM byte data swap select. It determines the byte ordering of the 16-bit data when it goes into the FIFO from the sample register.

typedef enum _pwm_half_word_data_swap pwm_half_word_data_swap_t

PWM half-word data swap select.

typedef enum _pwm_output_configuration pwm_output_configuration_t

PWM Output Configuration.

typedef enum _pwm_sample_repeat pwm_sample_repeat_t

PWM FIFO sample repeat It determines the number of times each sample from the FIFO is to be used.

typedef enum _pwm_interrupt_enable pwm_interrupt_enable_t

List of PWM interrupt options.

typedef enum _pwm_status_flags pwm_status_flags_t

List of PWM status flags.

typedef enum _pwm_fifo_available pwm_fifo_available_t

List of PWM FIFO available.

typedef struct _pwm_config pwm_config_t
static inline void PWM_SoftwareReset(PWM_Type *base)

Sofrware reset.

PWM is reset when this bit is set to 1. It is a self clearing bit. Setting this bit resets all the registers to their reset values except for the STOPEN, DOZEN, WAITEN, and DBGEN bits in this control register.

Parameters:
  • base – PWM peripheral base address

static inline void PWM_SetPeriodValue(PWM_Type *base, uint32_t value)

Sets the PWM period value.

Parameters:
  • base – PWM peripheral base address

  • value – The period value. The PWM period register (PWM_PWMPR) determines the period of the PWM output signal. Writing 0xFFFF to this register will achieve the same result as writing 0xFFFE. PWMO (Hz) = PCLK(Hz) / (period +2)

static inline uint32_t PWM_GetPeriodValue(PWM_Type *base)

Gets the PWM period value.

Parameters:
  • base – PWM peripheral base address

Returns:

The period value. The PWM period register (PWM_PWMPR) determines the period of the PWM output signal.

static inline uint32_t PWM_GetCounterValue(PWM_Type *base)

Gets the PWM counter value.

Parameters:
  • base – PWM peripheral base address

Returns:

The counter value. The current count value.

struct _pwm_config
#include <fsl_pwm.h>

Public Members

bool enableStopMode

True: PWM continues to run in stop mode; False: PWM is paused in stop mode.

bool enableDozeMode

True: PWM continues to run in doze mode; False: PWM is paused in doze mode.

bool enableWaitMode

True: PWM continues to run in wait mode; False: PWM is paused in wait mode.

bool enableDebugMode

True: PWM continues to run in debug mode; False: PWM is paused in debug mode.

uint16_t prescale

Pre-scaler to divide down the clock The prescaler value is not more than 0xFFF. Divide by (value + 1)

pwm_clock_source_t clockSource

Clock source for the counter

pwm_output_configuration_t outputConfig

Set the mode of the PWM output on the output pin.

pwm_fifo_water_mark_t fifoWater

Set the data level for FIFO.

pwm_sample_repeat_t sampleRepeat

The number of times each sample from the FIFO is to be used.

pwm_byte_data_swap_t byteSwap

It determines the byte ordering of the 16-bit data when it goes into the FIFO from the sample register.

pwm_half_word_data_swap_t halfWordSwap

It determines which half word data from the 32-bit IP Bus interface is written into the lower 16 bits of the sample register.

QSPI: Quad Serial Peripheral Interface

Quad Serial Peripheral Interface Driver

uint32_t QSPI_GetInstance(QuadSPI_Type *base)

Get the instance number for QSPI.

Parameters:
  • base – QSPI base pointer.

void QSPI_Init(QuadSPI_Type *base, qspi_config_t *config, uint32_t srcClock_Hz)

Initializes the QSPI module and internal state.

This function enables the clock for QSPI and also configures the QSPI with the input configure parameters. Users should call this function before any QSPI operations.

Parameters:
  • base – Pointer to QuadSPI Type.

  • config – QSPI configure structure.

  • srcClock_Hz – QSPI source clock frequency in Hz.

void QSPI_GetDefaultQspiConfig(qspi_config_t *config)

Gets default settings for QSPI.

Parameters:
  • config – QSPI configuration structure.

void QSPI_Deinit(QuadSPI_Type *base)

Deinitializes the QSPI module.

Clears the QSPI state and QSPI module registers.

Parameters:
  • base – Pointer to QuadSPI Type.

void QSPI_SetFlashConfig(QuadSPI_Type *base, qspi_flash_config_t *config)

Configures the serial flash parameter.

This function configures the serial flash relevant parameters, such as the size, command, and so on. The flash configuration value cannot have a default value. The user needs to configure it according to the QSPI features.

Parameters:
  • base – Pointer to QuadSPI Type.

  • config – Flash configuration parameters.

void QSPI_SetDqsConfig(QuadSPI_Type *base, qspi_dqs_config_t *config)

Configures the serial flash DQS parameter.

This function configures the serial flash DQS relevant parameters, such as the delay chain tap number, . DQS shift phase, whether need to inverse and the rxc sample clock selection.

Parameters:
  • base – Pointer to QuadSPI Type.

  • config – Dqs configuration parameters.

void QSPI_SoftwareReset(QuadSPI_Type *base)

Software reset for the QSPI logic.

This function sets the software reset flags for both AHB and buffer domain and resets both AHB buffer and also IP FIFOs.

Parameters:
  • base – Pointer to QuadSPI Type.

static inline void QSPI_Enable(QuadSPI_Type *base, bool enable)

Enables or disables the QSPI module.

Parameters:
  • base – Pointer to QuadSPI Type.

  • enable – True means enable QSPI, false means disable.

static inline uint32_t QSPI_GetStatusFlags(QuadSPI_Type *base)

Gets the state value of QSPI.

Parameters:
  • base – Pointer to QuadSPI Type.

Returns:

status flag, use status flag to AND _qspi_flags could get the related status.

static inline uint32_t QSPI_GetErrorStatusFlags(QuadSPI_Type *base)

Gets QSPI error status flags.

Parameters:
  • base – Pointer to QuadSPI Type.

Returns:

status flag, use status flag to AND _qspi_error_flags could get the related status.

static inline void QSPI_ClearErrorFlag(QuadSPI_Type *base, uint32_t mask)

Clears the QSPI error flags.

Parameters:
  • base – Pointer to QuadSPI Type.

  • mask – Which kind of QSPI flags to be cleared, a combination of _qspi_error_flags.

static inline void QSPI_EnableInterrupts(QuadSPI_Type *base, uint32_t mask)

Enables the QSPI interrupts.

Parameters:
  • base – Pointer to QuadSPI Type.

  • mask – QSPI interrupt source.

static inline void QSPI_DisableInterrupts(QuadSPI_Type *base, uint32_t mask)

Disables the QSPI interrupts.

Parameters:
  • base – Pointer to QuadSPI Type.

  • mask – QSPI interrupt source.

static inline void QSPI_EnableDMA(QuadSPI_Type *base, uint32_t mask, bool enable)

Enables the QSPI DMA source.

Parameters:
  • base – Pointer to QuadSPI Type.

  • mask – QSPI DMA source.

  • enable – True means enable DMA, false means disable.

static inline uint32_t QSPI_GetTxDataRegisterAddress(QuadSPI_Type *base)

Gets the Tx data register address. It is used for DMA operation.

Parameters:
  • base – Pointer to QuadSPI Type.

Returns:

QSPI Tx data register address.

uint32_t QSPI_GetRxDataRegisterAddress(QuadSPI_Type *base)

Gets the Rx data register address used for DMA operation.

This function returns the Rx data register address or Rx buffer address according to the Rx read area settings.

Parameters:
  • base – Pointer to QuadSPI Type.

Returns:

QSPI Rx data register address.

static inline void QSPI_SetIPCommandAddress(QuadSPI_Type *base, uint32_t addr)

Sets the IP command address.

Parameters:
  • base – Pointer to QuadSPI Type.

  • addr – IP command address.

static inline void QSPI_SetIPCommandSize(QuadSPI_Type *base, uint32_t size)

Sets the IP command size.

Parameters:
  • base – Pointer to QuadSPI Type.

  • size – IP command size.

void QSPI_ExecuteIPCommand(QuadSPI_Type *base, uint32_t index)

Executes IP commands located in LUT table.

Parameters:
  • base – Pointer to QuadSPI Type.

  • index – IP command located in which LUT table index.

void QSPI_ExecuteAHBCommand(QuadSPI_Type *base, uint32_t index)

Executes AHB commands located in LUT table.

Parameters:
  • base – Pointer to QuadSPI Type.

  • index – AHB command located in which LUT table index.

void QSPI_UpdateLUT(QuadSPI_Type *base, uint32_t index, uint32_t *cmd)

Updates the LUT table.

Parameters:
  • base – Pointer to QuadSPI Type.

  • index – Which LUT index needs to be located. It should be an integer divided by 4.

  • cmd – Command sequence array.

static inline void QSPI_ClearFifo(QuadSPI_Type *base, uint32_t mask)

Clears the QSPI FIFO logic.

Parameters:
  • base – Pointer to QuadSPI Type.

  • mask – Which kind of QSPI FIFO to be cleared.

static inline void QSPI_ClearCommandSequence(QuadSPI_Type *base, qspi_command_seq_t seq)

@ brief Clears the command sequence for the IP/buffer command.

This function can reset the command sequence.

Parameters:
  • base – QSPI base address.

  • seq – Which command sequence need to reset, IP command, buffer command or both.

static inline void QSPI_EnableDDRMode(QuadSPI_Type *base, bool enable)

Enable or disable DDR mode.

Parameters:
  • base – QSPI base pointer

  • enable – True means enable DDR mode, false means disable DDR mode.

void QSPI_SetReadDataArea(QuadSPI_Type *base, qspi_read_area_t area)

@ brief Set the RX buffer readout area.

This function can set the RX buffer readout, from AHB bus or IP Bus.

Parameters:
  • base – QSPI base address.

  • area – QSPI Rx buffer readout area. AHB bus buffer or IP bus buffer.

void QSPI_WriteBlocking(QuadSPI_Type *base, const uint32_t *buffer, size_t size)

Sends a buffer of data bytes using a blocking method.

Note

This function blocks via polling until all bytes have been sent.

Parameters:
  • base – QSPI base pointer

  • buffer – The data bytes to send

  • size – The number of data bytes to send

static inline void QSPI_WriteData(QuadSPI_Type *base, uint32_t data)

Writes data into FIFO.

Parameters:
  • base – QSPI base pointer

  • data – The data bytes to send

void QSPI_ReadBlocking(QuadSPI_Type *base, uint32_t *buffer, size_t size)

Receives a buffer of data bytes using a blocking method.

Note

This function blocks via polling until all bytes have been sent. Users shall notice that this receive size shall not bigger than 64 bytes. As this interface is used to read flash status registers. For flash contents read, please use AHB bus read, this is much more efficiency.

Parameters:
  • base – QSPI base pointer

  • buffer – The data bytes to send

  • size – The number of data bytes to receive

uint32_t QSPI_ReadData(QuadSPI_Type *base)

Receives data from data FIFO.

Parameters:
  • base – QSPI base pointer

Returns:

The data in the FIFO.

static inline void QSPI_TransferSendBlocking(QuadSPI_Type *base, qspi_transfer_t *xfer)

Writes data to the QSPI transmit buffer.

This function writes a continuous data to the QSPI transmit FIFO. This function is a block function and can return only when finished. This function uses polling methods.

Parameters:
  • base – Pointer to QuadSPI Type.

  • xfer – QSPI transfer structure.

static inline void QSPI_TransferReceiveBlocking(QuadSPI_Type *base, qspi_transfer_t *xfer)

Reads data from the QSPI receive buffer in polling way.

This function reads continuous data from the QSPI receive buffer/FIFO. This function is a blocking function and can return only when finished. This function uses polling methods. Users shall notice that this receive size shall not bigger than 64 bytes. As this interface is used to read flash status registers. For flash contents read, please use AHB bus read, this is much more efficiency.

Parameters:
  • base – Pointer to QuadSPI Type.

  • xfer – QSPI transfer structure.

FSL_QSPI_DRIVER_VERSION

QSPI driver version 2.2.3.

Status structure of QSPI.

Values:

enumerator kStatus_QSPI_Idle

QSPI is in idle state

enumerator kStatus_QSPI_Busy

QSPI is busy

enumerator kStatus_QSPI_Error

Error occurred during QSPI transfer

enum _qspi_read_area

QSPI read data area, from IP FIFO or AHB buffer.

Values:

enumerator kQSPI_ReadAHB

QSPI read from AHB buffer.

enumerator kQSPI_ReadIP

QSPI read from IP FIFO.

enum _qspi_command_seq

QSPI command sequence type.

Values:

enumerator kQSPI_IPSeq

IP command sequence

enumerator kQSPI_BufferSeq

Buffer command sequence

enumerator kQSPI_AllSeq
enum _qspi_fifo

QSPI buffer type.

Values:

enumerator kQSPI_TxFifo

QSPI Tx FIFO

enumerator kQSPI_RxFifo

QSPI Rx FIFO

enumerator kQSPI_AllFifo

QSPI all FIFO, including Tx and Rx

enum _qspi_endianness

QSPI transfer endianess.

Values:

enumerator kQSPI_64BigEndian

64 bits big endian

enumerator kQSPI_32LittleEndian

32 bit little endian

enumerator kQSPI_32BigEndian

32 bit big endian

enumerator kQSPI_64LittleEndian

64 bit little endian

enum _qspi_error_flags

QSPI error flags.

Values:

enumerator kQSPI_DataLearningFail

Data learning pattern failure flag

enumerator kQSPI_TxBufferFill

Tx buffer fill flag

enumerator kQSPI_TxBufferUnderrun

Tx buffer underrun flag

enumerator kQSPI_IllegalInstruction

Illegal instruction error flag

enumerator kQSPI_RxBufferOverflow

Rx buffer overflow flag

enumerator kQSPI_RxBufferDrain

Rx buffer drain flag

enumerator kQSPI_AHBSequenceError

AHB sequence error flag

enumerator kQSPI_AHBIllegalTransaction

AHB illegal transaction error flag

enumerator kQSPI_AHBIllegalBurstSize

AHB illegal burst error flag

enumerator kQSPI_AHBBufferOverflow

AHB buffer overflow flag

enumerator kQSPI_IPCommandTriggerDuringAHBAccess

IP command trigger during AHB access error

enumerator kQSPI_IPCommandTriggerDuringIPAccess

IP command trigger cannot be executed

enumerator kQSPI_IPCommandTriggerDuringAHBGrant

IP command trigger during AHB grant error

enumerator kQSPI_IPCommandTransactionFinished

IP command transaction finished flag

enumerator kQSPI_FlagAll

All error flag

enum _qspi_flags

QSPI state bit.

Values:

enumerator kQSPI_DataLearningSamplePoint

Data learning sample point

enumerator kQSPI_TxBufferFull

Tx buffer full flag

enumerator kQSPI_TxDMA

Tx DMA is requested or running

enumerator kQSPI_TxWatermark

Tx buffer watermark available

enumerator kQSPI_TxBufferEnoughData

Tx buffer enough data available

enumerator kQSPI_RxDMA

Rx DMA is requesting or running

enumerator kQSPI_RxBufferFull

Rx buffer full

enumerator kQSPI_RxWatermark

Rx buffer watermark exceeded

enumerator kQSPI_AHB3BufferFull

AHB buffer 3 full

enumerator kQSPI_AHB2BufferFull

AHB buffer 2 full

enumerator kQSPI_AHB1BufferFull

AHB buffer 1 full

enumerator kQSPI_AHB0BufferFull

AHB buffer 0 full

enumerator kQSPI_AHB3BufferNotEmpty

AHB buffer 3 not empty

enumerator kQSPI_AHB2BufferNotEmpty

AHB buffer 2 not empty

enumerator kQSPI_AHB1BufferNotEmpty

AHB buffer 1 not empty

enumerator kQSPI_AHB0BufferNotEmpty

AHB buffer 0 not empty

enumerator kQSPI_AHBTransactionPending

AHB access transaction pending

enumerator kQSPI_AHBCommandPriorityGranted

AHB command priority granted

enumerator kQSPI_AHBAccess

AHB access

enumerator kQSPI_IPAccess

IP access

enumerator kQSPI_Busy

Module busy

enumerator kQSPI_StateAll

All flags

enum _qspi_interrupt_enable

QSPI interrupt enable.

Values:

enumerator kQSPI_DataLearningFailInterruptEnable

Data learning pattern failure interrupt enable

enumerator kQSPI_TxBufferFillInterruptEnable

Tx buffer fill interrupt enable

enumerator kQSPI_TxBufferUnderrunInterruptEnable

Tx buffer underrun interrupt enable

enumerator kQSPI_IllegalInstructionInterruptEnable

Illegal instruction error interrupt enable

enumerator kQSPI_RxBufferOverflowInterruptEnable

Rx buffer overflow interrupt enable

enumerator kQSPI_RxBufferDrainInterruptEnable

Rx buffer drain interrupt enable

enumerator kQSPI_AHBSequenceErrorInterruptEnable

AHB sequence error interrupt enable

enumerator kQSPI_AHBIllegalTransactionInterruptEnable

AHB illegal transaction error interrupt enable

enumerator kQSPI_AHBIllegalBurstSizeInterruptEnable

AHB illegal burst error interrupt enable

enumerator kQSPI_AHBBufferOverflowInterruptEnable

AHB buffer overflow interrupt enable

enumerator kQSPI_IPCommandTriggerDuringAHBAccessInterruptEnable

IP command trigger during AHB access error

enumerator kQSPI_IPCommandTriggerDuringIPAccessInterruptEnable

IP command trigger cannot be executed

enumerator kQSPI_IPCommandTriggerDuringAHBGrantInterruptEnable

IP command trigger during AHB grant error

enumerator kQSPI_IPCommandTransactionFinishedInterruptEnable

IP command transaction finished interrupt enable

enumerator kQSPI_AllInterruptEnable

All error interrupt enable

enum _qspi_dma_enable

QSPI DMA request flag.

Values:

enumerator kQSPI_TxBufferFillDMAEnable

Tx buffer fill DMA

enumerator kQSPI_RxBufferDrainDMAEnable

Rx buffer drain DMA

enumerator kQSPI_AllDDMAEnable

All DMA source

enum _qspi_dqs_phrase_shift

Phrase shift number for DQS mode.

Values:

enumerator kQSPI_DQSNoPhraseShift

No phase shift

enumerator kQSPI_DQSPhraseShift45Degree

Select 45 degree phase shift

enumerator kQSPI_DQSPhraseShift90Degree

Select 90 degree phase shift

enumerator kQSPI_DQSPhraseShift135Degree

Select 135 degree phase shift

enum _qspi_dqs_read_sample_clock

Qspi read sampling option.

Values:

enumerator kQSPI_ReadSampleClkInternalLoopback

Read sample clock adopts internal loopback mode.

enumerator kQSPI_ReadSampleClkLoopbackFromDqsPad

Dummy Read strobe generated by QSPI Controller and loopback from DQS pad.

enumerator kQSPI_ReadSampleClkExternalInputFromDqsPad

Flash provided Read strobe and input from DQS pad.

typedef enum _qspi_read_area qspi_read_area_t

QSPI read data area, from IP FIFO or AHB buffer.

typedef enum _qspi_command_seq qspi_command_seq_t

QSPI command sequence type.

typedef enum _qspi_fifo qspi_fifo_t

QSPI buffer type.

typedef enum _qspi_endianness qspi_endianness_t

QSPI transfer endianess.

typedef enum _qspi_dqs_phrase_shift qspi_dqs_phrase_shift_t

Phrase shift number for DQS mode.

typedef enum _qspi_dqs_read_sample_clock qspi_dqs_read_sample_clock_t

Qspi read sampling option.

typedef struct QspiDQSConfig qspi_dqs_config_t

DQS configure features.

typedef struct QspiFlashTiming qspi_flash_timing_t

Flash timing configuration.

typedef struct QspiConfig qspi_config_t

QSPI configuration structure.

typedef struct _qspi_flash_config qspi_flash_config_t

External flash configuration items.

typedef struct _qspi_transfer qspi_transfer_t

Transfer structure for QSPI.

typedef struct _ip_command_config ip_command_config_t

16-bit access reg for IPCR register

QSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1)

Macro functions for LUT table.

QSPI_CMD

Macro for QSPI LUT command.

QSPI_ADDR
QSPI_DUMMY
QSPI_MODE
QSPI_MODE2
QSPI_MODE4
QSPI_READ
QSPI_WRITE
QSPI_JMP_ON_CS
QSPI_ADDR_DDR
QSPI_MODE_DDR
QSPI_MODE2_DDR
QSPI_MODE4_DDR
QSPI_READ_DDR
QSPI_WRITE_DDR
QSPI_DATA_LEARN
QSPI_CMD_DDR
QSPI_CADDR
QSPI_CADDR_DDR
QSPI_STOP
QSPI_PAD_1

Macro for QSPI PAD.

QSPI_PAD_2
QSPI_PAD_4
QSPI_PAD_8
struct QspiDQSConfig
#include <fsl_qspi.h>

DQS configure features.

Public Members

uint32_t portADelayTapNum

Delay chain tap number selection for QSPI port A DQS

qspi_dqs_phrase_shift_t shift

Phase shift for internal DQS generation

qspi_dqs_read_sample_clock_t rxSampleClock

Read sample clock for Dqs.

bool enableDQSClkInverse

Enable inverse clock for internal DQS generation

struct QspiFlashTiming
#include <fsl_qspi.h>

Flash timing configuration.

Public Members

uint32_t dataHoldTime

Serial flash data in hold time

uint32_t CSHoldTime

Serial flash CS hold time in terms of serial flash clock cycles

uint32_t CSSetupTime

Serial flash CS setup time in terms of serial flash clock cycles

struct QspiConfig
#include <fsl_qspi.h>

QSPI configuration structure.

Public Members

uint32_t clockSource

Clock source for QSPI module

uint32_t baudRate

Serial flash clock baud rate

uint8_t txWatermark

QSPI transmit watermark value

uint8_t rxWatermark

QSPI receive watermark value.

uint32_t AHBbufferSize[FSL_FEATURE_QSPI_AHB_BUFFER_COUNT]

AHB buffer size.

uint8_t AHBbufferMaster[FSL_FEATURE_QSPI_AHB_BUFFER_COUNT]

AHB buffer master.

bool enableAHBbuffer3AllMaster

Is AHB buffer3 for all master.

qspi_read_area_t area

Which area Rx data readout

bool enableQspi

Enable QSPI after initialization

struct _qspi_flash_config
#include <fsl_qspi.h>

External flash configuration items.

Public Members

uint32_t flashA1Size

Flash A1 size

uint32_t flashA2Size

Flash A2 size

uint32_t lookuptable[FSL_FEATURE_QSPI_LUT_DEPTH]

Flash command in LUT

uint32_t dataHoldTime

Data line hold time.

uint32_t CSHoldTime

CS line hold time

uint32_t CSSetupTime

CS line setup time

uint32_t cloumnspace

Column space size

uint32_t dataLearnValue

Data Learn value if enable data learn

qspi_endianness_t endian

Flash data endianess.

bool enableWordAddress

If enable word address.

struct _qspi_transfer
#include <fsl_qspi.h>

Transfer structure for QSPI.

Public Members

uint32_t *data

Pointer to data to transmit

size_t dataSize

Bytes to be transmit

struct _ip_command_config
#include <fsl_qspi.h>

16-bit access reg for IPCR register

union IPCR_REG

Public Members

__IO uint32_t IPCR

IP Configuration Register

struct _ip_command_config BITFIELD
struct BITFIELD

Public Members

__IO uint16_t IDATZ

16-bit access for IDATZ field in IPCR register

__IO uint8_t RESERVED_0

8-bit access for RESERVED_0 field in IPCR register

__IO uint8_t SEQID

8-bit access for SEQID field in IPCR register

RDC: Resource Domain Controller

enum _rdc_interrupts

RDC interrupts.

Values:

enumerator kRDC_RestoreCompleteInterrupt

Interrupt generated when the RDC has completed restoring state to a recently re-powered memory regions.

enum _rdc_flags

RDC status.

Values:

enumerator kRDC_PowerDownDomainOn

Power down domain is ON.

enum _rdc_access_policy

Access permission policy.

Values:

enumerator kRDC_NoAccess

Could not read or write.

enumerator kRDC_WriteOnly

Write only.

enumerator kRDC_ReadOnly

Read only.

enumerator kRDC_ReadWrite

Read and write.

typedef struct _rdc_hardware_config rdc_hardware_config_t

RDC hardware configuration.

typedef struct _rdc_domain_assignment rdc_domain_assignment_t

Master domain assignment.

typedef struct _rdc_periph_access_config rdc_periph_access_config_t

Peripheral domain access permission configuration.

typedef struct _rdc_mem_access_config rdc_mem_access_config_t

Memory region domain access control configuration.

Note that when setting the rdc_mem_access_config_t::baseAddress and rdc_mem_access_config_t::endAddress, should be aligned to the region resolution, see rdc_mem_t definitions.

typedef struct _rdc_mem_status rdc_mem_status_t

Memory region access violation status.

void RDC_Init(RDC_Type *base)

Initializes the RDC module.

This function enables the RDC clock.

Parameters:
  • base – RDC peripheral base address.

void RDC_Deinit(RDC_Type *base)

De-initializes the RDC module.

This function disables the RDC clock.

Parameters:
  • base – RDC peripheral base address.

void RDC_GetHardwareConfig(RDC_Type *base, rdc_hardware_config_t *config)

Gets the RDC hardware configuration.

This function gets the RDC hardware configurations, including number of bus masters, number of domains, number of memory regions and number of peripherals.

Parameters:
  • base – RDC peripheral base address.

  • config – Pointer to the structure to get the configuration.

static inline void RDC_EnableInterrupts(RDC_Type *base, uint32_t mask)

Enable interrupts.

Parameters:
  • base – RDC peripheral base address.

  • mask – Interrupts to enable, it is OR’ed value of enum _rdc_interrupts.

static inline void RDC_DisableInterrupts(RDC_Type *base, uint32_t mask)

Disable interrupts.

Parameters:
  • base – RDC peripheral base address.

  • mask – Interrupts to disable, it is OR’ed value of enum _rdc_interrupts.

static inline uint32_t RDC_GetInterruptStatus(RDC_Type *base)

Get the interrupt pending status.

Parameters:
  • base – RDC peripheral base address.

Returns:

Interrupts pending status, it is OR’ed value of enum _rdc_interrupts.

static inline void RDC_ClearInterruptStatus(RDC_Type *base, uint32_t mask)

Clear interrupt pending status.

Parameters:
  • base – RDC peripheral base address.

  • mask – Status to clear, it is OR’ed value of enum _rdc_interrupts.

static inline uint32_t RDC_GetStatus(RDC_Type *base)

Get RDC status.

Parameters:
  • base – RDC peripheral base address.

Returns:

mask RDC status, it is OR’ed value of enum _rdc_flags.

static inline void RDC_ClearStatus(RDC_Type *base, uint32_t mask)

Clear RDC status.

Parameters:
  • base – RDC peripheral base address.

  • mask – RDC status to clear, it is OR’ed value of enum _rdc_flags.

void RDC_SetMasterDomainAssignment(RDC_Type *base, rdc_master_t master, const rdc_domain_assignment_t *domainAssignment)

Set master domain assignment.

Parameters:
  • base – RDC peripheral base address.

  • master – Which master to set.

  • domainAssignment – Pointer to the assignment.

void RDC_GetDefaultMasterDomainAssignment(rdc_domain_assignment_t *domainAssignment)

Get default master domain assignment.

The default configuration is:

assignment->domainId = 0U;
assignment->lock = 0U;

Parameters:
  • domainAssignment – Pointer to the assignment.

static inline void RDC_LockMasterDomainAssignment(RDC_Type *base, rdc_master_t master)

Lock master domain assignment.

Once locked, it could not be unlocked until next reset.

Parameters:
  • base – RDC peripheral base address.

  • master – Which master to lock.

void RDC_SetPeriphAccessConfig(RDC_Type *base, const rdc_periph_access_config_t *config)

Set peripheral access policy.

Parameters:
  • base – RDC peripheral base address.

  • config – Pointer to the policy configuration.

void RDC_GetDefaultPeriphAccessConfig(rdc_periph_access_config_t *config)

Get default peripheral access policy.

The default configuration is:

config->lock = false;
config->enableSema = false;
config->policy = RDC_ACCESS_POLICY(0, kRDC_ReadWrite) |
                 RDC_ACCESS_POLICY(1, kRDC_ReadWrite) |
                 RDC_ACCESS_POLICY(2, kRDC_ReadWrite) |
                 RDC_ACCESS_POLICY(3, kRDC_ReadWrite);

Parameters:
  • config – Pointer to the policy configuration.

static inline void RDC_LockPeriphAccessConfig(RDC_Type *base, rdc_periph_t periph)

Lock peripheral access policy configuration.

Once locked, it could not be unlocked until reset.

Parameters:
  • base – RDC peripheral base address.

  • periph – Which peripheral to lock.

static inline uint8_t RDC_GetPeriphAccessPolicy(RDC_Type *base, rdc_periph_t periph, uint8_t domainId)

Get the peripheral access policy for specific domain.

Parameters:
  • base – RDC peripheral base address.

  • periph – Which peripheral to get.

  • domainId – Get policy for which domain.

Returns:

Access policy, see _rdc_access_policy.

void RDC_SetMemAccessConfig(RDC_Type *base, const rdc_mem_access_config_t *config)

Set memory region access policy.

Note that when setting the baseAddress and endAddress in config, should be aligned to the region resolution, see rdc_mem_t definitions.

Parameters:
  • base – RDC peripheral base address.

  • config – Pointer to the policy configuration.

void RDC_GetDefaultMemAccessConfig(rdc_mem_access_config_t *config)

Get default memory region access policy.

The default configuration is:

config->lock = false;
config->baseAddress = 0;
config->endAddress = 0;
config->policy = RDC_ACCESS_POLICY(0, kRDC_ReadWrite) |
                 RDC_ACCESS_POLICY(1, kRDC_ReadWrite) |
                 RDC_ACCESS_POLICY(2, kRDC_ReadWrite) |
                 RDC_ACCESS_POLICY(3, kRDC_ReadWrite);

Parameters:
  • config – Pointer to the policy configuration.

static inline void RDC_LockMemAccessConfig(RDC_Type *base, rdc_mem_t mem)

Lock memory access policy configuration.

Once locked, it could not be unlocked until reset. After locked, you can only call RDC_SetMemAccessValid to enable the configuration, but can not disable it or change other settings.

Parameters:
  • base – RDC peripheral base address.

  • mem – Which memory region to lock.

static inline void RDC_SetMemAccessValid(RDC_Type *base, rdc_mem_t mem, bool valid)

Enable or disable memory access policy configuration.

Parameters:
  • base – RDC peripheral base address.

  • mem – Which memory region to operate.

  • valid – Pass in true to valid, false to invalid.

void RDC_GetMemViolationStatus(RDC_Type *base, rdc_mem_t mem, rdc_mem_status_t *status)

Get the memory region violation status.

The first access violation is captured. Subsequent violations are ignored until the status register is cleared. Contents are cleared upon reading the register. Clearing of contents occurs only when the status is read by the memory region’s associated domain ID(s).

Parameters:
  • base – RDC peripheral base address.

  • mem – Which memory region to get.

  • status – The returned status.

static inline void RDC_ClearMemViolationFlag(RDC_Type *base, rdc_mem_t mem)

Clear the memory region violation flag.

Parameters:
  • base – RDC peripheral base address.

  • mem – Which memory region to clear.

static inline uint8_t RDC_GetMemAccessPolicy(RDC_Type *base, rdc_mem_t mem, uint8_t domainId)

Get the memory region access policy for specific domain.

Parameters:
  • base – RDC peripheral base address.

  • mem – Which memory region to get.

  • domainId – Get policy for which domain.

Returns:

Access policy, see _rdc_access_policy.

static inline uint8_t RDC_GetCurrentMasterDomainId(RDC_Type *base)

Gets the domain ID of the current bus master.

This function returns the domain ID of the current bus master.

Parameters:
  • base – RDC peripheral base address.

Returns:

Domain ID of current bus master.

FSL_RDC_DRIVER_VERSION
RDC_ACCESS_POLICY(domainID, policy)
struct _rdc_hardware_config
#include <fsl_rdc.h>

RDC hardware configuration.

Public Members

uint32_t domainNumber

Number of domains.

uint32_t masterNumber

Number of bus masters.

uint32_t periphNumber

Number of peripherals.

uint32_t memNumber

Number of memory regions.

struct _rdc_domain_assignment
#include <fsl_rdc.h>

Master domain assignment.

Public Members

uint32_t domainId

Domain ID.

uint32_t __pad0__

Reserved.

uint32_t lock

Lock the domain assignment.

struct _rdc_periph_access_config
#include <fsl_rdc.h>

Peripheral domain access permission configuration.

Public Members

rdc_periph_t periph

Peripheral name.

bool lock

Lock the permission until reset.

bool enableSema

Enable semaphore or not, when enabled, master should call RDC_SEMA42_Lock to lock the semaphore gate accordingly before access the peripheral.

uint16_t policy

Access policy.

struct _rdc_mem_access_config
#include <fsl_rdc.h>

Memory region domain access control configuration.

Note that when setting the rdc_mem_access_config_t::baseAddress and rdc_mem_access_config_t::endAddress, should be aligned to the region resolution, see rdc_mem_t definitions.

Public Members

rdc_mem_t mem

Memory region descriptor name.

bool lock

Lock the configuration.

uint64_t baseAddress

Start address of the memory region.

uint64_t endAddress

End address of the memory region.

uint16_t policy

Access policy.

struct _rdc_mem_status
#include <fsl_rdc.h>

Memory region access violation status.

Public Members

bool hasViolation

Violating happens or not.

uint8_t domainID

Violating Domain ID.

uint64_t address

Violating Address.

RDC_SEMA42: Hardware Semaphores Driver

FSL_RDC_SEMA42_DRIVER_VERSION

RDC_SEMA42 driver version.

void RDC_SEMA42_Init(RDC_SEMAPHORE_Type *base)

Initializes the RDC_SEMA42 module.

This function initializes the RDC_SEMA42 module. It only enables the clock but does not reset the gates because the module might be used by other processors at the same time. To reset the gates, call either RDC_SEMA42_ResetGate or RDC_SEMA42_ResetAllGates function.

Parameters:
  • base – RDC_SEMA42 peripheral base address.

void RDC_SEMA42_Deinit(RDC_SEMAPHORE_Type *base)

De-initializes the RDC_SEMA42 module.

This function de-initializes the RDC_SEMA42 module. It only disables the clock.

Parameters:
  • base – RDC_SEMA42 peripheral base address.

status_t RDC_SEMA42_TryLock(RDC_SEMAPHORE_Type *base, uint8_t gateNum, uint8_t masterIndex, uint8_t domainId)

Tries to lock the RDC_SEMA42 gate.

This function tries to lock the specific RDC_SEMA42 gate. If the gate has been locked by another processor, this function returns an error code.

Parameters:
  • base – RDC_SEMA42 peripheral base address.

  • gateNum – Gate number to lock.

  • masterIndex – Current processor master index.

  • domainId – Current processor domain ID.

Return values:
  • kStatus_Success – Lock the sema42 gate successfully.

  • kStatus_Failed – Sema42 gate has been locked by another processor.

void RDC_SEMA42_Lock(RDC_SEMAPHORE_Type *base, uint8_t gateNum, uint8_t masterIndex, uint8_t domainId)

Locks the RDC_SEMA42 gate.

This function locks the specific RDC_SEMA42 gate. If the gate has been locked by other processors, this function waits until it is unlocked and then lock it.

Parameters:
  • base – RDC_SEMA42 peripheral base address.

  • gateNum – Gate number to lock.

  • masterIndex – Current processor master index.

  • domainId – Current processor domain ID.

static inline void RDC_SEMA42_Unlock(RDC_SEMAPHORE_Type *base, uint8_t gateNum)

Unlocks the RDC_SEMA42 gate.

This function unlocks the specific RDC_SEMA42 gate. It only writes unlock value to the RDC_SEMA42 gate register. However, it does not check whether the RDC_SEMA42 gate is locked by the current processor or not. As a result, if the RDC_SEMA42 gate is not locked by the current processor, this function has no effect.

Parameters:
  • base – RDC_SEMA42 peripheral base address.

  • gateNum – Gate number to unlock.

static inline int32_t RDC_SEMA42_GetLockMasterIndex(RDC_SEMAPHORE_Type *base, uint8_t gateNum)

Gets which master has currently locked the gate.

Parameters:
  • base – RDC_SEMA42 peripheral base address.

  • gateNum – Gate number.

Returns:

Return -1 if the gate is not locked by any master, otherwise return the master index.

int32_t RDC_SEMA42_GetLockDomainID(RDC_SEMAPHORE_Type *base, uint8_t gateNum)

Gets which domain has currently locked the gate.

Parameters:
  • base – RDC_SEMA42 peripheral base address.

  • gateNum – Gate number.

Returns:

Return -1 if the gate is not locked by any domain, otherwise return the domain ID.

status_t RDC_SEMA42_ResetGate(RDC_SEMAPHORE_Type *base, uint8_t gateNum)

Resets the RDC_SEMA42 gate to an unlocked status.

This function resets a RDC_SEMA42 gate to an unlocked status.

Parameters:
  • base – RDC_SEMA42 peripheral base address.

  • gateNum – Gate number.

Return values:
  • kStatus_Success – RDC_SEMA42 gate is reset successfully.

  • kStatus_Failed – Some other reset process is ongoing.

static inline status_t RDC_SEMA42_ResetAllGates(RDC_SEMAPHORE_Type *base)

Resets all RDC_SEMA42 gates to an unlocked status.

This function resets all RDC_SEMA42 gate to an unlocked status.

Parameters:
  • base – RDC_SEMA42 peripheral base address.

Return values:
  • kStatus_Success – RDC_SEMA42 is reset successfully.

  • kStatus_RDC_SEMA42_Reseting – Some other reset process is ongoing.

RDC_SEMA42_GATE_NUM_RESET_ALL

The number to reset all RDC_SEMA42 gates.

RDC_SEMA42_GATEn(base, n)

RDC_SEMA42 gate n register address.

RDC_SEMA42_GATE_COUNT

RDC_SEMA42 gate count.

RDC_SEMAPHORE_GATE_GTFSM_MASK

SAI: Serial Audio Interface

SAI Driver

void SAI_Init(I2S_Type *base)

Initializes the SAI peripheral.

This API gates the SAI clock. The SAI module can’t operate unless SAI_Init is called to enable the clock.

Parameters:
  • base – SAI base pointer.

void SAI_Deinit(I2S_Type *base)

De-initializes the SAI peripheral.

This API gates the SAI clock. The SAI module can’t operate unless SAI_TxInit or SAI_RxInit is called to enable the clock.

Parameters:
  • base – SAI base pointer.

void SAI_TxReset(I2S_Type *base)

Resets the SAI Tx.

This function enables the software reset and FIFO reset of SAI Tx. After reset, clear the reset bit.

Parameters:
  • base – SAI base pointer

void SAI_RxReset(I2S_Type *base)

Resets the SAI Rx.

This function enables the software reset and FIFO reset of SAI Rx. After reset, clear the reset bit.

Parameters:
  • base – SAI base pointer

void SAI_TxEnable(I2S_Type *base, bool enable)

Enables/disables the SAI Tx.

Parameters:
  • base – SAI base pointer.

  • enable – True means enable SAI Tx, false means disable.

void SAI_RxEnable(I2S_Type *base, bool enable)

Enables/disables the SAI Rx.

Parameters:
  • base – SAI base pointer.

  • enable – True means enable SAI Rx, false means disable.

static inline void SAI_TxSetBitClockDirection(I2S_Type *base, sai_master_slave_t masterSlave)

Set Rx bit clock direction.

Select bit clock direction, master or slave.

Parameters:
  • base – SAI base pointer.

  • masterSlave – reference sai_master_slave_t.

static inline void SAI_RxSetBitClockDirection(I2S_Type *base, sai_master_slave_t masterSlave)

Set Rx bit clock direction.

Select bit clock direction, master or slave.

Parameters:
  • base – SAI base pointer.

  • masterSlave – reference sai_master_slave_t.

static inline void SAI_RxSetFrameSyncDirection(I2S_Type *base, sai_master_slave_t masterSlave)

Set Rx frame sync direction.

Select frame sync direction, master or slave.

Parameters:
  • base – SAI base pointer.

  • masterSlave – reference sai_master_slave_t.

static inline void SAI_TxSetFrameSyncDirection(I2S_Type *base, sai_master_slave_t masterSlave)

Set Tx frame sync direction.

Select frame sync direction, master or slave.

Parameters:
  • base – SAI base pointer.

  • masterSlave – reference sai_master_slave_t.

void SAI_TxSetBitClockRate(I2S_Type *base, uint32_t sourceClockHz, uint32_t sampleRate, uint32_t bitWidth, uint32_t channelNumbers)

Transmitter bit clock rate configurations.

Parameters:
  • base – SAI base pointer.

  • sourceClockHz – Bit clock source frequency.

  • sampleRate – Audio data sample rate.

  • bitWidth – Audio data bitWidth.

  • channelNumbers – Audio channel numbers.

void SAI_RxSetBitClockRate(I2S_Type *base, uint32_t sourceClockHz, uint32_t sampleRate, uint32_t bitWidth, uint32_t channelNumbers)

Receiver bit clock rate configurations.

Parameters:
  • base – SAI base pointer.

  • sourceClockHz – Bit clock source frequency.

  • sampleRate – Audio data sample rate.

  • bitWidth – Audio data bitWidth.

  • channelNumbers – Audio channel numbers.

void SAI_TxSetBitclockConfig(I2S_Type *base, sai_master_slave_t masterSlave, sai_bit_clock_t *config)

Transmitter Bit clock configurations.

Parameters:
  • base – SAI base pointer.

  • masterSlave – master or slave.

  • config – bit clock other configurations, can be NULL in slave mode.

void SAI_RxSetBitclockConfig(I2S_Type *base, sai_master_slave_t masterSlave, sai_bit_clock_t *config)

Receiver Bit clock configurations.

Parameters:
  • base – SAI base pointer.

  • masterSlave – master or slave.

  • config – bit clock other configurations, can be NULL in slave mode.

void SAI_TxSetFrameSyncConfig(I2S_Type *base, sai_master_slave_t masterSlave, sai_frame_sync_t *config)

SAI transmitter Frame sync configurations.

Parameters:
  • base – SAI base pointer.

  • masterSlave – master or slave.

  • config – frame sync configurations, can be NULL in slave mode.

void SAI_RxSetFrameSyncConfig(I2S_Type *base, sai_master_slave_t masterSlave, sai_frame_sync_t *config)

SAI receiver Frame sync configurations.

Parameters:
  • base – SAI base pointer.

  • masterSlave – master or slave.

  • config – frame sync configurations, can be NULL in slave mode.

void SAI_TxSetSerialDataConfig(I2S_Type *base, sai_serial_data_t *config)

SAI transmitter Serial data configurations.

Parameters:
  • base – SAI base pointer.

  • config – serial data configurations.

void SAI_RxSetSerialDataConfig(I2S_Type *base, sai_serial_data_t *config)

SAI receiver Serial data configurations.

Parameters:
  • base – SAI base pointer.

  • config – serial data configurations.

void SAI_TxSetConfig(I2S_Type *base, sai_transceiver_t *config)

SAI transmitter configurations.

Parameters:
  • base – SAI base pointer.

  • config – transmitter configurations.

void SAI_RxSetConfig(I2S_Type *base, sai_transceiver_t *config)

SAI receiver configurations.

Parameters:
  • base – SAI base pointer.

  • config – receiver configurations.

void SAI_GetClassicI2SConfig(sai_transceiver_t *config, sai_word_width_t bitWidth, sai_mono_stereo_t mode, uint32_t saiChannelMask)

Get classic I2S mode configurations.

Parameters:
  • config – transceiver configurations.

  • bitWidth – audio data bitWidth.

  • mode – audio data channel.

  • saiChannelMask – mask value of the channel to be enable.

void SAI_GetLeftJustifiedConfig(sai_transceiver_t *config, sai_word_width_t bitWidth, sai_mono_stereo_t mode, uint32_t saiChannelMask)

Get left justified mode configurations.

Parameters:
  • config – transceiver configurations.

  • bitWidth – audio data bitWidth.

  • mode – audio data channel.

  • saiChannelMask – mask value of the channel to be enable.

void SAI_GetRightJustifiedConfig(sai_transceiver_t *config, sai_word_width_t bitWidth, sai_mono_stereo_t mode, uint32_t saiChannelMask)

Get right justified mode configurations.

Parameters:
  • config – transceiver configurations.

  • bitWidth – audio data bitWidth.

  • mode – audio data channel.

  • saiChannelMask – mask value of the channel to be enable.

void SAI_GetTDMConfig(sai_transceiver_t *config, sai_frame_sync_len_t frameSyncWidth, sai_word_width_t bitWidth, uint32_t dataWordNum, uint32_t saiChannelMask)

Get TDM mode configurations.

Parameters:
  • config – transceiver configurations.

  • frameSyncWidth – length of frame sync.

  • bitWidth – audio data word width.

  • dataWordNum – word number in one frame.

  • saiChannelMask – mask value of the channel to be enable.

void SAI_GetDSPConfig(sai_transceiver_t *config, sai_frame_sync_len_t frameSyncWidth, sai_word_width_t bitWidth, sai_mono_stereo_t mode, uint32_t saiChannelMask)

Get DSP mode configurations.

DSP/PCM MODE B configuration flow for TX. RX is similiar but uses SAI_RxSetConfig instead of SAI_TxSetConfig:

SAI_GetDSPConfig(config, kSAI_FrameSyncLenOneBitClk, bitWidth, kSAI_Stereo, channelMask)
SAI_TxSetConfig(base, config)

Note

DSP mode is also called PCM mode which support MODE A and MODE B, DSP/PCM MODE A configuration flow. RX is similiar but uses SAI_RxSetConfig instead of SAI_TxSetConfig:

SAI_GetDSPConfig(config, kSAI_FrameSyncLenOneBitClk, bitWidth, kSAI_Stereo, channelMask)
config->frameSync.frameSyncEarly    = true;
SAI_TxSetConfig(base, config)

Parameters:
  • config – transceiver configurations.

  • frameSyncWidth – length of frame sync.

  • bitWidth – audio data bitWidth.

  • mode – audio data channel.

  • saiChannelMask – mask value of the channel to enable.

static inline uint32_t SAI_TxGetStatusFlag(I2S_Type *base)

Gets the SAI Tx status flag state.

Parameters:
  • base – SAI base pointer

Returns:

SAI Tx status flag value. Use the Status Mask to get the status value needed.

static inline void SAI_TxClearStatusFlags(I2S_Type *base, uint32_t mask)

Clears the SAI Tx status flag state.

Parameters:
  • base – SAI base pointer

  • mask – State mask. It can be a combination of the following source if defined:

    • kSAI_WordStartFlag

    • kSAI_SyncErrorFlag

    • kSAI_FIFOErrorFlag

static inline uint32_t SAI_RxGetStatusFlag(I2S_Type *base)

Gets the SAI Tx status flag state.

Parameters:
  • base – SAI base pointer

Returns:

SAI Rx status flag value. Use the Status Mask to get the status value needed.

static inline void SAI_RxClearStatusFlags(I2S_Type *base, uint32_t mask)

Clears the SAI Rx status flag state.

Parameters:
  • base – SAI base pointer

  • mask – State mask. It can be a combination of the following sources if defined.

    • kSAI_WordStartFlag

    • kSAI_SyncErrorFlag

    • kSAI_FIFOErrorFlag

void SAI_TxSoftwareReset(I2S_Type *base, sai_reset_type_t resetType)

Do software reset or FIFO reset .

FIFO reset means clear all the data in the FIFO, and make the FIFO pointer both to 0. Software reset means clear the Tx internal logic, including the bit clock, frame count etc. But software reset will not clear any configuration registers like TCR1~TCR5. This function will also clear all the error flags such as FIFO error, sync error etc.

Parameters:
  • base – SAI base pointer

  • resetType – Reset type, FIFO reset or software reset

void SAI_RxSoftwareReset(I2S_Type *base, sai_reset_type_t resetType)

Do software reset or FIFO reset .

FIFO reset means clear all the data in the FIFO, and make the FIFO pointer both to 0. Software reset means clear the Rx internal logic, including the bit clock, frame count etc. But software reset will not clear any configuration registers like RCR1~RCR5. This function will also clear all the error flags such as FIFO error, sync error etc.

Parameters:
  • base – SAI base pointer

  • resetType – Reset type, FIFO reset or software reset

void SAI_TxSetChannelFIFOMask(I2S_Type *base, uint8_t mask)

Set the Tx channel FIFO enable mask.

Parameters:
  • base – SAI base pointer

  • mask – Channel enable mask, 0 means all channel FIFO disabled, 1 means channel 0 enabled, 3 means both channel 0 and channel 1 enabled.

void SAI_RxSetChannelFIFOMask(I2S_Type *base, uint8_t mask)

Set the Rx channel FIFO enable mask.

Parameters:
  • base – SAI base pointer

  • mask – Channel enable mask, 0 means all channel FIFO disabled, 1 means channel 0 enabled, 3 means both channel 0 and channel 1 enabled.

void SAI_TxSetDataOrder(I2S_Type *base, sai_data_order_t order)

Set the Tx data order.

Parameters:
  • base – SAI base pointer

  • order – Data order MSB or LSB

void SAI_RxSetDataOrder(I2S_Type *base, sai_data_order_t order)

Set the Rx data order.

Parameters:
  • base – SAI base pointer

  • order – Data order MSB or LSB

void SAI_TxSetBitClockPolarity(I2S_Type *base, sai_clock_polarity_t polarity)

Set the Tx data order.

Parameters:
  • base – SAI base pointer

  • polarity

void SAI_RxSetBitClockPolarity(I2S_Type *base, sai_clock_polarity_t polarity)

Set the Rx data order.

Parameters:
  • base – SAI base pointer

  • polarity

void SAI_TxSetFrameSyncPolarity(I2S_Type *base, sai_clock_polarity_t polarity)

Set the Tx data order.

Parameters:
  • base – SAI base pointer

  • polarity

void SAI_RxSetFrameSyncPolarity(I2S_Type *base, sai_clock_polarity_t polarity)

Set the Rx data order.

Parameters:
  • base – SAI base pointer

  • polarity

static inline void SAI_TxEnableInterrupts(I2S_Type *base, uint32_t mask)

Enables the SAI Tx interrupt requests.

Parameters:
  • base – SAI base pointer

  • mask – interrupt source The parameter can be a combination of the following sources if defined.

    • kSAI_WordStartInterruptEnable

    • kSAI_SyncErrorInterruptEnable

    • kSAI_FIFOWarningInterruptEnable

    • kSAI_FIFORequestInterruptEnable

    • kSAI_FIFOErrorInterruptEnable

static inline void SAI_RxEnableInterrupts(I2S_Type *base, uint32_t mask)

Enables the SAI Rx interrupt requests.

Parameters:
  • base – SAI base pointer

  • mask – interrupt source The parameter can be a combination of the following sources if defined.

    • kSAI_WordStartInterruptEnable

    • kSAI_SyncErrorInterruptEnable

    • kSAI_FIFOWarningInterruptEnable

    • kSAI_FIFORequestInterruptEnable

    • kSAI_FIFOErrorInterruptEnable

static inline void SAI_TxDisableInterrupts(I2S_Type *base, uint32_t mask)

Disables the SAI Tx interrupt requests.

Parameters:
  • base – SAI base pointer

  • mask – interrupt source The parameter can be a combination of the following sources if defined.

    • kSAI_WordStartInterruptEnable

    • kSAI_SyncErrorInterruptEnable

    • kSAI_FIFOWarningInterruptEnable

    • kSAI_FIFORequestInterruptEnable

    • kSAI_FIFOErrorInterruptEnable

static inline void SAI_RxDisableInterrupts(I2S_Type *base, uint32_t mask)

Disables the SAI Rx interrupt requests.

Parameters:
  • base – SAI base pointer

  • mask – interrupt source The parameter can be a combination of the following sources if defined.

    • kSAI_WordStartInterruptEnable

    • kSAI_SyncErrorInterruptEnable

    • kSAI_FIFOWarningInterruptEnable

    • kSAI_FIFORequestInterruptEnable

    • kSAI_FIFOErrorInterruptEnable

static inline void SAI_TxEnableDMA(I2S_Type *base, uint32_t mask, bool enable)

Enables/disables the SAI Tx DMA requests.

Parameters:
  • base – SAI base pointer

  • mask – DMA source The parameter can be combination of the following sources if defined.

    • kSAI_FIFOWarningDMAEnable

    • kSAI_FIFORequestDMAEnable

  • enable – True means enable DMA, false means disable DMA.

static inline void SAI_RxEnableDMA(I2S_Type *base, uint32_t mask, bool enable)

Enables/disables the SAI Rx DMA requests.

Parameters:
  • base – SAI base pointer

  • mask – DMA source The parameter can be a combination of the following sources if defined.

    • kSAI_FIFOWarningDMAEnable

    • kSAI_FIFORequestDMAEnable

  • enable – True means enable DMA, false means disable DMA.

static inline uintptr_t SAI_TxGetDataRegisterAddress(I2S_Type *base, uint32_t channel)

Gets the SAI Tx data register address.

This API is used to provide a transfer address for the SAI DMA transfer configuration.

Parameters:
  • base – SAI base pointer.

  • channel – Which data channel used.

Returns:

data register address.

static inline uintptr_t SAI_RxGetDataRegisterAddress(I2S_Type *base, uint32_t channel)

Gets the SAI Rx data register address.

This API is used to provide a transfer address for the SAI DMA transfer configuration.

Parameters:
  • base – SAI base pointer.

  • channel – Which data channel used.

Returns:

data register address.

void SAI_WriteBlocking(I2S_Type *base, uint32_t channel, uint32_t bitWidth, uint8_t *buffer, uint32_t size)

Sends data using a blocking method.

Note

This function blocks by polling until data is ready to be sent.

Parameters:
  • base – SAI base pointer.

  • channel – Data channel used.

  • bitWidth – How many bits in an audio word; usually 8/16/24/32 bits.

  • buffer – Pointer to the data to be written.

  • size – Bytes to be written.

void SAI_WriteMultiChannelBlocking(I2S_Type *base, uint32_t channel, uint32_t channelMask, uint32_t bitWidth, uint8_t *buffer, uint32_t size)

Sends data to multi channel using a blocking method.

Note

This function blocks by polling until data is ready to be sent.

Parameters:
  • base – SAI base pointer.

  • channel – Data channel used.

  • channelMask – channel mask.

  • bitWidth – How many bits in an audio word; usually 8/16/24/32 bits.

  • buffer – Pointer to the data to be written.

  • size – Bytes to be written.

static inline void SAI_WriteData(I2S_Type *base, uint32_t channel, uint32_t data)

Writes data into SAI FIFO.

Parameters:
  • base – SAI base pointer.

  • channel – Data channel used.

  • data – Data needs to be written.

void SAI_ReadBlocking(I2S_Type *base, uint32_t channel, uint32_t bitWidth, uint8_t *buffer, uint32_t size)

Receives data using a blocking method.

Note

This function blocks by polling until data is ready to be sent.

Parameters:
  • base – SAI base pointer.

  • channel – Data channel used.

  • bitWidth – How many bits in an audio word; usually 8/16/24/32 bits.

  • buffer – Pointer to the data to be read.

  • size – Bytes to be read.

void SAI_ReadMultiChannelBlocking(I2S_Type *base, uint32_t channel, uint32_t channelMask, uint32_t bitWidth, uint8_t *buffer, uint32_t size)

Receives multi channel data using a blocking method.

Note

This function blocks by polling until data is ready to be sent.

Parameters:
  • base – SAI base pointer.

  • channel – Data channel used.

  • channelMask – channel mask.

  • bitWidth – How many bits in an audio word; usually 8/16/24/32 bits.

  • buffer – Pointer to the data to be read.

  • size – Bytes to be read.

static inline uint32_t SAI_ReadData(I2S_Type *base, uint32_t channel)

Reads data from the SAI FIFO.

Parameters:
  • base – SAI base pointer.

  • channel – Data channel used.

Returns:

Data in SAI FIFO.

void SAI_TransferTxCreateHandle(I2S_Type *base, sai_handle_t *handle, sai_transfer_callback_t callback, void *userData)

Initializes the SAI Tx handle.

This function initializes the Tx handle for the SAI Tx transactional APIs. Call this function once to get the handle initialized.

Parameters:
  • base – SAI base pointer

  • handle – SAI handle pointer.

  • callback – Pointer to the user callback function.

  • userData – User parameter passed to the callback function

void SAI_TransferRxCreateHandle(I2S_Type *base, sai_handle_t *handle, sai_transfer_callback_t callback, void *userData)

Initializes the SAI Rx handle.

This function initializes the Rx handle for the SAI Rx transactional APIs. Call this function once to get the handle initialized.

Parameters:
  • base – SAI base pointer.

  • handle – SAI handle pointer.

  • callback – Pointer to the user callback function.

  • userData – User parameter passed to the callback function.

void SAI_TransferTxSetConfig(I2S_Type *base, sai_handle_t *handle, sai_transceiver_t *config)

SAI transmitter transfer configurations.

This function initializes the Tx, include bit clock, frame sync, master clock, serial data and fifo configurations.

Parameters:
  • base – SAI base pointer.

  • handle – SAI handle pointer.

  • config – tranmitter configurations.

void SAI_TransferRxSetConfig(I2S_Type *base, sai_handle_t *handle, sai_transceiver_t *config)

SAI receiver transfer configurations.

This function initializes the Rx, include bit clock, frame sync, master clock, serial data and fifo configurations.

Parameters:
  • base – SAI base pointer.

  • handle – SAI handle pointer.

  • config – receiver configurations.

status_t SAI_TransferSendNonBlocking(I2S_Type *base, sai_handle_t *handle, sai_transfer_t *xfer)

Performs an interrupt non-blocking send transfer on SAI.

Note

This API returns immediately after the transfer initiates. Call the SAI_TxGetTransferStatusIRQ to poll the transfer status and check whether the transfer is finished. If the return status is not kStatus_SAI_Busy, the transfer is finished.

Parameters:
  • base – SAI base pointer.

  • handle – Pointer to the sai_handle_t structure which stores the transfer state.

  • xfer – Pointer to the sai_transfer_t structure.

Return values:
  • kStatus_Success – Successfully started the data receive.

  • kStatus_SAI_TxBusy – Previous receive still not finished.

  • kStatus_InvalidArgument – The input parameter is invalid.

status_t SAI_TransferReceiveNonBlocking(I2S_Type *base, sai_handle_t *handle, sai_transfer_t *xfer)

Performs an interrupt non-blocking receive transfer on SAI.

Note

This API returns immediately after the transfer initiates. Call the SAI_RxGetTransferStatusIRQ to poll the transfer status and check whether the transfer is finished. If the return status is not kStatus_SAI_Busy, the transfer is finished.

Parameters:
  • base – SAI base pointer

  • handle – Pointer to the sai_handle_t structure which stores the transfer state.

  • xfer – Pointer to the sai_transfer_t structure.

Return values:
  • kStatus_Success – Successfully started the data receive.

  • kStatus_SAI_RxBusy – Previous receive still not finished.

  • kStatus_InvalidArgument – The input parameter is invalid.

status_t SAI_TransferGetSendCount(I2S_Type *base, sai_handle_t *handle, size_t *count)

Gets a set byte count.

Parameters:
  • base – SAI base pointer.

  • handle – Pointer to the sai_handle_t structure which stores the transfer state.

  • count – Bytes count sent.

Return values:
  • kStatus_Success – Succeed get the transfer count.

  • kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.

status_t SAI_TransferGetReceiveCount(I2S_Type *base, sai_handle_t *handle, size_t *count)

Gets a received byte count.

Parameters:
  • base – SAI base pointer.

  • handle – Pointer to the sai_handle_t structure which stores the transfer state.

  • count – Bytes count received.

Return values:
  • kStatus_Success – Succeed get the transfer count.

  • kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.

void SAI_TransferAbortSend(I2S_Type *base, sai_handle_t *handle)

Aborts the current send.

Note

This API can be called any time when an interrupt non-blocking transfer initiates to abort the transfer early.

Parameters:
  • base – SAI base pointer.

  • handle – Pointer to the sai_handle_t structure which stores the transfer state.

void SAI_TransferAbortReceive(I2S_Type *base, sai_handle_t *handle)

Aborts the current IRQ receive.

Note

This API can be called when an interrupt non-blocking transfer initiates to abort the transfer early.

Parameters:
  • base – SAI base pointer

  • handle – Pointer to the sai_handle_t structure which stores the transfer state.

void SAI_TransferTerminateSend(I2S_Type *base, sai_handle_t *handle)

Terminate all SAI send.

This function will clear all transfer slots buffered in the sai queue. If users only want to abort the current transfer slot, please call SAI_TransferAbortSend.

Parameters:
  • base – SAI base pointer.

  • handle – SAI eDMA handle pointer.

void SAI_TransferTerminateReceive(I2S_Type *base, sai_handle_t *handle)

Terminate all SAI receive.

This function will clear all transfer slots buffered in the sai queue. If users only want to abort the current transfer slot, please call SAI_TransferAbortReceive.

Parameters:
  • base – SAI base pointer.

  • handle – SAI eDMA handle pointer.

void SAI_TransferTxHandleIRQ(I2S_Type *base, sai_handle_t *handle)

Tx interrupt handler.

Parameters:
  • base – SAI base pointer.

  • handle – Pointer to the sai_handle_t structure.

void SAI_TransferRxHandleIRQ(I2S_Type *base, sai_handle_t *handle)

Tx interrupt handler.

Parameters:
  • base – SAI base pointer.

  • handle – Pointer to the sai_handle_t structure.

FSL_SAI_DRIVER_VERSION

Version 2.4.4

_sai_status_t, SAI return status.

Values:

enumerator kStatus_SAI_TxBusy

SAI Tx is busy.

enumerator kStatus_SAI_RxBusy

SAI Rx is busy.

enumerator kStatus_SAI_TxError

SAI Tx FIFO error.

enumerator kStatus_SAI_RxError

SAI Rx FIFO error.

enumerator kStatus_SAI_QueueFull

SAI transfer queue is full.

enumerator kStatus_SAI_TxIdle

SAI Tx is idle

enumerator kStatus_SAI_RxIdle

SAI Rx is idle

_sai_channel_mask,.sai channel mask value, actual channel numbers is depend soc specific

Values:

enumerator kSAI_Channel0Mask

channel 0 mask value

enumerator kSAI_Channel1Mask

channel 1 mask value

enumerator kSAI_Channel2Mask

channel 2 mask value

enumerator kSAI_Channel3Mask

channel 3 mask value

enumerator kSAI_Channel4Mask

channel 4 mask value

enumerator kSAI_Channel5Mask

channel 5 mask value

enumerator kSAI_Channel6Mask

channel 6 mask value

enumerator kSAI_Channel7Mask

channel 7 mask value

enum _sai_protocol

Define the SAI bus type.

Values:

enumerator kSAI_BusLeftJustified

Uses left justified format.

enumerator kSAI_BusRightJustified

Uses right justified format.

enumerator kSAI_BusI2S

Uses I2S format.

enumerator kSAI_BusPCMA

Uses I2S PCM A format.

enumerator kSAI_BusPCMB

Uses I2S PCM B format.

enum _sai_master_slave

Master or slave mode.

Values:

enumerator kSAI_Master

Master mode include bclk and frame sync

enumerator kSAI_Slave

Slave mode include bclk and frame sync

enumerator kSAI_Bclk_Master_FrameSync_Slave

bclk in master mode, frame sync in slave mode

enumerator kSAI_Bclk_Slave_FrameSync_Master

bclk in slave mode, frame sync in master mode

enum _sai_mono_stereo

Mono or stereo audio format.

Values:

enumerator kSAI_Stereo

Stereo sound.

enumerator kSAI_MonoRight

Only Right channel have sound.

enumerator kSAI_MonoLeft

Only left channel have sound.

enum _sai_data_order

SAI data order, MSB or LSB.

Values:

enumerator kSAI_DataLSB

LSB bit transferred first

enumerator kSAI_DataMSB

MSB bit transferred first

enum _sai_clock_polarity

SAI clock polarity, active high or low.

Values:

enumerator kSAI_PolarityActiveHigh

Drive outputs on rising edge

enumerator kSAI_PolarityActiveLow

Drive outputs on falling edge

enumerator kSAI_SampleOnFallingEdge

Sample inputs on falling edge

enumerator kSAI_SampleOnRisingEdge

Sample inputs on rising edge

enum _sai_sync_mode

Synchronous or asynchronous mode.

Values:

enumerator kSAI_ModeAsync

Asynchronous mode

enumerator kSAI_ModeSync

Synchronous mode (with receiver or transmit)

enum _sai_mclk_source

Mater clock source.

Values:

enumerator kSAI_MclkSourceSysclk

Master clock from the system clock

enumerator kSAI_MclkSourceSelect1

Master clock from source 1

enumerator kSAI_MclkSourceSelect2

Master clock from source 2

enumerator kSAI_MclkSourceSelect3

Master clock from source 3

enum _sai_bclk_source

Bit clock source.

Values:

enumerator kSAI_BclkSourceBusclk

Bit clock using bus clock

enumerator kSAI_BclkSourceMclkOption1

Bit clock MCLK option 1

enumerator kSAI_BclkSourceMclkOption2

Bit clock MCLK option2

enumerator kSAI_BclkSourceMclkOption3

Bit clock MCLK option3

enumerator kSAI_BclkSourceMclkDiv

Bit clock using master clock divider

enumerator kSAI_BclkSourceOtherSai0

Bit clock from other SAI device

enumerator kSAI_BclkSourceOtherSai1

Bit clock from other SAI device

_sai_interrupt_enable_t, The SAI interrupt enable flag

Values:

enumerator kSAI_WordStartInterruptEnable

Word start flag, means the first word in a frame detected

enumerator kSAI_SyncErrorInterruptEnable

Sync error flag, means the sync error is detected

enumerator kSAI_FIFOWarningInterruptEnable

FIFO warning flag, means the FIFO is empty

enumerator kSAI_FIFOErrorInterruptEnable

FIFO error flag

_sai_dma_enable_t, The DMA request sources

Values:

enumerator kSAI_FIFOWarningDMAEnable

FIFO warning caused by the DMA request

_sai_flags, The SAI status flag

Values:

enumerator kSAI_WordStartFlag

Word start flag, means the first word in a frame detected

enumerator kSAI_SyncErrorFlag

Sync error flag, means the sync error is detected

enumerator kSAI_FIFOErrorFlag

FIFO error flag

enumerator kSAI_FIFOWarningFlag

FIFO warning flag

enum _sai_reset_type

The reset type.

Values:

enumerator kSAI_ResetTypeSoftware

Software reset, reset the logic state

enumerator kSAI_ResetTypeFIFO

FIFO reset, reset the FIFO read and write pointer

enumerator kSAI_ResetAll

All reset.

enum _sai_sample_rate

Audio sample rate.

Values:

enumerator kSAI_SampleRate8KHz

Sample rate 8000 Hz

enumerator kSAI_SampleRate11025Hz

Sample rate 11025 Hz

enumerator kSAI_SampleRate12KHz

Sample rate 12000 Hz

enumerator kSAI_SampleRate16KHz

Sample rate 16000 Hz

enumerator kSAI_SampleRate22050Hz

Sample rate 22050 Hz

enumerator kSAI_SampleRate24KHz

Sample rate 24000 Hz

enumerator kSAI_SampleRate32KHz

Sample rate 32000 Hz

enumerator kSAI_SampleRate44100Hz

Sample rate 44100 Hz

enumerator kSAI_SampleRate48KHz

Sample rate 48000 Hz

enumerator kSAI_SampleRate96KHz

Sample rate 96000 Hz

enumerator kSAI_SampleRate192KHz

Sample rate 192000 Hz

enumerator kSAI_SampleRate384KHz

Sample rate 384000 Hz

enum _sai_word_width

Audio word width.

Values:

enumerator kSAI_WordWidth8bits

Audio data width 8 bits

enumerator kSAI_WordWidth16bits

Audio data width 16 bits

enumerator kSAI_WordWidth24bits

Audio data width 24 bits

enumerator kSAI_WordWidth32bits

Audio data width 32 bits

enum _sai_transceiver_type

sai transceiver type

Values:

enumerator kSAI_Transmitter

sai transmitter

enumerator kSAI_Receiver

sai receiver

enum _sai_frame_sync_len

sai frame sync len

Values:

enumerator kSAI_FrameSyncLenOneBitClk

1 bit clock frame sync len for DSP mode

enumerator kSAI_FrameSyncLenPerWordWidth

Frame sync length decided by word width

typedef enum _sai_protocol sai_protocol_t

Define the SAI bus type.

typedef enum _sai_master_slave sai_master_slave_t

Master or slave mode.

typedef enum _sai_mono_stereo sai_mono_stereo_t

Mono or stereo audio format.

typedef enum _sai_data_order sai_data_order_t

SAI data order, MSB or LSB.

typedef enum _sai_clock_polarity sai_clock_polarity_t

SAI clock polarity, active high or low.

typedef enum _sai_sync_mode sai_sync_mode_t

Synchronous or asynchronous mode.

typedef enum _sai_mclk_source sai_mclk_source_t

Mater clock source.

typedef enum _sai_bclk_source sai_bclk_source_t

Bit clock source.

typedef enum _sai_reset_type sai_reset_type_t

The reset type.

typedef struct _sai_config sai_config_t

SAI user configuration structure.

typedef enum _sai_sample_rate sai_sample_rate_t

Audio sample rate.

typedef enum _sai_word_width sai_word_width_t

Audio word width.

typedef enum _sai_transceiver_type sai_transceiver_type_t

sai transceiver type

typedef enum _sai_frame_sync_len sai_frame_sync_len_t

sai frame sync len

typedef struct _sai_transfer_format sai_transfer_format_t

sai transfer format

typedef struct _sai_bit_clock sai_bit_clock_t

sai bit clock configurations

typedef struct _sai_frame_sync sai_frame_sync_t

sai frame sync configurations

typedef struct _sai_serial_data sai_serial_data_t

sai serial data configurations

typedef struct _sai_transceiver sai_transceiver_t

sai transceiver configurations

typedef struct _sai_transfer sai_transfer_t

SAI transfer structure.

typedef struct _sai_handle sai_handle_t
typedef void (*sai_transfer_callback_t)(I2S_Type *base, sai_handle_t *handle, status_t status, void *userData)

SAI transfer callback prototype.

SAI_XFER_QUEUE_SIZE

SAI transfer queue size, user can refine it according to use case.

FSL_SAI_HAS_FIFO_EXTEND_FEATURE

sai fifo feature

struct _sai_config
#include <fsl_sai.h>

SAI user configuration structure.

Public Members

sai_protocol_t protocol

Audio bus protocol in SAI

sai_sync_mode_t syncMode

SAI sync mode, control Tx/Rx clock sync

sai_bclk_source_t bclkSource

Bit Clock source

sai_master_slave_t masterSlave

Master or slave

struct _sai_transfer_format
#include <fsl_sai.h>

sai transfer format

Public Members

uint32_t sampleRate_Hz

Sample rate of audio data

uint32_t bitWidth

Data length of audio data, usually 8/16/24/32 bits

sai_mono_stereo_t stereo

Mono or stereo

uint8_t channel

Transfer start channel

uint8_t channelMask

enabled channel mask value, reference _sai_channel_mask

uint8_t endChannel

end channel number

uint8_t channelNums

Total enabled channel numbers

sai_protocol_t protocol

Which audio protocol used

bool isFrameSyncCompact

True means Frame sync length is configurable according to bitWidth, false means frame sync length is 64 times of bit clock.

struct _sai_bit_clock
#include <fsl_sai.h>

sai bit clock configurations

Public Members

bool bclkSrcSwap

bit clock source swap

bool bclkInputDelay

bit clock actually used by the transmitter is delayed by the pad output delay, this has effect of decreasing the data input setup time, but increasing the data output valid time .

sai_clock_polarity_t bclkPolarity

bit clock polarity

sai_bclk_source_t bclkSource

bit Clock source

struct _sai_frame_sync
#include <fsl_sai.h>

sai frame sync configurations

Public Members

uint8_t frameSyncWidth

frame sync width in number of bit clocks

bool frameSyncEarly

TRUE is frame sync assert one bit before the first bit of frame FALSE is frame sync assert with the first bit of the frame

sai_clock_polarity_t frameSyncPolarity

frame sync polarity

struct _sai_serial_data
#include <fsl_sai.h>

sai serial data configurations

Public Members

sai_data_order_t dataOrder

configure whether the LSB or MSB is transmitted first

uint8_t dataWord0Length

configure the number of bits in the first word in each frame

uint8_t dataWordNLength

configure the number of bits in the each word in each frame, except the first word

uint8_t dataWordLength

used to record the data length for dma transfer

uint8_t dataFirstBitShifted

Configure the bit index for the first bit transmitted for each word in the frame

uint8_t dataWordNum

configure the number of words in each frame

uint32_t dataMaskedWord

configure whether the transmit word is masked

struct _sai_transceiver
#include <fsl_sai.h>

sai transceiver configurations

Public Members

sai_serial_data_t serialData

serial data configurations

sai_frame_sync_t frameSync

ws configurations

sai_bit_clock_t bitClock

bit clock configurations

sai_master_slave_t masterSlave

transceiver is master or slave

sai_sync_mode_t syncMode

transceiver sync mode

uint8_t startChannel

Transfer start channel

uint8_t channelMask

enabled channel mask value, reference _sai_channel_mask

uint8_t endChannel

end channel number

uint8_t channelNums

Total enabled channel numbers

struct _sai_transfer
#include <fsl_sai.h>

SAI transfer structure.

Public Members

uint8_t *data

Data start address to transfer.

size_t dataSize

Transfer size.

struct _sai_handle
#include <fsl_sai.h>

SAI handle structure.

Public Members

I2S_Type *base

base address

uint32_t state

Transfer status

sai_transfer_callback_t callback

Callback function called at transfer event

void *userData

Callback parameter passed to callback function

uint8_t bitWidth

Bit width for transfer, 8/16/24/32 bits

uint8_t channel

Transfer start channel

uint8_t channelMask

enabled channel mask value, refernece _sai_channel_mask

uint8_t endChannel

end channel number

uint8_t channelNums

Total enabled channel numbers

sai_transfer_t saiQueue[(4U)]

Transfer queue storing queued transfer

size_t transferSize[(4U)]

Data bytes need to transfer

volatile uint8_t queueUser

Index for user to queue transfer

volatile uint8_t queueDriver

Index for driver to get the transfer data and size

SAI SDMA Driver

void SAI_TransferTxCreateHandleSDMA(I2S_Type *base, sai_sdma_handle_t *handle, sai_sdma_callback_t callback, void *userData, sdma_handle_t *dmaHandle, uint32_t eventSource)

Initializes the SAI SDMA handle.

This function initializes the SAI master DMA handle, which can be used for other SAI master transactional APIs. Usually, for a specified SAI instance, call this API once to get the initialized handle.

Parameters:
  • base – SAI base pointer.

  • handle – SAI SDMA handle pointer.

  • base – SAI peripheral base address.

  • callback – Pointer to user callback function.

  • userData – User parameter passed to the callback function.

  • dmaHandle – SDMA handle pointer, this handle shall be static allocated by users.

  • eventSource – SAI event source number.

void SAI_TransferRxCreateHandleSDMA(I2S_Type *base, sai_sdma_handle_t *handle, sai_sdma_callback_t callback, void *userData, sdma_handle_t *dmaHandle, uint32_t eventSource)

Initializes the SAI Rx SDMA handle.

This function initializes the SAI slave DMA handle, which can be used for other SAI master transactional APIs. Usually, for a specified SAI instance, call this API once to get the initialized handle.

Parameters:
  • base – SAI base pointer.

  • handle – SAI SDMA handle pointer.

  • base – SAI peripheral base address.

  • callback – Pointer to user callback function.

  • userData – User parameter passed to the callback function.

  • dmaHandle – SDMA handle pointer, this handle shall be static allocated by users.

  • eventSource – SAI event source number.

status_t SAI_TransferSendSDMA(I2S_Type *base, sai_sdma_handle_t *handle, sai_transfer_t *xfer)

Performs a non-blocking SAI transfer using DMA.

Note

This interface returns immediately after the transfer initiates. Call SAI_GetTransferStatus to poll the transfer status and check whether the SAI transfer is finished.

Parameters:
  • base – SAI base pointer.

  • handle – SAI SDMA handle pointer.

  • xfer – Pointer to the DMA transfer structure.

Return values:
  • kStatus_Success – Start a SAI SDMA send successfully.

  • kStatus_InvalidArgument – The input argument is invalid.

  • kStatus_TxBusy – SAI is busy sending data.

status_t SAI_TransferReceiveSDMA(I2S_Type *base, sai_sdma_handle_t *handle, sai_transfer_t *xfer)

Performs a non-blocking SAI receive using SDMA.

Note

This interface returns immediately after the transfer initiates. Call the SAI_GetReceiveRemainingBytes to poll the transfer status and check whether the SAI transfer is finished.

Parameters:
  • base – SAI base pointer

  • handle – SAI SDMA handle pointer.

  • xfer – Pointer to DMA transfer structure.

Return values:
  • kStatus_Success – Start a SAI SDMA receive successfully.

  • kStatus_InvalidArgument – The input argument is invalid.

  • kStatus_RxBusy – SAI is busy receiving data.

void SAI_TransferAbortSendSDMA(I2S_Type *base, sai_sdma_handle_t *handle)

Aborts a SAI transfer using SDMA.

Parameters:
  • base – SAI base pointer.

  • handle – SAI SDMA handle pointer.

void SAI_TransferAbortReceiveSDMA(I2S_Type *base, sai_sdma_handle_t *handle)

Aborts a SAI receive using SDMA.

Parameters:
  • base – SAI base pointer

  • handle – SAI SDMA handle pointer.

void SAI_TransferTerminateReceiveSDMA(I2S_Type *base, sai_sdma_handle_t *handle)

Terminate all the SAI sdma receive transfer.

Parameters:
  • base – SAI base pointer.

  • handle – SAI SDMA handle pointer.

void SAI_TransferTerminateSendSDMA(I2S_Type *base, sai_sdma_handle_t *handle)

Terminate all the SAI sdma send transfer.

Parameters:
  • base – SAI base pointer.

  • handle – SAI SDMA handle pointer.

void SAI_TransferRxSetConfigSDMA(I2S_Type *base, sai_sdma_handle_t *handle, sai_transceiver_t *saiConfig)

brief Configures the SAI RX.

param base SAI base pointer. param handle SAI SDMA handle pointer. param saiConig sai configurations.

void SAI_TransferTxSetConfigSDMA(I2S_Type *base, sai_sdma_handle_t *handle, sai_transceiver_t *saiConfig)

brief Configures the SAI Tx.

param base SAI base pointer. param handle SAI SDMA handle pointer. param saiConig sai configurations.

FSL_SAI_SDMA_DRIVER_VERSION

Version 2.6.0

typedef struct _sai_sdma_handle sai_sdma_handle_t
typedef void (*sai_sdma_callback_t)(I2S_Type *base, sai_sdma_handle_t *handle, status_t status, void *userData)

SAI SDMA transfer callback function for finish and error.

struct _sai_sdma_handle
#include <fsl_sai_sdma.h>

SAI DMA transfer handle, users should not touch the content of the handle.

Public Members

sdma_handle_t *dmaHandle

DMA handler for SAI send

uint8_t bytesPerFrame

Bytes in a frame

uint8_t channel

start data channel

uint8_t channelNums

total transfer channel numbers, used for multififo

uint8_t channelMask

enabled channel mask value, refernece _sai_channel_mask

uint8_t fifoOffset

fifo address offset between multifo

uint32_t count

The transfer data count in a DMA request

uint32_t state

Internal state for SAI SDMA transfer

uint32_t eventSource

SAI event source number

sai_sdma_callback_t callback

Callback for users while transfer finish or error occurs

void *userData

User callback parameter

sdma_buffer_descriptor_t bdPool[(4U)]

BD pool for SDMA transfer.

sai_transfer_t saiQueue[(4U)]

Transfer queue storing queued transfer.

size_t transferSize[(4U)]

Data bytes need to transfer

volatile uint8_t queueUser

Index for user to queue transfer.

volatile uint8_t queueDriver

Index for driver to get the transfer data and size

SDMA: Smart Direct Memory Access (SDMA) Controller Driver

void SDMA_Init(SDMAARM_Type *base, const sdma_config_t *config)

Initializes the SDMA peripheral.

This function ungates the SDMA clock and configures the SDMA peripheral according to the configuration structure.

Note

This function enables the minor loop map feature.

Parameters:
  • base – SDMA peripheral base address.

  • config – A pointer to the configuration structure, see “sdma_config_t”.

void SDMA_Deinit(SDMAARM_Type *base)

Deinitializes the SDMA peripheral.

This function gates the SDMA clock.

Parameters:
  • base – SDMA peripheral base address.

void SDMA_GetDefaultConfig(sdma_config_t *config)

Gets the SDMA default configuration structure.

This function sets the configuration structure to default values. The default configuration is set to the following values.

config.enableRealTimeDebugPin = false;
config.isSoftwareResetClearLock = true;
config.ratio = kSDMA_HalfARMClockFreq;

Parameters:
  • config – A pointer to the SDMA configuration structure.

void SDMA_ResetModule(SDMAARM_Type *base)

Sets all SDMA core register to reset status.

If only reset ARM core, SDMA register cannot return to reset value, shall call this function to reset all SDMA register to reset value. But the internal status cannot be reset.

Parameters:
  • base – SDMA peripheral base address.

static inline void SDMA_EnableChannelErrorInterrupts(SDMAARM_Type *base, uint32_t channel)

Enables the interrupt source for the SDMA error.

Enable this will trigger an interrupt while SDMA occurs error while executing scripts.

Parameters:
  • base – SDMA peripheral base address.

  • channel – SDMA channel number.

static inline void SDMA_DisableChannelErrorInterrupts(SDMAARM_Type *base, uint32_t channel)

Disables the interrupt source for the SDMA error.

Parameters:
  • base – SDMA peripheral base address.

  • channel – SDMA channel number.

void SDMA_ConfigBufferDescriptor(sdma_buffer_descriptor_t *bd, uint32_t srcAddr, uint32_t destAddr, sdma_transfer_size_t busWidth, size_t bufferSize, bool isLast, bool enableInterrupt, bool isWrap, sdma_transfer_type_t type)

Sets buffer descriptor contents.

This function sets the descriptor contents such as source, dest address and status bits.

Parameters:
  • bd – Pointer to the buffer descriptor structure.

  • srcAddr – Source address for the buffer descriptor.

  • destAddr – Destination address for the buffer descriptor.

  • busWidth – The transfer width, it only can be a member of sdma_transfer_size_t.

  • bufferSize – Buffer size for this descriptor, this number shall less than 0xFFFF. If need to transfer a big size, shall divide into several buffer descriptors.

  • isLast – Is the buffer descriptor the last one for the channel to transfer. If only one descriptor used for the channel, this bit shall set to TRUE.

  • enableInterrupt – If trigger an interrupt while this buffer descriptor transfer finished.

  • isWrap – Is the buffer descriptor need to be wrapped. While this bit set to true, it will automatically wrap to the first buffer descrtiptor to do transfer.

  • type – Transfer type, memory to memory, peripheral to memory or memory to peripheral.

static inline void SDMA_SetChannelPriority(SDMAARM_Type *base, uint32_t channel, uint8_t priority)

Set SDMA channel priority.

This function sets the channel priority. The default value is 0 for all channels, priority 0 will prevents channel from starting, so the priority must be set before start a channel.

Parameters:
  • base – SDMA peripheral base address.

  • channel – SDMA channel number.

  • priority – SDMA channel priority.

static inline void SDMA_SetSourceChannel(SDMAARM_Type *base, uint32_t source, uint32_t channelMask)

Set SDMA request source mapping channel.

This function sets which channel will be triggered by the dma request source.

Parameters:
  • base – SDMA peripheral base address.

  • source – SDMA dma request source number.

  • channelMask – SDMA channel mask. 1 means channel 0, 2 means channel 1, 4 means channel 3. SDMA supports an event trigger multi-channel. A channel can also be triggered by several source events.

static inline void SDMA_StartChannelSoftware(SDMAARM_Type *base, uint32_t channel)

Start a SDMA channel by software trigger.

This function start a channel.

Parameters:
  • base – SDMA peripheral base address.

  • channel – SDMA channel number.

static inline void SDMA_StartChannelEvents(SDMAARM_Type *base, uint32_t channel)

Start a SDMA channel by hardware events.

This function start a channel.

Parameters:
  • base – SDMA peripheral base address.

  • channel – SDMA channel number.

static inline void SDMA_StopChannel(SDMAARM_Type *base, uint32_t channel)

Stop a SDMA channel.

This function stops a channel.

Parameters:
  • base – SDMA peripheral base address.

  • channel – SDMA channel number.

void SDMA_SetContextSwitchMode(SDMAARM_Type *base, sdma_context_switch_mode_t mode)

Set the SDMA context switch mode.

Parameters:
  • base – SDMA peripheral base address.

  • mode – SDMA context switch mode.

static inline uint32_t SDMA_GetChannelInterruptStatus(SDMAARM_Type *base)

Gets the SDMA interrupt status of all channels.

Parameters:
  • base – SDMA peripheral base address.

Returns:

The interrupt status for all channels. Check the relevant bits for specific channel.

static inline void SDMA_ClearChannelInterruptStatus(SDMAARM_Type *base, uint32_t mask)

Clear the SDMA channel interrupt status of specific channels.

Parameters:
  • base – SDMA peripheral base address.

  • mask – The interrupt status need to be cleared.

static inline uint32_t SDMA_GetChannelStopStatus(SDMAARM_Type *base)

Gets the SDMA stop status of all channels.

Parameters:
  • base – SDMA peripheral base address.

Returns:

The stop status for all channels. Check the relevant bits for specific channel.

static inline void SDMA_ClearChannelStopStatus(SDMAARM_Type *base, uint32_t mask)

Clear the SDMA channel stop status of specific channels.

Parameters:
  • base – SDMA peripheral base address.

  • mask – The stop status need to be cleared.

static inline uint32_t SDMA_GetChannelPendStatus(SDMAARM_Type *base)

Gets the SDMA channel pending status of all channels.

Parameters:
  • base – SDMA peripheral base address.

Returns:

The pending status for all channels. Check the relevant bits for specific channel.

static inline void SDMA_ClearChannelPendStatus(SDMAARM_Type *base, uint32_t mask)

Clear the SDMA channel pending status of specific channels.

Parameters:
  • base – SDMA peripheral base address.

  • mask – The pending status need to be cleared.

static inline uint32_t SDMA_GetErrorStatus(SDMAARM_Type *base)

Gets the SDMA channel error status.

SDMA channel error flag is asserted while an incoming DMA request was detected and it triggers a channel that is already pending or being serviced. This probably means there is an overflow of data for that channel.

Parameters:
  • base – SDMA peripheral base address.

Returns:

The error status for all channels. Check the relevant bits for specific channel.

bool SDMA_GetRequestSourceStatus(SDMAARM_Type *base, uint32_t source)

Gets the SDMA request source pending status.

Parameters:
  • base – SDMA peripheral base address.

  • source – DMA request source number.

Returns:

True means the request source is pending, otherwise not pending.

void SDMA_CreateHandle(sdma_handle_t *handle, SDMAARM_Type *base, uint32_t channel, sdma_context_data_t *context)

Creates the SDMA handle.

This function is called if using the transactional API for SDMA. This function initializes the internal state of the SDMA handle.

Parameters:
  • handle – SDMA handle pointer. The SDMA handle stores callback function and parameters.

  • base – SDMA peripheral base address.

  • channel – SDMA channel number.

  • context – Context structure for the channel to download into SDMA. Users shall make sure the context located in a non-cacheable memory, or it will cause SDMA run fail. Users shall not touch the context contents, it only be filled by SDMA driver in SDMA_SubmitTransfer function.

void SDMA_InstallBDMemory(sdma_handle_t *handle, sdma_buffer_descriptor_t *BDPool, uint32_t BDCount)

Installs the BDs memory pool into the SDMA handle.

This function is called after the SDMA_CreateHandle to use multi-buffer feature.

Parameters:
  • handle – SDMA handle pointer.

  • BDPool – A memory pool to store BDs. It must be located in non-cacheable address.

  • BDCount – The number of BD slots.

void SDMA_SetCallback(sdma_handle_t *handle, sdma_callback callback, void *userData)

Installs a callback function for the SDMA transfer.

This callback is called in the SDMA IRQ handler. Use the callback to do something after the current major loop transfer completes.

Parameters:
  • handle – SDMA handle pointer.

  • callback – SDMA callback function pointer.

  • userData – A parameter for the callback function.

void SDMA_SetMultiFifoConfig(sdma_transfer_config_t *config, uint32_t fifoNums, uint32_t fifoOffset)

multi fifo configurations.

This api is used to support multi fifo for SDMA, if user want to get multi fifo data, then this api shoule be called before submit transfer.

Parameters:
  • config – transfer configurations.

  • fifoNums – fifo numbers that multi fifo operation perform, support up to 15 fifo numbers.

  • fifoOffset – fifoOffset = fifo address offset / sizeof(uint32_t) - 1.

void SDMA_EnableSwDone(SDMAARM_Type *base, sdma_transfer_config_t *config, uint8_t sel, sdma_peripheral_t type)

enable sdma sw done feature.

Deprecated:

Do not use this function. It has been superceded by SDMA_SetDoneConfig.

Parameters:
  • base – SDMA base.

  • config – transfer configurations.

  • sel – sw done selector.

  • type – peripheral type is used to determine the corresponding peripheral sw done selector bit.

void SDMA_SetDoneConfig(SDMAARM_Type *base, sdma_transfer_config_t *config, sdma_peripheral_t type, sdma_done_src_t doneSrc)

sdma channel done configurations.

Parameters:
  • base – SDMA base.

  • config – transfer configurations.

  • type – peripheral type.

  • doneSrc – reference sdma_done_src_t.

void SDMA_LoadScript(SDMAARM_Type *base, uint32_t destAddr, void *srcAddr, size_t bufferSizeBytes)

load script to sdma program memory.

Parameters:
  • base – SDMA base.

  • destAddr – dest script address, should be SDMA program memory address.

  • srcAddr – source address of target script.

  • bufferSizeBytes – bytes size of script.

void SDMA_DumpScript(SDMAARM_Type *base, uint32_t srcAddr, void *destAddr, size_t bufferSizeBytes)

dump script from sdma program memory.

Parameters:
  • base – SDMA base.

  • srcAddr – should be SDMA program memory address.

  • destAddr – address to store scripts.

  • bufferSizeBytes – bytes size of script.

static inline const char *SDMA_GetRamScriptVersion(SDMAARM_Type *base)

Get RAM script version.

Parameters:
  • base – SDMA base.

Returns:

The script version of RAM.

void SDMA_PrepareTransfer(sdma_transfer_config_t *config, uint32_t srcAddr, uint32_t destAddr, uint32_t srcWidth, uint32_t destWidth, uint32_t bytesEachRequest, uint32_t transferSize, uint32_t eventSource, sdma_peripheral_t peripheral, sdma_transfer_type_t type)

Prepares the SDMA transfer structure.

This function prepares the transfer configuration structure according to the user input.

Note

The data address and the data width must be consistent. For example, if the SRC is 4 bytes, the source address must be 4 bytes aligned, or it results in source address error.

Parameters:
  • config – The user configuration structure of type sdma_transfer_t.

  • srcAddr – SDMA transfer source address.

  • destAddr – SDMA transfer destination address.

  • srcWidth – SDMA transfer source address width(bytes).

  • destWidth – SDMA transfer destination address width(bytes).

  • bytesEachRequest – SDMA transfer bytes per channel request.

  • transferSize – SDMA transfer bytes to be transferred.

  • eventSource – Event source number for the transfer, if use software trigger, just write 0.

  • peripheral – Peripheral type, used to decide if need to use some special scripts.

  • type – SDMA transfer type. Used to decide the correct SDMA script address in SDMA ROM.

void SDMA_PrepareP2PTransfer(sdma_transfer_config_t *config, uint32_t srcAddr, uint32_t destAddr, uint32_t srcWidth, uint32_t destWidth, uint32_t bytesEachRequest, uint32_t transferSize, uint32_t eventSource, uint32_t eventSource1, sdma_peripheral_t peripheral, sdma_p2p_config_t *p2p)

Prepares the SDMA P2P transfer structure.

This function prepares the transfer configuration structure according to the user input.

Note

The data address and the data width must be consistent. For example, if the SRC is 4 bytes, the source address must be 4 bytes aligned, or it results in source address error.

Parameters:
  • config – The user configuration structure of type sdma_transfer_t.

  • srcAddr – SDMA transfer source address.

  • destAddr – SDMA transfer destination address.

  • srcWidth – SDMA transfer source address width(bytes).

  • destWidth – SDMA transfer destination address width(bytes).

  • bytesEachRequest – SDMA transfer bytes per channel request.

  • transferSize – SDMA transfer bytes to be transferred.

  • eventSource – Event source number for the transfer.

  • eventSource1 – Event source1 number for the transfer.

  • peripheral – Peripheral type, used to decide if need to use some special scripts.

  • p2p – sdma p2p configuration pointer.

void SDMA_SubmitTransfer(sdma_handle_t *handle, const sdma_transfer_config_t *config)

Submits the SDMA transfer request.

This function submits the SDMA transfer request according to the transfer configuration structure.

Parameters:
  • handle – SDMA handle pointer.

  • config – Pointer to SDMA transfer configuration structure.

void SDMA_StartTransfer(sdma_handle_t *handle)

SDMA starts transfer.

This function enables the channel request. Users can call this function after submitting the transfer request or before submitting the transfer request.

Parameters:
  • handle – SDMA handle pointer.

void SDMA_StopTransfer(sdma_handle_t *handle)

SDMA stops transfer.

This function disables the channel request to pause the transfer. Users can call SDMA_StartTransfer() again to resume the transfer.

Parameters:
  • handle – SDMA handle pointer.

void SDMA_AbortTransfer(sdma_handle_t *handle)

SDMA aborts transfer.

This function disables the channel request and clear transfer status bits. Users can submit another transfer after calling this API.

Parameters:
  • handle – DMA handle pointer.

uint32_t SDMA_GetTransferredBytes(sdma_handle_t *handle)

Get transferred bytes while not using BD pools.

This function returns the buffer descriptor count value if not using buffer descriptor. While do a simple transfer, which only uses one descriptor, the SDMA driver inside handle the buffer descriptor. In uart receive case, it can tell users how many data already received, also it can tells users how many data transfferd while error occurred. Notice, the count would not change while transfer is on-going using default SDMA script.

Parameters:
  • handle – DMA handle pointer.

Returns:

Transferred bytes.

void SDMA_HandleIRQ(sdma_handle_t *handle)

SDMA IRQ handler for complete a buffer descriptor transfer.

This function clears the interrupt flags and also handle the CCB for the channel.

Parameters:
  • handle – SDMA handle pointer.

FSL_SDMA_DRIVER_VERSION

SDMA driver version.

Version 2.4.2.

enum _sdma_transfer_size

SDMA transfer configuration.

Values:

enumerator kSDMA_TransferSize1Bytes

Source/Destination data transfer size is 1 byte every time

enumerator kSDMA_TransferSize2Bytes

Source/Destination data transfer size is 2 bytes every time

enumerator kSDMA_TransferSize3Bytes

Source/Destination data transfer size is 3 bytes every time

enumerator kSDMA_TransferSize4Bytes

Source/Destination data transfer size is 4 bytes every time

enum _sdma_bd_status

SDMA buffer descriptor status.

Values:

enumerator kSDMA_BDStatusDone

BD ownership, 0 means ARM core owns the BD, while 1 means SDMA owns BD.

enumerator kSDMA_BDStatusWrap

While this BD is last one, the next BD will be the first one

enumerator kSDMA_BDStatusContinuous

Buffer is allowed to transfer/receive to/from multiple buffers

enumerator kSDMA_BDStatusInterrupt

While this BD finished, send an interrupt.

enumerator kSDMA_BDStatusError

Error occurred on buffer descriptor command.

enumerator kSDMA_BDStatusLast

This BD is the last BD in this array. It means the transfer ended after this buffer

enumerator kSDMA_BDStatusExtend

Buffer descriptor extend status for SDMA scripts

enum _sdma_bd_command

SDMA buffer descriptor command.

Values:

enumerator kSDMA_BDCommandSETDM

Load SDMA data memory from ARM core memory buffer.

enumerator kSDMA_BDCommandGETDM

Copy SDMA data memory to ARM core memory buffer.

enumerator kSDMA_BDCommandSETPM

Load SDMA program memory from ARM core memory buffer.

enumerator kSDMA_BDCommandGETPM

Copy SDMA program memory to ARM core memory buffer.

enumerator kSDMA_BDCommandSETCTX

Load context for one channel into SDMA RAM from ARM platform memory buffer.

enumerator kSDMA_BDCommandGETCTX

Copy context for one channel from SDMA RAM to ARM platform memory buffer.

enum _sdma_context_switch_mode

SDMA context switch mode.

Values:

enumerator kSDMA_ContextSwitchModeStatic

SDMA context switch mode static

enumerator kSDMA_ContextSwitchModeDynamicLowPower

SDMA context switch mode dynamic with low power

enumerator kSDMA_ContextSwitchModeDynamicWithNoLoop

SDMA context switch mode dynamic with no loop

enumerator kSDMA_ContextSwitchModeDynamic

SDMA context switch mode dynamic

enum _sdma_clock_ratio

SDMA core clock frequency ratio to the ARM DMA interface.

Values:

enumerator kSDMA_HalfARMClockFreq

SDMA core clock frequency half of ARM platform

enumerator kSDMA_ARMClockFreq

SDMA core clock frequency equals to ARM platform

enum _sdma_transfer_type

SDMA transfer type.

Values:

enumerator kSDMA_MemoryToMemory

Transfer from memory to memory

enumerator kSDMA_PeripheralToMemory

Transfer from peripheral to memory

enumerator kSDMA_MemoryToPeripheral

Transfer from memory to peripheral

enumerator kSDMA_PeripheralToPeripheral

Transfer from peripheral to peripheral

enum sdma_peripheral

Peripheral type use SDMA.

Values:

enumerator kSDMA_PeripheralTypeMemory

Peripheral DDR memory

enumerator kSDMA_PeripheralTypeUART

UART use SDMA

enumerator kSDMA_PeripheralTypeUART_SP

UART instance in SPBA use SDMA

enumerator kSDMA_PeripheralTypeSPDIF

SPDIF use SDMA

enumerator kSDMA_PeripheralNormal

Normal peripheral use SDMA

enumerator kSDMA_PeripheralNormal_SP

Normal peripheral in SPBA use SDMA

enumerator kSDMA_PeripheralMultiFifoPDM

multi fifo PDM

enumerator kSDMA_PeripheralMultiFifoSaiRX

multi fifo sai rx use SDMA

enumerator kSDMA_PeripheralMultiFifoSaiTX

multi fifo sai tx use SDMA

enumerator kSDMA_PeripheralASRCM2P

asrc m2p

enumerator kSDMA_PeripheralASRCP2M

asrc p2m

enumerator kSDMA_PeripheralASRCP2P

asrc p2p

_sdma_transfer_status SDMA transfer status

Values:

enumerator kStatus_SDMA_ERROR

SDMA context error.

enumerator kStatus_SDMA_Busy

Channel is busy and can’t handle the transfer request.

_sdma_multi_fifo_mask SDMA multi fifo mask

Values:

enumerator kSDMA_MultiFifoWatermarkLevelMask

multi fifo watermark level mask

enumerator kSDMA_MultiFifoNumsMask

multi fifo nums mask

enumerator kSDMA_MultiFifoOffsetMask

multi fifo offset mask

enumerator kSDMA_MultiFifoSwDoneMask

multi fifo sw done mask

enumerator kSDMA_MultiFifoSwDoneSelectorMask

multi fifo sw done selector mask

_sdma_multi_fifo_shift SDMA multi fifo shift

Values:

enumerator kSDMA_MultiFifoWatermarkLevelShift

multi fifo watermark level shift

enumerator kSDMA_MultiFifoNumsShift

multi fifo nums shift

enumerator kSDMA_MultiFifoOffsetShift

multi fifo offset shift

enumerator kSDMA_MultiFifoSwDoneShift

multi fifo sw done shift

enumerator kSDMA_MultiFifoSwDoneSelectorShift

multi fifo sw done selector shift

_sdma_done_channel SDMA done channel

Values:

enumerator kSDMA_DoneChannel0

SDMA done channel 0

enumerator kSDMA_DoneChannel1

SDMA done channel 1

enumerator kSDMA_DoneChannel2

SDMA done channel 2

enumerator kSDMA_DoneChannel3

SDMA done channel 3

enumerator kSDMA_DoneChannel4

SDMA done channel 4

enumerator kSDMA_DoneChannel5

SDMA done channel 5

enumerator kSDMA_DoneChannel6

SDMA done channel 6

enumerator kSDMA_DoneChannel7

SDMA done channel 7

enum _sdma_done_src

SDMA done source.

Values:

enumerator kSDMA_DoneSrcSW

software done

enumerator kSDMA_DoneSrcHwEvent0U

HW event 0 is used for DONE event

enumerator kSDMA_DoneSrcHwEvent1U

HW event 1 is used for DONE event

enumerator kSDMA_DoneSrcHwEvent2U

HW event 2 is used for DONE event

enumerator kSDMA_DoneSrcHwEvent3U

HW event 3 is used for DONE event

enumerator kSDMA_DoneSrcHwEvent4U

HW event 4 is used for DONE event

enumerator kSDMA_DoneSrcHwEvent5U

HW event 5 is used for DONE event

enumerator kSDMA_DoneSrCHwEvent6U

HW event 6 is used for DONE event

enumerator kSDMA_DoneSrcHwEvent7U

HW event 7 is used for DONE event

enumerator kSDMA_DoneSrcHwEvent8U

HW event 8 is used for DONE event

enumerator kSDMA_DoneSrcHwEvent9U

HW event 9 is used for DONE event

enumerator kSDMA_DoneSrcHwEvent10U

HW event 10 is used for DONE event

enumerator kSDMA_DoneSrcHwEvent11U

HW event 11 is used for DONE event

enumerator kSDMA_DoneSrcHwEvent12U

HW event 12 is used for DONE event

enumerator kSDMA_DoneSrcHwEvent13U

HW event 13 is used for DONE event

enumerator kSDMA_DoneSrcHwEvent14U

HW event 14 is used for DONE event

enumerator kSDMA_DoneSrcHwEvent15U

HW event 15 is used for DONE event

enumerator kSDMA_DoneSrcHwEvent16U

HW event 16 is used for DONE event

enumerator kSDMA_DoneSrcHwEvent17U

HW event 17 is used for DONE event

enumerator kSDMA_DoneSrcHwEvent18U

HW event 18 is used for DONE event

enumerator kSDMA_DoneSrcHwEvent19U

HW event 19 is used for DONE event

enumerator kSDMA_DoneSrcHwEvent20U

HW event 20 is used for DONE event

enumerator kSDMA_DoneSrcHwEvent21U

HW event 21 is used for DONE event

enumerator kSDMA_DoneSrcHwEvent22U

HW event 22 is used for DONE event

enumerator kSDMA_DoneSrcHwEvent23U

HW event 23 is used for DONE event

enumerator kSDMA_DoneSrcHwEvent24U

HW event 24 is used for DONE event

enumerator kSDMA_DoneSrcHwEvent25U

HW event 25 is used for DONE event

enumerator kSDMA_DoneSrcHwEvent26U

HW event 26 is used for DONE event

enumerator kSDMA_DoneSrcHwEvent27U

HW event 27 is used for DONE event

enumerator kSDMA_DoneSrcHwEvent28U

HW event 28 is used for DONE event

enumerator kSDMA_DoneSrcHwEvent29U

HW event 29 is used for DONE event

enumerator kSDMA_DoneSrcHwEvent30U

HW event 30 is used for DONE event

enumerator kSDMA_DoneSrcHwEvent31U

HW event 31 is used for DONE event

typedef enum _sdma_transfer_size sdma_transfer_size_t

SDMA transfer configuration.

typedef enum _sdma_bd_status sdma_bd_status_t

SDMA buffer descriptor status.

typedef enum _sdma_bd_command sdma_bd_command_t

SDMA buffer descriptor command.

typedef enum _sdma_context_switch_mode sdma_context_switch_mode_t

SDMA context switch mode.

typedef enum _sdma_clock_ratio sdma_clock_ratio_t

SDMA core clock frequency ratio to the ARM DMA interface.

typedef enum _sdma_transfer_type sdma_transfer_type_t

SDMA transfer type.

typedef enum sdma_peripheral sdma_peripheral_t

Peripheral type use SDMA.

typedef enum _sdma_done_src sdma_done_src_t

SDMA done source.

typedef struct _sdma_config sdma_config_t

SDMA global configuration structure.

typedef struct _sdma_multi_fifo_config sdma_multi_fifo_config_t

SDMA multi fifo configurations.

typedef struct _sdma_sw_done_config sdma_sw_done_config_t

SDMA sw done configurations.

typedef struct _sdma_p2p_config sdma_p2p_config_t

SDMA peripheral to peripheral R7 config.

typedef struct _sdma_transfer_config sdma_transfer_config_t

SDMA transfer configuration.

This structure configures the source/destination transfer attribute.

typedef struct _sdma_buffer_descriptor sdma_buffer_descriptor_t

SDMA buffer descriptor structure.

This structure is a buffer descriptor, this structure describes the buffer start address and other options

typedef struct _sdma_channel_control sdma_channel_control_t

SDMA channel control descriptor structure.

typedef struct _sdma_context_data sdma_context_data_t

SDMA context structure for each channel. This structure can be load into SDMA core, with this structure, SDMA scripts can start work.

typedef void (*sdma_callback)(struct _sdma_handle *handle, void *userData, bool transferDone, uint32_t bdIndex)

Define callback function for SDMA.

typedef struct _sdma_handle sdma_handle_t

SDMA transfer handle structure.

SDMA_DRIVER_LOAD_RAM_SCRIPT
struct _sdma_config
#include <fsl_sdma.h>

SDMA global configuration structure.

Public Members

bool enableRealTimeDebugPin

If enable real-time debug pin, default is closed to reduce power consumption.

bool isSoftwareResetClearLock

If software reset clears the LOCK bit which prevent writing SDMA scripts into SDMA.

sdma_clock_ratio_t ratio

SDMA core clock ratio to ARM platform DMA interface

struct _sdma_multi_fifo_config
#include <fsl_sdma.h>

SDMA multi fifo configurations.

Public Members

uint8_t fifoNums

fifo numbers

uint8_t fifoOffset

offset between multi fifo data register address

struct _sdma_sw_done_config
#include <fsl_sdma.h>

SDMA sw done configurations.

Public Members

bool enableSwDone

true is enable sw done, false is disable

uint8_t swDoneSel

sw done channel number per peripheral type

struct _sdma_p2p_config
#include <fsl_sdma.h>

SDMA peripheral to peripheral R7 config.

Public Members

uint8_t sourceWatermark

lower watermark value

uint8_t destWatermark

higher water makr value

bool continuousTransfer

0: the amount of samples to be transferred is equal to the cont field of mode word 1: the amount of samples to be transferred is unknown and script will keep on transferring as long as both events are detected and script must be stopped by application.

struct _sdma_transfer_config
#include <fsl_sdma.h>

SDMA transfer configuration.

This structure configures the source/destination transfer attribute.

Public Members

uint32_t srcAddr

Source address of the transfer

uint32_t destAddr

Destination address of the transfer

sdma_transfer_size_t srcTransferSize

Source data transfer size.

sdma_transfer_size_t destTransferSize

Destination data transfer size.

uint32_t bytesPerRequest

Bytes to transfer in a minor loop

uint32_t transferSzie

Bytes to transfer for this descriptor

uint32_t scriptAddr

SDMA script address located in SDMA ROM.

uint32_t eventSource

Event source number for the channel. 0 means no event, use software trigger

uint32_t eventSource1

event source 1

bool isEventIgnore

True means software trigger, false means hardware trigger

bool isSoftTriggerIgnore

If ignore the HE bit, 1 means use hardware events trigger, 0 means software trigger

sdma_transfer_type_t type

Transfer type, transfer type used to decide the SDMA script.

sdma_multi_fifo_config_t multiFifo

multi fifo configurations

sdma_sw_done_config_t swDone

sw done selector

uint32_t watermarkLevel

watermark level

uint32_t eventMask0

event mask 0

uint32_t eventMask1

event mask 1

struct _sdma_buffer_descriptor
#include <fsl_sdma.h>

SDMA buffer descriptor structure.

This structure is a buffer descriptor, this structure describes the buffer start address and other options

Public Members

uint32_t count

Bytes of the buffer length for this buffer descriptor.

uint32_t status

E,R,I,C,W,D status bits stored here

uint32_t command

command mostlky used for channel 0

uint32_t bufferAddr

Buffer start address for this descriptor.

uint32_t extendBufferAddr

External buffer start address, this is an optional for a transfer.

struct _sdma_channel_control
#include <fsl_sdma.h>

SDMA channel control descriptor structure.

Public Members

uint32_t currentBDAddr

Address of current buffer descriptor processed

uint32_t baseBDAddr

The start address of the buffer descriptor array

uint32_t channelDesc

Optional for transfer

uint32_t status

Channel status

struct _sdma_context_data
#include <fsl_sdma.h>

SDMA context structure for each channel. This structure can be load into SDMA core, with this structure, SDMA scripts can start work.

Public Members

uint32_t GeneralReg[8]

8 general regsiters used for SDMA RISC core

struct _sdma_handle
#include <fsl_sdma.h>

SDMA transfer handle structure.

Public Members

sdma_callback callback

Callback function for major count exhausted.

void *userData

Callback function parameter.

SDMAARM_Type *base

SDMA peripheral base address.

sdma_buffer_descriptor_t *BDPool

Pointer to memory stored BD arrays.

uint32_t bdCount

How many buffer descriptor

uint32_t bdIndex

How many buffer descriptor

uint32_t eventSource

Event source count for the channel

uint32_t eventSource1

Event source 1 count for the channel

sdma_context_data_t *context

Channel context to exectute in SDMA

uint8_t channel

SDMA channel number.

uint8_t priority

SDMA channel priority

uint8_t flags

The status of the current channel.

SEMA4: Hardware Semaphores Driver

FSL_SEMA4_DRIVER_VERSION

SEMA4 driver version.

void SEMA4_Init(SEMA4_Type *base)

Initializes the SEMA4 module.

This function initializes the SEMA4 module. It only enables the clock but does not reset the gates because the module might be used by other processors at the same time. To reset the gates, call either SEMA4_ResetGate or SEMA4_ResetAllGates function.

Parameters:
  • base – SEMA4 peripheral base address.

void SEMA4_Deinit(SEMA4_Type *base)

De-initializes the SEMA4 module.

This function de-initializes the SEMA4 module. It only disables the clock.

Parameters:
  • base – SEMA4 peripheral base address.

status_t SEMA4_TryLock(SEMA4_Type *base, uint8_t gateNum, uint8_t procNum)

Tries to lock the SEMA4 gate.

This function tries to lock the specific SEMA4 gate. If the gate has been locked by another processor, this function returns an error code.

Parameters:
  • base – SEMA4 peripheral base address.

  • gateNum – Gate number to lock.

  • procNum – Current processor number.

Return values:
  • kStatus_Success – Lock the sema4 gate successfully.

  • kStatus_Fail – Sema4 gate has been locked by another processor.

void SEMA4_Lock(SEMA4_Type *base, uint8_t gateNum, uint8_t procNum)

Locks the SEMA4 gate.

This function locks the specific SEMA4 gate. If the gate has been locked by other processors, this function waits until it is unlocked and then lock it.

Parameters:
  • base – SEMA4 peripheral base address.

  • gateNum – Gate number to lock.

  • procNum – Current processor number.

static inline void SEMA4_Unlock(SEMA4_Type *base, uint8_t gateNum)

Unlocks the SEMA4 gate.

This function unlocks the specific SEMA4 gate. It only writes unlock value to the SEMA4 gate register. However, it does not check whether the SEMA4 gate is locked by the current processor or not. As a result, if the SEMA4 gate is not locked by the current processor, this function has no effect.

Parameters:
  • base – SEMA4 peripheral base address.

  • gateNum – Gate number to unlock.

static inline int32_t SEMA4_GetLockProc(SEMA4_Type *base, uint8_t gateNum)

Gets the status of the SEMA4 gate.

This function checks the lock status of a specific SEMA4 gate.

Parameters:
  • base – SEMA4 peripheral base address.

  • gateNum – Gate number.

Returns:

Return -1 if the gate is unlocked, otherwise return the processor number which has locked the gate.

status_t SEMA4_ResetGate(SEMA4_Type *base, uint8_t gateNum)

Resets the SEMA4 gate to an unlocked status.

This function resets a SEMA4 gate to an unlocked status.

Parameters:
  • base – SEMA4 peripheral base address.

  • gateNum – Gate number.

Return values:
  • kStatus_Success – SEMA4 gate is reset successfully.

  • kStatus_Fail – Some other reset process is ongoing.

static inline status_t SEMA4_ResetAllGates(SEMA4_Type *base)

Resets all SEMA4 gates to an unlocked status.

This function resets all SEMA4 gate to an unlocked status.

Parameters:
  • base – SEMA4 peripheral base address.

Return values:
  • kStatus_Success – SEMA4 is reset successfully.

  • kStatus_Fail – Some other reset process is ongoing.

static inline void SEMA4_EnableGateNotifyInterrupt(SEMA4_Type *base, uint8_t procNum, uint32_t mask)

Enable the gate notification interrupt.

Gate notification provides such feature, when core tried to lock the gate and failed, it could get notification when the gate is idle.

Parameters:
  • base – SEMA4 peripheral base address.

  • procNum – Current processor number.

  • mask – OR’ed value of the gate index, for example: (1<<0) | (1<<1) means gate 0 and gate 1.

static inline void SEMA4_DisableGateNotifyInterrupt(SEMA4_Type *base, uint8_t procNum, uint32_t mask)

Disable the gate notification interrupt.

Gate notification provides such feature, when core tried to lock the gate and failed, it could get notification when the gate is idle.

Parameters:
  • base – SEMA4 peripheral base address.

  • procNum – Current processor number.

  • mask – OR’ed value of the gate index, for example: (1<<0) | (1<<1) means gate 0 and gate 1.

static inline uint32_t SEMA4_GetGateNotifyStatus(SEMA4_Type *base, uint8_t procNum)

Get the gate notification flags.

Gate notification provides such feature, when core tried to lock the gate and failed, it could get notification when the gate is idle. The status flags are cleared automatically when the gate is locked by current core or locked again before the other core.

Parameters:
  • base – SEMA4 peripheral base address.

  • procNum – Current processor number.

Returns:

OR’ed value of the gate index, for example: (1<<0) | (1<<1) means gate 0 and gate 1 flags are pending.

status_t SEMA4_ResetGateNotify(SEMA4_Type *base, uint8_t gateNum)

Resets the SEMA4 gate IRQ notification.

This function resets a SEMA4 gate IRQ notification.

Parameters:
  • base – SEMA4 peripheral base address.

  • gateNum – Gate number.

Return values:
  • kStatus_Success – Reset successfully.

  • kStatus_Fail – Some other reset process is ongoing.

static inline status_t SEMA4_ResetAllGateNotify(SEMA4_Type *base)

Resets all SEMA4 gates IRQ notification.

This function resets all SEMA4 gate IRQ notifications.

Parameters:
  • base – SEMA4 peripheral base address.

Return values:
  • kStatus_Success – Reset successfully.

  • kStatus_Fail – Some other reset process is ongoing.

SEMA4_GATE_NUM_RESET_ALL

The number to reset all SEMA4 gates.

SEMA4_GATEn(base, n)

SEMA4 gate n register address.

SNVS: Secure Non-Volatile Storage

Secure Non-Volatile Storage High-Power

void SNVS_HP_Init(SNVS_Type *base)

Initialize the SNVS.

Note

This API should be called at the beginning of the application using the SNVS driver.

Parameters:
  • base – SNVS peripheral base address

void SNVS_HP_Deinit(SNVS_Type *base)

Deinitialize the SNVS.

Parameters:
  • base – SNVS peripheral base address

void SNVS_HP_RTC_Init(SNVS_Type *base, const snvs_hp_rtc_config_t *config)

Ungates the SNVS clock and configures the peripheral for basic operation.

Note

This API should be called at the beginning of the application using the SNVS driver.

Parameters:
  • base – SNVS peripheral base address

  • config – Pointer to the user’s SNVS configuration structure.

void SNVS_HP_RTC_Deinit(SNVS_Type *base)

Stops the RTC and SRTC timers.

Parameters:
  • base – SNVS peripheral base address

void SNVS_HP_RTC_GetDefaultConfig(snvs_hp_rtc_config_t *config)

Fills in the SNVS config struct with the default settings.

The default values are as follows.

config->rtccalenable = false;
config->rtccalvalue = 0U;
config->PIFreq = 0U;

Parameters:
  • config – Pointer to the user’s SNVS configuration structure.

status_t SNVS_HP_RTC_SetDatetime(SNVS_Type *base, const snvs_hp_rtc_datetime_t *datetime)

Sets the SNVS RTC date and time according to the given time structure.

Parameters:
  • base – SNVS peripheral base address

  • datetime – Pointer to the structure where the date and time details are stored.

Returns:

kStatus_Success: Success in setting the time and starting the SNVS RTC kStatus_InvalidArgument: Error because the datetime format is incorrect

void SNVS_HP_RTC_GetDatetime(SNVS_Type *base, snvs_hp_rtc_datetime_t *datetime)

Gets the SNVS RTC time and stores it in the given time structure.

Parameters:
  • base – SNVS peripheral base address

  • datetime – Pointer to the structure where the date and time details are stored.

status_t SNVS_HP_RTC_SetAlarm(SNVS_Type *base, const snvs_hp_rtc_datetime_t *alarmTime)

Sets the SNVS RTC alarm time.

The function sets the RTC alarm. It also checks whether the specified alarm time is greater than the present time. If not, the function does not set the alarm and returns an error.

Parameters:
  • base – SNVS peripheral base address

  • alarmTime – Pointer to the structure where the alarm time is stored.

Returns:

kStatus_Success: success in setting the SNVS RTC alarm kStatus_InvalidArgument: Error because the alarm datetime format is incorrect kStatus_Fail: Error because the alarm time has already passed

void SNVS_HP_RTC_GetAlarm(SNVS_Type *base, snvs_hp_rtc_datetime_t *datetime)

Returns the SNVS RTC alarm time.

Parameters:
  • base – SNVS peripheral base address

  • datetime – Pointer to the structure where the alarm date and time details are stored.

static inline void SNVS_HP_RTC_EnableInterrupts(SNVS_Type *base, uint32_t mask)

Enables the selected SNVS interrupts.

Parameters:
  • base – SNVS peripheral base address

  • mask – The interrupts to enable. This is a logical OR of members of the enumeration :: _snvs_hp_interrupts_t

static inline void SNVS_HP_RTC_DisableInterrupts(SNVS_Type *base, uint32_t mask)

Disables the selected SNVS interrupts.

Parameters:
  • base – SNVS peripheral base address

  • mask – The interrupts to disable. This is a logical OR of members of the enumeration :: _snvs_hp_interrupts_t

uint32_t SNVS_HP_RTC_GetEnabledInterrupts(SNVS_Type *base)

Gets the enabled SNVS interrupts.

Parameters:
  • base – SNVS peripheral base address

Returns:

The enabled interrupts. This is the logical OR of members of the enumeration :: _snvs_hp_interrupts_t

uint32_t SNVS_HP_RTC_GetStatusFlags(SNVS_Type *base)

Gets the SNVS status flags.

Parameters:
  • base – SNVS peripheral base address

Returns:

The status flags. This is the logical OR of members of the enumeration :: _snvs_hp_status_flags_t

static inline void SNVS_HP_RTC_ClearStatusFlags(SNVS_Type *base, uint32_t mask)

Clears the SNVS status flags.

Parameters:
  • base – SNVS peripheral base address

  • mask – The status flags to clear. This is a logical OR of members of the enumeration :: _snvs_hp_status_flags_t

static inline void SNVS_HP_RTC_StartTimer(SNVS_Type *base)

Starts the SNVS RTC time counter.

Parameters:
  • base – SNVS peripheral base address

static inline void SNVS_HP_RTC_StopTimer(SNVS_Type *base)

Stops the SNVS RTC time counter.

Parameters:
  • base – SNVS peripheral base address

static inline void SNVS_HP_EnableHighAssuranceCounter(SNVS_Type *base, bool enable)

Enable or disable the High Assurance Counter (HAC)

Parameters:
  • base – SNVS peripheral base address

  • enable – Pass true to enable, false to disable.

static inline void SNVS_HP_StartHighAssuranceCounter(SNVS_Type *base, bool start)

Start or stop the High Assurance Counter (HAC)

Parameters:
  • base – SNVS peripheral base address

  • start – Pass true to start, false to stop.

static inline void SNVS_HP_SetHighAssuranceCounterInitialValue(SNVS_Type *base, uint32_t value)

Set the High Assurance Counter (HAC) initialize value.

Parameters:
  • base – SNVS peripheral base address

  • value – The initial value to set.

static inline void SNVS_HP_LoadHighAssuranceCounter(SNVS_Type *base)

Load the High Assurance Counter (HAC)

This function loads the HAC initialize value to counter register.

Parameters:
  • base – SNVS peripheral base address

static inline uint32_t SNVS_HP_GetHighAssuranceCounter(SNVS_Type *base)

Get the current High Assurance Counter (HAC) value.

Parameters:
  • base – SNVS peripheral base address

Returns:

HAC currnet value.

static inline void SNVS_HP_ClearHighAssuranceCounter(SNVS_Type *base)

Clear the High Assurance Counter (HAC)

This function can be called in a functional or soft fail state. When the HAC is enabled:

  • If the HAC is cleared in the soft fail state, the SSM transitions to the hard fail state immediately;

  • If the HAC is cleared in functional state, the SSM will transition to hard fail immediately after transitioning to soft fail.

Parameters:
  • base – SNVS peripheral base address

static inline void SNVS_HP_LockHighAssuranceCounter(SNVS_Type *base)

Lock the High Assurance Counter (HAC)

Once locked, the HAC initialize value could not be changed, the HAC enable status could not be changed. This could only be unlocked by system reset.

Parameters:
  • base – SNVS peripheral base address

FSL_SNVS_HP_DRIVER_VERSION

Version 2.3.2

enum _snvs_hp_interrupts

List of SNVS interrupts.

Values:

enumerator kSNVS_RTC_AlarmInterrupt

RTC time alarm

enumerator kSNVS_RTC_PeriodicInterrupt

RTC periodic interrupt

enum _snvs_hp_status_flags

List of SNVS flags.

Values:

enumerator kSNVS_RTC_AlarmInterruptFlag

RTC time alarm flag

enumerator kSNVS_RTC_PeriodicInterruptFlag

RTC periodic interrupt flag

enumerator kSNVS_ZMK_ZeroFlag

The ZMK is zero

enumerator kSNVS_OTPMK_ZeroFlag

The OTPMK is zero

enum _snvs_hp_sv_status_flags

List of SNVS security violation flags.

Values:

enumerator kSNVS_LP_ViolationFlag

Low Power section Security Violation

enumerator kSNVS_ZMK_EccFailFlag

Zeroizable Master Key Error Correcting Code Check Failure

enumerator kSNVS_LP_SoftwareViolationFlag

LP Software Security Violation

enumerator kSNVS_FatalSoftwareViolationFlag

Software Fatal Security Violation

enumerator kSNVS_SoftwareViolationFlag

Software Security Violation

enumerator kSNVS_Violation0Flag

Security Violation 0

enumerator kSNVS_Violation1Flag

Security Violation 1

enumerator kSNVS_Violation2Flag

Security Violation 2

enumerator kSNVS_Violation4Flag

Security Violation 4

enumerator kSNVS_Violation5Flag

Security Violation 5

enum _snvs_hp_ssm_state

List of SNVS Security State Machine State.

Values:

enumerator kSNVS_SSMInit

Init

enumerator kSNVS_SSMHardFail

Hard Fail

enumerator kSNVS_SSMSoftFail

Soft Fail

enumerator kSNVS_SSMInitInter

Init Intermediate (transition state between Init and Check)

enumerator kSNVS_SSMCheck

Check

enumerator kSNVS_SSMNonSecure

Non-Secure

enumerator kSNVS_SSMTrusted

Trusted

enumerator kSNVS_SSMSecure

Secure

typedef enum _snvs_hp_interrupts snvs_hp_interrupts_t

List of SNVS interrupts.

typedef enum _snvs_hp_status_flags snvs_hp_status_flags_t

List of SNVS flags.

typedef enum _snvs_hp_sv_status_flags snvs_hp_sv_status_flags_t

List of SNVS security violation flags.

typedef struct _snvs_hp_rtc_datetime snvs_hp_rtc_datetime_t

Structure is used to hold the date and time.

typedef struct _snvs_hp_rtc_config snvs_hp_rtc_config_t

SNVS config structure.

This structure holds the configuration settings for the SNVS peripheral. To initialize this structure to reasonable defaults, call the SNVS_GetDefaultConfig() function and pass a pointer to your config structure instance.

The config struct can be made const so it resides in flash

typedef enum _snvs_hp_ssm_state snvs_hp_ssm_state_t

List of SNVS Security State Machine State.

static inline void SNVS_HP_EnableMasterKeySelection(SNVS_Type *base, bool enable)

Enable or disable master key selection.

Parameters:
  • base – SNVS peripheral base address

  • enable – Pass true to enable, false to disable.

static inline void SNVS_HP_ProgramZeroizableMasterKey(SNVS_Type *base)

Trigger to program Zeroizable Master Key.

Parameters:
  • base – SNVS peripheral base address

static inline void SNVS_HP_ChangeSSMState(SNVS_Type *base)

Trigger SSM State Transition.

Trigger state transition of the system security monitor (SSM). It results only the following transitions of the SSM:

  • Check State -> Non-Secure (when Non-Secure Boot and not in Fab Configuration)

  • Check State –> Trusted (when Secure Boot or in Fab Configuration )

  • Trusted State –> Secure

  • Secure State –> Trusted

  • Soft Fail –> Non-Secure

Parameters:
  • base – SNVS peripheral base address

static inline void SNVS_HP_SetSoftwareFatalSecurityViolation(SNVS_Type *base)

Trigger Software Fatal Security Violation.

The result SSM state transition is:

  • Check State -> Soft Fail

  • Non-Secure State -> Soft Fail

  • Trusted State -> Soft Fail

  • Secure State -> Soft Fail

Parameters:
  • base – SNVS peripheral base address

static inline void SNVS_HP_SetSoftwareSecurityViolation(SNVS_Type *base)

Trigger Software Security Violation.

The result SSM state transition is:

  • Check -> Non-Secure

  • Trusted -> Soft Fail

  • Secure -> Soft Fail

Parameters:
  • base – SNVS peripheral base address

static inline snvs_hp_ssm_state_t SNVS_HP_GetSSMState(SNVS_Type *base)

Get current SSM State.

Parameters:
  • base – SNVS peripheral base address

Returns:

Current SSM state

static inline void SNVS_HP_ResetLP(SNVS_Type *base)

Reset the SNVS LP section.

Reset the LP section except SRTC and Time alarm.

Parameters:
  • base – SNVS peripheral base address

static inline uint32_t SNVS_HP_GetStatusFlags(SNVS_Type *base)

Get the SNVS HP status flags.

The flags are returned as the OR’ed value f the enumeration :: _snvs_hp_status_flags_t.

Parameters:
  • base – SNVS peripheral base address

Returns:

The OR’ed value of status flags.

static inline void SNVS_HP_ClearStatusFlags(SNVS_Type *base, uint32_t mask)

Clear the SNVS HP status flags.

The flags to clear are passed in as the OR’ed value of the enumeration :: _snvs_hp_status_flags_t. Only these flags could be cleared using this API.

  • kSNVS_RTC_PeriodicInterruptFlag

  • kSNVS_RTC_AlarmInterruptFlag

Parameters:
  • base – SNVS peripheral base address

  • mask – OR’ed value of the flags to clear.

static inline uint32_t SNVS_HP_GetSecurityViolationStatusFlags(SNVS_Type *base)

Get the SNVS HP security violation status flags.

The flags are returned as the OR’ed value of the enumeration :: _snvs_hp_sv_status_flags_t.

Parameters:
  • base – SNVS peripheral base address

Returns:

The OR’ed value of security violation status flags.

static inline void SNVS_HP_ClearSecurityViolationStatusFlags(SNVS_Type *base, uint32_t mask)

Clear the SNVS HP security violation status flags.

The flags to clear are passed in as the OR’ed value of the enumeration :: _snvs_hp_sv_status_flags_t. Only these flags could be cleared using this API.

  • kSNVS_ZMK_EccFailFlag

  • kSNVS_Violation0Flag

  • kSNVS_Violation1Flag

  • kSNVS_Violation2Flag

  • kSNVS_Violation3Flag

  • kSNVS_Violation4Flag

  • kSNVS_Violation5Flag

Parameters:
  • base – SNVS peripheral base address

  • mask – OR’ed value of the flags to clear.

SNVS_HPSVSR_SV0_MASK
SNVS_HPSVSR_SV1_MASK
SNVS_HPSVSR_SV2_MASK
SNVS_HPSVSR_SV4_MASK
SNVS_HPSVSR_SV5_MASK
SNVS_MAKE_HP_SV_FLAG(x)

Macro to make security violation flag.

Macro help to make security violation flag kSNVS_Violation0Flag to kSNVS_Violation5Flag, For example, SNVS_MAKE_HP_SV_FLAG(0) is kSNVS_Violation0Flag.

struct _snvs_hp_rtc_datetime
#include <fsl_snvs_hp.h>

Structure is used to hold the date and time.

Public Members

uint16_t year

Range from 1970 to 2099.

uint8_t month

Range from 1 to 12.

uint8_t day

Range from 1 to 31 (depending on month).

uint8_t hour

Range from 0 to 23.

uint8_t minute

Range from 0 to 59.

uint8_t second

Range from 0 to 59.

struct _snvs_hp_rtc_config
#include <fsl_snvs_hp.h>

SNVS config structure.

This structure holds the configuration settings for the SNVS peripheral. To initialize this structure to reasonable defaults, call the SNVS_GetDefaultConfig() function and pass a pointer to your config structure instance.

The config struct can be made const so it resides in flash

Public Members

bool rtcCalEnable

true: RTC calibration mechanism is enabled; false:No calibration is used

uint32_t rtcCalValue

Defines signed calibration value for nonsecure RTC; This is a 5-bit 2’s complement value, range from -16 to +15

uint32_t periodicInterruptFreq

Defines frequency of the periodic interrupt; Range from 0 to 15

Secure Non-Volatile Storage Low-Power

void SNVS_LP_Init(SNVS_Type *base)

Ungates the SNVS clock and configures the peripheral for basic operation.

Note

This API should be called at the beginning of the application using the SNVS driver.

Parameters:
  • base – SNVS peripheral base address

void SNVS_LP_Deinit(SNVS_Type *base)

Deinit the SNVS LP section.

Parameters:
  • base – SNVS peripheral base address

status_t SNVS_LP_SRTC_SetDatetime(SNVS_Type *base, const snvs_lp_srtc_datetime_t *datetime)

Sets the SNVS SRTC date and time according to the given time structure.

Parameters:
  • base – SNVS peripheral base address

  • datetime – Pointer to the structure where the date and time details are stored.

Returns:

kStatus_Success: Success in setting the time and starting the SNVS SRTC kStatus_InvalidArgument: Error because the datetime format is incorrect

void SNVS_LP_SRTC_GetDatetime(SNVS_Type *base, snvs_lp_srtc_datetime_t *datetime)

Gets the SNVS SRTC time and stores it in the given time structure.

Parameters:
  • base – SNVS peripheral base address

  • datetime – Pointer to the structure where the date and time details are stored.

status_t SNVS_LP_SRTC_SetAlarm(SNVS_Type *base, const snvs_lp_srtc_datetime_t *alarmTime)

Sets the SNVS SRTC alarm time.

The function sets the SRTC alarm. It also checks whether the specified alarm time is greater than the present time. If not, the function does not set the alarm and returns an error. Please note, that SRTC alarm has limited resolution because only 32 most significant bits of SRTC counter are compared to SRTC Alarm register. If the alarm time is beyond SRTC resolution, the function does not set the alarm and returns an error.

Parameters:
  • base – SNVS peripheral base address

  • alarmTime – Pointer to the structure where the alarm time is stored.

Returns:

kStatus_Success: success in setting the SNVS SRTC alarm kStatus_InvalidArgument: Error because the alarm datetime format is incorrect kStatus_Fail: Error because the alarm time has already passed or is beyond resolution

void SNVS_LP_SRTC_GetAlarm(SNVS_Type *base, snvs_lp_srtc_datetime_t *datetime)

Returns the SNVS SRTC alarm time.

Parameters:
  • base – SNVS peripheral base address

  • datetime – Pointer to the structure where the alarm date and time details are stored.

static inline void SNVS_LP_SRTC_EnableInterrupts(SNVS_Type *base, uint32_t mask)

Enables the selected SNVS interrupts.

Parameters:
  • base – SNVS peripheral base address

  • mask – The interrupts to enable. This is a logical OR of members of the enumeration :: _snvs_lp_srtc_interrupts

static inline void SNVS_LP_SRTC_DisableInterrupts(SNVS_Type *base, uint32_t mask)

Disables the selected SNVS interrupts.

Parameters:
  • base – SNVS peripheral base address

  • mask – The interrupts to enable. This is a logical OR of members of the enumeration :: _snvs_lp_srtc_interrupts

uint32_t SNVS_LP_SRTC_GetEnabledInterrupts(SNVS_Type *base)

Gets the enabled SNVS interrupts.

Parameters:
  • base – SNVS peripheral base address

Returns:

The enabled interrupts. This is the logical OR of members of the enumeration :: _snvs_lp_srtc_interrupts

uint32_t SNVS_LP_SRTC_GetStatusFlags(SNVS_Type *base)

Gets the SNVS status flags.

Parameters:
  • base – SNVS peripheral base address

Returns:

The status flags. This is the logical OR of members of the enumeration :: _snvs_lp_srtc_status_flags

static inline void SNVS_LP_SRTC_ClearStatusFlags(SNVS_Type *base, uint32_t mask)

Clears the SNVS status flags.

Parameters:
  • base – SNVS peripheral base address

  • mask – The status flags to clear. This is a logical OR of members of the enumeration :: _snvs_lp_srtc_status_flags

static inline void SNVS_LP_SRTC_StartTimer(SNVS_Type *base)

Starts the SNVS SRTC time counter.

Parameters:
  • base – SNVS peripheral base address

static inline void SNVS_LP_SRTC_StopTimer(SNVS_Type *base)

Stops the SNVS SRTC time counter.

Parameters:
  • base – SNVS peripheral base address

void SNVS_LP_PassiveTamperPin_GetDefaultConfig(snvs_lp_passive_tamper_t *config)

Fills in the SNVS tamper pin config struct with the default settings.

The default values are as follows. code config->polarity = 0U; config->filterenable = 0U; if available on SoC config->filter = 0U; if available on SoC endcode

Parameters:
  • config – Pointer to the user’s SNVS configuration structure.

static inline void SNVS_LP_EnableMonotonicCounter(SNVS_Type *base, bool enable)

Enable or disable the Monotonic Counter.

Parameters:
  • base – SNVS peripheral base address

  • enable – Pass true to enable, false to disable.

uint64_t SNVS_LP_GetMonotonicCounter(SNVS_Type *base)

Get the current Monotonic Counter.

Parameters:
  • base – SNVS peripheral base address

Returns:

Current Monotonic Counter value.

static inline void SNVS_LP_IncreaseMonotonicCounter(SNVS_Type *base)

Increase the Monotonic Counter.

Increase the Monotonic Counter by 1.

Parameters:
  • base – SNVS peripheral base address

void SNVS_LP_WriteZeroizableMasterKey(SNVS_Type *base, uint32_t ZMKey[8U])

Write Zeroizable Master Key (ZMK) to the SNVS registers.

Parameters:
  • base – SNVS peripheral base address

  • ZMKey – The ZMK write to the SNVS register.

static inline void SNVS_LP_SetZeroizableMasterKeyValid(SNVS_Type *base, bool valid)

Set Zeroizable Master Key valid.

This API could only be called when using software programming mode. After writing ZMK using SNVS_LP_WriteZeroizableMasterKey, call this API to make the ZMK valid.

Parameters:
  • base – SNVS peripheral base address

  • valid – Pass true to set valid, false to set invalid.

static inline bool SNVS_LP_GetZeroizableMasterKeyValid(SNVS_Type *base)

Get Zeroizable Master Key valid status.

In hardware programming mode, call this API to check whether the ZMK is valid.

Parameters:
  • base – SNVS peripheral base address

Returns:

true if valid, false if invalid.

static inline void SNVS_LP_SetZeroizableMasterKeyProgramMode(SNVS_Type *base, snvs_lp_zmk_program_mode_t mode)

Set Zeroizable Master Key programming mode.

Parameters:
  • base – SNVS peripheral base address

  • mode – ZMK programming mode.

static inline void SNVS_LP_EnableZeroizableMasterKeyECC(SNVS_Type *base, bool enable)

Enable or disable Zeroizable Master Key ECC.

Parameters:
  • base – SNVS peripheral base address

  • enable – Pass true to enable, false to disable.

static inline void SNVS_LP_SetMasterKeyMode(SNVS_Type *base, snvs_lp_master_key_mode_t mode)

Set SNVS Master Key mode.

Note

When kSNVS_ZMK or kSNVS_CMK used, the SNVS_HP must be configured to enable the master key selection.

Parameters:
  • base – SNVS peripheral base address

  • mode – Master Key mode.

FSL_SNVS_LP_DRIVER_VERSION

Version 2.4.6

enum _snvs_lp_srtc_interrupts

List of SNVS_LP interrupts.

Values:

enumerator kSNVS_SRTC_AlarmInterrupt

SRTC time alarm.

enum _snvs_lp_srtc_status_flags

List of SNVS_LP flags.

Values:

enumerator kSNVS_SRTC_AlarmInterruptFlag

SRTC time alarm flag

enum _snvs_lp_external_tamper_status

List of SNVS_LP external tampers status.

Values:

enumerator kSNVS_TamperNotDetected
enumerator kSNVS_TamperDetected
enum _snvs_lp_external_tamper_polarity

SNVS_LP external tamper polarity.

Values:

enumerator kSNVS_ExternalTamperActiveLow
enumerator kSNVS_ExternalTamperActiveHigh
enum _snvs_lp_zmk_program_mode

SNVS_LP Zeroizable Master Key programming mode.

Values:

enumerator kSNVS_ZMKSoftwareProgram

Software programming mode.

enumerator kSNVS_ZMKHardwareProgram

Hardware programming mode.

enum _snvs_lp_master_key_mode

SNVS_LP Master Key mode.

Values:

enumerator kSNVS_OTPMK

One Time Programmable Master Key.

enumerator kSNVS_ZMK

Zeroizable Master Key.

enumerator kSNVS_CMK

Combined Master Key, it is XOR of OPTMK and ZMK.

typedef enum _snvs_lp_srtc_interrupts snvs_lp_srtc_interrupts_t

List of SNVS_LP interrupts.

typedef enum _snvs_lp_srtc_status_flags snvs_lp_srtc_status_flags_t

List of SNVS_LP flags.

typedef enum _snvs_lp_external_tamper_status snvs_lp_external_tamper_status_t

List of SNVS_LP external tampers status.

typedef enum _snvs_lp_external_tamper_polarity snvs_lp_external_tamper_polarity_t

SNVS_LP external tamper polarity.

typedef struct _snvs_lp_srtc_datetime snvs_lp_srtc_datetime_t

Structure is used to hold the date and time.

typedef struct _snvs_lp_srtc_config snvs_lp_srtc_config_t

SNVS_LP config structure.

This structure holds the configuration settings for the SNVS_LP peripheral. To initialize this structure to reasonable defaults, call the SNVS_LP_GetDefaultConfig() function and pass a pointer to your config structure instance.

The config struct can be made const so it resides in flash

typedef enum _snvs_lp_zmk_program_mode snvs_lp_zmk_program_mode_t

SNVS_LP Zeroizable Master Key programming mode.

typedef enum _snvs_lp_master_key_mode snvs_lp_master_key_mode_t

SNVS_LP Master Key mode.

void SNVS_LP_SRTC_Init(SNVS_Type *base, const snvs_lp_srtc_config_t *config)

Ungates the SNVS clock and configures the peripheral for basic operation.

Note

This API should be called at the beginning of the application using the SNVS driver.

Parameters:
  • base – SNVS peripheral base address

  • config – Pointer to the user’s SNVS configuration structure.

void SNVS_LP_SRTC_Deinit(SNVS_Type *base)

Stops the SRTC timer.

Parameters:
  • base – SNVS peripheral base address

void SNVS_LP_SRTC_GetDefaultConfig(snvs_lp_srtc_config_t *config)

Fills in the SNVS_LP config struct with the default settings.

The default values are as follows.

config->srtccalenable = false;
config->srtccalvalue = 0U;

Parameters:
  • config – Pointer to the user’s SNVS configuration structure.

SNVS_ZMK_REG_COUNT

Define of SNVS_LP Zeroizable Master Key registers.

SNVS_LP_MAX_TAMPER

Define of SNVS_LP Max possible tamper.

struct snvs_lp_passive_tamper_t
#include <fsl_snvs_lp.h>

Structure is used to configure SNVS LP passive tamper pins.

struct _snvs_lp_srtc_datetime
#include <fsl_snvs_lp.h>

Structure is used to hold the date and time.

Public Members

uint16_t year

Range from 1970 to 2099.

uint8_t month

Range from 1 to 12.

uint8_t day

Range from 1 to 31 (depending on month).

uint8_t hour

Range from 0 to 23.

uint8_t minute

Range from 0 to 59.

uint8_t second

Range from 0 to 59.

struct _snvs_lp_srtc_config
#include <fsl_snvs_lp.h>

SNVS_LP config structure.

This structure holds the configuration settings for the SNVS_LP peripheral. To initialize this structure to reasonable defaults, call the SNVS_LP_GetDefaultConfig() function and pass a pointer to your config structure instance.

The config struct can be made const so it resides in flash

Public Members

bool srtcCalEnable

true: SRTC calibration mechanism is enabled; false: No calibration is used

uint32_t srtcCalValue

Defines signed calibration value for SRTC; This is a 5-bit 2’s complement value, range from -16 to +15

SPDIF: Sony/Philips Digital Interface

void SPDIF_Init(SPDIF_Type *base, const spdif_config_t *config)

Initializes the SPDIF peripheral.

Ungates the SPDIF clock, resets the module, and configures SPDIF with a configuration structure. The configuration structure can be custom filled or set with default values by SPDIF_GetDefaultConfig().

Note

This API should be called at the beginning of the application to use the SPDIF driver. Otherwise, accessing the SPDIF module can cause a hard fault because the clock is not enabled.

Parameters:
  • base – SPDIF base pointer

  • config – SPDIF configuration structure.

void SPDIF_GetDefaultConfig(spdif_config_t *config)

Sets the SPDIF configuration structure to default values.

This API initializes the configuration structure for use in SPDIF_Init. The initialized structure can remain unchanged in SPDIF_Init, or it can be modified before calling SPDIF_Init. This is an example.

spdif_config_t config;
SPDIF_GetDefaultConfig(&config);

Parameters:
  • config – pointer to master configuration structure

void SPDIF_Deinit(SPDIF_Type *base)

De-initializes the SPDIF peripheral.

This API gates the SPDIF clock. The SPDIF module can’t operate unless SPDIF_Init is called to enable the clock.

Parameters:
  • base – SPDIF base pointer

uint32_t SPDIF_GetInstance(SPDIF_Type *base)

Get the instance number for SPDIF.

Parameters:
  • base – SPDIF base pointer.

static inline void SPDIF_TxFIFOReset(SPDIF_Type *base)

Resets the SPDIF Tx.

This function makes Tx FIFO in reset mode.

Parameters:
  • base – SPDIF base pointer

static inline void SPDIF_RxFIFOReset(SPDIF_Type *base)

Resets the SPDIF Rx.

This function enables the software reset and FIFO reset of SPDIF Rx. After reset, clear the reset bit.

Parameters:
  • base – SPDIF base pointer

void SPDIF_TxEnable(SPDIF_Type *base, bool enable)

Enables/disables the SPDIF Tx.

Parameters:
  • base – SPDIF base pointer

  • enable – True means enable SPDIF Tx, false means disable.

static inline void SPDIF_RxEnable(SPDIF_Type *base, bool enable)

Enables/disables the SPDIF Rx.

Parameters:
  • base – SPDIF base pointer

  • enable – True means enable SPDIF Rx, false means disable.

static inline uint32_t SPDIF_GetStatusFlag(SPDIF_Type *base)

Gets the SPDIF status flag state.

Parameters:
  • base – SPDIF base pointer

Returns:

SPDIF status flag value. Use the _spdif_interrupt_enable_t to get the status value needed.

static inline void SPDIF_ClearStatusFlags(SPDIF_Type *base, uint32_t mask)

Clears the SPDIF status flag state.

Parameters:
  • base – SPDIF base pointer

  • mask – State mask. It can be a combination of the _spdif_interrupt_enable_t member. Notice these members cannot be included, as these flags cannot be cleared by writing 1 to these bits:

    • kSPDIF_UChannelReceiveRegisterFull

    • kSPDIF_QChannelReceiveRegisterFull

    • kSPDIF_TxFIFOEmpty

    • kSPDIF_RxFIFOFull

static inline void SPDIF_EnableInterrupts(SPDIF_Type *base, uint32_t mask)

Enables the SPDIF Tx interrupt requests.

Parameters:
  • base – SPDIF base pointer

  • mask – interrupt source The parameter can be a combination of the following sources if defined.

    • kSPDIF_WordStartInterruptEnable

    • kSPDIF_SyncErrorInterruptEnable

    • kSPDIF_FIFOWarningInterruptEnable

    • kSPDIF_FIFORequestInterruptEnable

    • kSPDIF_FIFOErrorInterruptEnable

static inline void SPDIF_DisableInterrupts(SPDIF_Type *base, uint32_t mask)

Disables the SPDIF Tx interrupt requests.

Parameters:
  • base – SPDIF base pointer

  • mask – interrupt source The parameter can be a combination of the following sources if defined.

    • kSPDIF_WordStartInterruptEnable

    • kSPDIF_SyncErrorInterruptEnable

    • kSPDIF_FIFOWarningInterruptEnable

    • kSPDIF_FIFORequestInterruptEnable

    • kSPDIF_FIFOErrorInterruptEnable

static inline void SPDIF_EnableDMA(SPDIF_Type *base, uint32_t mask, bool enable)

Enables/disables the SPDIF DMA requests.

Parameters:
  • base – SPDIF base pointer

  • mask – SPDIF DMA enable mask, The parameter can be a combination of the following sources if defined

    • kSPDIF_RxDMAEnable

    • kSPDIF_TxDMAEnable

  • enable – True means enable DMA, false means disable DMA.

static inline uint32_t SPDIF_TxGetLeftDataRegisterAddress(SPDIF_Type *base)

Gets the SPDIF Tx left data register address.

This API is used to provide a transfer address for the SPDIF DMA transfer configuration.

Parameters:
  • base – SPDIF base pointer.

Returns:

data register address.

static inline uint32_t SPDIF_TxGetRightDataRegisterAddress(SPDIF_Type *base)

Gets the SPDIF Tx right data register address.

This API is used to provide a transfer address for the SPDIF DMA transfer configuration.

Parameters:
  • base – SPDIF base pointer.

Returns:

data register address.

static inline uint32_t SPDIF_RxGetLeftDataRegisterAddress(SPDIF_Type *base)

Gets the SPDIF Rx left data register address.

This API is used to provide a transfer address for the SPDIF DMA transfer configuration.

Parameters:
  • base – SPDIF base pointer.

Returns:

data register address.

static inline uint32_t SPDIF_RxGetRightDataRegisterAddress(SPDIF_Type *base)

Gets the SPDIF Rx right data register address.

This API is used to provide a transfer address for the SPDIF DMA transfer configuration.

Parameters:
  • base – SPDIF base pointer.

Returns:

data register address.

void SPDIF_TxSetSampleRate(SPDIF_Type *base, uint32_t sampleRate_Hz, uint32_t sourceClockFreq_Hz)

Configures the SPDIF Tx sample rate.

The audio format can be changed at run-time. This function configures the sample rate.

Parameters:
  • base – SPDIF base pointer.

  • sampleRate_Hz – SPDIF sample rate frequency in Hz.

  • sourceClockFreq_Hz – SPDIF tx clock source frequency in Hz.

uint32_t SPDIF_GetRxSampleRate(SPDIF_Type *base, uint32_t clockSourceFreq_Hz)

Configures the SPDIF Rx audio format.

The audio format can be changed at run-time. This function configures the sample rate and audio data format to be transferred.

Parameters:
  • base – SPDIF base pointer.

  • clockSourceFreq_Hz – SPDIF system clock frequency in hz.

void SPDIF_WriteBlocking(SPDIF_Type *base, uint8_t *buffer, uint32_t size)

Sends data using a blocking method.

Note

This function blocks by polling until data is ready to be sent.

Parameters:
  • base – SPDIF base pointer.

  • buffer – Pointer to the data to be written.

  • size – Bytes to be written.

static inline void SPDIF_WriteLeftData(SPDIF_Type *base, uint32_t data)

Writes data into SPDIF FIFO.

Parameters:
  • base – SPDIF base pointer.

  • data – Data needs to be written.

static inline void SPDIF_WriteRightData(SPDIF_Type *base, uint32_t data)

Writes data into SPDIF FIFO.

Parameters:
  • base – SPDIF base pointer.

  • data – Data needs to be written.

static inline void SPDIF_WriteChannelStatusHigh(SPDIF_Type *base, uint32_t data)

Writes data into SPDIF FIFO.

Parameters:
  • base – SPDIF base pointer.

  • data – Data needs to be written.

static inline void SPDIF_WriteChannelStatusLow(SPDIF_Type *base, uint32_t data)

Writes data into SPDIF FIFO.

Parameters:
  • base – SPDIF base pointer.

  • data – Data needs to be written.

void SPDIF_ReadBlocking(SPDIF_Type *base, uint8_t *buffer, uint32_t size)

Receives data using a blocking method.

Note

This function blocks by polling until data is ready to be sent.

Parameters:
  • base – SPDIF base pointer.

  • buffer – Pointer to the data to be read.

  • size – Bytes to be read.

static inline uint32_t SPDIF_ReadLeftData(SPDIF_Type *base)

Reads data from the SPDIF FIFO.

Parameters:
  • base – SPDIF base pointer.

Returns:

Data in SPDIF FIFO.

static inline uint32_t SPDIF_ReadRightData(SPDIF_Type *base)

Reads data from the SPDIF FIFO.

Parameters:
  • base – SPDIF base pointer.

Returns:

Data in SPDIF FIFO.

static inline uint32_t SPDIF_ReadChannelStatusHigh(SPDIF_Type *base)

Reads data from the SPDIF FIFO.

Parameters:
  • base – SPDIF base pointer.

Returns:

Data in SPDIF FIFO.

static inline uint32_t SPDIF_ReadChannelStatusLow(SPDIF_Type *base)

Reads data from the SPDIF FIFO.

Parameters:
  • base – SPDIF base pointer.

Returns:

Data in SPDIF FIFO.

static inline uint32_t SPDIF_ReadQChannel(SPDIF_Type *base)

Reads data from the SPDIF FIFO.

Parameters:
  • base – SPDIF base pointer.

Returns:

Data in SPDIF FIFO.

static inline uint32_t SPDIF_ReadUChannel(SPDIF_Type *base)

Reads data from the SPDIF FIFO.

Parameters:
  • base – SPDIF base pointer.

Returns:

Data in SPDIF FIFO.

void SPDIF_TransferTxCreateHandle(SPDIF_Type *base, spdif_handle_t *handle, spdif_transfer_callback_t callback, void *userData)

Initializes the SPDIF Tx handle.

This function initializes the Tx handle for the SPDIF Tx transactional APIs. Call this function once to get the handle initialized.

Parameters:
  • base – SPDIF base pointer

  • handle – SPDIF handle pointer.

  • callback – Pointer to the user callback function.

  • userData – User parameter passed to the callback function

void SPDIF_TransferRxCreateHandle(SPDIF_Type *base, spdif_handle_t *handle, spdif_transfer_callback_t callback, void *userData)

Initializes the SPDIF Rx handle.

This function initializes the Rx handle for the SPDIF Rx transactional APIs. Call this function once to get the handle initialized.

Parameters:
  • base – SPDIF base pointer.

  • handle – SPDIF handle pointer.

  • callback – Pointer to the user callback function.

  • userData – User parameter passed to the callback function.

status_t SPDIF_TransferSendNonBlocking(SPDIF_Type *base, spdif_handle_t *handle, spdif_transfer_t *xfer)

Performs an interrupt non-blocking send transfer on SPDIF.

Note

This API returns immediately after the transfer initiates. Call the SPDIF_TxGetTransferStatusIRQ to poll the transfer status and check whether the transfer is finished. If the return status is not kStatus_SPDIF_Busy, the transfer is finished.

Parameters:
  • base – SPDIF base pointer.

  • handle – Pointer to the spdif_handle_t structure which stores the transfer state.

  • xfer – Pointer to the spdif_transfer_t structure.

Return values:
  • kStatus_Success – Successfully started the data receive.

  • kStatus_SPDIF_TxBusy – Previous receive still not finished.

  • kStatus_InvalidArgument – The input parameter is invalid.

status_t SPDIF_TransferReceiveNonBlocking(SPDIF_Type *base, spdif_handle_t *handle, spdif_transfer_t *xfer)

Performs an interrupt non-blocking receive transfer on SPDIF.

Note

This API returns immediately after the transfer initiates. Call the SPDIF_RxGetTransferStatusIRQ to poll the transfer status and check whether the transfer is finished. If the return status is not kStatus_SPDIF_Busy, the transfer is finished.

Parameters:
  • base – SPDIF base pointer

  • handle – Pointer to the spdif_handle_t structure which stores the transfer state.

  • xfer – Pointer to the spdif_transfer_t structure.

Return values:
  • kStatus_Success – Successfully started the data receive.

  • kStatus_SPDIF_RxBusy – Previous receive still not finished.

  • kStatus_InvalidArgument – The input parameter is invalid.

status_t SPDIF_TransferGetSendCount(SPDIF_Type *base, spdif_handle_t *handle, size_t *count)

Gets a set byte count.

Parameters:
  • base – SPDIF base pointer.

  • handle – Pointer to the spdif_handle_t structure which stores the transfer state.

  • count – Bytes count sent.

Return values:
  • kStatus_Success – Succeed get the transfer count.

  • kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.

status_t SPDIF_TransferGetReceiveCount(SPDIF_Type *base, spdif_handle_t *handle, size_t *count)

Gets a received byte count.

Parameters:
  • base – SPDIF base pointer.

  • handle – Pointer to the spdif_handle_t structure which stores the transfer state.

  • count – Bytes count received.

Return values:
  • kStatus_Success – Succeed get the transfer count.

  • kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.

void SPDIF_TransferAbortSend(SPDIF_Type *base, spdif_handle_t *handle)

Aborts the current send.

Note

This API can be called any time when an interrupt non-blocking transfer initiates to abort the transfer early.

Parameters:
  • base – SPDIF base pointer.

  • handle – Pointer to the spdif_handle_t structure which stores the transfer state.

void SPDIF_TransferAbortReceive(SPDIF_Type *base, spdif_handle_t *handle)

Aborts the current IRQ receive.

Note

This API can be called when an interrupt non-blocking transfer initiates to abort the transfer early.

Parameters:
  • base – SPDIF base pointer

  • handle – Pointer to the spdif_handle_t structure which stores the transfer state.

void SPDIF_TransferTxHandleIRQ(SPDIF_Type *base, spdif_handle_t *handle)

Tx interrupt handler.

Parameters:
  • base – SPDIF base pointer.

  • handle – Pointer to the spdif_handle_t structure.

void SPDIF_TransferRxHandleIRQ(SPDIF_Type *base, spdif_handle_t *handle)

Tx interrupt handler.

Parameters:
  • base – SPDIF base pointer.

  • handle – Pointer to the spdif_handle_t structure.

FSL_SPDIF_DRIVER_VERSION

Version 2.0.7

SPDIF return status.

Values:

enumerator kStatus_SPDIF_RxDPLLLocked

SPDIF Rx PLL locked.

enumerator kStatus_SPDIF_TxFIFOError

SPDIF Tx FIFO error.

enumerator kStatus_SPDIF_TxFIFOResync

SPDIF Tx left and right FIFO resync.

enumerator kStatus_SPDIF_RxCnew

SPDIF Rx status channel value updated.

enumerator kStatus_SPDIF_ValidatyNoGood

SPDIF validaty flag not good.

enumerator kStatus_SPDIF_RxIllegalSymbol

SPDIF Rx receive illegal symbol.

enumerator kStatus_SPDIF_RxParityBitError

SPDIF Rx parity bit error.

enumerator kStatus_SPDIF_UChannelOverrun

SPDIF receive U channel overrun.

enumerator kStatus_SPDIF_QChannelOverrun

SPDIF receive Q channel overrun.

enumerator kStatus_SPDIF_UQChannelSync

SPDIF U/Q channel sync found.

enumerator kStatus_SPDIF_UQChannelFrameError

SPDIF U/Q channel frame error.

enumerator kStatus_SPDIF_RxFIFOError

SPDIF Rx FIFO error.

enumerator kStatus_SPDIF_RxFIFOResync

SPDIF Rx left and right FIFO resync.

enumerator kStatus_SPDIF_LockLoss

SPDIF Rx PLL clock lock loss.

enumerator kStatus_SPDIF_TxIdle

SPDIF Tx is idle

enumerator kStatus_SPDIF_RxIdle

SPDIF Rx is idle

enumerator kStatus_SPDIF_QueueFull

SPDIF queue full

enum _spdif_rxfull_select

SPDIF Rx FIFO full falg select, it decides when assert the rx full flag.

Values:

enumerator kSPDIF_RxFull1Sample

Rx full at least 1 sample in left and right FIFO

enumerator kSPDIF_RxFull4Samples

Rx full at least 4 sample in left and right FIFO

enumerator kSPDIF_RxFull8Samples

Rx full at least 8 sample in left and right FIFO

enumerator kSPDIF_RxFull16Samples

Rx full at least 16 sample in left and right FIFO

enum _spdif_txempty_select

SPDIF tx FIFO EMPTY falg select, it decides when assert the tx empty flag.

Values:

enumerator kSPDIF_TxEmpty0Sample

Tx empty at most 0 sample in left and right FIFO

enumerator kSPDIF_TxEmpty4Samples

Tx empty at most 4 sample in left and right FIFO

enumerator kSPDIF_TxEmpty8Samples

Tx empty at most 8 sample in left and right FIFO

enumerator kSPDIF_TxEmpty12Samples

Tx empty at most 12 sample in left and right FIFO

enum _spdif_uchannel_source

SPDIF U channel source.

Values:

enumerator kSPDIF_NoUChannel

No embedded U channel

enumerator kSPDIF_UChannelFromRx

U channel from receiver, it is CD mode

enumerator kSPDIF_UChannelFromTx

U channel from on chip tx

enum _spdif_gain_select

SPDIF clock gain.

Values:

enumerator kSPDIF_GAIN_24

Gain select is 24

enumerator kSPDIF_GAIN_16

Gain select is 16

enumerator kSPDIF_GAIN_12

Gain select is 12

enumerator kSPDIF_GAIN_8

Gain select is 8

enumerator kSPDIF_GAIN_6

Gain select is 6

enumerator kSPDIF_GAIN_4

Gain select is 4

enumerator kSPDIF_GAIN_3

Gain select is 3

enum _spdif_tx_source

SPDIF tx data source.

Values:

enumerator kSPDIF_txFromReceiver

Tx data directly through SPDIF receiver

enumerator kSPDIF_txNormal

Normal operation, data from processor

enum _spdif_validity_config

SPDIF tx data source.

Values:

enumerator kSPDIF_validityFlagAlwaysSet

Outgoing validity flags always set

enumerator kSPDIF_validityFlagAlwaysClear

Outgoing validity flags always clear

The SPDIF interrupt enable flag.

Values:

enumerator kSPDIF_RxDPLLLocked

SPDIF DPLL locked

enumerator kSPDIF_TxFIFOError

Tx FIFO underrun or overrun

enumerator kSPDIF_TxFIFOResync

Tx FIFO left and right channel resync

enumerator kSPDIF_RxControlChannelChange

SPDIF Rx control channel value changed

enumerator kSPDIF_ValidityFlagNoGood

SPDIF validity flag no good

enumerator kSPDIF_RxIllegalSymbol

SPDIF receiver found illegal symbol

enumerator kSPDIF_RxParityBitError

SPDIF receiver found parity bit error

enumerator kSPDIF_UChannelReceiveRegisterFull

SPDIF U channel revceive register full

enumerator kSPDIF_UChannelReceiveRegisterOverrun

SPDIF U channel receive register overrun

enumerator kSPDIF_QChannelReceiveRegisterFull

SPDIF Q channel receive reigster full

enumerator kSPDIF_QChannelReceiveRegisterOverrun

SPDIF Q channel receive register overrun

enumerator kSPDIF_UQChannelSync

SPDIF U/Q channel sync found

enumerator kSPDIF_UQChannelFrameError

SPDIF U/Q channel frame error

enumerator kSPDIF_RxFIFOError

SPDIF Rx FIFO underrun/overrun

enumerator kSPDIF_RxFIFOResync

SPDIF Rx left and right FIFO resync

enumerator kSPDIF_LockLoss

SPDIF receiver loss of lock

enumerator kSPDIF_TxFIFOEmpty

SPDIF Tx FIFO empty

enumerator kSPDIF_RxFIFOFull

SPDIF Rx FIFO full

enumerator kSPDIF_AllInterrupt

all interrupt

The DMA request sources.

Values:

enumerator kSPDIF_RxDMAEnable

Rx FIFO full

enumerator kSPDIF_TxDMAEnable

Tx FIFO empty

typedef enum _spdif_rxfull_select spdif_rxfull_select_t

SPDIF Rx FIFO full falg select, it decides when assert the rx full flag.

typedef enum _spdif_txempty_select spdif_txempty_select_t

SPDIF tx FIFO EMPTY falg select, it decides when assert the tx empty flag.

typedef enum _spdif_uchannel_source spdif_uchannel_source_t

SPDIF U channel source.

typedef enum _spdif_gain_select spdif_gain_select_t

SPDIF clock gain.

typedef enum _spdif_tx_source spdif_tx_source_t

SPDIF tx data source.

typedef enum _spdif_validity_config spdif_validity_config_t

SPDIF tx data source.

typedef struct _spdif_config spdif_config_t

SPDIF user configuration structure.

typedef struct _spdif_transfer spdif_transfer_t

SPDIF transfer structure.

typedef struct _spdif_handle spdif_handle_t
typedef void (*spdif_transfer_callback_t)(SPDIF_Type *base, spdif_handle_t *handle, status_t status, void *userData)

SPDIF transfer callback prototype.

SPDIF_XFER_QUEUE_SIZE

SPDIF transfer queue size, user can refine it according to use case.

struct _spdif_config
#include <fsl_spdif.h>

SPDIF user configuration structure.

Public Members

bool isTxAutoSync

If auto sync mechanism open

bool isRxAutoSync

If auto sync mechanism open

uint8_t DPLLClkSource

SPDIF DPLL clock source, range from 0~15, meaning is chip-specific

uint8_t txClkSource

SPDIF tx clock source, range from 0~7, meaning is chip-specific

spdif_rxfull_select_t rxFullSelect

SPDIF rx buffer full select

spdif_txempty_select_t txFullSelect

SPDIF tx buffer empty select

spdif_uchannel_source_t uChannelSrc

U channel source

spdif_tx_source_t txSource

SPDIF tx data source

spdif_validity_config_t validityConfig

Validity flag config

spdif_gain_select_t gain

Rx receive clock measure gain parameter.

struct _spdif_transfer
#include <fsl_spdif.h>

SPDIF transfer structure.

Public Members

uint8_t *data

Data start address to transfer.

uint8_t *qdata

Data buffer for Q channel

uint8_t *udata

Data buffer for C channel

size_t dataSize

Transfer size.

struct _spdif_handle
#include <fsl_spdif.h>

SPDIF handle structure.

Public Members

uint32_t state

Transfer status

spdif_transfer_callback_t callback

Callback function called at transfer event

void *userData

Callback parameter passed to callback function

spdif_transfer_t spdifQueue[(4U)]

Transfer queue storing queued transfer

size_t transferSize[(4U)]

Data bytes need to transfer

volatile uint8_t queueUser

Index for user to queue transfer

volatile uint8_t queueDriver

Index for driver to get the transfer data and size

uint8_t watermark

Watermark value

SRC: System Reset Controller Driver

FSL_SRC_DRIVER_VERSION

SRC driver version 2.0.1.

enum _src_reset_status_flags

SRC reset status flags.

Values:

enumerator kSRC_WarmBootIndicationFlag

WARM boot indication shows that WARM boot was initiated by software.

enumerator kSRC_TemperatureSensorResetFlag

Indicates whether the reset was the result of software reset from on-chip Temperature Sensor. Temperature Sensor Interrupt needs to be served before this bit can be cleaned.

enumerator kSRC_JTAGSoftwareResetFlag

Indicates whether the reset was the result of setting SJC_GPCCR bit 31.

enumerator kSRC_JTAGGeneratedResetFlag

Indicates a reset has been caused by JTAG selection of certain IR codes: EXTEST or HIGHZ.

enumerator kSRC_WatchdogResetFlag

Indicates a reset has been caused by the watchdog timer timing out. This reset source can be blocked by disabling the watchdog.

enum _src_warm_reset_bypass_count

Selection of WARM reset bypass count.

This type defines the 32KHz clock cycles to count before bypassing the MMDC acknowledge for WARM reset. If the MMDC acknowledge is not asserted before this counter is elapsed, a COLD reset will be initiated.

Values:

enumerator kSRC_WarmResetWaitAlways

System will wait until MMDC acknowledge is asserted.

enumerator kSRC_WarmResetWaitClk16

Wait 16 32KHz clock cycles before switching the reset.

enumerator kSRC_WarmResetWaitClk32

Wait 32 32KHz clock cycles before switching the reset.

enumerator kSRC_WarmResetWaitClk64

Wait 64 32KHz clock cycles before switching the reset.

typedef enum _src_warm_reset_bypass_count src_warm_reset_bypass_count_t

Selection of WARM reset bypass count.

This type defines the 32KHz clock cycles to count before bypassing the MMDC acknowledge for WARM reset. If the MMDC acknowledge is not asserted before this counter is elapsed, a COLD reset will be initiated.

static inline void SRC_EnableWDOGReset(SRC_Type *base, bool enable)

Enable the WDOG Reset in SRC.

WDOG Reset is enabled in SRC by default. If the WDOG event to SRC is masked, it would not create a reset to the chip. During the time the WDOG event is masked, when the WDOG event flag is asserted, it would remain asserted regardless of servicing the WDOG module. The only way to clear that bit is the hardware reset.

Parameters:
  • base – SRC peripheral base address.

  • enable – Enable the reset or not.

static inline void SRC_SetWarmResetBypassCount(SRC_Type *base, src_warm_reset_bypass_count_t option)

Set the delay count of waiting MMDC’s acknowledge.

This function would define the 32KHz clock cycles to count before bypassing the MMDC acknowledge for WARM reset. If the MMDC acknowledge is not asserted before this counter is elapsed, a COLD reset will be initiated.

Parameters:
  • base – SRC peripheral base address.

  • option – The option of setting mode, see to src_warm_reset_bypass_count_t.

static inline void SRC_EnableWarmReset(SRC_Type *base, bool enable)

Enable the WARM reset.

Only when the WARM reset is enabled, the WARM reset requests would be served by WARM reset. Otherwise, all the WARM reset sources would generate COLD reset.

Parameters:
  • base – SRC peripheral base address.

  • enable – Enable the WARM reset or not.

static inline uint32_t SRC_GetBootModeWord1(SRC_Type *base)

Get the boot mode register 1 value.

The Boot Mode register contains bits that reflect the status of BOOT_CFGx pins of the chip. See to chip-specific document for detail information about value.

Parameters:
  • base – SRC peripheral base address.

Returns:

status of BOOT_CFGx pins of the chip.

static inline uint32_t SRC_GetBootModeWord2(SRC_Type *base)

Get the boot mode register 2 value.

The Boot Mode register contains bits that reflect the status of BOOT_MODEx Pins and fuse values that controls boot of the chip. See to chip-specific document for detail information about value.

Parameters:
  • base – SRC peripheral base address.

Returns:

status of BOOT_MODEx Pins and fuse values that controls boot of the chip.

static inline void SRC_SetWarmBootIndication(SRC_Type *base, bool enable)

Set the warm boot indication flag.

WARM boot indication shows that WARM boot was initiated by software. This indicates to the software that it saved the needed information in the memory before initiating the WARM reset. In this case, software will set this bit to ‘1’, before initiating the WARM reset. The warm_boot bit should be used as indication only after a warm_reset sequence. Software should clear this bit after warm_reset to indicate that the next warm_reset is not performed with warm_boot.

Parameters:
  • base – SRC peripheral base address.

  • enable – Assert the flag or not.

static inline uint32_t SRC_GetResetStatusFlags(SRC_Type *base)

Get the status flags of SRC.

Parameters:
  • base – SRC peripheral base address.

Returns:

Mask value of status flags, see to _src_reset_status_flags.

void SRC_ClearResetStatusFlags(SRC_Type *base, uint32_t flags)

Clear the status flags of SRC.

Parameters:
  • base – SRC peripheral base address.

  • flags – value of status flags to be cleared, see to _src_reset_status_flags.

static inline void SRC_SetGeneralPurposeRegister(SRC_Type *base, uint32_t index, uint32_t value)

Set value to general purpose registers.

General purpose registers (GPRx) would hold the value during reset process. Wakeup function could be kept in these register. For example, the GPR1 holds the entry function for waking-up from Partial SLEEP mode while the GPR2 holds the argument. Other GPRx register would store the arbitray values.

Parameters:
  • base – SRC peripheral base address.

  • index – The index of GPRx register array. Note index 0 reponses the GPR1 register.

  • value – Setting value for GPRx register.

static inline uint32_t SRC_GetGeneralPurposeRegister(SRC_Type *base, uint32_t index)

Get the value from general purpose registers.

Parameters:
  • base – SRC peripheral base address.

  • index – The index of GPRx register array. Note index 0 reponses the GPR1 register.

Returns:

The setting value for GPRx register.

TMU: Thermal Management Unit Driver

enum _tmu_monitor_site

Values:

enumerator kTMU_MonitorSite0
enumerator kTMU_MonitorSite1
enumerator kTMU_MonitorSite2
enumerator kTMU_MonitorSite3
enumerator kTMU_MonitorSite4
enumerator kTMU_MonitorSite5
enumerator kTMU_MonitorSite6
enumerator kTMU_MonitorSite7
enumerator kTMU_MonitorSite8
enumerator kTMU_MonitorSite9
enumerator kTMU_MonitorSite10
enumerator kTMU_MonitorSite11
enumerator kTMU_MonitorSite12
enumerator kTMU_MonitorSite13
enumerator kTMU_MonitorSite14
enumerator kTMU_MonitorSite15
enum _tmu_interrupt_enable

TMU interrupt enable.

Values:

enumerator kTMU_ImmediateTemperatureInterruptEnable

Immediate temperature threshold exceeded interrupt enable.

enumerator kTMU_AverageTemperatureInterruptEnable

Average temperature threshold exceeded interrupt enable.

enumerator kTMU_AverageTemperatureCriticalInterruptEnable

Average temperature critical threshold exceeded interrupt enable. >

enum _tmu_interrupt_status_flags

TMU interrupt status flags.

Values:

enumerator kTMU_ImmediateTemperatureStatusFlags

Immediate temperature threshold exceeded(ITTE).

enumerator kTMU_AverageTemperatureStatusFlags

Average temperature threshold exceeded(ATTE).

enumerator kTMU_AverageTemperatureCriticalStatusFlags

Average temperature critical threshold exceeded.(ATCTE)

enum _tmu_status_flags

TMU status flags.

Values:

enumerator kTMU_IntervalExceededStatusFlags

Monitoring interval exceeded. The time required to perform measurement of all monitored sites has exceeded the monitoring interval as defined by TMTMIR.

enumerator kTMU_OutOfLowRangeStatusFlags

Out-of-range low temperature measurement detected. A temperature sensor detected a temperature reading below the lowest measurable temperature of 0 °C.

enumerator kTMU_OutOfHighRangeStatusFlags

Out-of-range high temperature measurement detected. A temperature sensor detected a temperature reading above the highest measurable temperature of 125 °C.

enum _tmu_average_low_pass_filter

Average low pass filter setting.

Values:

enumerator kTMU_AverageLowPassFilter1_0

Average low pass filter = 1.

enumerator kTMU_AverageLowPassFilter0_5

Average low pass filter = 0.5.

enumerator kTMU_AverageLowPassFilter0_25

Average low pass filter = 0.25.

enumerator kTMU_AverageLowPassFilter0_125

Average low pass filter = 0.125.

typedef struct _tmu_thresold_config tmu_thresold_config_t

configuration for TMU thresold.

typedef struct _tmu_interrupt_status tmu_interrupt_status_t

TMU interrupt status.

typedef enum _tmu_average_low_pass_filter tmu_average_low_pass_filter_t

Average low pass filter setting.

typedef struct _tmu_config tmu_config_t

Configuration for TMU module.

void TMU_Init(TMU_Type *base, const tmu_config_t *config)

Enable the access to TMU registers and Initialize TMU module.

Parameters:
  • base – TMU peripheral base address.

  • config – Pointer to configuration structure. Refer to “tmu_config_t” structure.

void TMU_Deinit(TMU_Type *base)

De-initialize TMU module and Disable the access to DCDC registers.

Parameters:
  • base – TMU peripheral base address.

void TMU_GetDefaultConfig(tmu_config_t *config)

Gets the default configuration for TMU.

This function initializes the user configuration structure to default value. The default value are:

Example:

config->monitorInterval = 0U;
config->monitorSiteSelection = 0U;
config->averageLPF = kTMU_AverageLowPassFilter1_0;

Parameters:
  • config – Pointer to TMU configuration structure.

static inline void TMU_Enable(TMU_Type *base, bool enable)

Enable/Disable the TMU module.

Parameters:
  • base – TMU peripheral base address.

  • enable – Switcher to enable/disable TMU.

static inline void TMU_EnableInterrupts(TMU_Type *base, uint32_t mask)

Enable the TMU interrupts.

Parameters:
  • base – TMU peripheral base address.

  • mask – The interrupt mask. Refer to “_tmu_interrupt_enable” enumeration.

static inline void TMU_DisableInterrupts(TMU_Type *base, uint32_t mask)

Disable the TMU interrupts.

Parameters:
  • base – TMU peripheral base address.

  • mask – The interrupt mask. Refer to “_tmu_interrupt_enable” enumeration.

void TMU_GetInterruptStatusFlags(TMU_Type *base, tmu_interrupt_status_t *status)

Get interrupt status flags.

Parameters:
  • base – TMU peripheral base address.

  • status – The pointer to interrupt status structure. Record the current interrupt status. Please refer to “tmu_interrupt_status_t” structure.

void TMU_ClearInterruptStatusFlags(TMU_Type *base, uint32_t mask)

Clear interrupt status flags and corresponding interrupt critical site capture register.

Parameters:
  • base – TMU peripheral base address.

  • mask – The mask of interrupt status flags. Refer to “_tmu_interrupt_status_flags” enumeration.

static inline uint32_t TMU_GetStatusFlags(TMU_Type *base)

Get TMU status flags.

Parameters:
  • base – TMU peripheral base address.

Returns:

The mask of status flags. Refer to “_tmu_status_flags” enumeration.

status_t TMU_GetHighestTemperature(TMU_Type *base, uint32_t *temperature)

Get the highest temperature reached for any enabled monitored site within the temperature sensor range.

Parameters:
  • base – TMU peripheral base address.

  • temperature – Highest temperature recorded in degrees Celsius by any enabled monitored site.

Return values:
  • kStatus_Success – Temperature reading is valid.

  • kStatus_Fail – Temperature reading is not valid due to no measured temperature within the sensor range of 0-125 °C for an enabled monitored site.

Returns:

Execution status.

status_t TMU_GetLowestTemperature(TMU_Type *base, uint32_t *temperature)

Get the lowest temperature reached for any enabled monitored site within the temperature sensor range.

Parameters:
  • base – TMU peripheral base address.

  • temperature – Lowest temperature recorded in degrees Celsius by any enabled monitored site.

Return values:
  • kStatus_Success – Temperature reading is valid.

  • kStatus_Fail – Temperature reading is not valid due to no measured temperature within the sensor range of 0-125 °C for an enabled monitored site.

Returns:

Execution status.

status_t TMU_GetImmediateTemperature(TMU_Type *base, uint32_t siteIndex, uint32_t *temperature)

Get the last immediate temperature at site n. The site must be part of the list of enabled monitored sites as defined by monitorSiteSelection in “tmu_config_t” structure.

Parameters:
  • base – TMU peripheral base address.

  • siteIndex – The index of the site user want to read. 0U: site0 ~ 15U: site15.

  • temperature – Last immediate temperature reading at site n .

Return values:
  • kStatus_Success – Temperature reading is valid.

  • kStatus_Fail – Temperature reading is not valid because temperature out of sensor range or first measurement still pending.

Returns:

Execution status.

status_t TMU_GetAverageTemperature(TMU_Type *base, uint32_t siteIndex, uint32_t *temperature)

Get the last average temperature at site n. The site must be part of the list of enabled monitored sites as defined by monitorSiteSelection in “tmu_config_t” structure.

Parameters:
  • base – TMU peripheral base address.

  • siteIndex – The index of the site user want to read. 0U: site0 ~ 15U: site15.

  • temperature – Last average temperature reading at site n .

Return values:
  • kStatus_Success – Temperature reading is valid.

  • kStatus_Fail – Temperature reading is not valid because temperature out of sensor range or first measurement still pending.

Returns:

Execution status.

void TMU_SetHighTemperatureThresold(TMU_Type *base, const tmu_thresold_config_t *config)

Configure the high temperature thresold value and enable/disable relevant thresold.

Parameters:
  • base – TMU peripheral base address.

  • config – Pointer to configuration structure. Refer to “tmu_thresold_config_t” structure.

FSL_TMU_DRIVER_VERSION

TMU driver version.

Version 2.0.3.

struct _tmu_thresold_config
#include <fsl_tmu.h>

configuration for TMU thresold.

Public Members

bool immediateThresoldEnable

Enable high temperature immediate threshold.

bool AverageThresoldEnable

Enable high temperature average threshold.

bool AverageCriticalThresoldEnable

Enable high temperature average critical threshold.

uint8_t immediateThresoldValue

Range:0U-125U. Valid when corresponding thresold is enabled. High temperature immediate threshold value. Determines the current upper temperature threshold, for anyenabled monitored site.

uint8_t averageThresoldValue

Range:0U-125U. Valid when corresponding thresold is enabled. High temperature average threshold value. Determines the average upper temperature threshold, for any enabled monitored site.

uint8_t averageCriticalThresoldValue

Range:0U-125U. Valid when corresponding thresold is enabled. High temperature average critical threshold value. Determines the average upper critical temperature threshold, for any enabled monitored site.

struct _tmu_interrupt_status
#include <fsl_tmu.h>

TMU interrupt status.

Public Members

uint32_t interruptDetectMask

The mask of interrupt status flags. Refer to “_tmu_interrupt_status_flags” enumeration.

uint16_t immediateInterruptsSiteMask

The mask of the temperature sensor site associated with a detected ITTE event. Please refer to “_tmu_monitor_site” enumeration.

uint16_t AverageInterruptsSiteMask

The mask of the temperature sensor site associated with a detected ATTE event. Please refer to “_tmu_monitor_site” enumeration.

uint16_t AverageCriticalInterruptsSiteMask

The mask of the temperature sensor site associated with a detected ATCTE event. Please refer to “_tmu_monitor_site” enumeration.

struct _tmu_config
#include <fsl_tmu.h>

Configuration for TMU module.

Public Members

uint8_t monitorInterval

Temperature monitoring interval in seconds. Please refer to specific table in RM.

uint16_t monitorSiteSelection

By setting the select bit for a temperature sensor site, it is enabled and included in all monitoring functions. If no site is selected, site 0 is monitored by default. Refer to “_tmu_monitor_site” enumeration. Please look up relevant table in reference manual.

tmu_average_low_pass_filter_t averageLPF

The average temperature is calculated as: ALPF x Current_Temp + (1 - ALPF) x Average_Temp. For proper operation, this field should only change when monitoring is disabled.

UART: Universal Asynchronous Receiver/Transmitter Driver

UART Driver

static inline void UART_SoftwareReset(UART_Type *base)

Resets the UART using software.

This function resets the transmit and receive state machines, all FIFOs and register USR1, USR2, UBIR, UBMR, UBRC , URXD, UTXD and UTS[6-3]

Parameters:
  • base – UART peripheral base address.

status_t UART_Init(UART_Type *base, const uart_config_t *config, uint32_t srcClock_Hz)

Initializes an UART instance with the user configuration structure and the peripheral clock.

This function configures the UART module with user-defined settings. Call the UART_GetDefaultConfig() function to configure the configuration structure and get the default configuration. The example below shows how to use this API to configure the UART.

uart_config_t uartConfig;
uartConfig.baudRate_Bps = 115200U;
uartConfig.parityMode = kUART_ParityDisabled;
uartConfig.dataBitsCount = kUART_EightDataBits;
uartConfig.stopBitCount = kUART_OneStopBit;
uartConfig.txFifoWatermark = 2;
uartConfig.rxFifoWatermark = 1;
uartConfig.enableAutoBaudrate = false;
uartConfig.enableTx = true;
uartConfig.enableRx = true;
UART_Init(UART1, &uartConfig, 24000000U);

Parameters:
  • base – UART peripheral base address.

  • config – Pointer to a user-defined configuration structure.

  • srcClock_Hz – UART clock source frequency in HZ.

Return values:

kStatus_Success – UART initialize succeed

void UART_Deinit(UART_Type *base)

Deinitializes a UART instance.

This function waits for transmit to complete, disables TX and RX, and disables the UART clock.

Parameters:
  • base – UART peripheral base address.

void UART_GetDefaultConfig(uart_config_t *config)

Gets the default configuration structure.

l

This function initializes the UART configuration structure to a default value. The default values are: uartConfig->baudRate_Bps = 115200U; uartConfig->parityMode = kUART_ParityDisabled; uartConfig->dataBitsCount = kUART_EightDataBits; uartConfig->stopBitCount = kUART_OneStopBit; uartConfig->txFifoWatermark = 2; uartConfig->rxFifoWatermark = 1; uartConfig->enableAutoBaudrate = flase; uartConfig->enableTx = false; uartConfig->enableRx = false;

Parameters:
  • config – Pointer to a configuration structure.

status_t UART_SetBaudRate(UART_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz)

Sets the UART instance baud rate.

This function configures the UART module baud rate. This function is used to update the UART module baud rate after the UART module is initialized by the UART_Init.

UART_SetBaudRate(UART1, 115200U, 20000000U);

Parameters:
  • base – UART peripheral base address.

  • baudRate_Bps – UART baudrate to be set.

  • srcClock_Hz – UART clock source frequency in Hz.

Return values:
  • kStatus_UART_BaudrateNotSupport – Baudrate is not support in the current clock source.

  • kStatus_Success – Set baudrate succeeded.

static inline void UART_Enable(UART_Type *base)

This function is used to Enable the UART Module.

Parameters:
  • base – UART base pointer.

static inline void UART_SetIdleCondition(UART_Type *base, uart_idle_condition_t condition)

This function is used to configure the IDLE line condition.

Parameters:
  • base – UART base pointer.

  • condition – IDLE line detect condition of the enumerators in uart_idle_condition_t.

static inline void UART_Disable(UART_Type *base)

This function is used to Disable the UART Module.

Parameters:
  • base – UART base pointer.

bool UART_GetStatusFlag(UART_Type *base, uint32_t flag)

This function is used to get the current status of specific UART status flag(including interrupt flag). The available status flag can be select from uart_status_flag_t enumeration.

Parameters:
  • base – UART base pointer.

  • flag – Status flag to check.

Return values:

current – state of corresponding status flag.

void UART_ClearStatusFlag(UART_Type *base, uint32_t flag)

This function is used to clear the current status of specific UART status flag. The available status flag can be select from uart_status_flag_t enumeration.

Parameters:
  • base – UART base pointer.

  • flag – Status flag to clear.

void UART_EnableInterrupts(UART_Type *base, uint32_t mask)

Enables UART interrupts according to the provided mask.

This function enables the UART interrupts according to the provided mask. The mask is a logical OR of enumeration members. See _uart_interrupt_enable. For example, to enable TX empty interrupt and RX data ready interrupt, do the following.

UART_EnableInterrupts(UART1,kUART_TxEmptyEnable | kUART_RxDataReadyEnable);

Parameters:
  • base – UART peripheral base address.

  • mask – The interrupts to enable. Logical OR of _uart_interrupt_enable.

void UART_DisableInterrupts(UART_Type *base, uint32_t mask)

Disables the UART interrupts according to the provided mask.

This function disables the UART interrupts according to the provided mask. The mask is a logical OR of enumeration members. See _uart_interrupt_enable. For example, to disable TX empty interrupt and RX data ready interrupt do the following.

UART_EnableInterrupts(UART1,kUART_TxEmptyEnable | kUART_RxDataReadyEnable);

Parameters:
  • base – UART peripheral base address.

  • mask – The interrupts to disable. Logical OR of _uart_interrupt_enable.

uint32_t UART_GetEnabledInterrupts(UART_Type *base)

Gets enabled UART interrupts.

This function gets the enabled UART interrupts. The enabled interrupts are returned as the logical OR value of the enumerators _uart_interrupt_enable. To check a specific interrupt enable status, compare the return value with enumerators in _uart_interrupt_enable. For example, to check whether the TX empty interrupt is enabled:

uint32_t enabledInterrupts = UART_GetEnabledInterrupts(UART1);

if (kUART_TxEmptyEnable & enabledInterrupts)
{
    ...
}

Parameters:
  • base – UART peripheral base address.

Returns:

UART interrupt flags which are logical OR of the enumerators in _uart_interrupt_enable.

static inline void UART_EnableTx(UART_Type *base, bool enable)

Enables or disables the UART transmitter.

This function enables or disables the UART transmitter.

Parameters:
  • base – UART peripheral base address.

  • enable – True to enable, false to disable.

static inline void UART_EnableRx(UART_Type *base, bool enable)

Enables or disables the UART receiver.

This function enables or disables the UART receiver.

Parameters:
  • base – UART peripheral base address.

  • enable – True to enable, false to disable.

static inline void UART_WriteByte(UART_Type *base, uint8_t data)

Writes to the transmitter register.

This function is used to write data to transmitter register. The upper layer must ensure that the TX register is empty or that the TX FIFO has room before calling this function.

Parameters:
  • base – UART peripheral base address.

  • data – Data write to the TX register.

static inline uint8_t UART_ReadByte(UART_Type *base)

Reads the receiver register.

This function is used to read data from receiver register. The upper layer must ensure that the receiver register is full or that the RX FIFO has data before calling this function.

Parameters:
  • base – UART peripheral base address.

Returns:

Data read from data register.

status_t UART_WriteBlocking(UART_Type *base, const uint8_t *data, size_t length)

Writes to the TX register using a blocking method.

This function polls the TX register, waits for the TX register to be empty or for the TX FIFO to have room and writes data to the TX buffer.

Parameters:
  • base – UART peripheral base address.

  • data – Start address of the data to write.

  • length – Size of the data to write.

Return values:
  • kStatus_UART_Timeout – Transmission timed out and was aborted.

  • kStatus_Success – Successfully wrote all data.

status_t UART_ReadBlocking(UART_Type *base, uint8_t *data, size_t length)

Read RX data register using a blocking method.

This function polls the RX register, waits for the RX register to be full or for RX FIFO to have data, and reads data from the TX register.

Parameters:
  • base – UART peripheral base address.

  • data – Start address of the buffer to store the received data.

  • length – Size of the buffer.

Return values:
  • kStatus_UART_RxHardwareOverrun – Receiver overrun occurred while receiving data.

  • kStatus_UART_NoiseError – A noise error occurred while receiving data.

  • kStatus_UART_FramingError – A framing error occurred while receiving data.

  • kStatus_UART_ParityError – A parity error occurred while receiving data.

  • kStatus_UART_Timeout – Transmission timed out and was aborted.

  • kStatus_Success – Successfully received all data.

void UART_TransferCreateHandle(UART_Type *base, uart_handle_t *handle, uart_transfer_callback_t callback, void *userData)

Initializes the UART handle.

This function initializes the UART handle which can be used for other UART transactional APIs. Usually, for a specified UART instance, call this API once to get the initialized handle.

Parameters:
  • base – UART peripheral base address.

  • handle – UART handle pointer.

  • callback – The callback function.

  • userData – The parameter of the callback function.

void UART_TransferStartRingBuffer(UART_Type *base, uart_handle_t *handle, uint8_t *ringBuffer, size_t ringBufferSize)

Sets up the RX ring buffer.

This function sets up the RX ring buffer to a specific UART handle.

When the RX ring buffer is used, data received are stored into the ring buffer even when the user doesn’t call the UART_TransferReceiveNonBlocking() API. If data is already received in the ring buffer, the user can get the received data from the ring buffer directly.

Note

When using the RX ring buffer, one byte is reserved for internal use. In other words, if ringBufferSize is 32, only 31 bytes are used for saving data.

Parameters:
  • base – UART peripheral base address.

  • handle – UART handle pointer.

  • ringBuffer – Start address of the ring buffer for background receiving. Pass NULL to disable the ring buffer.

  • ringBufferSize – Size of the ring buffer.

void UART_TransferStopRingBuffer(UART_Type *base, uart_handle_t *handle)

Aborts the background transfer and uninstalls the ring buffer.

This function aborts the background transfer and uninstalls the ring buffer.

Parameters:
  • base – UART peripheral base address.

  • handle – UART handle pointer.

size_t UART_TransferGetRxRingBufferLength(uart_handle_t *handle)

Get the length of received data in RX ring buffer.

Parameters:
  • handle – UART handle pointer.

Returns:

Length of received data in RX ring buffer.

status_t UART_TransferSendNonBlocking(UART_Type *base, uart_handle_t *handle, uart_transfer_t *xfer)

Transmits a buffer of data using the interrupt method.

This function sends data using an interrupt method. This is a non-blocking function, which returns directly without waiting for all data to be written to the TX register. When all data is written to the TX register in the ISR, the UART driver calls the callback function and passes the kStatus_UART_TxIdle as status parameter.

Note

The kStatus_UART_TxIdle is passed to the upper layer when all data is written to the TX register. However, it does not ensure that all data is sent out. Before disabling the TX, check the kUART_TransmissionCompleteFlag to ensure that the TX is finished.

Parameters:
  • base – UART peripheral base address.

  • handle – UART handle pointer.

  • xfer – UART transfer structure. See uart_transfer_t.

Return values:
  • kStatus_Success – Successfully start the data transmission.

  • kStatus_UART_TxBusy – Previous transmission still not finished; data not all written to TX register yet.

  • kStatus_InvalidArgument – Invalid argument.

void UART_TransferAbortSend(UART_Type *base, uart_handle_t *handle)

Aborts the interrupt-driven data transmit.

This function aborts the interrupt-driven data sending. The user can get the remainBytes to find out how many bytes are not sent out.

Parameters:
  • base – UART peripheral base address.

  • handle – UART handle pointer.

status_t UART_TransferGetSendCount(UART_Type *base, uart_handle_t *handle, uint32_t *count)

Gets the number of bytes written to the UART TX register.

This function gets the number of bytes written to the UART TX register by using the interrupt method.

Parameters:
  • base – UART peripheral base address.

  • handle – UART handle pointer.

  • count – Send bytes count.

Return values:
  • kStatus_NoTransferInProgress – No send in progress.

  • kStatus_InvalidArgument – The parameter is invalid.

  • kStatus_Success – Get successfully through the parameter count;

status_t UART_TransferReceiveNonBlocking(UART_Type *base, uart_handle_t *handle, uart_transfer_t *xfer, size_t *receivedBytes)

Receives a buffer of data using an interrupt method.

This function receives data using an interrupt method. This is a non-blocking function, which returns without waiting for all data to be received. If the RX ring buffer is used and not empty, the data in the ring buffer is copied and the parameter receivedBytes shows how many bytes are copied from the ring buffer. After copying, if the data in the ring buffer is not enough to read, the receive request is saved by the UART driver. When the new data arrives, the receive request is serviced first. When all data is received, the UART driver notifies the upper layer through a callback function and passes the status parameter kStatus_UART_RxIdle. For example, the upper layer needs 10 bytes but there are only 5 bytes in the ring buffer. The 5 bytes are copied to the xfer->data and this function returns with the parameter receivedBytes set to 5. For the left 5 bytes, newly arrived data is saved from the xfer->data[5]. When 5 bytes are received, the UART driver notifies the upper layer. If the RX ring buffer is not enabled, this function enables the RX and RX interrupt to receive data to the xfer->data. When all data is received, the upper layer is notified.

Parameters:
  • base – UART peripheral base address.

  • handle – UART handle pointer.

  • xfer – UART transfer structure, see uart_transfer_t.

  • receivedBytes – Bytes received from the ring buffer directly.

Return values:
  • kStatus_Success – Successfully queue the transfer into transmit queue.

  • kStatus_UART_RxBusy – Previous receive request is not finished.

  • kStatus_InvalidArgument – Invalid argument.

void UART_TransferAbortReceive(UART_Type *base, uart_handle_t *handle)

Aborts the interrupt-driven data receiving.

This function aborts the interrupt-driven data receiving. The user can get the remainBytes to know how many bytes are not received yet.

Parameters:
  • base – UART peripheral base address.

  • handle – UART handle pointer.

status_t UART_TransferGetReceiveCount(UART_Type *base, uart_handle_t *handle, uint32_t *count)

Gets the number of bytes that have been received.

This function gets the number of bytes that have been received.

Parameters:
  • base – UART peripheral base address.

  • handle – UART handle pointer.

  • count – Receive bytes count.

Return values:
  • kStatus_NoTransferInProgress – No receive in progress.

  • kStatus_InvalidArgument – Parameter is invalid.

  • kStatus_Success – Get successfully through the parameter count;

void UART_TransferHandleIRQ(UART_Type *base, void *irqHandle)

UART IRQ handle function.

This function handles the UART transmit and receive IRQ request.

Parameters:
  • base – UART peripheral base address.

  • irqHandle – UART handle pointer.

static inline void UART_EnableTxDMA(UART_Type *base, bool enable)

Enables or disables the UART transmitter DMA request.

This function enables or disables the transmit request when the transmitter has one or more slots available in the TxFIFO. The fill level in the TxFIFO that generates the DMA request is controlled by the TXTL bits.

Parameters:
  • base – UART peripheral base address.

  • enable – True to enable, false to disable.

static inline void UART_EnableRxDMA(UART_Type *base, bool enable)

Enables or disables the UART receiver DMA request.

This function enables or disables the receive request when the receiver has data in the RxFIFO. The fill level in the RxFIFO at which a DMA request is generated is controlled by the RXTL bits .

Parameters:
  • base – UART peripheral base address.

  • enable – True to enable, false to disable.

static inline void UART_SetTxFifoWatermark(UART_Type *base, uint8_t watermark)

This function is used to set the watermark of UART Tx FIFO. A maskable interrupt is generated whenever the data level in the TxFIFO falls below the Tx FIFO watermark.

Parameters:
  • base – UART base pointer.

  • watermark – The Tx FIFO watermark.

static inline void UART_SetRxRTSWatermark(UART_Type *base, uint8_t watermark)

This function is used to set the watermark of UART RTS deassertion.

The RTS signal deasserts whenever the data count in RxFIFO reaches the Rx RTS watermark.

Parameters:
  • base – UART base pointer.

  • watermark – The Rx RTS watermark.

static inline void UART_SetRxFifoWatermark(UART_Type *base, uint8_t watermark)

This function is used to set the watermark of UART Rx FIFO. A maskable interrupt is generated whenever the data level in the RxFIFO reaches the Rx FIFO watermark.

Parameters:
  • base – UART base pointer.

  • watermark – The Rx FIFO watermark.

static inline void UART_EnableAutoBaudRate(UART_Type *base, bool enable)

This function is used to set the enable condition of Automatic Baud Rate Detection feature.

Parameters:
  • base – UART base pointer.

  • enable – Enable/Disable Automatic Baud Rate Detection feature.

    • true: Enable Automatic Baud Rate Detection feature.

    • false: Disable Automatic Baud Rate Detection feature.

static inline bool UART_IsAutoBaudRateComplete(UART_Type *base)

This function is used to read if the automatic baud rate detection has finished.

Parameters:
  • base – UART base pointer.

Returns:

- true: Automatic baud rate detection has finished.

  • false: Automatic baud rate detection has not finished.

FSL_UART_DRIVER_VERSION

UART driver version.

Error codes for the UART driver.

Values:

enumerator kStatus_UART_TxBusy

Transmitter is busy.

enumerator kStatus_UART_RxBusy

Receiver is busy.

enumerator kStatus_UART_TxIdle

UART transmitter is idle.

enumerator kStatus_UART_RxIdle

UART receiver is idle.

enumerator kStatus_UART_TxWatermarkTooLarge

TX FIFO watermark too large

enumerator kStatus_UART_RxWatermarkTooLarge

RX FIFO watermark too large

enumerator kStatus_UART_FlagCannotClearManually

UART flag can’t be manually cleared.

enumerator kStatus_UART_Error

Error happens on UART.

enumerator kStatus_UART_RxRingBufferOverrun

UART RX software ring buffer overrun.

enumerator kStatus_UART_RxHardwareOverrun

UART RX receiver overrun.

enumerator kStatus_UART_NoiseError

UART noise error.

enumerator kStatus_UART_FramingError

UART framing error.

enumerator kStatus_UART_ParityError

UART parity error.

enumerator kStatus_UART_BaudrateNotSupport

Baudrate is not support in current clock source

enumerator kStatus_UART_BreakDetect

Receiver detect BREAK signal

enumerator kStatus_UART_Timeout

UART times out.

enum _uart_data_bits

UART data bits count.

Values:

enumerator kUART_SevenDataBits

Seven data bit

enumerator kUART_EightDataBits

Eight data bit

enum _uart_parity_mode

UART parity mode.

Values:

enumerator kUART_ParityDisabled

Parity disabled

enumerator kUART_ParityEven

Even error check is selected

enumerator kUART_ParityOdd

Odd error check is selected

enum _uart_stop_bit_count

UART stop bit count.

Values:

enumerator kUART_OneStopBit

One stop bit

enumerator kUART_TwoStopBit

Two stop bits

enum _uart_idle_condition

UART idle condition detect.

Values:

enumerator kUART_IdleFor4Frames

Idle for more than 4 frames

enumerator kUART_IdleFor8Frames

Idle for more than 8 frames

enumerator kUART_IdleFor16Frames

Idle for more than 16 frames

enumerator kUART_IdleFor32Frames

Idle for more than 32 frames

enum _uart_interrupt_enable

This structure contains the settings for all of the UART interrupt configurations.

Values:

enumerator kUART_AutoBaudEnable
enumerator kUART_TxReadyEnable
enumerator kUART_IdleEnable
enumerator kUART_RxReadyEnable
enumerator kUART_TxEmptyEnable
enumerator kUART_RtsDeltaEnable
enumerator kUART_EscapeEnable
enumerator kUART_RtsEnable
enumerator kUART_AgingTimerEnable
enumerator kUART_DtrEnable
enumerator kUART_ParityErrorEnable
enumerator kUART_FrameErrorEnable
enumerator kUART_DcdEnable
enumerator kUART_RiEnable
enumerator kUART_RxDsEnable
enumerator kUART_tAirWakeEnable
enumerator kUART_AwakeEnable
enumerator kUART_DtrDeltaEnable
enumerator kUART_AutoBaudCntEnable
enumerator kUART_IrEnable
enumerator kUART_WakeEnable
enumerator kUART_TxCompleteEnable
enumerator kUART_BreakDetectEnable
enumerator kUART_RxOverrunEnable
enumerator kUART_RxDataReadyEnable
enumerator kUART_RxDmaIdleEnable
enumerator kUART_AllInterruptsEnable

UART status flags.

This provides constants for the UART status flags for use in the UART functions.

Values:

enumerator kUART_RxCharReadyFlag

Rx Character Ready Flag.

enumerator kUART_RxErrorFlag

Rx Error Detect Flag.

enumerator kUART_RxOverrunErrorFlag

Rx Overrun Flag.

enumerator kUART_RxFrameErrorFlag

Rx Frame Error Flag.

enumerator kUART_RxBreakDetectFlag

Rx Break Detect Flag.

enumerator kUART_RxParityErrorFlag

Rx Parity Error Flag.

enumerator kUART_ParityErrorFlag

Parity Error Interrupt Flag.

enumerator kUART_RtsStatusFlag

RTS_B Pin Status Flag.

enumerator kUART_TxReadyFlag

Transmitter Ready Interrupt/DMA Flag.

enumerator kUART_RtsDeltaFlag

RTS Delta Flag.

enumerator kUART_EscapeFlag

Escape Sequence Interrupt Flag.

enumerator kUART_FrameErrorFlag

Frame Error Interrupt Flag.

enumerator kUART_RxReadyFlag

Receiver Ready Interrupt/DMA Flag.

enumerator kUART_AgingTimerFlag

Aging Timer Interrupt Flag.

enumerator kUART_DtrDeltaFlag

DTR Delta Flag.

enumerator kUART_RxDsFlag

Receiver IDLE Interrupt Flag.

enumerator kUART_tAirWakeFlag

Asynchronous IR WAKE Interrupt Flag.

enumerator kUART_AwakeFlag

Asynchronous WAKE Interrupt Flag.

enumerator kUART_Rs485SlaveAddrMatchFlag

RS-485 Slave Address Detected Interrupt Flag.

enumerator kUART_AutoBaudFlag

Automatic Baud Rate Detect Complete Flag.

enumerator kUART_TxEmptyFlag

Transmit Buffer FIFO Empty.

enumerator kUART_DtrFlag

DTR edge triggered interrupt flag.

enumerator kUART_IdleFlag

Idle Condition Flag.

enumerator kUART_AutoBaudCntStopFlag

Auto-baud Counter Stopped Flag.

enumerator kUART_RiDeltaFlag

Ring Indicator Delta Flag.

enumerator kUART_RiFlag

Ring Indicator Input Flag.

enumerator kUART_IrFlag

Serial Infrared Interrupt Flag.

enumerator kUART_WakeFlag

Wake Flag.

enumerator kUART_DcdDeltaFlag

Data Carrier Detect Delta Flag.

enumerator kUART_DcdFlag

Data Carrier Detect Input Flag.

enumerator kUART_RtsFlag

RTS Edge Triggered Interrupt Flag.

enumerator kUART_TxCompleteFlag

Transmitter Complete Flag.

enumerator kUART_BreakDetectFlag

BREAK Condition Detected Flag.

enumerator kUART_RxOverrunFlag

Overrun Error Flag.

enumerator kUART_RxDataReadyFlag

Receive Data Ready Flag.

typedef enum _uart_data_bits uart_data_bits_t

UART data bits count.

typedef enum _uart_parity_mode uart_parity_mode_t

UART parity mode.

typedef enum _uart_stop_bit_count uart_stop_bit_count_t

UART stop bit count.

typedef enum _uart_idle_condition uart_idle_condition_t

UART idle condition detect.

typedef struct _uart_config uart_config_t

UART configuration structure.

typedef struct _uart_transfer uart_transfer_t

UART transfer structure.

typedef struct _uart_handle uart_handle_t

Forward declaration of the handle typedef.

typedef void (*uart_transfer_callback_t)(UART_Type *base, uart_handle_t *handle, status_t status, void *userData)

UART transfer callback function.

typedef void (*uart_isr_t)(UART_Type *base, void *handle)
const IRQn_Type s_uartIRQ[]
uart_isr_t s_uartIsr
void *s_uartHandle[]

Pointers to uart handles for each instance.

uint32_t UART_GetInstance(UART_Type *base)

Get the UART instance from peripheral base address.

Parameters:
  • base – UART peripheral base address.

Returns:

UART instance.

UART_RETRY_TIMES

Retry times for waiting flag.

struct _uart_config
#include <fsl_uart.h>

UART configuration structure.

Public Members

uint32_t baudRate_Bps

UART baud rate.

uart_parity_mode_t parityMode

Parity error check mode of this module.

uart_data_bits_t dataBitsCount

Data bits count, eight (default), seven

uart_stop_bit_count_t stopBitCount

Number of stop bits in one frame.

uint8_t txFifoWatermark

TX FIFO watermark

uint8_t rxFifoWatermark

RX FIFO watermark

uint8_t rxRTSWatermark

RX RTS watermark, RX FIFO data count being larger than this triggers RTS deassertion

bool enableAutoBaudRate

Enable automatic baud rate detection

bool enableTx

Enable TX

bool enableRx

Enable RX

bool enableRxRTS

RX RTS enable

bool enableTxCTS

TX CTS enable

struct _uart_transfer
#include <fsl_uart.h>

UART transfer structure.

Public Members

size_t dataSize

The byte count to be transfer.

struct _uart_handle
#include <fsl_uart.h>

UART handle structure.

Public Members

const uint8_t *volatile txData

Address of remaining data to send.

volatile size_t txDataSize

Size of the remaining data to send.

size_t txDataSizeAll

Size of the data to send out.

uint8_t *volatile rxData

Address of remaining data to receive.

volatile size_t rxDataSize

Size of the remaining data to receive.

size_t rxDataSizeAll

Size of the data to receive.

uint8_t *rxRingBuffer

Start address of the receiver ring buffer.

size_t rxRingBufferSize

Size of the ring buffer.

volatile uint16_t rxRingBufferHead

Index for the driver to store received data into ring buffer.

volatile uint16_t rxRingBufferTail

Index for the user to get data from the ring buffer.

uart_transfer_callback_t callback

Callback function.

void *userData

UART callback function parameter.

volatile uint8_t txState

TX transfer state.

volatile uint8_t rxState

RX transfer state

union __unnamed9__

Public Members

uint8_t *data

The buffer of data to be transfer.

uint8_t *rxData

The buffer to receive data.

const uint8_t *txData

The buffer of data to be sent.

UART FreeRTOS Driver

UART SDMA Driver

void UART_TransferCreateHandleSDMA(UART_Type *base, uart_sdma_handle_t *handle, uart_sdma_transfer_callback_t callback, void *userData, sdma_handle_t *txSdmaHandle, sdma_handle_t *rxSdmaHandle, uint32_t eventSourceTx, uint32_t eventSourceRx)

Initializes the UART handle which is used in transactional functions.

Parameters:
  • base – UART peripheral base address.

  • handle – Pointer to the uart_sdma_handle_t structure.

  • callback – UART callback, NULL means no callback.

  • userData – User callback function data.

  • rxSdmaHandle – User-requested DMA handle for RX DMA transfer.

  • txSdmaHandle – User-requested DMA handle for TX DMA transfer.

  • eventSourceTx – Eventsource for TX DMA transfer.

  • eventSourceRx – Eventsource for RX DMA transfer.

status_t UART_SendSDMA(UART_Type *base, uart_sdma_handle_t *handle, uart_transfer_t *xfer)

Sends data using sDMA.

This function sends data using sDMA. This is a non-blocking function, which returns right away. When all data is sent, the send callback function is called.

Parameters:
  • base – UART peripheral base address.

  • handle – UART handle pointer.

  • xfer – UART sDMA transfer structure. See uart_transfer_t.

Return values:
  • kStatus_Success – if succeeded; otherwise failed.

  • kStatus_UART_TxBusy – Previous transfer ongoing.

  • kStatus_InvalidArgument – Invalid argument.

status_t UART_ReceiveSDMA(UART_Type *base, uart_sdma_handle_t *handle, uart_transfer_t *xfer)

Receives data using sDMA.

This function receives data using sDMA. This is a non-blocking function, which returns right away. When all data is received, the receive callback function is called.

Parameters:
  • base – UART peripheral base address.

  • handle – Pointer to the uart_sdma_handle_t structure.

  • xfer – UART sDMA transfer structure. See uart_transfer_t.

Return values:
  • kStatus_Success – if succeeded; otherwise failed.

  • kStatus_UART_RxBusy – Previous transfer ongoing.

  • kStatus_InvalidArgument – Invalid argument.

void UART_TransferAbortSendSDMA(UART_Type *base, uart_sdma_handle_t *handle)

Aborts the sent data using sDMA.

This function aborts sent data using sDMA.

Parameters:
  • base – UART peripheral base address.

  • handle – Pointer to the uart_sdma_handle_t structure.

void UART_TransferAbortReceiveSDMA(UART_Type *base, uart_sdma_handle_t *handle)

Aborts the receive data using sDMA.

This function aborts receive data using sDMA.

Parameters:
  • base – UART peripheral base address.

  • handle – Pointer to the uart_sdma_handle_t structure.

void UART_TransferSdmaHandleIRQ(UART_Type *base, void *uartSdmaHandle)

UART IRQ handle function.

This function handles the UART transmit complete IRQ request and invoke user callback.

Parameters:
  • base – UART peripheral base address.

  • uartSdmaHandle – UART handle pointer.

FSL_UART_SDMA_DRIVER_VERSION

UART SDMA driver version.

typedef struct _uart_sdma_handle uart_sdma_handle_t
typedef void (*uart_sdma_transfer_callback_t)(UART_Type *base, uart_sdma_handle_t *handle, status_t status, void *userData)

UART transfer callback function.

struct _uart_sdma_handle
#include <fsl_uart_sdma.h>

UART sDMA handle.

Public Members

uart_sdma_transfer_callback_t callback

Callback function.

void *userData

UART callback function parameter.

size_t rxDataSizeAll

Size of the data to receive.

size_t txDataSizeAll

Size of the data to send out.

sdma_handle_t *txSdmaHandle

The sDMA TX channel used.

sdma_handle_t *rxSdmaHandle

The sDMA RX channel used.

volatile uint8_t txState

TX transfer state.

volatile uint8_t rxState

RX transfer state

USDHC: Ultra Secured Digital Host Controller Driver

void USDHC_Init(USDHC_Type *base, const usdhc_config_t *config)

USDHC module initialization function.

Configures the USDHC according to the user configuration.

Example:

usdhc_config_t config;
config.cardDetectDat3 = false;
config.endianMode = kUSDHC_EndianModeLittle;
config.dmaMode = kUSDHC_DmaModeAdma2;
config.readWatermarkLevel = 128U;
config.writeWatermarkLevel = 128U;
USDHC_Init(USDHC, &config);

Parameters:
  • base – USDHC peripheral base address.

  • config – USDHC configuration information.

Return values:

kStatus_Success – Operate successfully.

void USDHC_Deinit(USDHC_Type *base)

Deinitializes the USDHC.

Parameters:
  • base – USDHC peripheral base address.

bool USDHC_Reset(USDHC_Type *base, uint32_t mask, uint32_t timeout)

Resets the USDHC.

Parameters:
  • base – USDHC peripheral base address.

  • mask – The reset type mask(_usdhc_reset).

  • timeout – Timeout for reset.

Return values:
  • true – Reset successfully.

  • false – Reset failed.

status_t USDHC_SetAdmaTableConfig(USDHC_Type *base, usdhc_adma_config_t *dmaConfig, usdhc_data_t *dataConfig, uint32_t flags)

Sets the DMA descriptor table configuration. A high level DMA descriptor configuration function.

Parameters:
  • base – USDHC peripheral base address.

  • dmaConfig – ADMA configuration

  • dataConfig – Data descriptor

  • flags – ADAM descriptor flag, used to indicate to create multiple or single descriptor, please refer to enum _usdhc_adma_flag.

Return values:
  • kStatus_OutOfRange – ADMA descriptor table length isn’t enough to describe data.

  • kStatus_Success – Operate successfully.

status_t USDHC_SetInternalDmaConfig(USDHC_Type *base, usdhc_adma_config_t *dmaConfig, const uint32_t *dataAddr, bool enAutoCmd23)

Internal DMA configuration. This function is used to config the USDHC DMA related registers.

Parameters:
  • base – USDHC peripheral base address.

  • dmaConfig – ADMA configuration.

  • dataAddr – Transfer data address, a simple DMA parameter, if ADMA is used, leave it to NULL.

  • enAutoCmd23 – Flag to indicate Auto CMD23 is enable or not, a simple DMA parameter, if ADMA is used, leave it to false.

Return values:
  • kStatus_OutOfRange – ADMA descriptor table length isn’t enough to describe data.

  • kStatus_Success – Operate successfully.

status_t USDHC_SetADMA2Descriptor(uint32_t *admaTable, uint32_t admaTableWords, const uint32_t *dataBufferAddr, uint32_t dataBytes, uint32_t flags)

Sets the ADMA2 descriptor table configuration.

Parameters:
  • admaTable – ADMA table address.

  • admaTableWords – ADMA table length.

  • dataBufferAddr – Data buffer address.

  • dataBytes – Data Data length.

  • flags – ADAM descriptor flag, used to indicate to create multiple or single descriptor, please refer to enum _usdhc_adma_flag.

Return values:
  • kStatus_OutOfRange – ADMA descriptor table length isn’t enough to describe data.

  • kStatus_Success – Operate successfully.

status_t USDHC_SetADMA1Descriptor(uint32_t *admaTable, uint32_t admaTableWords, const uint32_t *dataBufferAddr, uint32_t dataBytes, uint32_t flags)

Sets the ADMA1 descriptor table configuration.

Parameters:
  • admaTable – ADMA table address.

  • admaTableWords – ADMA table length.

  • dataBufferAddr – Data buffer address.

  • dataBytes – Data length.

  • flags – ADAM descriptor flag, used to indicate to create multiple or single descriptor, please refer to enum _usdhc_adma_flag.

Return values:
  • kStatus_OutOfRange – ADMA descriptor table length isn’t enough to describe data.

  • kStatus_Success – Operate successfully.

static inline void USDHC_EnableInternalDMA(USDHC_Type *base, bool enable)

Enables internal DMA.

Parameters:
  • base – USDHC peripheral base address.

  • enable – enable or disable flag

static inline void USDHC_EnableInterruptStatus(USDHC_Type *base, uint32_t mask)

Enables the interrupt status.

Parameters:
  • base – USDHC peripheral base address.

  • mask – Interrupt status flags mask(_usdhc_interrupt_status_flag).

static inline void USDHC_DisableInterruptStatus(USDHC_Type *base, uint32_t mask)

Disables the interrupt status.

Parameters:
  • base – USDHC peripheral base address.

  • mask – The interrupt status flags mask(_usdhc_interrupt_status_flag).

static inline void USDHC_EnableInterruptSignal(USDHC_Type *base, uint32_t mask)

Enables the interrupt signal corresponding to the interrupt status flag.

Parameters:
  • base – USDHC peripheral base address.

  • mask – The interrupt status flags mask(_usdhc_interrupt_status_flag).

static inline void USDHC_DisableInterruptSignal(USDHC_Type *base, uint32_t mask)

Disables the interrupt signal corresponding to the interrupt status flag.

Parameters:
  • base – USDHC peripheral base address.

  • mask – The interrupt status flags mask(_usdhc_interrupt_status_flag).

static inline uint32_t USDHC_GetEnabledInterruptStatusFlags(USDHC_Type *base)

Gets the enabled interrupt status.

Parameters:
  • base – USDHC peripheral base address.

Returns:

Current interrupt status flags mask(_usdhc_interrupt_status_flag).

static inline uint32_t USDHC_GetInterruptStatusFlags(USDHC_Type *base)

Gets the current interrupt status.

Parameters:
  • base – USDHC peripheral base address.

Returns:

Current interrupt status flags mask(_usdhc_interrupt_status_flag).

static inline void USDHC_ClearInterruptStatusFlags(USDHC_Type *base, uint32_t mask)

Clears a specified interrupt status. write 1 clears.

Parameters:
  • base – USDHC peripheral base address.

  • mask – The interrupt status flags mask(_usdhc_interrupt_status_flag).

static inline uint32_t USDHC_GetAutoCommand12ErrorStatusFlags(USDHC_Type *base)

Gets the status of auto command 12 error.

Parameters:
  • base – USDHC peripheral base address.

Returns:

Auto command 12 error status flags mask(_usdhc_auto_command12_error_status_flag).

static inline uint32_t USDHC_GetAdmaErrorStatusFlags(USDHC_Type *base)

Gets the status of the ADMA error.

Parameters:
  • base – USDHC peripheral base address.

Returns:

ADMA error status flags mask(_usdhc_adma_error_status_flag).

static inline uint32_t USDHC_GetPresentStatusFlags(USDHC_Type *base)

Gets a present status.

This function gets the present USDHC’s status except for an interrupt status and an error status.

Parameters:
  • base – USDHC peripheral base address.

Returns:

Present USDHC’s status flags mask(_usdhc_present_status_flag).

void USDHC_GetCapability(USDHC_Type *base, usdhc_capability_t *capability)

Gets the capability information.

Parameters:
  • base – USDHC peripheral base address.

  • capability – Structure to save capability information.

static inline void USDHC_ForceClockOn(USDHC_Type *base, bool enable)

Forces the card clock on.

Parameters:
  • base – USDHC peripheral base address.

  • enable – enable/disable flag

uint32_t USDHC_SetSdClock(USDHC_Type *base, uint32_t srcClock_Hz, uint32_t busClock_Hz)

Sets the SD bus clock frequency.

Parameters:
  • base – USDHC peripheral base address.

  • srcClock_Hz – USDHC source clock frequency united in Hz.

  • busClock_Hz – SD bus clock frequency united in Hz.

Returns:

The nearest frequency of busClock_Hz configured for SD bus.

bool USDHC_SetCardActive(USDHC_Type *base, uint32_t timeout)

Sends 80 clocks to the card to set it to the active state.

This function must be called each time the card is inserted to ensure that the card can receive the command correctly.

Parameters:
  • base – USDHC peripheral base address.

  • timeout – Timeout to initialize card.

Return values:
  • true – Set card active successfully.

  • false – Set card active failed.

static inline void USDHC_AssertHardwareReset(USDHC_Type *base, bool high)

Triggers a hardware reset.

Parameters:
  • base – USDHC peripheral base address.

  • high – 1 or 0 level

static inline void USDHC_SetDataBusWidth(USDHC_Type *base, usdhc_data_bus_width_t width)

Sets the data transfer width.

Parameters:
  • base – USDHC peripheral base address.

  • width – Data transfer width.

static inline void USDHC_WriteData(USDHC_Type *base, uint32_t data)

Fills the data port.

This function is used to implement the data transfer by Data Port instead of DMA.

Parameters:
  • base – USDHC peripheral base address.

  • data – The data about to be sent.

static inline uint32_t USDHC_ReadData(USDHC_Type *base)

Retrieves the data from the data port.

This function is used to implement the data transfer by Data Port instead of DMA.

Parameters:
  • base – USDHC peripheral base address.

Returns:

The data has been read.

void USDHC_SendCommand(USDHC_Type *base, usdhc_command_t *command)

Sends command function.

Parameters:
  • base – USDHC peripheral base address.

  • command – configuration

static inline void USDHC_EnableWakeupEvent(USDHC_Type *base, uint32_t mask, bool enable)

Enables or disables a wakeup event in low-power mode.

Parameters:
  • base – USDHC peripheral base address.

  • mask – Wakeup events mask(_usdhc_wakeup_event).

  • enable – True to enable, false to disable.

static inline void USDHC_CardDetectByData3(USDHC_Type *base, bool enable)

Detects card insert status.

Parameters:
  • base – USDHC peripheral base address.

  • enable – enable/disable flag

static inline bool USDHC_DetectCardInsert(USDHC_Type *base)

Detects card insert status.

Parameters:
  • base – USDHC peripheral base address.

static inline void USDHC_EnableSdioControl(USDHC_Type *base, uint32_t mask, bool enable)

Enables or disables the SDIO card control.

Parameters:
  • base – USDHC peripheral base address.

  • mask – SDIO card control flags mask(_usdhc_sdio_control_flag).

  • enable – True to enable, false to disable.

static inline void USDHC_SetContinueRequest(USDHC_Type *base)

Restarts a transaction which has stopped at the block GAP for the SDIO card.

Parameters:
  • base – USDHC peripheral base address.

static inline void USDHC_RequestStopAtBlockGap(USDHC_Type *base, bool enable)

Request stop at block gap function.

Parameters:
  • base – USDHC peripheral base address.

  • enable – True to stop at block gap, false to normal transfer.

void USDHC_SetMmcBootConfig(USDHC_Type *base, const usdhc_boot_config_t *config)

Configures the MMC boot feature.

Example:

usdhc_boot_config_t config;
config.ackTimeoutCount = 4;
config.bootMode = kUSDHC_BootModeNormal;
config.blockCount = 5;
config.enableBootAck = true;
config.enableBoot = true;
config.enableAutoStopAtBlockGap = true;
USDHC_SetMmcBootConfig(USDHC, &config);

Parameters:
  • base – USDHC peripheral base address.

  • config – The MMC boot configuration information.

static inline void USDHC_EnableMmcBoot(USDHC_Type *base, bool enable)

Enables or disables the mmc boot mode.

Parameters:
  • base – USDHC peripheral base address.

  • enable – True to enable, false to disable.

static inline void USDHC_SetForceEvent(USDHC_Type *base, uint32_t mask)

Forces generating events according to the given mask.

Parameters:
  • base – USDHC peripheral base address.

  • mask – The force events bit posistion (_usdhc_force_event).

static inline void UDSHC_SelectVoltage(USDHC_Type *base, bool en18v)

Selects the USDHC output voltage.

Parameters:
  • base – USDHC peripheral base address.

  • en18v – True means 1.8V, false means 3.0V.

void USDHC_EnableDDRMode(USDHC_Type *base, bool enable, uint32_t nibblePos)

The enable/disable DDR mode.

Parameters:
  • base – USDHC peripheral base address.

  • enable – enable/disable flag

  • nibblePos – nibble position

void USDHC_SetDataConfig(USDHC_Type *base, usdhc_transfer_direction_t dataDirection, uint32_t blockCount, uint32_t blockSize)

USDHC data configuration.

Parameters:
  • base – USDHC peripheral base address.

  • dataDirection – Data direction, tx or rx.

  • blockCount – Data block count.

  • blockSize – Data block size.

void USDHC_TransferCreateHandle(USDHC_Type *base, usdhc_handle_t *handle, const usdhc_transfer_callback_t *callback, void *userData)

Creates the USDHC handle.

Parameters:
  • base – USDHC peripheral base address.

  • handle – USDHC handle pointer.

  • callback – Structure pointer to contain all callback functions.

  • userData – Callback function parameter.

status_t USDHC_TransferNonBlocking(USDHC_Type *base, usdhc_handle_t *handle, usdhc_adma_config_t *dmaConfig, usdhc_transfer_t *transfer)

Transfers the command/data using an interrupt and an asynchronous method.

This function sends a command and data and returns immediately. It doesn’t wait for the transfer to complete or to encounter an error. The application must not call this API in multiple threads at the same time. Because of that this API doesn’t support the re-entry mechanism.

Note

Call API USDHC_TransferCreateHandle when calling this API.

Parameters:
  • base – USDHC peripheral base address.

  • handle – USDHC handle.

  • dmaConfig – ADMA configuration.

  • transfer – Transfer content.

Return values:
  • kStatus_InvalidArgument – Argument is invalid.

  • kStatus_USDHC_BusyTransferring – Busy transferring.

  • kStatus_USDHC_PrepareAdmaDescriptorFailed – Prepare ADMA descriptor failed.

  • kStatus_Success – Operate successfully.

status_t USDHC_TransferBlocking(USDHC_Type *base, usdhc_adma_config_t *dmaConfig, usdhc_transfer_t *transfer)

Transfers the command/data using a blocking method.

This function waits until the command response/data is received or the USDHC encounters an error by polling the status flag.

The application must not call this API in multiple threads at the same time. Because this API doesn’t support the re-entry mechanism.

Note

There is no need to call API USDHC_TransferCreateHandle when calling this API.

Parameters:
  • base – USDHC peripheral base address.

  • dmaConfig – adma configuration

  • transfer – Transfer content.

Return values:
  • kStatus_InvalidArgument – Argument is invalid.

  • kStatus_USDHC_PrepareAdmaDescriptorFailed – Prepare ADMA descriptor failed.

  • kStatus_USDHC_SendCommandFailed – Send command failed.

  • kStatus_USDHC_TransferDataFailed – Transfer data failed.

  • kStatus_Success – Operate successfully.

void USDHC_TransferHandleIRQ(USDHC_Type *base, usdhc_handle_t *handle)

IRQ handler for the USDHC.

This function deals with the IRQs on the given host controller.

Parameters:
  • base – USDHC peripheral base address.

  • handle – USDHC handle.

FSL_USDHC_DRIVER_VERSION

Driver version 2.8.4.

Enum _usdhc_status. USDHC status.

Values:

enumerator kStatus_USDHC_BusyTransferring

Transfer is on-going.

enumerator kStatus_USDHC_PrepareAdmaDescriptorFailed

Set DMA descriptor failed.

enumerator kStatus_USDHC_SendCommandFailed

Send command failed.

enumerator kStatus_USDHC_TransferDataFailed

Transfer data failed.

enumerator kStatus_USDHC_DMADataAddrNotAlign

Data address not aligned.

enumerator kStatus_USDHC_ReTuningRequest

Re-tuning request.

enumerator kStatus_USDHC_TuningError

Tuning error.

enumerator kStatus_USDHC_NotSupport

Not support.

enumerator kStatus_USDHC_TransferDataComplete

Transfer data complete.

enumerator kStatus_USDHC_SendCommandSuccess

Transfer command complete.

enumerator kStatus_USDHC_TransferDMAComplete

Transfer DMA complete.

Enum _usdhc_capability_flag. Host controller capabilities flag mask. .

Values:

enumerator kUSDHC_SupportAdmaFlag

Support ADMA.

enumerator kUSDHC_SupportHighSpeedFlag

Support high-speed.

enumerator kUSDHC_SupportDmaFlag

Support DMA.

enumerator kUSDHC_SupportSuspendResumeFlag

Support suspend/resume.

enumerator kUSDHC_SupportV330Flag

Support voltage 3.3V.

enumerator kUSDHC_SupportV300Flag

Support voltage 3.0V.

enumerator kUSDHC_SupportV180Flag

Support voltage 1.8V.

enumerator kUSDHC_Support4BitFlag

Flag in HTCAPBLT_MBL’s position, supporting 4-bit mode.

enumerator kUSDHC_Support8BitFlag

Flag in HTCAPBLT_MBL’s position, supporting 8-bit mode.

enumerator kUSDHC_SupportDDR50Flag

SD version 3.0 new feature, supporting DDR50 mode.

enumerator kUSDHC_SupportSDR104Flag

Support SDR104 mode.

enumerator kUSDHC_SupportSDR50Flag

Support SDR50 mode.

Enum _usdhc_wakeup_event. Wakeup event mask. .

Values:

enumerator kUSDHC_WakeupEventOnCardInt

Wakeup on card interrupt.

enumerator kUSDHC_WakeupEventOnCardInsert

Wakeup on card insertion.

enumerator kUSDHC_WakeupEventOnCardRemove

Wakeup on card removal.

enumerator kUSDHC_WakeupEventsAll

All wakeup events

Enum _usdhc_reset. Reset type mask. .

Values:

enumerator kUSDHC_ResetAll

Reset all except card detection.

enumerator kUSDHC_ResetCommand

Reset command line.

enumerator kUSDHC_ResetData

Reset data line.

enumerator kUSDHC_ResetTuning

Reset tuning circuit.

enumerator kUSDHC_ResetsAll

All reset types

Enum _usdhc_transfer_flag. Transfer flag mask.

Values:

enumerator kUSDHC_EnableDmaFlag

Enable DMA.

enumerator kUSDHC_CommandTypeSuspendFlag

Suspend command.

enumerator kUSDHC_CommandTypeResumeFlag

Resume command.

enumerator kUSDHC_CommandTypeAbortFlag

Abort command.

enumerator kUSDHC_EnableBlockCountFlag

Enable block count.

enumerator kUSDHC_EnableAutoCommand12Flag

Enable auto CMD12.

enumerator kUSDHC_DataReadFlag

Enable data read.

enumerator kUSDHC_MultipleBlockFlag

Multiple block data read/write.

enumerator kUSDHC_EnableAutoCommand23Flag

Enable auto CMD23.

enumerator kUSDHC_ResponseLength136Flag

136-bit response length.

enumerator kUSDHC_ResponseLength48Flag

48-bit response length.

enumerator kUSDHC_ResponseLength48BusyFlag

48-bit response length with busy status.

enumerator kUSDHC_EnableCrcCheckFlag

Enable CRC check.

enumerator kUSDHC_EnableIndexCheckFlag

Enable index check.

enumerator kUSDHC_DataPresentFlag

Data present flag.

Enum _usdhc_present_status_flag. Present status flag mask. .

Values:

enumerator kUSDHC_CommandInhibitFlag

Command inhibit.

enumerator kUSDHC_DataInhibitFlag

Data inhibit.

enumerator kUSDHC_DataLineActiveFlag

Data line active.

enumerator kUSDHC_SdClockStableFlag

SD bus clock stable.

enumerator kUSDHC_WriteTransferActiveFlag

Write transfer active.

enumerator kUSDHC_ReadTransferActiveFlag

Read transfer active.

enumerator kUSDHC_BufferWriteEnableFlag

Buffer write enable.

enumerator kUSDHC_BufferReadEnableFlag

Buffer read enable.

enumerator kUSDHC_ReTuningRequestFlag

Re-tuning request flag, only used for SDR104 mode.

enumerator kUSDHC_DelaySettingFinishedFlag

Delay setting finished flag.

enumerator kUSDHC_CardInsertedFlag

Card inserted.

enumerator kUSDHC_CommandLineLevelFlag

Command line signal level.

enumerator kUSDHC_Data0LineLevelFlag

Data0 line signal level.

enumerator kUSDHC_Data1LineLevelFlag

Data1 line signal level.

enumerator kUSDHC_Data2LineLevelFlag

Data2 line signal level.

enumerator kUSDHC_Data3LineLevelFlag

Data3 line signal level.

enumerator kUSDHC_Data4LineLevelFlag

Data4 line signal level.

enumerator kUSDHC_Data5LineLevelFlag

Data5 line signal level.

enumerator kUSDHC_Data6LineLevelFlag

Data6 line signal level.

enumerator kUSDHC_Data7LineLevelFlag

Data7 line signal level.

Enum _usdhc_interrupt_status_flag. Interrupt status flag mask. .

Values:

enumerator kUSDHC_CommandCompleteFlag

Command complete.

enumerator kUSDHC_DataCompleteFlag

Data complete.

enumerator kUSDHC_BlockGapEventFlag

Block gap event.

enumerator kUSDHC_DmaCompleteFlag

DMA interrupt.

enumerator kUSDHC_BufferWriteReadyFlag

Buffer write ready.

enumerator kUSDHC_BufferReadReadyFlag

Buffer read ready.

enumerator kUSDHC_CardInsertionFlag

Card inserted.

enumerator kUSDHC_CardRemovalFlag

Card removed.

enumerator kUSDHC_CardInterruptFlag

Card interrupt.

enumerator kUSDHC_ReTuningEventFlag

Re-Tuning event, only for SD3.0 SDR104 mode.

enumerator kUSDHC_TuningPassFlag

SDR104 mode tuning pass flag.

enumerator kUSDHC_TuningErrorFlag

SDR104 tuning error flag.

enumerator kUSDHC_CommandTimeoutFlag

Command timeout error.

enumerator kUSDHC_CommandCrcErrorFlag

Command CRC error.

enumerator kUSDHC_CommandEndBitErrorFlag

Command end bit error.

enumerator kUSDHC_CommandIndexErrorFlag

Command index error.

enumerator kUSDHC_DataTimeoutFlag

Data timeout error.

enumerator kUSDHC_DataCrcErrorFlag

Data CRC error.

enumerator kUSDHC_DataEndBitErrorFlag

Data end bit error.

enumerator kUSDHC_AutoCommand12ErrorFlag

Auto CMD12 error.

enumerator kUSDHC_DmaErrorFlag

DMA error.

enumerator kUSDHC_CommandErrorFlag

Command error

enumerator kUSDHC_DataErrorFlag

Data error

enumerator kUSDHC_ErrorFlag

All error

enumerator kUSDHC_DataFlag

Data interrupts

enumerator kUSDHC_DataDMAFlag

Data interrupts

enumerator kUSDHC_CommandFlag

Command interrupts

enumerator kUSDHC_CardDetectFlag

Card detection interrupts

enumerator kUSDHC_SDR104TuningFlag

SDR104 tuning flag.

enumerator kUSDHC_AllInterruptFlags

All flags mask

Enum _usdhc_auto_command12_error_status_flag. Auto CMD12 error status flag mask. .

Values:

enumerator kUSDHC_AutoCommand12NotExecutedFlag

Not executed error.

enumerator kUSDHC_AutoCommand12TimeoutFlag

Timeout error.

enumerator kUSDHC_AutoCommand12EndBitErrorFlag

End bit error.

enumerator kUSDHC_AutoCommand12CrcErrorFlag

CRC error.

enumerator kUSDHC_AutoCommand12IndexErrorFlag

Index error.

enumerator kUSDHC_AutoCommand12NotIssuedFlag

Not issued error.

Enum _usdhc_standard_tuning. Standard tuning flag.

Values:

enumerator kUSDHC_ExecuteTuning

Used to start tuning procedure.

enumerator kUSDHC_TuningSampleClockSel

When std_tuning_en bit is set, this bit is used to select sampleing clock.

Enum _usdhc_adma_error_status_flag. ADMA error status flag mask. .

Values:

enumerator kUSDHC_AdmaLenghMismatchFlag

Length mismatch error.

enumerator kUSDHC_AdmaDescriptorErrorFlag

Descriptor error.

Enum _usdhc_adma_error_state. ADMA error state.

This state is the detail state when ADMA error has occurred.

Values:

enumerator kUSDHC_AdmaErrorStateStopDma

Stop DMA, previous location set in the ADMA system address is errored address.

enumerator kUSDHC_AdmaErrorStateFetchDescriptor

Fetch descriptor, current location set in the ADMA system address is errored address.

enumerator kUSDHC_AdmaErrorStateChangeAddress

Change address, no DMA error has occurred.

enumerator kUSDHC_AdmaErrorStateTransferData

Transfer data, previous location set in the ADMA system address is errored address.

enumerator kUSDHC_AdmaErrorStateInvalidLength

Invalid length in ADMA descriptor.

enumerator kUSDHC_AdmaErrorStateInvalidDescriptor

Invalid descriptor fetched by ADMA.

enumerator kUSDHC_AdmaErrorState

ADMA error state

Enum _usdhc_force_event. Force event bit position. .

Values:

enumerator kUSDHC_ForceEventAutoCommand12NotExecuted

Auto CMD12 not executed error.

enumerator kUSDHC_ForceEventAutoCommand12Timeout

Auto CMD12 timeout error.

enumerator kUSDHC_ForceEventAutoCommand12CrcError

Auto CMD12 CRC error.

enumerator kUSDHC_ForceEventEndBitError

Auto CMD12 end bit error.

enumerator kUSDHC_ForceEventAutoCommand12IndexError

Auto CMD12 index error.

enumerator kUSDHC_ForceEventAutoCommand12NotIssued

Auto CMD12 not issued error.

enumerator kUSDHC_ForceEventCommandTimeout

Command timeout error.

enumerator kUSDHC_ForceEventCommandCrcError

Command CRC error.

enumerator kUSDHC_ForceEventCommandEndBitError

Command end bit error.

enumerator kUSDHC_ForceEventCommandIndexError

Command index error.

enumerator kUSDHC_ForceEventDataTimeout

Data timeout error.

enumerator kUSDHC_ForceEventDataCrcError

Data CRC error.

enumerator kUSDHC_ForceEventDataEndBitError

Data end bit error.

enumerator kUSDHC_ForceEventAutoCommand12Error

Auto CMD12 error.

enumerator kUSDHC_ForceEventCardInt

Card interrupt.

enumerator kUSDHC_ForceEventDmaError

Dma error.

enumerator kUSDHC_ForceEventTuningError

Tuning error.

enumerator kUSDHC_ForceEventsAll

All force event flags mask.

enum _usdhc_transfer_direction

Data transfer direction.

Values:

enumerator kUSDHC_TransferDirectionReceive

USDHC transfer direction receive.

enumerator kUSDHC_TransferDirectionSend

USDHC transfer direction send.

enum _usdhc_data_bus_width

Data transfer width.

Values:

enumerator kUSDHC_DataBusWidth1Bit

1-bit mode

enumerator kUSDHC_DataBusWidth4Bit

4-bit mode

enumerator kUSDHC_DataBusWidth8Bit

8-bit mode

enum _usdhc_endian_mode

Endian mode.

Values:

enumerator kUSDHC_EndianModeBig

Big endian mode.

enumerator kUSDHC_EndianModeHalfWordBig

Half word big endian mode.

enumerator kUSDHC_EndianModeLittle

Little endian mode.

enum _usdhc_dma_mode

DMA mode.

Values:

enumerator kUSDHC_DmaModeSimple

External DMA.

enumerator kUSDHC_DmaModeAdma1

ADMA1 is selected.

enumerator kUSDHC_DmaModeAdma2

ADMA2 is selected.

enumerator kUSDHC_ExternalDMA

External DMA mode selected.

Enum _usdhc_sdio_control_flag. SDIO control flag mask. .

Values:

enumerator kUSDHC_StopAtBlockGapFlag

Stop at block gap.

enumerator kUSDHC_ReadWaitControlFlag

Read wait control.

enumerator kUSDHC_InterruptAtBlockGapFlag

Interrupt at block gap.

enumerator kUSDHC_ReadDoneNo8CLK

Read done without 8 clk for block gap.

enumerator kUSDHC_ExactBlockNumberReadFlag

Exact block number read.

enum _usdhc_boot_mode

MMC card boot mode.

Values:

enumerator kUSDHC_BootModeNormal

Normal boot

enumerator kUSDHC_BootModeAlternative

Alternative boot

enum _usdhc_card_command_type

The command type.

Values:

enumerator kCARD_CommandTypeNormal

Normal command

enumerator kCARD_CommandTypeSuspend

Suspend command

enumerator kCARD_CommandTypeResume

Resume command

enumerator kCARD_CommandTypeAbort

Abort command

enumerator kCARD_CommandTypeEmpty

Empty command

enum _usdhc_card_response_type

The command response type.

Defines the command response type from card to host controller.

Values:

enumerator kCARD_ResponseTypeNone

Response type: none

enumerator kCARD_ResponseTypeR1

Response type: R1

enumerator kCARD_ResponseTypeR1b

Response type: R1b

enumerator kCARD_ResponseTypeR2

Response type: R2

enumerator kCARD_ResponseTypeR3

Response type: R3

enumerator kCARD_ResponseTypeR4

Response type: R4

enumerator kCARD_ResponseTypeR5

Response type: R5

enumerator kCARD_ResponseTypeR5b

Response type: R5b

enumerator kCARD_ResponseTypeR6

Response type: R6

enumerator kCARD_ResponseTypeR7

Response type: R7

Enum _usdhc_adma1_descriptor_flag. The mask for the control/status field in ADMA1 descriptor.

Values:

enumerator kUSDHC_Adma1DescriptorValidFlag

Valid flag.

enumerator kUSDHC_Adma1DescriptorEndFlag

End flag.

enumerator kUSDHC_Adma1DescriptorInterrupFlag

Interrupt flag.

enumerator kUSDHC_Adma1DescriptorActivity1Flag

Activity 1 flag.

enumerator kUSDHC_Adma1DescriptorActivity2Flag

Activity 2 flag.

enumerator kUSDHC_Adma1DescriptorTypeNop

No operation.

enumerator kUSDHC_Adma1DescriptorTypeTransfer

Transfer data.

enumerator kUSDHC_Adma1DescriptorTypeLink

Link descriptor.

enumerator kUSDHC_Adma1DescriptorTypeSetLength

Set data length.

Enum _usdhc_adma2_descriptor_flag. ADMA1 descriptor control and status mask.

Values:

enumerator kUSDHC_Adma2DescriptorValidFlag

Valid flag.

enumerator kUSDHC_Adma2DescriptorEndFlag

End flag.

enumerator kUSDHC_Adma2DescriptorInterruptFlag

Interrupt flag.

enumerator kUSDHC_Adma2DescriptorActivity1Flag

Activity 1 mask.

enumerator kUSDHC_Adma2DescriptorActivity2Flag

Activity 2 mask.

enumerator kUSDHC_Adma2DescriptorTypeNop

No operation.

enumerator kUSDHC_Adma2DescriptorTypeReserved

Reserved.

enumerator kUSDHC_Adma2DescriptorTypeTransfer

Transfer type.

enumerator kUSDHC_Adma2DescriptorTypeLink

Link type.

Enum _usdhc_adma_flag. ADMA descriptor configuration flag. .

Values:

enumerator kUSDHC_AdmaDescriptorSingleFlag

Try to finish the transfer in a single ADMA descriptor. If transfer size is bigger than one ADMA descriptor’s ability, new another descriptor for data transfer.

enumerator kUSDHC_AdmaDescriptorMultipleFlag

Create multiple ADMA descriptors within the ADMA table, this is used for mmc boot mode specifically, which need to modify the ADMA descriptor on the fly, so the flag should be used combining with stop at block gap feature.

enum _usdhc_burst_len

DMA transfer burst len config.

Values:

enumerator kUSDHC_EnBurstLenForINCR

Enable burst len for INCR.

enumerator kUSDHC_EnBurstLenForINCR4816

Enable burst len for INCR4/INCR8/INCR16.

enumerator kUSDHC_EnBurstLenForINCR4816WRAP

Enable burst len for INCR4/8/16 WRAP.

Enum _usdhc_transfer_data_type. Tansfer data type definition.

Values:

enumerator kUSDHC_TransferDataNormal

Transfer normal read/write data.

enumerator kUSDHC_TransferDataTuning

Transfer tuning data.

enumerator kUSDHC_TransferDataBoot

Transfer boot data.

enumerator kUSDHC_TransferDataBootcontinous

Transfer boot data continuously.

typedef enum _usdhc_transfer_direction usdhc_transfer_direction_t

Data transfer direction.

typedef enum _usdhc_data_bus_width usdhc_data_bus_width_t

Data transfer width.

typedef enum _usdhc_endian_mode usdhc_endian_mode_t

Endian mode.

typedef enum _usdhc_dma_mode usdhc_dma_mode_t

DMA mode.

typedef enum _usdhc_boot_mode usdhc_boot_mode_t

MMC card boot mode.

typedef enum _usdhc_card_command_type usdhc_card_command_type_t

The command type.

typedef enum _usdhc_card_response_type usdhc_card_response_type_t

The command response type.

Defines the command response type from card to host controller.

typedef enum _usdhc_burst_len usdhc_burst_len_t

DMA transfer burst len config.

typedef uint32_t usdhc_adma1_descriptor_t

Defines the ADMA1 descriptor structure.

typedef struct _usdhc_adma2_descriptor usdhc_adma2_descriptor_t

Defines the ADMA2 descriptor structure.

typedef struct _usdhc_capability usdhc_capability_t

USDHC capability information.

Defines a structure to save the capability information of USDHC.

typedef struct _usdhc_boot_config usdhc_boot_config_t

Data structure to configure the MMC boot feature.

typedef struct _usdhc_config usdhc_config_t

Data structure to initialize the USDHC.

typedef struct _usdhc_command usdhc_command_t

Card command descriptor.

Defines card command-related attribute.

typedef struct _usdhc_adma_config usdhc_adma_config_t

ADMA configuration.

typedef struct _usdhc_scatter_gather_data_list usdhc_scatter_gather_data_list_t

Card scatter gather data list.

Allow application register uncontinuous data buffer for data transfer.

typedef struct _usdhc_scatter_gather_data usdhc_scatter_gather_data_t

Card scatter gather data descriptor.

Defines a structure to contain data-related attribute. The ‘enableIgnoreError’ is used when upper card driver wants to ignore the error event to read/write all the data and not to stop read/write immediately when an error event happens. For example, bus testing procedure for MMC card.

typedef struct _usdhc_scatter_gather_transfer usdhc_scatter_gather_transfer_t

usdhc scatter gather transfer.

typedef struct _usdhc_data usdhc_data_t

Card data descriptor.

Defines a structure to contain data-related attribute. The ‘enableIgnoreError’ is used when upper card driver wants to ignore the error event to read/write all the data and not to stop read/write immediately when an error event happens. For example, bus testing procedure for MMC card.

typedef struct _usdhc_transfer usdhc_transfer_t

Transfer state.

typedef struct _usdhc_handle usdhc_handle_t

USDHC handle typedef.

typedef struct _usdhc_transfer_callback usdhc_transfer_callback_t

USDHC callback functions.

typedef status_t (*usdhc_transfer_function_t)(USDHC_Type *base, usdhc_transfer_t *content)

USDHC transfer function.

typedef struct _usdhc_host usdhc_host_t

USDHC host descriptor.

USDHC_MAX_BLOCK_COUNT

Maximum block count can be set one time.

FSL_USDHC_ENABLE_SCATTER_GATHER_TRANSFER

USDHC scatter gather feature control macro.

USDHC_ADMA1_ADDRESS_ALIGN

The alignment size for ADDRESS filed in ADMA1’s descriptor.

USDHC_ADMA1_LENGTH_ALIGN

The alignment size for LENGTH field in ADMA1’s descriptor.

USDHC_ADMA2_ADDRESS_ALIGN

The alignment size for ADDRESS field in ADMA2’s descriptor.

USDHC_ADMA2_LENGTH_ALIGN

The alignment size for LENGTH filed in ADMA2’s descriptor.

USDHC_ADMA1_DESCRIPTOR_ADDRESS_SHIFT

The bit shift for ADDRESS filed in ADMA1’s descriptor.

Address/page field

Reserved

Attribute

31 12

11 6

05

04

03

02

01

00

address or data length

000000

Act2

Act1

0

Int

End

Valid

Act2

Act1

Comment

31-28

27-12

0

0

No op

Don’t care

0

1

Set data length

0000

Data Length

1

0

Transfer data

Data address

1

1

Link descriptor

Descriptor address

USDHC_ADMA1_DESCRIPTOR_ADDRESS_MASK

The bit mask for ADDRESS field in ADMA1’s descriptor.

USDHC_ADMA1_DESCRIPTOR_LENGTH_SHIFT

The bit shift for LENGTH filed in ADMA1’s descriptor.

USDHC_ADMA1_DESCRIPTOR_LENGTH_MASK

The mask for LENGTH field in ADMA1’s descriptor.

USDHC_ADMA1_DESCRIPTOR_MAX_LENGTH_PER_ENTRY

The maximum value of LENGTH filed in ADMA1’s descriptor. Since the max transfer size ADMA1 support is 65535 which is indivisible by 4096, so to make sure a large data load transfer (>64KB) continuously (require the data address be always align with 4096), software will set the maximum data length for ADMA1 to (64 - 4)KB.

USDHC_ADMA2_DESCRIPTOR_LENGTH_SHIFT

The bit shift for LENGTH field in ADMA2’s descriptor.

Address field

Length

Reserved

Attribute

63 32

31 16

15 06

05

04

03

02

01

00

32-bit address

16-bit length

0000000000

Act2

Act1

0

Int

End

Valid

Act2

Act1

Comment

Operation

0

0

No op

Don’t care

0

1

Reserved

Read this line and go to next one

1

0

Transfer data

Transfer data with address and length set in this descriptor line

1

1

Link descriptor

Link to another descriptor

USDHC_ADMA2_DESCRIPTOR_LENGTH_MASK

The bit mask for LENGTH field in ADMA2’s descriptor.

USDHC_ADMA2_DESCRIPTOR_MAX_LENGTH_PER_ENTRY

The maximum value of LENGTH field in ADMA2’s descriptor.

struct _usdhc_adma2_descriptor
#include <fsl_usdhc.h>

Defines the ADMA2 descriptor structure.

Public Members

uint32_t attribute

The control and status field.

const uint32_t *address

The address field.

struct _usdhc_capability
#include <fsl_usdhc.h>

USDHC capability information.

Defines a structure to save the capability information of USDHC.

Public Members

uint32_t sdVersion

Support SD card/sdio version.

uint32_t mmcVersion

Support EMMC card version.

uint32_t maxBlockLength

Maximum block length united as byte.

uint32_t maxBlockCount

Maximum block count can be set one time.

uint32_t flags

Capability flags to indicate the support information(_usdhc_capability_flag).

struct _usdhc_boot_config
#include <fsl_usdhc.h>

Data structure to configure the MMC boot feature.

Public Members

uint32_t ackTimeoutCount

Timeout value for the boot ACK. The available range is 0 ~ 15.

usdhc_boot_mode_t bootMode

Boot mode selection.

uint32_t blockCount

Stop at block gap value of automatic mode. Available range is 0 ~ 65535.

size_t blockSize

Block size.

bool enableBootAck

Enable or disable boot ACK.

bool enableAutoStopAtBlockGap

Enable or disable auto stop at block gap function in boot period.

struct _usdhc_config
#include <fsl_usdhc.h>

Data structure to initialize the USDHC.

Public Members

uint32_t dataTimeout

Data timeout value.

usdhc_endian_mode_t endianMode

Endian mode.

uint8_t readWatermarkLevel

Watermark level for DMA read operation. Available range is 1 ~ 128.

uint8_t writeWatermarkLevel

Watermark level for DMA write operation. Available range is 1 ~ 128.

uint8_t readBurstLen

Read burst len.

uint8_t writeBurstLen

Write burst len.

struct _usdhc_command
#include <fsl_usdhc.h>

Card command descriptor.

Defines card command-related attribute.

Public Members

uint32_t index

Command index.

uint32_t argument

Command argument.

usdhc_card_command_type_t type

Command type.

usdhc_card_response_type_t responseType

Command response type.

uint32_t response[4U]

Response for this command.

uint32_t responseErrorFlags

Response error flag, which need to check the command reponse.

uint32_t flags

Cmd flags.

struct _usdhc_adma_config
#include <fsl_usdhc.h>

ADMA configuration.

Public Members

usdhc_dma_mode_t dmaMode

DMA mode.

usdhc_burst_len_t burstLen

Burst len config.

uint32_t *admaTable

ADMA table address, can’t be null if transfer way is ADMA1/ADMA2.

uint32_t admaTableWords

ADMA table length united as words, can’t be 0 if transfer way is ADMA1/ADMA2.

struct _usdhc_scatter_gather_data_list
#include <fsl_usdhc.h>

Card scatter gather data list.

Allow application register uncontinuous data buffer for data transfer.

struct _usdhc_scatter_gather_data
#include <fsl_usdhc.h>

Card scatter gather data descriptor.

Defines a structure to contain data-related attribute. The ‘enableIgnoreError’ is used when upper card driver wants to ignore the error event to read/write all the data and not to stop read/write immediately when an error event happens. For example, bus testing procedure for MMC card.

Public Members

bool enableAutoCommand12

Enable auto CMD12.

bool enableAutoCommand23

Enable auto CMD23.

bool enableIgnoreError

Enable to ignore error event to read/write all the data.

usdhc_transfer_direction_t dataDirection

data direction

uint8_t dataType

this is used to distinguish the normal/tuning/boot data.

size_t blockSize

Block size.

usdhc_scatter_gather_data_list_t sgData

scatter gather data

struct _usdhc_scatter_gather_transfer
#include <fsl_usdhc.h>

usdhc scatter gather transfer.

Public Members

usdhc_scatter_gather_data_t *data

Data to transfer.

usdhc_command_t *command

Command to send.

struct _usdhc_data
#include <fsl_usdhc.h>

Card data descriptor.

Defines a structure to contain data-related attribute. The ‘enableIgnoreError’ is used when upper card driver wants to ignore the error event to read/write all the data and not to stop read/write immediately when an error event happens. For example, bus testing procedure for MMC card.

Public Members

bool enableAutoCommand12

Enable auto CMD12.

bool enableAutoCommand23

Enable auto CMD23.

bool enableIgnoreError

Enable to ignore error event to read/write all the data.

uint8_t dataType

this is used to distinguish the normal/tuning/boot data.

size_t blockSize

Block size.

uint32_t blockCount

Block count.

uint32_t *rxData

Buffer to save data read.

const uint32_t *txData

Data buffer to write.

struct _usdhc_transfer
#include <fsl_usdhc.h>

Transfer state.

Public Members

usdhc_data_t *data

Data to transfer.

usdhc_command_t *command

Command to send.

struct _usdhc_transfer_callback
#include <fsl_usdhc.h>

USDHC callback functions.

Public Members

void (*CardInserted)(USDHC_Type *base, void *userData)

Card inserted occurs when DAT3/CD pin is for card detect

void (*CardRemoved)(USDHC_Type *base, void *userData)

Card removed occurs

void (*SdioInterrupt)(USDHC_Type *base, void *userData)

SDIO card interrupt occurs

void (*BlockGap)(USDHC_Type *base, void *userData)

stopped at block gap event

void (*TransferComplete)(USDHC_Type *base, usdhc_handle_t *handle, status_t status, void *userData)

Transfer complete callback.

void (*ReTuning)(USDHC_Type *base, void *userData)

Handle the re-tuning.

struct _usdhc_handle
#include <fsl_usdhc.h>

USDHC handle.

Defines the structure to save the USDHC state information and callback function.

Note

All the fields except interruptFlags and transferredWords must be allocated by the user.

Public Members

usdhc_data_t *volatile data

Transfer parameter. Data to transfer.

usdhc_command_t *volatile command

Transfer parameter. Command to send.

volatile uint32_t transferredWords

Transfer status. Words transferred by DATAPORT way.

usdhc_transfer_callback_t callback

Callback function.

void *userData

Parameter for transfer complete callback.

struct _usdhc_host
#include <fsl_usdhc.h>

USDHC host descriptor.

Public Members

USDHC_Type *base

USDHC peripheral base address.

uint32_t sourceClock_Hz

USDHC source clock frequency united in Hz.

usdhc_config_t config

USDHC configuration.

usdhc_capability_t capability

USDHC capability information.

usdhc_transfer_function_t transfer

USDHC transfer function.

WDOG: Watchdog Timer Driver

void WDOG_GetDefaultConfig(wdog_config_t *config)

Initializes the WDOG configuration structure.

This function initializes the WDOG configuration structure to default values. The default values are as follows.

wdogConfig->enableWdog = true;
wdogConfig->workMode.enableWait = true;
wdogConfig->workMode.enableStop = true;
wdogConfig->workMode.enableDebug = true;
wdogConfig->enableInterrupt = false;
wdogConfig->enablePowerdown = false;
wdogConfig->resetExtension = flase;
wdogConfig->timeoutValue = 0xFFU;
wdogConfig->interruptTimeValue = 0x04u;

See also

wdog_config_t

Parameters:
  • config – Pointer to the WDOG configuration structure.

void WDOG_Init(WDOG_Type *base, const wdog_config_t *config)

Initializes the WDOG.

This function initializes the WDOG. When called, the WDOG runs according to the configuration.

This is an example.

wdog_config_t config;
WDOG_GetDefaultConfig(&config);
config.timeoutValue = 0xffU;
config->interruptTimeValue = 0x04u;
WDOG_Init(wdog_base,&config);

Parameters:
  • base – WDOG peripheral base address

  • config – The configuration of WDOG

void WDOG_Deinit(WDOG_Type *base)

Shuts down the WDOG.

This function shuts down the WDOG. Watchdog Enable bit is a write one once only bit. It is not possible to clear this bit by a software write, once the bit is set. This bit(WDE) can be set/reset only in debug mode(exception).

static inline void WDOG_Enable(WDOG_Type *base)

Enables the WDOG module.

This function writes a value into the WDOG_WCR register to enable the WDOG. This is a write one once only bit. It is not possible to clear this bit by a software write, once the bit is set. only debug mode exception.

Parameters:
  • base – WDOG peripheral base address

static inline void WDOG_Disable(WDOG_Type *base)

Disables the WDOG module.

This function writes a value into the WDOG_WCR register to disable the WDOG. This is a write one once only bit. It is not possible to clear this bit by a software write,once the bit is set. only debug mode exception

Parameters:
  • base – WDOG peripheral base address

static inline void WDOG_TriggerSystemSoftwareReset(WDOG_Type *base)

Trigger the system software reset.

This function will write to the WCR[SRS] bit to trigger a software system reset. This bit will automatically resets to “1” after it has been asserted to “0”. Note: Calling this API will reset the system right now, please using it with more attention.

Parameters:
  • base – WDOG peripheral base address

static inline void WDOG_TriggerSoftwareSignal(WDOG_Type *base)

Trigger an output assertion.

This function will write to the WCR[WDA] bit to trigger WDOG_B signal assertion. The WDOG_B signal can be routed to external pin of the chip, the output pin will turn to assertion along with WDOG_B signal. Note: The WDOG_B signal will remain assert until a power on reset occurred, so, please take more attention while calling it.

Parameters:
  • base – WDOG peripheral base address

static inline void WDOG_EnableInterrupts(WDOG_Type *base, uint16_t mask)

Enables the WDOG interrupt.

This bit is a write once only bit. Once the software does a write access to this bit, it will get locked and cannot be reprogrammed until the next system reset assertion

Parameters:
  • base – WDOG peripheral base address

  • mask – The interrupts to enable The parameter can be combination of the following source if defined.

    • kWDOG_InterruptEnable

uint16_t WDOG_GetStatusFlags(WDOG_Type *base)

Gets the WDOG all reset status flags.

This function gets all reset status flags.

uint16_t status;
status = WDOG_GetStatusFlags (wdog_base);

See also

_wdog_status_flags

  • true: a related status flag has been set.

  • false: a related status flag is not set.

Parameters:
  • base – WDOG peripheral base address

Returns:

State of the status flag: asserted (true) or not-asserted (false).

void WDOG_ClearInterruptStatus(WDOG_Type *base, uint16_t mask)

Clears the WDOG flag.

This function clears the WDOG status flag.

This is an example for clearing the interrupt flag.

WDOG_ClearStatusFlags(wdog_base,KWDOG_InterruptFlag);

Parameters:
  • base – WDOG peripheral base address

  • mask – The status flags to clear. The parameter could be any combination of the following values. kWDOG_TimeoutFlag

static inline void WDOG_SetTimeoutValue(WDOG_Type *base, uint16_t timeoutCount)

Sets the WDOG timeout value.

This function sets the timeout value. This function writes a value into WCR registers. The time-out value can be written at any point of time but it is loaded to the counter at the time when WDOG is enabled or after the service routine has been performed.

Parameters:
  • base – WDOG peripheral base address

  • timeoutCount – WDOG timeout value; count of WDOG clock tick.

static inline void WDOG_SetInterrputTimeoutValue(WDOG_Type *base, uint16_t timeoutCount)

Sets the WDOG interrupt count timeout value.

This function sets the interrupt count timeout value. This function writes a value into WIC registers which are wirte-once. This field is write once only. Once the software does a write access to this field, it will get locked and cannot be reprogrammed until the next system reset assertion.

Parameters:
  • base – WDOG peripheral base address

  • timeoutCount – WDOG timeout value; count of WDOG clock tick.

static inline void WDOG_DisablePowerDownEnable(WDOG_Type *base)

Disable the WDOG power down enable bit.

This function disable the WDOG power down enable(PDE). This function writes a value into WMCR registers which are wirte-once. This field is write once only. Once software sets this bit it cannot be reset until the next system reset.

Parameters:
  • base – WDOG peripheral base address

void WDOG_Refresh(WDOG_Type *base)

Refreshes the WDOG timer.

This function feeds the WDOG. This function should be called before the WDOG timer is in timeout. Otherwise, a reset is asserted.

Parameters:
  • base – WDOG peripheral base address

FSL_WDOG_DRIVER_VERSION

Defines WDOG driver version.

WDOG_REFRESH_KEY
enum _wdog_interrupt_enable

WDOG interrupt configuration structure, default settings all disabled.

This structure contains the settings for all of the WDOG interrupt configurations.

Values:

enumerator kWDOG_InterruptEnable

WDOG timeout generates an interrupt before reset

enum _wdog_status_flags

WDOG status flags.

This structure contains the WDOG status flags for use in the WDOG functions.

Values:

enumerator kWDOG_RunningFlag

Running flag, set when WDOG is enabled

enumerator kWDOG_PowerOnResetFlag

Power On flag, set when reset is the result of a powerOnReset

enumerator kWDOG_TimeoutResetFlag

Timeout flag, set when reset is the result of a timeout

enumerator kWDOG_SoftwareResetFlag

Software flag, set when reset is the result of a software

enumerator kWDOG_InterruptFlag

interrupt flag,whether interrupt has occurred or not

typedef struct _wdog_work_mode wdog_work_mode_t

Defines WDOG work mode.

typedef struct _wdog_config wdog_config_t

Describes WDOG configuration structure.

struct _wdog_work_mode
#include <fsl_wdog.h>

Defines WDOG work mode.

Public Members

bool enableWait

If set to true, WDOG continues in wait mode

bool enableStop

If set to true, WDOG continues in stop mode

bool enableDebug

If set to true, WDOG continues in debug mode

struct _wdog_config
#include <fsl_wdog.h>

Describes WDOG configuration structure.

Public Members

bool enableWdog

Enables or disables WDOG

wdog_work_mode_t workMode

Configures WDOG work mode in debug stop and wait mode

bool enableInterrupt

Enables or disables WDOG interrupt

uint16_t timeoutValue

Timeout value

uint16_t interruptTimeValue

Interrupt count timeout value

bool softwareResetExtension

software reset extension

bool enablePowerDown

power down enable bit

bool enableTimeOutAssert

Enable WDOG_B timeout assertion.