MCUXpresso SDK Changelog
ACMP
[2.3.0]
Improvements
Expose C0 register FILTER_CNT bitfield and FPR bitfield to the user.
[2.2.0]
Improvements
Updated feature macros for roundrobin mode, window mode, filter mode, and 3V domain removes.
[2.1.0]
New Feature
Supported the plateforms which don’t have hysteresis mode.
[2.0.6]
Bug Fixes
Fixed the wrong comments, the DAC value should range from 0 to 255.
[2.0.5]
Bug Fixes
Fixed the out-of-bounds error of Coverity caused by missing an assert sentence to avoid the return value of ACMP_GetInstance() exceeding the array bounds.
Fixed the violations of MISRA C-2012 rules:
Rule 10.1, 14.4, 16.4, 17.7.
[2.0.4]
Bug Fixes
Avoided changing w1c bit in ACMP_SetRoundRobinPreState().
[2.0.3]
New Features
Added feature functions for usage of different power domains(1.8 V and 3 V). These functions are first enabled in ULP1. They are about:
ACMP_EnableLinkToDAC()
ACMP_SetDiscreteModeConfig()
ACMP_GetDefaultDiscreteModeConfig()
[2.0.2]
Other Changes
Changed coding style of peripheral base address from “s_acmpBases” to “s_acmpBase”.
[2.0.1]
Bug Fixes
Fixed bug regarding the function “ACMP_SetRoundRobinConfig”. It will not continue execution but returns directly after disabling round robin mode.
CACHE XCACHE
[2.0.2]
Bug Fixes
Updated XCACHE_InvalidateCacheByRange(), XCACHE_CleanCacheByRange(), XCACHE_CleanInvalidateCacheByRange() in case of startAddr equal to endAddr.
[2.0.1]
Improvements
Check input parameter “size_byte” must be larger than 0.
[2.0.0]
Initial version.
CACHE64
[2.0.9]
Improvements
Removed assert(false) in CACHE64_GetInstanceByAddr.
[2.0.8]
Improvements
Updated function CACHE64_GetInstanceByAddr() to support some devices that provide alias of cacheable memory section.
[2.0.7]
Improvements
Check input parameter “size_byte” must be larger than 0.
[2.0.6]
Bug Fixes
Fixed overflow for CACHE64_GetInstanceByAddr()/CACHE64_CleanCacheByRange()/CACHE64_InvalidateCacheByRange() APIs.
[2.0.5]
Improvement
Made use of FSL_FEATURE_CACHE64_CTRL_HAS_NO_WRITE_BUF feature
[2.0.4]
Improvement
Disable cache policy feature on SoC without CACHE64_POLSEL IP.
Bug Fixes
Fixed doxygen issue.
[2.0.3]
Bug Fixes
Fixed violations of the MISRA C-2012 Rule 10.3.
[2.0.2]
Bug Fixes
Fixed violations of the MISRA C-2012 Rule 10.1, 10.3, 10.4 and 14.4.
Fixed doxygen issue.
[2.0.1]
Improvements
Moved CLCR register configuration out of the while loop, it’s unnecessary to repeat this operation.
[2.0.0]
Initial version.
CDOG
[2.1.3]
Re-design multiple instance IRQs and Clocks
Add fix for RESTART command errata
[2.1.2]
Support multiple IRQs
Fix default CONTROL values
[2.1.1]
Remove bit CONTROL[CONTROL_CTRL].
[2.1.0]
Rename CWT to CDOG.
[2.0.2]
Fix MISRA-2012 issues.
[2.0.1]
Fix doxygen issues.
[2.0.0]
Initial version.
CLOCK
[2.4.1]
Bug fixes
Fixed bugs in POWER_DisableSleepRegulators POWER_EnableSleepRegulators.
[2.4.0]
New features
Added return value for CLOCK_InitMainPfd CLOCK_InitAudioPfd.
Updated FRO max supported frequency.
Added fast startup configuration for FRO.
[2.3.1]
Bug fixes
Fixed bugs in CLOCK_ClearFroFlags.
Fixed bugs in clock_attach_id_t.
[2.3.0]
Bug fixes
Added clock array for SDADC, CDOG.
Added FRO related APIs.
[2.2.2]
Bug fixes
Fixed GPIO_CLOCKS array for GPIO_ALIAS.
[2.2.1]
Bug fixes
Fixed bugs in clock_attach_id_t.
Fixed FRO frequency calcualtion.
[2.2.0]
Bug fixes
Fixed UTICK0 clock sources.
[2.1.0]
New features
Added CLOCK_GetCoreSysClkFreq API.
Bug fixes
Fixed bugs in CLOCK_GetFCClkFreq and clock_attach_id_t.
[2.0.0]
Initial version.
COMMON
[2.5.0]
New Features
Added new APIs InitCriticalSectionMeasurementContext, DisableGlobalIRQEx and EnableGlobalIRQEx so that user can measure the execution time of the protected sections.
[2.4.3]
Improvements
Enable irqs that mount under irqsteer interrupt extender.
[2.4.2]
Improvements
Add the macros to convert peripheral address to secure address or non-secure address.
[2.4.1]
Improvements
Improve for the macro redefinition error when integrated with zephyr.
[2.4.0]
New Features
Added EnableIRQWithPriority, IRQ_SetPriority, and IRQ_ClearPendingIRQ for ARM.
Added MSDK_EnableCpuCycleCounter, MSDK_GetCpuCycleCount for ARM.
[2.3.3]
New Features
Added NETC into status group.
[2.3.2]
Improvements
Make driver aarch64 compatible
[2.3.1]
Bug Fixes
Fixed MAKE_VERSION overflow on 16-bit platforms.
[2.3.0]
Improvements
Split the driver to common part and CPU architecture related part.
[2.2.10]
Bug Fixes
Fixed the ATOMIC macros build error in cpp files.
[2.2.9]
Bug Fixes
Fixed MISRA C-2012 issue, 5.6, 5.8, 8.4, 8.5, 8.6, 10.1, 10.4, 17.7, 21.3.
Fixed SDK_Malloc issue that not allocate memory with required size.
[2.2.8]
Improvements
Included stddef.h header file for MDK tool chain.
New Features:
Added atomic modification macros.
[2.2.7]
Other Change
Added MECC status group definition.
[2.2.6]
Other Change
Added more status group definition.
Bug Fixes
Undef __VECTOR_TABLE to avoid duplicate definition in cmsis_clang.h
[2.2.5]
Bug Fixes
Fixed MISRA C-2012 rule-15.5.
[2.2.4]
Bug Fixes
Fixed MISRA C-2012 rule-10.4.
[2.2.3]
New Features
Provided better accuracy of SDK_DelayAtLeastUs with DWT, use macro SDK_DELAY_USE_DWT to enable this feature.
Modified the Cortex-M7 delay count divisor based on latest tests on RT series boards, this setting lets result be closer to actual delay time.
[2.2.2]
New Features
Added include RTE_Components.h for CMSIS pack RTE.
[2.2.1]
Bug Fixes
Fixed violation of MISRA C-2012 Rule 3.1, 10.1, 10.3, 10.4, 11.6, 11.9.
[2.2.0]
New Features
Moved SDK_DelayAtLeastUs function from clock driver to common driver.
[2.1.4]
New Features
Added OTFAD into status group.
[2.1.3]
Bug Fixes
MISRA C-2012 issue fixed.
Fixed the rule: rule-10.3.
[2.1.2]
Improvements
Add SUPPRESS_FALL_THROUGH_WARNING() macro for the usage of suppressing fallthrough warning.
[2.1.1]
Bug Fixes
Deleted and optimized repeated macro.
[2.1.0]
New Features
Added IRQ operation for XCC toolchain.
Added group IDs for newly supported drivers.
[2.0.2]
Bug Fixes
MISRA C-2012 issue fixed.
Fixed the rule: rule-10.4.
[2.0.1]
Improvements
Removed the implementation of LPC8XX Enable/DisableDeepSleepIRQ() function.
Added new feature macro switch “FSL_FEATURE_HAS_NO_NONCACHEABLE_SECTION” for specific SoCs which have no noncacheable sections, that helps avoid an unnecessary complex in link file and the startup file.
Updated the align(x) to attribute(aligned(x)) to support MDK v6 armclang compiler.
[2.0.0]
Initial version.
CRC
[2.0.4]
Improvements
Release peripheral from reset if necessary in init function.
[2.0.3]
Bug fix:
Fix MISRA issues.
[2.0.2]
Bug fix:
Fix MISRA issues.
[2.0.1]
Bug fix:
DATA and DATALL macro definition moved from header file to source file.
[2.0.0]
Initial version.
CTIMER
[2.3.3]
Bug Fixes
Fix CERT INT30-C INT31-C issue.
Make API CTIMER_SetupPwm and CTIMER_UpdatePwmDutycycle return fail if pulse width register overflow.
[2.3.2]
Bug Fixes
Clear unexpected DMA request generated by RESET_PeripheralReset in API CTIMER_Init to avoid trigger DMA by mistake.
[2.3.1]
Bug Fixes
MISRA C-2012 issue fixed: rule 10.7 and 12.2.
[2.3.0]
Improvements
Added the CTIMER_SetPrescale(), CTIMER_GetCaptureValue(), CTIMER_EnableResetMatchChannel(), CTIMER_EnableStopMatchChannel(), CTIMER_EnableRisingEdgeCapture(), CTIMER_EnableFallingEdgeCapture(), CTIMER_SetShadowValue(),APIs Interface to reduce code complexity.
[2.2.2]
Bug Fixes
Fixed SetupPwm() API only can use match 3 as period channel issue.
[2.2.1]
Bug Fixes
Fixed use specified channel to setting the PWM period in SetupPwmPeriod() API.
Fixed Coverity Out-of-bounds issue.
[2.2.0]
Improvements
Updated three API Interface to support Users to flexibly configure the PWM period and PWM output.
Bug Fixes
MISRA C-2012 issue fixed: rule 8.4.
[2.1.0]
Improvements
Added the CTIMER_GetOutputMatchStatus() API Interface.
Added feature macro for FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2 and FSL_FEATURE_CTIMER_HAS_NO_IR_CR2INT.
[2.0.3]
Bug Fixes
MISRA C-2012 issue fixed: rule 10.3, 10.4, 10.6, 10.7 and 11.9.
[2.0.2]
New Features
Added new API “CTIMER_GetTimerCountValue” to get the current timer count value.
Added a control macro to enable/disable the RESET and CLOCK code in current driver.
Added a new feature macro to update the API of CTimer driver for lpc8n04.
[2.0.1]
Improvements
API Interface Change
Changed API interface by adding CTIMER_SetupPwmPeriod API and CTIMER_UpdatePwmPulsePeriod API, which both can set up the right PWM with high resolution.
[2.0.0]
Initial version.
EDMA
[2.10.5]
Bug Fixes
Fixed memory convert would convert NULL as zero address issue.
[2.10.4]
Improvements
Add new MP register macros to ensure compatibility with different devices.
Add macro DMA_CHANNEL_ARRAY_STEPn to adapt to complex addressing of edma tcd registers.
[2.10.3]
Bug Fixes
Clear interrupt status flags in EDMA_CreateHandle to avoid triggering interrupt by mistake.
[2.10.2]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 10.3.
[2.10.1]
Bug Fixes
Fixed EDMA_GetRemainingMajorLoopCount may return wrong value issue.
Fixed violations of the MISRA C-2012 rules 13.5, 10.4.
[2.10.0]
Improvements
Modify the structures edma_core_mp_t, edma_core_channel_t, edma_core_tcd_t to adapt to edma5.
Add TCD register macro to facilitate confirmation of tcd type.
Modfiy the mask macro to a fixed value.
Add EDMA_TCD_TYPE macro to determine edma tcd type.
Add extension API to the following API to determine edma tcd type.
EDMA_ConfigChannelSoftwareTCD -> EDMA_ConfigChannelSoftwareTCDExt
EDMA_TcdReset -> EDMA_TcdResetExt
EDMA_TcdSetTransferConfig -> EDMA_TcdSetTransferConfigExt
EDMA_TcdSetMinorOffsetConfig -> EDMA_TcdSetMinorOffsetConfigExt
EDMA_TcdSetChannelLink -> EDMA_TcdSetChannelLinkExt
EDMA_TcdSetBandWidth -> EDMA_TcdSetBandWidthExt
EDMA_TcdSetModulo -> EDMA_TcdSetModuloExt
EDMA_TcdEnableAutoStopRequest -> EDMA_TcdEnableAutoStopRequestExt
EDMA_TcdEnableInterrupts -> EDMA_TcdEnableInterruptsExt
EDMA_TcdDisableInterrupts -> EDMA_TcdDisableInterruptsExt
EDMA_TcdSetMajorOffsetConfig -> EDMA_TcdSetMajorOffsetConfigExt
[2.9.2]
Improvements
Remove tcd alignment check in API that is low level and does not necessarily use scather/gather mode.
[2.9.1]
Bug Fixes
Deinit channel request source before set channel mux.
[2.9.0]
Improvements
Release peripheral from reset if necessary in init function.
Bug Fixes
Fixed the variable type definition error issue.
Fixed doxygen warning.
Fixed violations of MISRA C-2012 rule 18.1.
[2.8.1]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 10.3
[2.8.0]
Improvements
Added feature FSL_FEATURE_EDMA_HAS_NO_CH_SBR_SEC to separate DMA without SEC bitfield.
[2.7.1]
Bug Fixes
Fixed violations of MISRA C-2012 rule 10.3, 10.4, 11.6, 11.8, 14.3,.
[2.7.0]
Improvements
Use more accurate DMA instance based feature macros.
New Features
Add new APIs EDMA_PrepareTransferTCD and EDMA_SubmitTransferTCD, which support EDMA transfer using TCD.
[2.6.0]
Improvements
Modify the type of parameter channelRequestSource from dma_request_source_t to int32_t in the EDMA_SetChannelMux.
[2.5.3]
Bug Fixes
Fixed violations of MISRA C-2012 rule 10.3, 10.4, 11.6, 20.7, 12.2, 20.9, 5.3, 10.8, 8.4, 9.3.
[2.5.2]
Improvements
Applied ERRATA 51327.
[2.5.1]
Bug Fixes
Fixed the EDMA_ResetChannel function cannot reset channel DONE/ERROR status.
[2.5.0]
Improvements
Added feature FSL_FEATURE_EDMA_HAS_NO_SBR_ATTR_BIT to separate DMA without ATTR bitfield.
Added api EDMA_GetChannelSystemBusInformation to gets the channel identification and attribute information on the system bus interface.
Bug Fixes
Fixed the ESG bit not set in scatter gather mode issue.
Fixed the DREQ bit configuration missed in single transfer issue.
Cleared the interrupt status before invoke callback to avoid miss interrupt issue.
Removed disableRequestAfterMajorLoopComplete from edma_transfer_config_t structure as driver will handle it.
Fixed the channel mux configuration not compatible issue.
Fixed the out of bound access in function EDMA_DriverIRQHandler.
[2.4.4]
Bug Fixes
Fixed comments by replacing STCD with TCD
Fixed the TCD overwrite issue when submit transfer request in the callback if there is a active TCD in hardware.
[2.4.3]
Improvements
Added FSL_FEATURE_MEMORY_HAS_ADDRESS_OFFSET to convert the address between system mapped address and dma quick access address.
Bug Fixes
Fixed the wrong tcd done count calculated in first TCD interrupt for the non scatter gather case.
[2.4.2]
Bug Fixes
Fixed the wrong tcd done count calculated in first TCD interrupt by correct the initial value of the header.
Fixed violations of MISRA C-2012 rule 10.3, 10.4.
[2.4.1]
Bug Fixes
Added clear CITER and BITER registers in EDMA_AbortTransfer to make sure the TCD registers in a correct state for next calling of EDMA_SubmitTransfer.
Removed the clear DONE status for ESG not enabled case to aovid DONE bit cleared unexpectedly.
[2.4.0]
Improvements
Added api EDMA_EnableContinuousChannelLinkMode to support continuous link mode.
Added apis EDMA_SetMajorOffsetConfig/EDMA_TcdSetMajorOffsetConfig to support major loop address offset feature.
Added api EDMA_EnableChannelMinorLoopMapping for minor loop offset feature.
Removed the reduntant IRQ Handler in edma driver.
[2.3.2]
Improvements
Fixed HIS ccm issue in function EDMA_PrepareTransferConfig.
Fixed violations of MISRA C-2012 rule 11.6, 10.7, 10.3, 18.1.
Bug Fixes
Added ACTIVE & BITER & CITER bitfields to determine the channel status to fixed the issue of the transfer request cannot submit by function EDMA_SubmitTransfer when channel is idle.
[2.3.1]
Improvements
Added source/destination address alignment check.
Added driver IRQ handler support for multi DMA instance in one SOC.
[2.3.0]
Improvements
Added new api EDMA_PrepareTransferConfig to allow different configurations of width and offset.
Bug Fixes
Fixed violations of MISRA C-2012 rule 10.4, 10.1.
Fixed the Coverity issue regarding out-of-bounds write.
[2.2.0]
Improvements
Added peripheral-to-peripheral support in EDMA driver.
[2.1.9]
Bug Fixes
Fixed MISRA issue: Rule 10.7 and 10.8 in function EDMA_DisableChannelInterrupts and EDMA_SubmitTransfer.
Fixed MISRA issue: Rule 10.7 in function EDMA_EnableAsyncRequest.
[2.1.8]
Bug Fixes
Fixed incorrect channel preemption base address used in EDMA_SetChannelPreemptionConfig API which causes incorrect configuration of the channel preemption register.
[2.1.7]
Bug Fixes
Fixed incorrect transfer size setting.
Added 8 bytes transfer configuration and feature for RT series;
Added feature to support 16 bytes transfer for Kinetis.
Fixed the issue that EDMA_HandleIRQ would go to incorrect branch when TCD was not used and callback function not registered.
[2.1.6]
Bug Fixes
Fixed KW3X MISRA Issue.
Rule 14.4, 10.8, 10.4, 10.7, 10.1, 10.3, 13.5, and 13.2.
Improvements
Cleared the IRQ handler unavailable for specific platform with macro FSL_FEATURE_EDMA_MODULE_CHANNEL_IRQ_ENTRY_SHARED_OFFSET.
[2.1.5]
Improvements
Improved EDMA IRQ handler to support half interrupt feature.
[2.1.4]
Bug Fixes
Cleared enabled request, status during EDMA_Init for the case that EDMA is halted before reinitialization.
[2.1.3]
Bug Fixes
Added clear DONE bit in IRQ handler to avoid overwrite TCD issue.
Optimized above solution for the case that transfer request occurs in callback.
[2.1.2]
Improvements
Added interface to get next TCD address.
Added interface to get the unused TCD number.
[2.1.1]
Improvements
Added documentation for eDMA data flow when scatter/gather is implemented for the EDMA_HandleIRQ API.
Updated and corrected some related comments in the EDMA_HandleIRQ API and edma_handle_t struct.
[2.1.0]
Improvements
Changed the EDMA_GetRemainingBytes API into EDMA_GetRemainingMajorLoopCount due to eDMA IP limitation (see API comments/note for further details).
[2.0.5]
Improvements
Added pubweak DriverIRQHandler for K32H844P (16 channels shared).
[2.0.4]
Improvements
Added support for SoCs with multiple eDMA instances.
Added pubweak DriverIRQHandler for KL28T DMA1 and MCIMX7U5_M4.
[2.0.3]
Bug Fixes
Fixed the incorrect pubweak IRQHandler name issue, which caused re-definition build errors when client set his/her own IRQHandler, by changing the 32-channel IRQHandler name to DriverIRQHandler.
[2.0.2]
Bug Fixes
Fixed incorrect minorLoopBytes type definition in _edma_transfer_config struct, and defined minorLoopBytes as uint32_t instead of uint16_t.
[2.0.1]
Bug Fixes
Fixed the eDMA callback issue (which did not check valid status) in EDMA_HandleIRQ API.
[2.0.0]
Initial version.
EZHV
[2.1.1]
Improvements.
Move macros from source file to head file.
[2.1.0]
Improvements.
Added EZHV_SetCallback function parameters.
Added new APIs to get EZHV core status.
[2.0.0]
Initial version.
FLEXIO
[2.3.0]
Improvements
Supported platforms which don’t have DOZE mode control.
Added more pin control functions.
[2.2.3]
Improvements
Adapter the FLEXIO driver to platforms which don’t have system level interrupt controller, such as NVIC.
[2.2.2]
Improvements
Release peripheral from reset if necessary in init function.
[2.2.1]
Improvements
Added doxygen index parameter comment in FLEXIO_SetClockMode.
[2.2.0]
New Features
Added new APIs to support FlexIO pin register.
[2.1.0]
Improvements
Added API FLEXIO_SetClockMode to set flexio channel counter and source clock.
[2.0.4]
Bug Fixes
Fixed MISRA 8.4 issues.
[2.0.3]
Bug Fixes
Fixed MISRA 10.4 issues.
[2.0.2]
Improvements
Split FLEXIO component which combines all flexio/flexio_uart/flexio_i2c/flexio_i2s drivers into several components: FlexIO component, flexio_uart component, flexio_i2c_master component, and flexio_i2s component.
Bug Fixes
Fixed MISRA issues
Fixed rules 10.1, 10.3, 10.4, 10.7, 11.6, 11.9, 14.4, 17.7.
[2.0.1]
Bug Fixes
Fixed the dozen mode configuration error in FLEXIO_Init API. For enableInDoze = true, the configuration should be 0; for enableInDoze = false, the configuration should be 1.
FLEXIO_CAMERA
[2.2.0]
Improvements
Supported platforms which don’t have DOZE mode control.
[2.1.3]
Bug Fixes
Fixed MISRA 10.4 issues.
[2.1.2]
Improvements
Unified component full name to FLEXIO CAMERA (EDMA) driver.
Bug Fixes
Fixed MISRA issues
Fixed rules 10.1, 10.3, 10.4, 10.7, 11.6, 11.9, 14.4, 17.7.
[2.1.1]
Bug Fixes
The following modifications support FlexIO using multiple instances:
Removed FLEXIO_Reset API in module Init APIs.
Updated module Deinit APIs to reset the shifter/timer configuration instead of disabling module and clock.
Updated module Enable APIs to only support enable operation.
[2.1.0]
New Features
Added Transfer prefix in transactional APIs.
FLEXIO_I2C
[2.6.0]
Improvements
Supported platforms which don’t have DOZE mode control.
[2.5.1]
Improvements
Conditionally compile interrupt handling code to solve the problem of using this driver on CPU cores that do not support interrupts.
[2.5.0]
Improvements
Split some functions, fixed CCM problem in file fsl_flexio_i2c_master.c.
[2.4.0]
Improvements
Added delay of 1 clock cycle in FLEXIO_I2C_MasterTransferRunStateMachine to ensure that bus would be idle before next transfer if master is nacked.
Fixed issue that the restart setup time is less than the time in I2C spec by adding delay of 1 clock cycle before restart signal.
[2.3.0]
Improvements
Used 3 timers instead of 2 to support transfer which is more than 14 bytes in single transfer.
Improved FLEXIO_I2C_MasterTransferGetCount so that the API can check whether the transfer is still in progress.
Bug Fixes
Fixed MISRA 10.4 issues.
[2.2.0]
New Features
Added timeout mechanism when waiting certain state in transfer API.
Added an API for checking bus pin status.
Bug Fixes
Fixed COVERITY issue of useless call in FLEXIO_I2C_MasterTransferRunStateMachine.
Fixed MISRA issues
Fixed rules 10.1, 10.3, 10.4, 10.7, 11.6, 11.9, 14.4, 17.7.
Added codes in FLEXIO_I2C_MasterTransferCreateHandle to clear pending NVIC IRQ, disable internal IRQs before enabling NVIC IRQ.
Modified code so that during master’s nonblocking transfer the start and slave address are sent after interrupts being enabled, in order to avoid potential issue of sending the start and slave address twice.
[2.1.7]
Bug Fixes
Fixed the issue that FLEXIO_I2C_MasterTransferBlocking did not wait for STOP bit sent.
Fixed COVERITY issue of useless call in FLEXIO_I2C_MasterTransferRunStateMachine.
Fixed the issue that I2C master did not check whether bus was busy before transfer.
[2.1.6]
Bug Fixes
Fixed the issue that I2C Master transfer APIs(blocking/non-blocking) did not support the situation of master transfer with subaddress and transfer data size being zero, which means no data followed the subaddress.
[2.1.5]
Improvements
Unified component full name to FLEXIO I2C Driver.
[2.1.4]
Bug Fixes
The following modifications support FlexIO using multiple instances:
Removed FLEXIO_Reset API in module Init APIs.
Updated module Deinit APIs to reset the shifter/timer config instead of disabling module/clock.
Updated module Enable APIs to only support enable operation.
[2.1.3]
Improvements
Changed the prototype of FLEXIO_I2C_MasterInit to return kStatus_Success if initialized successfully or to return kStatus_InvalidArgument if “(srcClock_Hz / masterConfig->baudRate_Bps) / 2 - 1” exceeds 0xFFU.
[2.1.2]
Bug Fixes
Fixed the FLEXIO I2C issue where the master could not receive data from I2C slave in high baudrate.
Fixed the FLEXIO I2C issue where the master could not receive NAK when master sent non-existent addr.
Fixed the FLEXIO I2C issue where the master could not get transfer count successfully.
Fixed the FLEXIO I2C issue where the master could not receive data successfully when sending data first.
Fixed the Dozen mode configuration error in FLEXIO_I2C_MasterInit API. For enableInDoze = true, the configuration should be 0; for enableInDoze = false, the configuration should be 1.
Fixed the issue that FLEXIO_I2C_MasterTransferBlocking API called FLEXIO_I2C_MasterTransferCreateHandle, which lead to the s_flexioHandle/s_flexioIsr/s_flexioType variable being written. Then, if calling FLEXIO_I2C_MasterTransferBlocking API multiple times, the s_flexioHandle/s_flexioIsr/s_flexioType variable would not be written any more due to it being out of range. This lead to the following situation: NonBlocking transfer APIs could not work due to the fail of register IRQ.
[2.1.1]
Bug Fixes
Implemented the FLEXIO_I2C_MasterTransferBlocking API which is defined in header file but has no implementation in the C file.
[2.1.0]
New Features
Added Transfer prefix in transactional APIs.
Added transferSize in handle structure to record the transfer size.
FLEXIO_I2S
[2.2.1]
Improvements
Conditionally compile interrupt handling code to solve the problem of using this driver on CPU cores that do not support interrupts.
[2.2.0]
New Features
Added timeout mechanism when waiting certain state in transfer API.
Bug Fixes
Fixed IAR Pa082 warnings.
Fixed violations of the MISRA C-2012 rules 10.4, 14.4, 11.8, 11.9, 10.1, 17.7, 11.6, 10.3, 10.7.
[2.1.6]
Bug Fixes
Added reset flexio before flexio i2s init to make sure flexio status is normal.
[2.1.5]
Bug Fixes
Fixed the issue that I2S driver used hard code for bitwidth setting.
[2.1.4]
Improvements
Unified component’s full name to FLEXIO I2S (DMA/EDMA) driver.
[2.1.3]
Bug Fixes
The following modifications support FLEXIO using multiple instances:
Removed FLEXIO_Reset API in module Init APIs.
Updated module Deinit APIs to reset the shifter/timer config instead of disabling module/clock.
Updated module Enable APIs to only support enable operation.
[2.1.2]
New Features
Added configure items for all pin polarity and data valid polarity.
Added default configure for pin polarity and data valid polarity.
[2.1.1]
Bug Fixes
Fixed FlexIO I2S RX data read error and eDMA address error.
Fixed FlexIO I2S slave timer compare setting error.
[2.1.0]
New Features
Added Transfer prefix in transactional APIs.
Added transferSize in handle structure to record the transfer size.
FLEXIO_I2S_EDMA
[2.1.8]
Improvements
Applied EDMA ERRATA 51327.
FLEXIO_MCU_LCD
[2.2.0]
Improvements
Supported platforms which don’t have DOZE mode control.
[2.1.0]
New Features
Supported transmit only data without command.
[2.0.8]
Bug Fixes
Fixed bug that FLEXIO_MCULCD_Init return kStatus_Success even with invalid parameter.
Fixed glitch on WR, that when initially configure the timer pin as output, or change the pin back to disabled, the pin may be driven low causing glitch on bus. Configure the pin as bidirection output first then perform a subsequent write to change to output or dsiabled to avoid the issue.
[2.0.6]
Bug Fixes
Fixed MISRA 10.4 issues when FLEXIO_MCULCD_DATA_BUS_WIDTH defined as signed value.
[2.0.5]
Improvements
Changed FLEXIO_MCULCD_WriteDataArrayBlocking’s data parameter to const type.
[2.0.4]
Bug Fixes
Fixed MISRA 10.4 issues.
[2.0.3]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 10.1, 10.3, 10.4, 10.6, 14.4, 17.7.
[2.0.2]
Improvements
Unified component full name to FLEXIO_MCU_LCD (EDMA) driver.
[2.0.1]
Bug Fixes
The following modification to support FlexIO using multiple instances:
Removed FLEXIO_Reset API in module Init APIs.
Updated module Deinit APIs to reset the shifter/timer configuration instead of disabling module and clock.
Updated module Enable APIs to only support enable operation.
[2.0.0]
Initial version.
FLEXIO_MCU_LCD_EDMA
[2.0.5]
New Features
Supported transmit only data without command.
[2.0.4]
Bug Fixes
Fixed MISRA 10.4 issues.
[2.0.3]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 10.1, 10.3, 10.4, 10.6, 14.4, 17.7.
[2.0.2]
Improvements
Unified component full name to FLEXIO_MCU_LCD (EDMA) driver.
[2.0.1]
Bug Fixes
The following modification to support FlexIO using multiple instances:
Removed FLEXIO_Reset API in module Init APIs.
Updated module Deinit APIs to reset the shifter/timer configuration instead of disabling module and clock.
Updated module Enable APIs to only support enable operation.
[2.0.0]
Initial version.
FLEXIO_SPI
[2.4.0]
Improvements
Supported platforms which don’t have DOZE mode control.
[2.3.5]
Improvements
Conditionally compile interrupt handling code to solve the problem of using this driver on CPU cores that do not support interrupts.
[2.3.4]
Bug Fixes
Fixed the txData from void * to const void * in transmit API
[2.3.3]
Bugfixes
Fixed cs-continuous mode.
[2.3.2]
Improvements
Changed FLEXIO_SPI_DUMMYDATA to 0x00.
[2.3.1]
Bugfixes
Fixed IRQ SHIFTBUF overrun issue when one FLEXIO instance used as multiple SPIs.
[2.3.0]
New Features
Supported FLEXIO_SPI slave transfer with continuous master CS signal and CPHA=0.
Supported FLEXIO_SPI master transfer with continuous CS signal.
Support 32 bit transfer width.
Bug Fixes
Fixed wrong timer compare configuration for dma/edma transfer.
Fixed wrong byte order of rx data if transfer width is 16 bit, since the we use shifter buffer bit swapped/byte swapped register to read in received data, so the high byte should be read from the high bits of the register when MSB.
[2.2.1]
Bug Fixes
Fixed bug in FLEXIO_SPI_MasterTransferAbortEDMA that when aborting EDMA transfer EDMA_AbortTransfer should be used rather than EDMA_StopTransfer.
[2.2.0]
Improvements
Added timeout mechanism when waiting certain states in transfer driver.
Bug Fixes
Fixed MISRA 10.4 issues.
Added codes in FLEXIO_SPI_MasterTransferCreateHandle and FLEXIO_SPI_SlaveTransferCreateHandle to clear pending NVIC IRQ before enabling NVIC IRQ, to fix issue of pending IRQ interfering the on-going process.
[2.1.3]
Improvements
Unified component full name to FLEXIO SPI(DMA/EDMA) Driver.
Bug Fixes
Fixed MISRA issues
Fixed rules 10.1, 10.3, 10.4, 10.7, 11.6, 11.9, 14.4, 17.7.
[2.1.2]
Bug Fixes
The following modification support FlexIO using multiple instances:
Removed FLEXIO_Reset API in module Init APIs.
Updated module Deinit APIs to reset the shifter/timer config instead of disabling module/clock.
Updated module Enable APIs to only support enable operation.
[2.1.1]
Bug Fixes
Fixed bug where FLEXIO SPI transfer data is in 16 bit per frame mode with eDMA.
Fixed bug when FLEXIO SPI works in eDMA and interrupt mode with 16-bit per frame and Lsbfirst.
Fixed the Dozen mode configuration error in FLEXIO_SPI_MasterInit/FLEXIO_SPI_SlaveInit API. For enableInDoze = true, the configuration should be 0; for enableInDoze = false, the configuration should be 1.
Improvements
Added #ifndef/#endif to allow users to change the default TX value at compile time.
[2.1.0]
New Features
Added Transfer prefix in transactional APIs.
Added transferSize in handle structure to record the transfer size.
Bug Fixes
Fixed the error register address return for 16-bit data write in FLEXIO_SPI_GetTxDataRegisterAddress.
Provided independent IRQHandler/transfer APIs for Master and slave to fix the baudrate limit issue.
FLEXIO_UART
[2.6.0]
Improvements
Supported platforms which don’t have DOZE mode control.
[2.5.1]
Improvements
Conditionally compile interrupt handling code to solve the problem of using this driver on CPU cores that do not support interrupts.
[2.5.0]
Improvements
Added API FLEXIO_UART_FlushShifters to flush UART fifo.
[2.4.0]
Improvements
Use separate data for TX and RX in flexio_uart_transfer_t.
Bug Fixes
Fixed bug that when ring buffer is used, if some data is received in ring buffer first before calling FLEXIO_UART_TransferReceiveNonBlocking, the received data count returned by FLEXIO_UART_TransferGetReceiveCount is wrong.
[2.3.0]
Improvements
Added check for baud rate’s accuracy that returns kStatus_FLEXIO_UART_BaudrateNotSupport when the best achieved baud rate is not within 3% error of configured baud rate.
Bug Fixes
Added codes in FLEXIO_UART_TransferCreateHandle to clear pending NVIC IRQ before enabling NVIC IRQ, to fix issue of pending IRQ interfering the on-going process.
[2.2.0]
Improvements
Added timeout mechanism when waiting for certain states in transfer driver.
Bug Fixes
Fixed MISRA 10.4 issues.
[2.1.6]
Bug Fixes
Fixed IAR Pa082 warnings.
Fixed MISRA issues
Fixed rules 10.1, 10.3, 10.4, 10.7, 11.6, 11.9, 14.4, 17.7.
[2.1.5]
Improvements
Triggered user callback after all the data in ringbuffer were received in FLEXIO_UART_TransferReceiveNonBlocking.
[2.1.4]
Improvements
Unified component full name to FLEXIO UART(DMA/EDMA) Driver.
[2.1.3]
Bug Fixes
The following modifications support FLEXIO using multiple instances:
Removed FLEXIO_Reset API in module Init APIs.
Updated module Deinit APIs to reset the shifter/timer configuration instead of disabling module and clock.
Updated module Enable APIs to only support enable operation.
[2.1.2]
Bug Fixes
Fixed the transfer count calculation issue in FLEXIO_UART_TransferGetReceiveCount, FLEXIO_UART_TransferGetSendCount, FLEXIO_UART_TransferGetReceiveCountDMA, FLEXIO_UART_TransferGetSendCountDMA, FLEXIO_UART_TransferGetReceiveCountEDMA and FLEXIO_UART_TransferGetSendCountEDMA.
Fixed the Dozen mode configuration error in FLEXIO_UART_Init API. For enableInDoze = true, the configuration should be 0; for enableInDoze = false, the configuration should be 1.
Added code to report errors if the user sets a too-low-baudrate which FLEXIO cannot reach.
Disabled FLEXIO_UART receive interrupt instead of all NVICs when reading data from ring buffer. If ring buffer is used, receive nonblocking will disable all NVIC interrupts to protect the ring buffer. This had negative effects on other IPs using interrupt.
[2.1.1]
Bug Fixes
Changed the API name FLEXIO_UART_StopRingBuffer to FLEXIO_UART_TransferStopRingBuffer to align with the definition in C file.
[2.1.0]
New Features
Added Transfer prefix in transactional APIs.
Added txSize/rxSize in handle structure to record the transfer size.
Bug Fixes
Added an error handle to handle the situation that data count is zero or data buffer is NULL.
FLEXIO_UART_EDMA
[2.3.1]
Bug Fixes
Fixed violations of the MISRA C-2012 rules.
[2.3.0]
Refer FLEXIO_UART driver change log to 2.3.0
FREQME
[2.1.2]
Improvements
Release peripheral from reset if necessary in init function.
[2.1.1]
Fixed MISRA issues.
[2.1.0]
Updated register name.
[2.0.0]
Initial version.
GDET
[2.1.0]
Update for multiple instances
Fix bug in isolation off API
Add enable and disable APIs
[2.0.1]
Fix MISRA in GDET_ReconfigureVoltageMode().
[2.0.0]
Initial version.
GLIKEY
[2.0.1]
Implement INIT state recovery from the LOCKED state after a reset when the previous index was locked.
[2.0.0]
Initial version.
GPIO
[2.8.1]
Bug Fixes
Fixed CERT INT31-C issues.
[2.8.0]
Improvements
Add API GPIO_PortInit/GPIO_PortDeinit to set GPIO clock enable and releasing GPIO reset.
[2.8.0]
Improvements
Add API GPIO_PortInit/GPIO_PortDeinit to set GPIO clock enable and releasing GPIO reset.
Remove support for API GPIO_GetPinsDMARequestFlags with GPIO_ISFR_COUNT <= 1.
[2.7.3]
Improvements
Release peripheral from reset if necessary in init function.
[2.7.2]
New Features
Support devices without PORT module.
[2.7.1]
Bug Fixes
Fixed MISRA C-2012 rule 10.4 issues in GPIO_GpioGetInterruptChannelFlags() function and GPIO_GpioClearInterruptChannelFlags() function.
[2.7.0]
New Features
Added API to support Interrupt select (IRQS) bitfield.
[2.6.0]
New Features
Added API to get GPIO version information.
Added API to control a pin for general purpose input.
Added some APIs to control pin in secure and previliege status.
[2.5.3]
Bug Fixes
Correct the feature macro typo: FSL_FEATURE_GPIO_HAS_NO_INDEP_OUTPUT_CONTORL.
[2.5.2]
Improvements
Improved GPIO_PortSet/GPIO_PortClear/GPIO_PortToggle functions to support devices without Set/Clear/Toggle registers.
[2.5.1]
Bug Fixes
Fixed wrong macro definition.
Fixed MISRA C-2012 rule issues in the FGPIO_CheckAttributeBytes() function.
Defined the new macro to separate the scene when the width of registers is different.
Removed some redundant macros.
New Features
Added some APIs to get/clear the interrupt status flag when the port doesn’t control pins’ interrupt.
[2.4.1]
Improvements
Improved GPIO_CheckAttributeBytes() function to support 8 bits width GACR register.
[2.4.0]
Improvements
API interface added:
New APIs were added to configure the GPIO interrupt clear settings.
[2.3.2]
Bug Fixes
Fixed the issue for MISRA-2012 check.
Fixed rule 3.1, 10.1, 8.6, 10.6, and 10.3.
[2.3.1]
Improvements
Removed deprecated APIs.
[2.3.0]
New Features
Updated the driver code to adapt the case of interrupt configurations in GPIO module. New APIs were added to configure the GPIO interrupt settings if the module has this feature on it.
[2.2.1]
Improvements
API interface changes:
Refined naming of APIs while keeping all original APIs by marking them as deprecated. The original APIs will be removed in next release. The main change is updating APIs with prefix of _PinXXX() and _PortXXX.
[2.1.1]
Improvements
API interface changes:
Added an API for the check attribute bytes.
[2.1.0]
Improvements
API interface changes:
Added “pins” or “pin” to some APIs’ names.
Renamed “_PinConfigure” to “GPIO_PinInit”.
I3C
[2.13.1]
Bug Fixes
Disabled Rx auto-termination in repeated start interrupt event while transfer API doesn’t enable it.
Waited the completion event after loading all Tx data in Tx FIFO.
Improvements
Conditionally compile interrupt handling code to solve the problem of using this driver on CPU cores that do not support interrupts.
[2.13.0]
New features
Added the hot-join support for I3C bus initialization API.
Bug Fixes
Set read termination with START at the same time in case unknown issue.
Set MCTRL[TYPE] as 0 for DDR force exit.
Improvements
Added the API to reset device count assigned by ENTDAA.
Provided the method to set global macro I3C_MAX_DEVCNT to determine how many device addresses ENTDAA can allocate at one time.
Initialized target management static array based on instance number for the case that multiple instances are used at the same time.
[2.12.0]
Improvements
Added the slow clock parameter for Controller initialization function to calculate accurate timeout.
Bug Fixes
Fixed the issue that BAMATCH field can’t be 0. BAMATCH should be 1 for 1MHz slow clock.
[2.11.1]
Bug Fixes
Fixed the issue that interrupt API transmits extra byte when subaddress and data size are null.
Fixed the slow clock calculation issue.
[2.11.0]
New features
Added the START/ReSTART SCL delay setting for the Soc which supports this feature.
Bug Fixes
Fixed the issue that ENTDAA process waits Rx pending flag which causes problem when Rx watermark isn’t 0. Just check the Rx FIFO count.
[2.10.8]
Improvements
Support more instances.
[2.10.7]
Improvements
Fixed the potential compile warning.
[2.10.6]
New features
Added the I3C private read/write with 0x7E address as start.
[2.10.5]
New features
Added I3C HDR-DDR transfer support.
[2.10.4]
Improvements
Added one more option for master to not set RDTERM when doing I3C Common Command Code transfer.
[2.10.3]
Improvements
Masked the slave IBI/MR/HJ request functions with feature macro.
[2.10.2]
Bug Fixes
Added workaround for errata ERR051617: I3C working with I2C mode creates the unintended Repeated START before actual STOP on some platforms.
[2.10.1]
Bug Fixes
Fixed the issue that DAA function doesn’t wait until all Rx data is read out from FIFO after master control done flag is set.
Fixed the issue that DAA function could return directly although the disabled interrupts are not enabled back.
[2.10.0]
New features
Added I3C extended IBI data support.
[2.9.0]
Improvements
Added adaptive termination for master blocking transfer. Set termination with start signal when receiving bytes less than 256.
[2.8.2]
Improvements
Fixed the build warning due to armgcc strict check.
[2.8.1]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 17.7.
[2.8.0]
Improvements
Added API I3C_MasterProcessDAASpecifiedBaudrate for temporary baud rate adjustment when I3C master assigns dynamic address.
[2.7.1]
Bug Fixes
Fixed the issue that I3C slave handle STOP event before finishing data transmission.
[2.7.0]
Fixed the CCM problem in file fsl_i3c.c.
Fixed the FSL_FEATURE_I3C_HAS_NO_SCONFIG_IDRAND usage issue in I3C_GetDefaultConfig and I3C_Init.
[2.6.0]
Fixed the FSL_FEATURE_I3C_HAS_NO_SCONFIG_IDRAND usage issue in fsl_i3c.h.
Changed some static functions in fsl_i3c.c as non-static and define the functions in fsl_i3c.h to make I3C DMA driver reuse:
I3C_GetIBIType
I3C_GetIBIAddress
I3C_SlaveCheckAndClearError
Changed the handle pointer parameter in IRQ related funtions to void * type to make it reuse in I3C DMA driver.
Added new API I3C_SlaveRequestIBIWithSingleData for slave to request single data byte, this API could be used regardless slave is working in non-blocking interrupt or non-blocking dma.
Added new API I3C_MasterGetDeviceListAfterDAA for master application to get the device information list built up in DAA process.
[2.5.4]
Improved I3C driver to avoid setting state twice in the SendCommandState of I3C_RunTransferStateMachine.
Fixed MISRA violation of rule 20.9.
Fixed the issue that I3C_MasterEmitRequest did not use Type I3C SDR.
[2.5.3]
Updated driver for new feature FSL_FEATURE_I3C_HAS_NO_SCONFIG_BAMATCH and FSL_FEATURE_I3C_HAS_NO_SCONFIG_IDRAND.
[2.5.2]
Updated driver for new feature FSL_FEATURE_I3C_HAS_NO_MERRWARN_TERM.
Fixed the issue that call to I3C_MasterTransferBlocking API did not generate STOP signal when NAK status was returned.
[2.5.1]
Improved the receive terminate size setting for interrupt transfer read, now it’s set at beginning of transfer if the receive size is less than 256 bytes.
[2.5.0]
Added new API I3C_MasterRepeatedStartWithRxSize to send repeated start signal with receive terminate size specified.
Fixed the status used in I3C_RunTransferStateMachine, changed to use pending interrupts as status to be handled in the state machine.
Fixed MISRA 2012 violation of rule 10.3, 10.7.
[2.4.0]
Bug Fixes
Fixed kI3C_SlaveMatchedFlag interrupt is not properly handled in I3C_SlaveTransferHandleIRQ when it comes together with interrupt kI3C_SlaveBusStartFlag.
Fixed the inaccurate I2C baudrate calculation in I3C_MasterSetBaudRate.
Added new API I3C_MasterGetIBIRules to get registered IBI rules.
Added new variable isReadTerm in struct _i3c_master_handle for transfer state routine to check if MCTRL.RDTERM is configured for read transfer.
Changed to emit Auto IBI in transfer state routine for slave start flag assertion.
Fixed the slave maxWriteLength and maxReadLength does not be configured into SMAXLIMITS register issue.
Fixed incorrect state for IBI in I3C master interrupt transfer IRQ handle routine.
Added isHotJoin in i3c_slave_config_t to request hot-join event during slave init.
[2.3.2]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 8.4, 17.7.
Fixed incorrect HotJoin event index in I3C_GetIBIType.
[2.3.1]
Bug Fixes
Fixed the issue that call of I3C_MasterTransferBlocking/I3C_MasterTransferNonBlocking fails for the case which receive length 1 byte of data.
Fixed the issue that STOP signal is not sent when NAK status is detected during execution of I3C_MasterTransferBlocking function.
[2.3.0]
Improvements
Added I3C common driver APIs to initialize I3C with both master and slave configuration.
Updated I3C master transfer callback to function set structure to include callback invoke for IBI event and slave2master event.
Updated I3C master non-blocking transfer model and always enable the interrupts to be able to re-act to the slave start event and handle slave IBI.
[2.2.0]
Bug Fixes
Fixed the issue that I3C transfer size limit to 255 bytes.
[2.1.2]
Bug Fixes
Reset default hkeep value to kI3C_MasterHighKeeperNone in I3C_MasterGetDefaultConfig
[2.1.1]
Bug Fixes
Fixed incorrect FIFO reset operation in I3C Master Transfer APIs.
Fixed i3c slave IRQ handler issue, slave transmit could be underrun because tx FIFO is not filled in time right after start flag detected.
[2.1.0]
Added definitions and APIs for I3C slave functionality, updated previous I3C APIs to support I3C functionality.
[2.0.0]
Initial version.
I3C_EDMA
[2.2.9]
Bug Fixes
Fixed MISRA issue rule 11.3.
Added the master control done flag waiting code after STOP in case the bus is not idle when transfer function finishes.
[2.2.8]
Improvements
Removed I3C IRQ handler calling in the EDMA callback. Previously driver doesn’t use the END byte which can trigger the STOP interrupt for controller sending and receiving, now let I3C event handler deal with all I3C events.
Bug Fixes
Fixed the bug that the END type Tx register is not used when command length or data length is one byte.
[2.2.7]
Bug Fixes
Fixed MISRA issue rule 11.6.
[2.2.6]
New features
Added the I3C private read/write with 0x7E address as start.
[2.2.5]
Improvements
Added the workaround for RT1180 I3C EDMA issue ERR052086.
[2.2.4]
Bug Fixes
Fixed the issue that I3C master sends the last byte data without using the END type register.
[2.2.3]
Bug Fixes
Fixed issue that slave polulates the last byte when Tx FIFO may be full.
[2.2.2]
Bug Fixes
Fixed I3C MISRA issue rule 10.4, 11.3.
[2.2.1]
Bug Fixes
Fixed the issue that I3C slave send the last byte data without using the END type register.
Improvements
There’s no need to reserve two bytes FIFO for DMA transfer which is for IP issue workaround.
[2.2.0]
Improvements
Deleted legacy IBI data request code.
[2.1.0]
Bug Fixes
Fixed MISRA issue rule 8.4, 8.6, 11.8.
[2.0.1]
Bug Fixes
Fixed MISRA issue rule 9.1.
[2.0.0]
Initial version.
INPUTMUX
[2.0.8]
Improvements
Updated a feature macro usage for function INPUTMUX_EnableSignal.
[2.0.7]
Improvements
Release peripheral from reset if necessary in init function.
[2.0.6]
Bug Fixes
Fixed the documentation wrong in API INPUTMUX_AttachSignal.
[2.0.5]
Bug Fixes
Fixed build error because some devices has no sct.
[2.0.4]
Bug Fixes
Fixed violations of the MISRA C-2012 rule 10.4, 12.2 in INPUTMUX_EnableSignal() function.
[2.0.3]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 10.4, 10.7, 12.2.
[2.0.2]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 10.4, 12.2.
[2.0.1]
Support channel mux setting in INPUTMUX_EnableSignal().
[2.0.0]
Initial version.
IOPCTL
[2.0.2]
Bug fixes
Fix MISRA issues.
[2.0.1]
Bug fixes
Remove unsupported IOPCTL_FULLDRIVE_EN(bit8) configuration.
[2.0.0]
Initial version.
IRTC
[2.3.2]
Bug Fixes
Fixed API IRTC_GetDatetime read YEARMON, DAYS, HOURMIN, SECONDS registers issue.
[2.3.1]
Bug Fixes
Fixed MISRA C-2012 issue 10.4.
[2.3.0]
New Feature
Supported platforms with multiple IRTC instances.
[2.2.4]
Bug Fixes
Fixed MISRA C-2012 issue 10.1, 10.3, 10.4, 10.7, 12.2.
[2.2.3]
Bug Fixes
Updated undefined macro names by available ones.
[2.2.2]
Bug Fixes
Fixed MISRA C-2012 issue 10.3.
[2.2.1]
Bug Fixes
Fixed MISRA issues.
[2.2.0]
New Feature
Add new APIs for CLK_SEL and CLKO to select RTC clock and enable/disable output to peripherals.
Supported platforms without tamper feature.
[2.1.3]
Bug Fixes
Fixed MISRA C-2012 issue 10.1 and 10.4.
[2.1.2]
Bug Fixes
Fixed kIRTC_TamperFlag flag can’t be cleared issue.
[2.1.1]
Bug Fixes
MISRA C-2012 issue check.
Fixed rules, containing: rule-10.1, rule-10.3, rule-10.4.
[2.1.0]
Bug Fixes
Fixed incorrect leap year check in IRTC_CheckDatetimeFormat.
New Feature
Added new APIs for new feature FSL_FEATURE_RTC_HAS_SUBSYSTEM.
Added new APIs for TAMPER, TAMPER QUEUE status get and clear.
Added new API to enable/disable 32 kHz RTC OSC clock during RTC register write.
Updated IRTC_SetTamperParams to support new feature FSL_FEATURE_RTC_HAS_FILTER23_CFG
Updated irtc_config_t to exclude member wakeupSelect for new feature FSL_FEATURE_RTC_HAS_NO_CTRL2_WAKEUP_MODE.
[2.0.2]
Bug Fixes
MISRA C-2012 issue check.
Fixed rules, containing: rule-10.1, rule-10.3, rule-10.4, rule-10.6, rule-10.8, rule-11.9, rule-12.2, rule-15.5, rule-16.4, rule-17.7.
[2.0.1]
Bug Fixes
Fixed the issue of hard code in IRTC_Init.
[2.0.0]
Initial version.
ITRC
[2.4.0]
Rework the input signal definition for better flexibility
[2.3.0]
Update names of kITRC_SwEvent1/2 to kITRC_SwEvent0/1 to align with RM
[2.2.0]
Update driver to new version and input events
[2.1.0]
Make SYSCON glitch platform dependent.
[2.0.0]
Initial version.
JPEGDEC
[2.0.0]
Initial version.
LCDIF
[2.3.0]
New Features
Supported layer decompress mode for DC8000.
[2.2.0]
New Features
Supported new layers and configurations for DC8000.
Added new APIs and configurations to support DBI interface.
Bug Fixes
Update align calculation method, the old one can only be used when the align bytes’ low bits are all zeros.
[2.1.2]
Improvements
Release peripheral from reset if necessary in init function.
[2.1.1]
Improvements
Added memory address conversion to support buffers which could only be accessed using alias address by non-core masters.
Bug Fixes
Fix MISRA-C 2012 issues.
[2.1.0]
Bug Fixes
Corrected the frame buffer pixel format name.
[2.0.0]
Initial version.
LPADC
[2.9.1]
Bug Fixes
Fixed incorrect channel B FIFO selection logic.
[2.9.0]
Bug Fixes
Add code to handle the case where GCC[GAIN_CAL] is a signed number.
Split LPADC_FinishAutoCalibration function into two functions.
Improved LPADC driver.
[2.8.4]
Bug Fixes
Remove function ‘LPADC_SetOffsetValue’ assert statement, this statement may cause runtime errors in existing code.
[2.8.3]
Bug Fixes
Fixed SDK lpadc driver examples compile issue, move condition ‘commandId < ADC_CV_COUNT’ to a more appropriate location.
[2.8.2]
Bug Fixes
Fixed the violations of MISRA C-2012 rule 18.1, 10.3, 10.1 and 10.4.
[2.8.1]
Bug Fixes
Fixed LPADC sample mode enum name mistake.
[2.8.0]
Improvements
Release peripheral from reset if necessary in init function.
Bug Fixes
Fixed function LPADC_GetConvResult() issue.
Fixed function LPADC_SetConvCommandConfig() bugs.
[2.7.2]
Improvements
Use feature macros instead of header file macros.
Bug Fixes
Fixed the violations of MISRA C-2012 rule 10.1, 10.3, 10.4 and 14.3.
[2.7.1]
Improvements
Corrected descriptions of several functions.
Improved function LPADC_GetOffsetValue and LPADC_SetOffsetValue.
Revert changes of feature macros for lpadc.
Use feature macros instead of header file macros.
Bug Fixes
Fixed the violations of MISRA C-2012 rule 10.8.
Fixed the violations of MISRA C-2012 rule 10.1, 10.3, 10.4 and 14.3.
[2.7.0]
Improvements
Added supports of CFG2 register.
Removed some useless macros.
[2.6.2]
Bug Fixes
Fixed the violations of MISRA C-2012 rules.
Fixed LPADC driver code compile error issue.
[2.6.1]
Improvements
Updated the use of macros in the driver code.
[2.6.0]
Improvements
Added the API LPADC_SetOffset12BitValue() to configure 12bit ADC conversion offset trim value manually.
Added the API LPADC_SetOffset16BitValue() to configure 16bit ADC conversion offset trim value manually.
Added API to set offset calibration mode.
Added configuration of alternate channel.
Updated auto calibration API and added calibration value conversion API.
New feature
Added API LPADC_EnableHardwareTriggerCommandSelection() to enable trigger commands controlled by ADC_ETC.
Updated LPADC_DoAutoCalibration() to allow doing something else before the ADC inititialization to be totally complete. Enhance initialization duration time of the ADC.
Added two new APIs to get/set calibration value.
[2.5.2]
Improvements
Added while loop, LPADC_GetConvResult() will return only when the FIFO will not be empty.
[2.5.1]
Bug Fixes
Fixed some typos in Lpadc driver comments.
[2.5.0]
Improvements
Added missing items to enable trigger interrupts.
[2.4.0]
New features
Added APIs to get/clear trigger status flags.
[2.3.0]
Improvements
Removed LPADC_MeasureTemperature() function for the LPADC supports different temperature sensor calculation equations.
[2.2.1]
Improvements
Optimized LPADC_MeasureTemperature() function to support the specific series with flash solidified calibration value.
Clean doxygen warnings.
Bug Fixes
Fixed violations of MISRA C-2012 rule 10.3, rule 10.8 and rule 17.7.
[2.2.0]
New Feature
Added API LPADC_MeasureTemperature() to get correct temperature from the internal sensor.
Improvements
Separated lpadc_conversion_resolution_mode_t with related feature macro.
Bug Fixes
Fixed the violations of MISRA C-2012 rules:
Rule 10.3, 10.4, 10.6, 10.7 and 17.7.
[2.1.1]
Improvements
Updated the gain calibration formula.
Used feature to segregate the new item kLPADC_TriggerPriorityPreemptSubsequently.
[2.1.0]
New Features
Added the API LPADC_SetOffsetValue() to support configure offset trim value manually.
Added the API LPADC_DoOffsetCalibration() to do offset calibration independently.
Improvements
Improved the usage of macros and removed invalid macros.
[2.0.2]
Improvements
Added support for platforms with 2 FIFOs and different calibration measures.
[2.0.1]
Bug Fixes
Ensured the API LPADC_SetConvCommandConfig configure related registers correctly.
[2.0.0]
Initial version.
LPFLEXCOMM
[2.2.1]
Bug Fix
Fixed the bug that function LPFLEXCOMM_GetBaseAddr() type was uint32_t,but return NULL((void*)0).
[2.2.0]
New Features
Added new API to get LPFLEXCOMM base address.
[2.1.2]
Bug Fix
Fixed the bug that when the same instance is initialized multiple times, all previous states will be cleared and only the last state will be retained.
[2.1.1]
New Features
Supported new platform that has more lpflexcomm instance.
[2.1.0]
Improvements
Function LP_FLEXCOMM_SetPeriph changed from public to private,function LP_FLEXCOMM_Init no longer judges the periph.
[2.0.0]
Initial version.
LPI2C
[2.2.5]
Improvements
Added assert with target feature check in LPI2C_SlaveInit().
Added feature check to LPI2C_CommonIRQHandler().
[2.2.4]
Bug Fixes
Fixed LPI2C_MasterTransferBlocking() - the return value was sometime affected by call of LPI2C_MasterStop().
[2.2.3]
Bug Fixes
Fixed an issue that LP_FLEXCOMM_Deinit() is called incorrectly.
[2.2.2]
Improvements
Fixed doxygen warning in LPI2C_SlaveTransferHandleIRQ.
[2.2.1]
Bug Fixes
Added bus stop incase of bus stall in LPI2C_MasterTransferBlocking.
[2.2.0]
Improvements
Support the normal LPI2C in LPFLEXCOMM driver.
[2.1.1]
Improvements
Optimize slave ISR.When replying to ack/nack,first judge whether the user performs the reply in the APP.
[2.1.0]
New Features
Added new function LPI2C_SlaveEnableAckStall to enable or disable ACKSTALL.
[2.0.1]
Improvements
Supported to initialize the flexcomm layer outside the peripheral driver initialization function.
[2.0.0]
Initial version.
LPI2C_EDMA
[2.0.1]
Improvements
Add EDMA ext API to accommodate more types of EDMA.
[2.0.0]
Initial version.
LPSPI
[2.2.7]
Bug Fixes
Fixed reading of TCR register
Workaround for errata ERR050606
[2.2.6]
Bug Fixes
Fixed an issue that LP_FLEXCOMM_Deinit() is called incorrectly.
[2.2.5]
Bug Fixes
Fixed the txData from void * to const void * in transmit API.
[2.2.4]
Improvements
Fixed doxygen warning in LPSPI_SlaveTransferHandleIRQ.
[2.2.3]
Bug Fixes
Disabled lpspi before LPSPI_MasterSetBaudRate incase of LPSPI opened.
[2.2.2]
Bug Fixes
Fixed 3-wire txmask of handle vaule reentrant issue.
[2.2.1]
Bug Fixes
Workaround for errata ERR051588 by clearing FIFO after transmit underrun occurs.
[2.2.0]
Feature
Added the new feature of multi-IO SPI .
[2.1.1]
Fixed LPSPI_MasterGetDefaultConfig incorrect default inter-transfer delay calculation.
[2.0.0]
Initial version.
LPSPI_EDMA
[2.1.3]
Improvements
Increased transmit FIFO watermark to ensure whole transmit FIFO will be used during data transfer.
[2.1.2]
Bug Fixes
Fixed reading of TCR register
Workaround for errata ERR050606
[2.1.1]
Improvements
Add EDMA ext API to accommodate more types of EDMA.
[2.1.0]
Improvements
Separated LPSPI_MasterTransferEDMA functions to LPSPI_MasterTransferPrepareEDMA and LPSPI_MasterTransferEDMALite to optimize the process of transfer.
[2.0.0]
Initial version.
LPUART
[2.3.2]
Bug Fix
Fixed the bug that LPUART_TransferEnable16Bit controled by wrong feature macro.
[2.3.1]
Bug Fix
Fixed MISRA C-2012 violations.
[2.3.0]
Improvements
Added support of DATA register for 9bit or 10bit data transmit in write and read API. Such as: LPUART_WriteBlocking16bit, LPUART_ReadBlocking16bit, LPUART_TransferEnable16Bit LPUART_WriteNonBlocking16bit, LPUART_ReadNonBlocking16bit.
[2.2.4]
Bug Fix
Fixed the bug that baud rate calculation overflow when srcClock_Hz is 528MHz.
[2.2.3]
Improvements
Added atomic in LPUART_EnableInterrupts and LPUART_DisableInterrupts.
[2.2.2]
Improvements
Added comment on txExtendedTimeoutValue of lpuart_timeout_config_t.
[2.2.1]
Bug Fix
Fixed the bug that the OSR calculation error when lupart init and lpuart set baud rate.
[2.2.0]
Improvements
Rename some enumeration variables to be consistent with lpuart driver.
[2.1.1]
Improvements
Supported to initialize the flexcomm layer outside the peripheral driver initialization function.
[2.1.0]
New Features
Supported new platform that does not have the feature of MODEM Control,MODEM Status,Receiver Extended Idle,Transmitter Extended Idle, Half Duplex Control,Timeout Control,Timeout Status and Timeout N.
[2.0.0]
Initial version.
MIPI_DSI
[2.2.1]
Bug Fixes
Fixed issue that VACTIVE setting shall equal to the number of active lines (height), no need to minus 1.
Improvements
Update DSI_Deinit to reset peripheral.
Update DSI_DeinitDphy to power down DPHY using DPHY_PD_REG before powering down PLL.
[2.2.0]
New Features
Added APIs to configure DBI FIFO and payload.
Supported new controls and configurations of DBI pixel format, PHY ready and ULPS for RT700.
Updated the DPI setting to use float for coefficient value for more accurate calculation.
[2.1.6]
Improvements
Release peripheral from reset if necessary in init function.
[2.1.5]
Other Changes
Changed to use new register naming.
Added workaround for Errata ERR011439. Avoid DCS long packet command writes with zero-length data payload in low-power mode, because the checksum is incorrect in this case.
[2.1.4]
Bug Fixes
Fixed the MISRA issues.
[2.1.3]
Bug Fixes
Fixed the DPI horizontal timing setting issue.
[2.1.2]
Improvements
Supported long package read.
Bug Fixes
Fixed the bug that runs to hardfault when sending long packet with 4-byte unaligned address.
[2.1.1]
Improvements
Some SOC compatibility improvement.
[2.1.0]
Improvements
Improved for the platforms which does not support ULPS.
[2.0.6]
Bug Fixes
Fixed the timing issue that non-continuous HS clock mode does not work.
[2.0.5]
Bug Fixes
Fixed kDSI_InterruptGroup1BtaTo and kDSI_InterruptGroup1HtxTo definition error.
Improvements
Changed to override MIPI_DriverIRQHandler instead of MIPI_IRQHandler.
[2.0.4]
Bug Fixes
Fixed MISRA C-2012 issues: 10.1, 10.3, 10.4, 10.4, 10.6, 10.7, 10.8, 11.3, 11.8, 12.2, 14.4, 16.4, 17.7.
[2.0.3]
Improvement
Updated for combo phy header file.
[2.0.2]
New Features
Supported sending separate DSI command from TX data array.
Bug Fixes
Disabled all interrupts in DSI_Init.
[2.0.1]
Improvements
Updated to support the DPHY which does not have internal DPHY PLL.
[2.0.0]
Initial version.
MMU
[2.0.0]
Initial version.
MRT
[2.0.4]
Improvements
Don’t reset MRT when there is not system level MRT reset functions.
[2.0.3]
Bug Fixes
Fixed violations of MISRA C-2012 rule 10.1 and 10.4.
Fixed the wrong count value assertion in MRT_StartTimer API.
[2.0.2]
Bug Fixes
Fixed violations of MISRA C-2012 rule 10.4.
[2.0.1]
Added control macro to enable/disable the RESET and CLOCK code in current driver.
[2.0.0]
Initial version.
MU
[2.7.0]
New Features
Added API MU_GetRxStatusFlags.
[2.6.0]
New Features
Added API MU_GetInterruptsPending.
[2.5.1]
Bug Fixes
Fixed the bug that MU_TriggerGeneralPurposeInterrupts and MU_TriggerInterrupts may trigger previous triggered general purpose interrupts again by mistake.
[2.5.0]
New Features
Supported more than 4 general purpose interrupts.
Added seperate APIs for general purpose interrupts.
[2.4.0]
Improvements
Supported the case that some features only avaiable with specific instances. These features include Hardware Reset, Boot Peer Core, Hold Reset. When using the features with instances which don’t support them, driver will report error.
[2.3.3]
Improvements
Release peripheral from reset if necessary in init function.
[2.3.2]
Improvements
Supported platforms which don’t have CCR0[RSTH], CCR0[CLKE], CCR0[HR], CCR0[HRM].
[2.3.1]
Bug Fixes
Fixed build error for platforms which have CCR0[RSTH], but no CCR0[NMI].
[2.3.0]
New features
Added support for i.MX RT7xx.
[2.2.1]
Bug Fixes
Fixed issue that MU_GetInstance() is defined but never used.
[2.2.0]
New features
Added support for i.MX RT118x.
Bug Fixes
Fixed general purpose interrupt bug.
Other Changes
Change _mu_interrupt_trigger item value.
[2.1.2]
Bug Fixes
Fixed bug that general purpose interrupt can’t be configured.
[2.1.1]
Bug Fixes
Fixed MISRA C-2012 issues.
[2.1.0]
Improvements
Added new enum mu_msg_reg_index_t.
[2.0.0]
Initial version.
OSTIMER
[2.2.3]
Improvements
Disable and clear pending interrupts before disabling the OSTIMER clock to avoid interrupts being executed when the clock is already disabled.
[2.2.2]
Improvements
Support devices with different OSTIMER instance name.
[2.2.1]
Improvements
Release peripheral from reset if necessary in init function.
[2.2.0]
Improvements
Move the PMC operation out of the OSTIMER driver to board specific files.
Added low level APIs to control OSTIMER MATCH and interrupt.
[2.1.2]
Bug Fixes
Fixed MISRA-2012 rule 10.8.
[2.1.1]
Bug Fixes
removes the suffix ‘n’ for some register names and bit fields’ names
Improvements
Added HW CODE GRAY feature supported by CODE GRAY in SYSCTRL register group.
[2.1.0]
Bug Fixes
Added a workaround to fix the issue that no interrupt was reported when user set smaller period.
Fixed violation of MISRA C-2012 rule 10.3 and 11.9.
Improvements
Added return value for the two APIs to set match value.
OSTIMER_SetMatchRawValue
OSTIMER_SetMatchValue
[2.0.3]
Bug Fixes
Fixed violation of MISRA C-2012 rule 10.3, 14.4, 17.7.
[2.0.2]
Improvements
Added support for OSTIMER0
[2.0.1]
Improvements
Removed the software reset function out of the initialization API.
Enabled interrupt directly instead of enabling deep sleep interrupt. Users need to enable the deep sleep interrupt in application code if needed.
[2.0.0]
Initial version.
PDM
[2.9.1]
Bug Fixes
Fixed the issue that the driver still enters the interrupt after disabling clock.
[2.9.0]
Improvements
Added feature FSL_FEATURE_PDM_HAS_DECIMATION_FILTER_BYPASS to config CTRL_2[DEC_BYPASS] field.
Modify code to make the OSR value is not limited to 16.
[2.8.1]
Improvements
Added feature FSL_FEATURE_PDM_HAS_NO_DOZEN to handle nonexistent CTRL_1[DOZEN] field.
[2.8.0]
Improvements
Added feature FSL_FEATURE_PDM_HAS_NO_HWVAD to remove the support of hadware voice activity detector.
Added feature FSL_FEATURE_PDM_HAS_NO_FILTER_BUFFER to remove the support of FIR_RDY bitfield in STAT register.
[2.7.4]
Bug Fixes
Fixed driver can not determine the specific float number of clock divider.
Fixed PDM_ValidateSrcClockRate calculates PDM channel in wrong method issue.
[2.7.3]
Improvements
Added feature FSL_FEATURE_PDM_HAS_NO_VADEF to remove the support of VADEF bitfield in VAD0_STAT register.
[2.7.2]
Improvements
Added feature FSL_FEATURE_PDM_HAS_NO_MINIMUM_CLKDIV to decide whether the minimum clock frequency division is required.
[2.7.1]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 8.4, 10.3, 10.1, 10.4, 14.4
[2.7.0]
Improvements
Added api PDM_EnableHwvadInterruptCallback to support handle hwvad IRQ in PDM driver.
Corrected the sample rate configuration for non high quality mode.
Added api PDM_SetChannelGain to support adjust the channel gain.
[2.6.0]
Improvements
Added new features FSL_FEATURE_PDM_HAS_STATUS_LOW_FREQ/FSL_FEATURE_PDM_HAS_DC_OUT_CTRL/FSL_FEATURE_PDM_DC_CTRL_VALUE_FIXED.
[2.5.0]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 8.4, 16.5, 10.4, 10.3, 10.1, 11.9, 17.7, 10.6, 14.4, 11.8, 11.6.
[2.4.1]
Bug Fixes
Fixed MDK 66-D warning in pdm driver.
[2.4.0]
Improvements
Added api PDM_TransferSetChannelConfig/PDM_ReadFifo to support read different width data.
Added feature FSL_FEATURE_PDM_HAS_RANGE_CTRL and api PDM_ClearRangeStatus/PDM_GetRangeStatus for range register.
Bug Fixes
Fixed violation of MISRA C-2012 Rule 14.4, 10.3, 10.4.
[2.3.0]
Improvements
Enabled envelope/energy voice detect mode by adding apis PDM_SetHwvadInEnvelopeBasedMode/PDM_SetHwvadInEnergyBasedMode.
Added feature FSL_FEATURE_PDM_CHANNEL_NUM for different SOC.
[2.2.1]
Bug Fixes
Fixed violation of MISRA C-2012 Rule 10.1, 10.3, 10.4, 10.6, 10.7, 11.3, 11.8, 14.4, 17.7, 18.4.
Added medium quality mode support in function PDM_SetSampleRateConfig.
[2.2.0]
Improvements
Added api PDM_SetSampleRateConfig to improve user experience and marked api PDM_SetSampleRate as deprecated.
[2.1.1]
Improvements
Used new SDMA API SDMA_SetDoneConfig instead of SDMA_EnableSwDone for PDM SDMA driver.
[2.1.0]
Improvements
Added software buffer queue for transactional API.
[2.0.1]
Improvements
Improved HWVAD feature.
[2.0.0]
Initial version.
PDM_EDMA
[2.6.3]
Improvements
Add EDMA ext API to accommodate more types of EDMA.
[2.6.2]
Improvements
Add macro MCUX_SDK_PDM_EDMA_PDM_ENABLE_INTERNAL to let the user decide whether to enable it when calling PDM_TransferReceiveEDMA.
[2.6.1]
Bug Fixes
Fixed violation of MISRA C-2012 Rule 10.3, 10.4.
[2.6.0]
Improvements
Updated api PDM_TransferReceiveEDMA to support channel block interleave transfer.
Added new api PDM_TransferSetMultiChannelInterleaveType to support channel interleave type configurations.
[2.5.0]
Refer PDM driver change log 2.1.0 to 2.5.0
PINT
[2.1.13]
Improvements
Added instance array for PINT to adapt more devices.
Used release reset instead of reset PINT which may clear other related registers out of PINT.
[2.1.12]
Bug Fixes
Fixed coverity issue.
[2.1.11]
Bug Fixes
Fixed MISRA C-2012 rule 10.7 violation.
[2.1.10]
New Features
Added the driver support for MCXN10 platform with combined interrupt handler.
[2.1.9]
Bug Fixes
Fixed MISRA-2012 rule 8.4.
[2.1.8]
Bug Fixes
Fixed MISRA-2012 rule 10.1 rule 10.4 rule 10.8 rule 18.1 rule 20.9.
[2.1.7]
Improvements
Added fully support for the SECPINT, making it can be used just like PINT.
[2.1.6]
Bug Fixes
Fixed the bug of not enabling common pint clock when enabling security pint clock.
[2.1.5]
Bug Fixes
Fixed issue for MISRA-2012 check.
Fixed rule 10.1 rule 10.3 rule 10.4 rule 10.8 rule 14.4.
Changed interrupt init order to make pin interrupt configuration more reasonable.
[2.1.4]
Improvements
Added feature to control distinguish PINT/SECPINT relevant interrupt/clock configurations for PINT_Init and PINT_Deinit API.
Swapped the order of clearing PIN interrupt status flag and clearing pending NVIC interrupt in PINT_EnableCallback and PINT_EnableCallbackByIndex function.
Bug Fixes
Fixed build issue caused by incorrect macro definitions.
[2.1.3]
Bug fix:
Updated PINT_PinInterruptClrStatus to clear PINT interrupt status when the bit is asserted and check whether was triggered by edge-sensitive mode.
Write 1 to IST corresponding bit will clear interrupt status only in edge-sensitive mode and will switch the active level for this pin in level-sensitive mode.
Fixed MISRA c-2012 rule 10.1, rule 10.6, rule 10.7.
Added FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS to distinguish IRQ relevant array definitions for SECPINT/PINT on lpc55s69 board.
Fixed PINT driver c++ build error and remove index offset operation.
[2.1.2]
Improvement:
Improved way of initialization for SECPINT/PINT in PINT_Init API.
[2.1.1]
Improvement:
Enabled secure pint interrupt and add secure interrupt handle.
[2.1.0]
Added PINT_EnableCallbackByIndex/PINT_DisableCallbackByIndex APIs to enable/disable callback by index.
[2.0.2]
Added control macro to enable/disable the RESET and CLOCK code in current driver.
[2.0.1]
Bug fix:
Updated PINT driver to clear interrupt only in Edge sensitive.
[2.0.0]
Initial version.
PNGDEC
[2.0.0]
Initial version.
POWER
[2.4.0]
New features
Added APIs POWER_CalcVoltLevel, POWER_ConfigRegulatorSetpointsForFreq.
[2.3.0]
Bug fixes
Fixed bugs in LDO Setpoint setting APIs.
Fixed bugs in XSPI recovery when XIP.
New features
Added API POWER_EnterPowerMode.
[2.2.1]
Bug fixes
Fixed bugs in enum _power_hwwake_src.
[2.2.0]
New features
Added parameter checks in setpoint configuration APIs.
Bug fixes
Fixed bugs in power mode entry API.
[2.1.0]
New features
Added POWER_ConfigLvdSetpoints API.
[2.0.0]
Initial version.
PUFv3
[2.0.3]
Update for various PUF CTRL wrapper.
[2.0.2]
Fix MISRA issue in driver.
[2.0.1]
Fix PUF initialization issue and update driver to reflect SoC header changes.
[2.0.0]
Initial version.
RESET
[2.1.0]
New features
Added RESET_SetFlashStateContext API.
[2.0.2]
Bug fixes
Added FREQME_RSTS_N.
[2.0.1]
Refined the GPIO_RSTS array so that the element number matches the instance index
Added SDADC_RSTS.
[2.0.0]
initial version.
SAI
[2.4.4]
Bug Fixes
Fixed enumeration sai_fifo_combine_t - add RX configuration.
[2.4.3]
Bug Fixes
Fixed enumeration sai_fifo_combine_t value configuration issue.
[2.4.2]
Improvements
Release peripheral from reset if necessary in init function.
[2.4.1]
Bug Fixes
Fixed bitWidth incorrectly assigned issue.
[2.4.0]
Improvements
Removed deprecated APIs.
[2.3.8]
Bug Fixes
Fixed violations of MISRA C-2012 rule 10.4.
[2.3.7]
Improvements
Change feature “FSL_FEATURE_SAI_FIFO_COUNT” to “FSL_FEATURE_SAI_HAS_FIFO”.
Added feature “FSL_FEATURE_SAI_FIFO_COUNTn(x)” to align SAI fifo count function with IP in function
[2.3.6]
Bug Fixes
Fixed violations of MISRA C-2012 rule 5.6.
[2.3.5]
Improvements
Make driver to be aarch64 compatible.
[2.3.4]
Bug Fixes
Corrected the fifo combine feature macro used in driver.
[2.3.3]
Bug Fixes
Added bit clock polarity configuration when sai act as slave.
Fixed out of bound access coverity issue.
Fixed violations of MISRA C-2012 rule 10.3, 10.4.
[2.3.2]
Bug Fixes
Corrected the frame sync configuration when sai act as slave.
[2.3.1]
Bug Fixes
Corrected the peripheral name in function SAI0_DriverIRQHandler.
Fixed violations of MISRA C-2012 rule 17.7.
[2.3.0]
Bug Fixes
Fixed the build error caused by the SOC has no fifo feature.
[2.2.3]
Bug Fixes
Corrected the peripheral name in function SAI0_DriverIRQHandler.
[2.2.2]
Bug Fixes
Fixed the issue of MISRA 2004 rule 9.3.
Fixed sign-compare warning.
Fixed the PA082 build warning.
Fixed sign-compare warning.
Fixed violations of MISRA C-2012 rule 10.3,17.7,10.4,8.4,10.7,10.8,14.4,17.7,11.6,10.1,10.6,8.4,14.3,16.4,18.4.
Allow to reset Rx or Tx FIFO pointers only when Rx or Tx is disabled.
Improvements
Added 24bit raw audio data width support in sai sdma driver.
Disabled the interrupt/DMA request in the SAI_Init to avoid generates unexpected sai FIFO requests.
[2.2.1]
Improvements
Added mclk post divider support in function SAI_SetMasterClockDivider.
Removed useless configuration code in SAI_RxSetSerialDataConfig.
Bug Fixes
Fixed the SAI SDMA driver build issue caused by the wrong structure member name used in the function SAI_TransferRxSetConfigSDMA/SAI_TransferTxSetConfigSDMA.
Fixed BAD BIT SHIFT OPERATION issue caused by the FSL_FEATURE_SAI_CHANNEL_COUNTn.
Applied ERR05144: not set FCONT = 1 when TMR > 0, otherwise the TX may not work.
[2.2.0]
Improvements
Added new APIs for parameters collection and simplified user interfaces:
SAI_Init
SAI_SetMasterClockConfig
SAI_TxSetBitClockRate
SAI_TxSetSerialDataConfig
SAI_TxSetFrameSyncConfig
SAI_TxSetFifoConfig
SAI_TxSetBitclockConfig
SAI_TxSetConfig
SAI_TxSetTransferConfig
SAI_RxSetBitClockRate
SAI_RxSetSerialDataConfig
SAI_RxSetFrameSyncConfig
SAI_RxSetFifoConfig
SAI_RxSetBitclockConfig
SAI_RXSetConfig
SAI_RxSetTransferConfig
SAI_GetClassicI2SConfig
SAI_GetLeftJustifiedConfig
SAI_GetRightJustifiedConfig
SAI_GetTDMConfig
[2.1.9]
Improvements
Improved SAI driver comment for clock polarity.
Added enumeration for SAI for sample inputs on different edges.
Changed FSL_FEATURE_SAI_CHANNEL_COUNT to FSL_FEATURE_SAI_CHANNEL_COUNTn(base) for the difference between the different SAI instances.
Added new APIs:
SAI_TxSetBitClockDirection
SAI_RxSetBitClockDirection
SAI_RxSetFrameSyncDirection
SAI_TxSetFrameSyncDirection
[2.1.8]
Improvements
Added feature macro test for the sync mode2 and mode 3.
Added feature macro test for masterClockHz in sai_transfer_format_t.
[2.1.7]
Improvements
Added feature macro test for the mclkSource member in sai_config_t.
Changed “FSL_FEATURE_SAI5_SAI6_SHARE_IRQ” to “FSL_FEATURE_SAI_SAI5_SAI6_SHARE_IRQ”.
Added #ifndef #endif check for SAI_XFER_QUEUE_SIZE to allow redefinition.
Bug Fixes
Fixed build error caused by feature macro test for mclkSource.
[2.1.6]
Improvements
Added feature macro test for mclkSourceClockHz check.
Added bit clock source name for general devices.
Bug Fixes
Fixed incorrect channel numbers setting while calling RX/TX set format together.
[2.1.5]
Bug Fixes
Corrected SAI3 driver IRQ handler name.
Added I2S4/5/6 IRQ handler.
Added base in handler structure to support different instances sharing one IRQ number.
New Features
Updated SAI driver for MCR bit MICS.
Added 192 KHZ/384 KHZ in the sample rate enumeration.
Added multi FIFO interrupt/SDMA transfer support for TX/RX.
Added an API to read/write multi FIFO data in a blocking method.
Added bclk bypass support when bclk is same with mclk.
[2.1.4]
New Features
Added an API to enable/disable auto FIFO error recovery in platforms that support this feature.
Added an API to set data packing feature in platforms which support this feature.
[2.1.3]
New Features
Added feature to make I2S frame sync length configurable according to bitWidth.
[2.1.2]
Bug Fixes
Added 24-bit support for SAI eDMA transfer. All data shall be 32 bits for send/receive, as eDMA cannot directly handle 3-Byte transfer.
[2.1.1]
Improvements
Reduced code size while not using transactional API.
[2.1.0]
Improvements
API name changes:
SAI_GetSendRemainingBytes -> SAI_GetSentCount.
SAI_GetReceiveRemainingBytes -> SAI_GetReceivedCount.
All names of transactional APIs were added with “Transfer” prefix.
All transactional APIs use base and handle as input parameter.
Unified the parameter names.
Bug Fixes
Fixed WLC bug while reading TCSR/RCSR registers.
Fixed MOE enable flow issue. Moved MOE enable after MICS settings in SAI_TxInit/SAI_RxInit.
[2.0.0]
Initial version.
SAI_EDMA
[2.7.1]
Improvements
Add EDMA ext API to accommodate more types of EDMA.
[2.7.0]
Improvements
Updated api SAI_TransferReceiveEDMA to support voice channel block interleave transfer.
Updated api SAI_TransferSendEDMA to support voice channel block interleave transfer.
Added new api SAI_TransferSetInterleaveType to support channel interleave type configurations.
[2.6.0]
Improvements
Removed deprecated APIs.
[2.5.1]
Bug Fixes
Fixed violations of MISRA C-2012 rule 20.7.
[2.5.0]
Improvements
Added new api SAI_TransferSendLoopEDMA/SAI_TransferReceiveLoopEDMA to support loop transfer.
Added multi sai channel transfer support.
[2.4.0]
Improvements
Added new api SAI_TransferGetValidTransferSlotsEDMA which can be used to get valid transfer slot count in the sai edma transfer queue.
Deprecated the api SAI_TransferRxSetFormatEDMA and SAI_TransferTxSetFormatEDMA.
Bug Fixes
Fixed violations of MISRA C-2012 rule 10.3,10.4.
[2.3.2]
Refer SAI driver change log 2.1.0 to 2.3.2
SCTIMER
[2.5.1]
Bug Fixes
Fixed bug in SCTIMER_SetupCaptureAction: When kSCTIMER_Counter_H is selected, events 12-15 and capture registers 12-15 CAPn_H field can’t be used.
[2.5.0]
Improvements
Add SCTIMER_GetCaptureValue API to get capture value in capture registers.
[2.4.9]
Improvements
Supported platforms which don’t have system level SCTIMER reset.
[2.4.8]
Bug Fixes
Fixed the issue that the SCTIMER_UpdatePwmDutycycle() can’t writes MATCH_H bit and RELOADn_H.
[2.4.7]
Bug Fixes
Fixed the issue that the SCTIMER_UpdatePwmDutycycle() can’t configure 100% duty cycle PWM.
[2.4.6]
Bug Fixes
Fixed the issue where the H register was not written as a word along with the L register.
Fixed the issue that the SCTIMER_SetCOUNTValue() is not configured with high 16 bits in unify mode.
[2.4.5]
Bug Fixes
Fix SCT_EV_STATE_STATEMSKn macro build error.
[2.4.4]
Bug Fixes
Fix MISRA C-2012 issue 10.8.
[2.4.3]
Bug Fixes
Fixed the wrong way of writing CAPCTRL and REGMODE registers in SCTIMER_SetupCaptureAction.
[2.4.2]
Bug Fixes
Fixed SCTIMER_SetupPwm 100% duty cycle issue.
[2.4.1]
Bug Fixes
Fixed the issue that MATCHn_H bit and RELOADn_H bit could not be written.
[2.4.0]
[2.3.0]
Bug Fixes
Fixed the potential overflow issue of pulseperiod variable in SCTIMER_SetupPwm/SCTIMER_UpdatePwmDutycycle API.
Fixed the issue of SCTIMER_CreateAndScheduleEvent API does not correctly work with 32 bit unified counter.
Fixed the issue of position of clear counter operation in SCTIMER_Init API.
Improvements
Update SCTIMER_SetupPwm/SCTIMER_UpdatePwmDutycycle to support generate 0% and 100% PWM signal.
Add SCTIMER_SetupEventActiveDirection API to configure event activity direction.
Update SCTIMER_StartTimer/SCTIMER_StopTimer API to support start/stop low counter and high counter at the same time.
Add SCTIMER_SetCounterState/SCTIMER_GetCounterState API to write/read counter current state value.
Update APIs to make it meaningful.
SCTIMER_SetEventInState
SCTIMER_ClearEventInState
SCTIMER_GetEventInState
[2.2.0]
Improvements
Updated for 16-bit register access.
[2.1.3]
Bug Fixes
Fixed the issue of uninitialized variables in SCTIMER_SetupPwm.
Fixed the issue that the Low 16-bit and high 16-bit work independently in SCTIMER driver.
Improvements
Added an enumerable macro of unify counter for user.
kSCTIMER_Counter_U
Created new APIs for the RTC driver.
SCTIMER_SetupStateLdMethodAction
SCTIMER_SetupNextStateActionwithLdMethod
SCTIMER_SetCOUNTValue
SCTIMER_GetCOUNTValue
SCTIMER_SetEventInState
SCTIMER_ClearEventInState
SCTIMER_GetEventInState
Deprecated legacy APIs for the RTC driver.
SCTIMER_SetupNextStateAction
[2.1.2]
Bug Fixes
MISRA C-2012 issue fixed: rule 10.3, 10.4, 10.6, 10.7, 11.9, 14.2 and 15.5.
[2.1.1]
Improvements
Updated the register and macro names to align with the header of devices.
[2.1.0]
Bug Fixes
Fixed issue where SCT application level Interrupt handler function is occupied by SCT driver.
Fixed issue where wrong value for INSYNC field inside SCTIMER_Init function.
Fixed issue to change Default value for INSYNC field inside SCTIMER_GetDefaultConfig.
[2.0.1]
New Features
Added control macro to enable/disable the RESET and CLOCK code in current driver.
[2.0.0]
Initial version.
SDADC
[2.0.1]
Improvements
Fixed MISRA C-2012 issues.
[2.0.0]
Initial version.
SEMA42
[2.0.4]
Improvements
Release peripheral from reset if necessary in init function.
[2.0.3]
Improvements
Changed to implement SEMA42_Lock base on SEMA42_TryLock.
[2.0.2]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 17.7.
[2.0.1]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 10.3, 10.4, 14.4, 18.1.
[2.0.0]
Initial version.
SYSPM
[2.3.0]
New Features
Supported instruction counter.
[2.2.0]
New Features
Supported platforms which only have one monitor.
Supported platforms whose instrction counter can’t be cleared.
Supported platforms whose counter can’t be disabled.
[2.1.0]
New Features
Added new APIs SYSPM_Init and SYSPM_Deinit.
[2.0.0]
Initial version.
TRNG
[2.0.18]
Bug fix:
TRNG health checks now done in software on RT5xx and RT6xx.
[2.0.17]
New features:
Add support for RT700.
[2.0.16]
Improvements:
Added support for Dual oscillator mode.
[2.0.15]
Other changes:
Changed TRNG_USER_CONFIG_DEFAULT_XXX values according to latest reccomended by design team.
[2.0.14]
New features:
Add support for RW610 and RW612.
[2.0.13]
Bug fix:
After deepsleep it might return error, added clearing bits in TRNG_GetRandomData() and generating new entropy.
Modified reloading entropy in TRNG_GetRandomData(), for some data length it doesn’t reloading entropy correctly.
[2.0.12]
Bug fix:
For KW34A4_SERIES, KW35A4_SERIES, KW36A4_SERIES set TRNG_USER_CONFIG_DEFAULT_OSC_DIV to kTRNG_RingOscDiv8.
[2.0.11]
Bug fix:
Add clearing pending errors in TRNG_Init().
[2.0.10]
Bug Fix:
Fixed doxygen issues.
[2.0.9]
Bug Fix:
Fix HIS_CCM metrics issues.
[2.0.8]
Bug fix:
For K32L2A41A_SERIES set TRNG_USER_CONFIG_DEFAULT_OSC_DIV to kTRNG_RingOscDiv4.
[2.0.7]
Bug fix:
Fix MISRA 2004 issue rule 12.5.
[2.0.6]
Bug fix:
For KW35Z4_SERIES set TRNG_USER_CONFIG_DEFAULT_OSC_DIV to kTRNG_RingOscDiv8.
[2.0.5]
Improvements:
For FRQMIN, FRQMAX and OSCDIV, add possibility to use device specific preprocessor macro to define default value in TRNG user configuration structure.
[2.0.4]
Bug Fix:
Fix MISRA-2012 issues.
Rule 10.1, rule 10.3, rule 13.5, rule 16.1.
[2.0.3]
Improvements:
update TRNG_Init to restart new entropy generation.
[2.0.2]
Improvements:
fix MISRA issues
Rule 14.4.
[2.0.1]
New features:
Set default OSCDIV for Kinetis devices KL8x and KL28Z.
Other changes:
Changed default OSCDIV for K81 to divide by 2.
[2.0.0]
Initial version.
USDHC
[2.8.4]
Improvements
Add feature macro FSL_FEATURE_USDHC_HAS_NO_VS18.
[2.8.3]
Improvements
Improved api USDHC_EnableAutoTuningForCmdAndData to adapt to new bit field name for USDHC_VEND_SPEC2 register.
[2.8.2]
Improvements
Added feature macro FSL_FEATURE_USDHC_HAS_NO_VOLTAGE_SELECT.
[2.8.1]
Bug Fixes
Fixed violations of MISRA C-2012 rule 11.9.
[2.8.0]
Improvements
Fixed the mmc boot transfer failed issue which is caused by the Dma complete interrupt not enabled.
Marked api USDHC_AdjustDelayForManualTuning as deprecated and added new api USDHC_SetTuingDelay/USDHC_GetTuningDelayStatus.
Improved the manual tuning flow accroding to specification.
Added memory address conversion to support buffers which could only be accessed using alias address by non-core masters.
Fixed violations of MISRA C-2012 rule 10.4.
[2.7.0]
Improvements
Added api USDHC_TransferScatterGatherADMANonBlocking to support scatter gather transfer.
Added feature FSL_FEATURE_USDHC_REGISTER_HOST_CTRL_CAP_HAS_NO_RETUNING_TIME_COUNTER for re-tuning time counter field in HOST_CTRL_CAP register.
Bug Fixes
Fixed violations of MISRA C-2012 rule 11.9, 10.1, 10.3, 10.4, 8.4.
[2.6.0]
Improvements
Added api USDHC_SetStandardTuningCounter to support adjust tuning counter of Standard tuning.
[2.5.1]
Improvements
Used different status code for command and data interrupt callback.
Added cache line invalidate for receive buffer in driver IRQ handler to fix CM7 speculative access issue.
[2.5.0]
Improvements
Added new api USDHC_SetStrobeDllOverride for HS400 strobe dll override mode delay taps configurations.
Corrected the STROBE DLL configurations sequence.
[2.4.0]
Improvements
Added feature macro for read/write burst length.
Disabled redundant interrupt per different transfer request.
Disabled interrupt and reset command/data pointer in handle when transfer completes.
Bug Fixes
Fixed violations of MISRA C-2012 rule 11.9, 15.7, 4.7, 16.4, 10.1, 10.3, 10.4, 11.3, 14.4, 10.6, 17.7, 16.1, 16.3.
Fixed PA082 build warning.
Fixed logically dead code Coverity issue.
[2.3.0]
Improvements
Added USDHC_SetDataConfig API to support manual tuning.
Removed the limitaion that source clock must be bigger than the target in function USDHC_SetSdClock by using source clock frequency as target directly.
Added peripheral reset in USDHC_Init function.
Added tuning reset support in function USDHC_Reset function.
[2.2.8]
Bug Fixes
Fixed out-of bounds write in function USDHC_ReceiveCommandResponse.
[2.2.7]
Improvements
Added API USDHC_GetEnabledInterruptStatusFlags and used in USDHC_TransferHandleIRQ.
Removed useless member interruptFlags in usdhc_handle_t.
[2.2.6]
Improvements
Added address align check for ADMA descriptor table address.
Changed USDHC_ADMA1_DESCRIPTOR_MAX_LENGTH_PER_ENTRY to (65536-4096) to make sure the data address is 4KB align for a transfer which need more than one ADMA1 descriptor.
[2.2.5]
Bug Fixes
Fixed MDK 66-D warning.
[2.2.4]
Bug Fixes
Fixed issue that real clock frequency wss mismatched with target clock frequency, which was caused by an incorrect prescaler calculation.
New Features
Added control macro to enable/disable the CLOCK code in current driver.
[2.2.3]
Bug Fixes
Fixed issue where AMDA did not disable with DMAEN clear.
Improvements
Improved set clock function to check the output frequency range.
Dynamic set SDCLKFS during DDR enable or disable.
[2.2.2]
Improvements
Improved read transfer cache maintain operation, combined clean, and invalidated them into one function.
[2.2.1]
Bug Fixes
Disabled the invalidate cache operation for tuning.
[2.2.0]
Improvements
Improved USDHC to support MMC boot feature.
[2.1.3]
Bug Fixes
Fixed MISRA issue.
[2.1.2]
Bug Fixes
Fixed Coverity issue.
Added base address and userData parameter for all callback functions.
[2.1.1]
Improvements
Added cache maintain operation.
Added timeout status check for the DATA transfer which ignore error.
Added feature macro for SDR50/SDR104 mode.
Removed useless IRQ handler from different platforms.
[2.1.0]
Improvements
Integrated tuning into transfer function.
Added strobe DLL feature.
Added enableAutoCommand23 in data structure.
Removed enable card clock function because the controller would handle the clock on/off.
[2.0.0]
Initial version.
UTICK
[2.0.5]
Improvements
Improved for SOC RW610.
[2.0.4]
Bug Fixes
Fixed compile fail issue of no-supporting PD configuration in utick driver.
[2.0.3]
Bug Fixes
Fixed violations of MISRA C-2012 rules: 8.4, 14.4, 17.7
[2.0.2]
Added new feature definition macro to enable/disable power control in drivers for some devices have no power control function.
[2.0.1]
Added control macro to enable/disable the CLOCK code in current driver.
[2.0.0]
Initial version.
WWDT
[2.1.9]
Bug Fixes
Fixed violation of the MISRA C-2012 rule 10.4.
[2.1.8]
Improvements
Updated the “WWDT_Init” API to add wait operation. Which can avoid the TV value read by CPU still be 0xFF (reset value) after WWDT_Init function returns.
[2.1.7]
Bug Fixes
Fixed the issue that the watchdog reset event affected the system from PMC.
Fixed the issue of setting watchdog WDPROTECT field without considering the backwards compatibility.
Fixed the issue of clearing bit fields by mistake in the function of WWDT_ClearStatusFlags.
[2.1.5]
Bug Fixes
deprecated a unusable API in WWWDT driver.
WWDT_Disable
[2.1.4]
Bug Fixes
Fixed violation of the MISRA C-2012 rules Rule 10.1, 10.3, 10.4 and 11.9.
Fixed the issue of the inseparable process interrupted by other interrupt source.
WWDT_Init
[2.1.3]
Bug Fixes
Fixed legacy issue when initializing the MOD register.
[2.1.2]
Improvements
Updated the “WWDT_ClearStatusFlags” API and “WWDT_GetStatusFlags” API to match QN9090. WDTOF is not set in case of WD reset. Get info from PMC instead.
[2.1.1]
New Features
Added new feature definition macro for devices which have no LCOK control bit in MOD register.
Implemented delay/retry in WWDT driver.
[2.1.0]
Improvements
Added new parameter in configuration when initializing WWDT module. This parameter, which must be set, allows the user to deliver the WWDT clock frequency.
[2.0.0]
Initial version.
XSPI
[2.5.1]
Improvements
Updated default value of sfpArbitrationLockTimeoutValue and ipAccessTimeoutValue to 0xFFFFFFFFUL.
Added #if defined(CACHE64_CTRL0_BASE) … #endif section to support some devices that do not support CACHE64.
[2.5.0]
Improvements
Updated XSPI_TransferBlocking() to support use case the transfersize bigger than page size.
Updated xspi_device_interface_type_t to support changes of page size for hyperram interface.
Updated XSPI_ReadBlocking() to fix an potential issue which cause TIMEOUT error.
[2.4.0]
New Features
Added functions of control cache64.
[2.3.0]
Improvements
Added new interface: XSPI_StartIpAccessNonBlocking();
Provied driver Irq handler for xspi driver;
Use ERRSTAT[ARB_WIN] to replace FSMSTAT[VLD].
[2.2.1]
Improvements
Moved some frequently used variables(s_tgSfarsRegOffset, s_tgIpcrsRegOffset, s_sfpTgIpcrRegOffset, s_sfpTgIpSfarRegOffset, s_tgMdadRegOffset) to common code to offload of stack.
Added return status in case of timeout flag asserted during IP read access.
Bug Fixes
Fixed violations of MISRA C-2012 rules.
[2.2.0]
Improvements
Improved xspi_device_config_t structure, removed some not-device related members.
Improved xspi_config_t structure, removed some device related settings.
Renamed XSPI_SetFlashConfig() to XSPI_SetDeviceConfig().
Decoupled settings of IP access, AHB access.
Added low-level interfaces to support IP access(including SFP), and AHB access(including performance monitor).
[2.1.0]
Bug Fixes
Fixed issue of XSPI_Init() function, set MCR[MDIS] to disable clocks before settings of MCR register.
Unused deviceConfig in XSPI_GetDefaultConfig() function.
Improvements
Updated structure for dllconfig, added method to allow user custom dll parameters.
Updated XSPI_UpdateDllValue() function to align with changes of dllconfig.
Move device specific value to device feature file.
[2.0.1]
Bug Fixes
Fixed the XSPI DLL function.
Added ALIGN and X16Mode macro definition in driver.
updated XSPI PSRAM example.
[2.0.0]
Initial version.
XSPI EDMA Driver
[2.0.2]
Bug Fixes
Fixed violations of MISRA C-2012 rules.
[2.0.1]
Improvements
Invoked new defined interface of xspi driver.
In callback function, disable RX/TX DMA.
[2.0.0]
Initial version.