MCUXpresso SDK Changelog
CACHE LMEM
[2.0.6]
Bug Fixes
Fixed doxygen issue.
[2.0.5]
Improvements
Updated the cache enable function, don’t enable again when it is already enabled.
[2.0.4]
Bug Fixes
Updated full name for lmem driver.
Fixed doxygen issue.
[2.0.3]
Bug Fixes
Fixed violation of MISRA C-2012 Rule 10.4 and 14.4.
[2.0.2]
Improvements
Moved CLCR register configuration out of the while loop, it’s unnecessary to repeat this operation.
[2.0.1]
Bug Fixes
Fixed the over-4KB-size maintenance issue in invalidate/clean/clean&invalidate by range APIs.
[2.0.0]
Initial version.
COMMON
[2.5.0]
New Features
Added new APIs InitCriticalSectionMeasurementContext, DisableGlobalIRQEx and EnableGlobalIRQEx so that user can measure the execution time of the protected sections.
[2.4.3]
Improvements
Enable irqs that mount under irqsteer interrupt extender.
[2.4.2]
Improvements
Add the macros to convert peripheral address to secure address or non-secure address.
[2.4.1]
Improvements
Improve for the macro redefinition error when integrated with zephyr.
[2.4.0]
New Features
Added EnableIRQWithPriority, IRQ_SetPriority, and IRQ_ClearPendingIRQ for ARM.
Added MSDK_EnableCpuCycleCounter, MSDK_GetCpuCycleCount for ARM.
[2.3.3]
New Features
Added NETC into status group.
[2.3.2]
Improvements
Make driver aarch64 compatible
[2.3.1]
Bug Fixes
Fixed MAKE_VERSION overflow on 16-bit platforms.
[2.3.0]
Improvements
Split the driver to common part and CPU architecture related part.
[2.2.10]
Bug Fixes
Fixed the ATOMIC macros build error in cpp files.
[2.2.9]
Bug Fixes
Fixed MISRA C-2012 issue, 5.6, 5.8, 8.4, 8.5, 8.6, 10.1, 10.4, 17.7, 21.3.
Fixed SDK_Malloc issue that not allocate memory with required size.
[2.2.8]
Improvements
Included stddef.h header file for MDK tool chain.
New Features:
Added atomic modification macros.
[2.2.7]
Other Change
Added MECC status group definition.
[2.2.6]
Other Change
Added more status group definition.
Bug Fixes
Undef __VECTOR_TABLE to avoid duplicate definition in cmsis_clang.h
[2.2.5]
Bug Fixes
Fixed MISRA C-2012 rule-15.5.
[2.2.4]
Bug Fixes
Fixed MISRA C-2012 rule-10.4.
[2.2.3]
New Features
Provided better accuracy of SDK_DelayAtLeastUs with DWT, use macro SDK_DELAY_USE_DWT to enable this feature.
Modified the Cortex-M7 delay count divisor based on latest tests on RT series boards, this setting lets result be closer to actual delay time.
[2.2.2]
New Features
Added include RTE_Components.h for CMSIS pack RTE.
[2.2.1]
Bug Fixes
Fixed violation of MISRA C-2012 Rule 3.1, 10.1, 10.3, 10.4, 11.6, 11.9.
[2.2.0]
New Features
Moved SDK_DelayAtLeastUs function from clock driver to common driver.
[2.1.4]
New Features
Added OTFAD into status group.
[2.1.3]
Bug Fixes
MISRA C-2012 issue fixed.
Fixed the rule: rule-10.3.
[2.1.2]
Improvements
Add SUPPRESS_FALL_THROUGH_WARNING() macro for the usage of suppressing fallthrough warning.
[2.1.1]
Bug Fixes
Deleted and optimized repeated macro.
[2.1.0]
New Features
Added IRQ operation for XCC toolchain.
Added group IDs for newly supported drivers.
[2.0.2]
Bug Fixes
MISRA C-2012 issue fixed.
Fixed the rule: rule-10.4.
[2.0.1]
Improvements
Removed the implementation of LPC8XX Enable/DisableDeepSleepIRQ() function.
Added new feature macro switch “FSL_FEATURE_HAS_NO_NONCACHEABLE_SECTION” for specific SoCs which have no noncacheable sections, that helps avoid an unnecessary complex in link file and the startup file.
Updated the align(x) to attribute(aligned(x)) to support MDK v6 armclang compiler.
[2.0.0]
Initial version.
ECSPI
[2.3.3]
Bug Fixes
Fixed the txData from void * to const void * in transmit API
[2.3.2]
Improvements
Changed ECSPI_DUMMYDATA to 0x00.
[2.3.1]
Bug Fixes
Fixed ECSPI_GetInstance potential issue that return wrong instance number.
[2.3.0]
Bug Fixes
Fixed burst length issue,the burst length range shall range from 1-4096 bits, so the width shall be uint8_t rather than uint16_t.
[2.2.0]
Bug Fixes
Removed the useless channel configuration of waveform, since the waveform can not be configured when not using the exchange bit(ECSPIx_CONREG[XCH]) for the transfer.
Fixed violations of MISRA C-2012 rules: 10.1, 11.9, 8.4.
[2.1.1]
Bug Fixes
Fixed violations of MISRA C-2012 rules: 10.1, 10.3, 10.4, 11.9, 14.4, 15.7, 17.7.
[2.1.0]
Improvements
Added timeout mechanism when waiting certain states in transfer driver.
[2.0.2]
Bug Fixes
Fixed violations of MISRA C-2012 rules: 10.1, 10.3, 10.4
[2.0.1]
Bug Fixes
Memset local variable SDMA transfer configuration structure to make sure unused members in structure are cleared.
Fixed sign-compare warning in ECSPI_SendTransfer.
[2.0.0]
Initial version.
ENET
[2.9.2]
Bug Fixes
RGMII mode is (temporarily) disabled before selecting between 10/100-Mbit/s and 1000-Mbit/s modes of operation. The bit RGMII_EN of RCR register must not be set while changing ECR register’s speed bit, otherwise there is a possibility of ENET IP ending in an incorrect state.
[2.9.1]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 8.4, 10.4.
[2.9.0]
Bug Fixes
Enabled collection of transfer statistics, so the function ENET_GetStatistics does not always return zeroes.
New Features
Added new function ENET_EnableStatistics to enable/disable collection of transfer statistics.
Added new function ENET_ResetStatistics to reset transfer statistics.
Improvements
Renamed the function ENET_ResetHareware to ENET_ResetHardware.
[2.8.0]
New Features
Added the function to reset hardware on certain devices.
[2.7.1]
Bug Fixes
Fixed the issue that free wrong buffer address when one frame stores in multiple buffers and memory pool is not enough to allocate these buffers to receive one complete frame.
[2.7.0]
Improvements
Deleted deprecated zero copy Tx/Rx functions and set callback function which can be configured in ENET_Init.
Moved the Rx zero copy buffer allocation to Rx BD initialization function to reduce unnecessary looping code.
Bug Fixes
Fixed the issue that predefined Rx buffers which should not be used when enabling Rx zero copy are still be handled by cache operation, it causes hardfault on some platforms.
Fixed the issue that zero-copy Rx function doesn’t check Rx length of 0 in the BD with EMPTY bit is 0, it may occur in the corner case reported by customer. Not sure how it turns out, consider it as an ENET IP issue and drop this abnormal BD.
[2.6.3]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 11.6.
[2.6.2]
Improvements
Changed ENET1_MAC0_Rx_Tx_Done0_DriverIRQHandler/ENET1_MAC0_Rx_Tx_Done1_DriverIRQHandler to ENET1_MAC0_Rx_Tx_Done1_DriverIRQHandler/ENET1_MAC0_Rx_Tx_Done2_DriverIRQHandler which represent ring 1 and ring 2.
[2.6.1]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 10.3, 10.4, 10.7, 11.6, 11.8.
[2.6.0]
Improvements
Added MDIO access wrapper APIs for ease of use.
Fixed the build warning introduced by 64-bit compatibility patch.
[2.5.4]
Improvements
Made the driver compatible with 64-bit platforms.
[2.5.3]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 11.6.
[2.5.2]
Improvements
Updated the TXIC/RXIC register handling code according to the new header file.
[2.5.1]
Bug Fixes
Fixed document typo.
[2.5.0]
Bug Fixes
Fixed the SendFrame/SendFrameZeroCopy functions issue with scattered buffers.
Updated the formula of MDC calculation.
Used a feature macro to distinguish the old IP design from the new design, because old IP design always reads a value zero from ATCR->CAPTURE bit. For old IP, driver caculates and wait the necessary delay cycles after setting ATCR->CAPTURE then gets the timestamp value.
New Features
Added new zero copy Tx/Rx function.
New zero copy Tx function combines scattered and contiguous Tx buffer in one API, it also supports more Tx featrues which buffer descriptor supports but previous Tx function doesn’t support.
New zero copy Rx function use dynamic buffer mechanism and simpler interface.
Improvements
Corrected the interrupt handler for PTP timestamp IRQ and PTP1588 event IRQ since platform difference.
Added missing IRQ handlers for PTP1588 events on some platforms.
Corrected the max Tx frame length verification, it will not depend on a fixed macro. The ENET_FRAME_MAX_FRAMELEN is only an default value for driver, application can configure it. Driver caculates the limitation with the max frame length in register which may takes extended 4 or 8 bytes VLAN tag if VLAN/SVLAN enables.
Deleted deprecated Clause 45 read/write legacy APIs.
[2.4.3]
Improvements
Aligned the IRQ handler name with header file.
[2.4.2]
Bug Fixes
Fixed the MISRA issue of speculative out-of-bounds access.
[2.4.1]
Bug Fixes
Fixed the PTP time capture issue.
[2.4.0]
Improvements
Exposed API ENET_ReclaimTxDescriptor for user application to relaim tx descriptors in their application.
Added counter to record multicast hash conflict in struct _enet_handle, improved the situation that one multicast group could be left by other conflict multicast address left operation.
Improved concurrent usage of relaim and send frame operation.
[2.3.4]
Bug Fixes
Fixed the issue that interrupt handler only checks the interrupt event flag but not checks interrupt mask flag.
[2.3.3]
Bug Fixes
Fixed the issue that some compilers may choose the memcpy with 4-bit aligned address limitation due to the type of address pointer is ‘unsigned int *’, the data address doesn’t have to be 4-bit aligned.
[2.3.2]
New Features
Added the feature that ENET driver can be used in the platform which integrates both 10/100M and 1G ENET IP.
Deleted duplicated code about ARM errata 838869 in first/second level IRQ handler.
[2.3.1]
Improvements
Added function pointer checking in IRQ handler to make sure code can be used even it runs into the interrupt when the second level interupt handler is NULL.
[2.3.0]
Bug Fixes
Fixed the issue that clause 45 MDIO read/write API doesn’t check the transmission over status between two transmissions.
Fixed violations of the MISRA C-2012 rules 2.2,10.3,10.4,10.7,11.6,11.8,13.5,14.4,15.7,17.7.
New Features
Added APIs to support send/receive frame with Zero-Copy.
Improvements
Separated the clock configuration from module configuration when init and deinit.
Added functions to set second level interrupt handler.
Provided new function to get 1588 timer count without disabling interrupt.
Improved timestamp controlling, deleted all old timestamp management APIs and data structures.
Merged the single/multiple ring(s) APIs, now these APIs can handle both.
Used base and index to control buffer descriptor, aligned with qos and lpc enet driver.
[2.2.6]
Bug Fixes
Updated MII speed formula referring to the manual.
[2.2.5]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 10.1, 10.3, 10.4, 10.6, 10.7, 11.6, 11.9, 13.5, 14.4, 16.4, 17.7, 21.15, 3.1, 8.4.
Changed to use ARRAY_SIZE(s_enetBases) as the array size for s_ENETHandle, fixed the hardfault issue for using some ENET instance when ARRAY_SIZE(s_enetBases) is not same as FSL_FEATURE_SOC_ENET_COUNT.
[2.2.4]
Improvements
Added call to Data Synchronization Barrier instruction before activating Tx/Rx buffer descriptor to ensure previous data update is completed.
Improved ENET_TransmitIRQHandler to store timestamps for multiple transmit buffer descriptors.
Bug Fixes
Fixed the issue that ENET_Ptp1588GetTimer did not handle the timer wrap situation.
[2.2.3]
Improvements
Improved data buffer cache maintenance in the ENET driver.
[2.2.2]
New Features
Added APIs for extended multi-ring support.
Added the AVB configure API for extended AVB feature support.
[2.2.1]
Improvements
Changed the input data pointer attribute to const in ENET_SendFrame().
[2.1.1]
New Features
Added the extended MDIO IEEE802.3 Clause 45 MDIO format SMI command APIs.
Added the extended interrupt coalescing feature.
Improvements
Combined all storage operations in the ENET_Init to ENET_SetHandler API.
[2.0.1]
Bug Fixes
Used direct transmit busy check when doing data transmit.
Miscellaneous Changes
Updated IRQ handler work flow.
Changed the TX/RX interrupt macro from kENET_RxByteInterrupt to kENET_RxBufferInterrupt, from kENET_TxByteInterrupt to kENET_TxBufferInterrupt.
Deleted unnecessary parameters in ENET handler.
[2.0.0]
Initial version.
GPC
[2.2.0]
Improvements
Optimized the exited APIs to support extended IRQs and slots.
Bug Fixes
Fixed the violations of MISRA C-2012 rules.
[2.1.0]
Improvements
Unified the register or bit fields’ name which contains specific cortex M core information.
Bug Fixes
Fixed Coverity Out-of-bounds issue.
[2.0.1]
Improvements
Added parameters to enable/disable the WFI and DSM mask.
[2.0.0]
Initial version.
GPIO
[2.0.6]
Bug Fixes
Fixed compile warning: ‘GPIO_GetInstance’ defined but not used when macro FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL is defined.
[2.0.5]
Bug Fixes
Fixed MISRA C-2012 issue: rule-17.7.
[2.0.4]
Improvements
Updated the GPIO_PinWrite to use atomic operation if possible.
Bug Fixes
Fixed GPIO_PortToggle bug with platforms don’t have register DR_TOGGLE.
[2.0.3]
Bug Fixes
MISRA C-2012 issue fixed.
Fixed rules, containing: rule-10.3, rule-14.4, and rule-15.5.
[2.0.2]
Bug Fixes
Fixed the bug of enabling wrong GPIO clock gate in initial API. Since some GPIO instances may not have a clock gate enabled, it checks the clock gate number and makes sure the clock gate is valid.
[2.0.1]
Improvements
API interface changes:
Refined naming of the API while keeping all original APIs, marking them as deprecated. Original APIs will be removed in next release. The main change is to update the API with prefix of _PinXXX() and _PortXXX().
[2.0.0]
Initial version.
GPT
[2.0.5]
Improvements
Support workaround for ERR003777. This workaround helps switching the clock sources.
[2.0.4]
Bug Fixes
Fixed compiler warning when built with FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL flag enabled.
[2.0.3]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 5.3 by customizing function parameter.
[2.0.2]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 17.7.
[2.0.1]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 10.1, 10.3, 10.4, 10.6, 10.8, 17.7.
[2.0.0]
Initial version.
I2C
[2.0.7]
Bug Fixes
Fixed MISRA issues.
Fixed rules 8.4, 8.5.
[2.0.6]
Bug Fixes
Fixed the bug that, in I2C_MasterStop after the stop command is issued, the IBB flag should be cleared rather than set.
Fixed the bug that to clear kI2C_ArbitrationLostFlag and kI2C_IntPendingFlag, their bits should be written ‘0’ rather than ‘1’.
[2.0.5]
Bug Fixes
Fixed Coverity issue of unchecked return value in I2C_RTOS_Transfer.
Fixed MISRA issues.
Fixed rules 10.1, 10.3, 10.4, 11.9, 14.4, 15.7, 16.4, 17.7.
Improvements
Updated the I2C_WAIT_TIMEOUT macro to unified name I2C_RETRY_TIMES.
[2.0.4]
Bug Fixes
Fixed the issue that I2C Master transfer APIs(blocking/non-blocking) did not support the situation that master transfer with subaddress and transfer data size being zero, which means no data followed by the subaddress.
[2.0.3]
Improvements
Improved code readability, added new static API I2C_WaitForStatusReady for the status flag wait, and changed to call I2C_WaitForStatusReady instead of polling flags with reading register.
[2.0.2]
Improvements
Added I2C_WATI_TIMEOUT macro to allow users to specify the timeout times for waiting flags in functional API and blocking transfer API.
[2.0.1]
Bug Fixes
Added a proper handle for transfer config flag kI2C_TransferNoStartFlag to support transmit with kI2C_TransferNoStartFlag flag. Only supports write only or write+read with no start flag; does not support read only with no start flag.
[2.0.0]
Initial version.
MCM
[2.2.0]
Improvements
Support platforms with less features.
[2.1.0]
Others
Remove byteID from mcm_lmem_fault_attribute_t for document update.
[2.0.0]
Initial version.
MU
[2.2.0]
New Features
Added API MU_GetRxStatusFlags.
[2.1.3]
Improvements
Release peripheral from reset if necessary in init function.
[2.1.2]
Bug Fixes
Fixed issue that MU_GetInstance() is defined but never used.
[2.1.1]
Bug Fixes
Fixed general interrupt comment typo.
[2.1.0]
Improvements
Added new enum mu_msg_reg_index_t.
[2.0.7]
Bug Fixes
Fixed MU_GetInterruptsPending bug that can not get general interrupt status.
[2.0.6]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 17.7.
[2.0.5]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 14.4, 15.5.
[2.0.4]
Improvements
Improved for the platforms which don’t support reset assert interrupt and get the other core power mode.
[2.0.3]
Bug fixes
MISRA C-2012 issue fixed.
Fixed rules, containing: rule-10.3, rule-14.4, rule-15.5.
[2.0.2]
Improvements
Added support for MIMX8MQx.
[2.0.1]
Improvements
Added support for MCIMX7Ux_M4.
[2.0.0]
Initial version.
PDM
[2.9.1]
Bug Fixes
Fixed the issue that the driver still enters the interrupt after disabling clock.
[2.9.0]
Improvements
Added feature FSL_FEATURE_PDM_HAS_DECIMATION_FILTER_BYPASS to config CTRL_2[DEC_BYPASS] field.
Modify code to make the OSR value is not limited to 16.
[2.8.1]
Improvements
Added feature FSL_FEATURE_PDM_HAS_NO_DOZEN to handle nonexistent CTRL_1[DOZEN] field.
[2.8.0]
Improvements
Added feature FSL_FEATURE_PDM_HAS_NO_HWVAD to remove the support of hadware voice activity detector.
Added feature FSL_FEATURE_PDM_HAS_NO_FILTER_BUFFER to remove the support of FIR_RDY bitfield in STAT register.
[2.7.4]
Bug Fixes
Fixed driver can not determine the specific float number of clock divider.
Fixed PDM_ValidateSrcClockRate calculates PDM channel in wrong method issue.
[2.7.3]
Improvements
Added feature FSL_FEATURE_PDM_HAS_NO_VADEF to remove the support of VADEF bitfield in VAD0_STAT register.
[2.7.2]
Improvements
Added feature FSL_FEATURE_PDM_HAS_NO_MINIMUM_CLKDIV to decide whether the minimum clock frequency division is required.
[2.7.1]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 8.4, 10.3, 10.1, 10.4, 14.4
[2.7.0]
Improvements
Added api PDM_EnableHwvadInterruptCallback to support handle hwvad IRQ in PDM driver.
Corrected the sample rate configuration for non high quality mode.
Added api PDM_SetChannelGain to support adjust the channel gain.
[2.6.0]
Improvements
Added new features FSL_FEATURE_PDM_HAS_STATUS_LOW_FREQ/FSL_FEATURE_PDM_HAS_DC_OUT_CTRL/FSL_FEATURE_PDM_DC_CTRL_VALUE_FIXED.
[2.5.0]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 8.4, 16.5, 10.4, 10.3, 10.1, 11.9, 17.7, 10.6, 14.4, 11.8, 11.6.
[2.4.1]
Bug Fixes
Fixed MDK 66-D warning in pdm driver.
[2.4.0]
Improvements
Added api PDM_TransferSetChannelConfig/PDM_ReadFifo to support read different width data.
Added feature FSL_FEATURE_PDM_HAS_RANGE_CTRL and api PDM_ClearRangeStatus/PDM_GetRangeStatus for range register.
Bug Fixes
Fixed violation of MISRA C-2012 Rule 14.4, 10.3, 10.4.
[2.3.0]
Improvements
Enabled envelope/energy voice detect mode by adding apis PDM_SetHwvadInEnvelopeBasedMode/PDM_SetHwvadInEnergyBasedMode.
Added feature FSL_FEATURE_PDM_CHANNEL_NUM for different SOC.
[2.2.1]
Bug Fixes
Fixed violation of MISRA C-2012 Rule 10.1, 10.3, 10.4, 10.6, 10.7, 11.3, 11.8, 14.4, 17.7, 18.4.
Added medium quality mode support in function PDM_SetSampleRateConfig.
[2.2.0]
Improvements
Added api PDM_SetSampleRateConfig to improve user experience and marked api PDM_SetSampleRate as deprecated.
[2.1.1]
Improvements
Used new SDMA API SDMA_SetDoneConfig instead of SDMA_EnableSwDone for PDM SDMA driver.
[2.1.0]
Improvements
Added software buffer queue for transactional API.
[2.0.1]
Improvements
Improved HWVAD feature.
[2.0.0]
Initial version.
PDM_SDMA
[2.7.0]
Improvements
Added new api PDM_TransferTerminateReceiveSDMA to reset all PDM SDMA internal state machine.
[2.6.0]
Bug Fixes
Fixed burst length overflow issue when using multi fifo.
Added alignment check between transfer size and the fifo width.
[2.5.0]
Refer PDM driver change log 2.1.0 to 2.3.1
PWM
[2.0.1]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 17.7.
[2.0.0]
Initial version.
RDC
[2.2.0]
New Features
Added APIs to get memory region or peripheral access policy for specific domain.
[2.1.1]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 10.6.
[2.1.0]
Improvements
Enhanced to support memory region larger than 32-bit address.
[2.0.2]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 10.3, 10.4, 11.3, 11.8, 17.7.
[2.0.1]
Bug Fixes:
Added __DSB after new configuration is set to ensure the new configuration takes effect.
[2.0.0]
Initial version.
RDC_SEMA42
[2.0.4]
Improvements
Changed to implement RDC_SEMAPHORE_Lock base on RDC_SEMAPHORE_TryLock.
[2.0.3]
Improvements:
Supported the RDC_SEMAPHORE_Type structure whose gate registers are defined as an array.
[2.0.2]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 10.3, 10.4, 10.8, 14.3, 14.4, 18.1.
[2.0.1]
Improvements:
Added support for the platforms that don’t have dedicated RDC_SEMA42 clock gate.
[2.0.0]
Initial version.
SAI
[2.4.4]
Bug Fixes
Fixed enumeration sai_fifo_combine_t - add RX configuration.
[2.4.3]
Bug Fixes
Fixed enumeration sai_fifo_combine_t value configuration issue.
[2.4.2]
Improvements
Release peripheral from reset if necessary in init function.
[2.4.1]
Bug Fixes
Fixed bitWidth incorrectly assigned issue.
[2.4.0]
Improvements
Removed deprecated APIs.
[2.3.8]
Bug Fixes
Fixed violations of MISRA C-2012 rule 10.4.
[2.3.7]
Improvements
Change feature “FSL_FEATURE_SAI_FIFO_COUNT” to “FSL_FEATURE_SAI_HAS_FIFO”.
Added feature “FSL_FEATURE_SAI_FIFO_COUNTn(x)” to align SAI fifo count function with IP in function
[2.3.6]
Bug Fixes
Fixed violations of MISRA C-2012 rule 5.6.
[2.3.5]
Improvements
Make driver to be aarch64 compatible.
[2.3.4]
Bug Fixes
Corrected the fifo combine feature macro used in driver.
[2.3.3]
Bug Fixes
Added bit clock polarity configuration when sai act as slave.
Fixed out of bound access coverity issue.
Fixed violations of MISRA C-2012 rule 10.3, 10.4.
[2.3.2]
Bug Fixes
Corrected the frame sync configuration when sai act as slave.
[2.3.1]
Bug Fixes
Corrected the peripheral name in function SAI0_DriverIRQHandler.
Fixed violations of MISRA C-2012 rule 17.7.
[2.3.0]
Bug Fixes
Fixed the build error caused by the SOC has no fifo feature.
[2.2.3]
Bug Fixes
Corrected the peripheral name in function SAI0_DriverIRQHandler.
[2.2.2]
Bug Fixes
Fixed the issue of MISRA 2004 rule 9.3.
Fixed sign-compare warning.
Fixed the PA082 build warning.
Fixed sign-compare warning.
Fixed violations of MISRA C-2012 rule 10.3,17.7,10.4,8.4,10.7,10.8,14.4,17.7,11.6,10.1,10.6,8.4,14.3,16.4,18.4.
Allow to reset Rx or Tx FIFO pointers only when Rx or Tx is disabled.
Improvements
Added 24bit raw audio data width support in sai sdma driver.
Disabled the interrupt/DMA request in the SAI_Init to avoid generates unexpected sai FIFO requests.
[2.2.1]
Improvements
Added mclk post divider support in function SAI_SetMasterClockDivider.
Removed useless configuration code in SAI_RxSetSerialDataConfig.
Bug Fixes
Fixed the SAI SDMA driver build issue caused by the wrong structure member name used in the function SAI_TransferRxSetConfigSDMA/SAI_TransferTxSetConfigSDMA.
Fixed BAD BIT SHIFT OPERATION issue caused by the FSL_FEATURE_SAI_CHANNEL_COUNTn.
Applied ERR05144: not set FCONT = 1 when TMR > 0, otherwise the TX may not work.
[2.2.0]
Improvements
Added new APIs for parameters collection and simplified user interfaces:
SAI_Init
SAI_SetMasterClockConfig
SAI_TxSetBitClockRate
SAI_TxSetSerialDataConfig
SAI_TxSetFrameSyncConfig
SAI_TxSetFifoConfig
SAI_TxSetBitclockConfig
SAI_TxSetConfig
SAI_TxSetTransferConfig
SAI_RxSetBitClockRate
SAI_RxSetSerialDataConfig
SAI_RxSetFrameSyncConfig
SAI_RxSetFifoConfig
SAI_RxSetBitclockConfig
SAI_RXSetConfig
SAI_RxSetTransferConfig
SAI_GetClassicI2SConfig
SAI_GetLeftJustifiedConfig
SAI_GetRightJustifiedConfig
SAI_GetTDMConfig
[2.1.9]
Improvements
Improved SAI driver comment for clock polarity.
Added enumeration for SAI for sample inputs on different edges.
Changed FSL_FEATURE_SAI_CHANNEL_COUNT to FSL_FEATURE_SAI_CHANNEL_COUNTn(base) for the difference between the different SAI instances.
Added new APIs:
SAI_TxSetBitClockDirection
SAI_RxSetBitClockDirection
SAI_RxSetFrameSyncDirection
SAI_TxSetFrameSyncDirection
[2.1.8]
Improvements
Added feature macro test for the sync mode2 and mode 3.
Added feature macro test for masterClockHz in sai_transfer_format_t.
[2.1.7]
Improvements
Added feature macro test for the mclkSource member in sai_config_t.
Changed “FSL_FEATURE_SAI5_SAI6_SHARE_IRQ” to “FSL_FEATURE_SAI_SAI5_SAI6_SHARE_IRQ”.
Added #ifndef #endif check for SAI_XFER_QUEUE_SIZE to allow redefinition.
Bug Fixes
Fixed build error caused by feature macro test for mclkSource.
[2.1.6]
Improvements
Added feature macro test for mclkSourceClockHz check.
Added bit clock source name for general devices.
Bug Fixes
Fixed incorrect channel numbers setting while calling RX/TX set format together.
[2.1.5]
Bug Fixes
Corrected SAI3 driver IRQ handler name.
Added I2S4/5/6 IRQ handler.
Added base in handler structure to support different instances sharing one IRQ number.
New Features
Updated SAI driver for MCR bit MICS.
Added 192 KHZ/384 KHZ in the sample rate enumeration.
Added multi FIFO interrupt/SDMA transfer support for TX/RX.
Added an API to read/write multi FIFO data in a blocking method.
Added bclk bypass support when bclk is same with mclk.
[2.1.4]
New Features
Added an API to enable/disable auto FIFO error recovery in platforms that support this feature.
Added an API to set data packing feature in platforms which support this feature.
[2.1.3]
New Features
Added feature to make I2S frame sync length configurable according to bitWidth.
[2.1.2]
Bug Fixes
Added 24-bit support for SAI eDMA transfer. All data shall be 32 bits for send/receive, as eDMA cannot directly handle 3-Byte transfer.
[2.1.1]
Improvements
Reduced code size while not using transactional API.
[2.1.0]
Improvements
API name changes:
SAI_GetSendRemainingBytes -> SAI_GetSentCount.
SAI_GetReceiveRemainingBytes -> SAI_GetReceivedCount.
All names of transactional APIs were added with “Transfer” prefix.
All transactional APIs use base and handle as input parameter.
Unified the parameter names.
Bug Fixes
Fixed WLC bug while reading TCSR/RCSR registers.
Fixed MOE enable flow issue. Moved MOE enable after MICS settings in SAI_TxInit/SAI_RxInit.
[2.0.0]
Initial version.
SAI_SDMA
[2.6.0]
Improvements
Removed deprecated API (SAI_TransferTxSetFormatSDMA,SAI_TransferRxSetFormatSDMA) and replaced them with new API (SAI_TransferRxSetConfigSDMA,SAI_TransferRxSetConfigSDMA)
[2.5.3]
Bug Fixes
Fixed the internal state of bd pool can not be reset in SAI_TransferTerminateSendSDMA.
[2.5.2]
Improvements
Change feature “FSL_FEATURE_SAI_FIFO_COUNT” to “FSL_FEATURE_SAI_HAS_FIFO”.
Added feature “FSL_FEATURE_SAI_FIFO_COUNTn(x)” to align SAI fifo count function with IP in function
[2.5.1]
Bug Fixes
Fixed the incorrect internal queue state after abort the transfer in callback.
[2.5.0]
Bug Fixes
Fixed the incorrect driver queue state after calling abort function.
Improvements
Added new api SAI_TransferTerminateSendSDMA/SAI_TransferTerminateReceiveSDMA.
[2.4.1]
Bug Fixes
Fixed the handler array s_sdmaPrivateHandle overflow issue.
[2.4.0]
Bug Fixes
Fixed burst length overflow issue when using multi fifo.
Added alignment check between transfer size and the fifo width.
Fixed violations of MISRA C-2012 rule 10.6.
[2.3.1]
Refer SAI driver change log 2.1.0 to 2.3.1
SDMA
[2.4.2]
Bug Fixes
Add global variable s_ramScriptLoaded to fix compatibility issues.
[2.4.1]
Bug Fixes
Fixed violations of MISRA C-2012 rule 10.4, 11.8.
[2.4.0]
Improvements
Added load ram script automatically according to the peripheral type.
Updated sdma ram script to version I.MX7D_4_6.
Added api SDMA_GetRamScriptVersion to support to SDMA ram script version.
Bug Fixes
Removed the SDMA_StartChannelEvents from SDMA_StartTransfer as sdma scheduler will handle it automatically
[2.3.6]
Bug Fixes
Cleared the SDMAARM_CONFIG_CSM initial value before write value 0 using OR.
[2.3.5]
Bug Fixes
Added transfer size validation to aovid overflow.
[2.3.4]
Bug Fixes
Fixed the violation of MISRA C-2012 rule 10.4.
[2.3.3]
Improvements
Improved sdma driver comments and parameters validation.
[2.3.2]
Bug Fixes
Fixed violations of MISRA C-2012 rule 10.6.
[2.3.1]
Improvements
Removed clear all channel interrupt status in SDMA_HandleIRQ to avoid the possibility of lossing interrupt.
[2.3.0]
Improvements
Added peripheral-to-peripheral support in SDMA driver.
Added 24bit data width support in sdma driver.
Bug Fixes
Fixed Coverity issue: left shift may overflow issue.
Fixed MISRA2004 issue: the operand of underlying type ‘unsigned char’ or ‘unsigned short’ caused the result cast to the underlying type.
Fixed violations of MISRA C-2012 rule 10.3, 11.9, 10.4, 17.7, 20.7, 14.4, 11.6, 12.2, 16.4.
[2.2.1]
Bug Fixes
Fixed MISRA 2004 issue in sdma driver.
[2.2.0]
Improvements
Added fsl_sdma_script.h to define the sdma script address and firmware.
Updated the format of generic register R7 to align with newest firmware.
[2.1.1]
Improvements
Added SDMA_SetDoneConfig to support hardware/software done configuration.
Marked SDMC_EnableSwDone as deprecated.
Bug Fixes
Fixed logical dead code issue in function SDMA_SetDoneConfig.
[2.1.0]
Improvements
Added SDMA_SetMultiFifoConfig API to support multi fifo feature.
Added SDMA_EnableSwDone API to support software done feature.
Added SDMA_LoadScript API to support load script to SDMA program memory.
Added SDMA_DumpScript API to support dump script from SDMA program memory.
Added SDMA3 IRQ handler.
[2.0.0]
Initial version.
SEMA4
[2.0.3]
Improvements
Changed to implement SEMA4_Lock base on SEMA4_TryLock.
[2.0.2]
Improvements:
Supported the SEMA4_Type structure whose gate registers are defined as an array.
[2.0.1]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 10.3, 10.4, 15.5, 18.1, 18.4.
[2.0.0]
Initial version.
TMU
[2.1.1]
Bug Fixes
Fixed violations of the MISRA C-2012 Rule 10.1, 10.4, 15.5.
[2.1.0]
Other Changes:
Removed the gain setting and reference voltage setting of amplifier.
[2.0.1]
Bug Fixes
Fixed missing right pair definition for extern C.
[2.0.0]
Initial version.
This module was first developed on i.MX 8MM.
UART
[2.3.2]
Improvements
Make driver aarch64 compatible
[2.3.1]
Improvements
Use separate data for TX and RX in uart_transfer_t.
Bug Fixes
Fixed bug that when ring buffer is used, if some data is received in ring buffer first before calling UART_TransferReceiveNonBlocking, the received data count returned by UART_TransferGetReceiveCount is wrong.
[2.3.0]
Bug Fixes
Fixed DMA transfer blocking issue by enabling tx idle interrupt after DMA transmission finishes.
[2.2.1]
Bug Fixes
Fixed MISRA 2012 rule 10.4 violation.
[2.2.0]
New Features
Modified uart_config_t, UART_Init and UART_GetDefaultConfig APIs so that the RTS and CTS used for hardware flow control can be enabled during module initialization.
Added API UART_SetRxRTSWatermark so that the water mark level of RTS deassertion can be configured.
[2.1.1]
Bug Fixes
Fixed MISRA 8.5 violation.
[2.1.0]
Improvements
Added timeout mechanism when waiting for certain states in transfer driver.
[2.0.2]
Improvements
Added check for transmission complete in UART_WriteBlocking, UART_TransferHandleIRQ and UART_SendSDMACallback to ensure all the data would be sent out to bus.
Modified UART_ReadBlocking so that if more than one receiver errors occur, all status flags will be cleared and the most severe error status will be returned.
Bug Fixes
Fixed MISRA issues.
Fixed rules 10.1, 10.3, 10.4, 10.6, 10.7, 10.8, 11.9, 14.4.
[2.0.1]
Bug Fixes
Memset local variable SDMA transfer configuration structure to make sure unused members in structure are cleared.
[2.0.0]
Initial version.
UART_SDMA
[2.3.0]
Refer UART driver change log 2.0.0 to 2.1.1, 2.3.0.
WDOG
[2.2.0]
Bug Fixes
Fixed the wrong behavior of workMode.enableWait, workMode.enableStop, workMode.enableDebug in configuration structure wdog_config_t. When set the items to true, WDOG will continues working in those modes.
[2.1.1]
Bug Fixes
MISRA C-2012 issue fixed: rule 10.1, 10.3, 10.4, 10.6, 10.7 and 11.9.
Fixed the issue of the inseparable process interrupted by other interrupt source.
WDOG_Init
WDOG_Refresh
[2.1.0]
New Features
Added new API “WDOG_TriggerSystemSoftwareReset()” to allow users to reset the system by software.
Added new API “WDOG_TriggerSoftwareSignal()” to allow users to trigger a WDOG_B signal by software.
Removed the parameter “softwareAssertion” and “softwareResetSignal” out of the wdog_config_t structure.
Added new parameter “enableTimeOutAssert” to the wdog_config_t structure. With this parameter enabled, when the WDOG timeout occurs, a WDOG_B signal will be asserted. This signal can be routed to external pin of the chip. Note that WDOG_B signal remains asserted until a power-on reset (POR) occurs.
[2.0.1]
New Features
Added control macro to enable/disable the CLOCK code in current driver.
[2.0.0]
Initial version.