MCXE247

ACMP: Analog Comparator Driver

void ACMP_Init(CMP_Type *base, const acmp_config_t *config)

Initializes the ACMP.

The default configuration can be got by calling ACMP_GetDefaultConfig().

Parameters:

base – ACMP peripheral base address.
config – Pointer to ACMP configuration structure.

void ACMP_Deinit(CMP_Type *base)

Deinitializes the ACMP.

Parameters:

base – ACMP peripheral base address.

void ACMP_GetDefaultConfig(acmp_config_t *config)

Gets the default configuration for ACMP.

This function initializes the user configuration structure to default value. The default value are:

Example:

config->enableHighSpeed = false;
config->enableInvertOutput = false;
config->useUnfilteredOutput = false;
config->enablePinOut = false;
config->enableHysteresisBothDirections = false;
config->hysteresisMode = kACMP_hysteresisMode0;

Parameters:

config – Pointer to ACMP configuration structure.

void ACMP_Enable(CMP_Type *base, bool enable)

Enables or disables the ACMP.

Parameters:

base – ACMP peripheral base address.
enable – True to enable the ACMP.

void ACMP_EnableLinkToDAC(CMP_Type *base, bool enable)

Enables the link from CMP to DAC enable.

When this bit is set, the DAC enable/disable is controlled by the bit CMP_C0[EN] instead of CMP_C1[DACEN].

Parameters:

base – ACMP peripheral base address.
enable – Enable the feature or not.

void ACMP_SetChannelConfig(CMP_Type *base, const acmp_channel_config_t *config)

Sets the channel configuration.

Note that the plus/minus mux’s setting is only valid when the positive/negative port’s input isn’t from DAC but from channel mux.

Example:

acmp_channel_config_t configStruct = {0};
configStruct.positivePortInput = kACMP_PortInputFromDAC;
configStruct.negativePortInput = kACMP_PortInputFromMux;
configStruct.minusMuxInput = 1U;
ACMP_SetChannelConfig(CMP0, &configStruct);

Parameters:

base – ACMP peripheral base address.
config – Pointer to channel configuration structure.

void ACMP_EnableDMA(CMP_Type *base, bool enable)

Enables or disables DMA.

Parameters:

base – ACMP peripheral base address.
enable – True to enable DMA.

void ACMP_SetFilterConfig(CMP_Type *base, const acmp_filter_config_t *config)

Configures the filter.

The filter can be enabled when the filter count is bigger than 1, the filter period is greater than 0 and the sample clock is from divided bus clock or the filter is bigger than 1 and the sample clock is from external clock. Detailed usage can be got from the reference manual.

Example:

acmp_filter_config_t configStruct = {0};
configStruct.filterCount = 5U;
configStruct.filterPeriod = 200U;
configStruct.enableSample = false;
ACMP_SetFilterConfig(CMP0, &configStruct);

Parameters:

base – ACMP peripheral base address.
config – Pointer to filter configuration structure.

void ACMP_SetDACConfig(CMP_Type *base, const acmp_dac_config_t *config)

Configures the internal DAC.

Example:

acmp_dac_config_t configStruct = {0};
configStruct.referenceVoltageSource = kACMP_VrefSourceVin1;
configStruct.DACValue = 20U;
configStruct.enableOutput = false;
configStruct.workMode = kACMP_DACWorkLowSpeedMode;
ACMP_SetDACConfig(CMP0, &configStruct);

Parameters:

base – ACMP peripheral base address.
config – Pointer to DAC configuration structure. “NULL” is for disabling the feature.

void ACMP_EnableInterrupts(CMP_Type *base, uint32_t mask)

Enables interrupts.

Parameters:

base – ACMP peripheral base address.
mask – Interrupts mask. See “_acmp_interrupt_enable”.

void ACMP_DisableInterrupts(CMP_Type *base, uint32_t mask)

Disables interrupts.

Parameters:

base – ACMP peripheral base address.
mask – Interrupts mask. See “_acmp_interrupt_enable”.

uint32_t ACMP_GetStatusFlags(CMP_Type *base)

Gets status flags.

Parameters:

base – ACMP peripheral base address.

Returns:

Status flags asserted mask. See “_acmp_status_flags”.

void ACMP_ClearStatusFlags(CMP_Type *base, uint32_t mask)

Clears status flags.

Parameters:

base – ACMP peripheral base address.
mask – Status flags mask. See “_acmp_status_flags”.

void ACMP_SetDiscreteModeConfig(CMP_Type *base, const acmp_discrete_mode_config_t *config)

Configure the discrete mode.

Configure the discrete mode when supporting 3V domain with 1.8V core.

Parameters:

base – ACMP peripheral base address.
config – Pointer to configuration structure. See “acmp_discrete_mode_config_t”.

void ACMP_GetDefaultDiscreteModeConfig(acmp_discrete_mode_config_t *config)

Get the default configuration for discrete mode setting.

Parameters:

config – Pointer to configuration structure to be restored with the setting values.

FSL_ACMP_DRIVER_VERSION: ACMP driver version 2.3.0.

enum _acmp_interrupt_enable

Interrupt enable/disable mask.

Values:

enumerator kACMP_OutputRisingInterruptEnable: Enable the interrupt when comparator outputs rising.

enumerator kACMP_OutputFallingInterruptEnable: Enable the interrupt when comparator outputs falling.

enum _acmp_status_flags

Status flag mask.

Values:

enumerator kACMP_OutputRisingEventFlag: Rising-edge on compare output has occurred.

enumerator kACMP_OutputFallingEventFlag: Falling-edge on compare output has occurred.

enumerator kACMP_OutputAssertEventFlag: Return the current value of the analog comparator output.

enum _acmp_offset_mode

Comparator hard block offset control.

If OFFSET level is 1, then there is no hysteresis in the case of positive port input crossing negative port input in the positive direction (or negative port input crossing positive port input in the negative direction). Hysteresis still exists for positive port input crossing negative port input in the falling direction. If OFFSET level is 0, then the hysteresis selected by acmp_hysteresis_mode_t is valid for both directions.

Values:

enumerator kACMP_OffsetLevel0: The comparator hard block output has level 0 offset internally.

enumerator kACMP_OffsetLevel1: The comparator hard block output has level 1 offset internally.

enum _acmp_hysteresis_mode

Comparator hard block hysteresis control.

See chip data sheet to get the actual hysteresis value with each level.

Values:

enumerator kACMP_HysteresisLevel0: Offset is level 0 and Hysteresis is level 0.

enumerator kACMP_HysteresisLevel1: Offset is level 0 and Hysteresis is level 1.

enumerator kACMP_HysteresisLevel2: Offset is level 0 and Hysteresis is level 2.

enumerator kACMP_HysteresisLevel3: Offset is level 0 and Hysteresis is level 3.

enum _acmp_reference_voltage_source

CMP Voltage Reference source.

Values:

enumerator kACMP_VrefSourceVin1: Vin1 is selected as resistor ladder network supply reference Vin.

enumerator kACMP_VrefSourceVin2: Vin2 is selected as resistor ladder network supply reference Vin.

enum _acmp_port_input

Port input source.

Values:

enumerator kACMP_PortInputFromDAC: Port input from the 8-bit DAC output.

enumerator kACMP_PortInputFromMux: Port input from the analog 8-1 mux.

enum _acmp_dac_work_mode

Internal DAC’s work mode.

Values:

enumerator kACMP_DACWorkLowSpeedMode: DAC is selected to work in low speed and low power mode.

enumerator kACMP_DACWorkHighSpeedMode: DAC is selected to work in high speed high power mode.

typedef enum _acmp_offset_mode acmp_offset_mode_t

Comparator hard block offset control.

If OFFSET level is 1, then there is no hysteresis in the case of positive port input crossing negative port input in the positive direction (or negative port input crossing positive port input in the negative direction). Hysteresis still exists for positive port input crossing negative port input in the falling direction. If OFFSET level is 0, then the hysteresis selected by acmp_hysteresis_mode_t is valid for both directions.

typedef enum _acmp_hysteresis_mode acmp_hysteresis_mode_t

Comparator hard block hysteresis control.

See chip data sheet to get the actual hysteresis value with each level.

typedef enum _acmp_reference_voltage_source acmp_reference_voltage_source_t: CMP Voltage Reference source.

typedef enum _acmp_port_input acmp_port_input_t: Port input source.

typedef enum _acmp_dac_work_mode acmp_dac_work_mode_t: Internal DAC’s work mode.

typedef struct _acmp_config acmp_config_t: Configuration for ACMP.

typedef struct _acmp_channel_config acmp_channel_config_t

Configuration for channel.

The comparator’s port can be input from channel mux or DAC. If port input is from channel mux, detailed channel number for the mux should be configured.

typedef struct _acmp_filter_config acmp_filter_config_t: Configuration for filter.

typedef struct _acmp_dac_config acmp_dac_config_t: Configuration for DAC.

typedef struct _acmp_discrete_mode_config acmp_discrete_mode_config_t: Configuration for discrete mode.

CMP_C0_CFx_MASK: The mask of status flags cleared by writing 1.

struct _acmp_config

#include <fsl_acmp.h>

Configuration for ACMP.

Public Members

acmp_offset_mode_t offsetMode: Offset mode.

acmp_hysteresis_mode_t hysteresisMode: Hysteresis mode.

bool enableHighSpeed: Enable High Speed (HS) comparison mode.

bool enableInvertOutput: Enable inverted comparator output.

bool useUnfilteredOutput: Set compare output(COUT) to equal COUTA(true) or COUT(false).

bool enablePinOut: The comparator output is available on the associated pin.

struct _acmp_channel_config

#include <fsl_acmp.h>

Configuration for channel.

The comparator’s port can be input from channel mux or DAC. If port input is from channel mux, detailed channel number for the mux should be configured.

Public Members

acmp_port_input_t positivePortInput: Input source of the comparator’s positive port.

uint32_t plusMuxInput: Plus mux input channel(0~7).

acmp_port_input_t negativePortInput: Input source of the comparator’s negative port.

uint32_t minusMuxInput: Minus mux input channel(0~7).

struct _acmp_filter_config

#include <fsl_acmp.h>

Configuration for filter.

Public Members

uint32_t filterCount: Filter Sample Count. Available range is 1-7, 0 would cause the filter disabled.

uint32_t filterPeriod: Filter Sample Period. The divider to bus clock. Available range is 0-255.

struct _acmp_dac_config

#include <fsl_acmp.h>

Configuration for DAC.

Public Members

acmp_reference_voltage_source_t referenceVoltageSource: Supply voltage reference source.

uint32_t DACValue: Value for DAC Output Voltage. Available range is 0-255.

bool enableOutput: Enable the DAC output.

struct _acmp_discrete_mode_config

#include <fsl_acmp.h>

Configuration for discrete mode.

Public Members

bool enablePositiveChannelDiscreteMode: Positive Channel Continuous Mode Enable. By default, the continuous mode is used.

bool enableNegativeChannelDiscreteMode: Negative Channel Continuous Mode Enable. By default, the continuous mode is used.

ADC12: Analog-to-Digital Converter

void ADC12_Init(ADC_Type *base, const adc12_config_t *config)

Initialize the ADC12 module.

Parameters:

base – ADC12 peripheral base address.
config – Pointer to “adc12_config_t” structure.

void ADC12_Deinit(ADC_Type *base)

De-initialize the ADC12 module.

Parameters:

base – ADC12 peripheral base address.

void ADC12_GetDefaultConfig(adc12_config_t *config)

Gets an available pre-defined settings for converter’s configuration.

This function initializes the converter configuration structure with an available settings. The default values are:

Example:

config->referenceVoltageSource = kADC12_ReferenceVoltageSourceVref;
config->clockSource = kADC12_ClockSourceAlt0;
config->clockDivider = kADC12_ClockDivider1;
config->resolution = kADC12_Resolution8Bit;
config->sampleClockCount = 12U;
config->enableContinuousConversion = false;

Parameters:

config – Pointer to “adc12_config_t” structure.

void ADC12_SetChannelConfig(ADC_Type *base, uint32_t channelGroup, const adc12_channel_config_t *config)

Configure the conversion channel.

This operation triggers the conversion in software trigger mode. In hardware trigger mode, this API configures the channel while the external trigger source helps to trigger the conversion.

Note that the “Channel Group” has a detailed description. To allow sequential conversions of the ADC to be triggered by internal peripherals, the ADC can have more than one group of status and control register, one for each conversion. The channel group parameter indicates which group of registers are used, channel group 0 is for Group A registers and channel group 1 is for Group B registers. The channel groups are used in a “ping-pong” approach to control the ADC operation. At any time, only one of the channel groups is actively controlling ADC conversions. Channel group 0 is used for both software and hardware trigger modes of operation. Channel groups 1 and greater indicate potentially multiple channel group registers for use only in hardware trigger mode. See the chip configuration information in the MCU reference manual about the number of SC1n registers (channel groups) specific to this device. None of the channel groups 1 or greater are used for software trigger operation and therefore writes to these channel groups do not initiate a new conversion. Updating channel group 0 while a different channel group is actively controlling a conversion is allowed and vice versa. Writing any of the channel group registers while that specific channel group is actively controlling a conversion aborts the current conversion.

Parameters:

base – ADC12 peripheral base address.
channelGroup – Channel group index.
config – Pointer to “adc12_channel_config_t” structure.

static inline uint32_t ADC12_GetChannelConversionValue(ADC_Type *base, uint32_t channelGroup)

Get the conversion value.

Parameters:

base – ADC12 peripheral base address.
channelGroup – Channel group index.

Returns:

Conversion value.

uint32_t ADC12_GetChannelStatusFlags(ADC_Type *base, uint32_t channelGroup)

Get the status flags of channel.

Parameters:

base – ADC12 peripheral base address.
channelGroup – Channel group index.

Returns:

Flags’ mask if indicated flags are asserted. See to “_adc12_channel_status_flags”.

status_t ADC12_DoAutoCalibration(ADC_Type *base)

Automate the hardware calibration.

This auto calibration helps to adjust the gain automatically according to the converter’s working environment. Execute the calibration before conversion. Note that the software trigger should be used during calibration.

Parameters:

base – ADC12 peripheral base address.

Return values:

kStatus_Success – Calibration is done successfully.
kStatus_Fail – Calibration is failed.

static inline void ADC12_SetOffsetValue(ADC_Type *base, uint32_t value)

Set the offset value for the conversion result.

This offset value takes effect on the conversion result. If the offset value is not zero, the conversion result is substracted by it.

Parameters:

base – ADC12 peripheral base address.
value – Offset value.

static inline void ADC12_SetGainValue(ADC_Type *base, uint32_t value)

Set the gain value for the conversion result.

This gain value takes effect on the conversion result. If the gain value is not zero, the conversion result is amplified as it.

Parameters:

base – ADC12 peripheral base address.
value – Gain value.

static inline void ADC12_EnableDMA(ADC_Type *base, bool enable)

Enable generating the DMA trigger when conversion is completed.

Parameters:

base – ADC12 peripheral base address.
enable – Switcher of DMA feature. “true” means to enable, “false” means to disable.

static inline void ADC12_EnableHardwareTrigger(ADC_Type *base, bool enable)

Enable of disable the hardware trigger mode.

Parameters:

base – ADC12 peripheral base address.
enable – Switcher of hardware trigger feature. “true” means to enable, “false” means not.

void ADC12_SetHardwareCompareConfig(ADC_Type *base, const adc12_hardware_compare_config_t *config)

Configure the hardware compare mode.

The hardware compare mode provides a way to process the conversion result automatically by hardware. Only the result in compare range is available. To compare the range, see “adc12_hardware_compare_mode_t”, or the reference manual document for more detailed information.

Parameters:

base – ADC12 peripheral base address.
config – Pointer to “adc12_hardware_compare_config_t” structure. Pass “NULL” to disable the feature.

void ADC12_SetHardwareAverage(ADC_Type *base, adc12_hardware_average_mode_t mode)

Set the hardware average mode.

Hardware average mode provides a way to process the conversion result automatically by hardware. The multiple conversion results are accumulated and averaged internally. This aids to get more accurate conversion result.

Parameters:

base – ADC12 peripheral base address.
mode – Setting hardware average mode. See to “adc12_hardware_average_mode_t”.

uint32_t ADC12_GetStatusFlags(ADC_Type *base)

Get the status flags of the converter.

Parameters:

base – ADC12 peripheral base address.

Returns:

Flags’ mask if indicated flags are asserted. See to “_adc12_status_flags”.

enum _adc12_channel_status_flags

Channel status flags’ mask.

Values:

enumerator kADC12_ChannelConversionCompletedFlag: Conversion done.

enum _adc12_status_flags

Converter status flags’ mask.

Values:

enumerator kADC12_ActiveFlag: Converter is active.

enumerator kADC12_CalibrationFailedFlag: Calibration is failed.

enum _adc12_clock_divider

Clock divider for the converter.

Values:

enumerator kADC12_ClockDivider1: For divider 1 from the input clock to the module.

enumerator kADC12_ClockDivider2: For divider 2 from the input clock to the module.

enumerator kADC12_ClockDivider4: For divider 4 from the input clock to the module.

enumerator kADC12_ClockDivider8: For divider 8 from the input clock to the module.

enum _adc12_resolution

Converter’s resolution.

Values:

enumerator kADC12_Resolution8Bit: 8 bit resolution.

enumerator kADC12_Resolution12Bit: 12 bit resolution.

enumerator kADC12_Resolution10Bit: 10 bit resolution.

enum _adc12_clock_source

Conversion clock source.

Values:

enumerator kADC12_ClockSourceAlt0: Alternate clock 1 (ADC_ALTCLK1).

enumerator kADC12_ClockSourceAlt1: Alternate clock 2 (ADC_ALTCLK2).

enumerator kADC12_ClockSourceAlt2: Alternate clock 3 (ADC_ALTCLK3).

enumerator kADC12_ClockSourceAlt3: Alternate clock 4 (ADC_ALTCLK4).

enum _adc12_reference_voltage_source

Reference voltage source.

Values:

enumerator kADC12_ReferenceVoltageSourceVref: For external pins pair of VrefH and VrefL.

enumerator kADC12_ReferenceVoltageSourceValt: For alternate reference pair of ValtH and ValtL.

enum _adc12_hardware_average_mode

Hardware average mode.

Values:

enumerator kADC12_HardwareAverageCount4: For hardware average with 4 samples.

enumerator kADC12_HardwareAverageCount8: For hardware average with 8 samples.

enumerator kADC12_HardwareAverageCount16: For hardware average with 16 samples.

enumerator kADC12_HardwareAverageCount32: For hardware average with 32 samples.

enumerator kADC12_HardwareAverageDisabled: Disable the hardware average feature.

enum _adc12_hardware_compare_mode

Hardware compare mode.

Values:

enumerator kADC12_HardwareCompareMode0: x < value1.

enumerator kADC12_HardwareCompareMode1: x > value1.

enumerator kADC12_HardwareCompareMode2: if value1 <= value2, then x < value1 || x > value2; else, value1 > x > value2.

enumerator kADC12_HardwareCompareMode3: if value1 <= value2, then value1 <= x <= value2; else x >= value1 || x <= value2.

typedef enum _adc12_clock_divider adc12_clock_divider_t: Clock divider for the converter.

typedef enum _adc12_resolution adc12_resolution_t: Converter’s resolution.

typedef enum _adc12_clock_source adc12_clock_source_t: Conversion clock source.

typedef enum _adc12_reference_voltage_source adc12_reference_voltage_source_t: Reference voltage source.

typedef enum _adc12_hardware_average_mode adc12_hardware_average_mode_t: Hardware average mode.

typedef enum _adc12_hardware_compare_mode adc12_hardware_compare_mode_t: Hardware compare mode.

typedef struct _adc12_config adc12_config_t: Converter configuration.

typedef struct _adc12_hardware_compare_config adc12_hardware_compare_config_t: Hardware compare configuration.

typedef struct _adc12_channel_config adc12_channel_config_t: Channel conversion configuration.

FSL_ADC12_DRIVER_VERSION: ADC12 driver version.

struct _adc12_config

#include <fsl_adc12.h>

Converter configuration.

Public Members

adc12_reference_voltage_source_t referenceVoltageSource: Select the reference voltage source.

adc12_clock_source_t clockSource: Select the input clock source to converter.

adc12_clock_divider_t clockDivider: Select the divider of input clock source.

adc12_resolution_t resolution: Select the sample resolution mode.

uint32_t sampleClockCount: Select the sample clock count. Add its value may improve the stability of the conversion result.

bool enableContinuousConversion: Enable continuous conversion mode.

struct _adc12_hardware_compare_config

#include <fsl_adc12.h>

Hardware compare configuration.

Public Members

adc12_hardware_compare_mode_t hardwareCompareMode: Select the hardware compare mode.

int16_t value1: Setting value1 for hardware compare mode.

int16_t value2: Setting value2 for hardware compare mode.

struct _adc12_channel_config

#include <fsl_adc12.h>

Channel conversion configuration.

Public Members

uint32_t channelNumber: Setting the conversion channel number. The available range is 0-31. See channel connection information for each chip in Reference Manual document.

bool enableInterruptOnConversionCompleted: Generate a interrupt request once the conversion is completed.

CACHE: LMEM CACHE Memory Controller

void L1CACHE_EnableCodeCache(void): Enables the processor code bus cache.

void L1CACHE_DisableCodeCache(void): Disables the processor code bus cache.

void L1CACHE_InvalidateCodeCache(void): Invalidates the processor code bus cache.

void L1CACHE_InvalidateCodeCacheByRange(uint32_t address, uint32_t size_byte)

Invalidates processor code bus cache by range.

Note

Address and size should be aligned to “L1CODCACHE_LINESIZE_BYTE”. The startAddr here will be forced to align to L1CODEBUSCACHE_LINESIZE_BYTE if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address of cache.
size_byte – size of the memory to be invalidated.

void L1CACHE_CleanCodeCache(void): Cleans the processor code bus cache.

void L1CACHE_CleanCodeCacheByRange(uint32_t address, uint32_t size_byte)

Cleans processor code bus cache by range.

Note

Address and size should be aligned to “L1CODEBUSCACHE_LINESIZE_BYTE”. The startAddr here will be forced to align to L1CODEBUSCACHE_LINESIZE_BYTE if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address of cache.
size_byte – size of the memory to be cleaned.

void L1CACHE_CleanInvalidateCodeCache(void): Cleans and invalidates the processor code bus cache.

void L1CACHE_CleanInvalidateCodeCacheByRange(uint32_t address, uint32_t size_byte)

Cleans and invalidate processor code bus cache by range.

Note

Address and size should be aligned to “L1CODEBUSCACHE_LINESIZE_BYTE”. The startAddr here will be forced to align to L1CODEBUSCACHE_LINESIZE_BYTE if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address of cache.
size_byte – size of the memory to be Cleaned and Invalidated.

static inline void L1CACHE_EnableCodeCacheWriteBuffer(bool enable)

Enables/disables the processor code bus write buffer.

Parameters:

enable – The enable or disable flag. true - enable the code bus write buffer. false - disable the code bus write buffer.

void L1CACHE_EnableSystemCache(void): Enables the processor system bus cache.

void L1CACHE_DisableSystemCache(void): Disables the processor system bus cache.

void L1CACHE_InvalidateSystemCache(void): Invalidates the processor system bus cache.

void L1CACHE_InvalidateSystemCacheByRange(uint32_t address, uint32_t size_byte)

Invalidates processor system bus cache by range.

Note

Address and size should be aligned to “L1SYSTEMBUSCACHE_LINESIZE_BYTE”. The startAddr here will be forced to align to L1SYSTEMBUSCACHE_LINESIZE_BYTE if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address of cache.
size_byte – size of the memory to be invalidated.

void L1CACHE_CleanSystemCache(void): Cleans the processor system bus cache.

void L1CACHE_CleanSystemCacheByRange(uint32_t address, uint32_t size_byte)

Cleans processor system bus cache by range.

Note

Address and size should be aligned to “L1SYSTEMBUSCACHE_LINESIZE_BYTE”. The startAddr here will be forced to align to L1SYSTEMBUSCACHE_LINESIZE_BYTE if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address of cache.
size_byte – size of the memory to be cleaned.

void L1CACHE_CleanInvalidateSystemCache(void): Cleans and invalidates the processor system bus cache.

void L1CACHE_CleanInvalidateSystemCacheByRange(uint32_t address, uint32_t size_byte)

Cleans and Invalidates processor system bus cache by range.

Note

Address and size should be aligned to “L1SYSTEMBUSCACHE_LINESIZE_BYTE”. The startAddr here will be forced to align to L1SYSTEMBUSCACHE_LINESIZE_BYTE if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address of cache.
size_byte – size of the memory to be Clean and Invalidated.

static inline void L1CACHE_EnableSystemCacheWriteBuffer(bool enable)

Enables/disables the processor system bus write buffer.

Parameters:

enable – The enable or disable flag. true - enable the code bus write buffer. false - disable the code bus write buffer.

void L1CACHE_InvalidateICacheByRange(uint32_t address, uint32_t size_byte)

Invalidates cortex-m4 L1 instrument cache by range.

Note

The start address and size_byte should be 16-Byte(FSL_FEATURE_L1ICACHE_LINESIZE_BYTE) aligned.

Parameters:

address – The start address of the memory to be invalidated.
size_byte – The memory size.

static inline void L1CACHE_InvalidateDCacheByRange(uint32_t address, uint32_t size_byte)

Invalidates cortex-m4 L1 data cache by range.

Note

The start address and size_byte should be 16-Byte(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE) aligned.

Parameters:

address – The start address of the memory to be invalidated.
size_byte – The memory size.

void L1CACHE_CleanDCacheByRange(uint32_t address, uint32_t size_byte)

Cleans cortex-m4 L1 data cache by range.

Note

The start address and size_byte should be 16-Byte(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE) aligned.

Parameters:

address – The start address of the memory to be cleaned.
size_byte – The memory size.

void L1CACHE_CleanInvalidateDCacheByRange(uint32_t address, uint32_t size_byte)

Cleans and Invalidates cortex-m4 L1 data cache by range.

Note

The start address and size_byte should be 16-Byte(FSL_FEATURE_L1DCACHE_LINESIZE_BYTE) aligned.

Parameters:

address – The start address of the memory to be clean and invalidated.
size_byte – The memory size.

static inline void ICACHE_InvalidateByRange(uint32_t address, uint32_t size_byte)

Invalidates instruction cache by range.

Note

Address and size should be aligned to 16-Byte due to the cache operation unit FSL_FEATURE_L1ICACHE_LINESIZE_BYTE. The startAddr here will be forced to align to the cache line size if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address.
size_byte – size of the memory to be invalidated.

static inline void DCACHE_InvalidateByRange(uint32_t address, uint32_t size_byte)

Invalidates data cache by range.

Note

Address and size should be aligned to 16-Byte due to the cache operation unit FSL_FEATURE_L1DCACHE_LINESIZE_BYTE. The startAddr here will be forced to align to the cache line size if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address.
size_byte – size of the memory to be invalidated.

static inline void DCACHE_CleanByRange(uint32_t address, uint32_t size_byte)

Clean data cache by range.

Note

Address and size should be aligned to 16-Byte due to the cache operation unit FSL_FEATURE_L1DCACHE_LINESIZE_BYTE. The startAddr here will be forced to align to the cache line size if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address.
size_byte – size of the memory to be cleaned.

static inline void DCACHE_CleanInvalidateByRange(uint32_t address, uint32_t size_byte)

Cleans and Invalidates data cache by range.

Note

Address and size should be aligned to 16-Byte due to the cache operation unit FSL_FEATURE_L1DCACHE_LINESIZE_BYTE. The startAddr here will be forced to align to the cache line size if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address.
size_byte – size of the memory to be Cleaned and Invalidated.

FSL_CACHE_DRIVER_VERSION: cache driver version.

L1CODEBUSCACHE_LINESIZE_BYTE

code bus cache line size is equal to system bus line size, so the unified I/D cache line size equals too.

The code bus CACHE line size is 16B = 128b.

L1SYSTEMBUSCACHE_LINESIZE_BYTE: The system bus CACHE line size is 16B = 128b.

Clock Driver

enum _clock_name

Clock name used to get clock frequency.

Values:

enumerator kCLOCK_CoreSysClk: Core/system clock

enumerator kCLOCK_BusClk: Bus clock

enumerator kCLOCK_FlashClk: Flash clock

enumerator kCLOCK_ScgSysOscClk: SCG system OSC clock. (SYSOSC)

enumerator kCLOCK_ScgSircClk: SCG SIRC clock.

enumerator kCLOCK_ScgFircClk: SCG FIRC clock.

enumerator kCLOCK_ScgSysPllClk: SCG System PLL clock. (SPLL)

enumerator kCLOCK_ScgSysOscAsyncDiv1Clk: SOSCDIV1_CLK.

enumerator kCLOCK_ScgSysOscAsyncDiv2Clk: SOSCDIV2_CLK.

enumerator kCLOCK_ScgSircAsyncDiv1Clk: SIRCDIV1_CLK.

enumerator kCLOCK_ScgSircAsyncDiv2Clk: SIRCDIV2_CLK.

enumerator kCLOCK_ScgFircAsyncDiv1Clk: FIRCDIV1_CLK.

enumerator kCLOCK_ScgFircAsyncDiv2Clk: FIRCDIV2_CLK.

enumerator kCLOCK_ScgSysPllAsyncDiv1Clk: SPLLDIV1_CLK.

enumerator kCLOCK_ScgSysPllAsyncDiv2Clk: SPLLDIV2_CLK.

enumerator kCLOCK_Lpo1kClk: 1kHz LPO clock

enumerator kCLOCK_Lpo32kClk: 32kHz LPO clock

enumerator kCLOCK_Lpo128kClk: 128kHz LPO clock

enumerator kCLOCK_LpoClk: LPO clock selected by SIM_LPOCLKS[LPOCLKSEL]

enumerator kCLOCK_ErClk: ERCLK. The external reference clock from SCG.

enum _clock_ip_src

Clock source for peripherals that support various clock selections.

Values:

enumerator kCLOCK_IpSrcNoneOrExt: Clock is off or external clock is used.

enumerator kCLOCK_IpSrcSysOscAsync: System Oscillator async clock.

enumerator kCLOCK_IpSrcSircAsync: Slow IRC async clock.

enumerator kCLOCK_IpSrcFircAsync: Fast IRC async clock.

enumerator kCLOCK_IpSrcSysPllAsync: SPLL async clock.

enumerator kCLOCK_IpSrcLpoAsync: LPO128 async clock.

enum _clock_ip_name

Peripheral clock name difinition used for clock gate, clock source and clock divider setting. It is defined as SIM_PLATCGC register adress with added 1 in bitfield corresponding to controlled peripheral for peripherals controled by SIM. It is defined as the corresponding register address for peripherals controlled by PCC.

Values:

enumerator kCLOCK_IpInvalid

enumerator kCLOCK_Eim

enumerator kCLOCK_Erm

enumerator kCLOCK_Dma

enumerator kCLOCK_Mpu

enumerator kCLOCK_Mscm

enumerator kCLOCK_Flash0

enumerator kCLOCK_Dmamux0

enumerator kCLOCK_Can0

enumerator kCLOCK_Can1

enumerator kCLOCK_Ftm3

enumerator kCLOCK_Adc1

enumerator kCLOCK_Can2

enumerator kCLOCK_Lpspi0

enumerator kCLOCK_Lpspi1

enumerator kCLOCK_Lpspi2

enumerator kCLOCK_Pdb1

enumerator kCLOCK_Crc0

enumerator kCLOCK_Pdb0

enumerator kCLOCK_Lpit0

enumerator kCLOCK_Ftm0

enumerator kCLOCK_Ftm1

enumerator kCLOCK_Ftm2

enumerator kCLOCK_Adc0

enumerator kCLOCK_Rtc0

enumerator kCLOCK_Lptmr0

enumerator kCLOCK_PortA

enumerator kCLOCK_PortB

enumerator kCLOCK_PortC

enumerator kCLOCK_PortD

enumerator kCLOCK_PortE

enumerator kCLOCK_Sai0

enumerator kCLOCK_Sai1

enumerator kCLOCK_Flexio0

enumerator kCLOCK_Ewm0

enumerator kCLOCK_Lpi2c0

enumerator kCLOCK_Lpi2c1

enumerator kCLOCK_Lpuart0

enumerator kCLOCK_Lpuart1

enumerator kCLOCK_Lpuart2

enumerator kCLOCK_Ftm4

enumerator kCLOCK_Ftm5

enumerator kCLOCK_Ftm6

enumerator kCLOCK_Ftm7

enumerator kCLOCK_Cmp0

enumerator kCLOCK_Qspi

enumerator kCLOCK_Enet

SCG status return codes.

Values:

enumerator kStatus_SCG_Busy: Clock is busy.

enumerator kStatus_SCG_InvalidSrc: Invalid source.

enum _scg_sys_clk

SCG system clock type.

Values:

enumerator kSCG_SysClkSlow: System slow clock.

enumerator kSCG_SysClkBus: Bus clock.

enumerator kSCG_SysClkCore: Core clock.

enum _scg_sys_clk_src

SCG system clock source.

Values:

enumerator kSCG_SysClkSrcSysOsc: System OSC.

enumerator kSCG_SysClkSrcSirc: Slow IRC.

enumerator kSCG_SysClkSrcFirc: Fast IRC.

enumerator kSCG_SysClkSrcSysPll: System PLL.

enum _scg_sys_clk_div

SCG system clock divider value.

Values:

enumerator kSCG_SysClkDivBy1: Divided by 1.

enumerator kSCG_SysClkDivBy2: Divided by 2.

enumerator kSCG_SysClkDivBy3: Divided by 3.

enumerator kSCG_SysClkDivBy4: Divided by 4.

enumerator kSCG_SysClkDivBy5: Divided by 5.

enumerator kSCG_SysClkDivBy6: Divided by 6.

enumerator kSCG_SysClkDivBy7: Divided by 7.

enumerator kSCG_SysClkDivBy8: Divided by 8.

enumerator kSCG_SysClkDivBy9: Divided by 9.

enumerator kSCG_SysClkDivBy10: Divided by 10.

enumerator kSCG_SysClkDivBy11: Divided by 11.

enumerator kSCG_SysClkDivBy12: Divided by 12.

enumerator kSCG_SysClkDivBy13: Divided by 13.

enumerator kSCG_SysClkDivBy14: Divided by 14.

enumerator kSCG_SysClkDivBy15: Divided by 15.

enumerator kSCG_SysClkDivBy16: Divided by 16.

enum _clock_clkout_src

SCG clock out configuration (CLKOUTSEL).

Values:

enumerator kClockClkoutSelScgSlow: SCG slow clock.

enumerator kClockClkoutSelSysOsc: System OSC.

enumerator kClockClkoutSelSirc: Slow IRC.

enumerator kClockClkoutSelFirc: Fast IRC.

enumerator kClockClkoutSelSysPll: System PLL.

enum _scg_async_clk

SCG asynchronous clock type.

Values:

enumerator kSCG_AsyncDiv1Clk: The async clock by DIV1, e.g. SOSCDIV1_CLK, SIRCDIV1_CLK.

enumerator kSCG_AsyncDiv2Clk: The async clock by DIV2, e.g. SOSCDIV2_CLK, SIRCDIV2_CLK.

enum scg_async_clk_div

SCG asynchronous clock divider value.

Values:

enumerator kSCG_AsyncClkDisable: Clock output is disabled.

enumerator kSCG_AsyncClkDivBy1: Divided by 1.

enumerator kSCG_AsyncClkDivBy2: Divided by 2.

enumerator kSCG_AsyncClkDivBy4: Divided by 4.

enumerator kSCG_AsyncClkDivBy8: Divided by 8.

enumerator kSCG_AsyncClkDivBy16: Divided by 16.

enumerator kSCG_AsyncClkDivBy32: Divided by 32.

enumerator kSCG_AsyncClkDivBy64: Divided by 64.

enum _scg_sosc_monitor_mode

SCG system OSC monitor mode.

Values:

enumerator kSCG_SysOscMonitorDisable: Monitor disabled.

enumerator kSCG_SysOscMonitorInt: Interrupt when the system OSC error is detected.

enumerator kSCG_SysOscMonitorReset: Reset when the system OSC error is detected.

enum _scg_sosc_mode

OSC work mode.

Values:

enumerator kSCG_SysOscModeExt: Use external clock.

enumerator kSCG_SysOscModeOscLowPower: Oscillator low power.

enumerator kSCG_SysOscModeOscHighGain: Oscillator high gain.

OSC enable mode.

Values:

enumerator kSCG_SysOscEnable: Enable OSC clock.

enum _scg_sirc_range

SCG slow IRC clock frequency range.

Values:

enumerator kSCG_SircRangeHigh: Slow IRC high range clock (8 MHz).

SIRC enable mode.

Values:

enumerator kSCG_SircEnable: Enable SIRC clock.

enumerator kSCG_SircEnableInStop: Enable SIRC in stop mode.

enumerator kSCG_SircEnableInLowPower: Enable SIRC in low power mode.

enum _scg_firc_range

SCG fast IRC clock frequency range.

Values:

enumerator kSCG_FircRange48M: Fast IRC is trimmed to 48 MHz.

FIRC enable mode.

Values:

enumerator kSCG_FircEnable: Enable FIRC clock.

enumerator kSCG_FircDisableRegulator: Disable regulator.

enum _scg_spll_monitor_mode

SCG system PLL monitor mode.

Values:

enumerator kSCG_SysPllMonitorDisable: Monitor disabled.

enumerator kSCG_SysPllMonitorInt: Interrupt when the system PLL error is detected.

enumerator kSCG_SysPllMonitorReset: Reset when the system PLL error is detected.

SPLL enable mode.

Values:

enumerator kSCG_SysPllEnable: Enable SPLL clock.

enum _sim_lpo_clk_src

LPO clock source.

Values:

enumerator kSIM_LpoClkSrcLpo128k: 128kHz LPO clock.

enumerator kSIM_LpoClkSrcLpo32k: 32kHz LPO clock.

enumerator kSIM_LpoClkSrcLpo1k: 1kHz LPO clock.

typedef enum _clock_name clock_name_t: Clock name used to get clock frequency.

typedef enum _clock_ip_src clock_ip_src_t: Clock source for peripherals that support various clock selections.

typedef enum _clock_ip_name clock_ip_name_t: Peripheral clock name difinition used for clock gate, clock source and clock divider setting. It is defined as SIM_PLATCGC register adress with added 1 in bitfield corresponding to controlled peripheral for peripherals controled by SIM. It is defined as the corresponding register address for peripherals controlled by PCC.

typedef enum _scg_sys_clk scg_sys_clk_t: SCG system clock type.

typedef enum _scg_sys_clk_src scg_sys_clk_src_t: SCG system clock source.

typedef enum _scg_sys_clk_div scg_sys_clk_div_t: SCG system clock divider value.

typedef struct _scg_sys_clk_config scg_sys_clk_config_t: SCG system clock configuration.

typedef enum _clock_clkout_src clock_clkout_src_t: SCG clock out configuration (CLKOUTSEL).

typedef enum _scg_async_clk scg_async_clk_t: SCG asynchronous clock type.

typedef enum scg_async_clk_div scg_async_clk_div_t: SCG asynchronous clock divider value.

typedef enum _scg_sosc_monitor_mode scg_sosc_monitor_mode_t: SCG system OSC monitor mode.

typedef enum _scg_sosc_mode scg_sosc_mode_t: OSC work mode.

typedef struct _scg_sosc_config scg_sosc_config_t: SCG system OSC configuration.

typedef enum _scg_sirc_range scg_sirc_range_t: SCG slow IRC clock frequency range.

typedef struct _scg_sirc_config scg_sirc_config_t: SCG slow IRC clock configuration.

typedef enum _scg_firc_range scg_firc_range_t: SCG fast IRC clock frequency range.

typedef struct _scg_firc_config_t scg_firc_config_t: SCG fast IRC clock configuration.

typedef enum _scg_spll_monitor_mode scg_spll_monitor_mode_t: SCG system PLL monitor mode.

typedef struct _scg_spll_config scg_spll_config_t: SCG system PLL configuration.

typedef enum _sim_lpo_clk_src sim_lpo_clk_src_t: LPO clock source.

volatile uint32_t g_xtal0Freq

External XTAL0 (OSC0/SYSOSC) clock frequency.

The XTAL0/EXTAL0 (OSC0/SYSOSC) clock frequency in Hz. When the clock is set up, use the function CLOCK_SetXtal0Freq to set the value in the clock driver. For example, if XTAL0 is 8 MHz:

CLOCK_InitSysOsc(...);
CLOCK_SetXtal0Freq(80000000);

This is important for the multicore platforms where only one core needs to set up the OSC0/SYSOSC using CLOCK_InitSysOsc. All other cores need to call the CLOCK_SetXtal0Freq to get a valid clock frequency.

static inline void CLOCK_EnableClock(clock_ip_name_t name)

Enable the clock for specific IP.

Parameters:

name – Which clock to enable, see clock_ip_name_t.

static inline void CLOCK_DisableClock(clock_ip_name_t name)

Disable the clock for specific IP.

Parameters:

name – Which clock to disable, see clock_ip_name_t.

static inline void CLOCK_SetIpSrc(clock_ip_name_t name, clock_ip_src_t src)

Set the clock source for specific IP module.

Set the clock source for specific IP, not all modules need to set the clock source, should only use this function for the modules need source setting.

Parameters:

name – Which peripheral to check, see clock_ip_name_t.
src – Clock source to set.

static inline void CLOCK_SetIpSrcDiv(clock_ip_name_t name, clock_ip_src_t src, uint16_t divValue, uint8_t fracValue)

Set the clock source and divider for specific IP module.

Set the clock source and divider for specific IP, not all modules need to set the clock source and divider, should only use this function for the modules need source and divider setting.

Divider output clock = Divider input clock x [(fracValue+1)/(divValue+1)]).

Parameters:

name – Which peripheral to check, see clock_ip_name_t.
src – Clock source to set.
divValue – The divider value.
fracValue – The fraction multiply value.

uint32_t CLOCK_GetFreq(clock_name_t clockName)

Gets the clock frequency for a specific clock name.

This function checks the current clock configurations and then calculates the clock frequency for a specific clock name defined in clock_name_t.

Parameters:

clockName – Clock names defined in clock_name_t

Returns:

Clock frequency value in hertz

uint32_t CLOCK_GetCoreSysClkFreq(void)

Get the core clock or system clock frequency.

Returns:: Clock frequency in Hz.

uint32_t CLOCK_GetBusClkFreq(void)

Get the bus clock frequency.

Returns:: Clock frequency in Hz.

uint32_t CLOCK_GetFlashClkFreq(void)

Get the flash clock frequency.

Returns:: Clock frequency in Hz.

uint32_t CLOCK_GetErClkFreq(void)

Get the external reference clock frequency (ERCLK).

Returns:: Clock frequency in Hz.

uint32_t CLOCK_GetLpoClkFreq(void)

Get the internal low power oscillator frequency (LPO_CLK).

Returns:: Clock frequency in Hz.

uint32_t CLOCK_GetIpFreq(clock_ip_name_t name)

Gets the clock frequency for a specific IP module.

This function gets the IP module clock frequency based on PCC registers. It is only used for the IP modules which could select clock source by PCC[PCS].

Parameters:

name – Which peripheral to get, see clock_ip_name_t.

Returns:

Clock frequency value in hertz

FSL_CLOCK_DRIVER_VERSION: CLOCK driver version 2.0.0.

SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY

DMAMUX_CLOCKS: Clock ip name array for DMAMUX.

FLEXCAN_CLOCKS: Clock ip name array for FlexCAN.

PORT_CLOCKS: Clock ip name array for PORT.

SAI_CLOCKS: Clock ip name array for SAI.

LPI2C_CLOCKS: Clock ip name array for LPI2C.

FLEXIO_CLOCKS: Clock ip name array for FLEXIO.

RTC_CLOCKS: Clock ip name array for RTC.

EDMA_CLOCKS: Clock ip name array for EDMA.

LPUART_CLOCKS: Clock ip name array for LPUART.

LPTMR_CLOCKS: Clock ip name array for LPTMR.

ADC12_CLOCKS: Clock ip name array for ADC12.

LPSPI_CLOCKS: Clock ip name array for LPSPI.

LPIT_CLOCKS: Clock ip name array for LPIT.

CRC_CLOCKS: Clock ip name array for CRC.

PDB_CLOCKS: Clock ip name array for PDB.

CMP_CLOCKS: Clock ip name array for CMP.

QSPI_CLOCKS: Clock ip name array for QSPI.

ENET_CLOCKS: Clock ip name array for ENET.

FLASH_CLOCKS: Clock ip name array for FLASH.

EWM_CLOCKS: Clock ip name array for EWM.

FTM_CLOCKS: Clock ip name array for FLEXTMR.

FLEXIOTRIG_CLOCKS: Clock ip name array for FLEXIO_TRIG0/1 Aync clock.

SYSMPU_CLOCKS: Clock ip name array for MPU.

LPO_1K_CLK_FREQ: LPO clock frequency.

LPO_32K_CLK_FREQ

LPO_128K_CLK_FREQ

kCLOCK_Osc0ErClk

CLOCK_GetOsc0ErClkFreq: For compatible with other MCG platforms.

CLOCK_SIM_CGC_MASK

uint32_t CLOCK_GetSysClkFreq(scg_sys_clk_t type)

Gets the SCG system clock frequency.

This function gets the SCG system clock frequency. These clocks are used for core, platform, external, and bus clock domains.

Parameters:

type – Which type of clock to get, core clock or slow clock.

Returns:

Clock frequency.

static inline void CLOCK_SetVlprModeSysClkConfig(const scg_sys_clk_config_t *config)

Sets the system clock configuration for VLPR mode.

This function sets the system clock configuration for VLPR mode.

Parameters:

config – Pointer to the configuration.

static inline void CLOCK_SetRunModeSysClkConfig(const scg_sys_clk_config_t *config)

Sets the system clock configuration for RUN mode.

This function sets the system clock configuration for RUN mode.

Parameters:

config – Pointer to the configuration.

static inline void CLOCK_SetHsrunModeSysClkConfig(const scg_sys_clk_config_t *config)

Sets the system clock configuration for HSRUN mode.

This function sets the system clock configuration for HSRUN mode.

Parameters:

config – Pointer to the configuration.

static inline void CLOCK_GetCurSysClkConfig(scg_sys_clk_config_t *config)

Gets the system clock configuration in the current power mode.

This function gets the system configuration in the current power mode.

Parameters:

config – Pointer to the configuration.

static inline void CLOCK_SetClkOutSel(clock_clkout_src_t setting)

Sets the clock out selection.

This function sets the clock out selection (CLKOUTSEL).

Parameters:

setting – The selection to set.

Returns:

The current clock out selection.

status_t CLOCK_InitSysOsc(const scg_sosc_config_t *config)

Initializes the SCG system OSC.

This function enables the SCG system OSC clock according to the configuration.

Note

This function can’t detect whether the system OSC has been enabled and used by an IP.

Parameters:

config – Pointer to the configuration structure.

Return values:

kStatus_Success – System OSC is initialized.
kStatus_SCG_Busy – System OSC has been enabled and is used by the system clock.
kStatus_ReadOnly – System OSC control register is locked.

status_t CLOCK_DeinitSysOsc(void)

De-initializes the SCG system OSC.

This function disables the SCG system OSC clock.

Note

This function can’t detect whether the system OSC is used by an IP.

Return values:

kStatus_Success – System OSC is deinitialized.
kStatus_SCG_Busy – System OSC is used by the system clock.
kStatus_ReadOnly – System OSC control register is locked.

static inline void CLOCK_SetSysOscAsyncClkDiv(scg_async_clk_t asyncClk, scg_async_clk_div_t divider)

Set the asynchronous clock divider.

Note

There might be glitch when changing the asynchronous divider, so make sure the asynchronous clock is not used while changing divider.

Parameters:

asyncClk – Which asynchronous clock to configure.
divider – The divider value to set.

uint32_t CLOCK_GetSysOscFreq(void)

Gets the SCG system OSC clock frequency (SYSOSC).

Returns:: Clock frequency; If the clock is invalid, returns 0.

uint32_t CLOCK_GetSysOscAsyncFreq(scg_async_clk_t type)

Gets the SCG asynchronous clock frequency from the system OSC.

Parameters:

type – The asynchronous clock type.

Returns:

Clock frequency; If the clock is invalid, returns 0.

static inline bool CLOCK_IsSysOscErr(void)

Checks whether the system OSC clock error occurs.

Returns:: True if the error occurs, false if not.

static inline void CLOCK_ClearSysOscErr(void): Clears the system OSC clock error.

static inline void CLOCK_SetSysOscMonitorMode(scg_sosc_monitor_mode_t mode)

Sets the system OSC monitor mode.

This function sets the system OSC monitor mode. The mode can be disabled, it can generate an interrupt when the error is disabled, or reset when the error is detected.

Parameters:

mode – Monitor mode to set.

static inline bool CLOCK_IsSysOscValid(void)

Checks whether the system OSC clock is valid.

Returns:: True if clock is valid, false if not.

status_t CLOCK_InitSirc(const scg_sirc_config_t *config)

Initializes the SCG slow IRC clock.

This function enables the SCG slow IRC clock according to the configuration.

Note

This function can’t detect whether the system OSC has been enabled and used by an IP.

Parameters:

config – Pointer to the configuration structure.

Return values:

kStatus_Success – SIRC is initialized.
kStatus_SCG_Busy – SIRC has been enabled and is used by system clock.
kStatus_ReadOnly – SIRC control register is locked.

status_t CLOCK_DeinitSirc(void)

De-initializes the SCG slow IRC.

This function disables the SCG slow IRC.

Note

This function can’t detect whether the SIRC is used by an IP.

Return values:

kStatus_Success – SIRC is deinitialized.
kStatus_SCG_Busy – SIRC is used by system clock.
kStatus_ReadOnly – SIRC control register is locked.

static inline void CLOCK_SetSircAsyncClkDiv(scg_async_clk_t asyncClk, scg_async_clk_div_t divider)

Set the asynchronous clock divider.

Note

There might be glitch when changing the asynchronous divider, so make sure the asynchronous clock is not used while changing divider.

Parameters:

asyncClk – Which asynchronous clock to configure.
divider – The divider value to set.

uint32_t CLOCK_GetSircFreq(void)

Gets the SCG SIRC clock frequency.

Returns:: Clock frequency; If the clock is invalid, returns 0.

uint32_t CLOCK_GetSircAsyncFreq(scg_async_clk_t type)

Gets the SCG asynchronous clock frequency from the SIRC.

Parameters:

type – The asynchronous clock type.

Returns:

Clock frequency; If the clock is invalid, returns 0.

static inline bool CLOCK_IsSircValid(void)

Checks whether the SIRC clock is valid.

Returns:: True if clock is valid, false if not.

status_t CLOCK_InitFirc(const scg_firc_config_t *config)

Initializes the SCG fast IRC clock.

This function enables the SCG fast IRC clock according to the configuration.

Note

This function can’t detect whether the FIRC has been enabled and used by an IP.

Parameters:

config – Pointer to the configuration structure.

Return values:

kStatus_Success – FIRC is initialized.
kStatus_SCG_Busy – FIRC has been enabled and is used by the system clock.
kStatus_ReadOnly – FIRC control register is locked.

status_t CLOCK_DeinitFirc(void)

De-initializes the SCG fast IRC.

This function disables the SCG fast IRC.

Note

This function can’t detect whether the FIRC is used by an IP.

Return values:

kStatus_Success – FIRC is deinitialized.
kStatus_SCG_Busy – FIRC is used by the system clock.
kStatus_ReadOnly – FIRC control register is locked.

static inline void CLOCK_SetFircAsyncClkDiv(scg_async_clk_t asyncClk, scg_async_clk_div_t divider)

Set the asynchronous clock divider.

Note

There might be glitch when changing the asynchronous divider, so make sure the asynchronous clock is not used while changing divider.

Parameters:

asyncClk – Which asynchronous clock to configure.
divider – The divider value to set.

uint32_t CLOCK_GetFircFreq(void)

Gets the SCG FIRC clock frequency.

Returns:: Clock frequency; If the clock is invalid, returns 0.

uint32_t CLOCK_GetFircAsyncFreq(scg_async_clk_t type)

Gets the SCG asynchronous clock frequency from the FIRC.

Parameters:

type – The asynchronous clock type.

Returns:

Clock frequency; If the clock is invalid, returns 0.

static inline bool CLOCK_IsFircValid(void)

Checks whether the FIRC clock is valid.

Returns:: True if clock is valid, false if not.

uint32_t CLOCK_GetSysPllMultDiv(uint32_t refFreq, uint32_t desireFreq, uint8_t *mult, uint8_t *prediv)

Calculates the MULT and PREDIV for the PLL.

This function calculates the proper MULT and PREDIV to generate the desired PLL output frequency with the input reference clock frequency. It returns the closest frequency match that the PLL can generate. The corresponding MULT/PREDIV are returned with parameters. If the desired frequency is not valid, this function returns 0.

Parameters:

refFreq – The input reference clock frequency.
desireFreq – The desired output clock frequency.
mult – The value of MULT.
prediv – The value of PREDIV.

Returns:

The PLL output frequency with the MULT and PREDIV; If the desired frequency can’t be generated, this function returns 0U.

status_t CLOCK_InitSysPll(const scg_spll_config_t *config)

Initializes the SCG system PLL.

This function enables the SCG system PLL clock according to the configuration. The system PLL can use the system OSC or FIRC as the clock source. Ensure that the source clock is valid before calling this function.

Example code for initializing SPLL clock output:

const scg_spll_config_t g_scgSysPllConfig = {.enableMode = kSCG_SysPllEnable,
                                           .monitorMode = kSCG_SysPllMonitorDisable,
                                           .div1 = kSCG_AsyncClkDivBy1,
                                           .div2 = kSCG_AsyncClkDisable,
                                           .div3 = kSCG_AsyncClkDivBy2,
                                           .src = kSCG_SysPllSrcFirc,
                                           .isBypassSelected = false,
                                           .isPfdSelected = false,
                                           .prediv = 5U,
                                           .pfdClkout = kSCG_AuxPllPfd0Clk,
                                           .mult = 20U,
                                           .pllPostdiv1 = kSCG_SysClkDivBy3,
                                           .pllPostdiv2 = kSCG_SysClkDivBy4};
CLOCK_InitSysPll(&g_scgSysPllConfig);

Note

This function can’t detect whether the system PLL has been enabled and used by an IP.

Parameters:

config – Pointer to the configuration structure.

Return values:

kStatus_Success – System PLL is initialized.
kStatus_SCG_Busy – System PLL has been enabled and is used by the system clock.
kStatus_ReadOnly – System PLL control register is locked.

status_t CLOCK_DeinitSysPll(void)

De-initializes the SCG system PLL.

This function disables the SCG system PLL.

Note

This function can’t detect whether the system PLL is used by an IP.

Return values:

kStatus_Success – system PLL is deinitialized.
kStatus_SCG_Busy – system PLL is used by the system clock.
kStatus_ReadOnly – System PLL control register is locked.

static inline void CLOCK_SetSysPllAsyncClkDiv(scg_async_clk_t asyncClk, scg_async_clk_div_t divider)

Set the asynchronous clock divider.

Note

There might be glitch when changing the asynchronous divider, so make sure the asynchronous clock is not used while changing divider.

Parameters:

asyncClk – Which asynchronous clock to configure.
divider – The divider value to set.

uint32_t CLOCK_GetSysPllFreq(void)

Gets the SCG system PLL clock frequency.

Returns:: Clock frequency; If the clock is invalid, returns 0.

uint32_t CLOCK_GetSysPllAsyncFreq(scg_async_clk_t type)

Gets the SCG asynchronous clock frequency from the system PLL.

Parameters:

type – The asynchronous clock type.

Returns:

Clock frequency; If the clock is invalid, returns 0.

static inline bool CLOCK_IsSysPllErr(void)

Checks whether the system PLL clock error occurs.

Returns:: True if an error occurs, false if not.

static inline void CLOCK_ClearSysPllErr(void): Clears the system PLL clock error.

static inline void CLOCK_SetSysPllMonitorMode(scg_spll_monitor_mode_t mode)

Sets the system PLL monitor mode.

This function sets the system PLL monitor mode. The mode can be disabled. It can generate an interrupt when the error is disabled, or reset when the error is detected.

Parameters:

mode – Monitor mode to set.

static inline bool CLOCK_IsSysPllValid(void)

Checks whether the system PLL clock is valid.

Returns:: True if the clock is valid, false if not.

static inline void CLOCK_SetXtal0Freq(uint32_t freq)

Sets the XTAL0 frequency based on board settings.

Parameters:

freq – The XTAL0/EXTAL0 input clock frequency in Hz.

uint32_t divSlow: Slow clock divider, see scg_sys_clk_div_t.

uint32_t divBus: Bus clock divider, see scg_sys_clk_div_t.

uint32_t __pad0__: Reserved.

uint32_t __pad1__: Reserved.

uint32_t divCore: Core clock divider, see scg_sys_clk_div_t.

uint32_t __pad2__: Reserved.

uint32_t src: System clock source, see scg_sys_clk_src_t.

uint32_t __pad3__: reserved.

uint32_t freq: System OSC frequency.

scg_sosc_monitor_mode_t monitorMode: Clock monitor mode selected.

uint8_t enableMode: Enable mode, OR’ed value of _scg_sosc_enable_mode.

scg_async_clk_div_t div1: SOSCDIV1 value.

scg_async_clk_div_t div2: SOSCDIV2 value.

scg_sosc_mode_t workMode: OSC work mode.

uint32_t enableMode: Enable mode, OR’ed value of _scg_sirc_enable_mode.

scg_async_clk_div_t div1: SIRCDIV1 value.

scg_async_clk_div_t div2: SIRCDIV2 value.

scg_sirc_range_t range: Slow IRC frequency range.

uint32_t enableMode: Enable mode, OR’ed value of _scg_firc_enable_mode.

scg_async_clk_div_t div1: FIRCDIV1 value.

scg_async_clk_div_t div2: FIRCDIV2 value.

scg_firc_range_t range: Fast IRC frequency range.

const uint32_t *trimConfig: Set NULL to disable trim. Trim is not supported on MCXE24x.

uint8_t enableMode: Enable mode, OR’ed value of _scg_spll_enable_mode

scg_spll_monitor_mode_t monitorMode: Clock monitor mode selected.

scg_async_clk_div_t div1: SPLLDIV1 value.

scg_async_clk_div_t div2: SPLLDIV2 value.

uint8_t prediv: PLL reference clock divider.

uint8_t mult: System PLL multiplier.

FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL

Configure whether driver controls clock.

When set to 0, peripheral drivers will enable clock in initialize function and disable clock in de-initialize function. When set to 1, peripheral driver will not control the clock, application could control the clock out of the driver.

Note

All drivers share this feature switcher. If it is set to 1, application should handle clock enable and disable for all drivers.

struct _scg_sys_clk_config: #include <fsl_clock.h>

SCG system clock configuration.

struct _scg_sosc_config: #include <fsl_clock.h>

SCG system OSC configuration.

struct _scg_sirc_config: #include <fsl_clock.h>

SCG slow IRC clock configuration.

struct _scg_firc_config_t: #include <fsl_clock.h>

SCG fast IRC clock configuration.

struct _scg_spll_config: #include <fsl_clock.h>

SCG system PLL configuration.

CRC: Cyclic Redundancy Check Driver

FSL_CRC_DRIVER_VERSION

CRC driver version. Version 2.0.4.

Current version: 2.0.4

Change log:

Version 2.0.4
- Release peripheral from reset if necessary in init function.
Version 2.0.3
- Fix MISRA issues
Version 2.0.2
- Fix MISRA issues
Version 2.0.1
- move DATA and DATALL macro definition from header file to source file

enum _crc_bits

CRC bit width.

Values:

enumerator kCrcBits16: Generate 16-bit CRC code

enumerator kCrcBits32: Generate 32-bit CRC code

enum _crc_result

CRC result type.

Values:

enumerator kCrcFinalChecksum: CRC data register read value is the final checksum. Reflect out and final xor protocol features are applied.

enumerator kCrcIntermediateChecksum: CRC data register read value is intermediate checksum (raw value). Reflect out and final xor protocol feature are not applied. Intermediate checksum can be used as a seed for CRC_Init() to continue adding data to this checksum.

typedef enum _crc_bits crc_bits_t: CRC bit width.

typedef enum _crc_result crc_result_t: CRC result type.

typedef struct _crc_config crc_config_t

CRC protocol configuration.

This structure holds the configuration for the CRC protocol.

void CRC_Init(CRC_Type *base, const crc_config_t *config)

Enables and configures the CRC peripheral module.

This function enables the clock gate in the SIM module for the CRC peripheral. It also configures the CRC module and starts a checksum computation by writing the seed.

Parameters:

base – CRC peripheral address.
config – CRC module configuration structure.

static inline void CRC_Deinit(CRC_Type *base)

Disables the CRC peripheral module.

This function disables the clock gate in the SIM module for the CRC peripheral.

Parameters:

base – CRC peripheral address.

void CRC_GetDefaultConfig(crc_config_t *config)

Loads default values to the CRC protocol configuration structure.

Loads default values to the CRC protocol configuration structure. The default values are as follows.

config->polynomial = 0x1021;
config->seed = 0xFFFF;
config->reflectIn = false;
config->reflectOut = false;
config->complementChecksum = false;
config->crcBits = kCrcBits16;
config->crcResult = kCrcFinalChecksum;

Parameters:

config – CRC protocol configuration structure.

void CRC_WriteData(CRC_Type *base, const uint8_t *data, size_t dataSize)

Writes data to the CRC module.

Writes input data buffer bytes to the CRC data register. The configured type of transpose is applied.

Parameters:

base – CRC peripheral address.
data – Input data stream, MSByte in data[0].
dataSize – Size in bytes of the input data buffer.

uint32_t CRC_Get32bitResult(CRC_Type *base)

Reads the 32-bit checksum from the CRC module.

Reads the CRC data register (either an intermediate or the final checksum). The configured type of transpose and complement is applied.

Parameters:

base – CRC peripheral address.

Returns:

An intermediate or the final 32-bit checksum, after configured transpose and complement operations.

uint16_t CRC_Get16bitResult(CRC_Type *base)

Reads a 16-bit checksum from the CRC module.

Reads the CRC data register (either an intermediate or the final checksum). The configured type of transpose and complement is applied.

Parameters:

base – CRC peripheral address.

Returns:

An intermediate or the final 16-bit checksum, after configured transpose and complement operations.

CRC_DRIVER_USE_CRC16_CCIT_FALSE_AS_DEFAULT: Default configuration structure filled by CRC_GetDefaultConfig(). Use CRC16-CCIT-FALSE as defeault.

struct _crc_config

#include <fsl_crc.h>

CRC protocol configuration.

This structure holds the configuration for the CRC protocol.

Public Members

uint32_t polynomial: CRC Polynomial, MSBit first. Example polynomial: 0x1021 = 1_0000_0010_0001 = x^12+x^5+1

uint32_t seed: Starting checksum value

bool reflectIn: Reflect bits on input.

bool reflectOut: Reflect bits on output.

bool complementChecksum: True if the result shall be complement of the actual checksum.

crc_bits_t crcBits: Selects 16- or 32- bit CRC protocol.

crc_result_t crcResult: Selects final or intermediate checksum return from CRC_Get16bitResult() or CRC_Get32bitResult()

CSEc Driver

enum csec_key_id_t

Specify the KeyID to be used to implement the requested cryptographic operation.

Implements : csec_key_id_t_Class

Values:

enumerator CSEC_SECRET_KEY

enumerator CSEC_MASTER_ECU

enumerator CSEC_BOOT_MAC_KEY

enumerator CSEC_BOOT_MAC

enumerator CSEC_KEY_1

enumerator CSEC_KEY_2

enumerator CSEC_KEY_3

enumerator CSEC_KEY_4

enumerator CSEC_KEY_5

enumerator CSEC_KEY_6

enumerator CSEC_KEY_7

enumerator CSEC_KEY_8

enumerator CSEC_KEY_9

enumerator CSEC_KEY_10

enumerator CSEC_RAM_KEY

enumerator CSEC_KEY_11

enumerator CSEC_KEY_12

enumerator CSEC_KEY_13

enumerator CSEC_KEY_14

enumerator CSEC_KEY_15

enumerator CSEC_KEY_16

enumerator CSEC_KEY_17

enum csec_cmd_t

CSEc commands which follow the same values as the SHE command definition.

Implements : csec_cmd_t_Class

Values:

enumerator CSEC_CMD_ENC_ECB

enumerator CSEC_CMD_ENC_CBC

enumerator CSEC_CMD_DEC_ECB

enumerator CSEC_CMD_DEC_CBC

enumerator CSEC_CMD_GENERATE_MAC

enumerator CSEC_CMD_VERIFY_MAC

enumerator CSEC_CMD_LOAD_KEY

enumerator CSEC_CMD_LOAD_PLAIN_KEY

enumerator CSEC_CMD_EXPORT_RAM_KEY

enumerator CSEC_CMD_INIT_RNG

enumerator CSEC_CMD_EXTEND_SEED

enumerator CSEC_CMD_RND

enumerator CSEC_CMD_RESERVED_1

enumerator CSEC_CMD_BOOT_FAILURE

enumerator CSEC_CMD_BOOT_OK

enumerator CSEC_CMD_GET_ID

enumerator CSEC_CMD_BOOT_DEFINE

enumerator CSEC_CMD_DBG_CHAL

enumerator CSEC_CMD_DBG_AUTH

enumerator CSEC_CMD_RESERVED_2

enumerator CSEC_CMD_RESERVED_3

enumerator CSEC_CMD_MP_COMPRESS

enum csec_call_sequence_t

Specifies if the information is the first or a following function call.

Implements : csec_call_sequence_t_Class

Values:

enumerator CSEC_CALL_SEQ_FIRST

enumerator CSEC_CALL_SEQ_SUBSEQUENT

enum csec_boot_flavor_t

Specifies the boot type for the BOOT_DEFINE command.

Implements : csec_boot_flavor_t_Class

Values:

enumerator CSEC_BOOT_STRICT

enumerator CSEC_BOOT_SERIAL

enumerator CSEC_BOOT_PARALLEL

enumerator CSEC_BOOT_NOT_DEFINED

typedef uint8_t csec_status_t

Represents the status of the CSEc module. Provides one bit for each status code as per SHE specification. CSEC_STATUS_* masks can be used for verifying the status.

Implements : csec_status_t_Class

typedef void (*security_callback_t)(uint32_t completedCmd, void *callbackParam): Callback for security modules Implements : security_callback_t_Class.

void CSEC_DRV_Init(csec_state_t *state)

Initializes the internal state of the driver and enables the FTFC interrupt.

Parameters:

state – [in] Pointer to the state structure which will be used for holding the internal state of the driver.

void CSEC_DRV_Deinit(void): Clears the internal state of the driver and disables the FTFC interrupt.

status_t CSEC_DRV_EncryptECB(csec_key_id_t keyId, const uint8_t *plainText, uint32_t length, uint8_t *cipherText, uint32_t timeout)

Performs the AES-128 encryption in ECB mode.

This function performs the AES-128 encryption in ECB mode of the input plain text buffer

Parameters:

keyId – [in] KeyID used to perform the cryptographic operation.
plainText – [in] Pointer to the plain text buffer.
length – [in] Number of bytes of plain text message to be encrypted. It should be multiple of 16 bytes.
cipherText – [out] Pointer to the cipher text buffer. The buffer shall have the same size as the plain text buffer.
timeout – [in] Timeout in milliseconds.

Returns:

Error Code after command execution. Output parameters are valid if the error code is STATUS_SUCCESS.

status_t CSEC_DRV_DecryptECB(csec_key_id_t keyId, const uint8_t *cipherText, uint32_t length, uint8_t *plainText, uint32_t timeout)

Performs the AES-128 decryption in ECB mode.

This function performs the AES-128 decryption in ECB mode of the input cipher text buffer.

Parameters:

keyId – [in] KeyID used to perform the cryptographic operation
cipherText – [in] Pointer to the cipher text buffer.
length – [in] Number of bytes of cipher text message to be decrypted. It should be multiple of 16 bytes.
plainText – [out] Pointer to the plain text buffer. The buffer shall have the same size as the cipher text buffer.
timeout – [in] Timeout in milliseconds.

Returns:

Error Code after command execution. Output parameters are valid if the error code is STATUS_SUCCESS.

status_t CSEC_DRV_EncryptCBC(csec_key_id_t keyId, const uint8_t *plainText, uint32_t length, const uint8_t *iv, uint8_t *cipherText, uint32_t timeout)

Performs the AES-128 encryption in CBC mode.

This function performs the AES-128 encryption in CBC mode of the input plaintext buffer.

Parameters:

keyId – [in] KeyID used to perform the cryptographic operation.
plainText – [in] Pointer to the plain text buffer.
length – [in] Number of bytes of plain text message to be encrypted. It should be multiple of 16 bytes.
iv – [in] Pointer to the initialization vector buffer.
timeout – [in] Timeout in milliseconds.
cipherText – [out] Pointer to the cipher text buffer. The buffer shall have the same size as the plain text buffer.
timeout – [in] Timeout in milliseconds.

Returns:

Error Code after command execution. Output parameters are valid if the error code is STATUS_SUCCESS.

status_t CSEC_DRV_DecryptCBC(csec_key_id_t keyId, const uint8_t *cipherText, uint32_t length, const uint8_t *iv, uint8_t *plainText, uint32_t timeout)

Performs the AES-128 decryption in CBC mode.

This function performs the AES-128 decryption in CBC mode of the input cipher text buffer.

Parameters:

keyId – [in] KeyID used to perform the cryptographic operation.
cipherText – [in] Pointer to the cipher text buffer.
length – [in] Number of bytes of cipher text message to be decrypted. It should be multiple of 16 bytes.
iv – [in] Pointer to the initialization vector buffer.
plainText – [out] Pointer to the plain text buffer. The buffer shall have the same size as the cipher text buffer.
timeout – [in] Timeout in milliseconds.

Returns:

Error Code after command execution. Output parameters are valid if the error code is STATUS_SUCCESS.

status_t CSEC_DRV_GenerateMAC(csec_key_id_t keyId, const uint8_t *msg, uint32_t msgLen, uint8_t *cmac, uint32_t timeout)

Calculates the MAC of a given message using CMAC with AES-128.

This function calculates the MAC of a given message using CMAC with AES-128.

Parameters:

keyId – [in] KeyID used to perform the cryptographic operation.
msg – [in] Pointer to the message buffer.
msgLen – [in] Number of bits of message on which CMAC will be computed.
cmac – [out] Pointer to the buffer containing the result of the CMAC computation.
timeout – [in] Timeout in milliseconds.

Returns:

Error Code after command execution. Output parameters are valid if the error code is STATUS_SUCCESS.

status_t CSEC_DRV_GenerateMACAddrMode(csec_key_id_t keyId, const uint8_t *msg, uint32_t msgLen, uint8_t *cmac)

Calculates the MAC of a given message (located in Flash) using CMAC with AES-128.

This function calculates the MAC of a given message using CMAC with AES-128. It is different from the CSEC_DRV_GenerateMAC function in the sense that it does not involve an extra copy of the data on which the CMAC is computed and the message pointer should be a pointer to Flash memory.

Parameters:

keyId – [in] KeyID used to perform the cryptographic operation.
msg – [in] Pointer to the message buffer (pointing to Flash memory).
msgLen – [in] Number of bits of message on which CMAC will be computed.
cmac – [out] Pointer to the buffer containing the result of the CMAC computation.

Returns:

Error Code after command execution. Output parameters are valid if the error code is STATUS_SUCCESS.

status_t CSEC_DRV_VerifyMAC(csec_key_id_t keyId, const uint8_t *msg, uint32_t msgLen, const uint8_t *mac, uint16_t macLen, bool *verifStatus, uint32_t timeout)

Verifies the MAC of a given message using CMAC with AES-128.

This function verifies the MAC of a given message using CMAC with AES-128.

Parameters:

keyId – [in] KeyID used to perform the cryptographic operation.
msg – [in] Pointer to the message buffer.
msgLen – [in] Number of bits of message on which CMAC will be computed.
mac – [in] Pointer to the buffer containing the CMAC to be verified.
macLen – [in] Number of bits of the CMAC to be compared. A macLength value of zero indicates that all 128-bits are compared.
verifStatus – [out] Status of MAC verification command (true: verification operation passed, false: verification operation failed).
timeout – [in] Timeout in milliseconds.

Returns:

Error Code after command execution. Output parameters are valid if the error code is STATUS_SUCCESS.

status_t CSEC_DRV_VerifyMACAddrMode(csec_key_id_t keyId, const uint8_t *msg, uint32_t msgLen, const uint8_t *mac, uint16_t macLen, bool *verifStatus)

Verifies the MAC of a given message (located in Flash) using CMAC with AES-128.

This function verifies the MAC of a given message using CMAC with AES-128. It is different from the CSEC_DRV_VerifyMAC function in the sense that it does not involve an extra copy of the data on which the CMAC is computed and the message pointer should be a pointer to Flash memory.

Parameters:

keyId – [in] KeyID used to perform the cryptographic operation.
msg – [in] Pointer to the message buffer (pointing to Flash memory).
msgLen – [in] Number of bits of message on which CMAC will be computed.
mac – [in] Pointer to the buffer containing the CMAC to be verified.
macLen – [in] Number of bits of the CMAC to be compared. A macLength value of zero indicates that all 128-bits are compared.
verifStatus – [out] Status of MAC verification command (true: verification operation passed, false: verification operation failed).

Returns:

Error Code after command execution. Output parameters are valid if the error code is STATUS_SUCCESS.

status_t CSEC_DRV_LoadKey(csec_key_id_t keyId, const uint8_t *m1, const uint8_t *m2, const uint8_t *m3, uint8_t *m4, uint8_t *m5)

Updates an internal key per the SHE specification.

This function updates an internal key per the SHE specification.

Parameters:

keyId – [in] KeyID of the key to be updated.
m1 – [in] Pointer to the 128-bit M1 message containing the UID, Key ID and Authentication Key ID.
m2 – [in] Pointer to the 256-bit M2 message contains the new security flags, counter and the key value all encrypted using a derived key generated from the Authentication Key.
m3 – [in] Pointer to the 128-bit M3 message is a MAC generated over messages M1 and M2.
m4 – [out] Pointer to a 256 bits buffer where the computed M4 parameter is stored.
m5 – [out] Pointer to a 128 bits buffer where the computed M5 parameters is stored.

Returns:

Error Code after command execution. Output parameters are valid if the error code is STATUS_SUCCESS.

status_t CSEC_DRV_LoadPlainKey(const uint8_t *plainKey)

Updates the RAM key memory slot with a 128-bit plaintext.

The function updates the RAM key memory slot with a 128-bit plaintext. The key is loaded without encryption and verification of the key, i.e. the key is handed over in plaintext. A plain key can only be loaded into the RAM_KEY slot.

Parameters:

plainKey – [in] Pointer to the 128-bit buffer containing the key that needs to be copied in RAM_KEY slot.

Returns:

Error Code after command execution.

status_t CSEC_DRV_ExportRAMKey(uint8_t *m1, uint8_t *m2, uint8_t *m3, uint8_t *m4, uint8_t *m5)

Exports the RAM_KEY into a format protected by SECRET_KEY.

This function exports the RAM_KEY into a format protected by SECRET_KEY.

Parameters:

m1 – [out] Pointer to a buffer where the M1 parameter will be exported.
m2 – [out] Pointer to a buffer where the M2 parameter will be exported.
m3 – [out] Pointer to a buffer where the M3 parameter will be exported.
m4 – [out] Pointer to a buffer where the M4 parameter will be exported.
m5 – [out] Pointer to a buffer where the M5 parameter will be exported.

Returns:

Error Code after command execution. Output parameters are valid if the error code is STATUS_SUCCESS.

status_t CSEC_DRV_InitRNG(void)

Initializes the seed and derives a key for the PRNG.

The function initializes the seed and derives a key for the PRNG. The function must be called before CMD_RND after every power cycle/reset.

Returns:: Error Code after command execution.

status_t CSEC_DRV_ExtendSeed(const uint8_t *entropy)

Extends the seed of the PRNG.

Extends the seed of the PRNG by compressing the former seed value and the supplied entropy into a new seed. This new seed is then to be used to generate a random number by invoking the CMD_RND command. The random number generator must be initialized by CMD_INIT_RNG before the seed may be extended.

Parameters:

entropy – [in] Pointer to a 128-bit buffer containing the entropy.

Returns:

Error Code after command execution. Output parameters are valid if the error code is STATUS_SUCCESS.

status_t CSEC_DRV_GenerateRND(uint8_t *rnd)

Generates a vector of 128 random bits.

The function returns a vector of 128 random bits. The random number generator has to be initialized by calling CSEC_DRV_InitRNG before random numbers can be supplied.

Parameters:

rnd – [out] Pointer to a 128-bit buffer where the generated random number has to be stored.

Returns:

Error Code after command execution. Output parameters are valid if the error code is STATUS_SUCCESS.

status_t CSEC_DRV_BootFailure(void)

Signals a failure detected during later stages of the boot process.

The function is called during later stages of the boot process to detect a failure.

Returns:: Error Code after command execution.

status_t CSEC_DRV_BootOK(void)

Marks a successful boot verification during later stages of the boot process.

The function is called during later stages of the boot process to mark successful boot verification.

Returns:: Error Code after command execution.

status_t CSEC_DRV_BootDefine(uint32_t bootSize, csec_boot_flavor_t bootFlavor)

Implements an extension of the SHE standard to define both the user boot size and boot method.

The function implements an extension of the SHE standard to define both the user boot size and boot method.

Parameters:

bootSize – [in] Number of blocks of 128-bit data to check on boot. Maximum size is 512kBytes.
bootFlavor – [in] The boot method.

Returns:

Error Code after command execution.

static inline csec_status_t CSEC_DRV_GetStatus(void)

Returns the content of the status register.

The function shall return the content of the status register.

Implements : CSEC_DRV_GetStatus_Activity

Returns:: Value of the status register.

status_t CSEC_DRV_GetID(const uint8_t *challenge, uint8_t *uid, uint8_t *sreg, uint8_t *mac)

Returns the identity (UID) and the value of the status register protected by a MAC over a challenge and the data.

This function returns the identity (UID) and the value of the status register protected by a MAC over a challenge and the data.

Parameters:

challenge – [in] Pointer to the 128-bit buffer containing Challenge data.
uid – [out] Pointer to 120 bit buffer where the UID will be stored.
sreg – [out] Value of the status register.
mac – [out] Pointer to the 128 bit buffer where the MAC generated over challenge and UID and status will be stored.

Returns:

Error Code after command execution. Output parameters are valid if the error code is STATUS_SUCCESS.

status_t CSEC_DRV_DbgChal(uint8_t *challenge)

Obtains a random number which the user shall use along with the MASTER_ECU_KEY and UID to return an authorization request.

This function obtains a random number which the user shall use along with the MASTER_ECU_KEY and UID to return an authorization request.

Parameters:

challenge – [out] Pointer to the 128-bit buffer where the challenge data will be stored.

Returns:

Error Code after command execution. Output parameters are valid if the error code is STATUS_SUCCESS.

status_t CSEC_DRV_DbgAuth(const uint8_t *authorization)

Erases all keys (actual and outdated) stored in NVM Memory if the authorization is confirmed by CSEc.

This function erases all keys (actual and outdated) stored in NVM Memory if the authorization is confirmed by CSEc.

Parameters:

authorization – [in] Pointer to the 128-bit buffer containing the authorization value.

Returns:

Error Code after command execution.

status_t CSEC_DRV_MPCompress(const uint8_t *msg, uint16_t msgLen, uint8_t *mpCompress, uint32_t timeout)

Compresses the given messages by accessing the Miyaguchi-Prenell compression feature with in the CSEc feature set.

This function accesses a Miyaguchi-Prenell compression feature within the CSEc feature set to compress the given messages.

Parameters:

msg – [in] Pointer to the messages to be compressed. Messages must be pre-processed per SHE specification if they do not already meet the full 128-bit block size requirement.
msgLen – [in] The number of 128 bit messages to be compressed.
mpCompress – [out] Pointer to the 128 bit buffer storing the compressed data.
timeout – [in] Timeout in milliseconds.

Returns:

Error Code after command execution. Output parameters are valid if the error code is STATUS_SUCCESS.

status_t CSEC_DRV_EncryptECBAsync(csec_key_id_t keyId, const uint8_t *plainText, uint32_t length, uint8_t *cipherText)

Asynchronously performs the AES-128 encryption in ECB mode.

This function performs the AES-128 encryption in ECB mode of the input plain text buffer, in an asynchronous manner.

Parameters:

keyId – [in] KeyID used to perform the cryptographic operation.
plainText – [in] Pointer to the plain text buffer.
length – [in] Number of bytes of plain text message to be encrypted. It should be multiple of 16 bytes.
cipherText – [out] Pointer to the cipher text buffer. The buffer shall have the same size as the plain text buffer.

Returns:

STATUS_SUCCESS if the command was successfully launched, STATUS_BUSY if another command was already launched. CSEC_DRV_GetAsyncCmdStatus can be used in order to check the execution status.

status_t CSEC_DRV_DecryptECBAsync(csec_key_id_t keyId, const uint8_t *cipherText, uint32_t length, uint8_t *plainText)

Asynchronously performs the AES-128 decryption in ECB mode.

This function performs the AES-128 decryption in ECB mode of the input cipher text buffer, in an asynchronous manner.

Parameters:

keyId – [in] KeyID used to perform the cryptographic operation
cipherText – [in] Pointer to the cipher text buffer.
length – [in] Number of bytes of cipher text message to be decrypted. It should be multiple of 16 bytes.
plainText – [out] Pointer to the plain text buffer. The buffer shall have the same size as the cipher text buffer.

Returns:

STATUS_SUCCESS if the command was successfully launched, STATUS_BUSY if another command was already launched. CSEC_DRV_GetAsyncCmdStatus can be used in order to check the execution status.

status_t CSEC_DRV_EncryptCBCAsync(csec_key_id_t keyId, const uint8_t *plainText, uint32_t length, const uint8_t *iv, uint8_t *cipherText)

Asynchronously performs the AES-128 encryption in CBC mode.

This function performs the AES-128 encryption in CBC mode of the input plaintext buffer, in an asynchronous manner.

Parameters:

keyId – [in] KeyID used to perform the cryptographic operation.
plainText – [in] Pointer to the plain text buffer.
length – [in] Number of bytes of plain text message to be encrypted. It should be multiple of 16 bytes.
iv – [in] Pointer to the initialization vector buffer.
cipherText – [out] Pointer to the cipher text buffer. The buffer shall have the same size as the plain text buffer.

Returns:

STATUS_SUCCESS if the command was successfully launched, STATUS_BUSY if another command was already launched. CSEC_DRV_GetAsyncCmdStatus can be used in order to check the execution status.

status_t CSEC_DRV_DecryptCBCAsync(csec_key_id_t keyId, const uint8_t *cipherText, uint32_t length, const uint8_t *iv, uint8_t *plainText)

Asynchronously performs the AES-128 decryption in CBC mode.

This function performs the AES-128 decryption in CBC mode of the input cipher text buffer, in an asynchronous manner.

Parameters:

keyId – [in] KeyID used to perform the cryptographic operation.
cipherText – [in] Pointer to the cipher text buffer.
length – [in] Number of bytes of cipher text message to be decrypted. It should be multiple of 16 bytes.
iv – [in] Pointer to the initialization vector buffer.
plainText – [out] Pointer to the plain text buffer. The buffer shall have the same size as the cipher text buffer.

Returns:

STATUS_SUCCESS if the command was successfully launched, STATUS_BUSY if another command was already launched. CSEC_DRV_GetAsyncCmdStatus can be used in order to check the execution status.

status_t CSEC_DRV_GenerateMACAsync(csec_key_id_t keyId, const uint8_t *msg, uint32_t msgLen, uint8_t *cmac)

Asynchronously calculates the MAC of a given message using CMAC with AES-128.

This function calculates the MAC of a given message using CMAC with AES-128, in an asynchronous manner.

Parameters:

keyId – [in] KeyID used to perform the cryptographic operation.
msg – [in] Pointer to the message buffer.
msgLen – [in] Number of bits of message on which CMAC will be computed.
cmac – [out] Pointer to the buffer containing the result of the CMAC computation.

Returns:

STATUS_SUCCESS if the command was successfully launched, STATUS_BUSY if another command was already launched. CSEC_DRV_GetAsyncCmdStatus can be used in order to check the execution status.

status_t CSEC_DRV_VerifyMACAsync(csec_key_id_t keyId, const uint8_t *msg, uint32_t msgLen, const uint8_t *mac, uint16_t macLen, bool *verifStatus)

Asynchronously verifies the MAC of a given message using CMAC with AES-128.

This function verifies the MAC of a given message using CMAC with AES-128, in an asynchronous manner.

Parameters:

keyId – [in] KeyID used to perform the cryptographic operation.
msg – [in] Pointer to the message buffer.
msgLen – [in] Number of bits of message on which CMAC will be computed.
mac – [in] Pointer to the buffer containing the CMAC to be verified.
macLen – [in] Number of bits of the CMAC to be compared. A macLength value of zero indicates that all 128-bits are compared.
verifStatus – [out] Status of MAC verification command (true: verification operation passed, false: verification operation failed).

Returns:

STATUS_SUCCESS if the command was successfully launched, STATUS_BUSY if another command was already launched. CSEC_DRV_GetAsyncCmdStatus can be used in order to check the execution status.

status_t CSEC_DRV_GetAsyncCmdStatus(void)

Checks the status of the execution of an asynchronous command.

This function checks the status of the execution of an asynchronous command. If the command is still in progress, returns STATUS_BUSY.

Returns:: Error Code after command execution.

void CSEC_DRV_InstallCallback(security_callback_t callbackFunc, void *callbackParam)

Installs a callback function which will be invoked when an asynchronous command finishes its execution.

Parameters:

callbackFunc – [in] The function to be invoked.
callbackParam – [in] The parameter to be passed to the callback function.

void CSEC_DRV_CancelCommand(void): Cancels a previously launched asynchronous command.

CSEC_STATUS_BUSY: The bit is set whenever SHE is processing a command.

CSEC_STATUS_SECURE_BOOT: The bit is set if the secure booting is activated.

CSEC_STATUS_BOOT_INIT: The bit is set if the secure booting has been personalized during the boot sequence.

CSEC_STATUS_BOOT_FINISHED: The bit is set when the secure booting has been finished by calling either CMD_BOOT_FAILURE or CMD_BOOT_OK or if CMD_SECURE_BOOT failed in verifying BOOT_MAC.

CSEC_STATUS_BOOT_OK: The bit is set if the secure booting (CMD_SECURE_BOOT) succeeded. If CMD_BOOT_FAILURE is called the bit is erased.

CSEC_STATUS_RND_INIT: The bit is set if the random number generator has been initialized.

CSEC_STATUS_EXT_DEBUGGER: The bit is set if an external debugger is connected to the chip.

CSEC_STATUS_INT_DEBUGGER: The bit is set if the internal debugging mechanisms of SHE are activated.

DEV_ASSERT

STATUS_BUSY

STATUS_TIMEOUT

struct csec_state_t

#include <ela_csec_driver.h>

Internal driver state information.

Implements : csec_state_t_Class

Note

The contents of this structure are internal to the driver and should not be modified by users. Also, contents of the structure are subject to change in future releases.

Public Members

bool cmdInProgress: Specifies if a command is in progress

csec_cmd_t cmd: Specifies the type of the command in execution

const uint8_t *inputBuff: Specifies the input of the command in execution

uint8_t *outputBuff: Specifies the output of the command in execution

uint32_t index: Specifies the index in the input buffer of the command in execution

uint32_t fullSize: Specifies the size of the input of the command in execution

uint32_t partSize: Specifies the size of the chunck of the input currently processed

csec_key_id_t keyId: Specifies the key used for the command in execution

status_t errCode: Specifies the error code of the last executed command

const uint8_t *iv: Specifies the IV of the command in execution (for encryption/decryption using CBC mode)

csec_call_sequence_t seq: Specifies if the information is the first or a following function call.

uint32_t msgLen: Specifies the message size (in bits) for the command in execution (for MAC generation/verification)

bool *verifStatus: Specifies the result of the last executed MAC verification command

bool macWritten: Specifies if the MAC to be verified was written in CSE_PRAM for a MAC verification command

const uint8_t *mac: Specifies the MAC to be verified for a MAC verification command

uint32_t macLen: Specifies the number of bits of the MAC to be verified for a MAC verification command

security_callback_t callback: The callback invoked when an asynchronous command is completed

void *callbackParam: User parameter for the command completion callback

DMAMUX: Direct Memory Access Multiplexer Driver

void DMAMUX_Init(DMAMUX_Type *base)

Initializes the DMAMUX peripheral.

This function ungates the DMAMUX clock.

Parameters:

base – DMAMUX peripheral base address.

void DMAMUX_Deinit(DMAMUX_Type *base)

Deinitializes the DMAMUX peripheral.

This function gates the DMAMUX clock.

Parameters:

base – DMAMUX peripheral base address.

static inline void DMAMUX_EnableChannel(DMAMUX_Type *base, uint32_t channel)

Enables the DMAMUX channel.

This function enables the DMAMUX channel.

Parameters:

base – DMAMUX peripheral base address.
channel – DMAMUX channel number.

static inline void DMAMUX_DisableChannel(DMAMUX_Type *base, uint32_t channel)

Disables the DMAMUX channel.

This function disables the DMAMUX channel.

Note

The user must disable the DMAMUX channel before configuring it.

Parameters:

base – DMAMUX peripheral base address.
channel – DMAMUX channel number.

static inline void DMAMUX_SetSource(DMAMUX_Type *base, uint32_t channel, int32_t source)

Configures the DMAMUX channel source.

Parameters:

base – DMAMUX peripheral base address.
channel – DMAMUX channel number.
source – Channel source, which is used to trigger the DMA transfer.User need to use the dma_request_source_t type as the input parameter.

static inline void DMAMUX_EnablePeriodTrigger(DMAMUX_Type *base, uint32_t channel)

Enables the DMAMUX period trigger.

This function enables the DMAMUX period trigger feature.

Parameters:

base – DMAMUX peripheral base address.
channel – DMAMUX channel number.

static inline void DMAMUX_DisablePeriodTrigger(DMAMUX_Type *base, uint32_t channel)

Disables the DMAMUX period trigger.

This function disables the DMAMUX period trigger.

Parameters:

base – DMAMUX peripheral base address.
channel – DMAMUX channel number.

static inline void DMAMUX_EnableAlwaysOn(DMAMUX_Type *base, uint32_t channel, bool enable)

Enables the DMA channel to be always ON.

This function enables the DMAMUX channel always ON feature.

Parameters:

base – DMAMUX peripheral base address.
channel – DMAMUX channel number.
enable – Switcher of the always ON feature. “true” means enabled, “false” means disabled.

FSL_DMAMUX_DRIVER_VERSION: DMAMUX driver version 2.1.1.

DMAMUX_CHANNEL_ENDIAN_CONVERTn(channel): Macro used for dmamux channel endian convert.

eDMA: Enhanced Direct Memory Access (eDMA) Controller Driver

void EDMA_Init(DMA_Type *base, const edma_config_t *config)

Initializes the eDMA peripheral.

This function ungates the eDMA clock and configures the eDMA peripheral according to the configuration structure. All emda enabled request will be cleared in this function.

Note

This function enables the minor loop map feature.

Parameters:

base – eDMA peripheral base address.
config – A pointer to the configuration structure, see “edma_config_t”.

void EDMA_Deinit(DMA_Type *base)

Deinitializes the eDMA peripheral.

This function gates the eDMA clock.

Parameters:

base – eDMA peripheral base address.

void EDMA_InstallTCD(DMA_Type *base, uint32_t channel, edma_tcd_t *tcd)

Push content of TCD structure into hardware TCD register.

Parameters:

base – EDMA peripheral base address.
channel – EDMA channel number.
tcd – Point to TCD structure.

void EDMA_GetDefaultConfig(edma_config_t *config)

Gets the eDMA default configuration structure.

This function sets the configuration structure to default values. The default configuration is set to the following values.

config.enableContinuousLinkMode = false;
config.enableHaltOnError = true;
config.enableRoundRobinArbitration = false;
config.enableDebugMode = false;

Parameters:

config – A pointer to the eDMA configuration structure.

static inline void EDMA_EnableContinuousChannelLinkMode(DMA_Type *base, bool enable)

Enable/Disable continuous channel link mode.

Note

Do not use continuous link mode with a channel linking to itself if there is only one minor loop iteration per service request, for example, if the channel’s NBYTES value is the same as either the source or destination size. The same data transfer profile can be achieved by simply increasing the NBYTES value, which provides more efficient, faster processing.

Parameters:

base – EDMA peripheral base address.
enable – true is enable, false is disable.

static inline void EDMA_EnableMinorLoopMapping(DMA_Type *base, bool enable)

Enable/Disable minor loop mapping.

The TCDn.word2 is redefined to include individual enable fields, an offset field, and the NBYTES field.

Parameters:

base – EDMA peripheral base address.
enable – true is enable, false is disable.

void EDMA_ResetChannel(DMA_Type *base, uint32_t channel)

Sets all TCD registers to default values.

This function sets TCD registers for this channel to default values.

Note

This function must not be called while the channel transfer is ongoing or it causes unpredictable results.

Note

This function enables the auto stop request feature.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

void EDMA_SetTransferConfig(DMA_Type *base, uint32_t channel, const edma_transfer_config_t *config, edma_tcd_t *nextTcd)

Configures the eDMA transfer attribute.

This function configures the transfer attribute, including source address, destination address, transfer size, address offset, and so on. It also configures the scatter gather feature if the user supplies the TCD address. Example:

edma_transfer_t config;
edma_tcd_t tcd;
config.srcAddr = ..;
config.destAddr = ..;
...
EDMA_SetTransferConfig(DMA0, channel, &config, &stcd);

Note

If nextTcd is not NULL, it means scatter gather feature is enabled and DREQ bit is cleared in the previous transfer configuration, which is set in the eDMA_ResetChannel.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
config – Pointer to eDMA transfer configuration structure.
nextTcd – Point to TCD structure. It can be NULL if users do not want to enable scatter/gather feature.

void EDMA_SetMinorOffsetConfig(DMA_Type *base, uint32_t channel, const edma_minor_offset_config_t *config)

Configures the eDMA minor offset feature.

The minor offset means that the signed-extended value is added to the source address or destination address after each minor loop.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
config – A pointer to the minor offset configuration structure.

void EDMA_SetChannelPreemptionConfig(DMA_Type *base, uint32_t channel, const edma_channel_Preemption_config_t *config)

Configures the eDMA channel preemption feature.

This function configures the channel preemption attribute and the priority of the channel.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number
config – A pointer to the channel preemption configuration structure.

void EDMA_SetChannelLink(DMA_Type *base, uint32_t channel, edma_channel_link_type_t linkType, uint32_t linkedChannel)

Sets the channel link for the eDMA transfer.

This function configures either the minor link or the major link mode. The minor link means that the channel link is triggered every time CITER decreases by 1. The major link means that the channel link is triggered when the CITER is exhausted.

Note

Users should ensure that DONE flag is cleared before calling this interface, or the configuration is invalid.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
linkType – A channel link type, which can be one of the following:
- kEDMA_LinkNone
- kEDMA_MinorLink
- kEDMA_MajorLink
linkedChannel – The linked channel number.

void EDMA_SetBandWidth(DMA_Type *base, uint32_t channel, edma_bandwidth_t bandWidth)

Sets the bandwidth for the eDMA transfer.

Because the eDMA processes the minor loop, it continuously generates read/write sequences until the minor count is exhausted. The bandwidth forces the eDMA to stall after the completion of each read/write access to control the bus request bandwidth seen by the crossbar switch.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
bandWidth – A bandwidth setting, which can be one of the following:
- kEDMABandwidthStallNone
- kEDMABandwidthStall4Cycle
- kEDMABandwidthStall8Cycle

void EDMA_SetModulo(DMA_Type *base, uint32_t channel, edma_modulo_t srcModulo, edma_modulo_t destModulo)

Sets the source modulo and the destination modulo for the eDMA transfer.

This function defines a specific address range specified to be the value after (SADDR + SOFF)/(DADDR + DOFF) calculation is performed or the original register value. It provides the ability to implement a circular data queue easily.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
srcModulo – A source modulo value.
destModulo – A destination modulo value.

static inline void EDMA_EnableAsyncRequest(DMA_Type *base, uint32_t channel, bool enable)

Enables an async request for the eDMA transfer.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
enable – The command to enable (true) or disable (false).

static inline void EDMA_EnableAutoStopRequest(DMA_Type *base, uint32_t channel, bool enable)

Enables an auto stop request for the eDMA transfer.

If enabling the auto stop request, the eDMA hardware automatically disables the hardware channel request.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
enable – The command to enable (true) or disable (false).

void EDMA_EnableChannelInterrupts(DMA_Type *base, uint32_t channel, uint32_t mask)

Enables the interrupt source for the eDMA transfer.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
mask – The mask of interrupt source to be set. Users need to use the defined edma_interrupt_enable_t type.

void EDMA_DisableChannelInterrupts(DMA_Type *base, uint32_t channel, uint32_t mask)

Disables the interrupt source for the eDMA transfer.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
mask – The mask of the interrupt source to be set. Use the defined edma_interrupt_enable_t type.

void EDMA_SetMajorOffsetConfig(DMA_Type *base, uint32_t channel, int32_t sourceOffset, int32_t destOffset)

Configures the eDMA channel TCD major offset feature.

Adjustment value added to the source address at the completion of the major iteration count

Parameters:

base – eDMA peripheral base address.
channel – edma channel number.
sourceOffset – source address offset will be applied to source address after major loop done.
destOffset – destination address offset will be applied to source address after major loop done.

void EDMA_TcdReset(edma_tcd_t *tcd)

Sets all fields to default values for the TCD structure.

This function sets all fields for this TCD structure to default value.

Note

This function enables the auto stop request feature.

Parameters:

tcd – Pointer to the TCD structure.

void EDMA_TcdSetTransferConfig(edma_tcd_t *tcd, const edma_transfer_config_t *config, edma_tcd_t *nextTcd)

Configures the eDMA TCD transfer attribute.

The TCD is a transfer control descriptor. The content of the TCD is the same as the hardware TCD registers. The TCD is used in the scatter-gather mode. This function configures the TCD transfer attribute, including source address, destination address, transfer size, address offset, and so on. It also configures the scatter gather feature if the user supplies the next TCD address. Example:

edma_transfer_t config = {
...
}
edma_tcd_t tcd __aligned(32);
edma_tcd_t nextTcd __aligned(32);
EDMA_TcdSetTransferConfig(&tcd, &config, &nextTcd);

Note

TCD address should be 32 bytes aligned or it causes an eDMA error.

Note

If the nextTcd is not NULL, the scatter gather feature is enabled and DREQ bit is cleared in the previous transfer configuration, which is set in the EDMA_TcdReset.

Parameters:

tcd – Pointer to the TCD structure.
config – Pointer to eDMA transfer configuration structure.
nextTcd – Pointer to the next TCD structure. It can be NULL if users do not want to enable scatter/gather feature.

void EDMA_TcdSetMinorOffsetConfig(edma_tcd_t *tcd, const edma_minor_offset_config_t *config)

Configures the eDMA TCD minor offset feature.

A minor offset is a signed-extended value added to the source address or a destination address after each minor loop.

Parameters:

tcd – A point to the TCD structure.
config – A pointer to the minor offset configuration structure.

void EDMA_TcdSetChannelLink(edma_tcd_t *tcd, edma_channel_link_type_t linkType, uint32_t linkedChannel)

Sets the channel link for the eDMA TCD.

This function configures either a minor link or a major link. The minor link means the channel link is triggered every time CITER decreases by 1. The major link means that the channel link is triggered when the CITER is exhausted.

Note

Users should ensure that DONE flag is cleared before calling this interface, or the configuration is invalid.

Parameters:

tcd – Point to the TCD structure.
linkType – Channel link type, it can be one of:
- kEDMA_LinkNone
- kEDMA_MinorLink
- kEDMA_MajorLink
linkedChannel – The linked channel number.

static inline void EDMA_TcdSetBandWidth(edma_tcd_t *tcd, edma_bandwidth_t bandWidth)

Sets the bandwidth for the eDMA TCD.

Because the eDMA processes the minor loop, it continuously generates read/write sequences until the minor count is exhausted. The bandwidth forces the eDMA to stall after the completion of each read/write access to control the bus request bandwidth seen by the crossbar switch.

Parameters:

tcd – A pointer to the TCD structure.
bandWidth – A bandwidth setting, which can be one of the following:
- kEDMABandwidthStallNone
- kEDMABandwidthStall4Cycle
- kEDMABandwidthStall8Cycle

void EDMA_TcdSetModulo(edma_tcd_t *tcd, edma_modulo_t srcModulo, edma_modulo_t destModulo)

Sets the source modulo and the destination modulo for the eDMA TCD.

This function defines a specific address range specified to be the value after (SADDR + SOFF)/(DADDR + DOFF) calculation is performed or the original register value. It provides the ability to implement a circular data queue easily.

Parameters:

tcd – A pointer to the TCD structure.
srcModulo – A source modulo value.
destModulo – A destination modulo value.

static inline void EDMA_TcdEnableAutoStopRequest(edma_tcd_t *tcd, bool enable)

Sets the auto stop request for the eDMA TCD.

If enabling the auto stop request, the eDMA hardware automatically disables the hardware channel request.

Parameters:

tcd – A pointer to the TCD structure.
enable – The command to enable (true) or disable (false).

void EDMA_TcdEnableInterrupts(edma_tcd_t *tcd, uint32_t mask)

Enables the interrupt source for the eDMA TCD.

Parameters:

tcd – Point to the TCD structure.
mask – The mask of interrupt source to be set. Users need to use the defined edma_interrupt_enable_t type.

void EDMA_TcdDisableInterrupts(edma_tcd_t *tcd, uint32_t mask)

Disables the interrupt source for the eDMA TCD.

Parameters:

tcd – Point to the TCD structure.
mask – The mask of interrupt source to be set. Users need to use the defined edma_interrupt_enable_t type.

void EDMA_TcdSetMajorOffsetConfig(edma_tcd_t *tcd, int32_t sourceOffset, int32_t destOffset)

Configures the eDMA TCD major offset feature.

Adjustment value added to the source address at the completion of the major iteration count

Parameters:

tcd – A point to the TCD structure.
sourceOffset – source address offset wiil be applied to source address after major loop done.
destOffset – destination address offset will be applied to source address after major loop done.

static inline void EDMA_EnableChannelRequest(DMA_Type *base, uint32_t channel)

Enables the eDMA hardware channel request.

This function enables the hardware channel request.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

static inline void EDMA_DisableChannelRequest(DMA_Type *base, uint32_t channel)

Disables the eDMA hardware channel request.

This function disables the hardware channel request.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

static inline void EDMA_TriggerChannelStart(DMA_Type *base, uint32_t channel)

Starts the eDMA transfer by using the software trigger.

This function starts a minor loop transfer.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

uint32_t EDMA_GetRemainingMajorLoopCount(DMA_Type *base, uint32_t channel)

Gets the remaining major loop count from the eDMA current channel TCD.

This function checks the TCD (Task Control Descriptor) status for a specified eDMA channel and returns the number of major loop count that has not finished.

Note

1. This function can only be used to get unfinished major loop count of transfer without the next TCD, or it might be inaccuracy.

The unfinished/remaining transfer bytes cannot be obtained directly from registers while the channel is running. Because to calculate the remaining bytes, the initial NBYTES configured in DMA_TCDn_NBYTES_MLNO register is needed while the eDMA IP does not support getting it while a channel is active. In another word, the NBYTES value reading is always the actual (decrementing) NBYTES value the dma_engine is working with while a channel is running. Consequently, to get the remaining transfer bytes, a software-saved initial value of NBYTES (for example copied before enabling the channel) is needed. The formula to calculate it is shown below: RemainingBytes = RemainingMajorLoopCount * NBYTES(initially configured)

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

Returns:

Major loop count which has not been transferred yet for the current TCD.

static inline uint32_t EDMA_GetErrorStatusFlags(DMA_Type *base)

Gets the eDMA channel error status flags.

Parameters:

base – eDMA peripheral base address.

Returns:

The mask of error status flags. Users need to use the _edma_error_status_flags type to decode the return variables.

uint32_t EDMA_GetChannelStatusFlags(DMA_Type *base, uint32_t channel)

Gets the eDMA channel status flags.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

Returns:

The mask of channel status flags. Users need to use the _edma_channel_status_flags type to decode the return variables.

void EDMA_ClearChannelStatusFlags(DMA_Type *base, uint32_t channel, uint32_t mask)

Clears the eDMA channel status flags.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
mask – The mask of channel status to be cleared. Users need to use the defined _edma_channel_status_flags type.

void EDMA_CreateHandle(edma_handle_t *handle, DMA_Type *base, uint32_t channel)

Creates the eDMA handle.

This function is called if using the transactional API for eDMA. This function initializes the internal state of the eDMA handle.

Parameters:

handle – eDMA handle pointer. The eDMA handle stores callback function and parameters.
base – eDMA peripheral base address.
channel – eDMA channel number.

void EDMA_InstallTCDMemory(edma_handle_t *handle, edma_tcd_t *tcdPool, uint32_t tcdSize)

Installs the TCDs memory pool into the eDMA handle.

This function is called after the EDMA_CreateHandle to use scatter/gather feature. This function shall only be used while users need to use scatter gather mode. Scatter gather mode enables EDMA to load a new transfer control block (tcd) in hardware, and automatically reconfigure that DMA channel for a new transfer. Users need to prepare tcd memory and also configure tcds using interface EDMA_SubmitTransfer.

Parameters:

handle – eDMA handle pointer.
tcdPool – A memory pool to store TCDs. It must be 32 bytes aligned.
tcdSize – The number of TCD slots.

void EDMA_SetCallback(edma_handle_t *handle, edma_callback callback, void *userData)

Installs a callback function for the eDMA transfer.

This callback is called in the eDMA IRQ handler. Use the callback to do something after the current major loop transfer completes. This function will be called every time one tcd finished transfer.

Parameters:

handle – eDMA handle pointer.
callback – eDMA callback function pointer.
userData – A parameter for the callback function.

void EDMA_PrepareTransferConfig(edma_transfer_config_t *config, void *srcAddr, uint32_t srcWidth, int16_t srcOffset, void *destAddr, uint32_t destWidth, int16_t destOffset, uint32_t bytesEachRequest, uint32_t transferBytes)

Prepares the eDMA transfer structure configurations.

This function prepares the transfer configuration structure according to the user input.

Note

The data address and the data width must be consistent. For example, if the SRC is 4 bytes, the source address must be 4 bytes aligned, or it results in source address error (SAE).

Parameters:

config – The user configuration structure of type edma_transfer_t.
srcAddr – eDMA transfer source address.
srcWidth – eDMA transfer source address width(bytes).
srcOffset – source address offset.
destAddr – eDMA transfer destination address.
destWidth – eDMA transfer destination address width(bytes).
destOffset – destination address offset.
bytesEachRequest – eDMA transfer bytes per channel request.
transferBytes – eDMA transfer bytes to be transferred.

void EDMA_PrepareTransfer(edma_transfer_config_t *config, void *srcAddr, uint32_t srcWidth, void *destAddr, uint32_t destWidth, uint32_t bytesEachRequest, uint32_t transferBytes, edma_transfer_type_t transferType)

Prepares the eDMA transfer structure.

This function prepares the transfer configuration structure according to the user input.

Note

The data address and the data width must be consistent. For example, if the SRC is 4 bytes, the source address must be 4 bytes aligned, or it results in source address error (SAE).

Parameters:

config – The user configuration structure of type edma_transfer_t.
srcAddr – eDMA transfer source address.
srcWidth – eDMA transfer source address width(bytes).
destAddr – eDMA transfer destination address.
destWidth – eDMA transfer destination address width(bytes).
bytesEachRequest – eDMA transfer bytes per channel request.
transferBytes – eDMA transfer bytes to be transferred.
transferType – eDMA transfer type.

status_t EDMA_SubmitTransfer(edma_handle_t *handle, const edma_transfer_config_t *config)

Submits the eDMA transfer request.

This function submits the eDMA transfer request according to the transfer configuration structure. In scatter gather mode, call this function will add a configured tcd to the circular list of tcd pool. The tcd pools is setup by call function EDMA_InstallTCDMemory before.

Parameters:

handle – eDMA handle pointer.
config – Pointer to eDMA transfer configuration structure.

Return values:

kStatus_EDMA_Success – It means submit transfer request succeed.
kStatus_EDMA_QueueFull – It means TCD queue is full. Submit transfer request is not allowed.
kStatus_EDMA_Busy – It means the given channel is busy, need to submit request later.

void EDMA_StartTransfer(edma_handle_t *handle)

eDMA starts transfer.

This function enables the channel request. Users can call this function after submitting the transfer request or before submitting the transfer request.

Parameters:

handle – eDMA handle pointer.

void EDMA_StopTransfer(edma_handle_t *handle)

eDMA stops transfer.

This function disables the channel request to pause the transfer. Users can call EDMA_StartTransfer() again to resume the transfer.

Parameters:

handle – eDMA handle pointer.

void EDMA_AbortTransfer(edma_handle_t *handle)

eDMA aborts transfer.

This function disables the channel request and clear transfer status bits. Users can submit another transfer after calling this API.

Parameters:

handle – DMA handle pointer.

static inline uint32_t EDMA_GetUnusedTCDNumber(edma_handle_t *handle)

Get unused TCD slot number.

This function gets current tcd index which is run. If the TCD pool pointer is NULL, it will return 0.

Parameters:

handle – DMA handle pointer.

Returns:

The unused tcd slot number.

static inline uint32_t EDMA_GetNextTCDAddress(edma_handle_t *handle)

Get the next tcd address.

This function gets the next tcd address. If this is last TCD, return 0.

Parameters:

handle – DMA handle pointer.

Returns:

The next TCD address.

void EDMA_HandleIRQ(edma_handle_t *handle)

eDMA IRQ handler for the current major loop transfer completion.

This function clears the channel major interrupt flag and calls the callback function if it is not NULL.

Note: For the case using TCD queue, when the major iteration count is exhausted, additional operations are performed. These include the final address adjustments and reloading of the BITER field into the CITER. Assertion of an optional interrupt request also occurs at this time, as does a possible fetch of a new TCD from memory using the scatter/gather address pointer included in the descriptor (if scatter/gather is enabled).

For instance, when the time interrupt of TCD[0] happens, the TCD[1] has already been loaded into the eDMA engine. As sga and sga_index are calculated based on the DLAST_SGA bitfield lies in the TCD_CSR register, the sga_index in this case should be 2 (DLAST_SGA of TCD[1] stores the address of TCD[2]). Thus, the “tcdUsed” updated should be (tcdUsed - 2U) which indicates the number of TCDs can be loaded in the memory pool (because TCD[0] and TCD[1] have been loaded into the eDMA engine at this point already.).

For the last two continuous ISRs in a scatter/gather process, they both load the last TCD (The last ISR does not load a new TCD) from the memory pool to the eDMA engine when major loop completes. Therefore, ensure that the header and tcdUsed updated are identical for them. tcdUsed are both 0 in this case as no TCD to be loaded.

See the “eDMA basic data flow” in the eDMA Functional description section of the Reference Manual for further details.

Parameters:

handle – eDMA handle pointer.

FSL_EDMA_DRIVER_VERSION

eDMA driver version

Version 2.4.5.

enum _edma_transfer_size

eDMA transfer configuration

Values:

enumerator kEDMA_TransferSize1Bytes: Source/Destination data transfer size is 1 byte every time

enumerator kEDMA_TransferSize2Bytes: Source/Destination data transfer size is 2 bytes every time

enumerator kEDMA_TransferSize4Bytes: Source/Destination data transfer size is 4 bytes every time

enumerator kEDMA_TransferSize8Bytes: Source/Destination data transfer size is 8 bytes every time

enumerator kEDMA_TransferSize16Bytes: Source/Destination data transfer size is 16 bytes every time

enumerator kEDMA_TransferSize32Bytes: Source/Destination data transfer size is 32 bytes every time

enum _edma_modulo

eDMA modulo configuration

Values:

enumerator kEDMA_ModuloDisable: Disable modulo

enumerator kEDMA_Modulo2bytes: Circular buffer size is 2 bytes.

enumerator kEDMA_Modulo4bytes: Circular buffer size is 4 bytes.

enumerator kEDMA_Modulo8bytes: Circular buffer size is 8 bytes.

enumerator kEDMA_Modulo16bytes: Circular buffer size is 16 bytes.

enumerator kEDMA_Modulo32bytes: Circular buffer size is 32 bytes.

enumerator kEDMA_Modulo64bytes: Circular buffer size is 64 bytes.

enumerator kEDMA_Modulo128bytes: Circular buffer size is 128 bytes.

enumerator kEDMA_Modulo256bytes: Circular buffer size is 256 bytes.

enumerator kEDMA_Modulo512bytes: Circular buffer size is 512 bytes.

enumerator kEDMA_Modulo1Kbytes: Circular buffer size is 1 K bytes.

enumerator kEDMA_Modulo2Kbytes: Circular buffer size is 2 K bytes.

enumerator kEDMA_Modulo4Kbytes: Circular buffer size is 4 K bytes.

enumerator kEDMA_Modulo8Kbytes: Circular buffer size is 8 K bytes.

enumerator kEDMA_Modulo16Kbytes: Circular buffer size is 16 K bytes.

enumerator kEDMA_Modulo32Kbytes: Circular buffer size is 32 K bytes.

enumerator kEDMA_Modulo64Kbytes: Circular buffer size is 64 K bytes.

enumerator kEDMA_Modulo128Kbytes: Circular buffer size is 128 K bytes.

enumerator kEDMA_Modulo256Kbytes: Circular buffer size is 256 K bytes.

enumerator kEDMA_Modulo512Kbytes: Circular buffer size is 512 K bytes.

enumerator kEDMA_Modulo1Mbytes: Circular buffer size is 1 M bytes.

enumerator kEDMA_Modulo2Mbytes: Circular buffer size is 2 M bytes.

enumerator kEDMA_Modulo4Mbytes: Circular buffer size is 4 M bytes.

enumerator kEDMA_Modulo8Mbytes: Circular buffer size is 8 M bytes.

enumerator kEDMA_Modulo16Mbytes: Circular buffer size is 16 M bytes.

enumerator kEDMA_Modulo32Mbytes: Circular buffer size is 32 M bytes.

enumerator kEDMA_Modulo64Mbytes: Circular buffer size is 64 M bytes.

enumerator kEDMA_Modulo128Mbytes: Circular buffer size is 128 M bytes.

enumerator kEDMA_Modulo256Mbytes: Circular buffer size is 256 M bytes.

enumerator kEDMA_Modulo512Mbytes: Circular buffer size is 512 M bytes.

enumerator kEDMA_Modulo1Gbytes: Circular buffer size is 1 G bytes.

enumerator kEDMA_Modulo2Gbytes: Circular buffer size is 2 G bytes.

enum _edma_bandwidth

Bandwidth control.

Values:

enumerator kEDMA_BandwidthStallNone: No eDMA engine stalls.

enumerator kEDMA_BandwidthStall4Cycle: eDMA engine stalls for 4 cycles after each read/write.

enumerator kEDMA_BandwidthStall8Cycle: eDMA engine stalls for 8 cycles after each read/write.

enum _edma_channel_link_type

Channel link type.

Values:

enumerator kEDMA_LinkNone: No channel link

enumerator kEDMA_MinorLink: Channel link after each minor loop

enumerator kEDMA_MajorLink: Channel link while major loop count exhausted

_edma_channel_status_flags eDMA channel status flags.

Values:

enumerator kEDMA_DoneFlag: DONE flag, set while transfer finished, CITER value exhausted

enumerator kEDMA_ErrorFlag: eDMA error flag, an error occurred in a transfer

enumerator kEDMA_InterruptFlag: eDMA interrupt flag, set while an interrupt occurred of this channel

_edma_error_status_flags eDMA channel error status flags.

Values:

enumerator kEDMA_DestinationBusErrorFlag: Bus error on destination address

enumerator kEDMA_SourceBusErrorFlag: Bus error on the source address

enumerator kEDMA_ScatterGatherErrorFlag: Error on the Scatter/Gather address, not 32byte aligned.

enumerator kEDMA_NbytesErrorFlag: NBYTES/CITER configuration error

enumerator kEDMA_DestinationOffsetErrorFlag: Destination offset not aligned with destination size

enumerator kEDMA_DestinationAddressErrorFlag: Destination address not aligned with destination size

enumerator kEDMA_SourceOffsetErrorFlag: Source offset not aligned with source size

enumerator kEDMA_SourceAddressErrorFlag: Source address not aligned with source size

enumerator kEDMA_ErrorChannelFlag: Error channel number of the cancelled channel number

enumerator kEDMA_ChannelPriorityErrorFlag: Channel priority is not unique.

enumerator kEDMA_TransferCanceledFlag: Transfer cancelled

enumerator kEDMA_ValidFlag: No error occurred, this bit is 0. Otherwise, it is 1.

enum _edma_interrupt_enable

eDMA interrupt source

Values:

enumerator kEDMA_ErrorInterruptEnable: Enable interrupt while channel error occurs.

enumerator kEDMA_MajorInterruptEnable: Enable interrupt while major count exhausted.

enumerator kEDMA_HalfInterruptEnable: Enable interrupt while major count to half value.

enum _edma_transfer_type

eDMA transfer type

Values:

enumerator kEDMA_MemoryToMemory: Transfer from memory to memory

enumerator kEDMA_PeripheralToMemory: Transfer from peripheral to memory

enumerator kEDMA_MemoryToPeripheral: Transfer from memory to peripheral

enumerator kEDMA_PeripheralToPeripheral: Transfer from Peripheral to peripheral

_edma_transfer_status eDMA transfer status

Values:

enumerator kStatus_EDMA_QueueFull: TCD queue is full.

enumerator kStatus_EDMA_Busy: Channel is busy and can’t handle the transfer request.

typedef enum _edma_transfer_size edma_transfer_size_t: eDMA transfer configuration

typedef enum _edma_modulo edma_modulo_t: eDMA modulo configuration

typedef enum _edma_bandwidth edma_bandwidth_t: Bandwidth control.

typedef enum _edma_channel_link_type edma_channel_link_type_t: Channel link type.

typedef enum _edma_interrupt_enable edma_interrupt_enable_t: eDMA interrupt source

typedef enum _edma_transfer_type edma_transfer_type_t: eDMA transfer type

typedef struct _edma_config edma_config_t: eDMA global configuration structure.

typedef struct _edma_transfer_config edma_transfer_config_t

eDMA transfer configuration

This structure configures the source/destination transfer attribute.

typedef struct _edma_channel_Preemption_config edma_channel_Preemption_config_t: eDMA channel priority configuration

typedef struct _edma_minor_offset_config edma_minor_offset_config_t: eDMA minor offset configuration

typedef struct _edma_tcd edma_tcd_t

eDMA TCD.

This structure is same as TCD register which is described in reference manual, and is used to configure the scatter/gather feature as a next hardware TCD.

typedef void (*edma_callback)(struct _edma_handle *handle, void *userData, bool transferDone, uint32_t tcds)

Define callback function for eDMA.

This callback function is called in the EDMA interrupt handle. In normal mode, run into callback function means the transfer users need is done. In scatter gather mode, run into callback function means a transfer control block (tcd) is finished. Not all transfer finished, users can get the finished tcd numbers using interface EDMA_GetUnusedTCDNumber.

Param handle:: EDMA handle pointer, users shall not touch the values inside.
Param userData:: The callback user parameter pointer. Users can use this parameter to involve things users need to change in EDMA callback function.
Param transferDone:: If the current loaded transfer done. In normal mode it means if all transfer done. In scatter gather mode, this parameter shows is the current transfer block in EDMA register is done. As the load of core is different, it will be different if the new tcd loaded into EDMA registers while this callback called. If true, it always means new tcd still not loaded into registers, while false means new tcd already loaded into registers.
Param tcds:: How many tcds are done from the last callback. This parameter only used in scatter gather mode. It tells user how many tcds are finished between the last callback and this.

typedef struct _edma_handle edma_handle_t: eDMA transfer handle structure

DMA_DCHPRI_INDEX(channel): Compute the offset unit from DCHPRI3.

struct _edma_config

#include <fsl_edma.h>

eDMA global configuration structure.

Public Members

bool enableContinuousLinkMode: Enable (true) continuous link mode. Upon minor loop completion, the channel activates again if that channel has a minor loop channel link enabled and the link channel is itself.

bool enableHaltOnError: Enable (true) transfer halt on error. Any error causes the HALT bit to set. Subsequently, all service requests are ignored until the HALT bit is cleared.

bool enableRoundRobinArbitration: Enable (true) round robin channel arbitration method or fixed priority arbitration is used for channel selection

bool enableDebugMode: Enable(true) eDMA debug mode. When in debug mode, the eDMA stalls the start of a new channel. Executing channels are allowed to complete.

struct _edma_transfer_config

#include <fsl_edma.h>

eDMA transfer configuration

This structure configures the source/destination transfer attribute.

Public Members

uint32_t srcAddr: Source data address.

uint32_t destAddr: Destination data address.

edma_transfer_size_t srcTransferSize: Source data transfer size.

edma_transfer_size_t destTransferSize: Destination data transfer size.

int16_t srcOffset: Sign-extended offset applied to the current source address to form the next-state value as each source read is completed.

int16_t destOffset: Sign-extended offset applied to the current destination address to form the next-state value as each destination write is completed.

uint32_t minorLoopBytes: Bytes to transfer in a minor loop

uint32_t majorLoopCounts: Major loop iteration count.

struct _edma_channel_Preemption_config

#include <fsl_edma.h>

eDMA channel priority configuration

Public Members

bool enableChannelPreemption: If true: a channel can be suspended by other channel with higher priority

bool enablePreemptAbility: If true: a channel can suspend other channel with low priority

uint8_t channelPriority: Channel priority

struct _edma_minor_offset_config

#include <fsl_edma.h>

eDMA minor offset configuration

Public Members

bool enableSrcMinorOffset: Enable(true) or Disable(false) source minor loop offset.

bool enableDestMinorOffset: Enable(true) or Disable(false) destination minor loop offset.

uint32_t minorOffset: Offset for a minor loop mapping.

struct _edma_tcd

#include <fsl_edma.h>

eDMA TCD.

This structure is same as TCD register which is described in reference manual, and is used to configure the scatter/gather feature as a next hardware TCD.

Public Members

__IO uint32_t SADDR: SADDR register, used to save source address

__IO uint16_t SOFF: SOFF register, save offset bytes every transfer

__IO uint16_t ATTR: ATTR register, source/destination transfer size and modulo

__IO uint32_t NBYTES: Nbytes register, minor loop length in bytes

__IO uint32_t SLAST: SLAST register

__IO uint32_t DADDR: DADDR register, used for destination address

__IO uint16_t DOFF: DOFF register, used for destination offset

__IO uint16_t CITER: CITER register, current minor loop numbers, for unfinished minor loop.

__IO uint32_t DLAST_SGA: DLASTSGA register, next tcd address used in scatter-gather mode

__IO uint16_t CSR: CSR register, for TCD control status

__IO uint16_t BITER: BITER register, begin minor loop count.

struct _edma_handle

#include <fsl_edma.h>

eDMA transfer handle structure

Public Members

edma_callback callback: Callback function for major count exhausted.

void *userData: Callback function parameter.

DMA_Type *base: eDMA peripheral base address.

edma_tcd_t *tcdPool: Pointer to memory stored TCDs.

uint8_t channel: eDMA channel number.

volatile int8_t header: The first TCD index. Should point to the next TCD to be loaded into the eDMA engine.

volatile int8_t tail: The last TCD index. Should point to the next TCD to be stored into the memory pool.

volatile int8_t tcdUsed: The number of used TCD slots. Should reflect the number of TCDs can be used/loaded in the memory.

volatile int8_t tcdSize: The total number of TCD slots in the queue.

uint8_t flags: The status of the current channel.

ENET: Ethernet MAC Driver

void ENET_GetDefaultConfig(enet_config_t *config)

Gets the ENET default configuration structure.

The purpose of this API is to get the default ENET MAC controller configure structure for ENET_Init(). User may use the initialized structure unchanged in ENET_Init(), or modify some fields of the structure before calling ENET_Init(). Example:

enet_config_t config;
ENET_GetDefaultConfig(&config);

Parameters:

config – The ENET mac controller configuration structure pointer.

status_t ENET_Up(ENET_Type *base, enet_handle_t *handle, const enet_config_t *config, const enet_buffer_config_t *bufferConfig, uint8_t *macAddr, uint32_t srcClock_Hz)

Initializes the ENET module.

This function initializes the module with the ENET configuration.

Note

ENET has two buffer descriptors legacy buffer descriptors and enhanced IEEE 1588 buffer descriptors. The legacy descriptor is used by default. To use the IEEE 1588 feature, use the enhanced IEEE 1588 buffer descriptor by defining “ENET_ENHANCEDBUFFERDESCRIPTOR_MODE” and calling ENET_Ptp1588Configure() to configure the 1588 feature and related buffers after calling ENET_Up().

Parameters:

base – ENET peripheral base address.
handle – ENET handler pointer.
config – ENET mac configuration structure pointer. The “enet_config_t” type mac configuration return from ENET_GetDefaultConfig can be used directly. It is also possible to verify the Mac configuration using other methods.
bufferConfig – ENET buffer configuration structure pointer. The buffer configuration should be prepared for ENET Initialization. It is the start address of “ringNum” enet_buffer_config structures. To support added multi-ring features in some soc and compatible with the previous enet driver version. For single ring supported, this bufferConfig is a buffer configure structure pointer, for multi-ring supported and used case, this bufferConfig pointer should be a buffer configure structure array pointer.
macAddr – ENET mac address of Ethernet device. This MAC address should be provided.
srcClock_Hz – The internal module clock source for MII clock.

Return values:

kStatus_Success – Succeed to initialize the ethernet driver.
kStatus_ENET_InitMemoryFail – Init fails since buffer memory is not enough.

status_t ENET_Init(ENET_Type *base, enet_handle_t *handle, const enet_config_t *config, const enet_buffer_config_t *bufferConfig, uint8_t *macAddr, uint32_t srcClock_Hz)

Initializes the ENET module.

This function ungates the module clock and initializes it with the ENET configuration.

Note

ENET has two buffer descriptors legacy buffer descriptors and enhanced IEEE 1588 buffer descriptors. The legacy descriptor is used by default. To use the IEEE 1588 feature, use the enhanced IEEE 1588 buffer descriptor by defining “ENET_ENHANCEDBUFFERDESCRIPTOR_MODE” and calling ENET_Ptp1588Configure() to configure the 1588 feature and related buffers after calling ENET_Init().

Parameters:

base – ENET peripheral base address.
handle – ENET handler pointer.
config – ENET mac configuration structure pointer. The “enet_config_t” type mac configuration return from ENET_GetDefaultConfig can be used directly. It is also possible to verify the Mac configuration using other methods.
bufferConfig – ENET buffer configuration structure pointer. The buffer configuration should be prepared for ENET Initialization. It is the start address of “ringNum” enet_buffer_config structures. To support added multi-ring features in some soc and compatible with the previous enet driver version. For single ring supported, this bufferConfig is a buffer configure structure pointer, for multi-ring supported and used case, this bufferConfig pointer should be a buffer configure structure array pointer.
macAddr – ENET mac address of Ethernet device. This MAC address should be provided.
srcClock_Hz – The internal module clock source for MII clock.

Return values:

kStatus_Success – Succeed to initialize the ethernet driver.
kStatus_ENET_InitMemoryFail – Init fails since buffer memory is not enough.

void ENET_Down(ENET_Type *base)

Stops the ENET module.

This function disables the ENET module.

Parameters:

base – ENET peripheral base address.

void ENET_Deinit(ENET_Type *base)

Deinitializes the ENET module.

This function gates the module clock, clears ENET interrupts, and disables the ENET module.

Parameters:

base – ENET peripheral base address.

static inline void ENET_Reset(ENET_Type *base)

Resets the ENET module.

This function restores the ENET module to reset state. Note that this function sets all registers to reset state. As a result, the ENET module can’t work after calling this function.

Parameters:

base – ENET peripheral base address.

void ENET_SetMII(ENET_Type *base, enet_mii_speed_t speed, enet_mii_duplex_t duplex)

Sets the ENET MII speed and duplex.

This API is provided to dynamically change the speed and dulpex for MAC.

Parameters:

base – ENET peripheral base address.
speed – The speed of the RMII mode.
duplex – The duplex of the RMII mode.

void ENET_SetSMI(ENET_Type *base, uint32_t srcClock_Hz, bool isPreambleDisabled)

Sets the ENET SMI(serial management interface)- MII management interface.

Parameters:

base – ENET peripheral base address.
srcClock_Hz – This is the ENET module clock frequency. See clock distribution.
isPreambleDisabled – The preamble disable flag.
- true Enables the preamble.
- false Disables the preamble.

static inline bool ENET_GetSMI(ENET_Type *base)

Gets the ENET SMI- MII management interface configuration.

This API is used to get the SMI configuration to check whether the MII management interface has been set.

Parameters:

base – ENET peripheral base address.

Returns:

The SMI setup status true or false.

static inline uint32_t ENET_ReadSMIData(ENET_Type *base)

Reads data from the PHY register through an SMI interface.

Parameters:

base – ENET peripheral base address.

Returns:

The data read from PHY

static inline void ENET_StartSMIWrite(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, enet_mii_write_t operation, uint16_t data)

Sends the MDIO IEEE802.3 Clause 22 format write command.

After calling this function, need to check whether the transmission is over then do next MDIO operation. For ease of use, encapsulated ENET_MDIOWrite() can be called. For customized requirements, implement with combining separated APIs.

Parameters:

base – ENET peripheral base address.
phyAddr – The PHY address. Range from 0 ~ 31.
regAddr – The PHY register address. Range from 0 ~ 31.
operation – The write operation.
data – The data written to PHY.

static inline void ENET_StartSMIRead(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, enet_mii_read_t operation)

Sends the MDIO IEEE802.3 Clause 22 format read command.

After calling this function, need to check whether the transmission is over then do next MDIO operation. For ease of use, encapsulated ENET_MDIORead() can be called. For customized requirements, implement with combining separated APIs.

Parameters:

base – ENET peripheral base address.
phyAddr – The PHY address. Range from 0 ~ 31.
regAddr – The PHY register address. Range from 0 ~ 31.
operation – The read operation.

status_t ENET_MDIOWrite(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, uint16_t data)

MDIO write with IEEE802.3 Clause 22 format.

Parameters:

base – ENET peripheral base address.
phyAddr – The PHY address. Range from 0 ~ 31.
regAddr – The PHY register. Range from 0 ~ 31.
data – The data written to PHY.

Returns:

kStatus_Success MDIO access succeeds.

Returns:

kStatus_Timeout MDIO access timeout.

status_t ENET_MDIORead(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, uint16_t *pData)

MDIO read with IEEE802.3 Clause 22 format.

Parameters:

base – ENET peripheral base address.
phyAddr – The PHY address. Range from 0 ~ 31.
regAddr – The PHY register. Range from 0 ~ 31.
pData – The data read from PHY.

Returns:

kStatus_Success MDIO access succeeds.

Returns:

kStatus_Timeout MDIO access timeout.

static inline void ENET_StartExtC45SMIWriteReg(ENET_Type *base, uint8_t portAddr, uint8_t devAddr, uint16_t regAddr)

Sends the MDIO IEEE802.3 Clause 45 format write register command.

After calling this function, need to check whether the transmission is over then do next MDIO operation. For ease of use, encapsulated ENET_MDIOC45Write()/ENET_MDIOC45Read() can be called. For customized requirements, implement with combining separated APIs.

Parameters:

base – ENET peripheral base address.
portAddr – The MDIO port address(PHY address).
devAddr – The device address.
regAddr – The PHY register address.

static inline void ENET_StartExtC45SMIWriteData(ENET_Type *base, uint8_t portAddr, uint8_t devAddr, uint16_t data)

Sends the MDIO IEEE802.3 Clause 45 format write data command.

After calling this function, need to check whether the transmission is over then do next MDIO operation. For ease of use, encapsulated ENET_MDIOC45Write() can be called. For customized requirements, implement with combining separated APIs.

Parameters:

base – ENET peripheral base address.
portAddr – The MDIO port address(PHY address).
devAddr – The device address.
data – The data written to PHY.

static inline void ENET_StartExtC45SMIReadData(ENET_Type *base, uint8_t portAddr, uint8_t devAddr)

Sends the MDIO IEEE802.3 Clause 45 format read data command.

After calling this function, need to check whether the transmission is over then do next MDIO operation. For ease of use, encapsulated ENET_MDIOC45Read() can be called. For customized requirements, implement with combining separated APIs.

Parameters:

base – ENET peripheral base address.
portAddr – The MDIO port address(PHY address).
devAddr – The device address.

status_t ENET_MDIOC45Write(ENET_Type *base, uint8_t portAddr, uint8_t devAddr, uint16_t regAddr, uint16_t data)

MDIO write with IEEE802.3 Clause 45 format.

Parameters:

base – ENET peripheral base address.
portAddr – The MDIO port address(PHY address).
devAddr – The device address.
regAddr – The PHY register address.
data – The data written to PHY.

Returns:

kStatus_Success MDIO access succeeds.

Returns:

kStatus_Timeout MDIO access timeout.

status_t ENET_MDIOC45Read(ENET_Type *base, uint8_t portAddr, uint8_t devAddr, uint16_t regAddr, uint16_t *pData)

MDIO read with IEEE802.3 Clause 45 format.

Parameters:

base – ENET peripheral base address.
portAddr – The MDIO port address(PHY address).
devAddr – The device address.
regAddr – The PHY register address.
pData – The data read from PHY.

Returns:

kStatus_Success MDIO access succeeds.

Returns:

kStatus_Timeout MDIO access timeout.

static inline void ENET_SetRGMIIClockDelay(ENET_Type *base, bool txEnabled, bool rxEnabled)

Control the usage of the delayed tx/rx RGMII clock.

Parameters:

base – ENET peripheral base address.
txEnabled – Enable or disable to generate the delayed version of RGMII_TXC.
rxEnabled – Enable or disable to use the delayed version of RGMII_RXC.

void ENET_SetMacAddr(ENET_Type *base, uint8_t *macAddr)

Sets the ENET module Mac address.

Parameters:

base – ENET peripheral base address.
macAddr – The six-byte Mac address pointer. The pointer is allocated by application and input into the API.

void ENET_GetMacAddr(ENET_Type *base, uint8_t *macAddr)

Gets the ENET module Mac address.

Parameters:

base – ENET peripheral base address.
macAddr – The six-byte Mac address pointer. The pointer is allocated by application and input into the API.

void ENET_AddMulticastGroup(ENET_Type *base, uint8_t *address)

Adds the ENET device to a multicast group.

Parameters:

base – ENET peripheral base address.
address – The six-byte multicast group address which is provided by application.

void ENET_LeaveMulticastGroup(ENET_Type *base, uint8_t *address)

Moves the ENET device from a multicast group.

Parameters:

base – ENET peripheral base address.
address – The six-byte multicast group address which is provided by application.

static inline void ENET_ActiveRead(ENET_Type *base)

Activates frame reception for multiple rings.

This function is to active the enet read process.

Note

This must be called after the MAC configuration and state are ready. It must be called after the ENET_Init(). This should be called when the frame reception is required.

Parameters:

base – ENET peripheral base address.

static inline void ENET_EnableSleepMode(ENET_Type *base, bool enable)

Enables/disables the MAC to enter sleep mode. This function is used to set the MAC enter sleep mode. When entering sleep mode, the magic frame wakeup interrupt should be enabled to wake up MAC from the sleep mode and reset it to normal mode.

Parameters:

base – ENET peripheral base address.
enable – True enable sleep mode, false disable sleep mode.

static inline void ENET_GetAccelFunction(ENET_Type *base, uint32_t *txAccelOption, uint32_t *rxAccelOption)

Gets ENET transmit and receive accelerator functions from MAC controller.

Parameters:

base – ENET peripheral base address.
txAccelOption – The transmit accelerator option. The “enet_tx_accelerator_t” is recommended to be used to as the mask to get the exact the accelerator option.
rxAccelOption – The receive accelerator option. The “enet_rx_accelerator_t” is recommended to be used to as the mask to get the exact the accelerator option.

static inline void ENET_EnableInterrupts(ENET_Type *base, uint32_t mask)

Enables the ENET interrupt.

This function enables the ENET interrupt according to the provided mask. The mask is a logical OR of enumeration members. See enet_interrupt_enable_t. For example, to enable the TX frame interrupt and RX frame interrupt, do the following.

ENET_EnableInterrupts(ENET, kENET_TxFrameInterrupt | kENET_RxFrameInterrupt);

Parameters:

base – ENET peripheral base address.
mask – ENET interrupts to enable. This is a logical OR of the enumeration enet_interrupt_enable_t.

static inline void ENET_DisableInterrupts(ENET_Type *base, uint32_t mask)

Disables the ENET interrupt.

This function disables the ENET interrupts according to the provided mask. The mask is a logical OR of enumeration members. See enet_interrupt_enable_t. For example, to disable the TX frame interrupt and RX frame interrupt, do the following.

ENET_DisableInterrupts(ENET, kENET_TxFrameInterrupt | kENET_RxFrameInterrupt);

Parameters:

base – ENET peripheral base address.
mask – ENET interrupts to disable. This is a logical OR of the enumeration enet_interrupt_enable_t.

static inline uint32_t ENET_GetInterruptStatus(ENET_Type *base)

Gets the ENET interrupt status flag.

Parameters:

base – ENET peripheral base address.

Returns:

The event status of the interrupt source. This is the logical OR of members of the enumeration enet_interrupt_enable_t.

static inline void ENET_ClearInterruptStatus(ENET_Type *base, uint32_t mask)

Clears the ENET interrupt events status flag.

This function clears enabled ENET interrupts according to the provided mask. The mask is a logical OR of enumeration members. See the enet_interrupt_enable_t. For example, to clear the TX frame interrupt and RX frame interrupt, do the following.

ENET_ClearInterruptStatus(ENET, kENET_TxFrameInterrupt | kENET_RxFrameInterrupt);

Parameters:

base – ENET peripheral base address.
mask – ENET interrupt source to be cleared. This is the logical OR of members of the enumeration enet_interrupt_enable_t.

void ENET_SetRxISRHandler(ENET_Type *base, enet_isr_t ISRHandler)

Set the second level Rx IRQ handler.

Parameters:

base – ENET peripheral base address.
ISRHandler – The handler to install.

void ENET_SetTxISRHandler(ENET_Type *base, enet_isr_t ISRHandler)

Set the second level Tx IRQ handler.

Parameters:

base – ENET peripheral base address.
ISRHandler – The handler to install.

void ENET_SetErrISRHandler(ENET_Type *base, enet_isr_t ISRHandler)

Set the second level Err IRQ handler.

Parameters:

base – ENET peripheral base address.
ISRHandler – The handler to install.

void ENET_GetRxErrBeforeReadFrame(enet_handle_t *handle, enet_data_error_stats_t *eErrorStatic, uint8_t ringId)

Gets the error statistics of a received frame for ENET specified ring.

This API must be called after the ENET_GetRxFrameSize and before the ENET_ReadFrame(). If the ENET_GetRxFrameSize returns kStatus_ENET_RxFrameError, the ENET_GetRxErrBeforeReadFrame can be used to get the exact error statistics. This is an example.

status = ENET_GetRxFrameSize(&g_handle, &length, 0);
if (status == kStatus_ENET_RxFrameError)
{
    Comments: Get the error information of the received frame.
    ENET_GetRxErrBeforeReadFrame(&g_handle, &eErrStatic, 0);
    Comments: update the receive buffer.
    ENET_ReadFrame(EXAMPLE_ENET, &g_handle, NULL, 0);
}

Parameters:

handle – The ENET handler structure pointer. This is the same handler pointer used in the ENET_Init.
eErrorStatic – The error statistics structure pointer.
ringId – The ring index, range from 0 ~ (FSL_FEATURE_ENET_INSTANCE_QUEUEn(x) - 1).

void ENET_EnableStatistics(ENET_Type *base, bool enable)

Enables/disables collection of transfer statistics.

Note that this function does not reset any of the already collected data, use the function ENET_ResetStatistics to clear the transfer statistics if needed.

Parameters:

base – ENET peripheral base address.
enable – True enable statistics collection, false disable statistics collection.

void ENET_GetStatistics(ENET_Type *base, enet_transfer_stats_t *statistics)

Gets transfer statistics.

Copies the actual value of hardware counters into the provided structure. Calling this function does not reset the counters in hardware.

Parameters:

base – ENET peripheral base address.
statistics – The statistics structure pointer.

void ENET_ResetStatistics(ENET_Type *base)

Resets transfer statistics.

Sets the value of hardware transfer counters to zero.

Parameters:

base – ENET peripheral base address.

status_t ENET_GetRxFrameSize(enet_handle_t *handle, uint32_t *length, uint8_t ringId)

Gets the size of the read frame for specified ring.

This function gets a received frame size from the ENET buffer descriptors.

Note

The FCS of the frame is automatically removed by MAC and the size is the length without the FCS. After calling ENET_GetRxFrameSize, ENET_ReadFrame() should be called to receive frame and update the BD if the result is not “kStatus_ENET_RxFrameEmpty”.

Parameters:

handle – The ENET handler structure. This is the same handler pointer used in the ENET_Init.
length – The length of the valid frame received.
ringId – The ring index or ring number.

Return values:

kStatus_ENET_RxFrameEmpty – No frame received. Should not call ENET_ReadFrame to read frame.
kStatus_ENET_RxFrameError – Data error happens. ENET_ReadFrame should be called with NULL data and NULL length to update the receive buffers.
kStatus_Success – Receive a frame Successfully then the ENET_ReadFrame should be called with the right data buffer and the captured data length input.

status_t ENET_ReadFrame(ENET_Type *base, enet_handle_t *handle, uint8_t *data, uint32_t length, uint8_t ringId, uint32_t *ts)

Reads a frame from the ENET device. This function reads a frame (both the data and the length) from the ENET buffer descriptors. User can get timestamp through ts pointer if the ts is not NULL.

Note

It doesn’t store the timestamp in the receive timestamp queue. The ENET_GetRxFrameSize should be used to get the size of the prepared data buffer. This API uses memcpy to copy data from DMA buffer to application buffer, 4 bytes aligned data buffer in 32 bits platforms provided by user may let compiler use optimization instruction to reduce time consumption. This is an example:

uint32_t length;
enet_handle_t g_handle;
Comments: Get the received frame size firstly.
status = ENET_GetRxFrameSize(&g_handle, &length, 0);
if (length != 0)
{
    Comments: Allocate memory here with the size of "length"
    uint8_t *data = memory allocate interface;
    if (!data)
    {
        ENET_ReadFrame(ENET, &g_handle, NULL, 0, 0, NULL);
        Comments: Add the console warning log.
    }
    else
    {
        status = ENET_ReadFrame(ENET, &g_handle, data, length, 0, NULL);
        Comments: Call stack input API to deliver the data to stack
    }
}
else if (status == kStatus_ENET_RxFrameError)
{
    Comments: Update the received buffer when a error frame is received.
    ENET_ReadFrame(ENET, &g_handle, NULL, 0, 0, NULL);
}

Parameters:

base – ENET peripheral base address.
handle – The ENET handler structure. This is the same handler pointer used in the ENET_Init.
data – The data buffer provided by user to store the frame which memory size should be at least “length”.
length – The size of the data buffer which is still the length of the received frame.
ringId – The ring index or ring number.
ts – The timestamp address to store received timestamp.

Returns:

The execute status, successful or failure.

status_t ENET_SendFrame(ENET_Type *base, enet_handle_t *handle, const uint8_t *data, uint32_t length, uint8_t ringId, bool tsFlag, void *context)

Transmits an ENET frame for specified ring.

Note

The CRC is automatically appended to the data. Input the data to send without the CRC. This API uses memcpy to copy data from DMA buffer to application buffer, 4 bytes aligned data buffer in 32 bits platforms provided by user may let compiler use optimization instruction to reduce time consumption.

Parameters:

base – ENET peripheral base address.
handle – The ENET handler pointer. This is the same handler pointer used in the ENET_Init.
data – The data buffer provided by user to send.
length – The length of the data to send.
ringId – The ring index or ring number.
tsFlag – Timestamp enable flag.
context – Used by user to handle some events after transmit over.

Return values:

kStatus_Success – Send frame succeed.
kStatus_ENET_TxFrameBusy – Transmit buffer descriptor is busy under transmission. The transmit busy happens when the data send rate is over the MAC capacity. The waiting mechanism is recommended to be added after each call return with kStatus_ENET_TxFrameBusy.

status_t ENET_SetTxReclaim(enet_handle_t *handle, bool isEnable, uint8_t ringId)

Enable or disable tx descriptors reclaim mechanism.

Note

This function must be called when no pending send frame action. Set enable if you want to reclaim context or timestamp in interrupt.

Parameters:

handle – The ENET handler pointer. This is the same handler pointer used in the ENET_Init.
isEnable – Enable or disable flag.
ringId – The ring index or ring number.

Return values:

kStatus_Success – Succeed to enable/disable Tx reclaim.
kStatus_Fail – Fail to enable/disable Tx reclaim.

void ENET_ReclaimTxDescriptor(ENET_Type *base, enet_handle_t *handle, uint8_t ringId)

Reclaim tx descriptors. This function is used to update the tx descriptor status and store the tx timestamp when the 1588 feature is enabled. This is called by the transmit interupt IRQ handler after the complete of a frame transmission.

Parameters:

base – ENET peripheral base address.
handle – The ENET handler pointer. This is the same handler pointer used in the ENET_Init.
ringId – The ring index or ring number.

status_t ENET_GetRxFrame(ENET_Type *base, enet_handle_t *handle, enet_rx_frame_struct_t *rxFrame, uint8_t ringId)

Receives one frame in specified BD ring with zero copy.

This function uses the user-defined allocation and free callbacks. Every time application gets one frame through this function, driver stores the buffer address(es) in enet_buffer_struct_t and allocate new buffer(s) for the BD(s). If there’s no memory buffer in the pool, this function drops current one frame to keep the Rx frame in BD ring is as fresh as possible.

Note

Application must provide a memory pool including at least BD number + n buffers in order for this function to work properly, because each BD must always take one buffer while driver is running, then other extra n buffer(s) can be taken by application. Here n is the ceil(max_frame_length(set by RCR) / bd_rx_size(set by MRBR)). Application must also provide an array structure in rxFrame->rxBuffArray with n index to receive one complete frame in any case.

Parameters:

base – ENET peripheral base address.
handle – The ENET handler pointer. This is the same handler pointer used in the ENET_Init.
rxFrame – The received frame information structure provided by user.
ringId – The ring index or ring number.

Return values:

kStatus_Success – Succeed to get one frame and allocate new memory for Rx buffer.
kStatus_ENET_RxFrameEmpty – There’s no Rx frame in the BD.
kStatus_ENET_RxFrameError – There’s issue in this receiving.
kStatus_ENET_RxFrameDrop – There’s no new buffer memory for BD, drop this frame.

status_t ENET_StartTxFrame(ENET_Type *base, enet_handle_t *handle, enet_tx_frame_struct_t *txFrame, uint8_t ringId)

Sends one frame in specified BD ring with zero copy.

This function supports scattered buffer transmit, user needs to provide the buffer array.

Note

Tx reclaim should be enabled to ensure the Tx buffer ownership can be given back to application after Tx is over.

Parameters:

base – ENET peripheral base address.
handle – The ENET handler pointer. This is the same handler pointer used in the ENET_Init.
txFrame – The Tx frame structure.
ringId – The ring index or ring number.

Return values:

kStatus_Success – Succeed to send one frame.
kStatus_ENET_TxFrameBusy – The BD is not ready for Tx or the reclaim operation still not finishs.
kStatus_ENET_TxFrameOverLen – The Tx frame length is over max ethernet frame length.

void ENET_TransmitIRQHandler(ENET_Type *base, enet_handle_t *handle)

The transmit IRQ handler.

Parameters:

base – ENET peripheral base address.
handle – The ENET handler pointer.

void ENET_ReceiveIRQHandler(ENET_Type *base, enet_handle_t *handle)

The receive IRQ handler.

Parameters:

base – ENET peripheral base address.
handle – The ENET handler pointer.

void ENET_ErrorIRQHandler(ENET_Type *base, enet_handle_t *handle)

Some special IRQ handler including the error, mii, wakeup irq handler.

Parameters:

base – ENET peripheral base address.
handle – The ENET handler pointer.

void ENET_Ptp1588IRQHandler(ENET_Type *base)

the common IRQ handler for the 1588 irq handler.

This is used for the 1588 timer interrupt.

Parameters:

base – ENET peripheral base address.

void ENET_CommonFrame0IRQHandler(ENET_Type *base)

the common IRQ handler for the tx/rx/error etc irq handler.

This is used for the combined tx/rx/error interrupt for single/mutli-ring (frame 0).

Parameters:

base – ENET peripheral base address.

FSL_ENET_DRIVER_VERSION: Defines the driver version.

ENET_BUFFDESCRIPTOR_RX_EMPTY_MASK: Empty bit mask.

ENET_BUFFDESCRIPTOR_RX_SOFTOWNER1_MASK: Software owner one mask.

ENET_BUFFDESCRIPTOR_RX_WRAP_MASK: Next buffer descriptor is the start address.

ENET_BUFFDESCRIPTOR_RX_SOFTOWNER2_Mask: Software owner two mask.

ENET_BUFFDESCRIPTOR_RX_LAST_MASK: Last BD of the frame mask.

ENET_BUFFDESCRIPTOR_RX_MISS_MASK: Received because of the promiscuous mode.

ENET_BUFFDESCRIPTOR_RX_BROADCAST_MASK: Broadcast packet mask.

ENET_BUFFDESCRIPTOR_RX_MULTICAST_MASK: Multicast packet mask.

ENET_BUFFDESCRIPTOR_RX_LENVLIOLATE_MASK: Length violation mask.

ENET_BUFFDESCRIPTOR_RX_NOOCTET_MASK: Non-octet aligned frame mask.

ENET_BUFFDESCRIPTOR_RX_CRC_MASK: CRC error mask.

ENET_BUFFDESCRIPTOR_RX_OVERRUN_MASK: FIFO overrun mask.

ENET_BUFFDESCRIPTOR_RX_TRUNC_MASK: Frame is truncated mask.

ENET_BUFFDESCRIPTOR_TX_READY_MASK: Ready bit mask.

ENET_BUFFDESCRIPTOR_TX_SOFTOWENER1_MASK: Software owner one mask.

ENET_BUFFDESCRIPTOR_TX_WRAP_MASK: Wrap buffer descriptor mask.

ENET_BUFFDESCRIPTOR_TX_SOFTOWENER2_MASK: Software owner two mask.

ENET_BUFFDESCRIPTOR_TX_LAST_MASK: Last BD of the frame mask.

ENET_BUFFDESCRIPTOR_TX_TRANMITCRC_MASK: Transmit CRC mask.

ENET_FRAME_MAX_FRAMELEN: Default maximum Ethernet frame size without VLAN tag.

ENET_FRAME_VLAN_TAGLEN: Ethernet single VLAN tag size.

ENET_FRAME_CRC_LEN: CRC size in a frame.

ENET_FRAME_TX_LEN_LIMITATION(x)

ENET_FIFO_MIN_RX_FULL: ENET minimum receive FIFO full.

ENET_RX_MIN_BUFFERSIZE: ENET minimum buffer size.

ENET_PHY_MAXADDRESS: Maximum PHY address.

ENET_TX_INTERRUPT: Enet Tx interrupt flag.

ENET_RX_INTERRUPT: Enet Rx interrupt flag.

ENET_TS_INTERRUPT: Enet timestamp interrupt flag.

ENET_ERR_INTERRUPT: Enet error interrupt flag.

Defines the status return codes for transaction.

Values:

enumerator kStatus_ENET_InitMemoryFail: Init fails since buffer memory is not enough.

enumerator kStatus_ENET_RxFrameError: A frame received but data error happen.

enumerator kStatus_ENET_RxFrameFail: Failed to receive a frame.

enumerator kStatus_ENET_RxFrameEmpty: No frame arrive.

enumerator kStatus_ENET_RxFrameDrop: Rx frame is dropped since no buffer memory.

enumerator kStatus_ENET_TxFrameOverLen: Tx frame over length.

enumerator kStatus_ENET_TxFrameBusy: Tx buffer descriptors are under process.

enumerator kStatus_ENET_TxFrameFail: Transmit frame fail.

enum _enet_mii_mode

Defines the MII/RMII/RGMII mode for data interface between the MAC and the PHY.

Values:

enumerator kENET_MiiMode: MII mode for data interface.

enumerator kENET_RmiiMode: RMII mode for data interface.

enumerator kENET_RgmiiMode: RGMII mode for data interface.

enum _enet_mii_speed

Defines the 10/100/1000 Mbps speed for the MII data interface.

Notice: “kENET_MiiSpeed1000M” only supported when mii mode is “kENET_RgmiiMode”.

Values:

enumerator kENET_MiiSpeed10M: Speed 10 Mbps.

enumerator kENET_MiiSpeed100M: Speed 100 Mbps.

enumerator kENET_MiiSpeed1000M: Speed 1000M bps.

enum _enet_mii_duplex

Defines the half or full duplex for the MII data interface.

Values:

enumerator kENET_MiiHalfDuplex: Half duplex mode.

enumerator kENET_MiiFullDuplex: Full duplex mode.

enum _enet_mii_write

Define the MII opcode for normal MDIO_CLAUSES_22 Frame.

Values:

enumerator kENET_MiiWriteNoCompliant: Write frame operation, but not MII-compliant.

enumerator kENET_MiiWriteValidFrame: Write frame operation for a valid MII management frame.

enum _enet_mii_read

Defines the read operation for the MII management frame.

Values:

enumerator kENET_MiiReadValidFrame: Read frame operation for a valid MII management frame.

enumerator kENET_MiiReadNoCompliant: Read frame operation, but not MII-compliant.

enum _enet_mii_extend_opcode

Define the MII opcode for extended MDIO_CLAUSES_45 Frame.

Values:

enumerator kENET_MiiAddrWrite_C45: Address Write operation.

enumerator kENET_MiiWriteFrame_C45: Write frame operation for a valid MII management frame.

enumerator kENET_MiiReadFrame_C45: Read frame operation for a valid MII management frame.

enum _enet_special_control_flag

Defines a special configuration for ENET MAC controller.

These control flags are provided for special user requirements. Normally, these control flags are unused for ENET initialization. For special requirements, set the flags to macSpecialConfig in the enet_config_t. The kENET_ControlStoreAndFwdDisable is used to disable the FIFO store and forward. FIFO store and forward means that the FIFO read/send is started when a complete frame is stored in TX/RX FIFO. If this flag is set, configure rxFifoFullThreshold and txFifoWatermark in the enet_config_t.

Values:

enumerator kENET_ControlFlowControlEnable: Enable ENET flow control: pause frame.

enumerator kENET_ControlRxPayloadCheckEnable: Enable ENET receive payload length check.

enumerator kENET_ControlRxPadRemoveEnable: Padding is removed from received frames.

enumerator kENET_ControlRxBroadCastRejectEnable: Enable broadcast frame reject.

enumerator kENET_ControlMacAddrInsert: Enable MAC address insert.

enumerator kENET_ControlStoreAndFwdDisable: Enable FIFO store and forward.

enumerator kENET_ControlSMIPreambleDisable: Enable SMI preamble.

enumerator kENET_ControlPromiscuousEnable: Enable promiscuous mode.

enumerator kENET_ControlMIILoopEnable: Enable ENET MII loop back.

enumerator kENET_ControlVLANTagEnable: Enable normal VLAN (single vlan tag).

enumerator kENET_ControlSVLANEnable: Enable S-VLAN.

enumerator kENET_ControlVLANUseSecondTag: Enable extracting the second vlan tag for further processing.

enum _enet_interrupt_enable

List of interrupts supported by the peripheral. This enumeration uses one-bit encoding to allow a logical OR of multiple members. Members usually map to interrupt enable bits in one or more peripheral registers.

Values:

enumerator kENET_BabrInterrupt: Babbling receive error interrupt source

enumerator kENET_BabtInterrupt: Babbling transmit error interrupt source

enumerator kENET_GraceStopInterrupt: Graceful stop complete interrupt source

enumerator kENET_TxFrameInterrupt: TX FRAME interrupt source

enumerator kENET_TxBufferInterrupt: TX BUFFER interrupt source

enumerator kENET_RxFrameInterrupt: RX FRAME interrupt source

enumerator kENET_RxBufferInterrupt: RX BUFFER interrupt source

enumerator kENET_MiiInterrupt: MII interrupt source

enumerator kENET_EBusERInterrupt: Ethernet bus error interrupt source

enumerator kENET_LateCollisionInterrupt: Late collision interrupt source

enumerator kENET_RetryLimitInterrupt: Collision Retry Limit interrupt source

enumerator kENET_UnderrunInterrupt: Transmit FIFO underrun interrupt source

enumerator kENET_PayloadRxInterrupt: Payload Receive error interrupt source

enumerator kENET_WakeupInterrupt: WAKEUP interrupt source

enumerator kENET_TsAvailInterrupt: TS AVAIL interrupt source for PTP

enumerator kENET_TsTimerInterrupt: TS WRAP interrupt source for PTP

enum _enet_event

Defines the common interrupt event for callback use.

Values:

enumerator kENET_RxEvent: Receive event.

enumerator kENET_TxEvent: Transmit event.

enumerator kENET_ErrEvent: Error event: BABR/BABT/EBERR/LC/RL/UN/PLR .

enumerator kENET_WakeUpEvent: Wake up from sleep mode event.

enumerator kENET_TimeStampEvent: Time stamp event.

enumerator kENET_TimeStampAvailEvent: Time stamp available event.

enum _enet_idle_slope

Defines certain idle slope for bandwidth fraction.

Values:

enumerator kENET_IdleSlope1: The bandwidth fraction is about 0.002.

enumerator kENET_IdleSlope2: The bandwidth fraction is about 0.003.

enumerator kENET_IdleSlope4: The bandwidth fraction is about 0.008.

enumerator kENET_IdleSlope8: The bandwidth fraction is about 0.02.

enumerator kENET_IdleSlope16: The bandwidth fraction is about 0.03.

enumerator kENET_IdleSlope32: The bandwidth fraction is about 0.06.

enumerator kENET_IdleSlope64: The bandwidth fraction is about 0.11.

enumerator kENET_IdleSlope128: The bandwidth fraction is about 0.20.

enumerator kENET_IdleSlope256: The bandwidth fraction is about 0.33.

enumerator kENET_IdleSlope384: The bandwidth fraction is about 0.43.

enumerator kENET_IdleSlope512: The bandwidth fraction is about 0.50.

enumerator kENET_IdleSlope640: The bandwidth fraction is about 0.56.

enumerator kENET_IdleSlope768: The bandwidth fraction is about 0.60.

enumerator kENET_IdleSlope896: The bandwidth fraction is about 0.64.

enumerator kENET_IdleSlope1024: The bandwidth fraction is about 0.67.

enumerator kENET_IdleSlope1152: The bandwidth fraction is about 0.69.

enumerator kENET_IdleSlope1280: The bandwidth fraction is about 0.71.

enumerator kENET_IdleSlope1408: The bandwidth fraction is about 0.73.

enumerator kENET_IdleSlope1536: The bandwidth fraction is about 0.75.

enum _enet_tx_accelerator

Defines the transmit accelerator configuration.

Note that the hardware does not insert ICMPv6 protocol checksums as mentioned in errata ERR052152.

Values:

enumerator kENET_TxAccelIsShift16Enabled: Transmit FIFO shift-16.

enumerator kENET_TxAccelIpCheckEnabled: Insert IP header checksum.

enumerator kENET_TxAccelProtoCheckEnabled: Insert protocol checksum (TCP, UDP, ICMPv4).

enum _enet_rx_accelerator

Defines the receive accelerator configuration.

Note that the hardware does not validate ICMPv6 protocol checksums as mentioned in errata ERR052152.

Values:

enumerator kENET_RxAccelPadRemoveEnabled: Padding removal for short IP frames.

enumerator kENET_RxAccelIpCheckEnabled: Discard with wrong IP header checksum.

enumerator kENET_RxAccelProtoCheckEnabled: Discard with wrong protocol checksum (TCP, UDP, ICMPv4).

enumerator kENET_RxAccelMacCheckEnabled: Discard with Mac layer errors.

enumerator kENET_RxAccelisShift16Enabled: Receive FIFO shift-16.

typedef enum _enet_mii_mode enet_mii_mode_t: Defines the MII/RMII/RGMII mode for data interface between the MAC and the PHY.

typedef enum _enet_mii_speed enet_mii_speed_t

Defines the 10/100/1000 Mbps speed for the MII data interface.

Notice: “kENET_MiiSpeed1000M” only supported when mii mode is “kENET_RgmiiMode”.

typedef enum _enet_mii_duplex enet_mii_duplex_t: Defines the half or full duplex for the MII data interface.

typedef enum _enet_mii_write enet_mii_write_t: Define the MII opcode for normal MDIO_CLAUSES_22 Frame.

typedef enum _enet_mii_read enet_mii_read_t: Defines the read operation for the MII management frame.

typedef enum _enet_mii_extend_opcode enet_mii_extend_opcode: Define the MII opcode for extended MDIO_CLAUSES_45 Frame.

typedef enum _enet_special_control_flag enet_special_control_flag_t

Defines a special configuration for ENET MAC controller.

These control flags are provided for special user requirements. Normally, these control flags are unused for ENET initialization. For special requirements, set the flags to macSpecialConfig in the enet_config_t. The kENET_ControlStoreAndFwdDisable is used to disable the FIFO store and forward. FIFO store and forward means that the FIFO read/send is started when a complete frame is stored in TX/RX FIFO. If this flag is set, configure rxFifoFullThreshold and txFifoWatermark in the enet_config_t.

typedef enum _enet_interrupt_enable enet_interrupt_enable_t: List of interrupts supported by the peripheral. This enumeration uses one-bit encoding to allow a logical OR of multiple members. Members usually map to interrupt enable bits in one or more peripheral registers.

typedef enum _enet_event enet_event_t: Defines the common interrupt event for callback use.

typedef enum _enet_idle_slope enet_idle_slope_t: Defines certain idle slope for bandwidth fraction.

typedef enum _enet_tx_accelerator enet_tx_accelerator_t

Defines the transmit accelerator configuration.

Note that the hardware does not insert ICMPv6 protocol checksums as mentioned in errata ERR052152.

typedef enum _enet_rx_accelerator enet_rx_accelerator_t

Defines the receive accelerator configuration.

Note that the hardware does not validate ICMPv6 protocol checksums as mentioned in errata ERR052152.

typedef struct _enet_rx_bd_struct enet_rx_bd_struct_t: Defines the receive buffer descriptor structure for the little endian system.

typedef struct _enet_tx_bd_struct enet_tx_bd_struct_t: Defines the enhanced transmit buffer descriptor structure for the little endian system.

typedef struct _enet_data_error_stats enet_data_error_stats_t: Defines the ENET data error statistics structure.

typedef struct _enet_rx_frame_error enet_rx_frame_error_t: Defines the Rx frame error structure.

typedef struct _enet_transfer_stats enet_transfer_stats_t: Defines the ENET transfer statistics structure.

typedef struct enet_frame_info enet_frame_info_t: Defines the frame info structure.

typedef struct _enet_tx_dirty_ring enet_tx_dirty_ring_t: Defines the ENET transmit dirty addresses ring/queue structure.

typedef void *(*enet_rx_alloc_callback_t)(ENET_Type *base, void *userData, uint8_t ringId): Defines the ENET Rx memory buffer alloc function pointer.

typedef void (*enet_rx_free_callback_t)(ENET_Type *base, void *buffer, void *userData, uint8_t ringId): Defines the ENET Rx memory buffer free function pointer.

typedef struct _enet_buffer_config enet_buffer_config_t

Defines the receive buffer descriptor configuration structure.

Note that for the internal DMA requirements, the buffers have a corresponding alignment requirements.

The aligned receive and transmit buffer size must be evenly divisible by ENET_BUFF_ALIGNMENT. when the data buffers are in cacheable region when cache is enabled, all those size should be aligned to the maximum value of “ENET_BUFF_ALIGNMENT” and the cache line size.
The aligned transmit and receive buffer descriptor start address must be at least 64 bit aligned. However, it’s recommended to be evenly divisible by ENET_BUFF_ALIGNMENT. buffer descriptors should be put in non-cacheable region when cache is enabled.
The aligned transmit and receive data buffer start address must be evenly divisible by ENET_BUFF_ALIGNMENT. Receive buffers should be continuous with the total size equal to “rxBdNumber * rxBuffSizeAlign”. Transmit buffers should be continuous with the total size equal to “txBdNumber * txBuffSizeAlign”. when the data buffers are in cacheable region when cache is enabled, all those size should be aligned to the maximum value of “ENET_BUFF_ALIGNMENT” and the cache line size.

typedef struct _enet_intcoalesce_config enet_intcoalesce_config_t: Defines the interrupt coalescing configure structure.

typedef struct _enet_avb_config enet_avb_config_t

Defines the ENET AVB Configure structure.

This is used for to configure the extended ring 1 and ring 2.

The classification match format is (CMP3 << 12) | (CMP2 << 8) | (CMP1 << 4) | CMP0. composed of four 3-bit compared VLAN priority field cmp0~cmp3, cm0 ~ cmp3 are used in parallel.

If CMP1,2,3 are not unused, please set them to the same value as CMP0.

The idleSlope is used to calculate the Band Width fraction, BW fraction = 1 / (1 + 512/idleSlope). For avb configuration, the BW fraction of Class 1 and Class 2 combined must not exceed 0.75.

typedef struct _enet_handle enet_handle_t

typedef void (*enet_callback_t)(ENET_Type *base, enet_handle_t *handle, enet_event_t event, enet_frame_info_t *frameInfo, void *userData): ENET callback function.

typedef struct _enet_config enet_config_t

Defines the basic configuration structure for the ENET device.

Note:

macSpecialConfig is used for a special control configuration, A logical OR of “enet_special_control_flag_t”. For a special configuration for MAC, set this parameter to 0.
txWatermark is used for a cut-through operation. It is in steps of 64 bytes: 0/1 - 64 bytes written to TX FIFO before transmission of a frame begins. 2 - 128 bytes written to TX FIFO …. 3 - 192 bytes written to TX FIFO …. The maximum of txWatermark is 0x2F - 4032 bytes written to TX FIFO …. txWatermark allows minimizing the transmit latency to set the txWatermark to 0 or 1 or for larger bus access latency 3 or larger due to contention for the system bus.
rxFifoFullThreshold is similar to the txWatermark for cut-through operation in RX. It is in 64-bit words. The minimum is ENET_FIFO_MIN_RX_FULL and the maximum is 0xFF. If the end of the frame is stored in FIFO and the frame size if smaller than the txWatermark, the frame is still transmitted. The rule is the same for rxFifoFullThreshold in the receive direction.
When “kENET_ControlFlowControlEnable” is set in the macSpecialConfig, ensure that the pauseDuration, rxFifoEmptyThreshold, and rxFifoStatEmptyThreshold are set for flow control enabled case.
When “kENET_ControlStoreAndFwdDisabled” is set in the macSpecialConfig, ensure that the rxFifoFullThreshold and txFifoWatermark are set for store and forward disable.
The rxAccelerConfig and txAccelerConfig default setting with 0 - accelerator are disabled. The “enet_tx_accelerator_t” and “enet_rx_accelerator_t” are recommended to be used to enable the transmit and receive accelerator. After the accelerators are enabled, the store and forward feature should be enabled. As a result, kENET_ControlStoreAndFwdDisabled should not be set.
The intCoalesceCfg can be used in the rx or tx enabled cases to decrese the CPU loading.

typedef struct _enet_tx_bd_ring enet_tx_bd_ring_t: Defines the ENET transmit buffer descriptor ring/queue structure.

typedef struct _enet_rx_bd_ring enet_rx_bd_ring_t: Defines the ENET receive buffer descriptor ring/queue structure.

typedef struct _enet_buffer_struct enet_buffer_struct_t

typedef struct _enet_rx_frame_attribute_struct enet_rx_frame_attribute_t

typedef struct _enet_rx_frame_struct enet_rx_frame_struct_t

typedef struct _enet_tx_frame_struct enet_tx_frame_struct_t

typedef void (*enet_isr_t)(ENET_Type *base, enet_handle_t *handle): Define interrupt IRQ handler.

const clock_ip_name_t s_enetClock[]: Pointers to enet clocks for each instance.

uint32_t ENET_GetInstance(ENET_Type *base)

Get the ENET instance from peripheral base address.

Parameters:

base – ENET peripheral base address.

Returns:

ENET instance.

ENET_BUFFDESCRIPTOR_RX_ERR_MASK: Defines the receive error status flag mask.

struct _enet_rx_bd_struct

#include <fsl_enet.h>

Defines the receive buffer descriptor structure for the little endian system.

Public Members

uint16_t length: Buffer descriptor data length.

uint16_t control: Buffer descriptor control and status.

uint32_t buffer: Data buffer pointer.

struct _enet_tx_bd_struct

#include <fsl_enet.h>

Defines the enhanced transmit buffer descriptor structure for the little endian system.

Public Members

uint16_t length: Buffer descriptor data length.

uint16_t control: Buffer descriptor control and status.

uint32_t buffer: Data buffer pointer.

struct _enet_data_error_stats

#include <fsl_enet.h>

Defines the ENET data error statistics structure.

Public Members

uint32_t statsRxLenGreaterErr: Receive length greater than RCR[MAX_FL].

uint32_t statsRxAlignErr: Receive non-octet alignment/

uint32_t statsRxFcsErr: Receive CRC error.

uint32_t statsRxOverRunErr: Receive over run.

uint32_t statsRxTruncateErr: Receive truncate.

struct _enet_rx_frame_error

#include <fsl_enet.h>

Defines the Rx frame error structure.

Public Members

bool statsRxTruncateErr: Receive truncate.

bool statsRxOverRunErr: Receive over run.

bool statsRxFcsErr: Receive CRC error.

bool statsRxAlignErr: Receive non-octet alignment.

bool statsRxLenGreaterErr: Receive length greater than RCR[MAX_FL].

struct _enet_transfer_stats

#include <fsl_enet.h>

Defines the ENET transfer statistics structure.

Public Members

uint32_t statsRxFrameCount: Rx frame number.

uint32_t statsRxFrameOk: Good Rx frame number.

uint32_t statsRxCrcErr: Rx frame number with CRC error.

uint32_t statsRxAlignErr: Rx frame number with alignment error.

uint32_t statsRxDropInvalidSFD: Dropped frame number due to invalid SFD.

uint32_t statsRxFifoOverflowErr: Rx FIFO overflow count.

uint32_t statsTxFrameCount: Tx frame number.

uint32_t statsTxFrameOk: Good Tx frame number.

uint32_t statsTxCrcAlignErr: The transmit frame is error.

uint32_t statsTxFifoUnderRunErr: Tx FIFO underrun count.

struct enet_frame_info

#include <fsl_enet.h>

Defines the frame info structure.

Public Members

void *context: User specified data

struct _enet_tx_dirty_ring

#include <fsl_enet.h>

Defines the ENET transmit dirty addresses ring/queue structure.

Public Members

enet_frame_info_t *txDirtyBase: Dirty buffer descriptor base address pointer.

uint16_t txGenIdx: tx generate index.

uint16_t txConsumIdx: tx consume index.

uint16_t txRingLen: tx ring length.

bool isFull: tx ring is full flag.

struct _enet_buffer_config

#include <fsl_enet.h>

Defines the receive buffer descriptor configuration structure.

Note that for the internal DMA requirements, the buffers have a corresponding alignment requirements.

The aligned receive and transmit buffer size must be evenly divisible by ENET_BUFF_ALIGNMENT. when the data buffers are in cacheable region when cache is enabled, all those size should be aligned to the maximum value of “ENET_BUFF_ALIGNMENT” and the cache line size.
The aligned transmit and receive buffer descriptor start address must be at least 64 bit aligned. However, it’s recommended to be evenly divisible by ENET_BUFF_ALIGNMENT. buffer descriptors should be put in non-cacheable region when cache is enabled.
The aligned transmit and receive data buffer start address must be evenly divisible by ENET_BUFF_ALIGNMENT. Receive buffers should be continuous with the total size equal to “rxBdNumber * rxBuffSizeAlign”. Transmit buffers should be continuous with the total size equal to “txBdNumber * txBuffSizeAlign”. when the data buffers are in cacheable region when cache is enabled, all those size should be aligned to the maximum value of “ENET_BUFF_ALIGNMENT” and the cache line size.

Public Members

uint16_t rxBdNumber: Receive buffer descriptor number.

uint16_t txBdNumber: Transmit buffer descriptor number.

uint16_t rxBuffSizeAlign: Aligned receive data buffer size.

uint16_t txBuffSizeAlign: Aligned transmit data buffer size.

volatile enet_rx_bd_struct_t *rxBdStartAddrAlign: Aligned receive buffer descriptor start address: should be non-cacheable.

volatile enet_tx_bd_struct_t *txBdStartAddrAlign: Aligned transmit buffer descriptor start address: should be non-cacheable.

uint8_t *rxBufferAlign: Receive data buffer start address.

uint8_t *txBufferAlign: Transmit data buffer start address.

bool rxMaintainEnable: Receive buffer cache maintain.

bool txMaintainEnable: Transmit buffer cache maintain.

enet_frame_info_t *txFrameInfo: Transmit frame information start address.

struct _enet_intcoalesce_config

#include <fsl_enet.h>

Defines the interrupt coalescing configure structure.

Public Members

uint8_t txCoalesceFrameCount[1]: Transmit interrupt coalescing frame count threshold.

uint16_t txCoalesceTimeCount[1]: Transmit interrupt coalescing timer count threshold.

uint8_t rxCoalesceFrameCount[1]: Receive interrupt coalescing frame count threshold.

uint16_t rxCoalesceTimeCount[1]: Receive interrupt coalescing timer count threshold.

struct _enet_avb_config

#include <fsl_enet.h>

Defines the ENET AVB Configure structure.

This is used for to configure the extended ring 1 and ring 2.

The classification match format is (CMP3 << 12) | (CMP2 << 8) | (CMP1 << 4) | CMP0. composed of four 3-bit compared VLAN priority field cmp0~cmp3, cm0 ~ cmp3 are used in parallel.

If CMP1,2,3 are not unused, please set them to the same value as CMP0.

The idleSlope is used to calculate the Band Width fraction, BW fraction = 1 / (1 + 512/idleSlope). For avb configuration, the BW fraction of Class 1 and Class 2 combined must not exceed 0.75.

Public Members

uint16_t rxClassifyMatch[1 - 1]: The classification match value for the ring.

enet_idle_slope_t idleSlope[1 - 1]: The idle slope for certian bandwidth fraction.

struct _enet_config

#include <fsl_enet.h>

Defines the basic configuration structure for the ENET device.

Note:

macSpecialConfig is used for a special control configuration, A logical OR of “enet_special_control_flag_t”. For a special configuration for MAC, set this parameter to 0.
txWatermark is used for a cut-through operation. It is in steps of 64 bytes: 0/1 - 64 bytes written to TX FIFO before transmission of a frame begins. 2 - 128 bytes written to TX FIFO …. 3 - 192 bytes written to TX FIFO …. The maximum of txWatermark is 0x2F - 4032 bytes written to TX FIFO …. txWatermark allows minimizing the transmit latency to set the txWatermark to 0 or 1 or for larger bus access latency 3 or larger due to contention for the system bus.
rxFifoFullThreshold is similar to the txWatermark for cut-through operation in RX. It is in 64-bit words. The minimum is ENET_FIFO_MIN_RX_FULL and the maximum is 0xFF. If the end of the frame is stored in FIFO and the frame size if smaller than the txWatermark, the frame is still transmitted. The rule is the same for rxFifoFullThreshold in the receive direction.
When “kENET_ControlFlowControlEnable” is set in the macSpecialConfig, ensure that the pauseDuration, rxFifoEmptyThreshold, and rxFifoStatEmptyThreshold are set for flow control enabled case.
When “kENET_ControlStoreAndFwdDisabled” is set in the macSpecialConfig, ensure that the rxFifoFullThreshold and txFifoWatermark are set for store and forward disable.
The rxAccelerConfig and txAccelerConfig default setting with 0 - accelerator are disabled. The “enet_tx_accelerator_t” and “enet_rx_accelerator_t” are recommended to be used to enable the transmit and receive accelerator. After the accelerators are enabled, the store and forward feature should be enabled. As a result, kENET_ControlStoreAndFwdDisabled should not be set.
The intCoalesceCfg can be used in the rx or tx enabled cases to decrese the CPU loading.

Public Members

uint32_t macSpecialConfig: Mac special configuration. A logical OR of “enet_special_control_flag_t”.

uint32_t interrupt: Mac interrupt source. A logical OR of “enet_interrupt_enable_t”.

uint16_t rxMaxFrameLen: Receive maximum frame length.

enet_mii_mode_t miiMode: MII mode.

enet_mii_speed_t miiSpeed: MII Speed.

enet_mii_duplex_t miiDuplex: MII duplex.

uint8_t rxAccelerConfig: Receive accelerator, A logical OR of “enet_rx_accelerator_t”.

uint8_t txAccelerConfig: Transmit accelerator, A logical OR of “enet_rx_accelerator_t”.

uint16_t pauseDuration: For flow control enabled case: Pause duration.

uint8_t rxFifoEmptyThreshold: For flow control enabled case: when RX FIFO level reaches this value, it makes MAC generate XOFF pause frame.

uint8_t rxFifoStatEmptyThreshold: For flow control enabled case: number of frames in the receive FIFO, independent of size, that can be accept. If the limit is reached, reception continues and a pause frame is triggered.

uint8_t rxFifoFullThreshold: For store and forward disable case, the data required in RX FIFO to notify the MAC receive ready status.

uint8_t txFifoWatermark: For store and forward disable case, the data required in TX FIFO before a frame transmit start.

enet_intcoalesce_config_t *intCoalesceCfg: If the interrupt coalsecence is not required in the ring n(0,1,2), please set to NULL.

uint8_t ringNum: Number of used rings. default with 1 — single ring.

enet_rx_alloc_callback_t rxBuffAlloc: Callback function to alloc memory, must be provided for zero-copy Rx.

enet_rx_free_callback_t rxBuffFree: Callback function to free memory, must be provided for zero-copy Rx.

enet_callback_t callback: General callback function.

void *userData: Callback function parameter.

struct _enet_tx_bd_ring

#include <fsl_enet.h>

Defines the ENET transmit buffer descriptor ring/queue structure.

Public Members

volatile enet_tx_bd_struct_t *txBdBase: Buffer descriptor base address pointer.

uint16_t txGenIdx: The current available transmit buffer descriptor pointer.

uint16_t txConsumIdx: Transmit consume index.

volatile uint16_t txDescUsed: Transmit descriptor used number.

uint16_t txRingLen: Transmit ring length.

struct _enet_rx_bd_ring

#include <fsl_enet.h>

Defines the ENET receive buffer descriptor ring/queue structure.

Public Members

volatile enet_rx_bd_struct_t *rxBdBase: Buffer descriptor base address pointer.

uint16_t rxGenIdx: The current available receive buffer descriptor pointer.

uint16_t rxRingLen: Receive ring length.

struct _enet_handle

#include <fsl_enet.h>

Defines the ENET handler structure.

Public Members

enet_rx_bd_ring_t rxBdRing[1]: Receive buffer descriptor.

enet_tx_bd_ring_t txBdRing[1]: Transmit buffer descriptor.

uint16_t rxBuffSizeAlign[1]: Receive buffer size alignment.

uint16_t txBuffSizeAlign[1]: Transmit buffer size alignment.

bool rxMaintainEnable[1]: Receive buffer cache maintain.

bool txMaintainEnable[1]: Transmit buffer cache maintain.

uint8_t ringNum: Number of used rings.

enet_callback_t callback: Callback function.

void *userData: Callback function parameter.

enet_tx_dirty_ring_t txDirtyRing[1]: Ring to store tx frame information.

bool txReclaimEnable[1]: Tx reclaim enable flag.

enet_rx_alloc_callback_t rxBuffAlloc: Callback function to alloc memory for zero copy Rx.

enet_rx_free_callback_t rxBuffFree: Callback function to free memory for zero copy Rx.

uint8_t multicastCount[64]: Multicast collisions counter

uint32_t enetClock: The clock of enet peripheral, to caculate core cycles for PTP timestamp.

uint32_t tsDelayCount: The count of core cycles for PTP timestamp capture delay.

struct _enet_buffer_struct

#include <fsl_enet.h>

Public Members

void *buffer: The buffer store the whole or partial frame.

uint16_t length: The byte length of this buffer.

struct _enet_rx_frame_attribute_struct

#include <fsl_enet.h>

Public Members

bool promiscuous: This frame is received because of promiscuous mode.

struct _enet_rx_frame_struct

#include <fsl_enet.h>

Public Members

enet_buffer_struct_t *rxBuffArray: Rx frame buffer structure.

uint16_t totLen: Rx frame total length.

enet_rx_frame_attribute_t rxAttribute: Rx frame attribute structure.

enet_rx_frame_error_t rxFrameError: Rx frame error.

struct _enet_tx_frame_struct

#include <fsl_enet.h>

Public Members

enet_buffer_struct_t *txBuffArray: Tx frame buffer structure.

uint32_t txBuffNum: Buffer number of this Tx frame.

void *context: Driver reclaims and gives it in Tx over callback, usually store network packet header.

EWM: External Watchdog Monitor Driver

void EWM_Init(EWM_Type *base, const ewm_config_t *config)

Initializes the EWM peripheral.

This function is used to initialize the EWM. After calling, the EWM runs immediately according to the configuration. Note that, except for the interrupt enable control bit, other control bits and registers are write once after a CPU reset. Modifying them more than once generates a bus transfer error.

This is an example.

ewm_config_t config;
EWM_GetDefaultConfig(&config);
config.compareHighValue = 0xAAU;
EWM_Init(ewm_base,&config);

Parameters:

base – EWM peripheral base address
config – The configuration of the EWM

void EWM_Deinit(EWM_Type *base)

Deinitializes the EWM peripheral.

This function is used to shut down the EWM.

Parameters:

base – EWM peripheral base address

void EWM_GetDefaultConfig(ewm_config_t *config)

Initializes the EWM configuration structure.

This function initializes the EWM configuration structure to default values. The default values are as follows.

ewmConfig->enableEwm = true;
ewmConfig->enableEwmInput = false;
ewmConfig->setInputAssertLogic = false;
ewmConfig->enableInterrupt = false;
ewmConfig->ewm_lpo_clock_source_t = kEWM_LpoClockSource0;
ewmConfig->prescaler = 0;
ewmConfig->compareLowValue = 0;
ewmConfig->compareHighValue = 0xFEU;

See also

ewm_config_t

Parameters:

config – Pointer to the EWM configuration structure.

static inline void EWM_EnableInterrupts(EWM_Type *base, uint32_t mask)

Enables the EWM interrupt.

This function enables the EWM interrupt.

Parameters:

base – EWM peripheral base address
mask – The interrupts to enable The parameter can be combination of the following source if defined
- kEWM_InterruptEnable

static inline void EWM_DisableInterrupts(EWM_Type *base, uint32_t mask)

Disables the EWM interrupt.

This function enables the EWM interrupt.

Parameters:

base – EWM peripheral base address
mask – The interrupts to disable The parameter can be combination of the following source if defined
- kEWM_InterruptEnable

static inline uint32_t EWM_GetStatusFlags(EWM_Type *base)

Gets all status flags.

This function gets all status flags.

This is an example for getting the running flag.

uint32_t status;
status = EWM_GetStatusFlags(ewm_base) & kEWM_RunningFlag;

See also

_ewm_status_flags_t

True: a related status flag has been set.
False: a related status flag is not set.

Parameters:

base – EWM peripheral base address

Returns:

State of the status flag: asserted (true) or not-asserted (false).

void EWM_Refresh(EWM_Type *base)

Services the EWM.

This function resets the EWM counter to zero.

Parameters:

base – EWM peripheral base address

FSL_EWM_DRIVER_VERSION: EWM driver version 2.0.4.

enum _ewm_lpo_clock_source

Describes EWM clock source.

Values:

enumerator kEWM_LpoClockSource0: EWM clock sourced from lpo_clk[0]

enumerator kEWM_LpoClockSource1: EWM clock sourced from lpo_clk[1]

enumerator kEWM_LpoClockSource2: EWM clock sourced from lpo_clk[2]

enumerator kEWM_LpoClockSource3: EWM clock sourced from lpo_clk[3]

enum _ewm_interrupt_enable_t

EWM interrupt configuration structure with default settings all disabled.

This structure contains the settings for all of EWM interrupt configurations.

Values:

enumerator kEWM_InterruptEnable: Enable the EWM to generate an interrupt

enum _ewm_status_flags_t

EWM status flags.

This structure contains the constants for the EWM status flags for use in the EWM functions.

Values:

enumerator kEWM_RunningFlag: Running flag, set when EWM is enabled

typedef enum _ewm_lpo_clock_source ewm_lpo_clock_source_t: Describes EWM clock source.

typedef struct _ewm_config ewm_config_t

Data structure for EWM configuration.

This structure is used to configure the EWM.

struct _ewm_config

#include <fsl_ewm.h>

Data structure for EWM configuration.

This structure is used to configure the EWM.

Public Members

bool enableEwm: Enable EWM module

bool enableEwmInput: Enable EWM_in input

bool setInputAssertLogic: EWM_in signal assertion state

bool enableInterrupt: Enable EWM interrupt

ewm_lpo_clock_source_t clockSource: Clock source select

uint8_t prescaler: Clock prescaler value

uint8_t compareLowValue: Compare low-register value

uint8_t compareHighValue: Compare high-register value

FGPIO Driver

C90TFS Flash Driver

FlexCAN: Flex Controller Area Network Driver

FlexCAN Driver

bool FLEXCAN_IsInstanceHasFDMode(CAN_Type *base)

Determine whether the FlexCAN instance support CAN FD mode at run time.

Note

Use this API only if different soc parts share the SOC part name macro define. Otherwise, a different SOC part name can be used to determine at compile time whether the FlexCAN instance supports CAN FD mode or not. If need use this API to determine if CAN FD mode is supported, the FLEXCAN_Init function needs to be executed first, and then call this API and use the return to value determines whether to supports CAN FD mode, if return true, continue calling FLEXCAN_FDInit to enable CAN FD mode.

Parameters:

base – FlexCAN peripheral base address.

Returns:

return TRUE if instance support CAN FD mode, FALSE if instance only support classic CAN (2.0) mode.

void FLEXCAN_EnterFreezeMode(CAN_Type *base)

Enter FlexCAN Freeze Mode.

This function makes the FlexCAN work under Freeze Mode.

Parameters:

base – FlexCAN peripheral base address.

void FLEXCAN_ExitFreezeMode(CAN_Type *base)

Exit FlexCAN Freeze Mode.

This function makes the FlexCAN leave Freeze Mode.

Parameters:

base – FlexCAN peripheral base address.

uint32_t FLEXCAN_GetInstance(CAN_Type *base)

Get the FlexCAN instance from peripheral base address.

Parameters:

base – FlexCAN peripheral base address.

Returns:

FlexCAN instance.

bool FLEXCAN_CalculateImprovedTimingValues(CAN_Type *base, uint32_t bitRate, uint32_t sourceClock_Hz, flexcan_timing_config_t *pTimingConfig)

Calculates the improved timing values by specific bit Rates for classical CAN.

This function use to calculates the Classical CAN timing values according to the given bit rate. The Calculated timing values will be set in CTRL1/CBT/ENCBT register. The calculation is based on the recommendation of the CiA 301 v4.2.0 and previous version document.

Parameters:

base – FlexCAN peripheral base address.
bitRate – The classical CAN speed in bps defined by user, should be less than or equal to 1Mbps.
sourceClock_Hz – The Source clock frequency in Hz.
pTimingConfig – Pointer to the FlexCAN timing configuration structure.

Returns:

TRUE if timing configuration found, FALSE if failed to find configuration.

void FLEXCAN_Init(CAN_Type *base, const flexcan_config_t *pConfig, uint32_t sourceClock_Hz)

Initializes a FlexCAN instance.

This function initializes the FlexCAN module with user-defined settings. This example shows how to set up the flexcan_config_t parameters and how to call the FLEXCAN_Init function by passing in these parameters.

flexcan_config_t flexcanConfig;
flexcanConfig.clkSrc               = kFLEXCAN_ClkSrc0;
flexcanConfig.bitRate              = 1000000U;
flexcanConfig.maxMbNum             = 16;
flexcanConfig.enableLoopBack       = false;
flexcanConfig.enableSelfWakeup     = false;
flexcanConfig.enableIndividMask    = false;
flexcanConfig.enableDoze           = false;
flexcanConfig.disableSelfReception = false;
flexcanConfig.enableListenOnlyMode = false;
flexcanConfig.timingConfig         = timingConfig;
FLEXCAN_Init(CAN0, &flexcanConfig, 40000000UL);

Parameters:

base – FlexCAN peripheral base address.
pConfig – Pointer to the user-defined configuration structure.
sourceClock_Hz – FlexCAN Protocol Engine clock source frequency in Hz.

bool FLEXCAN_FDCalculateImprovedTimingValues(CAN_Type *base, uint32_t bitRate, uint32_t bitRateFD, uint32_t sourceClock_Hz, flexcan_timing_config_t *pTimingConfig)

Calculates the improved timing values by specific bit rates for CANFD.

This function use to calculates the CANFD timing values according to the given nominal phase bit rate and data phase bit rate. The Calculated timing values will be set in CBT/ENCBT and FDCBT/EDCBT registers. The calculation is based on the recommendation of the CiA 1301 v1.0.0 document.

Parameters:

base – FlexCAN peripheral base address.
bitRate – The CANFD bus control speed in bps defined by user.
bitRateFD – The CAN FD data phase speed in bps defined by user. Equal to bitRate means disable bit rate switching.
sourceClock_Hz – The Source clock frequency in Hz.
pTimingConfig – Pointer to the FlexCAN timing configuration structure.

Returns:

TRUE if timing configuration found, FALSE if failed to find configuration

void FLEXCAN_FDInit(CAN_Type *base, const flexcan_config_t *pConfig, uint32_t sourceClock_Hz, flexcan_mb_size_t dataSize, bool brs)

Initializes a FlexCAN instance.

This function initializes the FlexCAN module with user-defined settings. This example shows how to set up the flexcan_config_t parameters and how to call the FLEXCAN_FDInit function by passing in these parameters.

flexcan_config_t flexcanConfig;
flexcanConfig.clkSrc               = kFLEXCAN_ClkSrc0;
flexcanConfig.bitRate              = 1000000U;
flexcanConfig.bitRateFD            = 2000000U;
flexcanConfig.maxMbNum             = 16;
flexcanConfig.enableLoopBack       = false;
flexcanConfig.enableSelfWakeup     = false;
flexcanConfig.enableIndividMask    = false;
flexcanConfig.disableSelfReception = false;
flexcanConfig.enableListenOnlyMode = false;
flexcanConfig.enableDoze           = false;
flexcanConfig.timingConfig         = timingConfig;
FLEXCAN_FDInit(CAN0, &flexcanConfig, 80000000UL, kFLEXCAN_16BperMB, true);

Parameters:

base – FlexCAN peripheral base address.
pConfig – Pointer to the user-defined configuration structure.
sourceClock_Hz – FlexCAN Protocol Engine clock source frequency in Hz.
dataSize – FlexCAN Message Buffer payload size. The actual transmitted or received CAN FD frame data size needs to be less than or equal to this value.
brs – True if bit rate switch is enabled in FD mode.

void FLEXCAN_Deinit(CAN_Type *base)

De-initializes a FlexCAN instance.

This function disables the FlexCAN module clock and sets all register values to the reset value.

Parameters:

base – FlexCAN peripheral base address.

void FLEXCAN_GetDefaultConfig(flexcan_config_t *pConfig)

Gets the default configuration structure.

This function initializes the FlexCAN configuration structure to default values. The default values are as follows. flexcanConfig->clkSrc = kFLEXCAN_ClkSrc0; flexcanConfig->bitRate = 1000000U; flexcanConfig->bitRateFD = 2000000U; flexcanConfig->maxMbNum = 16; flexcanConfig->enableLoopBack = false; flexcanConfig->enableSelfWakeup = false; flexcanConfig->enableIndividMask = false; flexcanConfig->disableSelfReception = false; flexcanConfig->enableListenOnlyMode = false; flexcanConfig->enableDoze = false; flexcanConfig->enablePretendedeNetworking = false; flexcanConfig->enableMemoryErrorControl = true; flexcanConfig->enableNonCorrectableErrorEnterFreeze = true; flexcanConfig->enableTransceiverDelayMeasure = true; flexcanConfig->enableRemoteRequestFrameStored = true; flexcanConfig->payloadEndianness = kFLEXCAN_bigEndian; flexcanConfig.timingConfig = timingConfig;

Parameters:

pConfig – Pointer to the FlexCAN configuration structure.

void FLEXCAN_SetTimingConfig(CAN_Type *base, const flexcan_timing_config_t *pConfig)

Sets the FlexCAN classical CAN protocol timing characteristic.

This function gives user settings to classical CAN or CAN FD nominal phase timing characteristic. The function is for an experienced user. For less experienced users, call the FLEXCAN_SetBitRate() instead.

Note

Calling FLEXCAN_SetTimingConfig() overrides the bit rate set in FLEXCAN_Init() or FLEXCAN_SetBitRate().

Parameters:

base – FlexCAN peripheral base address.
pConfig – Pointer to the timing configuration structure.

status_t FLEXCAN_SetBitRate(CAN_Type *base, uint32_t sourceClock_Hz, uint32_t bitRate_Bps)

Set bit rate of FlexCAN classical CAN frame or CAN FD frame nominal phase.

This function set the bit rate of classical CAN frame or CAN FD frame nominal phase base on FLEXCAN_CalculateImprovedTimingValues() API calculated timing values.

Note

Calling FLEXCAN_SetBitRate() overrides the bit rate set in FLEXCAN_Init().

Parameters:

base – FlexCAN peripheral base address.
sourceClock_Hz – Source Clock in Hz.
bitRate_Bps – Bit rate in Bps.

Returns:

kStatus_Success - Set CAN baud rate (only Nominal phase) successfully.

void FLEXCAN_SetFDTimingConfig(CAN_Type *base, const flexcan_timing_config_t *pConfig)

Sets the FlexCAN CANFD data phase timing characteristic.

This function gives user settings to CANFD data phase timing characteristic. The function is for an experienced user. For less experienced users, call the FLEXCAN_SetFDBitRate() to set both Nominal/Data bit Rate instead.

Note

Calling FLEXCAN_SetFDTimingConfig() overrides the data phase bit rate set in FLEXCAN_FDInit()/FLEXCAN_SetFDBitRate().

Parameters:

base – FlexCAN peripheral base address.
pConfig – Pointer to the timing configuration structure.

status_t FLEXCAN_SetFDBitRate(CAN_Type *base, uint32_t sourceClock_Hz, uint32_t bitRateN_Bps, uint32_t bitRateD_Bps)

Set bit rate of FlexCAN FD frame.

This function set the baud rate of FLEXCAN FD base on FLEXCAN_FDCalculateImprovedTimingValues() API calculated timing values.

Parameters:

base – FlexCAN peripheral base address.
sourceClock_Hz – Source Clock in Hz.
bitRateN_Bps – Nominal bit Rate in Bps.
bitRateD_Bps – Data bit Rate in Bps.

Returns:

kStatus_Success - Set CAN FD bit rate (include Nominal and Data phase) successfully.

void FLEXCAN_SetRxMbGlobalMask(CAN_Type *base, uint32_t mask)

Sets the FlexCAN receive message buffer global mask.

This function sets the global mask for the FlexCAN message buffer in a matching process. The configuration is only effective when the Rx individual mask is disabled in the FLEXCAN_Init().

Parameters:

base – FlexCAN peripheral base address.
mask – Rx Message Buffer Global Mask value.

void FLEXCAN_SetRxFifoGlobalMask(CAN_Type *base, uint32_t mask)

Sets the FlexCAN receive FIFO global mask.

This function sets the global mask for FlexCAN FIFO in a matching process.

Parameters:

base – FlexCAN peripheral base address.
mask – Rx Fifo Global Mask value.

void FLEXCAN_SetRxIndividualMask(CAN_Type *base, uint8_t maskIdx, uint32_t mask)

Sets the FlexCAN receive individual mask.

This function sets the individual mask for the FlexCAN matching process. The configuration is only effective when the Rx individual mask is enabled in the FLEXCAN_Init(). If the Rx FIFO is disabled, the individual mask is applied to the corresponding Message Buffer. If the Rx FIFO is enabled, the individual mask for Rx FIFO occupied Message Buffer is applied to the Rx Filter with the same index. Note that only the first 32 individual masks can be used as the Rx FIFO filter mask.

Parameters:

base – FlexCAN peripheral base address.
maskIdx – The Index of individual Mask.
mask – Rx Individual Mask value.

void FLEXCAN_SetTxMbConfig(CAN_Type *base, uint8_t mbIdx, bool enable)

Configures a FlexCAN transmit message buffer.

This function aborts the previous transmission, cleans the Message Buffer, and configures it as a Transmit Message Buffer.

Parameters:

base – FlexCAN peripheral base address.
mbIdx – The Message Buffer index.
enable – Enable/disable Tx Message Buffer.
- true: Enable Tx Message Buffer.
- false: Disable Tx Message Buffer.

void FLEXCAN_SetRxMbConfig(CAN_Type *base, uint8_t mbIdx, const flexcan_rx_mb_config_t *pRxMbConfig, bool enable)

Configures a FlexCAN Receive Message Buffer.

This function cleans a FlexCAN build-in Message Buffer and configures it as a Receive Message Buffer. User should invoke this API when CTRL2[RRS]=1. When CTRL2[RRS]=1, frame’s ID is compared to the IDs of the receive mailboxes with the CODE field configured as kFLEXCAN_RxMbEmpty, kFLEXCAN_RxMbFull or kFLEXCAN_RxMbOverrun. Message buffer will store the remote frame in the same fashion of a data frame. No automatic remote response frame will be generated. User need to setup another message buffer to respond remote request.

Parameters:

base – FlexCAN peripheral base address.
mbIdx – The Message Buffer index.
pRxMbConfig – Pointer to the FlexCAN Message Buffer configuration structure.
enable – Enable/disable Rx Message Buffer.
- true: Enable Rx Message Buffer.
- false: Disable Rx Message Buffer.

void FLEXCAN_SetFDTxMbConfig(CAN_Type *base, uint8_t mbIdx, bool enable)

Configures a FlexCAN transmit message buffer.

This function aborts the previous transmission, cleans the Message Buffer, and configures it as a Transmit Message Buffer.

Parameters:

base – FlexCAN peripheral base address.
mbIdx – The Message Buffer index.
enable – Enable/disable Tx Message Buffer.
- true: Enable Tx Message Buffer.
- false: Disable Tx Message Buffer.

void FLEXCAN_SetFDRxMbConfig(CAN_Type *base, uint8_t mbIdx, const flexcan_rx_mb_config_t *pRxMbConfig, bool enable)

Configures a FlexCAN Receive Message Buffer.

This function cleans a FlexCAN build-in Message Buffer and configures it as a Receive Message Buffer.

Parameters:

base – FlexCAN peripheral base address.
mbIdx – The Message Buffer index.
pRxMbConfig – Pointer to the FlexCAN Message Buffer configuration structure.
enable – Enable/disable Rx Message Buffer.
- true: Enable Rx Message Buffer.
- false: Disable Rx Message Buffer.

void FLEXCAN_SetRemoteResponseMbConfig(CAN_Type *base, uint8_t mbIdx, const flexcan_frame_t *pFrame)

Configures a FlexCAN Remote Response Message Buffer.

User should invoke this API when CTRL2[RRS]=0. When CTRL2[RRS]=0, frame’s ID is compared to the IDs of the receive mailboxes with the CODE field configured as kFLEXCAN_RxMbRanswer. If there is a matching ID, then this mailbox content will be transmitted as response. The received remote request frame is not stored in receive buffer. It is only used to trigger a transmission of a frame in response.

Parameters:

base – FlexCAN peripheral base address.
mbIdx – The Message Buffer index.
pFrame – Pointer to CAN message frame structure for response.

void FLEXCAN_SetRxFifoConfig(CAN_Type *base, const flexcan_rx_fifo_config_t *pRxFifoConfig, bool enable)

Configures the FlexCAN Legacy Rx FIFO.

This function configures the FlexCAN Rx FIFO with given configuration.

Note

Legacy Rx FIFO only can receive classic CAN message.

Parameters:

base – FlexCAN peripheral base address.
pRxFifoConfig – Pointer to the FlexCAN Legacy Rx FIFO configuration structure. Can be NULL when enable parameter is false.
enable – Enable/disable Legacy Rx FIFO.
- true: Enable Legacy Rx FIFO.
- false: Disable Legacy Rx FIFO.

void FLEXCAN_SetPNConfig(CAN_Type *base, const flexcan_pn_config_t *pConfig)

Configures the FlexCAN Pretended Networking mode.

This function configures the FlexCAN Pretended Networking mode with given configuration.

Parameters:

base – FlexCAN peripheral base address.
pConfig – Pointer to the FlexCAN Rx FIFO configuration structure.

static inline uint64_t FLEXCAN_GetStatusFlags(CAN_Type *base)

Gets the FlexCAN module interrupt flags.

This function gets all FlexCAN status flags. The flags are returned as the logical OR value of the enumerators _flexcan_flags. To check the specific status, compare the return value with enumerators in _flexcan_flags.

Parameters:

base – FlexCAN peripheral base address.

Returns:

FlexCAN status flags which are ORed by the enumerators in the _flexcan_flags.

static inline void FLEXCAN_ClearStatusFlags(CAN_Type *base, uint64_t mask)

Clears status flags with the provided mask.

This function clears the FlexCAN status flags with a provided mask. An automatically cleared flag can’t be cleared by this function.

Parameters:

base – FlexCAN peripheral base address.
mask – The status flags to be cleared, it is logical OR value of _flexcan_flags.

static inline void FLEXCAN_GetBusErrCount(CAN_Type *base, uint8_t *txErrBuf, uint8_t *rxErrBuf)

Gets the FlexCAN Bus Error Counter value.

This function gets the FlexCAN Bus Error Counter value for both Tx and Rx direction. These values may be needed in the upper layer error handling.

Parameters:

base – FlexCAN peripheral base address.
txErrBuf – Buffer to store Tx Error Counter value.
rxErrBuf – Buffer to store Rx Error Counter value.

static inline uint64_t FLEXCAN_GetMbStatusFlags(CAN_Type *base, uint64_t mask)

Gets the FlexCAN low 64 Message Buffer interrupt flags.

This function gets the interrupt flags of a given Message Buffers.

Parameters:

base – FlexCAN peripheral base address.
mask – The ORed FlexCAN Message Buffer mask.

Returns:

The status of given Message Buffers.

static inline uint64_t FLEXCAN_GetHigh64MbStatusFlags(CAN_Type *base, uint64_t mask)

Gets the FlexCAN High 64 Message Buffer interrupt flags.

Valid only if the number of available MBs exceeds 64.

Parameters:

base – FlexCAN peripheral base address.
mask – The ORed FlexCAN Message Buffer mask.

Returns:

The status of given Message Buffers.

static inline void FLEXCAN_ClearMbStatusFlags(CAN_Type *base, uint64_t mask)

Clears the FlexCAN low 64 Message Buffer interrupt flags.

This function clears the interrupt flags of a given Message Buffers.

Parameters:

base – FlexCAN peripheral base address.
mask – The ORed FlexCAN Message Buffer mask.

static inline void FLEXCAN_ClearHigh64MbStatusFlags(CAN_Type *base, uint64_t mask)

Clears the FlexCAN High 64 Message Buffer interrupt flags.

Valid only if the number of available MBs exceeds 64.

Parameters:

base – FlexCAN peripheral base address.
mask – The ORed FlexCAN Message Buffer mask.

void FLEXCAN_GetMemoryErrorReportStatus(CAN_Type *base, flexcan_memory_error_report_status_t *errorStatus)

Gets the FlexCAN Memory Error Report registers status.

This function gets the FlexCAN Memory Error Report registers status.

Parameters:

base – FlexCAN peripheral base address.
errorStatus – Pointer to FlexCAN Memory Error Report registers status structure.

static inline uint8_t FLEXCAN_GetPNMatchCount(CAN_Type *base)

Gets the FlexCAN Number of Matches when in Pretended Networking.

This function gets the number of times a given message has matched the predefined filtering criteria for ID and/or PL before a wakeup event.

Parameters:

base – FlexCAN peripheral base address.

Returns:

The number of received wake up msessages.

static inline void FLEXCAN_EnableInterrupts(CAN_Type *base, uint64_t mask)

Enables FlexCAN interrupts according to the provided mask.

This function enables the FlexCAN interrupts according to the provided mask. The mask is a logical OR of enumeration members, see _flexcan_interrupt_enable.

Parameters:

base – FlexCAN peripheral base address.
mask – The interrupts to enable. Logical OR of _flexcan_interrupt_enable.

static inline void FLEXCAN_DisableInterrupts(CAN_Type *base, uint64_t mask)

Disables FlexCAN interrupts according to the provided mask.

This function disables the FlexCAN interrupts according to the provided mask. The mask is a logical OR of enumeration members, see _flexcan_interrupt_enable.

Parameters:

base – FlexCAN peripheral base address.
mask – The interrupts to disable. Logical OR of _flexcan_interrupt_enable.

static inline void FLEXCAN_EnableMbInterrupts(CAN_Type *base, uint64_t mask)

Enables FlexCAN low 64 Message Buffer interrupts.

This function enables the interrupts of given Message Buffers.

Parameters:

base – FlexCAN peripheral base address.
mask – The ORed FlexCAN Message Buffer mask.

static inline void FLEXCAN_EnableHigh64MbInterrupts(CAN_Type *base, uint64_t mask)

Enables FlexCAN high 64 Message Buffer interrupts.

Valid only if the number of available MBs exceeds 64.

Parameters:

base – FlexCAN peripheral base address.
mask – The ORed FlexCAN Message Buffer mask.

static inline void FLEXCAN_DisableMbInterrupts(CAN_Type *base, uint64_t mask)

Disables FlexCAN low 64 Message Buffer interrupts.

This function disables the interrupts of given Message Buffers.

Parameters:

base – FlexCAN peripheral base address.
mask – The ORed FlexCAN Message Buffer mask.

static inline void FLEXCAN_DisableHigh64MbInterrupts(CAN_Type *base, uint64_t mask)

Disables FlexCAN high 64 Message Buffer interrupts.

Valid only if the number of available MBs exceeds 64.

Parameters:

base – FlexCAN peripheral base address.
mask – The ORed FlexCAN Message Buffer mask.

void FLEXCAN_EnableRxFifoDMA(CAN_Type *base, bool enable)

Enables or disables the FlexCAN Rx FIFO DMA request.

This function enables or disables the DMA feature of FlexCAN build-in Rx FIFO.

Parameters:

base – FlexCAN peripheral base address.
enable – true to enable, false to disable.

static inline uintptr_t FLEXCAN_GetRxFifoHeadAddr(CAN_Type *base)

Gets the Rx FIFO Head address.

This function returns the FlexCAN Rx FIFO Head address, which is mainly used for the DMA/eDMA use case.

Parameters:

base – FlexCAN peripheral base address.

Returns:

FlexCAN Rx FIFO Head address.

static inline void FLEXCAN_Enable(CAN_Type *base, bool enable)

Enables or disables the FlexCAN module operation.

This function enables or disables the FlexCAN module.

Parameters:

base – FlexCAN base pointer.
enable – true to enable, false to disable.

status_t FLEXCAN_WriteTxMb(CAN_Type *base, uint8_t mbIdx, const flexcan_frame_t *pTxFrame)

Writes a FlexCAN Message to the Transmit Message Buffer.

This function writes a CAN Message to the specified Transmit Message Buffer and changes the Message Buffer state to start CAN Message transmit. After that the function returns immediately.

Parameters:

base – FlexCAN peripheral base address.
mbIdx – The FlexCAN Message Buffer index.
pTxFrame – Pointer to CAN message frame to be sent.

Return values:

kStatus_Success – - Write Tx Message Buffer Successfully.
kStatus_Fail – - Tx Message Buffer is currently in use.

status_t FLEXCAN_ReadRxMb(CAN_Type *base, uint8_t mbIdx, flexcan_frame_t *pRxFrame)

Reads a FlexCAN Message from Receive Message Buffer.

This function reads a CAN message from a specified Receive Message Buffer. The function fills a receive CAN message frame structure with just received data and activates the Message Buffer again. The function returns immediately.

Parameters:

base – FlexCAN peripheral base address.
mbIdx – The FlexCAN Message Buffer index.
pRxFrame – Pointer to CAN message frame structure for reception.

Return values:

kStatus_Success – - Rx Message Buffer is full and has been read successfully.
kStatus_FLEXCAN_RxOverflow – - Rx Message Buffer is already overflowed and has been read successfully.
kStatus_Fail – - Rx Message Buffer is empty.

status_t FLEXCAN_WriteFDTxMb(CAN_Type *base, uint8_t mbIdx, const flexcan_fd_frame_t *pTxFrame)

Writes a FlexCAN FD Message to the Transmit Message Buffer.

This function writes a CAN FD Message to the specified Transmit Message Buffer and changes the Message Buffer state to start CAN FD Message transmit. After that the function returns immediately.

Parameters:

base – FlexCAN peripheral base address.
mbIdx – The FlexCAN FD Message Buffer index.
pTxFrame – Pointer to CAN FD message frame to be sent.

Return values:

kStatus_Success – - Write Tx Message Buffer Successfully.
kStatus_Fail – - Tx Message Buffer is currently in use.

status_t FLEXCAN_ReadFDRxMb(CAN_Type *base, uint8_t mbIdx, flexcan_fd_frame_t *pRxFrame)

Reads a FlexCAN FD Message from Receive Message Buffer.

This function reads a CAN FD message from a specified Receive Message Buffer. The function fills a receive CAN FD message frame structure with just received data and activates the Message Buffer again. The function returns immediately.

Parameters:

base – FlexCAN peripheral base address.
mbIdx – The FlexCAN FD Message Buffer index.
pRxFrame – Pointer to CAN FD message frame structure for reception.

Return values:

kStatus_Success – - Rx Message Buffer is full and has been read successfully.
kStatus_FLEXCAN_RxOverflow – - Rx Message Buffer is already overflowed and has been read successfully.
kStatus_Fail – - Rx Message Buffer is empty.

status_t FLEXCAN_ReadRxFifo(CAN_Type *base, flexcan_frame_t *pRxFrame)

Reads a FlexCAN Message from Legacy Rx FIFO.

This function reads a CAN message from the FlexCAN Legacy Rx FIFO.

Parameters:

base – FlexCAN peripheral base address.
pRxFrame – Pointer to CAN message frame structure for reception.

Return values:

kStatus_Success – - Read Message from Rx FIFO successfully.
kStatus_Fail – - Rx FIFO is not enabled.

status_t FLEXCAN_ReadPNWakeUpMB(CAN_Type *base, uint8_t mbIdx, flexcan_frame_t *pRxFrame)

Reads a FlexCAN Message from Wake Up MB.

This function reads a CAN message from the FlexCAN Wake up Message Buffers. There are four Wake up Message Buffers (WMBs) used to store incoming messages in Pretended Networking mode. The WMB index indicates the arrival order. The last message is stored in WMB3.

Parameters:

base – FlexCAN peripheral base address.
pRxFrame – Pointer to CAN message frame structure for reception.
mbIdx – The FlexCAN Wake up Message Buffer index. Range in 0x0 ~ 0x3.

Return values:

kStatus_Success – - Read Message from Wake up Message Buffer successfully.
kStatus_Fail – - Wake up Message Buffer has no valid content.

status_t FLEXCAN_TransferFDSendBlocking(CAN_Type *base, uint8_t mbIdx, flexcan_fd_frame_t *pTxFrame)

Performs a polling send transaction on the CAN bus.

Note

A transfer handle does not need to be created before calling this API.

Parameters:

base – FlexCAN peripheral base pointer.
mbIdx – The FlexCAN FD Message Buffer index.
pTxFrame – Pointer to CAN FD message frame to be sent.

Return values:

kStatus_Success – - Write Tx Message Buffer Successfully.
kStatus_Fail – - Tx Message Buffer is currently in use.

status_t FLEXCAN_TransferFDReceiveBlocking(CAN_Type *base, uint8_t mbIdx, flexcan_fd_frame_t *pRxFrame)

Performs a polling receive transaction on the CAN bus.

Note

A transfer handle does not need to be created before calling this API.

Parameters:

base – FlexCAN peripheral base pointer.
mbIdx – The FlexCAN FD Message Buffer index.
pRxFrame – Pointer to CAN FD message frame structure for reception.

Return values:

kStatus_Success – - Rx Message Buffer is full and has been read successfully.
kStatus_FLEXCAN_RxOverflow – - Rx Message Buffer is already overflowed and has been read successfully.
kStatus_Fail – - Rx Message Buffer is empty.

status_t FLEXCAN_TransferFDSendNonBlocking(CAN_Type *base, flexcan_handle_t *handle, flexcan_mb_transfer_t *pMbXfer)

Sends a message using IRQ.

This function sends a message using IRQ. This is a non-blocking function, which returns right away. When messages have been sent out, the send callback function is called.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
pMbXfer – FlexCAN FD Message Buffer transfer structure. See the flexcan_mb_transfer_t.

Return values:

kStatus_Success – Start Tx Message Buffer sending process successfully.
kStatus_Fail – Write Tx Message Buffer failed.
kStatus_FLEXCAN_TxBusy – Tx Message Buffer is in use.

status_t FLEXCAN_TransferFDReceiveNonBlocking(CAN_Type *base, flexcan_handle_t *handle, flexcan_mb_transfer_t *pMbXfer)

Receives a message using IRQ.

This function receives a message using IRQ. This is non-blocking function, which returns right away. When the message has been received, the receive callback function is called.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
pMbXfer – FlexCAN FD Message Buffer transfer structure. See the flexcan_mb_transfer_t.

Return values:

kStatus_Success – - Start Rx Message Buffer receiving process successfully.
kStatus_FLEXCAN_RxBusy – - Rx Message Buffer is in use.

void FLEXCAN_TransferFDAbortSend(CAN_Type *base, flexcan_handle_t *handle, uint8_t mbIdx)

Aborts the interrupt driven message send process.

This function aborts the interrupt driven message send process.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
mbIdx – The FlexCAN FD Message Buffer index.

void FLEXCAN_TransferFDAbortReceive(CAN_Type *base, flexcan_handle_t *handle, uint8_t mbIdx)

Aborts the interrupt driven message receive process.

This function aborts the interrupt driven message receive process.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
mbIdx – The FlexCAN FD Message Buffer index.

status_t FLEXCAN_TransferSendBlocking(CAN_Type *base, uint8_t mbIdx, flexcan_frame_t *pTxFrame)

Performs a polling send transaction on the CAN bus.

Note

A transfer handle does not need to be created before calling this API.

Parameters:

base – FlexCAN peripheral base pointer.
mbIdx – The FlexCAN Message Buffer index.
pTxFrame – Pointer to CAN message frame to be sent.

Return values:

kStatus_Success – - Write Tx Message Buffer Successfully.
kStatus_Fail – - Tx Message Buffer is currently in use.

status_t FLEXCAN_TransferReceiveBlocking(CAN_Type *base, uint8_t mbIdx, flexcan_frame_t *pRxFrame)

Performs a polling receive transaction on the CAN bus.

Note

A transfer handle does not need to be created before calling this API.

Parameters:

base – FlexCAN peripheral base pointer.
mbIdx – The FlexCAN Message Buffer index.
pRxFrame – Pointer to CAN message frame structure for reception.

Return values:

kStatus_Success – - Rx Message Buffer is full and has been read successfully.
kStatus_FLEXCAN_RxOverflow – - Rx Message Buffer is already overflowed and has been read successfully.
kStatus_Fail – - Rx Message Buffer is empty.

status_t FLEXCAN_TransferReceiveFifoBlocking(CAN_Type *base, flexcan_frame_t *pRxFrame)

Performs a polling receive transaction from Legacy Rx FIFO on the CAN bus.

Note

A transfer handle does not need to be created before calling this API.

Parameters:

base – FlexCAN peripheral base pointer.
pRxFrame – Pointer to CAN message frame structure for reception.

Return values:

kStatus_Success – - Read Message from Rx FIFO successfully.
kStatus_Fail – - Rx FIFO is not enabled.

void FLEXCAN_TransferCreateHandle(CAN_Type *base, flexcan_handle_t *handle, flexcan_transfer_callback_t callback, void *userData)

Initializes the FlexCAN handle.

This function initializes the FlexCAN handle, which can be used for other FlexCAN transactional APIs. Usually, for a specified FlexCAN instance, call this API once to get the initialized handle.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
callback – The callback function.
userData – The parameter of the callback function.

status_t FLEXCAN_TransferSendNonBlocking(CAN_Type *base, flexcan_handle_t *handle, flexcan_mb_transfer_t *pMbXfer)

Sends a message using IRQ.

This function sends a message using IRQ. This is a non-blocking function, which returns right away. When messages have been sent out, the send callback function is called.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
pMbXfer – FlexCAN Message Buffer transfer structure. See the flexcan_mb_transfer_t.

Return values:

kStatus_Success – Start Tx Message Buffer sending process successfully.
kStatus_Fail – Write Tx Message Buffer failed.
kStatus_FLEXCAN_TxBusy – Tx Message Buffer is in use.

status_t FLEXCAN_TransferReceiveNonBlocking(CAN_Type *base, flexcan_handle_t *handle, flexcan_mb_transfer_t *pMbXfer)

Receives a message using IRQ.

This function receives a message using IRQ. This is non-blocking function, which returns right away. When the message has been received, the receive callback function is called.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
pMbXfer – FlexCAN Message Buffer transfer structure. See the flexcan_mb_transfer_t.

Return values:

kStatus_Success – - Start Rx Message Buffer receiving process successfully.
kStatus_FLEXCAN_RxBusy – - Rx Message Buffer is in use.

status_t FLEXCAN_TransferReceiveFifoNonBlocking(CAN_Type *base, flexcan_handle_t *handle, flexcan_fifo_transfer_t *pFifoXfer)

Receives a message from Rx FIFO using IRQ.

This function receives a message using IRQ. This is a non-blocking function, which returns right away. When all messages have been received, the receive callback function is called.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
pFifoXfer – FlexCAN Rx FIFO transfer structure. See the flexcan_fifo_transfer_t.

Return values:

kStatus_Success – - Start Rx FIFO receiving process successfully.
kStatus_FLEXCAN_RxFifoBusy – - Rx FIFO is currently in use.

status_t FLEXCAN_TransferGetReceiveFifoCount(CAN_Type *base, flexcan_handle_t *handle, size_t *count)

Gets the Legacy Rx Fifo transfer status during a interrupt non-blocking receive.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
count – Number of CAN messages receive so far by the non-blocking transaction.

Return values:

kStatus_InvalidArgument – count is Invalid.
kStatus_Success – Successfully return the count.

uint32_t FLEXCAN_GetTimeStamp(flexcan_handle_t *handle, uint8_t mbIdx)

Gets the detail index of Mailbox’s Timestamp by handle.

Then function can only be used when calling non-blocking Data transfer (TX/RX) API, After TX/RX data transfer done (User can get the status by handler’s callback function), we can get the detail index of Mailbox’s timestamp by handle, Detail non-blocking data transfer API (TX/RX) contain. -FLEXCAN_TransferSendNonBlocking -FLEXCAN_TransferFDSendNonBlocking -FLEXCAN_TransferReceiveNonBlocking -FLEXCAN_TransferFDReceiveNonBlocking -FLEXCAN_TransferReceiveFifoNonBlocking

Parameters:

handle – FlexCAN handle pointer.
mbIdx – The FlexCAN Message Buffer index.

Return values:

the – index of mailbox ‘s timestamp stored in the handle.

static inline uint32_t FLEXCAN_GetHighResolutionTimeStamp(CAN_Type *base, uint8_t mbIdx)

void FLEXCAN_TransferAbortSend(CAN_Type *base, flexcan_handle_t *handle, uint8_t mbIdx)

Aborts the interrupt driven message send process.

This function aborts the interrupt driven message send process.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
mbIdx – The FlexCAN Message Buffer index.

void FLEXCAN_TransferAbortReceive(CAN_Type *base, flexcan_handle_t *handle, uint8_t mbIdx)

Aborts the interrupt driven message receive process.

This function aborts the interrupt driven message receive process.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
mbIdx – The FlexCAN Message Buffer index.

void FLEXCAN_TransferAbortReceiveFifo(CAN_Type *base, flexcan_handle_t *handle)

Aborts the interrupt driven message receive from Rx FIFO process.

This function aborts the interrupt driven message receive from Rx FIFO process.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.

void FLEXCAN_TransferHandleIRQ(CAN_Type *base, flexcan_handle_t *handle)

FlexCAN IRQ handle function.

This function handles the FlexCAN Error, the Message Buffer, and the Rx FIFO IRQ request.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.

void FLEXCAN_MbHandleIRQ(CAN_Type *base, flexcan_handle_t *handle, uint32_t startMbIdx, uint32_t endMbIdx)

FlexCAN Message Buffer IRQ handle function.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
startMbIdx – First Message Buffer to handle.
endMbIdx – Last Message Buffer to handle.

void FLEXCAN_BusoffErrorHandleIRQ(CAN_Type *base, flexcan_handle_t *handle)

FlexCAN Bus Off, Error and Warning IRQ handle function.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.

void FLEXCAN_PNWakeUpHandleIRQ(CAN_Type *base, flexcan_handle_t *handle)

FlexCAN Pretended Networking Wake-up IRQ handle function.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.

void FLEXCAN_MemoryErrorHandleIRQ(CAN_Type *base, flexcan_handle_t *handle)

FlexCAN Memory Error IRQ handle function.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.

FSL_FLEXCAN_DRIVER_VERSION: FlexCAN driver version.

FlexCAN transfer status.

Values:

enumerator kStatus_FLEXCAN_TxBusy: Tx Message Buffer is Busy.

enumerator kStatus_FLEXCAN_TxIdle: Tx Message Buffer is Idle.

enumerator kStatus_FLEXCAN_TxSwitchToRx: Remote Message is send out and Message buffer changed to Receive one.

enumerator kStatus_FLEXCAN_RxBusy: Rx Message Buffer is Busy.

enumerator kStatus_FLEXCAN_RxIdle: Rx Message Buffer is Idle.

enumerator kStatus_FLEXCAN_RxOverflow: Rx Message Buffer is Overflowed.

enumerator kStatus_FLEXCAN_RxFifoBusy: Rx Message FIFO is Busy.

enumerator kStatus_FLEXCAN_RxFifoIdle: Rx Message FIFO is Idle.

enumerator kStatus_FLEXCAN_RxFifoOverflow: Rx Message FIFO is overflowed.

enumerator kStatus_FLEXCAN_RxFifoWarning: Rx Message FIFO is almost overflowed.

enumerator kStatus_FLEXCAN_RxFifoDisabled: Rx Message FIFO is disabled during reading.

enumerator kStatus_FLEXCAN_ErrorStatus: FlexCAN Module Error and Status.

enumerator kStatus_FLEXCAN_WakeUp: FlexCAN is waken up from STOP mode.

enumerator kStatus_FLEXCAN_UnHandled: UnHadled Interrupt asserted.

enumerator kStatus_FLEXCAN_RxRemote: Rx Remote Message Received in Mail box.

enumerator kStatus_FLEXCAN_MemoryError: FlexCAN Memory Error.

enum _flexcan_frame_format

FlexCAN frame format.

Values:

enumerator kFLEXCAN_FrameFormatStandard: Standard frame format attribute.

enumerator kFLEXCAN_FrameFormatExtend: Extend frame format attribute.

enum _flexcan_frame_type

FlexCAN frame type.

Values:

enumerator kFLEXCAN_FrameTypeData: Data frame type attribute.

enumerator kFLEXCAN_FrameTypeRemote: Remote frame type attribute.

enum _flexcan_clock_source

FlexCAN clock source.

Deprecated:

Do not use the kFLEXCAN_ClkSrcOs. It has been superceded kFLEXCAN_ClkSrc0

Do not use the kFLEXCAN_ClkSrcPeri. It has been superceded kFLEXCAN_ClkSrc1

Values:

enumerator kFLEXCAN_ClkSrcOsc: FlexCAN Protocol Engine clock from Oscillator.

enumerator kFLEXCAN_ClkSrcPeri: FlexCAN Protocol Engine clock from Peripheral Clock.

enumerator kFLEXCAN_ClkSrc0: FlexCAN Protocol Engine clock selected by user as SRC == 0.

enumerator kFLEXCAN_ClkSrc1: FlexCAN Protocol Engine clock selected by user as SRC == 1.

enum _flexcan_wake_up_source

FlexCAN wake up source.

Values:

enumerator kFLEXCAN_WakeupSrcUnfiltered: FlexCAN uses unfiltered Rx input to detect edge.

enumerator kFLEXCAN_WakeupSrcFiltered: FlexCAN uses filtered Rx input to detect edge.

enum _flexcan_endianness

FlexCAN payload endianness.

Values:

enumerator kFLEXCAN_bigEndian: Transmit frame with MSB first, receive frame with big-endian format.

enumerator kFLEXCAN_littleEndian: Transmit frame with LSB first, receive frame with little-endian format.

enum _flexcan_MB_timestamp_base

FlexCAN timebase used for capturing 16-bit TIME_STAMP field of message buffer.

Values:

enumerator kFLEXCAN_CANTimer: FlexCAN free-running timer.

enumerator kFLEXCAN_Lower16bitsHRTimer: Lower 16 bits of high-resolution on-chip timer.

enumerator kFLEXCAN_Upper16bitsHRTimer: Upper 16 bits of high-resolution on-chip timer.

enum _flexcan_capture_point

FlexCAN capture point of 32-bit high resolution timebase during a CAN frame.

Values:

enumerator kFLEXCAN_CANFrameID2ndBit: Second bit of identifier field of any frame is on the CAN bus. HR_TIME_STAMPn register will not capture 32-bit counter value.

enumerator kFLEXCAN_CANFrameEnd: End of the CAN frame.

enumerator kFLEXCAN_CANFrameStart: Start of the CAN frame.

enumerator kFLEXCAN_CANFDFrameRes: Start of frame for classical CAN frames; res bit for CAN FD frames.

enum _flexcan_rx_fifo_filter_type

FlexCAN Rx Fifo Filter type.

Values:

enumerator kFLEXCAN_RxFifoFilterTypeA: One full ID (standard and extended) per ID Filter element.

enumerator kFLEXCAN_RxFifoFilterTypeB: Two full standard IDs or two partial 14-bit ID slices per ID Filter Table element.

enumerator kFLEXCAN_RxFifoFilterTypeC: Four partial 8-bit Standard or extended ID slices per ID Filter Table element.

enumerator kFLEXCAN_RxFifoFilterTypeD: All frames rejected.

enum _flexcan_mb_size

FlexCAN Message Buffer Payload size.

Values:

enumerator kFLEXCAN_8BperMB: Selects 8 bytes per Message Buffer.

enumerator kFLEXCAN_16BperMB: Selects 16 bytes per Message Buffer.

enumerator kFLEXCAN_32BperMB: Selects 32 bytes per Message Buffer.

enumerator kFLEXCAN_64BperMB: Selects 64 bytes per Message Buffer.

enum _flexcan_fd_frame_length

FlexCAN CAN FD frame supporting data length (available DLC values).

For Tx, when the Data size corresponding to DLC value stored in the MB selected for transmission is larger than the MB Payload size, FlexCAN adds the necessary number of bytes with constant 0xCC pattern to complete the expected DLC. For Rx, when the Data size corresponding to DLC value received from the CAN bus is larger than the MB Payload size, the high order bytes that do not fit the Payload size will lose.

Values:

enumerator kFLEXCAN_0BperFrame: Frame contains 0 valid data bytes.

enumerator kFLEXCAN_1BperFrame: Frame contains 1 valid data bytes.

enumerator kFLEXCAN_2BperFrame: Frame contains 2 valid data bytes.

enumerator kFLEXCAN_3BperFrame: Frame contains 3 valid data bytes.

enumerator kFLEXCAN_4BperFrame: Frame contains 4 valid data bytes.

enumerator kFLEXCAN_5BperFrame: Frame contains 5 valid data bytes.

enumerator kFLEXCAN_6BperFrame: Frame contains 6 valid data bytes.

enumerator kFLEXCAN_7BperFrame: Frame contains 7 valid data bytes.

enumerator kFLEXCAN_8BperFrame: Frame contains 8 valid data bytes.

enumerator kFLEXCAN_12BperFrame: Frame contains 12 valid data bytes.

enumerator kFLEXCAN_16BperFrame: Frame contains 16 valid data bytes.

enumerator kFLEXCAN_20BperFrame: Frame contains 20 valid data bytes.

enumerator kFLEXCAN_24BperFrame: Frame contains 24 valid data bytes.

enumerator kFLEXCAN_32BperFrame: Frame contains 32 valid data bytes.

enumerator kFLEXCAN_48BperFrame: Frame contains 48 valid data bytes.

enumerator kFLEXCAN_64BperFrame: Frame contains 64 valid data bytes.

enum _flexcan_rx_fifo_priority

FlexCAN Enhanced/Legacy Rx FIFO priority.

The matching process starts from the Rx MB(or Enhanced/Legacy Rx FIFO) with higher priority. If no MB(or Enhanced/Legacy Rx FIFO filter) is satisfied, the matching process goes on with the Enhanced/Legacy Rx FIFO(or Rx MB) with lower priority.

Values:

enumerator kFLEXCAN_RxFifoPrioLow: Matching process start from Rx Message Buffer first.

enumerator kFLEXCAN_RxFifoPrioHigh: Matching process start from Enhanced/Legacy Rx FIFO first.

enum _flexcan_interrupt_enable

FlexCAN interrupt enable enumerations.

This provides constants for the FlexCAN interrupt enable enumerations for use in the FlexCAN functions.

Note

FlexCAN Message Buffers and Legacy Rx FIFO interrupts not included in.

Values:

enumerator kFLEXCAN_BusOffInterruptEnable: Bus Off interrupt, use bit 15.

enumerator kFLEXCAN_ErrorInterruptEnable: CAN Error interrupt, use bit 14.

enumerator kFLEXCAN_TxWarningInterruptEnable: Tx Warning interrupt, use bit 11.

enumerator kFLEXCAN_RxWarningInterruptEnable: Rx Warning interrupt, use bit 10.

enumerator kFLEXCAN_FDErrorInterruptEnable: CAN FD Error interrupt, use bit 31.

enumerator kFLEXCAN_PNMatchWakeUpInterruptEnable: PN Match Wake Up interrupt, use high word bit 17.

enumerator kFLEXCAN_PNTimeoutWakeUpInterruptEnable: PN Timeout Wake Up interrupt, use high word bit 16.

enumerator kFLEXCAN_HostAccessNCErrorInterruptEnable: Host Access With Non-Correctable Errors interrupt, use high word bit 0.

enumerator kFLEXCAN_FlexCanAccessNCErrorInterruptEnable: FlexCAN Access With Non-Correctable Errors interrupt, use high word bit 2.

enumerator kFLEXCAN_HostOrFlexCanCErrorInterruptEnable: Host or FlexCAN Access With Correctable Errors interrupt, use high word bit 3.

enum _flexcan_flags

FlexCAN status flags.

This provides constants for the FlexCAN status flags for use in the FlexCAN functions.

Note

The CPU read action clears the bits corresponding to the FlEXCAN_ErrorFlag macro, therefore user need to read status flags and distinguish which error is occur using _flexcan_error_flags enumerations.

Values:

enumerator kFLEXCAN_ErrorOverrunFlag: Error Overrun Status.

enumerator kFLEXCAN_FDErrorIntFlag: CAN FD Error Interrupt Flag.

enumerator kFLEXCAN_BusoffDoneIntFlag: Bus Off process completed Interrupt Flag.

enumerator kFLEXCAN_SynchFlag: CAN Synchronization Status.

enumerator kFLEXCAN_TxWarningIntFlag: Tx Warning Interrupt Flag.

enumerator kFLEXCAN_RxWarningIntFlag: Rx Warning Interrupt Flag.

enumerator kFLEXCAN_IdleFlag: FlexCAN In IDLE Status.

enumerator kFLEXCAN_FaultConfinementFlag: FlexCAN Fault Confinement State.

enumerator kFLEXCAN_TransmittingFlag: FlexCAN In Transmission Status.

enumerator kFLEXCAN_ReceivingFlag: FlexCAN In Reception Status.

enumerator kFLEXCAN_BusOffIntFlag: Bus Off Interrupt Flag.

enumerator kFLEXCAN_ErrorIntFlag: CAN Error Interrupt Flag.

enumerator kFLEXCAN_ErrorFlag

enumerator kFLEXCAN_PNMatchIntFlag: PN Matching Event Interrupt Flag.

enumerator kFLEXCAN_PNTimeoutIntFlag: PN Timeout Event Interrupt Flag.

enumerator kFLEXCAN_HostAccessNonCorrectableErrorIntFlag: Host Access With Non-Correctable Error Interrupt Flag.

enumerator kFLEXCAN_FlexCanAccessNonCorrectableErrorIntFlag: FlexCAN Access With Non-Correctable Error Interrupt Flag.

enumerator kFLEXCAN_CorrectableErrorIntFlag: Correctable Error Interrupt Flag.

enumerator kFLEXCAN_HostAccessNonCorrectableErrorOverrunFlag: Host Access With Non-Correctable Error Interrupt Overrun Flag.

enumerator kFLEXCAN_FlexCanAccessNonCorrectableErrorOverrunFlag: FlexCAN Access With Non-Correctable Error Interrupt Overrun Flag.

enumerator kFLEXCAN_CorrectableErrorOverrunFlag: Correctable Error Interrupt Overrun Flag.

enumerator kFLEXCAN_AllMemoryErrorIntFlag: All Memory Error Interrupt Flags.

enumerator kFLEXCAN_AllMemoryErrorFlag: All Memory Error Flags.

enum _flexcan_error_flags

FlexCAN error status flags.

The FlexCAN Error Status enumerations is used to report current error of the FlexCAN bus. This enumerations should be used with KFLEXCAN_ErrorFlag in _flexcan_flags enumerations to ditermine which error is generated.

Values:

enumerator kFLEXCAN_FDStuffingError: Stuffing Error.

enumerator kFLEXCAN_FDFormError: Form Error.

enumerator kFLEXCAN_FDCrcError: Cyclic Redundancy Check Error.

enumerator kFLEXCAN_FDBit0Error: Unable to send dominant bit.

enumerator kFLEXCAN_FDBit1Error: Unable to send recessive bit.

enumerator kFLEXCAN_TxErrorWarningFlag: Tx Error Warning Status.

enumerator kFLEXCAN_RxErrorWarningFlag: Rx Error Warning Status.

enumerator kFLEXCAN_StuffingError: Stuffing Error.

enumerator kFLEXCAN_FormError: Form Error.

enumerator kFLEXCAN_CrcError: Cyclic Redundancy Check Error.

enumerator kFLEXCAN_AckError: Received no ACK on transmission.

enumerator kFLEXCAN_Bit0Error: Unable to send dominant bit.

enumerator kFLEXCAN_Bit1Error: Unable to send recessive bit.

FlexCAN Legacy Rx FIFO status flags.

The FlexCAN Legacy Rx FIFO Status enumerations are used to determine the status of the Rx FIFO. Because Rx FIFO occupy the MB0 ~ MB7 (Rx Fifo filter also occupies more Message Buffer space), Rx FIFO status flags are mapped to the corresponding Message Buffer status flags.

Values:

enumerator kFLEXCAN_RxFifoOverflowFlag: Rx FIFO overflow flag.

enumerator kFLEXCAN_RxFifoWarningFlag: Rx FIFO almost full flag.

enumerator kFLEXCAN_RxFifoFrameAvlFlag: Frames available in Rx FIFO flag.

enum _flexcan_memory_error_type

FlexCAN Memory Error Type.

Values:

enumerator kFLEXCAN_CorrectableError: The memory error is correctable which means on bit error.

enumerator kFLEXCAN_NonCorrectableError: The memory error is non-correctable which means two bit errors.

enum _flexcan_memory_access_type

FlexCAN Memory Access Type.

Values:

enumerator kFLEXCAN_MoveOutFlexCanAccess: The memory error was detected during move-out FlexCAN access.

enumerator kFLEXCAN_MoveInAccess: The memory error was detected during move-in FlexCAN access.

enumerator kFLEXCAN_TxArbitrationAccess: The memory error was detected during Tx Arbitration FlexCAN access.

enumerator kFLEXCAN_RxMatchingAccess: The memory error was detected during Rx Matching FlexCAN access.

enumerator kFLEXCAN_MoveOutHostAccess: The memory error was detected during Rx Matching Host (CPU) access.

enum _flexcan_byte_error_syndrome

FlexCAN Memory Error Byte Syndrome.

Values:

enumerator kFLEXCAN_NoError: No bit error in this byte.

enumerator kFLEXCAN_ParityBits0Error: Parity bit 0 error in this byte.

enumerator kFLEXCAN_ParityBits1Error: Parity bit 1 error in this byte.

enumerator kFLEXCAN_ParityBits2Error: Parity bit 2 error in this byte.

enumerator kFLEXCAN_ParityBits3Error: Parity bit 3 error in this byte.

enumerator kFLEXCAN_ParityBits4Error: Parity bit 4 error in this byte.

enumerator kFLEXCAN_DataBits0Error: Data bit 0 error in this byte.

enumerator kFLEXCAN_DataBits1Error: Data bit 1 error in this byte.

enumerator kFLEXCAN_DataBits2Error: Data bit 2 error in this byte.

enumerator kFLEXCAN_DataBits3Error: Data bit 3 error in this byte.

enumerator kFLEXCAN_DataBits4Error: Data bit 4 error in this byte.

enumerator kFLEXCAN_DataBits5Error: Data bit 5 error in this byte.

enumerator kFLEXCAN_DataBits6Error: Data bit 6 error in this byte.

enumerator kFLEXCAN_DataBits7Error: Data bit 7 error in this byte.

enumerator kFLEXCAN_AllZeroError: All-zeros non-correctable error in this byte.

enumerator kFLEXCAN_AllOneError: All-ones non-correctable error in this byte.

enumerator kFLEXCAN_NonCorrectableErrors: Non-correctable error in this byte.

enum _flexcan_pn_match_source

FlexCAN Pretended Networking match source selection.

Values:

enumerator kFLEXCAN_PNMatSrcID: Message match with ID filtering.

enumerator kFLEXCAN_PNMatSrcIDAndData: Message match with ID filtering and payload filtering.

enum _flexcan_pn_match_mode

FlexCAN Pretended Networking mode match type.

Values:

enumerator kFLEXCAN_PNMatModeEqual: Match upon ID/Payload contents against an exact target value.

enumerator kFLEXCAN_PNMatModeGreater: Match upon an ID/Payload value greater than or equal to a specified target value.

enumerator kFLEXCAN_PNMatModeSmaller: Match upon an ID/Payload value smaller than or equal to a specified target value.

enumerator kFLEXCAN_PNMatModeRange: Match upon an ID/Payload value inside a range, greater than or equal to a specified lower limit, and smaller than or equal to a specified upper limit

typedef enum _flexcan_frame_format flexcan_frame_format_t: FlexCAN frame format.

typedef enum _flexcan_frame_type flexcan_frame_type_t: FlexCAN frame type.

typedef enum _flexcan_clock_source flexcan_clock_source_t

FlexCAN clock source.

Deprecated:

Do not use the kFLEXCAN_ClkSrcOs. It has been superceded kFLEXCAN_ClkSrc0

Do not use the kFLEXCAN_ClkSrcPeri. It has been superceded kFLEXCAN_ClkSrc1

typedef enum _flexcan_wake_up_source flexcan_wake_up_source_t: FlexCAN wake up source.

typedef enum _flexcan_endianness flexcan_endianness_t: FlexCAN payload endianness.

typedef enum _flexcan_MB_timestamp_base flexcan_MB_timestamp_base_t: FlexCAN timebase used for capturing 16-bit TIME_STAMP field of message buffer.

typedef enum _flexcan_capture_point flexcan_capture_point_t: FlexCAN capture point of 32-bit high resolution timebase during a CAN frame.

typedef enum _flexcan_rx_fifo_filter_type flexcan_rx_fifo_filter_type_t: FlexCAN Rx Fifo Filter type.

typedef enum _flexcan_mb_size flexcan_mb_size_t: FlexCAN Message Buffer Payload size.

typedef enum _flexcan_rx_fifo_priority flexcan_rx_fifo_priority_t

FlexCAN Enhanced/Legacy Rx FIFO priority.

The matching process starts from the Rx MB(or Enhanced/Legacy Rx FIFO) with higher priority. If no MB(or Enhanced/Legacy Rx FIFO filter) is satisfied, the matching process goes on with the Enhanced/Legacy Rx FIFO(or Rx MB) with lower priority.

typedef enum _flexcan_memory_error_type flexcan_memory_error_type_t: FlexCAN Memory Error Type.

typedef enum _flexcan_memory_access_type flexcan_memory_access_type_t: FlexCAN Memory Access Type.

typedef enum _flexcan_byte_error_syndrome flexcan_byte_error_syndrome_t: FlexCAN Memory Error Byte Syndrome.

typedef struct _flexcan_memory_error_report_status flexcan_memory_error_report_status_t

FlexCAN memory error register status structure.

This structure contains the memory access properties that caused a memory error access. It is used as the parameter of FLEXCAN_GetMemoryErrorReportStatus() function. And user can use FLEXCAN_GetMemoryErrorReportStatus to get the status of the last memory error access.

typedef struct _flexcan_frame flexcan_frame_t: FlexCAN message frame structure.

typedef struct _flexcan_fd_frame flexcan_fd_frame_t

CAN FD message frame structure.

The CAN FD message supporting up to sixty four bytes can be used for a data frame, depending on the length selected for the message buffers. The length should be a enumeration member, see _flexcan_fd_frame_length.

typedef struct _flexcan_timing_config flexcan_timing_config_t: FlexCAN protocol timing characteristic configuration structure.

typedef struct _flexcan_config flexcan_config_t

FlexCAN module configuration structure.

Deprecated:

Do not use the baudRate. It has been superceded bitRate

Do not use the baudRateFD. It has been superceded bitRateFD

typedef struct _flexcan_rx_mb_config flexcan_rx_mb_config_t

FlexCAN Receive Message Buffer configuration structure.

This structure is used as the parameter of FLEXCAN_SetRxMbConfig() function. The FLEXCAN_SetRxMbConfig() function is used to configure FlexCAN Receive Message Buffer. The function abort previous receiving process, clean the Message Buffer and activate the Rx Message Buffer using given Message Buffer setting.

typedef enum _flexcan_pn_match_source flexcan_pn_match_source_t: FlexCAN Pretended Networking match source selection.

typedef enum _flexcan_pn_match_mode flexcan_pn_match_mode_t: FlexCAN Pretended Networking mode match type.

typedef struct _flexcan_pn_config flexcan_pn_config_t

FlexCAN Pretended Networking configuration structure.

This structure is used as the parameter of FLEXCAN_SetPNConfig() function. The FLEXCAN_SetPNConfig() function is used to configure FlexCAN Networking work mode.

typedef struct _flexcan_rx_fifo_config flexcan_rx_fifo_config_t: FlexCAN Legacy Rx FIFO configuration structure.

typedef struct _flexcan_mb_transfer flexcan_mb_transfer_t: FlexCAN Message Buffer transfer.

typedef struct _flexcan_fifo_transfer flexcan_fifo_transfer_t: FlexCAN Rx FIFO transfer.

typedef struct _flexcan_handle flexcan_handle_t: FlexCAN handle structure definition.

typedef void (*flexcan_transfer_callback_t)(CAN_Type *base, flexcan_handle_t *handle, status_t status, uint64_t result, void *userData)

FLEXCAN_WAIT_TIMEOUT

DLC_LENGTH_DECODE(dlc): FlexCAN frame length helper macro.

FLEXCAN_ID_STD(id)

FlexCAN Frame ID helper macro.

Standard Frame ID helper macro.

FLEXCAN_ID_EXT(id): Extend Frame ID helper macro.

FLEXCAN_RX_MB_STD_MASK(id, rtr, ide)

FlexCAN Rx Message Buffer Mask helper macro.

Standard Rx Message Buffer Mask helper macro.

FLEXCAN_RX_MB_EXT_MASK(id, rtr, ide): Extend Rx Message Buffer Mask helper macro.

FLEXCAN_RX_FIFO_STD_MASK_TYPE_A(id, rtr, ide)

FlexCAN Legacy Rx FIFO Mask helper macro.

Standard Rx FIFO Mask helper macro Type A helper macro.

FLEXCAN_RX_FIFO_STD_MASK_TYPE_B_HIGH(id, rtr, ide): Standard Rx FIFO Mask helper macro Type B upper part helper macro.

FLEXCAN_RX_FIFO_STD_MASK_TYPE_B_LOW(id, rtr, ide): Standard Rx FIFO Mask helper macro Type B lower part helper macro.

FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_HIGH(id): Standard Rx FIFO Mask helper macro Type C upper part helper macro.

FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_MID_HIGH(id): Standard Rx FIFO Mask helper macro Type C mid-upper part helper macro.

FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_MID_LOW(id): Standard Rx FIFO Mask helper macro Type C mid-lower part helper macro.

FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_LOW(id): Standard Rx FIFO Mask helper macro Type C lower part helper macro.

FLEXCAN_RX_FIFO_EXT_MASK_TYPE_A(id, rtr, ide): Extend Rx FIFO Mask helper macro Type A helper macro.

FLEXCAN_RX_FIFO_EXT_MASK_TYPE_B_HIGH(id, rtr, ide): Extend Rx FIFO Mask helper macro Type B upper part helper macro.

FLEXCAN_RX_FIFO_EXT_MASK_TYPE_B_LOW(id, rtr, ide): Extend Rx FIFO Mask helper macro Type B lower part helper macro.

FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_HIGH(id): Extend Rx FIFO Mask helper macro Type C upper part helper macro.

FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_MID_HIGH(id): Extend Rx FIFO Mask helper macro Type C mid-upper part helper macro.

FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_MID_LOW(id): Extend Rx FIFO Mask helper macro Type C mid-lower part helper macro.

FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_LOW(id): Extend Rx FIFO Mask helper macro Type C lower part helper macro.

FLEXCAN_RX_FIFO_STD_FILTER_TYPE_A(id, rtr, ide)

FlexCAN Rx FIFO Filter helper macro.

Standard Rx FIFO Filter helper macro Type A helper macro.

FLEXCAN_RX_FIFO_STD_FILTER_TYPE_B_HIGH(id, rtr, ide): Standard Rx FIFO Filter helper macro Type B upper part helper macro.

FLEXCAN_RX_FIFO_STD_FILTER_TYPE_B_LOW(id, rtr, ide): Standard Rx FIFO Filter helper macro Type B lower part helper macro.

FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_HIGH(id): Standard Rx FIFO Filter helper macro Type C upper part helper macro.

FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_MID_HIGH(id): Standard Rx FIFO Filter helper macro Type C mid-upper part helper macro.

FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_MID_LOW(id): Standard Rx FIFO Filter helper macro Type C mid-lower part helper macro.

FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_LOW(id): Standard Rx FIFO Filter helper macro Type C lower part helper macro.

FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_A(id, rtr, ide): Extend Rx FIFO Filter helper macro Type A helper macro.

FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_B_HIGH(id, rtr, ide): Extend Rx FIFO Filter helper macro Type B upper part helper macro.

FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_B_LOW(id, rtr, ide): Extend Rx FIFO Filter helper macro Type B lower part helper macro.

FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_HIGH(id): Extend Rx FIFO Filter helper macro Type C upper part helper macro.

FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_MID_HIGH(id): Extend Rx FIFO Filter helper macro Type C mid-upper part helper macro.

FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_MID_LOW(id): Extend Rx FIFO Filter helper macro Type C mid-lower part helper macro.

FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_LOW(id): Extend Rx FIFO Filter helper macro Type C lower part helper macro.

FLEXCAN_PN_STD_MASK(id, rtr)

FlexCAN Pretended Networking ID Mask helper macro.

Standard Rx Message Buffer Mask helper macro.

FLEXCAN_PN_EXT_MASK(id, rtr): Extend Rx Message Buffer Mask helper macro.

FLEXCAN_PN_INT_MASK(x): FlexCAN interrupt/status flag helper macro.

FLEXCAN_PN_INT_UNMASK(x)

FLEXCAN_PN_STATUS_MASK(x)

FLEXCAN_PN_STATUS_UNMASK(x)

FLEXCAN_MECR_INT_MASK(x)

FLEXCAN_MECR_INT_UNMASK(x)

FLEXCAN_MECR_STATUS_MASK(x)

FLEXCAN_MECR_STATUS_UNMASK(x)

FLEXCAN_ERROR_AND_STATUS_INT_FLAG

FLEXCAN_PNWAKE_UP_FLAG

FLEXCAN_WAKE_UP_FLAG

FLEXCAN_MEMORY_ERROR_INT_FLAG

FLEXCAN_MEMORY_ENHANCED_RX_FIFO_INT_FLAG: FlexCAN Enhanced Rx FIFO base address helper macro.

FLEXCAN_CALLBACK(x)

FlexCAN transfer callback function.

The FlexCAN transfer callback returns a value from the underlying layer. If the status equals to kStatus_FLEXCAN_ErrorStatus, the result parameter is the Content of FlexCAN status register which can be used to get the working status(or error status) of FlexCAN module. If the status equals to other FlexCAN Message Buffer transfer status, the result is the index of Message Buffer that generate transfer event. If the status equals to other FlexCAN Message Buffer transfer status, the result is meaningless and should be Ignored.

struct _flexcan_memory_error_report_status

#include <fsl_flexcan.h>

FlexCAN memory error register status structure.

This structure contains the memory access properties that caused a memory error access. It is used as the parameter of FLEXCAN_GetMemoryErrorReportStatus() function. And user can use FLEXCAN_GetMemoryErrorReportStatus to get the status of the last memory error access.

Public Members

flexcan_memory_error_type_t errorType: The type of memory error that giving rise to the report.

flexcan_memory_access_type_t accessType: The type of memory access that giving rise to the memory error.

uint16_t accessAddress: The address where memory error detected.

uint32_t errorData: The raw data word read from memory with error.

struct _flexcan_frame: #include <fsl_flexcan.h>

FlexCAN message frame structure.

struct _flexcan_fd_frame

#include <fsl_flexcan.h>

CAN FD message frame structure.

The CAN FD message supporting up to sixty four bytes can be used for a data frame, depending on the length selected for the message buffers. The length should be a enumeration member, see _flexcan_fd_frame_length.

Public Members

uint32_t hrtimestamp: Note

HR timestamp offset is changed dynamically according to data length code (DLC). External 32-bit on-chip timer high-resolution timestamp.

struct _flexcan_timing_config

#include <fsl_flexcan.h>

FlexCAN protocol timing characteristic configuration structure.

Public Members

uint16_t preDivider: Classic CAN or CAN FD nominal phase bit rate prescaler.

uint8_t rJumpwidth: Classic CAN or CAN FD nominal phase Re-sync Jump Width.

uint8_t phaseSeg1: Classic CAN or CAN FD nominal phase Segment 1.

uint8_t phaseSeg2: Classic CAN or CAN FD nominal phase Segment 2.

uint8_t propSeg: Classic CAN or CAN FD nominal phase Propagation Segment.

uint16_t fpreDivider: CAN FD data phase bit rate prescaler.

uint8_t frJumpwidth: CAN FD data phase Re-sync Jump Width.

uint8_t fphaseSeg1: CAN FD data phase Phase Segment 1.

uint8_t fphaseSeg2: CAN FD data phase Phase Segment 2.

uint8_t fpropSeg: CAN FD data phase Propagation Segment.

struct _flexcan_config

#include <fsl_flexcan.h>

FlexCAN module configuration structure.

Deprecated:

Do not use the baudRate. It has been superceded bitRate

Do not use the baudRateFD. It has been superceded bitRateFD

Public Members

flexcan_clock_source_t clkSrc: Clock source for FlexCAN Protocol Engine.

flexcan_wake_up_source_t wakeupSrc: Wake up source selection.

uint8_t maxMbNum: The maximum number of Message Buffers used by user.

bool enableLoopBack: Enable or Disable Loop Back Self Test Mode.

bool enableTimerSync: Enable or Disable Timer Synchronization.

bool enableIndividMask: Enable or Disable Rx Individual Mask and Queue feature.

bool disableSelfReception: Enable or Disable Self Reflection.

bool enableListenOnlyMode: Enable or Disable Listen Only Mode.

bool enableDoze: Enable or Disable Doze Mode.

bool enablePretendedeNetworking: Enable or Disable the Pretended Networking mode.

bool enableMemoryErrorControl: Enable or Disable the memory errors detection and correction mechanism.

bool enableNonCorrectableErrorEnterFreeze: Enable or Disable Non-Correctable Errors In FlexCAN Access Put Device In Freeze Mode.

bool enableTransceiverDelayMeasure: Enable or Disable the transceiver delay measurement, when it is enabled, then the secondary sample point position is determined by the sum of the transceiver delay measurement plus the enhanced TDC offset.

bool enableRemoteRequestFrameStored: true: Store Remote Request Frame in the same fashion of data frame. false: Generate an automatic Remote Response Frame.

flexcan_endianness_t payloadEndianness: Selects the byte order for the payload of transmit and receive frames, see flexcan_endianness_t.

bool enableExternalTimeTick: true: External time tick clocks the free-running timer. false: FlexCAN bit clock clocks the free-running timer.

flexcan_MB_timestamp_base_t captureTimeBase: Timebase of message buffer 16-bit TIME_STAMP field.

flexcan_capture_point_t capturePoint: Point in time when 32-bit timebase is captured during CAN frame.

struct _flexcan_rx_mb_config

#include <fsl_flexcan.h>

FlexCAN Receive Message Buffer configuration structure.

This structure is used as the parameter of FLEXCAN_SetRxMbConfig() function. The FLEXCAN_SetRxMbConfig() function is used to configure FlexCAN Receive Message Buffer. The function abort previous receiving process, clean the Message Buffer and activate the Rx Message Buffer using given Message Buffer setting.

Public Members

uint32_t id: CAN Message Buffer Frame Identifier, should be set using FLEXCAN_ID_EXT() or FLEXCAN_ID_STD() macro.

flexcan_frame_format_t format: CAN Frame Identifier format(Standard of Extend).

flexcan_frame_type_t type: CAN Frame Type(Data or Remote).

struct _flexcan_pn_config

#include <fsl_flexcan.h>

FlexCAN Pretended Networking configuration structure.

This structure is used as the parameter of FLEXCAN_SetPNConfig() function. The FLEXCAN_SetPNConfig() function is used to configure FlexCAN Networking work mode.

Public Members

bool enableTimeout: Enable or Disable timeout event trigger wakeup.

uint16_t timeoutValue: The timeout value that generates a wakeup event, the counter timer is incremented based on 64 times the CAN Bit Time unit.

bool enableMatch: Enable or Disable match event trigger wakeup.

flexcan_pn_match_source_t matchSrc: Selects the match source (ID and/or data match) to trigger wakeup.

uint8_t matchNum: The number of times a given message must match the predefined ID and/or data before generating a wakeup event, range in 0x1 ~ 0xFF.

flexcan_pn_match_mode_t idMatchMode: The ID match type.

flexcan_pn_match_mode_t dataMatchMode: The data match type.

uint32_t idLower: The ID target values 1 which used either for ID match “equal to”, “smaller than”, “greater than” comparisons, or as the lower limit value in ID match “range detection”.

uint32_t idUpper

The ID target values 2 which used only as the upper limit value in ID match “range

detection” or used to store the ID mask in “equal to”.

uint8_t lengthLower

The lower limit for length of data bytes which used only in data match “range

detection”. Range in 0x0 ~ 0x8.

uint8_t lengthUpper

The upper limit for length of data bytes which used only in data match “range

detection”. Range in 0x0 ~ 0x8.

struct _flexcan_rx_fifo_config

#include <fsl_flexcan.h>

FlexCAN Legacy Rx FIFO configuration structure.

Public Members

uint32_t *idFilterTable: Pointer to the FlexCAN Legacy Rx FIFO identifier filter table.

uint8_t idFilterNum: The FlexCAN Legacy Rx FIFO Filter elements quantity.

flexcan_rx_fifo_filter_type_t idFilterType: The FlexCAN Legacy Rx FIFO Filter type.

flexcan_rx_fifo_priority_t priority: The FlexCAN Legacy Rx FIFO receive priority.

struct _flexcan_mb_transfer

#include <fsl_flexcan.h>

FlexCAN Message Buffer transfer.

Public Members

flexcan_frame_t *frame: The buffer of CAN Message to be transfer.

uint8_t mbIdx: The index of Message buffer used to transfer Message.

struct _flexcan_fifo_transfer

#include <fsl_flexcan.h>

FlexCAN Rx FIFO transfer.

Public Members

flexcan_frame_t *frame: The buffer of CAN Message to be received from Legacy Rx FIFO.

size_t frameNum: Number of CAN Message need to be received from Legacy or Ehanced Rx FIFO.

struct _flexcan_handle

#include <fsl_flexcan.h>

FlexCAN handle structure.

Public Members

flexcan_transfer_callback_t callback: Callback function.

void *userData: FlexCAN callback function parameter.

flexcan_frame_t *volatile mbFrameBuf[CAN_WORD1_COUNT]: The buffer for received CAN data from Message Buffers.

flexcan_fd_frame_t *volatile mbFDFrameBuf[CAN_WORD1_COUNT]: The buffer for received CAN FD data from Message Buffers.

flexcan_frame_t *volatile rxFifoFrameBuf: The buffer for received CAN data from Legacy Rx FIFO.

size_t rxFifoFrameNum: The number of CAN messages remaining to be received from Legacy or Ehanced Rx FIFO.

size_t rxFifoTransferTotalNum: Total CAN Message number need to be received from Legacy or Ehanced Rx FIFO.

volatile uint8_t mbState[CAN_WORD1_COUNT]: Message Buffer transfer state.

volatile uint8_t rxFifoState: Rx FIFO transfer state.

volatile uint32_t timestamp[CAN_WORD1_COUNT]: Mailbox transfer timestamp.

struct byteStatus

Public Members

bool byteIsRead: The byte n (0~3) was read or not. The type of error and which bit in byte (n) is affected by the error.

struct __unnamed23__

Public Members

uint32_t timestamp: FlexCAN internal Free-Running Counter Time Stamp.

uint32_t length: CAN frame data length in bytes (Range: 0~8).

uint32_t type: CAN Frame Type(DATA or REMOTE).

uint32_t format: CAN Frame Identifier(STD or EXT format).

uint32_t __pad0__: Reserved.

uint32_t idhit: CAN Rx FIFO filter hit id(This value is only used in Rx FIFO receive mode).

struct __unnamed25__

Public Members

uint32_t id: CAN Frame Identifier, should be set using FLEXCAN_ID_EXT() or FLEXCAN_ID_STD() macro.

uint32_t __pad0__: Reserved.

union __unnamed27__

Public Members

struct _flexcan_frame

struct _flexcan_frame

struct __unnamed29__

Public Members

uint32_t dataWord0: CAN Frame payload word0.

uint32_t dataWord1: CAN Frame payload word1.

struct __unnamed31__

Public Members

uint8_t dataByte3: CAN Frame payload byte3.

uint8_t dataByte2: CAN Frame payload byte2.

uint8_t dataByte1: CAN Frame payload byte1.

uint8_t dataByte0: CAN Frame payload byte0.

uint8_t dataByte7: CAN Frame payload byte7.

uint8_t dataByte6: CAN Frame payload byte6.

uint8_t dataByte5: CAN Frame payload byte5.

uint8_t dataByte4: CAN Frame payload byte4.

struct __unnamed33__

Public Members

uint32_t timestamp: FlexCAN internal Free-Running Counter Time Stamp.

uint32_t length: CAN FD frame data length code (DLC), range see _flexcan_fd_frame_length, When the length <= 8, it equal to the data length, otherwise the number of valid frame data is not equal to the length value. user can use DLC_LENGTH_DECODE(length) macro to get the number of valid data bytes.

uint32_t type: CAN Frame Type(DATA or REMOTE).

uint32_t format: CAN Frame Identifier(STD or EXT format).

uint32_t srr: Substitute Remote request.

uint32_t esi: Error State Indicator.

uint32_t brs: Bit Rate Switch.

uint32_t edl: Extended Data Length.

struct __unnamed35__

Public Members

uint32_t id: CAN Frame Identifier, should be set using FLEXCAN_ID_EXT() or FLEXCAN_ID_STD() macro.

uint32_t __pad0__: Reserved.

union __unnamed37__

Public Members

struct _flexcan_fd_frame

struct _flexcan_fd_frame

struct __unnamed39__

Public Members

uint32_t dataWord[16]: CAN FD Frame payload, 16 double word maximum.

struct __unnamed41__

Public Members

uint8_t dataByte3: CAN Frame payload byte3.

uint8_t dataByte2: CAN Frame payload byte2.

uint8_t dataByte1: CAN Frame payload byte1.

uint8_t dataByte0: CAN Frame payload byte0.

uint8_t dataByte7: CAN Frame payload byte7.

uint8_t dataByte6: CAN Frame payload byte6.

uint8_t dataByte5: CAN Frame payload byte5.

uint8_t dataByte4: CAN Frame payload byte4.

union __unnamed43__

Public Members

struct _flexcan_config

struct _flexcan_config

struct __unnamed45__

Public Members

uint32_t baudRate: FlexCAN bit rate in bps, for classical CAN or CANFD nominal phase.

uint32_t baudRateFD: FlexCAN FD bit rate in bps, for CANFD data phase.

struct __unnamed47__

Public Members

uint32_t bitRate: FlexCAN bit rate in bps, for classical CAN or CANFD nominal phase.

uint32_t bitRateFD: FlexCAN FD bit rate in bps, for CANFD data phase.

union __unnamed49__

Public Members

struct _flexcan_pn_config

< The data target values 1 which used either for data match “equal to”, “smaller than”, “greater than” comparisons, or as the lower limit value in data match “range

detection”.

struct _flexcan_pn_config

struct __unnamed53__

< The data target values 1 which used either for data match “equal to”, “smaller than”, “greater than” comparisons, or as the lower limit value in data match “range

detection”.

Public Members

uint32_t lowerWord0: CAN Frame payload word0.

uint32_t lowerWord1: CAN Frame payload word1.

struct __unnamed55__

Public Members

uint8_t lowerByte3: CAN Frame payload byte3.

uint8_t lowerByte2: CAN Frame payload byte2.

uint8_t lowerByte1: CAN Frame payload byte1.

uint8_t lowerByte0: CAN Frame payload byte0.

uint8_t lowerByte7: CAN Frame payload byte7.

uint8_t lowerByte6: CAN Frame payload byte6.

uint8_t lowerByte5: CAN Frame payload byte5.

uint8_t lowerByte4: CAN Frame payload byte4.

union __unnamed51__

Public Members

struct _flexcan_pn_config

< The data target values 2 which used only as the upper limit value in data match “range

detection” or used to store the data mask in “equal to”.

struct _flexcan_pn_config

struct __unnamed57__

< The data target values 2 which used only as the upper limit value in data match “range

detection” or used to store the data mask in “equal to”.

Public Members

uint32_t upperWord0: CAN Frame payload word0.

uint32_t upperWord1: CAN Frame payload word1.

struct __unnamed59__

Public Members

uint8_t upperByte3: CAN Frame payload byte3.

uint8_t upperByte2: CAN Frame payload byte2.

uint8_t upperByte1: CAN Frame payload byte1.

uint8_t upperByte0: CAN Frame payload byte0.

uint8_t upperByte7: CAN Frame payload byte7.

uint8_t upperByte6: CAN Frame payload byte6.

uint8_t upperByte5: CAN Frame payload byte5.

uint8_t upperByte4: CAN Frame payload byte4.

FlexCAN eDMA Driver

void FLEXCAN_TransferCreateHandleEDMA(CAN_Type *base, flexcan_edma_handle_t *handle, flexcan_edma_transfer_callback_t callback, void *userData, edma_handle_t *rxFifoEdmaHandle)

Initializes the FlexCAN handle, which is used in transactional functions.

Parameters:

base – FlexCAN peripheral base address.
handle – Pointer to flexcan_edma_handle_t structure.
callback – The callback function.
userData – The parameter of the callback function.
rxFifoEdmaHandle – User-requested DMA handle for Rx FIFO DMA transfer.

void FLEXCAN_PrepareTransfConfiguration(CAN_Type *base, flexcan_fifo_transfer_t *pFifoXfer, edma_transfer_config_t *pEdmaConfig)

Prepares the eDMA transfer configuration for FLEXCAN Legacy RX FIFO.

This function prepares the eDMA transfer configuration structure according to FLEXCAN Legacy RX FIFO.

Parameters:

base – FlexCAN peripheral base address.
pFifoXfer – FlexCAN Rx FIFO EDMA transfer structure, see flexcan_fifo_transfer_t.
pEdmaConfig – The user configuration structure of type edma_transfer_t.

status_t FLEXCAN_StartTransferDatafromRxFIFO(CAN_Type *base, flexcan_edma_handle_t *handle, edma_transfer_config_t *pEdmaConfig)

Start Transfer Data from the FLEXCAN Legacy Rx FIFO using eDMA.

This function to Update edma transfer confiugration and Start eDMA transfer

Parameters:

base – FlexCAN peripheral base address.
handle – Pointer to flexcan_edma_handle_t structure.
pEdmaConfig – The user configuration structure of type edma_transfer_t.

Return values:

kStatus_Success – if succeed, others failed.
kStatus_FLEXCAN_RxFifoBusy – Previous transfer ongoing.

status_t FLEXCAN_TransferReceiveFifoEDMA(CAN_Type *base, flexcan_edma_handle_t *handle, flexcan_fifo_transfer_t *pFifoXfer)

Receives the CAN Message from the Legacy Rx FIFO using eDMA.

This function receives the CAN Message using eDMA. This is a non-blocking function, which returns right away. After the CAN Message is received, the receive callback function is called.

Parameters:

base – FlexCAN peripheral base address.
handle – Pointer to flexcan_edma_handle_t structure.
pFifoXfer – FlexCAN Rx FIFO EDMA transfer structure, see flexcan_fifo_transfer_t.

Return values:

kStatus_Success – if succeed, others failed.
kStatus_FLEXCAN_RxFifoBusy – Previous transfer ongoing.

status_t FLEXCAN_TransferGetReceiveFifoCountEMDA(CAN_Type *base, flexcan_edma_handle_t *handle, size_t *count)

Gets the Legacy Rx Fifo transfer status during a interrupt non-blocking receive.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
count – Number of CAN messages receive so far by the non-blocking transaction.

Return values:

kStatus_InvalidArgument – count is Invalid.
kStatus_Success – Successfully return the count.

void FLEXCAN_TransferAbortReceiveFifoEDMA(CAN_Type *base, flexcan_edma_handle_t *handle)

Aborts the receive Legacy/Enhanced Rx FIFO process which used eDMA.

This function aborts the receive Legacy/Enhanced Rx FIFO process which used eDMA.

Parameters:

base – FlexCAN peripheral base address.
handle – Pointer to flexcan_edma_handle_t structure.

FSL_FLEXCAN_EDMA_DRIVER_VERSION: FlexCAN EDMA driver version.

typedef struct _flexcan_edma_handle flexcan_edma_handle_t

typedef void (*flexcan_edma_transfer_callback_t)(CAN_Type *base, flexcan_edma_handle_t *handle, status_t status, void *userData): FlexCAN transfer callback function.

struct _flexcan_edma_handle

#include <fsl_flexcan_edma.h>

FlexCAN eDMA handle.

Public Members

flexcan_edma_transfer_callback_t callback: Callback function.

void *userData: FlexCAN callback function parameter.

edma_handle_t *rxFifoEdmaHandle: The EDMA handler for Rx FIFO.

volatile uint8_t rxFifoState: Rx FIFO transfer state.

size_t frameNum: The number of messages that need to be received.

Flexcan_soc

FSL_FLEXCAN_SOC_DRIVER_VERSION: Driver version 1.0.0.

FlexIO: FlexIO Driver

FlexIO Driver

void FLEXIO_GetDefaultConfig(flexio_config_t *userConfig)

Gets the default configuration to configure the FlexIO module. The configuration can used directly to call the FLEXIO_Configure().

Example:

flexio_config_t config;
FLEXIO_GetDefaultConfig(&config);

Parameters:

userConfig – pointer to flexio_config_t structure

void FLEXIO_Init(FLEXIO_Type *base, const flexio_config_t *userConfig)

Configures the FlexIO with a FlexIO configuration. The configuration structure can be filled by the user or be set with default values by FLEXIO_GetDefaultConfig().

Example

flexio_config_t config = {
.enableFlexio = true,
.enableInDoze = false,
.enableInDebug = true,
.enableFastAccess = false
};
FLEXIO_Configure(base, &config);

Parameters:

base – FlexIO peripheral base address
userConfig – pointer to flexio_config_t structure

void FLEXIO_Deinit(FLEXIO_Type *base)

Gates the FlexIO clock. Call this API to stop the FlexIO clock.

Note

After calling this API, call the FLEXO_Init to use the FlexIO module.

Parameters:

base – FlexIO peripheral base address

uint32_t FLEXIO_GetInstance(FLEXIO_Type *base)

Get instance number for FLEXIO module.

Parameters:

base – FLEXIO peripheral base address.

void FLEXIO_Reset(FLEXIO_Type *base)

Resets the FlexIO module.

Parameters:

base – FlexIO peripheral base address

static inline void FLEXIO_Enable(FLEXIO_Type *base, bool enable)

Enables the FlexIO module operation.

Parameters:

base – FlexIO peripheral base address
enable – true to enable, false to disable.

static inline uint32_t FLEXIO_ReadPinInput(FLEXIO_Type *base)

Reads the input data on each of the FlexIO pins.

Parameters:

base – FlexIO peripheral base address

Returns:

FlexIO pin input data

static inline uint8_t FLEXIO_GetShifterState(FLEXIO_Type *base)

Gets the current state pointer for state mode use.

Parameters:

base – FlexIO peripheral base address

Returns:

current State pointer

void FLEXIO_SetShifterConfig(FLEXIO_Type *base, uint8_t index, const flexio_shifter_config_t *shifterConfig)

Configures the shifter with the shifter configuration. The configuration structure covers both the SHIFTCTL and SHIFTCFG registers. To configure the shifter to the proper mode, select which timer controls the shifter to shift, whether to generate start bit/stop bit, and the polarity of start bit and stop bit.

Example

flexio_shifter_config_t config = {
.timerSelect = 0,
.timerPolarity = kFLEXIO_ShifterTimerPolarityOnPositive,
.pinConfig = kFLEXIO_PinConfigOpenDrainOrBidirection,
.pinPolarity = kFLEXIO_PinActiveLow,
.shifterMode = kFLEXIO_ShifterModeTransmit,
.inputSource = kFLEXIO_ShifterInputFromPin,
.shifterStop = kFLEXIO_ShifterStopBitHigh,
.shifterStart = kFLEXIO_ShifterStartBitLow
};
FLEXIO_SetShifterConfig(base, &config);

Parameters:

base – FlexIO peripheral base address
index – Shifter index
shifterConfig – Pointer to flexio_shifter_config_t structure

void FLEXIO_SetTimerConfig(FLEXIO_Type *base, uint8_t index, const flexio_timer_config_t *timerConfig)

Configures the timer with the timer configuration. The configuration structure covers both the TIMCTL and TIMCFG registers. To configure the timer to the proper mode, select trigger source for timer and the timer pin output and the timing for timer.

Example

flexio_timer_config_t config = {
.triggerSelect = FLEXIO_TIMER_TRIGGER_SEL_SHIFTnSTAT(0),
.triggerPolarity = kFLEXIO_TimerTriggerPolarityActiveLow,
.triggerSource = kFLEXIO_TimerTriggerSourceInternal,
.pinConfig = kFLEXIO_PinConfigOpenDrainOrBidirection,
.pinSelect = 0,
.pinPolarity = kFLEXIO_PinActiveHigh,
.timerMode = kFLEXIO_TimerModeDual8BitBaudBit,
.timerOutput = kFLEXIO_TimerOutputZeroNotAffectedByReset,
.timerDecrement = kFLEXIO_TimerDecSrcOnFlexIOClockShiftTimerOutput,
.timerReset = kFLEXIO_TimerResetOnTimerPinEqualToTimerOutput,
.timerDisable = kFLEXIO_TimerDisableOnTimerCompare,
.timerEnable = kFLEXIO_TimerEnableOnTriggerHigh,
.timerStop = kFLEXIO_TimerStopBitEnableOnTimerDisable,
.timerStart = kFLEXIO_TimerStartBitEnabled
};
FLEXIO_SetTimerConfig(base, &config);

Parameters:

base – FlexIO peripheral base address
index – Timer index
timerConfig – Pointer to the flexio_timer_config_t structure

static inline void FLEXIO_SetClockMode(FLEXIO_Type *base, uint8_t index, flexio_timer_decrement_source_t clocksource)

This function set the value of the prescaler on flexio channels.

Parameters:

base – Pointer to the FlexIO simulated peripheral type.
index – Timer index
clocksource – Set clock value

static inline void FLEXIO_EnableShifterStatusInterrupts(FLEXIO_Type *base, uint32_t mask)

Enables the shifter status interrupt. The interrupt generates when the corresponding SSF is set.

Note

For multiple shifter status interrupt enable, for example, two shifter status enable, can calculate the mask by using ((1 << shifter index0) | (1 << shifter index1))

Parameters:

base – FlexIO peripheral base address
mask – The shifter status mask which can be calculated by (1 << shifter index)

static inline void FLEXIO_DisableShifterStatusInterrupts(FLEXIO_Type *base, uint32_t mask)

Disables the shifter status interrupt. The interrupt won’t generate when the corresponding SSF is set.

Note

For multiple shifter status interrupt enable, for example, two shifter status enable, can calculate the mask by using ((1 << shifter index0) | (1 << shifter index1))

Parameters:

base – FlexIO peripheral base address
mask – The shifter status mask which can be calculated by (1 << shifter index)

static inline void FLEXIO_EnableShifterErrorInterrupts(FLEXIO_Type *base, uint32_t mask)

Enables the shifter error interrupt. The interrupt generates when the corresponding SEF is set.

Note

For multiple shifter error interrupt enable, for example, two shifter error enable, can calculate the mask by using ((1 << shifter index0) | (1 << shifter index1))

Parameters:

base – FlexIO peripheral base address
mask – The shifter error mask which can be calculated by (1 << shifter index)

static inline void FLEXIO_DisableShifterErrorInterrupts(FLEXIO_Type *base, uint32_t mask)

Disables the shifter error interrupt. The interrupt won’t generate when the corresponding SEF is set.

Note

For multiple shifter error interrupt enable, for example, two shifter error enable, can calculate the mask by using ((1 << shifter index0) | (1 << shifter index1))

Parameters:

base – FlexIO peripheral base address
mask – The shifter error mask which can be calculated by (1 << shifter index)

static inline void FLEXIO_EnableTimerStatusInterrupts(FLEXIO_Type *base, uint32_t mask)

Enables the timer status interrupt. The interrupt generates when the corresponding SSF is set.

Note

For multiple timer status interrupt enable, for example, two timer status enable, can calculate the mask by using ((1 << timer index0) | (1 << timer index1))

Parameters:

base – FlexIO peripheral base address
mask – The timer status mask which can be calculated by (1 << timer index)

static inline void FLEXIO_DisableTimerStatusInterrupts(FLEXIO_Type *base, uint32_t mask)

Disables the timer status interrupt. The interrupt won’t generate when the corresponding SSF is set.

Note

For multiple timer status interrupt enable, for example, two timer status enable, can calculate the mask by using ((1 << timer index0) | (1 << timer index1))

Parameters:

base – FlexIO peripheral base address
mask – The timer status mask which can be calculated by (1 << timer index)

static inline uint32_t FLEXIO_GetShifterStatusFlags(FLEXIO_Type *base)

Gets the shifter status flags.

Parameters:

base – FlexIO peripheral base address

Returns:

Shifter status flags

static inline void FLEXIO_ClearShifterStatusFlags(FLEXIO_Type *base, uint32_t mask)

Clears the shifter status flags.

Note

For clearing multiple shifter status flags, for example, two shifter status flags, can calculate the mask by using ((1 << shifter index0) | (1 << shifter index1))

Parameters:

base – FlexIO peripheral base address
mask – The shifter status mask which can be calculated by (1 << shifter index)

static inline uint32_t FLEXIO_GetShifterErrorFlags(FLEXIO_Type *base)

Gets the shifter error flags.

Parameters:

base – FlexIO peripheral base address

Returns:

Shifter error flags

static inline void FLEXIO_ClearShifterErrorFlags(FLEXIO_Type *base, uint32_t mask)

Clears the shifter error flags.

Note

For clearing multiple shifter error flags, for example, two shifter error flags, can calculate the mask by using ((1 << shifter index0) | (1 << shifter index1))

Parameters:

base – FlexIO peripheral base address
mask – The shifter error mask which can be calculated by (1 << shifter index)

static inline uint32_t FLEXIO_GetTimerStatusFlags(FLEXIO_Type *base)

Gets the timer status flags.

Parameters:

base – FlexIO peripheral base address

Returns:

Timer status flags

static inline void FLEXIO_ClearTimerStatusFlags(FLEXIO_Type *base, uint32_t mask)

Clears the timer status flags.

Note

For clearing multiple timer status flags, for example, two timer status flags, can calculate the mask by using ((1 << timer index0) | (1 << timer index1))

Parameters:

base – FlexIO peripheral base address
mask – The timer status mask which can be calculated by (1 << timer index)

static inline void FLEXIO_EnableShifterStatusDMA(FLEXIO_Type *base, uint32_t mask, bool enable)

Enables/disables the shifter status DMA. The DMA request generates when the corresponding SSF is set.

Note

For multiple shifter status DMA enables, for example, calculate the mask by using ((1 << shifter index0) | (1 << shifter index1))

Parameters:

base – FlexIO peripheral base address
mask – The shifter status mask which can be calculated by (1 << shifter index)
enable – True to enable, false to disable.

uint32_t FLEXIO_GetShifterBufferAddress(FLEXIO_Type *base, flexio_shifter_buffer_type_t type, uint8_t index)

Gets the shifter buffer address for the DMA transfer usage.

Parameters:

base – FlexIO peripheral base address
type – Shifter type of flexio_shifter_buffer_type_t
index – Shifter index

Returns:

Corresponding shifter buffer index

status_t FLEXIO_RegisterHandleIRQ(void *base, void *handle, flexio_isr_t isr)

Registers the handle and the interrupt handler for the FlexIO-simulated peripheral.

Parameters:

base – Pointer to the FlexIO simulated peripheral type.
handle – Pointer to the handler for FlexIO simulated peripheral.
isr – FlexIO simulated peripheral interrupt handler.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_OutOfRange – The FlexIO type/handle/ISR table out of range.

status_t FLEXIO_UnregisterHandleIRQ(void *base)

Unregisters the handle and the interrupt handler for the FlexIO-simulated peripheral.

Parameters:

base – Pointer to the FlexIO simulated peripheral type.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_OutOfRange – The FlexIO type/handle/ISR table out of range.

static inline void FLEXIO_ClearPortOutput(FLEXIO_Type *base, uint32_t mask)

Sets the output level of the multiple FLEXIO pins to the logic 0.

Parameters:

base – FlexIO peripheral base address
mask – FLEXIO pin number mask

static inline void FLEXIO_SetPortOutput(FLEXIO_Type *base, uint32_t mask)

Sets the output level of the multiple FLEXIO pins to the logic 1.

Parameters:

base – FlexIO peripheral base address
mask – FLEXIO pin number mask

static inline void FLEXIO_TogglePortOutput(FLEXIO_Type *base, uint32_t mask)

Reverses the current output logic of the multiple FLEXIO pins.

Parameters:

base – FlexIO peripheral base address
mask – FLEXIO pin number mask

static inline void FLEXIO_PinWrite(FLEXIO_Type *base, uint32_t pin, uint8_t output)

Sets the output level of the FLEXIO pins to the logic 1 or 0.

Parameters:

base – FlexIO peripheral base address
pin – FLEXIO pin number.
output – FLEXIO pin output logic level.
- 0: corresponding pin output low-logic level.
- 1: corresponding pin output high-logic level.

static inline void FLEXIO_EnablePinOutput(FLEXIO_Type *base, uint32_t pin)

Enables the FLEXIO output pin function.

Parameters:

base – FlexIO peripheral base address
pin – FLEXIO pin number.

static inline uint32_t FLEXIO_PinRead(FLEXIO_Type *base, uint32_t pin)

Reads the current input value of the FLEXIO pin.

Parameters:

base – FlexIO peripheral base address
pin – FLEXIO pin number.

Return values:

FLEXIO – port input value

0: corresponding pin input low-logic level.
1: corresponding pin input high-logic level.

static inline uint32_t FLEXIO_GetPinStatus(FLEXIO_Type *base, uint32_t pin)

Gets the FLEXIO input pin status.

Parameters:

base – FlexIO peripheral base address
pin – FLEXIO pin number.

Return values:

FLEXIO – port input status

0: corresponding pin input capture no status.
1: corresponding pin input capture rising or falling edge.

static inline void FLEXIO_SetPinLevel(FLEXIO_Type *base, uint8_t pin, bool level)

Sets the FLEXIO output pin level.

Parameters:

base – FlexIO peripheral base address
pin – FlexIO pin number.
level – FlexIO output pin level to set, can be either 0 or 1.

static inline bool FLEXIO_GetPinOverride(const FLEXIO_Type *const base, uint8_t pin)

Gets the enabled status of a FLEXIO output pin.

Parameters:

base – FlexIO peripheral base address
pin – FlexIO pin number.

Return values:

FlexIO – port enabled status

0: corresponding output pin is in disabled state.
1: corresponding output pin is in enabled state.

static inline void FLEXIO_ConfigPinOverride(FLEXIO_Type *base, uint8_t pin, bool enabled)

Enables or disables a FLEXIO output pin.

Parameters:

base – FlexIO peripheral base address
pin – Flexio pin number.
enabled – Enable or disable the FlexIO pin.

static inline void FLEXIO_ClearPortStatus(FLEXIO_Type *base, uint32_t mask)

Clears the multiple FLEXIO input pins status.

Parameters:

base – FlexIO peripheral base address
mask – FLEXIO pin number mask

FSL_FLEXIO_DRIVER_VERSION: FlexIO driver version.

enum _flexio_timer_trigger_polarity

Define time of timer trigger polarity.

Values:

enumerator kFLEXIO_TimerTriggerPolarityActiveHigh: Active high.

enumerator kFLEXIO_TimerTriggerPolarityActiveLow: Active low.

enum _flexio_timer_trigger_source

Define type of timer trigger source.

Values:

enumerator kFLEXIO_TimerTriggerSourceExternal: External trigger selected.

enumerator kFLEXIO_TimerTriggerSourceInternal: Internal trigger selected.

enum _flexio_pin_config

Define type of timer/shifter pin configuration.

Values:

enumerator kFLEXIO_PinConfigOutputDisabled: Pin output disabled.

enumerator kFLEXIO_PinConfigOpenDrainOrBidirection: Pin open drain or bidirectional output enable.

enumerator kFLEXIO_PinConfigBidirectionOutputData: Pin bidirectional output data.

enumerator kFLEXIO_PinConfigOutput: Pin output.

enum _flexio_pin_polarity

Definition of pin polarity.

Values:

enumerator kFLEXIO_PinActiveHigh: Active high.

enumerator kFLEXIO_PinActiveLow: Active low.

enum _flexio_timer_mode

Define type of timer work mode.

Values:

enumerator kFLEXIO_TimerModeDisabled: Timer Disabled.

enumerator kFLEXIO_TimerModeDual8BitBaudBit: Dual 8-bit counters baud/bit mode.

enumerator kFLEXIO_TimerModeDual8BitPWM: Dual 8-bit counters PWM mode.

enumerator kFLEXIO_TimerModeSingle16Bit: Single 16-bit counter mode.

enumerator kFLEXIO_TimerModeDual8BitPWMLow: Dual 8-bit counters PWM Low mode.

enum _flexio_timer_output

Define type of timer initial output or timer reset condition.

Values:

enumerator kFLEXIO_TimerOutputOneNotAffectedByReset: Logic one when enabled and is not affected by timer reset.

enumerator kFLEXIO_TimerOutputZeroNotAffectedByReset: Logic zero when enabled and is not affected by timer reset.

enumerator kFLEXIO_TimerOutputOneAffectedByReset: Logic one when enabled and on timer reset.

enumerator kFLEXIO_TimerOutputZeroAffectedByReset: Logic zero when enabled and on timer reset.

enum _flexio_timer_decrement_source

Define type of timer decrement.

Values:

enumerator kFLEXIO_TimerDecSrcOnFlexIOClockShiftTimerOutput: Decrement counter on FlexIO clock, Shift clock equals Timer output.

enumerator kFLEXIO_TimerDecSrcOnTriggerInputShiftTimerOutput: Decrement counter on Trigger input (both edges), Shift clock equals Timer output.

enumerator kFLEXIO_TimerDecSrcOnPinInputShiftPinInput: Decrement counter on Pin input (both edges), Shift clock equals Pin input.

enumerator kFLEXIO_TimerDecSrcOnTriggerInputShiftTriggerInput: Decrement counter on Trigger input (both edges), Shift clock equals Trigger input.

enum _flexio_timer_reset_condition

Define type of timer reset condition.

Values:

enumerator kFLEXIO_TimerResetNever: Timer never reset.

enumerator kFLEXIO_TimerResetOnTimerPinEqualToTimerOutput: Timer reset on Timer Pin equal to Timer Output.

enumerator kFLEXIO_TimerResetOnTimerTriggerEqualToTimerOutput: Timer reset on Timer Trigger equal to Timer Output.

enumerator kFLEXIO_TimerResetOnTimerPinRisingEdge: Timer reset on Timer Pin rising edge.

enumerator kFLEXIO_TimerResetOnTimerTriggerRisingEdge: Timer reset on Trigger rising edge.

enumerator kFLEXIO_TimerResetOnTimerTriggerBothEdge: Timer reset on Trigger rising or falling edge.

enum _flexio_timer_disable_condition

Define type of timer disable condition.

Values:

enumerator kFLEXIO_TimerDisableNever: Timer never disabled.

enumerator kFLEXIO_TimerDisableOnPreTimerDisable: Timer disabled on Timer N-1 disable.

enumerator kFLEXIO_TimerDisableOnTimerCompare: Timer disabled on Timer compare.

enumerator kFLEXIO_TimerDisableOnTimerCompareTriggerLow: Timer disabled on Timer compare and Trigger Low.

enumerator kFLEXIO_TimerDisableOnPinBothEdge: Timer disabled on Pin rising or falling edge.

enumerator kFLEXIO_TimerDisableOnPinBothEdgeTriggerHigh: Timer disabled on Pin rising or falling edge provided Trigger is high.

enumerator kFLEXIO_TimerDisableOnTriggerFallingEdge: Timer disabled on Trigger falling edge.

enum _flexio_timer_enable_condition

Define type of timer enable condition.

Values:

enumerator kFLEXIO_TimerEnabledAlways: Timer always enabled.

enumerator kFLEXIO_TimerEnableOnPrevTimerEnable: Timer enabled on Timer N-1 enable.

enumerator kFLEXIO_TimerEnableOnTriggerHigh: Timer enabled on Trigger high.

enumerator kFLEXIO_TimerEnableOnTriggerHighPinHigh: Timer enabled on Trigger high and Pin high.

enumerator kFLEXIO_TimerEnableOnPinRisingEdge: Timer enabled on Pin rising edge.

enumerator kFLEXIO_TimerEnableOnPinRisingEdgeTriggerHigh: Timer enabled on Pin rising edge and Trigger high.

enumerator kFLEXIO_TimerEnableOnTriggerRisingEdge: Timer enabled on Trigger rising edge.

enumerator kFLEXIO_TimerEnableOnTriggerBothEdge: Timer enabled on Trigger rising or falling edge.

enum _flexio_timer_stop_bit_condition

Define type of timer stop bit generate condition.

Values:

enumerator kFLEXIO_TimerStopBitDisabled: Stop bit disabled.

enumerator kFLEXIO_TimerStopBitEnableOnTimerCompare: Stop bit is enabled on timer compare.

enumerator kFLEXIO_TimerStopBitEnableOnTimerDisable: Stop bit is enabled on timer disable.

enumerator kFLEXIO_TimerStopBitEnableOnTimerCompareDisable: Stop bit is enabled on timer compare and timer disable.

enum _flexio_timer_start_bit_condition

Define type of timer start bit generate condition.

Values:

enumerator kFLEXIO_TimerStartBitDisabled: Start bit disabled.

enumerator kFLEXIO_TimerStartBitEnabled: Start bit enabled.

enum _flexio_timer_output_state

FlexIO as PWM channel output state.

Values:

enumerator kFLEXIO_PwmLow: The output state of PWM channel is low

enumerator kFLEXIO_PwmHigh: The output state of PWM channel is high

enum _flexio_shifter_timer_polarity

Define type of timer polarity for shifter control.

Values:

enumerator kFLEXIO_ShifterTimerPolarityOnPositive: Shift on positive edge of shift clock.

enumerator kFLEXIO_ShifterTimerPolarityOnNegitive: Shift on negative edge of shift clock.

enum _flexio_shifter_mode

Define type of shifter working mode.

Values:

enumerator kFLEXIO_ShifterDisabled: Shifter is disabled.

enumerator kFLEXIO_ShifterModeReceive: Receive mode.

enumerator kFLEXIO_ShifterModeTransmit: Transmit mode.

enumerator kFLEXIO_ShifterModeMatchStore: Match store mode.

enumerator kFLEXIO_ShifterModeMatchContinuous: Match continuous mode.

enumerator kFLEXIO_ShifterModeState: SHIFTBUF contents are used for storing programmable state attributes.

enumerator kFLEXIO_ShifterModeLogic: SHIFTBUF contents are used for implementing programmable logic look up table.

enum _flexio_shifter_input_source

Define type of shifter input source.

Values:

enumerator kFLEXIO_ShifterInputFromPin: Shifter input from pin.

enumerator kFLEXIO_ShifterInputFromNextShifterOutput: Shifter input from Shifter N+1.

enum _flexio_shifter_stop_bit

Define of STOP bit configuration.

Values:

enumerator kFLEXIO_ShifterStopBitDisable: Disable shifter stop bit.

enumerator kFLEXIO_ShifterStopBitLow: Set shifter stop bit to logic low level.

enumerator kFLEXIO_ShifterStopBitHigh: Set shifter stop bit to logic high level.

enum _flexio_shifter_start_bit

Define type of START bit configuration.

Values:

enumerator kFLEXIO_ShifterStartBitDisabledLoadDataOnEnable: Disable shifter start bit, transmitter loads data on enable.

enumerator kFLEXIO_ShifterStartBitDisabledLoadDataOnShift: Disable shifter start bit, transmitter loads data on first shift.

enumerator kFLEXIO_ShifterStartBitLow: Set shifter start bit to logic low level.

enumerator kFLEXIO_ShifterStartBitHigh: Set shifter start bit to logic high level.

enum _flexio_shifter_buffer_type

Define FlexIO shifter buffer type.

Values:

enumerator kFLEXIO_ShifterBuffer: Shifter Buffer N Register.

enumerator kFLEXIO_ShifterBufferBitSwapped: Shifter Buffer N Bit Byte Swapped Register.

enumerator kFLEXIO_ShifterBufferByteSwapped: Shifter Buffer N Byte Swapped Register.

enumerator kFLEXIO_ShifterBufferBitByteSwapped: Shifter Buffer N Bit Swapped Register.

enumerator kFLEXIO_ShifterBufferNibbleByteSwapped: Shifter Buffer N Nibble Byte Swapped Register.

enumerator kFLEXIO_ShifterBufferHalfWordSwapped: Shifter Buffer N Half Word Swapped Register.

enumerator kFLEXIO_ShifterBufferNibbleSwapped: Shifter Buffer N Nibble Swapped Register.

enum _flexio_gpio_direction

FLEXIO gpio direction definition.

Values:

enumerator kFLEXIO_DigitalInput: Set current pin as digital input

enumerator kFLEXIO_DigitalOutput: Set current pin as digital output

enum _flexio_pin_input_config

FLEXIO gpio input config.

Values:

enumerator kFLEXIO_InputInterruptDisabled: Interrupt request is disabled.

enumerator kFLEXIO_InputInterruptEnable: Interrupt request is enable.

enumerator kFLEXIO_FlagRisingEdgeEnable: Input pin flag on rising edge.

enumerator kFLEXIO_FlagFallingEdgeEnable: Input pin flag on falling edge.

typedef enum _flexio_timer_trigger_polarity flexio_timer_trigger_polarity_t: Define time of timer trigger polarity.

typedef enum _flexio_timer_trigger_source flexio_timer_trigger_source_t: Define type of timer trigger source.

typedef enum _flexio_pin_config flexio_pin_config_t: Define type of timer/shifter pin configuration.

typedef enum _flexio_pin_polarity flexio_pin_polarity_t: Definition of pin polarity.

typedef enum _flexio_timer_mode flexio_timer_mode_t: Define type of timer work mode.

typedef enum _flexio_timer_output flexio_timer_output_t: Define type of timer initial output or timer reset condition.

typedef enum _flexio_timer_decrement_source flexio_timer_decrement_source_t: Define type of timer decrement.

typedef enum _flexio_timer_reset_condition flexio_timer_reset_condition_t: Define type of timer reset condition.

typedef enum _flexio_timer_disable_condition flexio_timer_disable_condition_t: Define type of timer disable condition.

typedef enum _flexio_timer_enable_condition flexio_timer_enable_condition_t: Define type of timer enable condition.

typedef enum _flexio_timer_stop_bit_condition flexio_timer_stop_bit_condition_t: Define type of timer stop bit generate condition.

typedef enum _flexio_timer_start_bit_condition flexio_timer_start_bit_condition_t: Define type of timer start bit generate condition.

typedef enum _flexio_timer_output_state flexio_timer_output_state_t: FlexIO as PWM channel output state.

typedef enum _flexio_shifter_timer_polarity flexio_shifter_timer_polarity_t: Define type of timer polarity for shifter control.

typedef enum _flexio_shifter_mode flexio_shifter_mode_t: Define type of shifter working mode.

typedef enum _flexio_shifter_input_source flexio_shifter_input_source_t: Define type of shifter input source.

typedef enum _flexio_shifter_stop_bit flexio_shifter_stop_bit_t: Define of STOP bit configuration.

typedef enum _flexio_shifter_start_bit flexio_shifter_start_bit_t: Define type of START bit configuration.

typedef enum _flexio_shifter_buffer_type flexio_shifter_buffer_type_t: Define FlexIO shifter buffer type.

typedef struct _flexio_config_ flexio_config_t: Define FlexIO user configuration structure.

typedef struct _flexio_timer_config flexio_timer_config_t: Define FlexIO timer configuration structure.

typedef struct _flexio_shifter_config flexio_shifter_config_t: Define FlexIO shifter configuration structure.

typedef enum _flexio_gpio_direction flexio_gpio_direction_t: FLEXIO gpio direction definition.

typedef enum _flexio_pin_input_config flexio_pin_input_config_t: FLEXIO gpio input config.

typedef struct _flexio_gpio_config flexio_gpio_config_t

The FLEXIO pin configuration structure.

Each pin can only be configured as either an output pin or an input pin at a time. If configured as an input pin, use inputConfig param. If configured as an output pin, use outputLogic.

typedef void (*flexio_isr_t)(void *base, void *handle): typedef for FlexIO simulated driver interrupt handler.

FLEXIO_Type *const s_flexioBases[]: Pointers to flexio bases for each instance.

const clock_ip_name_t s_flexioClocks[]: Pointers to flexio clocks for each instance.

void FLEXIO_SetPinConfig(FLEXIO_Type *base, uint32_t pin, flexio_gpio_config_t *config)

Configure a FLEXIO pin used by the board.

To Config the FLEXIO PIN, define a pin configuration, as either input or output, in the user file. Then, call the FLEXIO_SetPinConfig() function.

This is an example to define an input pin or an output pin configuration.

Define a digital input pin configuration,
flexio_gpio_config_t config =
{
  kFLEXIO_DigitalInput,
  0U,
  kFLEXIO_FlagRisingEdgeEnable | kFLEXIO_InputInterruptEnable,
}
Define a digital output pin configuration,
flexio_gpio_config_t config =
{
  kFLEXIO_DigitalOutput,
  0U,
  0U
}

Parameters:

base – FlexIO peripheral base address
pin – FLEXIO pin number.
config – FLEXIO pin configuration pointer.

FLEXIO_TIMER_TRIGGER_SEL_PININPUT(x): Calculate FlexIO timer trigger.

FLEXIO_TIMER_TRIGGER_SEL_SHIFTnSTAT(x)

FLEXIO_TIMER_TRIGGER_SEL_TIMn(x)

struct _flexio_config_

#include <fsl_flexio.h>

Define FlexIO user configuration structure.

Public Members

bool enableFlexio: Enable/disable FlexIO module

bool enableInDoze: Enable/disable FlexIO operation in doze mode

bool enableInDebug: Enable/disable FlexIO operation in debug mode

bool enableFastAccess: Enable/disable fast access to FlexIO registers, fast access requires the FlexIO clock to be at least twice the frequency of the bus clock.

struct _flexio_timer_config

#include <fsl_flexio.h>

Define FlexIO timer configuration structure.

Public Members

uint32_t triggerSelect: The internal trigger selection number using MACROs.

flexio_timer_trigger_polarity_t triggerPolarity: Trigger Polarity.

flexio_timer_trigger_source_t triggerSource: Trigger Source, internal (see ‘trgsel’) or external.

flexio_pin_config_t pinConfig: Timer Pin Configuration.

uint32_t pinSelect: Timer Pin number Select.

flexio_pin_polarity_t pinPolarity: Timer Pin Polarity.

flexio_timer_mode_t timerMode: Timer work Mode.

flexio_timer_output_t timerOutput: Configures the initial state of the Timer Output and whether it is affected by the Timer reset.

flexio_timer_decrement_source_t timerDecrement: Configures the source of the Timer decrement and the source of the Shift clock.

flexio_timer_reset_condition_t timerReset: Configures the condition that causes the timer counter (and optionally the timer output) to be reset.

flexio_timer_disable_condition_t timerDisable: Configures the condition that causes the Timer to be disabled and stop decrementing.

flexio_timer_enable_condition_t timerEnable: Configures the condition that causes the Timer to be enabled and start decrementing.

flexio_timer_stop_bit_condition_t timerStop: Timer STOP Bit generation.

flexio_timer_start_bit_condition_t timerStart: Timer STRAT Bit generation.

uint32_t timerCompare: Value for Timer Compare N Register.

struct _flexio_shifter_config

#include <fsl_flexio.h>

Define FlexIO shifter configuration structure.

Public Members

uint32_t timerSelect: Selects which Timer is used for controlling the logic/shift register and generating the Shift clock.

flexio_shifter_timer_polarity_t timerPolarity: Timer Polarity.

flexio_pin_config_t pinConfig: Shifter Pin Configuration.

uint32_t pinSelect: Shifter Pin number Select.

flexio_pin_polarity_t pinPolarity: Shifter Pin Polarity.

flexio_shifter_mode_t shifterMode: Configures the mode of the Shifter.

uint32_t parallelWidth: Configures the parallel width when using parallel mode.

flexio_shifter_input_source_t inputSource: Selects the input source for the shifter.

flexio_shifter_stop_bit_t shifterStop: Shifter STOP bit.

flexio_shifter_start_bit_t shifterStart: Shifter START bit.

struct _flexio_gpio_config

#include <fsl_flexio.h>

The FLEXIO pin configuration structure.

Each pin can only be configured as either an output pin or an input pin at a time. If configured as an input pin, use inputConfig param. If configured as an output pin, use outputLogic.

Public Members

flexio_gpio_direction_t pinDirection: FLEXIO pin direction, input or output

uint8_t outputLogic: Set a default output logic, which has no use in input

uint8_t inputConfig: Set an input config

FlexIO eDMA I2S Driver

void FLEXIO_I2S_TransferTxCreateHandleEDMA(FLEXIO_I2S_Type *base, flexio_i2s_edma_handle_t *handle, flexio_i2s_edma_callback_t callback, void *userData, edma_handle_t *dmaHandle)

Initializes the FlexIO I2S eDMA handle.

This function initializes the FlexIO I2S master DMA handle which can be used for other FlexIO I2S master transactional APIs. Usually, for a specified FlexIO I2S instance, call this API once to get the initialized handle.

Parameters:

base – FlexIO I2S peripheral base address.
handle – FlexIO I2S eDMA handle pointer.
callback – FlexIO I2S eDMA callback function called while finished a block.
userData – User parameter for callback.
dmaHandle – eDMA handle for FlexIO I2S. This handle is a static value allocated by users.

void FLEXIO_I2S_TransferRxCreateHandleEDMA(FLEXIO_I2S_Type *base, flexio_i2s_edma_handle_t *handle, flexio_i2s_edma_callback_t callback, void *userData, edma_handle_t *dmaHandle)

Initializes the FlexIO I2S Rx eDMA handle.

This function initializes the FlexIO I2S slave DMA handle which can be used for other FlexIO I2S master transactional APIs. Usually, for a specified FlexIO I2S instance, call this API once to get the initialized handle.

Parameters:

base – FlexIO I2S peripheral base address.
handle – FlexIO I2S eDMA handle pointer.
callback – FlexIO I2S eDMA callback function called while finished a block.
userData – User parameter for callback.
dmaHandle – eDMA handle for FlexIO I2S. This handle is a static value allocated by users.

void FLEXIO_I2S_TransferSetFormatEDMA(FLEXIO_I2S_Type *base, flexio_i2s_edma_handle_t *handle, flexio_i2s_format_t *format, uint32_t srcClock_Hz)

Configures the FlexIO I2S Tx audio format.

Audio format can be changed in run-time of FlexIO I2S. This function configures the sample rate and audio data format to be transferred. This function also sets the eDMA parameter according to format.

Parameters:

base – FlexIO I2S peripheral base address.
handle – FlexIO I2S eDMA handle pointer
format – Pointer to FlexIO I2S audio data format structure.
srcClock_Hz – FlexIO I2S clock source frequency in Hz, it should be 0 while in slave mode.

status_t FLEXIO_I2S_TransferSendEDMA(FLEXIO_I2S_Type *base, flexio_i2s_edma_handle_t *handle, flexio_i2s_transfer_t *xfer)

Performs a non-blocking FlexIO I2S transfer using DMA.

Note

This interface returned immediately after transfer initiates. Users should call FLEXIO_I2S_GetTransferStatus to poll the transfer status and check whether the FlexIO I2S transfer is finished.

Parameters:

base – FlexIO I2S peripheral base address.
handle – FlexIO I2S DMA handle pointer.
xfer – Pointer to DMA transfer structure.

Return values:

kStatus_Success – Start a FlexIO I2S eDMA send successfully.
kStatus_InvalidArgument – The input arguments is invalid.
kStatus_TxBusy – FlexIO I2S is busy sending data.

status_t FLEXIO_I2S_TransferReceiveEDMA(FLEXIO_I2S_Type *base, flexio_i2s_edma_handle_t *handle, flexio_i2s_transfer_t *xfer)

Performs a non-blocking FlexIO I2S receive using eDMA.

Note

This interface returned immediately after transfer initiates. Users should call FLEXIO_I2S_GetReceiveRemainingBytes to poll the transfer status and check whether the FlexIO I2S transfer is finished.

Parameters:

base – FlexIO I2S peripheral base address.
handle – FlexIO I2S DMA handle pointer.
xfer – Pointer to DMA transfer structure.

Return values:

kStatus_Success – Start a FlexIO I2S eDMA receive successfully.
kStatus_InvalidArgument – The input arguments is invalid.
kStatus_RxBusy – FlexIO I2S is busy receiving data.

void FLEXIO_I2S_TransferAbortSendEDMA(FLEXIO_I2S_Type *base, flexio_i2s_edma_handle_t *handle)

Aborts a FlexIO I2S transfer using eDMA.

Parameters:

base – FlexIO I2S peripheral base address.
handle – FlexIO I2S DMA handle pointer.

void FLEXIO_I2S_TransferAbortReceiveEDMA(FLEXIO_I2S_Type *base, flexio_i2s_edma_handle_t *handle)

Aborts a FlexIO I2S receive using eDMA.

Parameters:

base – FlexIO I2S peripheral base address.
handle – FlexIO I2S DMA handle pointer.

status_t FLEXIO_I2S_TransferGetSendCountEDMA(FLEXIO_I2S_Type *base, flexio_i2s_edma_handle_t *handle, size_t *count)

Gets the remaining bytes to be sent.

Parameters:

base – FlexIO I2S peripheral base address.
handle – FlexIO I2S DMA handle pointer.
count – Bytes sent.

Return values:

kStatus_Success – Succeed get the transfer count.
kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.

status_t FLEXIO_I2S_TransferGetReceiveCountEDMA(FLEXIO_I2S_Type *base, flexio_i2s_edma_handle_t *handle, size_t *count)

Get the remaining bytes to be received.

Parameters:

base – FlexIO I2S peripheral base address.
handle – FlexIO I2S DMA handle pointer.
count – Bytes received.

Return values:

kStatus_Success – Succeed get the transfer count.
kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.

FSL_FLEXIO_I2S_EDMA_DRIVER_VERSION: FlexIO I2S EDMA driver version 2.1.9.

typedef struct _flexio_i2s_edma_handle flexio_i2s_edma_handle_t

typedef void (*flexio_i2s_edma_callback_t)(FLEXIO_I2S_Type *base, flexio_i2s_edma_handle_t *handle, status_t status, void *userData): FlexIO I2S eDMA transfer callback function for finish and error.

struct _flexio_i2s_edma_handle

#include <fsl_flexio_i2s_edma.h>

FlexIO I2S DMA transfer handle, users should not touch the content of the handle.

Public Members

edma_handle_t *dmaHandle: DMA handler for FlexIO I2S send

uint8_t bytesPerFrame: Bytes in a frame

uint8_t nbytes: eDMA minor byte transfer count initially configured.

uint32_t state: Internal state for FlexIO I2S eDMA transfer

flexio_i2s_edma_callback_t callback: Callback for users while transfer finish or error occurred

void *userData: User callback parameter

edma_tcd_t tcd[(4U) + 1U]: TCD pool for eDMA transfer.

flexio_i2s_transfer_t queue[(4U)]: Transfer queue storing queued transfer.

size_t transferSize[(4U)]: Data bytes need to transfer

volatile uint8_t queueUser: Index for user to queue transfer.

volatile uint8_t queueDriver: Index for driver to get the transfer data and size

FlexIO eDMA SPI Driver

status_t FLEXIO_SPI_MasterTransferCreateHandleEDMA(FLEXIO_SPI_Type *base, flexio_spi_master_edma_handle_t *handle, flexio_spi_master_edma_transfer_callback_t callback, void *userData, edma_handle_t *txHandle, edma_handle_t *rxHandle)

Initializes the FlexIO SPI master eDMA handle.

This function initializes the FlexIO SPI master eDMA handle which can be used for other FlexIO SPI master transactional APIs. For a specified FlexIO SPI instance, call this API once to get the initialized handle.

Parameters:

base – Pointer to FLEXIO_SPI_Type structure.
handle – Pointer to flexio_spi_master_edma_handle_t structure to store the transfer state.
callback – SPI callback, NULL means no callback.
userData – callback function parameter.
txHandle – User requested eDMA handle for FlexIO SPI RX eDMA transfer.
rxHandle – User requested eDMA handle for FlexIO SPI TX eDMA transfer.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_OutOfRange – The FlexIO SPI eDMA type/handle table out of range.

status_t FLEXIO_SPI_MasterTransferEDMA(FLEXIO_SPI_Type *base, flexio_spi_master_edma_handle_t *handle, flexio_spi_transfer_t *xfer)

Performs a non-blocking FlexIO SPI transfer using eDMA.

Note

This interface returns immediately after transfer initiates. Call FLEXIO_SPI_MasterGetTransferCountEDMA to poll the transfer status and check whether the FlexIO SPI transfer is finished.

Parameters:

base – Pointer to FLEXIO_SPI_Type structure.
handle – Pointer to flexio_spi_master_edma_handle_t structure to store the transfer state.
xfer – Pointer to FlexIO SPI transfer structure.

Return values:

kStatus_Success – Successfully start a transfer.
kStatus_InvalidArgument – Input argument is invalid.
kStatus_FLEXIO_SPI_Busy – FlexIO SPI is not idle, is running another transfer.

void FLEXIO_SPI_MasterTransferAbortEDMA(FLEXIO_SPI_Type *base, flexio_spi_master_edma_handle_t *handle)

Aborts a FlexIO SPI transfer using eDMA.

Parameters:

base – Pointer to FLEXIO_SPI_Type structure.
handle – FlexIO SPI eDMA handle pointer.

status_t FLEXIO_SPI_MasterTransferGetCountEDMA(FLEXIO_SPI_Type *base, flexio_spi_master_edma_handle_t *handle, size_t *count)

Gets the number of bytes transferred so far using FlexIO SPI master eDMA.

Parameters:

base – Pointer to FLEXIO_SPI_Type structure.
handle – FlexIO SPI eDMA handle pointer.
count – Number of bytes transferred so far by the non-blocking transaction.

static inline void FLEXIO_SPI_SlaveTransferCreateHandleEDMA(FLEXIO_SPI_Type *base, flexio_spi_slave_edma_handle_t *handle, flexio_spi_slave_edma_transfer_callback_t callback, void *userData, edma_handle_t *txHandle, edma_handle_t *rxHandle)

Initializes the FlexIO SPI slave eDMA handle.

This function initializes the FlexIO SPI slave eDMA handle.

Parameters:

base – Pointer to FLEXIO_SPI_Type structure.
handle – Pointer to flexio_spi_slave_edma_handle_t structure to store the transfer state.
callback – SPI callback, NULL means no callback.
userData – callback function parameter.
txHandle – User requested eDMA handle for FlexIO SPI TX eDMA transfer.
rxHandle – User requested eDMA handle for FlexIO SPI RX eDMA transfer.

status_t FLEXIO_SPI_SlaveTransferEDMA(FLEXIO_SPI_Type *base, flexio_spi_slave_edma_handle_t *handle, flexio_spi_transfer_t *xfer)

Performs a non-blocking FlexIO SPI transfer using eDMA.

Note

This interface returns immediately after transfer initiates. Call FLEXIO_SPI_SlaveGetTransferCountEDMA to poll the transfer status and check whether the FlexIO SPI transfer is finished.

Parameters:

base – Pointer to FLEXIO_SPI_Type structure.
handle – Pointer to flexio_spi_slave_edma_handle_t structure to store the transfer state.
xfer – Pointer to FlexIO SPI transfer structure.

Return values:

kStatus_Success – Successfully start a transfer.
kStatus_InvalidArgument – Input argument is invalid.
kStatus_FLEXIO_SPI_Busy – FlexIO SPI is not idle, is running another transfer.

static inline void FLEXIO_SPI_SlaveTransferAbortEDMA(FLEXIO_SPI_Type *base, flexio_spi_slave_edma_handle_t *handle)

Aborts a FlexIO SPI transfer using eDMA.

Parameters:

base – Pointer to FLEXIO_SPI_Type structure.
handle – Pointer to flexio_spi_slave_edma_handle_t structure to store the transfer state.

static inline status_t FLEXIO_SPI_SlaveTransferGetCountEDMA(FLEXIO_SPI_Type *base, flexio_spi_slave_edma_handle_t *handle, size_t *count)

Gets the number of bytes transferred so far using FlexIO SPI slave eDMA.

Parameters:

base – Pointer to FLEXIO_SPI_Type structure.
handle – FlexIO SPI eDMA handle pointer.
count – Number of bytes transferred so far by the non-blocking transaction.

FSL_FLEXIO_SPI_EDMA_DRIVER_VERSION: FlexIO SPI EDMA driver version.

typedef struct _flexio_spi_master_edma_handle flexio_spi_master_edma_handle_t: typedef for flexio_spi_master_edma_handle_t in advance.

typedef flexio_spi_master_edma_handle_t flexio_spi_slave_edma_handle_t: Slave handle is the same with master handle.

typedef void (*flexio_spi_master_edma_transfer_callback_t)(FLEXIO_SPI_Type *base, flexio_spi_master_edma_handle_t *handle, status_t status, void *userData): FlexIO SPI master callback for finished transmit.

typedef void (*flexio_spi_slave_edma_transfer_callback_t)(FLEXIO_SPI_Type *base, flexio_spi_slave_edma_handle_t *handle, status_t status, void *userData): FlexIO SPI slave callback for finished transmit.

struct _flexio_spi_master_edma_handle

#include <fsl_flexio_spi_edma.h>

FlexIO SPI eDMA transfer handle, users should not touch the content of the handle.

Public Members

size_t transferSize: Total bytes to be transferred.

uint8_t nbytes: eDMA minor byte transfer count initially configured.

bool txInProgress: Send transfer in progress

bool rxInProgress: Receive transfer in progress

edma_handle_t *txHandle: DMA handler for SPI send

edma_handle_t *rxHandle: DMA handler for SPI receive

flexio_spi_master_edma_transfer_callback_t callback: Callback for SPI DMA transfer

void *userData: User Data for SPI DMA callback

FlexIO eDMA UART Driver

status_t FLEXIO_UART_TransferCreateHandleEDMA(FLEXIO_UART_Type *base, flexio_uart_edma_handle_t *handle, flexio_uart_edma_transfer_callback_t callback, void *userData, edma_handle_t *txEdmaHandle, edma_handle_t *rxEdmaHandle)

Initializes the UART handle which is used in transactional functions.

Parameters:

base – Pointer to FLEXIO_UART_Type.
handle – Pointer to flexio_uart_edma_handle_t structure.
callback – The callback function.
userData – The parameter of the callback function.
rxEdmaHandle – User requested DMA handle for RX DMA transfer.
txEdmaHandle – User requested DMA handle for TX DMA transfer.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_OutOfRange – The FlexIO SPI eDMA type/handle table out of range.

status_t FLEXIO_UART_TransferSendEDMA(FLEXIO_UART_Type *base, flexio_uart_edma_handle_t *handle, flexio_uart_transfer_t *xfer)

Sends data using eDMA.

This function sends data using eDMA. This is a non-blocking function, which returns right away. When all data is sent out, the send callback function is called.

Parameters:

base – Pointer to FLEXIO_UART_Type
handle – UART handle pointer.
xfer – UART eDMA transfer structure, see flexio_uart_transfer_t.

Return values:

kStatus_Success – if succeed, others failed.
kStatus_FLEXIO_UART_TxBusy – Previous transfer on going.

status_t FLEXIO_UART_TransferReceiveEDMA(FLEXIO_UART_Type *base, flexio_uart_edma_handle_t *handle, flexio_uart_transfer_t *xfer)

Receives data using eDMA.

This function receives data using eDMA. This is a non-blocking function, which returns right away. When all data is received, the receive callback function is called.

Parameters:

base – Pointer to FLEXIO_UART_Type
handle – Pointer to flexio_uart_edma_handle_t structure
xfer – UART eDMA transfer structure, see flexio_uart_transfer_t.

Return values:

kStatus_Success – if succeed, others failed.
kStatus_UART_RxBusy – Previous transfer on going.

void FLEXIO_UART_TransferAbortSendEDMA(FLEXIO_UART_Type *base, flexio_uart_edma_handle_t *handle)

Aborts the sent data which using eDMA.

This function aborts sent data which using eDMA.

Parameters:

base – Pointer to FLEXIO_UART_Type
handle – Pointer to flexio_uart_edma_handle_t structure

void FLEXIO_UART_TransferAbortReceiveEDMA(FLEXIO_UART_Type *base, flexio_uart_edma_handle_t *handle)

Aborts the receive data which using eDMA.

This function aborts the receive data which using eDMA.

Parameters:

base – Pointer to FLEXIO_UART_Type
handle – Pointer to flexio_uart_edma_handle_t structure

status_t FLEXIO_UART_TransferGetSendCountEDMA(FLEXIO_UART_Type *base, flexio_uart_edma_handle_t *handle, size_t *count)

Gets the number of bytes sent out.

This function gets the number of bytes sent out.

Parameters:

base – Pointer to FLEXIO_UART_Type
handle – Pointer to flexio_uart_edma_handle_t structure
count – Number of bytes sent so far by the non-blocking transaction.

Return values:

kStatus_NoTransferInProgress – transfer has finished or no transfer in progress.
kStatus_Success – Successfully return the count.

status_t FLEXIO_UART_TransferGetReceiveCountEDMA(FLEXIO_UART_Type *base, flexio_uart_edma_handle_t *handle, size_t *count)

Gets the number of bytes received.

This function gets the number of bytes received.

Parameters:

base – Pointer to FLEXIO_UART_Type
handle – Pointer to flexio_uart_edma_handle_t structure
count – Number of bytes received so far by the non-blocking transaction.

Return values:

kStatus_NoTransferInProgress – transfer has finished or no transfer in progress.
kStatus_Success – Successfully return the count.

FSL_FLEXIO_UART_EDMA_DRIVER_VERSION: FlexIO UART EDMA driver version.

typedef struct _flexio_uart_edma_handle flexio_uart_edma_handle_t

typedef void (*flexio_uart_edma_transfer_callback_t)(FLEXIO_UART_Type *base, flexio_uart_edma_handle_t *handle, status_t status, void *userData): UART transfer callback function.

struct _flexio_uart_edma_handle

#include <fsl_flexio_uart_edma.h>

UART eDMA handle.

Public Members

flexio_uart_edma_transfer_callback_t callback: Callback function.

void *userData: UART callback function parameter.

size_t txDataSizeAll: Total bytes to be sent.

size_t rxDataSizeAll: Total bytes to be received.

edma_handle_t *txEdmaHandle: The eDMA TX channel used.

edma_handle_t *rxEdmaHandle: The eDMA RX channel used.

uint8_t nbytes: eDMA minor byte transfer count initially configured.

volatile uint8_t txState: TX transfer state.

volatile uint8_t rxState: RX transfer state

FlexIO I2C Master Driver

status_t FLEXIO_I2C_CheckForBusyBus(FLEXIO_I2C_Type *base)

Make sure the bus isn’t already pulled down.

Check the FLEXIO pin status to see whether either of SDA and SCL pin is pulled down.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure..

Return values:

kStatus_Success –
kStatus_FLEXIO_I2C_Busy –

status_t FLEXIO_I2C_MasterInit(FLEXIO_I2C_Type *base, flexio_i2c_master_config_t *masterConfig, uint32_t srcClock_Hz)

Ungates the FlexIO clock, resets the FlexIO module, and configures the FlexIO I2C hardware configuration.

Example

FLEXIO_I2C_Type base = {
.flexioBase = FLEXIO,
.SDAPinIndex = 0,
.SCLPinIndex = 1,
.shifterIndex = {0,1},
.timerIndex = {0,1}
};
flexio_i2c_master_config_t config = {
.enableInDoze = false,
.enableInDebug = true,
.enableFastAccess = false,
.baudRate_Bps = 100000
};
FLEXIO_I2C_MasterInit(base, &config, srcClock_Hz);

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
masterConfig – Pointer to flexio_i2c_master_config_t structure.
srcClock_Hz – FlexIO source clock in Hz.

Return values:

kStatus_Success – Initialization successful
kStatus_InvalidArgument – The source clock exceed upper range limitation

void FLEXIO_I2C_MasterDeinit(FLEXIO_I2C_Type *base)

De-initializes the FlexIO I2C master peripheral. Calling this API Resets the FlexIO I2C master shifer and timer config, module can’t work unless the FLEXIO_I2C_MasterInit is called.

Parameters:

base – pointer to FLEXIO_I2C_Type structure.

void FLEXIO_I2C_MasterGetDefaultConfig(flexio_i2c_master_config_t *masterConfig)

Gets the default configuration to configure the FlexIO module. The configuration can be used directly for calling the FLEXIO_I2C_MasterInit().

Example:

flexio_i2c_master_config_t config;
FLEXIO_I2C_MasterGetDefaultConfig(&config);

Parameters:

masterConfig – Pointer to flexio_i2c_master_config_t structure.

static inline void FLEXIO_I2C_MasterEnable(FLEXIO_I2C_Type *base, bool enable)

Enables/disables the FlexIO module operation.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
enable – Pass true to enable module, false does not have any effect.

uint32_t FLEXIO_I2C_MasterGetStatusFlags(FLEXIO_I2C_Type *base)

Gets the FlexIO I2C master status flags.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure

Returns:

Status flag, use status flag to AND _flexio_i2c_master_status_flags can get the related status.

void FLEXIO_I2C_MasterClearStatusFlags(FLEXIO_I2C_Type *base, uint32_t mask)

Clears the FlexIO I2C master status flags.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
mask – Status flag. The parameter can be any combination of the following values:
- kFLEXIO_I2C_RxFullFlag
- kFLEXIO_I2C_ReceiveNakFlag

void FLEXIO_I2C_MasterEnableInterrupts(FLEXIO_I2C_Type *base, uint32_t mask)

Enables the FlexIO i2c master interrupt requests.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
mask – Interrupt source. Currently only one interrupt request source:
- kFLEXIO_I2C_TransferCompleteInterruptEnable

void FLEXIO_I2C_MasterDisableInterrupts(FLEXIO_I2C_Type *base, uint32_t mask)

Disables the FlexIO I2C master interrupt requests.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
mask – Interrupt source.

void FLEXIO_I2C_MasterSetBaudRate(FLEXIO_I2C_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz)

Sets the FlexIO I2C master transfer baudrate.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure
baudRate_Bps – the baud rate value in HZ
srcClock_Hz – source clock in HZ

void FLEXIO_I2C_MasterStart(FLEXIO_I2C_Type *base, uint8_t address, flexio_i2c_direction_t direction)

Sends START + 7-bit address to the bus.

Note

This API should be called when the transfer configuration is ready to send a START signal and 7-bit address to the bus. This is a non-blocking API, which returns directly after the address is put into the data register but the address transfer is not finished on the bus. Ensure that the kFLEXIO_I2C_RxFullFlag status is asserted before calling this API.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
address – 7-bit address.
direction – transfer direction. This parameter is one of the values in flexio_i2c_direction_t:
- kFLEXIO_I2C_Write: Transmit
- kFLEXIO_I2C_Read: Receive

void FLEXIO_I2C_MasterStop(FLEXIO_I2C_Type *base)

Sends the stop signal on the bus.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.

void FLEXIO_I2C_MasterRepeatedStart(FLEXIO_I2C_Type *base)

Sends the repeated start signal on the bus.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.

void FLEXIO_I2C_MasterAbortStop(FLEXIO_I2C_Type *base)

Sends the stop signal when transfer is still on-going.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.

void FLEXIO_I2C_MasterEnableAck(FLEXIO_I2C_Type *base, bool enable)

Configures the sent ACK/NAK for the following byte.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
enable – True to configure send ACK, false configure to send NAK.

status_t FLEXIO_I2C_MasterSetTransferCount(FLEXIO_I2C_Type *base, uint16_t count)

Sets the number of bytes to be transferred from a start signal to a stop signal.

Note

Call this API before a transfer begins because the timer generates a number of clocks according to the number of bytes that need to be transferred.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
count – Number of bytes need to be transferred from a start signal to a re-start/stop signal

Return values:

kStatus_Success – Successfully configured the count.
kStatus_InvalidArgument – Input argument is invalid.

static inline void FLEXIO_I2C_MasterWriteByte(FLEXIO_I2C_Type *base, uint32_t data)

Writes one byte of data to the I2C bus.

Note

This is a non-blocking API, which returns directly after the data is put into the data register but the data transfer is not finished on the bus. Ensure that the TxEmptyFlag is asserted before calling this API.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
data – a byte of data.

static inline uint8_t FLEXIO_I2C_MasterReadByte(FLEXIO_I2C_Type *base)

Reads one byte of data from the I2C bus.

Note

This is a non-blocking API, which returns directly after the data is read from the data register. Ensure that the data is ready in the register.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.

Returns:

data byte read.

status_t FLEXIO_I2C_MasterWriteBlocking(FLEXIO_I2C_Type *base, const uint8_t *txBuff, uint8_t txSize)

Sends a buffer of data in bytes.

Note

This function blocks via polling until all bytes have been sent.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
txBuff – The data bytes to send.
txSize – The number of data bytes to send.

Return values:

kStatus_Success – Successfully write data.
kStatus_FLEXIO_I2C_Nak – Receive NAK during writing data.
kStatus_FLEXIO_I2C_Timeout – Timeout polling status flags.

status_t FLEXIO_I2C_MasterReadBlocking(FLEXIO_I2C_Type *base, uint8_t *rxBuff, uint8_t rxSize)

Receives a buffer of bytes.

Note

This function blocks via polling until all bytes have been received.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
rxBuff – The buffer to store the received bytes.
rxSize – The number of data bytes to be received.

Return values:

kStatus_Success – Successfully read data.
kStatus_FLEXIO_I2C_Timeout – Timeout polling status flags.

status_t FLEXIO_I2C_MasterTransferBlocking(FLEXIO_I2C_Type *base, flexio_i2c_master_transfer_t *xfer)

Performs a master polling transfer on the I2C bus.

Note

The API does not return until the transfer succeeds or fails due to receiving NAK.

Parameters:

base – pointer to FLEXIO_I2C_Type structure.
xfer – pointer to flexio_i2c_master_transfer_t structure.

Returns:

status of status_t.

status_t FLEXIO_I2C_MasterTransferCreateHandle(FLEXIO_I2C_Type *base, flexio_i2c_master_handle_t *handle, flexio_i2c_master_transfer_callback_t callback, void *userData)

Initializes the I2C handle which is used in transactional functions.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
handle – Pointer to flexio_i2c_master_handle_t structure to store the transfer state.
callback – Pointer to user callback function.
userData – User param passed to the callback function.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_OutOfRange – The FlexIO type/handle/isr table out of range.

status_t FLEXIO_I2C_MasterTransferNonBlocking(FLEXIO_I2C_Type *base, flexio_i2c_master_handle_t *handle, flexio_i2c_master_transfer_t *xfer)

Performs a master interrupt non-blocking transfer on the I2C bus.

Note

The API returns immediately after the transfer initiates. Call FLEXIO_I2C_MasterTransferGetCount to poll the transfer status to check whether the transfer is finished. If the return status is not kStatus_FLEXIO_I2C_Busy, the transfer is finished.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure
handle – Pointer to flexio_i2c_master_handle_t structure which stores the transfer state
xfer – pointer to flexio_i2c_master_transfer_t structure

Return values:

kStatus_Success – Successfully start a transfer.
kStatus_FLEXIO_I2C_Busy – FlexIO I2C is not idle, is running another transfer.

status_t FLEXIO_I2C_MasterTransferGetCount(FLEXIO_I2C_Type *base, flexio_i2c_master_handle_t *handle, size_t *count)

Gets the master transfer status during a interrupt non-blocking transfer.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
handle – Pointer to flexio_i2c_master_handle_t structure which stores the transfer state.
count – Number of bytes transferred so far by the non-blocking transaction.

Return values:

kStatus_InvalidArgument – count is Invalid.
kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.
kStatus_Success – Successfully return the count.

void FLEXIO_I2C_MasterTransferAbort(FLEXIO_I2C_Type *base, flexio_i2c_master_handle_t *handle)

Aborts an interrupt non-blocking transfer early.

Note

This API can be called at any time when an interrupt non-blocking transfer initiates to abort the transfer early.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure
handle – Pointer to flexio_i2c_master_handle_t structure which stores the transfer state

void FLEXIO_I2C_MasterTransferHandleIRQ(void *i2cType, void *i2cHandle)

Master interrupt handler.

Parameters:

i2cType – Pointer to FLEXIO_I2C_Type structure
i2cHandle – Pointer to flexio_i2c_master_transfer_t structure

FSL_FLEXIO_I2C_MASTER_DRIVER_VERSION

FlexIO I2C transfer status.

Values:

enumerator kStatus_FLEXIO_I2C_Busy: I2C is busy doing transfer.

enumerator kStatus_FLEXIO_I2C_Idle: I2C is busy doing transfer.

enumerator kStatus_FLEXIO_I2C_Nak: NAK received during transfer.

enumerator kStatus_FLEXIO_I2C_Timeout: Timeout polling status flags.

enum _flexio_i2c_master_interrupt

Define FlexIO I2C master interrupt mask.

Values:

enumerator kFLEXIO_I2C_TxEmptyInterruptEnable: Tx buffer empty interrupt enable.

enumerator kFLEXIO_I2C_RxFullInterruptEnable: Rx buffer full interrupt enable.

enum _flexio_i2c_master_status_flags

Define FlexIO I2C master status mask.

Values:

enumerator kFLEXIO_I2C_TxEmptyFlag: Tx shifter empty flag.

enumerator kFLEXIO_I2C_RxFullFlag: Rx shifter full/Transfer complete flag.

enumerator kFLEXIO_I2C_ReceiveNakFlag: Receive NAK flag.

enum _flexio_i2c_direction

Direction of master transfer.

Values:

enumerator kFLEXIO_I2C_Write: Master send to slave.

enumerator kFLEXIO_I2C_Read: Master receive from slave.

typedef enum _flexio_i2c_direction flexio_i2c_direction_t: Direction of master transfer.

typedef struct _flexio_i2c_type FLEXIO_I2C_Type: Define FlexIO I2C master access structure typedef.

typedef struct _flexio_i2c_master_config flexio_i2c_master_config_t: Define FlexIO I2C master user configuration structure.

typedef struct _flexio_i2c_master_transfer flexio_i2c_master_transfer_t: Define FlexIO I2C master transfer structure.

typedef struct _flexio_i2c_master_handle flexio_i2c_master_handle_t: FlexIO I2C master handle typedef.

typedef void (*flexio_i2c_master_transfer_callback_t)(FLEXIO_I2C_Type *base, flexio_i2c_master_handle_t *handle, status_t status, void *userData): FlexIO I2C master transfer callback typedef.

I2C_RETRY_TIMES: Retry times for waiting flag.

struct _flexio_i2c_type

#include <fsl_flexio_i2c_master.h>

Define FlexIO I2C master access structure typedef.

Public Members

FLEXIO_Type *flexioBase: FlexIO base pointer.

uint8_t SDAPinIndex: Pin select for I2C SDA.

uint8_t SCLPinIndex: Pin select for I2C SCL.

uint8_t shifterIndex[2]: Shifter index used in FlexIO I2C.

uint8_t timerIndex[3]: Timer index used in FlexIO I2C.

uint32_t baudrate: Master transfer baudrate, used to calculate delay time.

struct _flexio_i2c_master_config

#include <fsl_flexio_i2c_master.h>

Define FlexIO I2C master user configuration structure.

Public Members

bool enableMaster: Enables the FlexIO I2C peripheral at initialization time.

bool enableInDoze: Enable/disable FlexIO operation in doze mode.

bool enableInDebug: Enable/disable FlexIO operation in debug mode.

bool enableFastAccess: Enable/disable fast access to FlexIO registers, fast access requires the FlexIO clock to be at least twice the frequency of the bus clock.

uint32_t baudRate_Bps: Baud rate in Bps.

struct _flexio_i2c_master_transfer

#include <fsl_flexio_i2c_master.h>

Define FlexIO I2C master transfer structure.

Public Members

uint32_t flags: Transfer flag which controls the transfer, reserved for FlexIO I2C.

uint8_t slaveAddress: 7-bit slave address.

flexio_i2c_direction_t direction: Transfer direction, read or write.

uint32_t subaddress: Sub address. Transferred MSB first.

uint8_t subaddressSize: Size of sub address.

uint8_t volatile *data: Transfer buffer.

volatile size_t dataSize: Transfer size.

struct _flexio_i2c_master_handle

#include <fsl_flexio_i2c_master.h>

Define FlexIO I2C master handle structure.

Public Members

flexio_i2c_master_transfer_t transfer: FlexIO I2C master transfer copy.

size_t transferSize: Total bytes to be transferred.

uint8_t state: Transfer state maintained during transfer.

flexio_i2c_master_transfer_callback_t completionCallback: Callback function called at transfer event. Callback function called at transfer event.

void *userData: Callback parameter passed to callback function.

bool needRestart: Whether master needs to send re-start signal.

FlexIO I2S Driver

void FLEXIO_I2S_Init(FLEXIO_I2S_Type *base, const flexio_i2s_config_t *config)

Initializes the FlexIO I2S.

This API configures FlexIO pins and shifter to I2S and configures the FlexIO I2S with a configuration structure. The configuration structure can be filled by the user, or be set with default values by FLEXIO_I2S_GetDefaultConfig().

Note

This API should be called at the beginning of the application to use the FlexIO I2S driver. Otherwise, any access to the FlexIO I2S module can cause hard fault because the clock is not enabled.

Parameters:

base – FlexIO I2S base pointer
config – FlexIO I2S configure structure.

void FLEXIO_I2S_GetDefaultConfig(flexio_i2s_config_t *config)

Sets the FlexIO I2S configuration structure to default values.

The purpose of this API is to get the configuration structure initialized for use in FLEXIO_I2S_Init(). Users may use the initialized structure unchanged in FLEXIO_I2S_Init() or modify some fields of the structure before calling FLEXIO_I2S_Init().

Parameters:

config – pointer to master configuration structure

void FLEXIO_I2S_Deinit(FLEXIO_I2S_Type *base)

De-initializes the FlexIO I2S.

Calling this API resets the FlexIO I2S shifter and timer config. After calling this API, call the FLEXO_I2S_Init to use the FlexIO I2S module.

Parameters:

base – FlexIO I2S base pointer

static inline void FLEXIO_I2S_Enable(FLEXIO_I2S_Type *base, bool enable)

Enables/disables the FlexIO I2S module operation.

Parameters:

base – Pointer to FLEXIO_I2S_Type
enable – True to enable, false dose not have any effect.

uint32_t FLEXIO_I2S_GetStatusFlags(FLEXIO_I2S_Type *base)

Gets the FlexIO I2S status flags.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure

Returns:

Status flag, which are ORed by the enumerators in the _flexio_i2s_status_flags.

void FLEXIO_I2S_EnableInterrupts(FLEXIO_I2S_Type *base, uint32_t mask)

Enables the FlexIO I2S interrupt.

This function enables the FlexIO UART interrupt.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure
mask – interrupt source

void FLEXIO_I2S_DisableInterrupts(FLEXIO_I2S_Type *base, uint32_t mask)

Disables the FlexIO I2S interrupt.

This function enables the FlexIO UART interrupt.

Parameters:

base – pointer to FLEXIO_I2S_Type structure
mask – interrupt source

static inline void FLEXIO_I2S_TxEnableDMA(FLEXIO_I2S_Type *base, bool enable)

Enables/disables the FlexIO I2S Tx DMA requests.

Parameters:

base – FlexIO I2S base pointer
enable – True means enable DMA, false means disable DMA.

static inline void FLEXIO_I2S_RxEnableDMA(FLEXIO_I2S_Type *base, bool enable)

Enables/disables the FlexIO I2S Rx DMA requests.

Parameters:

base – FlexIO I2S base pointer
enable – True means enable DMA, false means disable DMA.

static inline uint32_t FLEXIO_I2S_TxGetDataRegisterAddress(FLEXIO_I2S_Type *base)

Gets the FlexIO I2S send data register address.

This function returns the I2S data register address, mainly used by DMA/eDMA.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure

Returns:

FlexIO i2s send data register address.

static inline uint32_t FLEXIO_I2S_RxGetDataRegisterAddress(FLEXIO_I2S_Type *base)

Gets the FlexIO I2S receive data register address.

This function returns the I2S data register address, mainly used by DMA/eDMA.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure

Returns:

FlexIO i2s receive data register address.

void FLEXIO_I2S_MasterSetFormat(FLEXIO_I2S_Type *base, flexio_i2s_format_t *format, uint32_t srcClock_Hz)

Configures the FlexIO I2S audio format in master mode.

Audio format can be changed in run-time of FlexIO I2S. This function configures the sample rate and audio data format to be transferred.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure
format – Pointer to FlexIO I2S audio data format structure.
srcClock_Hz – I2S master clock source frequency in Hz.

void FLEXIO_I2S_SlaveSetFormat(FLEXIO_I2S_Type *base, flexio_i2s_format_t *format)

Configures the FlexIO I2S audio format in slave mode.

Audio format can be changed in run-time of FlexIO I2S. This function configures the sample rate and audio data format to be transferred.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure
format – Pointer to FlexIO I2S audio data format structure.

status_t FLEXIO_I2S_WriteBlocking(FLEXIO_I2S_Type *base, uint8_t bitWidth, uint8_t *txData, size_t size)

Sends data using a blocking method.

Note

This function blocks via polling until data is ready to be sent.

Parameters:

base – FlexIO I2S base pointer.
bitWidth – How many bits in a audio word, usually 8/16/24/32 bits.
txData – Pointer to the data to be written.
size – Bytes to be written.

Return values:

kStatus_Success – Successfully write data.
kStatus_FLEXIO_I2C_Timeout – Timeout polling status flags.

static inline void FLEXIO_I2S_WriteData(FLEXIO_I2S_Type *base, uint8_t bitWidth, uint32_t data)

Writes data into a data register.

Parameters:

base – FlexIO I2S base pointer.
bitWidth – How many bits in a audio word, usually 8/16/24/32 bits.
data – Data to be written.

status_t FLEXIO_I2S_ReadBlocking(FLEXIO_I2S_Type *base, uint8_t bitWidth, uint8_t *rxData, size_t size)

Receives a piece of data using a blocking method.

Note

This function blocks via polling until data is ready to be sent.

Parameters:

base – FlexIO I2S base pointer
bitWidth – How many bits in a audio word, usually 8/16/24/32 bits.
rxData – Pointer to the data to be read.
size – Bytes to be read.

Return values:

kStatus_Success – Successfully read data.
kStatus_FLEXIO_I2C_Timeout – Timeout polling status flags.

static inline uint32_t FLEXIO_I2S_ReadData(FLEXIO_I2S_Type *base)

Reads a data from the data register.

Parameters:

base – FlexIO I2S base pointer

Returns:

Data read from data register.

void FLEXIO_I2S_TransferTxCreateHandle(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, flexio_i2s_callback_t callback, void *userData)

Initializes the FlexIO I2S handle.

This function initializes the FlexIO I2S handle which can be used for other FlexIO I2S transactional APIs. Call this API once to get the initialized handle.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure
handle – Pointer to flexio_i2s_handle_t structure to store the transfer state.
callback – FlexIO I2S callback function, which is called while finished a block.
userData – User parameter for the FlexIO I2S callback.

void FLEXIO_I2S_TransferSetFormat(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, flexio_i2s_format_t *format, uint32_t srcClock_Hz)

Configures the FlexIO I2S audio format.

Audio format can be changed at run-time of FlexIO I2S. This function configures the sample rate and audio data format to be transferred.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure.
handle – FlexIO I2S handle pointer.
format – Pointer to audio data format structure.
srcClock_Hz – FlexIO I2S bit clock source frequency in Hz. This parameter should be 0 while in slave mode.

void FLEXIO_I2S_TransferRxCreateHandle(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, flexio_i2s_callback_t callback, void *userData)

Initializes the FlexIO I2S receive handle.

This function initializes the FlexIO I2S handle which can be used for other FlexIO I2S transactional APIs. Call this API once to get the initialized handle.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure.
handle – Pointer to flexio_i2s_handle_t structure to store the transfer state.
callback – FlexIO I2S callback function, which is called while finished a block.
userData – User parameter for the FlexIO I2S callback.

status_t FLEXIO_I2S_TransferSendNonBlocking(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, flexio_i2s_transfer_t *xfer)

Performs an interrupt non-blocking send transfer on FlexIO I2S.

Note

The API returns immediately after transfer initiates. Call FLEXIO_I2S_GetRemainingBytes to poll the transfer status and check whether the transfer is finished. If the return status is 0, the transfer is finished.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure.
handle – Pointer to flexio_i2s_handle_t structure which stores the transfer state
xfer – Pointer to flexio_i2s_transfer_t structure

Return values:

kStatus_Success – Successfully start the data transmission.
kStatus_FLEXIO_I2S_TxBusy – Previous transmission still not finished, data not all written to TX register yet.
kStatus_InvalidArgument – The input parameter is invalid.

status_t FLEXIO_I2S_TransferReceiveNonBlocking(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, flexio_i2s_transfer_t *xfer)

Performs an interrupt non-blocking receive transfer on FlexIO I2S.

Note

The API returns immediately after transfer initiates. Call FLEXIO_I2S_GetRemainingBytes to poll the transfer status to check whether the transfer is finished. If the return status is 0, the transfer is finished.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure.
handle – Pointer to flexio_i2s_handle_t structure which stores the transfer state
xfer – Pointer to flexio_i2s_transfer_t structure

Return values:

kStatus_Success – Successfully start the data receive.
kStatus_FLEXIO_I2S_RxBusy – Previous receive still not finished.
kStatus_InvalidArgument – The input parameter is invalid.

void FLEXIO_I2S_TransferAbortSend(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle)

Aborts the current send.

Note

This API can be called at any time when interrupt non-blocking transfer initiates to abort the transfer in a early time.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure.
handle – Pointer to flexio_i2s_handle_t structure which stores the transfer state

void FLEXIO_I2S_TransferAbortReceive(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle)

Aborts the current receive.

Note

This API can be called at any time when interrupt non-blocking transfer initiates to abort the transfer in a early time.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure.
handle – Pointer to flexio_i2s_handle_t structure which stores the transfer state

status_t FLEXIO_I2S_TransferGetSendCount(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, size_t *count)

Gets the remaining bytes to be sent.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure.
handle – Pointer to flexio_i2s_handle_t structure which stores the transfer state
count – Bytes sent.

Return values:

kStatus_Success – Succeed get the transfer count.
kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.

status_t FLEXIO_I2S_TransferGetReceiveCount(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, size_t *count)

Gets the remaining bytes to be received.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure.
handle – Pointer to flexio_i2s_handle_t structure which stores the transfer state
count – Bytes recieved.

Return values:

kStatus_Success – Succeed get the transfer count.
kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.

Returns:

count Bytes received.

void FLEXIO_I2S_TransferTxHandleIRQ(void *i2sBase, void *i2sHandle)

Tx interrupt handler.

Parameters:

i2sBase – Pointer to FLEXIO_I2S_Type structure.
i2sHandle – Pointer to flexio_i2s_handle_t structure

void FLEXIO_I2S_TransferRxHandleIRQ(void *i2sBase, void *i2sHandle)

Rx interrupt handler.

Parameters:

i2sBase – Pointer to FLEXIO_I2S_Type structure.
i2sHandle – Pointer to flexio_i2s_handle_t structure.

FSL_FLEXIO_I2S_DRIVER_VERSION: FlexIO I2S driver version 2.2.2.

FlexIO I2S transfer status.

Values:

enumerator kStatus_FLEXIO_I2S_Idle: FlexIO I2S is in idle state

enumerator kStatus_FLEXIO_I2S_TxBusy: FlexIO I2S Tx is busy

enumerator kStatus_FLEXIO_I2S_RxBusy: FlexIO I2S Tx is busy

enumerator kStatus_FLEXIO_I2S_Error: FlexIO I2S error occurred

enumerator kStatus_FLEXIO_I2S_QueueFull: FlexIO I2S transfer queue is full.

enumerator kStatus_FLEXIO_I2S_Timeout: FlexIO I2S timeout polling status flags.

enum _flexio_i2s_master_slave

Master or slave mode.

Values:

enumerator kFLEXIO_I2S_Master: Master mode

enumerator kFLEXIO_I2S_Slave: Slave mode

_flexio_i2s_interrupt_enable Define FlexIO FlexIO I2S interrupt mask.

Values:

enumerator kFLEXIO_I2S_TxDataRegEmptyInterruptEnable: Transmit buffer empty interrupt enable.

enumerator kFLEXIO_I2S_RxDataRegFullInterruptEnable: Receive buffer full interrupt enable.

_flexio_i2s_status_flags Define FlexIO FlexIO I2S status mask.

Values:

enumerator kFLEXIO_I2S_TxDataRegEmptyFlag: Transmit buffer empty flag.

enumerator kFLEXIO_I2S_RxDataRegFullFlag: Receive buffer full flag.

enum _flexio_i2s_sample_rate

Audio sample rate.

Values:

enumerator kFLEXIO_I2S_SampleRate8KHz: Sample rate 8000Hz

enumerator kFLEXIO_I2S_SampleRate11025Hz: Sample rate 11025Hz

enumerator kFLEXIO_I2S_SampleRate12KHz: Sample rate 12000Hz

enumerator kFLEXIO_I2S_SampleRate16KHz: Sample rate 16000Hz

enumerator kFLEXIO_I2S_SampleRate22050Hz: Sample rate 22050Hz

enumerator kFLEXIO_I2S_SampleRate24KHz: Sample rate 24000Hz

enumerator kFLEXIO_I2S_SampleRate32KHz: Sample rate 32000Hz

enumerator kFLEXIO_I2S_SampleRate44100Hz: Sample rate 44100Hz

enumerator kFLEXIO_I2S_SampleRate48KHz: Sample rate 48000Hz

enumerator kFLEXIO_I2S_SampleRate96KHz: Sample rate 96000Hz

enum _flexio_i2s_word_width

Audio word width.

Values:

enumerator kFLEXIO_I2S_WordWidth8bits: Audio data width 8 bits

enumerator kFLEXIO_I2S_WordWidth16bits: Audio data width 16 bits

enumerator kFLEXIO_I2S_WordWidth24bits: Audio data width 24 bits

enumerator kFLEXIO_I2S_WordWidth32bits: Audio data width 32 bits

typedef struct _flexio_i2s_type FLEXIO_I2S_Type: Define FlexIO I2S access structure typedef.

typedef enum _flexio_i2s_master_slave flexio_i2s_master_slave_t: Master or slave mode.

typedef struct _flexio_i2s_config flexio_i2s_config_t: FlexIO I2S configure structure.

typedef struct _flexio_i2s_format flexio_i2s_format_t: FlexIO I2S audio format, FlexIO I2S only support the same format in Tx and Rx.

typedef enum _flexio_i2s_sample_rate flexio_i2s_sample_rate_t: Audio sample rate.

typedef enum _flexio_i2s_word_width flexio_i2s_word_width_t: Audio word width.

typedef struct _flexio_i2s_transfer flexio_i2s_transfer_t: Define FlexIO I2S transfer structure.

typedef struct _flexio_i2s_handle flexio_i2s_handle_t

typedef void (*flexio_i2s_callback_t)(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, status_t status, void *userData): FlexIO I2S xfer callback prototype.

I2S_RETRY_TIMES: Retry times for waiting flag.

FLEXIO_I2S_XFER_QUEUE_SIZE: FlexIO I2S transfer queue size, user can refine it according to use case.

struct _flexio_i2s_type

#include <fsl_flexio_i2s.h>

Define FlexIO I2S access structure typedef.

Public Members

FLEXIO_Type *flexioBase: FlexIO base pointer

uint8_t txPinIndex: Tx data pin index in FlexIO pins

uint8_t rxPinIndex: Rx data pin index

uint8_t bclkPinIndex: Bit clock pin index

uint8_t fsPinIndex: Frame sync pin index

uint8_t txShifterIndex: Tx data shifter index

uint8_t rxShifterIndex: Rx data shifter index

uint8_t bclkTimerIndex: Bit clock timer index

uint8_t fsTimerIndex: Frame sync timer index

struct _flexio_i2s_config

#include <fsl_flexio_i2s.h>

FlexIO I2S configure structure.

Public Members

bool enableI2S: Enable FlexIO I2S

flexio_i2s_master_slave_t masterSlave: Master or slave

flexio_pin_polarity_t txPinPolarity: Tx data pin polarity, active high or low

flexio_pin_polarity_t rxPinPolarity: Rx data pin polarity

flexio_pin_polarity_t bclkPinPolarity: Bit clock pin polarity

flexio_pin_polarity_t fsPinPolarity: Frame sync pin polarity

flexio_shifter_timer_polarity_t txTimerPolarity: Tx data valid on bclk rising or falling edge

flexio_shifter_timer_polarity_t rxTimerPolarity: Rx data valid on bclk rising or falling edge

struct _flexio_i2s_format

#include <fsl_flexio_i2s.h>

FlexIO I2S audio format, FlexIO I2S only support the same format in Tx and Rx.

Public Members

uint8_t bitWidth: Bit width of audio data, always 8/16/24/32 bits

uint32_t sampleRate_Hz: Sample rate of the audio data

struct _flexio_i2s_transfer

#include <fsl_flexio_i2s.h>

Define FlexIO I2S transfer structure.

Public Members

uint8_t *data: Data buffer start pointer

size_t dataSize: Bytes to be transferred.

struct _flexio_i2s_handle

#include <fsl_flexio_i2s.h>

Define FlexIO I2S handle structure.

Public Members

uint32_t state: Internal state

flexio_i2s_callback_t callback: Callback function called at transfer event

void *userData: Callback parameter passed to callback function

uint8_t bitWidth: Bit width for transfer, 8/16/24/32bits

flexio_i2s_transfer_t queue[(4U)]: Transfer queue storing queued transfer

size_t transferSize[(4U)]: Data bytes need to transfer

volatile uint8_t queueUser: Index for user to queue transfer

volatile uint8_t queueDriver: Index for driver to get the transfer data and size

FlexIO SPI Driver

void FLEXIO_SPI_MasterInit(FLEXIO_SPI_Type *base, flexio_spi_master_config_t *masterConfig, uint32_t srcClock_Hz)

Ungates the FlexIO clock, resets the FlexIO module, configures the FlexIO SPI master hardware, and configures the FlexIO SPI with FlexIO SPI master configuration. The configuration structure can be filled by the user, or be set with default values by the FLEXIO_SPI_MasterGetDefaultConfig().

Example

FLEXIO_SPI_Type spiDev = {
.flexioBase = FLEXIO,
.SDOPinIndex = 0,
.SDIPinIndex = 1,
.SCKPinIndex = 2,
.CSnPinIndex = 3,
.shifterIndex = {0,1},
.timerIndex = {0,1}
};
flexio_spi_master_config_t config = {
.enableMaster = true,
.enableInDoze = false,
.enableInDebug = true,
.enableFastAccess = false,
.baudRate_Bps = 500000,
.phase = kFLEXIO_SPI_ClockPhaseFirstEdge,
.direction = kFLEXIO_SPI_MsbFirst,
.dataMode = kFLEXIO_SPI_8BitMode
};
FLEXIO_SPI_MasterInit(&spiDev, &config, srcClock_Hz);

Note

1.FlexIO SPI master only support CPOL = 0, which means clock inactive low. 2.For FlexIO SPI master, the input valid time is 1.5 clock cycles, for slave the output valid time is 2.5 clock cycles. So if FlexIO SPI master communicates with other spi IPs, the maximum baud rate is FlexIO clock frequency divided by 2*2=4. If FlexIO SPI master communicates with FlexIO SPI slave, the maximum baud rate is FlexIO clock frequency divided by (1.5+2.5)*2=8.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
masterConfig – Pointer to the flexio_spi_master_config_t structure.
srcClock_Hz – FlexIO source clock in Hz.

void FLEXIO_SPI_MasterDeinit(FLEXIO_SPI_Type *base)

Resets the FlexIO SPI timer and shifter config.

Parameters:

base – Pointer to the FLEXIO_SPI_Type.

void FLEXIO_SPI_MasterGetDefaultConfig(flexio_spi_master_config_t *masterConfig)

Gets the default configuration to configure the FlexIO SPI master. The configuration can be used directly by calling the FLEXIO_SPI_MasterConfigure(). Example:

flexio_spi_master_config_t masterConfig;
FLEXIO_SPI_MasterGetDefaultConfig(&masterConfig);

Parameters:

masterConfig – Pointer to the flexio_spi_master_config_t structure.

void FLEXIO_SPI_SlaveInit(FLEXIO_SPI_Type *base, flexio_spi_slave_config_t *slaveConfig)

Ungates the FlexIO clock, resets the FlexIO module, configures the FlexIO SPI slave hardware configuration, and configures the FlexIO SPI with FlexIO SPI slave configuration. The configuration structure can be filled by the user, or be set with default values by the FLEXIO_SPI_SlaveGetDefaultConfig().

Note

1.Only one timer is needed in the FlexIO SPI slave. As a result, the second timer index is ignored. 2.FlexIO SPI slave only support CPOL = 0, which means clock inactive low. 3.For FlexIO SPI master, the input valid time is 1.5 clock cycles, for slave the output valid time is 2.5 clock cycles. So if FlexIO SPI slave communicates with other spi IPs, the maximum baud rate is FlexIO clock frequency divided by 3*2=6. If FlexIO SPI slave communicates with FlexIO SPI master, the maximum baud rate is FlexIO clock frequency divided by (1.5+2.5)*2=8. Example

FLEXIO_SPI_Type spiDev = {
.flexioBase = FLEXIO,
.SDOPinIndex = 0,
.SDIPinIndex = 1,
.SCKPinIndex = 2,
.CSnPinIndex = 3,
.shifterIndex = {0,1},
.timerIndex = {0}
};
flexio_spi_slave_config_t config = {
.enableSlave = true,
.enableInDoze = false,
.enableInDebug = true,
.enableFastAccess = false,
.phase = kFLEXIO_SPI_ClockPhaseFirstEdge,
.direction = kFLEXIO_SPI_MsbFirst,
.dataMode = kFLEXIO_SPI_8BitMode
};
FLEXIO_SPI_SlaveInit(&spiDev, &config);

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
slaveConfig – Pointer to the flexio_spi_slave_config_t structure.

void FLEXIO_SPI_SlaveDeinit(FLEXIO_SPI_Type *base)

Gates the FlexIO clock.

Parameters:

base – Pointer to the FLEXIO_SPI_Type.

void FLEXIO_SPI_SlaveGetDefaultConfig(flexio_spi_slave_config_t *slaveConfig)

Gets the default configuration to configure the FlexIO SPI slave. The configuration can be used directly for calling the FLEXIO_SPI_SlaveConfigure(). Example:

flexio_spi_slave_config_t slaveConfig;
FLEXIO_SPI_SlaveGetDefaultConfig(&slaveConfig);

Parameters:

slaveConfig – Pointer to the flexio_spi_slave_config_t structure.

uint32_t FLEXIO_SPI_GetStatusFlags(FLEXIO_SPI_Type *base)

Gets FlexIO SPI status flags.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.

Returns:

status flag; Use the status flag to AND the following flag mask and get the status.

kFLEXIO_SPI_TxEmptyFlag
kFLEXIO_SPI_RxEmptyFlag

void FLEXIO_SPI_ClearStatusFlags(FLEXIO_SPI_Type *base, uint32_t mask)

Clears FlexIO SPI status flags.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
mask – status flag The parameter can be any combination of the following values:
- kFLEXIO_SPI_TxEmptyFlag
- kFLEXIO_SPI_RxEmptyFlag

void FLEXIO_SPI_EnableInterrupts(FLEXIO_SPI_Type *base, uint32_t mask)

Enables the FlexIO SPI interrupt.

This function enables the FlexIO SPI interrupt.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
mask – interrupt source. The parameter can be any combination of the following values:
- kFLEXIO_SPI_RxFullInterruptEnable
- kFLEXIO_SPI_TxEmptyInterruptEnable

void FLEXIO_SPI_DisableInterrupts(FLEXIO_SPI_Type *base, uint32_t mask)

Disables the FlexIO SPI interrupt.

This function disables the FlexIO SPI interrupt.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
mask – interrupt source The parameter can be any combination of the following values:
- kFLEXIO_SPI_RxFullInterruptEnable
- kFLEXIO_SPI_TxEmptyInterruptEnable

void FLEXIO_SPI_EnableDMA(FLEXIO_SPI_Type *base, uint32_t mask, bool enable)

Enables/disables the FlexIO SPI transmit DMA. This function enables/disables the FlexIO SPI Tx DMA, which means that asserting the kFLEXIO_SPI_TxEmptyFlag does/doesn’t trigger the DMA request.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
mask – SPI DMA source.
enable – True means enable DMA, false means disable DMA.

static inline uint32_t FLEXIO_SPI_GetTxDataRegisterAddress(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction)

Gets the FlexIO SPI transmit data register address for MSB first transfer.

This function returns the SPI data register address, which is mainly used by DMA/eDMA.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
direction – Shift direction of MSB first or LSB first.

Returns:

FlexIO SPI transmit data register address.

static inline uint32_t FLEXIO_SPI_GetRxDataRegisterAddress(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction)

Gets the FlexIO SPI receive data register address for the MSB first transfer.

This function returns the SPI data register address, which is mainly used by DMA/eDMA.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
direction – Shift direction of MSB first or LSB first.

Returns:

FlexIO SPI receive data register address.

static inline void FLEXIO_SPI_Enable(FLEXIO_SPI_Type *base, bool enable)

Enables/disables the FlexIO SPI module operation.

Parameters:

base – Pointer to the FLEXIO_SPI_Type.
enable – True to enable, false does not have any effect.

void FLEXIO_SPI_MasterSetBaudRate(FLEXIO_SPI_Type *base, uint32_t baudRate_Bps, uint32_t srcClockHz)

Sets baud rate for the FlexIO SPI transfer, which is only used for the master.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
baudRate_Bps – Baud Rate needed in Hz.
srcClockHz – SPI source clock frequency in Hz.

static inline void FLEXIO_SPI_WriteData(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction, uint32_t data)

Writes one byte of data, which is sent using the MSB method.

Note

This is a non-blocking API, which returns directly after the data is put into the data register but the data transfer is not finished on the bus. Ensure that the TxEmptyFlag is asserted before calling this API.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
direction – Shift direction of MSB first or LSB first.
data – 8/16/32 bit data.

static inline uint32_t FLEXIO_SPI_ReadData(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction)

Reads 8 bit/16 bit data.

Note

This is a non-blocking API, which returns directly after the data is read from the data register. Ensure that the RxFullFlag is asserted before calling this API.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
direction – Shift direction of MSB first or LSB first.

Returns:

8 bit/16 bit data received.

status_t FLEXIO_SPI_WriteBlocking(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction, const uint8_t *buffer, size_t size)

Sends a buffer of data bytes.

Note

This function blocks using the polling method until all bytes have been sent.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
direction – Shift direction of MSB first or LSB first.
buffer – The data bytes to send.
size – The number of data bytes to send.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_FLEXIO_SPI_Timeout – The transfer timed out and was aborted.

status_t FLEXIO_SPI_ReadBlocking(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction, uint8_t *buffer, size_t size)

Receives a buffer of bytes.

Note

This function blocks using the polling method until all bytes have been received.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
direction – Shift direction of MSB first or LSB first.
buffer – The buffer to store the received bytes.
size – The number of data bytes to be received.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_FLEXIO_SPI_Timeout – The transfer timed out and was aborted.

status_t FLEXIO_SPI_MasterTransferBlocking(FLEXIO_SPI_Type *base, flexio_spi_transfer_t *xfer)

Receives a buffer of bytes.

Note

This function blocks via polling until all bytes have been received.

Parameters:

base – pointer to FLEXIO_SPI_Type structure
xfer – FlexIO SPI transfer structure, see flexio_spi_transfer_t.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_FLEXIO_SPI_Timeout – The transfer timed out and was aborted.

void FLEXIO_SPI_FlushShifters(FLEXIO_SPI_Type *base)

Flush tx/rx shifters.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.

status_t FLEXIO_SPI_MasterTransferCreateHandle(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle, flexio_spi_master_transfer_callback_t callback, void *userData)

Initializes the FlexIO SPI Master handle, which is used in transactional functions.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
handle – Pointer to the flexio_spi_master_handle_t structure to store the transfer state.
callback – The callback function.
userData – The parameter of the callback function.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_OutOfRange – The FlexIO type/handle/ISR table out of range.

status_t FLEXIO_SPI_MasterTransferNonBlocking(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle, flexio_spi_transfer_t *xfer)

Master transfer data using IRQ.

This function sends data using IRQ. This is a non-blocking function, which returns right away. When all data is sent out/received, the callback function is called.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
handle – Pointer to the flexio_spi_master_handle_t structure to store the transfer state.
xfer – FlexIO SPI transfer structure. See flexio_spi_transfer_t.

Return values:

kStatus_Success – Successfully start a transfer.
kStatus_InvalidArgument – Input argument is invalid.
kStatus_FLEXIO_SPI_Busy – SPI is not idle, is running another transfer.

void FLEXIO_SPI_MasterTransferAbort(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle)

Aborts the master data transfer, which used IRQ.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
handle – Pointer to the flexio_spi_master_handle_t structure to store the transfer state.

status_t FLEXIO_SPI_MasterTransferGetCount(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle, size_t *count)

Gets the data transfer status which used IRQ.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
handle – Pointer to the flexio_spi_master_handle_t structure to store the transfer state.
count – Number of bytes transferred so far by the non-blocking transaction.

Return values:

kStatus_InvalidArgument – count is Invalid.
kStatus_Success – Successfully return the count.

void FLEXIO_SPI_MasterTransferHandleIRQ(void *spiType, void *spiHandle)

FlexIO SPI master IRQ handler function.

Parameters:

spiType – Pointer to the FLEXIO_SPI_Type structure.
spiHandle – Pointer to the flexio_spi_master_handle_t structure to store the transfer state.

status_t FLEXIO_SPI_SlaveTransferCreateHandle(FLEXIO_SPI_Type *base, flexio_spi_slave_handle_t *handle, flexio_spi_slave_transfer_callback_t callback, void *userData)

Initializes the FlexIO SPI Slave handle, which is used in transactional functions.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
handle – Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.
callback – The callback function.
userData – The parameter of the callback function.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_OutOfRange – The FlexIO type/handle/ISR table out of range.

status_t FLEXIO_SPI_SlaveTransferNonBlocking(FLEXIO_SPI_Type *base, flexio_spi_slave_handle_t *handle, flexio_spi_transfer_t *xfer)

Slave transfer data using IRQ.

This function sends data using IRQ. This is a non-blocking function, which returns right away. When all data is sent out/received, the callback function is called.

Parameters:

handle – Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.
base – Pointer to the FLEXIO_SPI_Type structure.
xfer – FlexIO SPI transfer structure. See flexio_spi_transfer_t.

Return values:

kStatus_Success – Successfully start a transfer.
kStatus_InvalidArgument – Input argument is invalid.
kStatus_FLEXIO_SPI_Busy – SPI is not idle; it is running another transfer.

static inline void FLEXIO_SPI_SlaveTransferAbort(FLEXIO_SPI_Type *base, flexio_spi_slave_handle_t *handle)

Aborts the slave data transfer which used IRQ, share same API with master.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
handle – Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.

static inline status_t FLEXIO_SPI_SlaveTransferGetCount(FLEXIO_SPI_Type *base, flexio_spi_slave_handle_t *handle, size_t *count)

Gets the data transfer status which used IRQ, share same API with master.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
handle – Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.
count – Number of bytes transferred so far by the non-blocking transaction.

Return values:

kStatus_InvalidArgument – count is Invalid.
kStatus_Success – Successfully return the count.

void FLEXIO_SPI_SlaveTransferHandleIRQ(void *spiType, void *spiHandle)

FlexIO SPI slave IRQ handler function.

Parameters:

spiType – Pointer to the FLEXIO_SPI_Type structure.
spiHandle – Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.

FSL_FLEXIO_SPI_DRIVER_VERSION: FlexIO SPI driver version.

Error codes for the FlexIO SPI driver.

Values:

enumerator kStatus_FLEXIO_SPI_Busy: FlexIO SPI is busy.

enumerator kStatus_FLEXIO_SPI_Idle: SPI is idle

enumerator kStatus_FLEXIO_SPI_Error: FlexIO SPI error.

enumerator kStatus_FLEXIO_SPI_Timeout: FlexIO SPI timeout polling status flags.

enum _flexio_spi_clock_phase

FlexIO SPI clock phase configuration.

Values:

enumerator kFLEXIO_SPI_ClockPhaseFirstEdge: First edge on SPSCK occurs at the middle of the first cycle of a data transfer.

enumerator kFLEXIO_SPI_ClockPhaseSecondEdge: First edge on SPSCK occurs at the start of the first cycle of a data transfer.

enum _flexio_spi_shift_direction

FlexIO SPI data shifter direction options.

Values:

enumerator kFLEXIO_SPI_MsbFirst: Data transfers start with most significant bit.

enumerator kFLEXIO_SPI_LsbFirst: Data transfers start with least significant bit.

enum _flexio_spi_data_bitcount_mode

FlexIO SPI data length mode options.

Values:

enumerator kFLEXIO_SPI_8BitMode: 8-bit data transmission mode.

enumerator kFLEXIO_SPI_16BitMode: 16-bit data transmission mode.

enumerator kFLEXIO_SPI_32BitMode: 32-bit data transmission mode.

enum _flexio_spi_interrupt_enable

Define FlexIO SPI interrupt mask.

Values:

enumerator kFLEXIO_SPI_TxEmptyInterruptEnable: Transmit buffer empty interrupt enable.

enumerator kFLEXIO_SPI_RxFullInterruptEnable: Receive buffer full interrupt enable.

enum _flexio_spi_status_flags

Define FlexIO SPI status mask.

Values:

enumerator kFLEXIO_SPI_TxBufferEmptyFlag: Transmit buffer empty flag.

enumerator kFLEXIO_SPI_RxBufferFullFlag: Receive buffer full flag.

enum _flexio_spi_dma_enable

Define FlexIO SPI DMA mask.

Values:

enumerator kFLEXIO_SPI_TxDmaEnable: Tx DMA request source

enumerator kFLEXIO_SPI_RxDmaEnable: Rx DMA request source

enumerator kFLEXIO_SPI_DmaAllEnable: All DMA request source

enum _flexio_spi_transfer_flags

Define FlexIO SPI transfer flags.

Note

Use kFLEXIO_SPI_csContinuous and one of the other flags to OR together to form the transfer flag.

Values:

enumerator kFLEXIO_SPI_8bitMsb: FlexIO SPI 8-bit MSB first

enumerator kFLEXIO_SPI_8bitLsb: FlexIO SPI 8-bit LSB first

enumerator kFLEXIO_SPI_16bitMsb: FlexIO SPI 16-bit MSB first

enumerator kFLEXIO_SPI_16bitLsb: FlexIO SPI 16-bit LSB first

enumerator kFLEXIO_SPI_32bitMsb: FlexIO SPI 32-bit MSB first

enumerator kFLEXIO_SPI_32bitLsb: FlexIO SPI 32-bit LSB first

enumerator kFLEXIO_SPI_csContinuous: Enable the CS signal continuous mode

typedef enum _flexio_spi_clock_phase flexio_spi_clock_phase_t: FlexIO SPI clock phase configuration.

typedef enum _flexio_spi_shift_direction flexio_spi_shift_direction_t: FlexIO SPI data shifter direction options.

typedef enum _flexio_spi_data_bitcount_mode flexio_spi_data_bitcount_mode_t: FlexIO SPI data length mode options.

typedef struct _flexio_spi_type FLEXIO_SPI_Type: Define FlexIO SPI access structure typedef.

typedef struct _flexio_spi_master_config flexio_spi_master_config_t: Define FlexIO SPI master configuration structure.

typedef struct _flexio_spi_slave_config flexio_spi_slave_config_t: Define FlexIO SPI slave configuration structure.

typedef struct _flexio_spi_transfer flexio_spi_transfer_t: Define FlexIO SPI transfer structure.

typedef struct _flexio_spi_master_handle flexio_spi_master_handle_t: typedef for flexio_spi_master_handle_t in advance.

typedef flexio_spi_master_handle_t flexio_spi_slave_handle_t: Slave handle is the same with master handle.

typedef void (*flexio_spi_master_transfer_callback_t)(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle, status_t status, void *userData): FlexIO SPI master callback for finished transmit.

typedef void (*flexio_spi_slave_transfer_callback_t)(FLEXIO_SPI_Type *base, flexio_spi_slave_handle_t *handle, status_t status, void *userData): FlexIO SPI slave callback for finished transmit.

FLEXIO_SPI_DUMMYDATA: FlexIO SPI dummy transfer data, the data is sent while txData is NULL.

SPI_RETRY_TIMES: Retry times for waiting flag.

FLEXIO_SPI_XFER_DATA_FORMAT(flag): Get the transfer data format of width and bit order.

struct _flexio_spi_type

#include <fsl_flexio_spi.h>

Define FlexIO SPI access structure typedef.

Public Members

FLEXIO_Type *flexioBase: FlexIO base pointer.

uint8_t SDOPinIndex: Pin select for data output. To set SDO pin in Hi-Z state, user needs to mux the pin as GPIO input and disable all pull up/down in application.

uint8_t SDIPinIndex: Pin select for data input.

uint8_t SCKPinIndex: Pin select for clock.

uint8_t CSnPinIndex: Pin select for enable.

uint8_t shifterIndex[2]: Shifter index used in FlexIO SPI.

uint8_t timerIndex[2]: Timer index used in FlexIO SPI.

struct _flexio_spi_master_config

#include <fsl_flexio_spi.h>

Define FlexIO SPI master configuration structure.

Public Members

bool enableMaster: Enable/disable FlexIO SPI master after configuration.

bool enableInDoze: Enable/disable FlexIO operation in doze mode.

bool enableInDebug: Enable/disable FlexIO operation in debug mode.

bool enableFastAccess: Enable/disable fast access to FlexIO registers, fast access requires the FlexIO clock to be at least twice the frequency of the bus clock.

uint32_t baudRate_Bps: Baud rate in Bps.

flexio_spi_clock_phase_t phase: Clock phase.

flexio_spi_data_bitcount_mode_t dataMode: 8bit or 16bit mode.

struct _flexio_spi_slave_config

#include <fsl_flexio_spi.h>

Define FlexIO SPI slave configuration structure.

Public Members

bool enableSlave: Enable/disable FlexIO SPI slave after configuration.

bool enableInDoze: Enable/disable FlexIO operation in doze mode.

bool enableInDebug: Enable/disable FlexIO operation in debug mode.

bool enableFastAccess: Enable/disable fast access to FlexIO registers, fast access requires the FlexIO clock to be at least twice the frequency of the bus clock.

flexio_spi_clock_phase_t phase: Clock phase.

flexio_spi_data_bitcount_mode_t dataMode: 8bit or 16bit mode.

struct _flexio_spi_transfer

#include <fsl_flexio_spi.h>

Define FlexIO SPI transfer structure.

Public Members

const uint8_t *txData: Send buffer.

uint8_t *rxData: Receive buffer.

size_t dataSize: Transfer bytes.

uint8_t flags: FlexIO SPI control flag, MSB first or LSB first.

struct _flexio_spi_master_handle

#include <fsl_flexio_spi.h>

Define FlexIO SPI handle structure.

Public Members

const uint8_t *txData: Transfer buffer.

uint8_t *rxData: Receive buffer.

size_t transferSize: Total bytes to be transferred.

volatile size_t txRemainingBytes: Send data remaining in bytes.

volatile size_t rxRemainingBytes: Receive data remaining in bytes.

volatile uint32_t state: FlexIO SPI internal state.

uint8_t bytePerFrame: SPI mode, 2bytes or 1byte in a frame

flexio_spi_shift_direction_t direction: Shift direction.

flexio_spi_master_transfer_callback_t callback: FlexIO SPI callback.

void *userData: Callback parameter.

bool isCsContinuous: Is current transfer using CS continuous mode.

uint32_t timer1Cfg: TIMER1 TIMCFG regiser value backup.

FlexIO UART Driver

status_t FLEXIO_UART_Init(FLEXIO_UART_Type *base, const flexio_uart_config_t *userConfig, uint32_t srcClock_Hz)

Ungates the FlexIO clock, resets the FlexIO module, configures FlexIO UART hardware, and configures the FlexIO UART with FlexIO UART configuration. The configuration structure can be filled by the user or be set with default values by FLEXIO_UART_GetDefaultConfig().

Example

FLEXIO_UART_Type base = {
.flexioBase = FLEXIO,
.TxPinIndex = 0,
.RxPinIndex = 1,
.shifterIndex = {0,1},
.timerIndex = {0,1}
};
flexio_uart_config_t config = {
.enableInDoze = false,
.enableInDebug = true,
.enableFastAccess = false,
.baudRate_Bps = 115200U,
.bitCountPerChar = 8
};
FLEXIO_UART_Init(base, &config, srcClock_Hz);

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
userConfig – Pointer to the flexio_uart_config_t structure.
srcClock_Hz – FlexIO source clock in Hz.

Return values:

kStatus_Success – Configuration success.
kStatus_FLEXIO_UART_BaudrateNotSupport – Baudrate is not supported for current clock source frequency.

void FLEXIO_UART_Deinit(FLEXIO_UART_Type *base)

Resets the FlexIO UART shifter and timer config.

Note

After calling this API, call the FLEXO_UART_Init to use the FlexIO UART module.

Parameters:

base – Pointer to FLEXIO_UART_Type structure

void FLEXIO_UART_GetDefaultConfig(flexio_uart_config_t *userConfig)

Gets the default configuration to configure the FlexIO UART. The configuration can be used directly for calling the FLEXIO_UART_Init(). Example:

flexio_uart_config_t config;
FLEXIO_UART_GetDefaultConfig(&userConfig);

Parameters:

userConfig – Pointer to the flexio_uart_config_t structure.

uint32_t FLEXIO_UART_GetStatusFlags(FLEXIO_UART_Type *base)

Gets the FlexIO UART status flags.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.

Returns:

FlexIO UART status flags.

void FLEXIO_UART_ClearStatusFlags(FLEXIO_UART_Type *base, uint32_t mask)

Gets the FlexIO UART status flags.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
mask – Status flag. The parameter can be any combination of the following values:
- kFLEXIO_UART_TxDataRegEmptyFlag
- kFLEXIO_UART_RxEmptyFlag
- kFLEXIO_UART_RxOverRunFlag

void FLEXIO_UART_EnableInterrupts(FLEXIO_UART_Type *base, uint32_t mask)

Enables the FlexIO UART interrupt.

This function enables the FlexIO UART interrupt.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
mask – Interrupt source.

void FLEXIO_UART_DisableInterrupts(FLEXIO_UART_Type *base, uint32_t mask)

Disables the FlexIO UART interrupt.

This function disables the FlexIO UART interrupt.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
mask – Interrupt source.

static inline uint32_t FLEXIO_UART_GetTxDataRegisterAddress(FLEXIO_UART_Type *base)

Gets the FlexIO UARt transmit data register address.

This function returns the UART data register address, which is mainly used by DMA/eDMA.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.

Returns:

FlexIO UART transmit data register address.

static inline uint32_t FLEXIO_UART_GetRxDataRegisterAddress(FLEXIO_UART_Type *base)

Gets the FlexIO UART receive data register address.

This function returns the UART data register address, which is mainly used by DMA/eDMA.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.

Returns:

FlexIO UART receive data register address.

static inline void FLEXIO_UART_EnableTxDMA(FLEXIO_UART_Type *base, bool enable)

Enables/disables the FlexIO UART transmit DMA. This function enables/disables the FlexIO UART Tx DMA, which means asserting the kFLEXIO_UART_TxDataRegEmptyFlag does/doesn’t trigger the DMA request.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
enable – True to enable, false to disable.

static inline void FLEXIO_UART_EnableRxDMA(FLEXIO_UART_Type *base, bool enable)

Enables/disables the FlexIO UART receive DMA. This function enables/disables the FlexIO UART Rx DMA, which means asserting kFLEXIO_UART_RxDataRegFullFlag does/doesn’t trigger the DMA request.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
enable – True to enable, false to disable.

static inline void FLEXIO_UART_Enable(FLEXIO_UART_Type *base, bool enable)

Enables/disables the FlexIO UART module operation.

Parameters:

base – Pointer to the FLEXIO_UART_Type.
enable – True to enable, false does not have any effect.

static inline void FLEXIO_UART_WriteByte(FLEXIO_UART_Type *base, const uint8_t *buffer)

Writes one byte of data.

Note

This is a non-blocking API, which returns directly after the data is put into the data register. Ensure that the TxEmptyFlag is asserted before calling this API.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
buffer – The data bytes to send.

static inline void FLEXIO_UART_ReadByte(FLEXIO_UART_Type *base, uint8_t *buffer)

Reads one byte of data.

Note

This is a non-blocking API, which returns directly after the data is read from the data register. Ensure that the RxFullFlag is asserted before calling this API.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
buffer – The buffer to store the received bytes.

status_t FLEXIO_UART_WriteBlocking(FLEXIO_UART_Type *base, const uint8_t *txData, size_t txSize)

Sends a buffer of data bytes.

Note

This function blocks using the polling method until all bytes have been sent.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
txData – The data bytes to send.
txSize – The number of data bytes to send.

Return values:

kStatus_FLEXIO_UART_Timeout – Transmission timed out and was aborted.
kStatus_Success – Successfully wrote all data.

status_t FLEXIO_UART_ReadBlocking(FLEXIO_UART_Type *base, uint8_t *rxData, size_t rxSize)

Receives a buffer of bytes.

Note

This function blocks using the polling method until all bytes have been received.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
rxData – The buffer to store the received bytes.
rxSize – The number of data bytes to be received.

Return values:

kStatus_FLEXIO_UART_Timeout – Transmission timed out and was aborted.
kStatus_Success – Successfully received all data.

status_t FLEXIO_UART_TransferCreateHandle(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle, flexio_uart_transfer_callback_t callback, void *userData)

Initializes the UART handle.

This function initializes the FlexIO UART handle, which can be used for other FlexIO UART transactional APIs. Call this API once to get the initialized handle.

The UART driver supports the “background” receiving, which means that users can set up a RX ring buffer optionally. Data received is stored into the ring buffer even when the user doesn’t call the FLEXIO_UART_TransferReceiveNonBlocking() API. If there is already data received in the ring buffer, users can get the received data from the ring buffer directly. The ring buffer is disabled if passing NULL as ringBuffer.

Parameters:

base – to FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.
callback – The callback function.
userData – The parameter of the callback function.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_OutOfRange – The FlexIO type/handle/ISR table out of range.

void FLEXIO_UART_TransferStartRingBuffer(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle, uint8_t *ringBuffer, size_t ringBufferSize)

Sets up the RX ring buffer.

This function sets up the RX ring buffer to a specific UART handle.

When the RX ring buffer is used, data received is stored into the ring buffer even when the user doesn’t call the UART_ReceiveNonBlocking() API. If there is already data received in the ring buffer, users can get the received data from the ring buffer directly.

Note

When using the RX ring buffer, one byte is reserved for internal use. In other words, if ringBufferSize is 32, only 31 bytes are used for saving data.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.
ringBuffer – Start address of ring buffer for background receiving. Pass NULL to disable the ring buffer.
ringBufferSize – Size of the ring buffer.

void FLEXIO_UART_TransferStopRingBuffer(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle)

Aborts the background transfer and uninstalls the ring buffer.

This function aborts the background transfer and uninstalls the ring buffer.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.

status_t FLEXIO_UART_TransferSendNonBlocking(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle, flexio_uart_transfer_t *xfer)

Transmits a buffer of data using the interrupt method.

This function sends data using an interrupt method. This is a non-blocking function, which returns directly without waiting for all data to be written to the TX register. When all data is written to the TX register in ISR, the FlexIO UART driver calls the callback function and passes the kStatus_FLEXIO_UART_TxIdle as status parameter.

Note

The kStatus_FLEXIO_UART_TxIdle is passed to the upper layer when all data is written to the TX register. However, it does not ensure that all data is sent out.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.
xfer – FlexIO UART transfer structure. See flexio_uart_transfer_t.

Return values:

kStatus_Success – Successfully starts the data transmission.
kStatus_UART_TxBusy – Previous transmission still not finished, data not written to the TX register.

void FLEXIO_UART_TransferAbortSend(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle)

Aborts the interrupt-driven data transmit.

This function aborts the interrupt-driven data sending. Get the remainBytes to find out how many bytes are still not sent out.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.

status_t FLEXIO_UART_TransferGetSendCount(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle, size_t *count)

Gets the number of bytes sent.

This function gets the number of bytes sent driven by interrupt.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.
count – Number of bytes sent so far by the non-blocking transaction.

Return values:

kStatus_NoTransferInProgress – transfer has finished or no transfer in progress.
kStatus_Success – Successfully return the count.

status_t FLEXIO_UART_TransferReceiveNonBlocking(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle, flexio_uart_transfer_t *xfer, size_t *receivedBytes)

Receives a buffer of data using the interrupt method.

This function receives data using the interrupt method. This is a non-blocking function, which returns without waiting for all data to be received. If the RX ring buffer is used and not empty, the data in ring buffer is copied and the parameter receivedBytes shows how many bytes are copied from the ring buffer. After copying, if the data in ring buffer is not enough to read, the receive request is saved by the UART driver. When new data arrives, the receive request is serviced first. When all data is received, the UART driver notifies the upper layer through a callback function and passes the status parameter kStatus_UART_RxIdle. For example, if the upper layer needs 10 bytes but there are only 5 bytes in the ring buffer, the 5 bytes are copied to xfer->data. This function returns with the parameter receivedBytes set to 5. For the last 5 bytes, newly arrived data is saved from the xfer->data[5]. When 5 bytes are received, the UART driver notifies upper layer. If the RX ring buffer is not enabled, this function enables the RX and RX interrupt to receive data to xfer->data. When all data is received, the upper layer is notified.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.
xfer – UART transfer structure. See flexio_uart_transfer_t.
receivedBytes – Bytes received from the ring buffer directly.

Return values:

kStatus_Success – Successfully queue the transfer into the transmit queue.
kStatus_FLEXIO_UART_RxBusy – Previous receive request is not finished.

void FLEXIO_UART_TransferAbortReceive(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle)

Aborts the receive data which was using IRQ.

This function aborts the receive data which was using IRQ.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.

status_t FLEXIO_UART_TransferGetReceiveCount(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle, size_t *count)

Gets the number of bytes received.

This function gets the number of bytes received driven by interrupt.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.
count – Number of bytes received so far by the non-blocking transaction.

Return values:

kStatus_NoTransferInProgress – transfer has finished or no transfer in progress.
kStatus_Success – Successfully return the count.

void FLEXIO_UART_TransferHandleIRQ(void *uartType, void *uartHandle)

FlexIO UART IRQ handler function.

This function processes the FlexIO UART transmit and receives the IRQ request.

Parameters:

uartType – Pointer to the FLEXIO_UART_Type structure.
uartHandle – Pointer to the flexio_uart_handle_t structure to store the transfer state.

void FLEXIO_UART_FlushShifters(FLEXIO_UART_Type *base)

Flush tx/rx shifters.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.

FSL_FLEXIO_UART_DRIVER_VERSION: FlexIO UART driver version.

Error codes for the UART driver.

Values:

enumerator kStatus_FLEXIO_UART_TxBusy: Transmitter is busy.

enumerator kStatus_FLEXIO_UART_RxBusy: Receiver is busy.

enumerator kStatus_FLEXIO_UART_TxIdle: UART transmitter is idle.

enumerator kStatus_FLEXIO_UART_RxIdle: UART receiver is idle.

enumerator kStatus_FLEXIO_UART_ERROR: ERROR happens on UART.

enumerator kStatus_FLEXIO_UART_RxRingBufferOverrun: UART RX software ring buffer overrun.

enumerator kStatus_FLEXIO_UART_RxHardwareOverrun: UART RX receiver overrun.

enumerator kStatus_FLEXIO_UART_Timeout: UART times out.

enumerator kStatus_FLEXIO_UART_BaudrateNotSupport: Baudrate is not supported in current clock source

enum _flexio_uart_bit_count_per_char

FlexIO UART bit count per char.

Values:

enumerator kFLEXIO_UART_7BitsPerChar: 7-bit data characters

enumerator kFLEXIO_UART_8BitsPerChar: 8-bit data characters

enumerator kFLEXIO_UART_9BitsPerChar: 9-bit data characters

enum _flexio_uart_interrupt_enable

Define FlexIO UART interrupt mask.

Values:

enumerator kFLEXIO_UART_TxDataRegEmptyInterruptEnable: Transmit buffer empty interrupt enable.

enumerator kFLEXIO_UART_RxDataRegFullInterruptEnable: Receive buffer full interrupt enable.

enum _flexio_uart_status_flags

Define FlexIO UART status mask.

Values:

enumerator kFLEXIO_UART_TxDataRegEmptyFlag: Transmit buffer empty flag.

enumerator kFLEXIO_UART_RxDataRegFullFlag: Receive buffer full flag.

enumerator kFLEXIO_UART_RxOverRunFlag: Receive buffer over run flag.

typedef enum _flexio_uart_bit_count_per_char flexio_uart_bit_count_per_char_t: FlexIO UART bit count per char.

typedef struct _flexio_uart_type FLEXIO_UART_Type: Define FlexIO UART access structure typedef.

typedef struct _flexio_uart_config flexio_uart_config_t: Define FlexIO UART user configuration structure.

typedef struct _flexio_uart_transfer flexio_uart_transfer_t: Define FlexIO UART transfer structure.

typedef struct _flexio_uart_handle flexio_uart_handle_t

typedef void (*flexio_uart_transfer_callback_t)(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle, status_t status, void *userData): FlexIO UART transfer callback function.

UART_RETRY_TIMES: Retry times for waiting flag.

struct _flexio_uart_type

#include <fsl_flexio_uart.h>

Define FlexIO UART access structure typedef.

Public Members

FLEXIO_Type *flexioBase: FlexIO base pointer.

uint8_t TxPinIndex: Pin select for UART_Tx.

uint8_t RxPinIndex: Pin select for UART_Rx.

uint8_t shifterIndex[2]: Shifter index used in FlexIO UART.

uint8_t timerIndex[2]: Timer index used in FlexIO UART.

struct _flexio_uart_config

#include <fsl_flexio_uart.h>

Define FlexIO UART user configuration structure.

Public Members

bool enableUart: Enable/disable FlexIO UART TX & RX.

bool enableInDoze: Enable/disable FlexIO operation in doze mode

bool enableInDebug: Enable/disable FlexIO operation in debug mode

bool enableFastAccess: Enable/disable fast access to FlexIO registers, fast access requires the FlexIO clock to be at least twice the frequency of the bus clock.

uint32_t baudRate_Bps: Baud rate in Bps.

flexio_uart_bit_count_per_char_t bitCountPerChar: number of bits, 7/8/9 -bit

struct _flexio_uart_transfer

#include <fsl_flexio_uart.h>

Define FlexIO UART transfer structure.

Public Members

size_t dataSize: Transfer size

struct _flexio_uart_handle

#include <fsl_flexio_uart.h>

Define FLEXIO UART handle structure.

Public Members

const uint8_t *volatile txData: Address of remaining data to send.

volatile size_t txDataSize: Size of the remaining data to send.

uint8_t *volatile rxData: Address of remaining data to receive.

volatile size_t rxDataSize: Size of the remaining data to receive.

size_t txDataSizeAll: Total bytes to be sent.

size_t rxDataSizeAll: Total bytes to be received.

uint8_t *rxRingBuffer: Start address of the receiver ring buffer.

size_t rxRingBufferSize: Size of the ring buffer.

volatile uint16_t rxRingBufferHead: Index for the driver to store received data into ring buffer.

volatile uint16_t rxRingBufferTail: Index for the user to get data from the ring buffer.

flexio_uart_transfer_callback_t callback: Callback function.

void *userData: UART callback function parameter.

volatile uint8_t txState: TX transfer state.

volatile uint8_t rxState: RX transfer state

union __unnamed92__

Public Members

uint8_t *data: The buffer of data to be transfer.

uint8_t *rxData: The buffer to receive data.

const uint8_t *txData: The buffer of data to be sent.

ftfx adapter

Ftftx CACHE Driver

enum _ftfx_cache_ram_func_constants

Constants for execute-in-RAM flash function.

Values:

enumerator kFTFx_CACHE_RamFuncMaxSizeInWords: The maximum size of execute-in-RAM function.

typedef struct _flash_prefetch_speculation_status ftfx_prefetch_speculation_status_t: FTFx prefetch speculation status.

typedef struct _ftfx_cache_config ftfx_cache_config_t

FTFx cache driver state information.

An instance of this structure is allocated by the user of the flash driver and passed into each of the driver APIs.

status_t FTFx_CACHE_Init(ftfx_cache_config_t *config)

Initializes the global FTFx cache structure members.

This function checks and initializes the Flash module for the other FTFx cache APIs.

Parameters:

config – Pointer to the storage for the driver runtime state.

Return values:

kStatus_FTFx_Success – API was executed successfully.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.

status_t FTFx_CACHE_ClearCachePrefetchSpeculation(ftfx_cache_config_t *config, bool isPreProcess)

Process the cache/prefetch/speculation to the flash.

Parameters:

config – A pointer to the storage for the driver runtime state.
isPreProcess – The possible option used to control flash cache/prefetch/speculation

Return values:

kStatus_FTFx_Success – API was executed successfully.
kStatus_FTFx_InvalidArgument – Invalid argument is provided.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.

status_t FTFx_CACHE_PflashSetPrefetchSpeculation(ftfx_prefetch_speculation_status_t *speculationStatus)

Sets the PFlash prefetch speculation to the intended speculation status.

Parameters:

speculationStatus – The expected protect status to set to the PFlash protection register. Each bit is

Return values:

kStatus_FTFx_Success – API was executed successfully.
kStatus_FTFx_InvalidSpeculationOption – An invalid speculation option argument is provided.

status_t FTFx_CACHE_PflashGetPrefetchSpeculation(ftfx_prefetch_speculation_status_t *speculationStatus)

Gets the PFlash prefetch speculation status.

Parameters:

speculationStatus – Speculation status returned by the PFlash IP.

Return values:

kStatus_FTFx_Success – API was executed successfully.

struct _flash_prefetch_speculation_status

#include <fsl_ftfx_cache.h>

FTFx prefetch speculation status.

Public Members

bool instructionOff: Instruction speculation.

bool dataOff: Data speculation.

union function_bit_operation_ptr_t

#include <fsl_ftfx_cache.h>

Public Members

uint32_t commadAddr

void (*callFlashCommand)(volatile uint32_t *base, uint32_t bitMask, uint32_t bitShift, uint32_t bitValue)

struct _ftfx_cache_config

#include <fsl_ftfx_cache.h>

FTFx cache driver state information.

An instance of this structure is allocated by the user of the flash driver and passed into each of the driver APIs.

Public Members

uint8_t flashMemoryIndex: 0 - primary flash; 1 - secondary flash

function_bit_operation_ptr_t bitOperFuncAddr: An buffer point to the flash execute-in-RAM function.

ftfx controller

FTFx driver status codes.

Values:

enumerator kStatus_FTFx_Success: API is executed successfully

enumerator kStatus_FTFx_InvalidArgument: Invalid argument

enumerator kStatus_FTFx_SizeError: Error size

enumerator kStatus_FTFx_AlignmentError: Parameter is not aligned with the specified baseline

enumerator kStatus_FTFx_AddressError: Address is out of range

enumerator kStatus_FTFx_AccessError: Invalid instruction codes and out-of bound addresses

enumerator kStatus_FTFx_ProtectionViolation: The program/erase operation is requested to execute on protected areas

enumerator kStatus_FTFx_CommandFailure: Run-time error during command execution.

enumerator kStatus_FTFx_UnknownProperty: Unknown property.

enumerator kStatus_FTFx_EraseKeyError: API erase key is invalid.

enumerator kStatus_FTFx_RegionExecuteOnly: The current region is execute-only.

enumerator kStatus_FTFx_ExecuteInRamFunctionNotReady: Execute-in-RAM function is not available.

enumerator kStatus_FTFx_PartitionStatusUpdateFailure: Failed to update partition status.

enumerator kStatus_FTFx_SetFlexramAsEepromError: Failed to set FlexRAM as EEPROM.

enumerator kStatus_FTFx_RecoverFlexramAsRamError: Failed to recover FlexRAM as RAM.

enumerator kStatus_FTFx_SetFlexramAsRamError: Failed to set FlexRAM as RAM.

enumerator kStatus_FTFx_RecoverFlexramAsEepromError: Failed to recover FlexRAM as EEPROM.

enumerator kStatus_FTFx_CommandNotSupported: Flash API is not supported.

enumerator kStatus_FTFx_SwapSystemNotInUninitialized: Swap system is not in an uninitialzed state.

enumerator kStatus_FTFx_SwapIndicatorAddressError: The swap indicator address is invalid.

enumerator kStatus_FTFx_ReadOnlyProperty: The flash property is read-only.

enumerator kStatus_FTFx_InvalidPropertyValue: The flash property value is out of range.

enumerator kStatus_FTFx_InvalidSpeculationOption: The option of flash prefetch speculation is invalid.

enumerator kStatus_FTFx_CommandOperationInProgress: The option of flash command is processing.

enum _ftfx_driver_api_keys

Enumeration for FTFx driver API keys.

Note

The resulting value is built with a byte order such that the string being readable in expected order when viewed in a hex editor, if the value is treated as a 32-bit little endian value.

Values:

enumerator kFTFx_ApiEraseKey: Key value used to validate all FTFx erase APIs.

void FTFx_API_Init(ftfx_config_t *config)

Initializes the global flash properties structure members.

This function checks and initializes the Flash module for the other Flash APIs.

Parameters:

config – Pointer to the storage for the driver runtime state.

status_t FTFx_API_UpdateFlexnvmPartitionStatus(ftfx_config_t *config)

Updates FlexNVM memory partition status according to data flash 0 IFR.

This function updates FlexNVM memory partition status.

Parameters:

config – Pointer to the storage for the driver runtime state.

Return values:

kStatus_FTFx_Success – API was executed successfully.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_PartitionStatusUpdateFailure – Failed to update the partition status.

status_t FTFx_CMD_Erase(ftfx_config_t *config, uint32_t start, uint32_t lengthInBytes, uint32_t key)

Erases the flash sectors encompassed by parameters passed into function.

This function erases the appropriate number of flash sectors based on the desired start address and length.

Parameters:

config – The pointer to the storage for the driver runtime state.
start – The start address of the desired flash memory to be erased. The start address does not need to be sector-aligned but must be word-aligned.
lengthInBytes – The length, given in bytes (not words or long-words) to be erased. Must be word-aligned.
key – The value used to validate all flash erase APIs.

Return values:

kStatus_FTFx_Success – API was executed successfully.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_AlignmentError – The parameter is not aligned with the specified baseline.
kStatus_FTFx_AddressError – The address is out of range.
kStatus_FTFx_EraseKeyError – The API erase key is invalid.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during the command execution.

status_t FTFx_CMD_EraseSectorNonBlocking(ftfx_config_t *config, uint32_t start, uint32_t key)

Erases the flash sectors encompassed by parameters passed into function.

This function erases one flash sector size based on the start address.

Parameters:

config – The pointer to the storage for the driver runtime state.
start – The start address of the desired flash memory to be erased. The start address does not need to be sector-aligned but must be word-aligned.
key – The value used to validate all flash erase APIs.

Return values:

kStatus_FTFx_Success – API was executed successfully.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_AlignmentError – The parameter is not aligned with the specified baseline.
kStatus_FTFx_AddressError – The address is out of range.
kStatus_FTFx_EraseKeyError – The API erase key is invalid.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.

status_t FTFx_CMD_EraseAll(ftfx_config_t *config, uint32_t key)

Erases entire flash.

Parameters:

config – Pointer to the storage for the driver runtime state.
key – A value used to validate all flash erase APIs.

Return values:

kStatus_FTFx_Success – API was executed successfully.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_EraseKeyError – API erase key is invalid.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during command execution.
kStatus_FTFx_PartitionStatusUpdateFailure – Failed to update the partition status.

status_t FTFx_CMD_EraseAllUnsecure(ftfx_config_t *config, uint32_t key)

Erases the entire flash, including protected sectors.

Parameters:

config – Pointer to the storage for the driver runtime state.
key – A value used to validate all flash erase APIs.

Return values:

kStatus_FTFx_Success – API was executed successfully.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_EraseKeyError – API erase key is invalid.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during command execution.
kStatus_FTFx_PartitionStatusUpdateFailure – Failed to update the partition status.

status_t FTFx_CMD_EraseAllExecuteOnlySegments(ftfx_config_t *config, uint32_t key)

Erases all program flash execute-only segments defined by the FXACC registers.

Parameters:

config – Pointer to the storage for the driver runtime state.
key – A value used to validate all flash erase APIs.

Return values:

kStatus_FTFx_Success – API was executed successfully.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_EraseKeyError – API erase key is invalid.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during the command execution.

status_t FTFx_CMD_Program(ftfx_config_t *config, uint32_t start, const uint8_t *src, uint32_t lengthInBytes)

Programs flash with data at locations passed in through parameters.

This function programs the flash memory with the desired data for a given flash area as determined by the start address and the length.

Parameters:

config – A pointer to the storage for the driver runtime state.
start – The start address of the desired flash memory to be programmed. Must be word-aligned.
src – A pointer to the source buffer of data that is to be programmed into the flash.
lengthInBytes – The length, given in bytes (not words or long-words), to be programmed. Must be word-aligned.

Return values:

kStatus_FTFx_Success – API was executed successfully.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_AlignmentError – Parameter is not aligned with the specified baseline.
kStatus_FTFx_AddressError – Address is out of range.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during the command execution.

status_t FTFx_CMD_ProgramOnce(ftfx_config_t *config, uint32_t index, const uint8_t *src, uint32_t lengthInBytes)

Programs Program Once Field through parameters.

This function programs the Program Once Field with the desired data for a given flash area as determined by the index and length.

Parameters:

config – A pointer to the storage for the driver runtime state.
index – The index indicating which area of the Program Once Field to be programmed.
src – A pointer to the source buffer of data that is to be programmed into the Program Once Field.
lengthInBytes – The length, given in bytes (not words or long-words), to be programmed. Must be word-aligned.

Return values:

kStatus_FTFx_Success – API was executed successfully.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during the command execution.

status_t FTFx_CMD_ProgramSection(ftfx_config_t *config, uint32_t start, const uint8_t *src, uint32_t lengthInBytes)

Programs flash with data at locations passed in through parameters via the Program Section command.

This function programs the flash memory with the desired data for a given flash area as determined by the start address and length.

Parameters:

config – A pointer to the storage for the driver runtime state.
start – The start address of the desired flash memory to be programmed. Must be word-aligned.
src – A pointer to the source buffer of data that is to be programmed into the flash.
lengthInBytes – The length, given in bytes (not words or long-words), to be programmed. Must be word-aligned.

Return values:

kStatus_FTFx_Success – API was executed successfully.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_AlignmentError – Parameter is not aligned with specified baseline.
kStatus_FTFx_AddressError – Address is out of range.
kStatus_FTFx_SetFlexramAsRamError – Failed to set flexram as RAM.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during command execution.
kStatus_FTFx_RecoverFlexramAsEepromError – Failed to recover FlexRAM as EEPROM.

status_t FTFx_CMD_ProgramPartition(ftfx_config_t *config, ftfx_partition_flexram_load_opt_t option, uint32_t eepromDataSizeCode, uint32_t flexnvmPartitionCode, uint8_t CSEcKeySize, uint8_t CFE)

Prepares the FlexNVM block for use as data flash, EEPROM backup, or a combination of both and initializes the FlexRAM.

Parameters:

config – Pointer to storage for the driver runtime state.
option – The option used to set FlexRAM load behavior during reset.
eepromDataSizeCode – Determines the amount of FlexRAM used in each of the available EEPROM subsystems.
flexnvmPartitionCode – Specifies how to split the FlexNVM block between data flash memory and EEPROM backup memory supporting EEPROM functions.

Return values:

kStatus_FTFx_Success – API was executed successfully.
kStatus_FTFx_InvalidArgument – Invalid argument is provided.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during command execution.

status_t FTFx_CMD_ReadOnce(ftfx_config_t *config, uint32_t index, uint8_t *dst, uint32_t lengthInBytes)

Reads the Program Once Field through parameters.

This function reads the read once feild with given index and length.

Parameters:

config – A pointer to the storage for the driver runtime state.
index – The index indicating the area of program once field to be read.
dst – A pointer to the destination buffer of data that is used to store data to be read.
lengthInBytes – The length, given in bytes (not words or long-words), to be programmed. Must be word-aligned.

Return values:

kStatus_FTFx_Success – API was executed successfully.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during the command execution.

status_t FTFx_CMD_ReadResource(ftfx_config_t *config, uint32_t start, uint8_t *dst, uint32_t lengthInBytes, ftfx_read_resource_opt_t option)

Reads the resource with data at locations passed in through parameters.

This function reads the flash memory with the desired location for a given flash area as determined by the start address and length.

Parameters:

config – A pointer to the storage for the driver runtime state.
start – The start address of the desired flash memory to be programmed. Must be word-aligned.
dst – A pointer to the destination buffer of data that is used to store data to be read.
lengthInBytes – The length, given in bytes (not words or long-words), to be read. Must be word-aligned.
option – The resource option which indicates which area should be read back.

Return values:

kStatus_FTFx_Success – API was executed successfully.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_AlignmentError – Parameter is not aligned with the specified baseline.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during the command execution.

status_t FTFx_CMD_VerifyErase(ftfx_config_t *config, uint32_t start, uint32_t lengthInBytes, ftfx_margin_value_t margin)

Verifies an erasure of the desired flash area at a specified margin level.

This function checks the appropriate number of flash sectors based on the desired start address and length to check whether the flash is erased to the specified read margin level.

Parameters:

config – A pointer to the storage for the driver runtime state.
start – The start address of the desired flash memory to be verified. The start address does not need to be sector-aligned but must be word-aligned.
lengthInBytes – The length, given in bytes (not words or long-words), to be verified. Must be word-aligned.
margin – Read margin choice.

Return values:

kStatus_FTFx_Success – API was executed successfully.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_AlignmentError – Parameter is not aligned with specified baseline.
kStatus_FTFx_AddressError – Address is out of range.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during the command execution.

status_t FTFx_CMD_VerifyEraseAll(ftfx_config_t *config, ftfx_margin_value_t margin)

Verifies erasure of the entire flash at a specified margin level.

This function checks whether the flash is erased to the specified read margin level.

Parameters:

config – A pointer to the storage for the driver runtime state.
margin – Read margin choice.

Return values:

kStatus_FTFx_Success – API was executed successfully.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during the command execution.

status_t FTFx_CMD_VerifyEraseAllExecuteOnlySegments(ftfx_config_t *config, ftfx_margin_value_t margin)

Verifies whether the program flash execute-only segments have been erased to the specified read margin level.

Parameters:

config – A pointer to the storage for the driver runtime state.
margin – Read margin choice.

Return values:

kStatus_FTFx_Success – API was executed successfully.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during the command execution.

status_t FTFx_CMD_VerifyProgram(ftfx_config_t *config, uint32_t start, uint32_t lengthInBytes, const uint8_t *expectedData, ftfx_margin_value_t margin, uint32_t *failedAddress, uint32_t *failedData)

Verifies programming of the desired flash area at a specified margin level.

This function verifies the data programed in the flash memory using the Flash Program Check Command and compares it to the expected data for a given flash area as determined by the start address and length.

Parameters:

config – A pointer to the storage for the driver runtime state.
start – The start address of the desired flash memory to be verified. Must be word-aligned.
lengthInBytes – The length, given in bytes (not words or long-words), to be verified. Must be word-aligned.
expectedData – A pointer to the expected data that is to be verified against.
margin – Read margin choice.
failedAddress – A pointer to the returned failing address.
failedData – A pointer to the returned failing data. Some derivatives do not include failed data as part of the FCCOBx registers. In this case, zeros are returned upon failure.

Return values:

kStatus_FTFx_Success – API was executed successfully.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_AlignmentError – Parameter is not aligned with specified baseline.
kStatus_FTFx_AddressError – Address is out of range.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during the command execution.

status_t FTFx_REG_GetSecurityState(ftfx_config_t *config, ftfx_security_state_t *state)

Returns the security state via the pointer passed into the function.

This function retrieves the current flash security status, including the security enabling state and the backdoor key enabling state.

Parameters:

config – A pointer to storage for the driver runtime state.
state – A pointer to the value returned for the current security status code:

Return values:

kStatus_FTFx_Success – API was executed successfully.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.

status_t FTFx_CMD_SecurityBypass(ftfx_config_t *config, const uint8_t *backdoorKey)

Allows users to bypass security with a backdoor key.

If the MCU is in secured state, this function unsecures the MCU by comparing the provided backdoor key with ones in the flash configuration field.

Parameters:

config – A pointer to the storage for the driver runtime state.
backdoorKey – A pointer to the user buffer containing the backdoor key.

Return values:

kStatus_FTFx_Success – API was executed successfully.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during the command execution.

status_t FTFx_CMD_SetFlexramFunction(ftfx_config_t *config, ftfx_flexram_func_opt_t option)

Sets the FlexRAM function command.

Parameters:

config – A pointer to the storage for the driver runtime state.
option – The option used to set the work mode of FlexRAM.

Return values:

kStatus_FTFx_Success – API was executed successfully.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during the command execution.

status_t FTFx_CMD_SwapControl(ftfx_config_t *config, uint32_t address, ftfx_swap_control_opt_t option, ftfx_swap_state_config_t *returnInfo)

Configures the Swap function or checks the swap state of the Flash module.

Parameters:

config – A pointer to the storage for the driver runtime state.
address – Address used to configure the flash Swap function.
option – The possible option used to configure Flash Swap function or check the flash Swap status
returnInfo – A pointer to the data which is used to return the information of flash Swap.

Return values:

kStatus_FTFx_Success – API was executed successfully.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_AlignmentError – Parameter is not aligned with specified baseline.
kStatus_FTFx_SwapIndicatorAddressError – Swap indicator address is invalid.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during the command execution.

enum _ftfx_partition_flexram_load_option

Enumeration for the FlexRAM load during reset option.

Values:

enumerator kFTFx_PartitionFlexramLoadOptLoadedWithValidEepromData: FlexRAM is loaded with valid EEPROM data during reset sequence.

enumerator kFTFx_PartitionFlexramLoadOptNotLoaded: FlexRAM is not loaded during reset sequence.

enum _ftfx_read_resource_opt

Enumeration for the two possible options of flash read resource command.

Values:

enumerator kFTFx_ResourceOptionFlashIfr: Select code for Program flash 0 IFR, Program flash swap 0 IFR, Data flash 0 IFR

enumerator kFTFx_ResourceOptionVersionId: Select code for the version ID

enum _ftfx_margin_value

Enumeration for supported FTFx margin levels.

Values:

enumerator kFTFx_MarginValueNormal: Use the ‘normal’ read level for 1s.

enumerator kFTFx_MarginValueUser: Apply the ‘User’ margin to the normal read-1 level.

enumerator kFTFx_MarginValueFactory: Apply the ‘Factory’ margin to the normal read-1 level.

enumerator kFTFx_MarginValueInvalid: Not real margin level, Used to determine the range of valid margin level.

enum _ftfx_security_state

Enumeration for the three possible FTFx security states.

Values:

enumerator kFTFx_SecurityStateNotSecure: Flash is not secure.

enumerator kFTFx_SecurityStateBackdoorEnabled: Flash backdoor is enabled.

enumerator kFTFx_SecurityStateBackdoorDisabled: Flash backdoor is disabled.

enum _ftfx_flexram_function_option

Enumeration for the two possilbe options of set FlexRAM function command.

Values:

enumerator kFTFx_FlexramFuncOptAvailableAsRam: An option used to make FlexRAM available as RAM

enumerator kFTFx_FlexramFuncOptAvailableForEeprom: An option used to make FlexRAM available for EEPROM

enum _flash_acceleration_ram_property

Enumeration for acceleration ram property.

Values:

enumerator kFLASH_AccelerationRamSize

enum _ftfx_swap_control_option

Enumeration for the possible options of Swap control commands.

Values:

enumerator kFTFx_SwapControlOptionIntializeSystem: An option used to initialize the Swap system

enumerator kFTFx_SwapControlOptionSetInUpdateState: An option used to set the Swap in an update state

enumerator kFTFx_SwapControlOptionSetInCompleteState: An option used to set the Swap in a complete state

enumerator kFTFx_SwapControlOptionReportStatus: An option used to report the Swap status

enumerator kFTFx_SwapControlOptionDisableSystem: An option used to disable the Swap status

enum _ftfx_swap_state

Enumeration for the possible flash Swap status.

Values:

enumerator kFTFx_SwapStateUninitialized: Flash Swap system is in an uninitialized state.

enumerator kFTFx_SwapStateReady: Flash Swap system is in a ready state.

enumerator kFTFx_SwapStateUpdate: Flash Swap system is in an update state.

enumerator kFTFx_SwapStateUpdateErased: Flash Swap system is in an updateErased state.

enumerator kFTFx_SwapStateComplete: Flash Swap system is in a complete state.

enumerator kFTFx_SwapStateDisabled: Flash Swap system is in a disabled state.

enum _ftfx_swap_block_status

Enumeration for the possible flash Swap block status.

Values:

enumerator kFTFx_SwapBlockStatusLowerHalfProgramBlocksAtZero: Swap block status is that lower half program block at zero.

enumerator kFTFx_SwapBlockStatusUpperHalfProgramBlocksAtZero: Swap block status is that upper half program block at zero.

enum _ftfx_memory_type

Enumeration for FTFx memory type.

Values:

enumerator kFTFx_MemTypePflash

enumerator kFTFx_MemTypeFlexnvm

typedef enum _ftfx_partition_flexram_load_option ftfx_partition_flexram_load_opt_t: Enumeration for the FlexRAM load during reset option.

typedef enum _ftfx_read_resource_opt ftfx_read_resource_opt_t: Enumeration for the two possible options of flash read resource command.

typedef enum _ftfx_margin_value ftfx_margin_value_t: Enumeration for supported FTFx margin levels.

typedef enum _ftfx_security_state ftfx_security_state_t: Enumeration for the three possible FTFx security states.

typedef enum _ftfx_flexram_function_option ftfx_flexram_func_opt_t: Enumeration for the two possilbe options of set FlexRAM function command.

typedef enum _ftfx_swap_control_option ftfx_swap_control_opt_t: Enumeration for the possible options of Swap control commands.

typedef enum _ftfx_swap_state ftfx_swap_state_t: Enumeration for the possible flash Swap status.

typedef enum _ftfx_swap_block_status ftfx_swap_block_status_t: Enumeration for the possible flash Swap block status.

typedef struct _ftfx_swap_state_config ftfx_swap_state_config_t: Flash Swap information.

typedef struct _ftfx_special_mem ftfx_spec_mem_t: ftfx special memory access information.

typedef struct _ftfx_mem_descriptor ftfx_mem_desc_t: Flash memory descriptor.

typedef struct _ftfx_ops_config ftfx_ops_config_t: Active FTFx information for the current operation.

typedef struct _ftfx_ifr_descriptor ftfx_ifr_desc_t: Flash IFR memory descriptor.

typedef struct _ftfx_config ftfx_config_t

Flash driver state information.

An instance of this structure is allocated by the user of the flash driver and passed into each of the driver APIs.

struct _ftfx_swap_state_config

#include <fsl_ftfx_controller.h>

Flash Swap information.

Public Members

ftfx_swap_state_t flashSwapState: The current Swap system status.

ftfx_swap_block_status_t currentSwapBlockStatus: The current Swap block status.

ftfx_swap_block_status_t nextSwapBlockStatus: The next Swap block status.

struct _ftfx_special_mem

#include <fsl_ftfx_controller.h>

ftfx special memory access information.

Public Members

uint32_t base: Base address of flash special memory.

uint32_t size: size of flash special memory.

uint32_t count: flash special memory count.

struct _ftfx_mem_descriptor

#include <fsl_ftfx_controller.h>

Flash memory descriptor.

Public Members

uint32_t blockBase: A base address of the flash block

uint32_t aliasBlockBase: A base address of the alias flash block

uint32_t totalSize: The size of the flash block.

uint32_t sectorSize: The size in bytes of a sector of flash.

uint32_t blockCount: A number of flash blocks.

struct _ftfx_ops_config

#include <fsl_ftfx_controller.h>

Active FTFx information for the current operation.

Public Members

uint32_t convertedAddress: A converted address for the current flash type.

struct _ftfx_ifr_descriptor: #include <fsl_ftfx_controller.h>

Flash IFR memory descriptor.

union function_ptr_t

#include <fsl_ftfx_controller.h>

Public Members

uint32_t commadAddr

void (*callFlashCommand)(volatile uint8_t *FTMRx_fstat)

struct _ftfx_config

#include <fsl_ftfx_controller.h>

Flash driver state information.

An instance of this structure is allocated by the user of the flash driver and passed into each of the driver APIs.

Public Members

uint32_t flexramBlockBase: The base address of the FlexRAM/acceleration RAM

uint32_t flexramTotalSize: The size of the FlexRAM/acceleration RAM

uint16_t eepromTotalSize: The size of EEPROM area which was partitioned from FlexRAM

function_ptr_t runCmdFuncAddr: An buffer point to the flash execute-in-RAM function.

struct __unnamed13__

Public Members

uint8_t type: Type of flash block.

uint8_t index: Index of flash block.

struct feature

struct addrAligment

struct feature

struct resRange

Public Members

uint8_t versionIdStart: Version ID start address

uint32_t pflashIfrStart: Program Flash 0 IFR start address

uint32_t dflashIfrStart: Data Flash 0 IFR start address

uint32_t pflashSwapIfrStart: Program Flash Swap IFR start address

struct idxInfo

ftfx feature

FTFx_DRIVER_IS_FLASH_RESIDENT

Flash driver location.

Used for the flash resident application.

FTFx_DRIVER_IS_EXPORTED

Flash Driver Export option.

Used for the MCUXpresso SDK application.

FTFx_FLASH1_HAS_PROT_CONTROL: Indicates whether the secondary flash has its own protection register in flash module.

FTFx_FLASH1_HAS_XACC_CONTROL: Indicates whether the secondary flash has its own Execute-Only access register in flash module.

FTFx_DRIVER_HAS_FLASH1_SUPPORT: Indicates whether the secondary flash is supported in the Flash driver.

FTFx_FLASH_COUNT

FTFx_FLASH1_IS_INDEPENDENT_BLOCK

Ftftx FLASH Driver

status_t FLASH_Init(flash_config_t *config)

Initializes the global flash properties structure members.

This function checks and initializes the Flash module for the other Flash APIs.

Parameters:

config – Pointer to the storage for the driver runtime state.

Return values:

kStatus_FTFx_Success – API was executed successfully.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_PartitionStatusUpdateFailure – Failed to update the partition status.

status_t FLASH_Erase(flash_config_t *config, uint32_t start, uint32_t lengthInBytes, uint32_t key)

Erases the Dflash sectors encompassed by parameters passed into function.

This function erases the appropriate number of flash sectors based on the desired start address and length.

Parameters:

config – The pointer to the storage for the driver runtime state.
start – The start address of the desired flash memory to be erased. The start address does not need to be sector-aligned but must be word-aligned.
lengthInBytes – The length, given in bytes (not words or long-words) to be erased. Must be word-aligned.
key – The value used to validate all flash erase APIs.

Return values:

kStatus_FTFx_Success – API was executed successfully; the appropriate number of flash sectors based on the desired start address and length were erased successfully.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_AlignmentError – The parameter is not aligned with the specified baseline.
kStatus_FTFx_AddressError – The address is out of range.
kStatus_FTFx_EraseKeyError – The API erase key is invalid.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during the command execution.

status_t FLASH_EraseSectorNonBlocking(flash_config_t *config, uint32_t start, uint32_t key)

Erases the Dflash sectors encompassed by parameters passed into function.

This function erases one flash sector size based on the start address, and it is executed asynchronously.

NOTE: This function can only erase one flash sector at a time, and the other commands can be executed after the previous command has been completed.

Parameters:

config – The pointer to the storage for the driver runtime state.
start – The start address of the desired flash memory to be erased. The start address does not need to be sector-aligned but must be word-aligned.
key – The value used to validate all flash erase APIs.

Return values:

kStatus_FTFx_Success – API was executed successfully.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_AlignmentError – The parameter is not aligned with the specified baseline.
kStatus_FTFx_AddressError – The address is out of range.
kStatus_FTFx_EraseKeyError – The API erase key is invalid.

status_t FLASH_EraseAll(flash_config_t *config, uint32_t key)

Erases entire flexnvm.

Parameters:

config – Pointer to the storage for the driver runtime state.
key – A value used to validate all flash erase APIs.

Return values:

kStatus_FTFx_Success – API was executed successfully; the all pflash and flexnvm were erased successfully, the swap and eeprom have been reset to unconfigured state.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_EraseKeyError – API erase key is invalid.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during command execution.
kStatus_FTFx_PartitionStatusUpdateFailure – Failed to update the partition status.

status_t FLASH_EraseAllUnsecure(flash_config_t *config, uint32_t key)

Erases the entire flexnvm, including protected sectors.

Parameters:

config – Pointer to the storage for the driver runtime state.
key – A value used to validate all flash erase APIs.

Return values:

kStatus_FTFx_Success – API was executed successfully; the protected sectors of flash were reset to unprotected status.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_EraseKeyError – API erase key is invalid.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during command execution.
kStatus_FTFx_PartitionStatusUpdateFailure – Failed to update the partition status.

status_t FLASH_Program(flash_config_t *config, uint32_t start, uint8_t *src, uint32_t lengthInBytes)

Programs flash with data at locations passed in through parameters.

This function programs the flash memory with the desired data for a given flash area as determined by the start address and the length.

Parameters:

config – A pointer to the storage for the driver runtime state.
start – The start address of the desired flash memory to be programmed. Must be word-aligned.
src – A pointer to the source buffer of data that is to be programmed into the flash.
lengthInBytes – The length, given in bytes (not words or long-words), to be programmed. Must be word-aligned.

Return values:

kStatus_FTFx_Success – API was executed successfully; the desired data were programed successfully into flash based on desired start address and length.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_AlignmentError – Parameter is not aligned with the specified baseline.
kStatus_FTFx_AddressError – Address is out of range.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during the command execution.

status_t FLASH_ProgramOnce(flash_config_t *config, uint32_t index, uint8_t *src, uint32_t lengthInBytes)

Program the Program-Once-Field through parameters.

This function Program the Program-once-feild with given index and length.

Parameters:

config – A pointer to the storage for the driver runtime state.
index – The index indicating the area of program once field to be read.
src – A pointer to the source buffer of data that is used to store data to be write.
lengthInBytes – The length, given in bytes (not words or long-words), to be programmed. Must be word-aligned.

Return values:

kStatus_FTFx_Success – API was executed successfully; The index indicating the area of program once field was programed successfully.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during the command execution.

status_t FLASH_ProgramSection(flash_config_t *config, uint32_t start, uint8_t *src, uint32_t lengthInBytes)

Programs flash with data at locations passed in through parameters via the Program Section command.

This function programs the flash memory with the desired data for a given flash area as determined by the start address and length.

Parameters:

config – A pointer to the storage for the driver runtime state.
start – The start address of the desired flash memory to be programmed. Must be word-aligned.
src – A pointer to the source buffer of data that is to be programmed into the flash.
lengthInBytes – The length, given in bytes (not words or long-words), to be programmed. Must be word-aligned.

Return values:

kStatus_FTFx_Success – API was executed successfully; the desired data have been programed successfully into flash based on start address and length.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_AlignmentError – Parameter is not aligned with specified baseline.
kStatus_FTFx_AddressError – Address is out of range.
kStatus_FTFx_SetFlexramAsRamError – Failed to set flexram as RAM.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during command execution.
kStatus_FTFx_RecoverFlexramAsEepromError – Failed to recover FlexRAM as EEPROM.

status_t FLASH_ReadResource(flash_config_t *config, uint32_t start, uint8_t *dst, uint32_t lengthInBytes, ftfx_read_resource_opt_t option)

Reads the resource with data at locations passed in through parameters.

This function reads the flash memory with the desired location for a given flash area as determined by the start address and length.

Parameters:

config – A pointer to the storage for the driver runtime state.
start – The start address of the desired flash memory to be programmed. Must be word-aligned.
dst – A pointer to the destination buffer of data that is used to store data to be read.
lengthInBytes – The length, given in bytes (not words or long-words), to be read. Must be word-aligned.
option – The resource option which indicates which area should be read back.

Return values:

kStatus_FTFx_Success – API was executed successfully; the data have been read successfully from program flash IFR, data flash IFR space, and the Version ID field.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_AlignmentError – Parameter is not aligned with the specified baseline.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during the command execution.

status_t FLASH_ReadOnce(flash_config_t *config, uint32_t index, uint8_t *dst, uint32_t lengthInBytes)

Reads the Program Once Field through parameters.

This function reads the read once feild with given index and length.

Parameters:

config – A pointer to the storage for the driver runtime state.
index – The index indicating the area of program once field to be read.
dst – A pointer to the destination buffer of data that is used to store data to be read.
lengthInBytes – The length, given in bytes (not words or long-words), to be programmed. Must be word-aligned.

Return values:

kStatus_FTFx_Success – API was executed successfully; the data have been successfuly read form Program flash0 IFR map and Program Once field based on index and length.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during the command execution.

status_t FLASH_VerifyErase(flash_config_t *config, uint32_t start, uint32_t lengthInBytes, ftfx_margin_value_t margin)

Verifies an erasure of the desired flash area at a specified margin level.

This function checks the appropriate number of flash sectors based on the desired start address and length to check whether the flash is erased to the specified read margin level.

Parameters:

config – A pointer to the storage for the driver runtime state.
start – The start address of the desired flash memory to be verified. The start address does not need to be sector-aligned but must be word-aligned.
lengthInBytes – The length, given in bytes (not words or long-words), to be verified. Must be word-aligned.
margin – Read margin choice.

Return values:

kStatus_FTFx_Success – API was executed successfully; the specified FLASH region has been erased.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_AlignmentError – Parameter is not aligned with specified baseline.
kStatus_FTFx_AddressError – Address is out of range.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during the command execution.

status_t FLASH_VerifyEraseAll(flash_config_t *config, ftfx_margin_value_t margin)

Verifies erasure of the entire flash at a specified margin level.

This function checks whether the flash is erased to the specified read margin level.

Parameters:

config – A pointer to the storage for the driver runtime state.
margin – Read margin choice.

Return values:

kStatus_FTFx_Success – API was executed successfully; all program flash and flexnvm were in erased state.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during the command execution.

status_t FLASH_VerifyProgram(flash_config_t *config, uint32_t start, uint32_t lengthInBytes, const uint8_t *expectedData, ftfx_margin_value_t margin, uint32_t *failedAddress, uint32_t *failedData)

Verifies programming of the desired flash area at a specified margin level.

This function verifies the data programmed in the flash memory using the Flash Program Check Command and compares it to the expected data for a given flash area as determined by the start address and length.

Parameters:

config – A pointer to the storage for the driver runtime state.
start – The start address of the desired flash memory to be verified. Must be word-aligned.
lengthInBytes – The length, given in bytes (not words or long-words), to be verified. Must be word-aligned.
expectedData – A pointer to the expected data that is to be verified against.
margin – Read margin choice.
failedAddress – A pointer to the returned failing address.
failedData – A pointer to the returned failing data. Some derivatives do not include failed data as part of the FCCOBx registers. In this case, zeros are returned upon failure.

Return values:

kStatus_FTFx_Success – API was executed successfully; the desired data have been successfully programed into specified FLASH region.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_AlignmentError – Parameter is not aligned with specified baseline.
kStatus_FTFx_AddressError – Address is out of range.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during the command execution.

status_t FLASH_GetSecurityState(flash_config_t *config, ftfx_security_state_t *state)

Returns the security state via the pointer passed into the function.

This function retrieves the current flash security status, including the security enabling state and the backdoor key enabling state.

Parameters:

config – A pointer to storage for the driver runtime state.
state – A pointer to the value returned for the current security status code:

Return values:

kStatus_FTFx_Success – API was executed successfully; the security state of flash was stored to state.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.

status_t FLASH_SecurityBypass(flash_config_t *config, const uint8_t *backdoorKey)

Allows users to bypass security with a backdoor key.

If the MCU is in secured state, this function unsecures the MCU by comparing the provided backdoor key with ones in the flash configuration field.

Parameters:

config – A pointer to the storage for the driver runtime state.
backdoorKey – A pointer to the user buffer containing the backdoor key.

Return values:

kStatus_FTFx_Success – API was executed successfully.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during the command execution.

status_t FLASH_SetFlexramFunction(flash_config_t *config, ftfx_flexram_func_opt_t option)

Sets the FlexRAM function command.

Parameters:

config – A pointer to the storage for the driver runtime state.
option – The option used to set the work mode of FlexRAM.

Return values:

kStatus_FTFx_Success – API was executed successfully; the FlexRAM has been successfully configured as RAM or EEPROM.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during the command execution.

status_t FLASH_Swap(flash_config_t *config, uint32_t address, bool isSetEnable)

Swaps the lower half flash with the higher half flash.

Parameters:

config – A pointer to the storage for the driver runtime state.
address – Address used to configure the flash swap function
isSetEnable – The possible option used to configure the Flash Swap function or check the flash Swap status.

Return values:

kStatus_FTFx_Success – API was executed successfully; the lower half flash and higher half flash have been swaped.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_AlignmentError – Parameter is not aligned with specified baseline.
kStatus_FTFx_SwapIndicatorAddressError – Swap indicator address is invalid.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during command execution.
kStatus_FTFx_SwapSystemNotInUninitialized – Swap system is not in an uninitialized state.

status_t FLASH_IsProtected(flash_config_t *config, uint32_t start, uint32_t lengthInBytes, flash_prot_state_t *protection_state)

Returns the protection state of the desired flash area via the pointer passed into the function.

This function retrieves the current flash protect status for a given flash area as determined by the start address and length.

Parameters:

config – A pointer to the storage for the driver runtime state.
start – The start address of the desired flash memory to be checked. Must be word-aligned.
lengthInBytes – The length, given in bytes (not words or long-words) to be checked. Must be word-aligned.
protection_state – A pointer to the value returned for the current protection status code for the desired flash area.

Return values:

kStatus_FTFx_Success – API was executed successfully; the protection state of specified FLASH region was stored to protection_state.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_AlignmentError – Parameter is not aligned with specified baseline.
kStatus_FTFx_AddressError – The address is out of range.

status_t FLASH_IsExecuteOnly(flash_config_t *config, uint32_t start, uint32_t lengthInBytes, flash_xacc_state_t *access_state)

Returns the access state of the desired flash area via the pointer passed into the function.

This function retrieves the current flash access status for a given flash area as determined by the start address and length.

Parameters:

config – A pointer to the storage for the driver runtime state.
start – The start address of the desired flash memory to be checked. Must be word-aligned.
lengthInBytes – The length, given in bytes (not words or long-words), to be checked. Must be word-aligned.
access_state – A pointer to the value returned for the current access status code for the desired flash area.

Return values:

kStatus_FTFx_Success – API was executed successfully; the executeOnly state of specified FLASH region was stored to access_state.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_AlignmentError – The parameter is not aligned to the specified baseline.
kStatus_FTFx_AddressError – The address is out of range.

status_t FLASH_PflashSetProtection(flash_config_t *config, pflash_prot_status_t *protectStatus)

Sets the PFlash Protection to the intended protection status.

Parameters:

config – A pointer to storage for the driver runtime state.
protectStatus – The expected protect status to set to the PFlash protection register. Each bit is corresponding to protection of 1/32(64) of the total PFlash. The least significant bit is corresponding to the lowest address area of PFlash. The most significant bit is corresponding to the highest address area of PFlash. There are two possible cases as shown below: 0: this area is protected. 1: this area is unprotected.

Return values:

kStatus_FTFx_Success – API was executed successfully; the specified FLASH region is protected.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_CommandFailure – Run-time error during command execution.

status_t FLASH_PflashGetProtection(flash_config_t *config, pflash_prot_status_t *protectStatus)

Gets the PFlash protection status.

Parameters:

config – A pointer to the storage for the driver runtime state.
protectStatus – Protect status returned by the PFlash IP. Each bit is corresponding to the protection of 1/32(64) of the total PFlash. The least significant bit corresponds to the lowest address area of the PFlash. The most significant bit corresponds to the highest address area of PFlash. There are two possible cases as shown below: 0: this area is protected. 1: this area is unprotected.

Return values:

kStatus_FTFx_Success – API was executed successfully; the Protection state was stored to protectStatus;
kStatus_FTFx_InvalidArgument – An invalid argument is provided.

status_t FLASH_GetProperty(flash_config_t *config, flash_property_tag_t whichProperty, uint32_t *value)

Returns the desired flash property.

Parameters:

config – A pointer to the storage for the driver runtime state.
whichProperty – The desired property from the list of properties in enum flash_property_tag_t
value – A pointer to the value returned for the desired flash property.

Return values:

kStatus_FTFx_Success – API was executed successfully; the flash property was stored to value.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_UnknownProperty – An unknown property tag.

status_t FLASH_GetCommandState(void)

Get previous command status.

This function is used to obtain the execution status of the previous command.

Return values:

kStatus_FTFx_Success – The previous command is executed successfully.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during the command execution.

FSL_FLASH_DRIVER_VERSION

Flash driver version for SDK.

Version 3.1.3.

FSL_FLASH_DRIVER_VERSION_ROM

Flash driver version for ROM.

Version 3.0.0.

enum _flash_protection_state

Enumeration for the three possible flash protection levels.

Values:

enumerator kFLASH_ProtectionStateUnprotected: Flash region is not protected.

enumerator kFLASH_ProtectionStateProtected: Flash region is protected.

enumerator kFLASH_ProtectionStateMixed: Flash is mixed with protected and unprotected region.

enum _flash_execute_only_access_state

Enumeration for the three possible flash execute access levels.

Values:

enumerator kFLASH_AccessStateUnLimited: Flash region is unlimited.

enumerator kFLASH_AccessStateExecuteOnly: Flash region is execute only.

enumerator kFLASH_AccessStateMixed: Flash is mixed with unlimited and execute only region.

enum _flash_property_tag

Enumeration for various flash properties.

Values:

enumerator kFLASH_PropertyPflash0SectorSize: Pflash sector size property.

enumerator kFLASH_PropertyPflash0TotalSize: Pflash total size property.

enumerator kFLASH_PropertyPflash0BlockSize: Pflash block size property.

enumerator kFLASH_PropertyPflash0BlockCount: Pflash block count property.

enumerator kFLASH_PropertyPflash0BlockBaseAddr: Pflash block base address property.

enumerator kFLASH_PropertyPflash0FacSupport: Pflash fac support property.

enumerator kFLASH_PropertyPflash0AccessSegmentSize: Pflash access segment size property.

enumerator kFLASH_PropertyPflash0AccessSegmentCount: Pflash access segment count property.

enumerator kFLASH_PropertyPflash1SectorSize: Pflash sector size property.

enumerator kFLASH_PropertyPflash1TotalSize: Pflash total size property.

enumerator kFLASH_PropertyPflash1BlockSize: Pflash block size property.

enumerator kFLASH_PropertyPflash1BlockCount: Pflash block count property.

enumerator kFLASH_PropertyPflash1BlockBaseAddr: Pflash block base address property.

enumerator kFLASH_PropertyPflash1FacSupport: Pflash fac support property.

enumerator kFLASH_PropertyPflash1AccessSegmentSize: Pflash access segment size property.

enumerator kFLASH_PropertyPflash1AccessSegmentCount: Pflash access segment count property.

enumerator kFLASH_PropertyFlexRamBlockBaseAddr: FlexRam block base address property.

enumerator kFLASH_PropertyFlexRamTotalSize: FlexRam total size property.

typedef enum _flash_protection_state flash_prot_state_t: Enumeration for the three possible flash protection levels.

typedef union _pflash_protection_status pflash_prot_status_t: PFlash protection status.

typedef enum _flash_execute_only_access_state flash_xacc_state_t: Enumeration for the three possible flash execute access levels.

typedef enum _flash_property_tag flash_property_tag_t: Enumeration for various flash properties.

typedef struct _flash_config flash_config_t

Flash driver state information.

An instance of this structure is allocated by the user of the flash driver and passed into each of the driver APIs.

kStatus_FLASH_Success

kFLASH_ApiEraseKey

union _pflash_protection_status

#include <fsl_ftfx_flash.h>

PFlash protection status.

Public Members

uint32_t protl: PROT[31:0] .

uint32_t proth: PROT[63:32].

uint8_t protsl: PROTS[7:0] .

uint8_t protsh: PROTS[15:8] .

uint8_t reserved[2]

struct _flash_config

#include <fsl_ftfx_flash.h>

Flash driver state information.

An instance of this structure is allocated by the user of the flash driver and passed into each of the driver APIs.

Ftftx FLEXNVM Driver

status_t FLEXNVM_Init(flexnvm_config_t *config)

Initializes the global flash properties structure members.

This function checks and initializes the Flash module for the other Flash APIs.

Parameters:

config – Pointer to the storage for the driver runtime state.

Return values:

kStatus_FTFx_Success – API was executed successfully.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_PartitionStatusUpdateFailure – Failed to update the partition status.

status_t FLEXNVM_DflashErase(flexnvm_config_t *config, uint32_t start, uint32_t lengthInBytes, uint32_t key)

Erases the Dflash sectors encompassed by parameters passed into function.

This function erases the appropriate number of flash sectors based on the desired start address and length.

Parameters:

config – The pointer to the storage for the driver runtime state.
start – The start address of the desired flash memory to be erased. The start address does not need to be sector-aligned but must be word-aligned.
lengthInBytes – The length, given in bytes (not words or long-words) to be erased. Must be word-aligned.
key – The value used to validate all flash erase APIs.

Return values:

kStatus_FTFx_Success – API was executed successfully; the appropriate number of date flash sectors based on the desired start address and length were erased successfully.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_AlignmentError – The parameter is not aligned with the specified baseline.
kStatus_FTFx_AddressError – The address is out of range.
kStatus_FTFx_EraseKeyError – The API erase key is invalid.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during the command execution.

status_t FLEXNVM_EraseAll(flexnvm_config_t *config, uint32_t key)

Erases entire flexnvm.

Parameters:

config – Pointer to the storage for the driver runtime state.
key – A value used to validate all flash erase APIs.

Return values:

kStatus_FTFx_Success – API was executed successfully; the entire flexnvm has been erased successfully.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_EraseKeyError – API erase key is invalid.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during command execution.
kStatus_FTFx_PartitionStatusUpdateFailure – Failed to update the partition status.

status_t FLEXNVM_EraseAllUnsecure(flexnvm_config_t *config, uint32_t key)

Erases the entire flexnvm, including protected sectors.

Parameters:

config – Pointer to the storage for the driver runtime state.
key – A value used to validate all flash erase APIs.

Return values:

kStatus_FTFx_Success – API was executed successfully; the flexnvm is not in securityi state.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_EraseKeyError – API erase key is invalid.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during command execution.
kStatus_FTFx_PartitionStatusUpdateFailure – Failed to update the partition status.

status_t FLEXNVM_DflashProgram(flexnvm_config_t *config, uint32_t start, uint8_t *src, uint32_t lengthInBytes)

Programs flash with data at locations passed in through parameters.

This function programs the flash memory with the desired data for a given flash area as determined by the start address and the length.

Parameters:

config – A pointer to the storage for the driver runtime state.
start – The start address of the desired flash memory to be programmed. Must be word-aligned.
src – A pointer to the source buffer of data that is to be programmed into the flash.
lengthInBytes – The length, given in bytes (not words or long-words), to be programmed. Must be word-aligned.

Return values:

kStatus_FTFx_Success – API was executed successfully; the desired date have been successfully programed into specified date flash region.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_AlignmentError – Parameter is not aligned with the specified baseline.
kStatus_FTFx_AddressError – Address is out of range.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during the command execution.

status_t FLEXNVM_DflashProgramSection(flexnvm_config_t *config, uint32_t start, uint8_t *src, uint32_t lengthInBytes)

Programs flash with data at locations passed in through parameters via the Program Section command.

This function programs the flash memory with the desired data for a given flash area as determined by the start address and length.

Parameters:

config – A pointer to the storage for the driver runtime state.
start – The start address of the desired flash memory to be programmed. Must be word-aligned.
src – A pointer to the source buffer of data that is to be programmed into the flash.
lengthInBytes – The length, given in bytes (not words or long-words), to be programmed. Must be word-aligned.

Return values:

kStatus_FTFx_Success – API was executed successfully; the desired date have been successfully programed into specified date flash area.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_AlignmentError – Parameter is not aligned with specified baseline.
kStatus_FTFx_AddressError – Address is out of range.
kStatus_FTFx_SetFlexramAsRamError – Failed to set flexram as RAM.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during command execution.
kStatus_FTFx_RecoverFlexramAsEepromError – Failed to recover FlexRAM as EEPROM.

status_t FLEXNVM_ProgramPartition(flexnvm_config_t *config, ftfx_partition_flexram_load_opt_t option, uint32_t eepromDataSizeCode, uint32_t flexnvmPartitionCode)

Prepares the FlexNVM block for use as data flash, EEPROM backup, or a combination of both and initializes the FlexRAM.

Parameters:

config – Pointer to storage for the driver runtime state.
option – The option used to set FlexRAM load behavior during reset.
eepromDataSizeCode – Determines the amount of FlexRAM used in each of the available EEPROM subsystems.
flexnvmPartitionCode – Specifies how to split the FlexNVM block between data flash memory and EEPROM backup memory supporting EEPROM functions.

Return values:

kStatus_FTFx_Success – API was executed successfully; the FlexNVM block for use as data flash, EEPROM backup, or a combination of both have been Prepared.
kStatus_FTFx_InvalidArgument – Invalid argument is provided.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during command execution.

status_t FLEXNVM_ProgramPartition_CSE(flexnvm_config_t *config, ftfx_partition_flexram_load_opt_t option, uint32_t eepromDataSizeCode, uint32_t flexnvmPartitionCode, uint8_t CSEcKeySize, uint8_t SFE)

Prepares the FlexNVM block for use as data flash, EEPROM backup, or a combination of both and initializes the FlexRAM. This is the CSE enabled version for IP’s like FTFC.

Parameters:

config – Pointer to storage for the driver runtime state.
option – The option used to set FlexRAM load behavior during reset.
eepromDataSizeCode – Determines the amount of FlexRAM used in each of the available EEPROM subsystems.
flexnvmPartitionCode – Specifies how to split the FlexNVM block between data flash memory and EEPROM backup memory supporting EEPROM functions.
CSEcKeySize – CSEc/SHE key size, see RM for details and possible values
SFE – Security Flag Extension (SFE), see RM for details and possible values

Return values:

kStatus_FTFx_Success – API was executed successfully; the FlexNVM block for use as data flash, EEPROM backup, or a combination of both have been Prepared.
kStatus_FTFx_InvalidArgument – Invalid argument is provided.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during command execution.

status_t FLEXNVM_ReadResource(flexnvm_config_t *config, uint32_t start, uint8_t *dst, uint32_t lengthInBytes, ftfx_read_resource_opt_t option)

Reads the resource with data at locations passed in through parameters.

This function reads the flash memory with the desired location for a given flash area as determined by the start address and length.

Parameters:

config – A pointer to the storage for the driver runtime state.
start – The start address of the desired flash memory to be programmed. Must be word-aligned.
dst – A pointer to the destination buffer of data that is used to store data to be read.
lengthInBytes – The length, given in bytes (not words or long-words), to be read. Must be word-aligned.
option – The resource option which indicates which area should be read back.

Return values:

kStatus_FTFx_Success – API was executed successfully; the data have been read successfully from program flash IFR, data flash IFR space, and the Version ID field
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_AlignmentError – Parameter is not aligned with the specified baseline.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during the command execution.

status_t FLEXNVM_DflashVerifyErase(flexnvm_config_t *config, uint32_t start, uint32_t lengthInBytes, ftfx_margin_value_t margin)

Verifies an erasure of the desired flash area at a specified margin level.

This function checks the appropriate number of flash sectors based on the desired start address and length to check whether the flash is erased to the specified read margin level.

Parameters:

config – A pointer to the storage for the driver runtime state.
start – The start address of the desired flash memory to be verified. The start address does not need to be sector-aligned but must be word-aligned.
lengthInBytes – The length, given in bytes (not words or long-words), to be verified. Must be word-aligned.
margin – Read margin choice.

Return values:

kStatus_FTFx_Success – API was executed successfully; the specified data flash region is in erased state.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_AlignmentError – Parameter is not aligned with specified baseline.
kStatus_FTFx_AddressError – Address is out of range.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during the command execution.

status_t FLEXNVM_VerifyEraseAll(flexnvm_config_t *config, ftfx_margin_value_t margin)

Verifies erasure of the entire flash at a specified margin level.

This function checks whether the flash is erased to the specified read margin level.

Parameters:

config – A pointer to the storage for the driver runtime state.
margin – Read margin choice.

Return values:

kStatus_FTFx_Success – API was executed successfully; the entire flexnvm region is in erased state.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during the command execution.

status_t FLEXNVM_DflashVerifyProgram(flexnvm_config_t *config, uint32_t start, uint32_t lengthInBytes, const uint8_t *expectedData, ftfx_margin_value_t margin, uint32_t *failedAddress, uint32_t *failedData)

Verifies programming of the desired flash area at a specified margin level.

This function verifies the data programmed in the flash memory using the Flash Program Check Command and compares it to the expected data for a given flash area as determined by the start address and length.

Parameters:

config – A pointer to the storage for the driver runtime state.
start – The start address of the desired flash memory to be verified. Must be word-aligned.
lengthInBytes – The length, given in bytes (not words or long-words), to be verified. Must be word-aligned.
expectedData – A pointer to the expected data that is to be verified against.
margin – Read margin choice.
failedAddress – A pointer to the returned failing address.
failedData – A pointer to the returned failing data. Some derivatives do not include failed data as part of the FCCOBx registers. In this case, zeros are returned upon failure.

Return values:

kStatus_FTFx_Success – API was executed successfully; the desired data hve been programed successfully into specified data flash region.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_AlignmentError – Parameter is not aligned with specified baseline.
kStatus_FTFx_AddressError – Address is out of range.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during the command execution.

status_t FLEXNVM_GetSecurityState(flexnvm_config_t *config, ftfx_security_state_t *state)

Returns the security state via the pointer passed into the function.

This function retrieves the current flash security status, including the security enabling state and the backdoor key enabling state.

Parameters:

config – A pointer to storage for the driver runtime state.
state – A pointer to the value returned for the current security status code:

Return values:

kStatus_FTFx_Success – API was executed successfully; the security state of flexnvm was stored to state.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.

status_t FLEXNVM_SecurityBypass(flexnvm_config_t *config, const uint8_t *backdoorKey)

Allows users to bypass security with a backdoor key.

If the MCU is in secured state, this function unsecures the MCU by comparing the provided backdoor key with ones in the flash configuration field.

Parameters:

config – A pointer to the storage for the driver runtime state.
backdoorKey – A pointer to the user buffer containing the backdoor key.

Return values:

kStatus_FTFx_Success – API was executed successfully.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during the command execution.

status_t FLEXNVM_SetFlexramFunction(flexnvm_config_t *config, ftfx_flexram_func_opt_t option)

Sets the FlexRAM function command.

Parameters:

config – A pointer to the storage for the driver runtime state.
option – The option used to set the work mode of FlexRAM.

Return values:

kStatus_FTFx_Success – API was executed successfully; the FlexRAM has been successfully configured as RAM or EEPROM
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_ExecuteInRamFunctionNotReady – Execute-in-RAM function is not available.
kStatus_FTFx_AccessError – Invalid instruction codes and out-of bounds addresses.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_CommandFailure – Run-time error during the command execution.

status_t FLEXNVM_DflashSetProtection(flexnvm_config_t *config, uint8_t protectStatus)

Sets the DFlash protection to the intended protection status.

Parameters:

config – A pointer to the storage for the driver runtime state.
protectStatus – The expected protect status to set to the DFlash protection register. Each bit corresponds to the protection of the 1/8 of the total DFlash. The least significant bit corresponds to the lowest address area of the DFlash. The most significant bit corresponds to the highest address area of the DFlash. There are two possible cases as shown below: 0: this area is protected. 1: this area is unprotected.

Return values:

kStatus_FTFx_Success – API was executed successfully; the specified DFlash region is protected.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_CommandNotSupported – Flash API is not supported.
kStatus_FTFx_CommandFailure – Run-time error during command execution.

status_t FLEXNVM_DflashGetProtection(flexnvm_config_t *config, uint8_t *protectStatus)

Gets the DFlash protection status.

Parameters:

config – A pointer to the storage for the driver runtime state.
protectStatus – DFlash Protect status returned by the PFlash IP. Each bit corresponds to the protection of the 1/8 of the total DFlash. The least significant bit corresponds to the lowest address area of the DFlash. The most significant bit corresponds to the highest address area of the DFlash, and so on. There are two possible cases as below: 0: this area is protected. 1: this area is unprotected.

Return values:

kStatus_FTFx_Success – API was executed successfully.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_CommandNotSupported – Flash API is not supported.

status_t FLEXNVM_EepromSetProtection(flexnvm_config_t *config, uint8_t protectStatus)

Sets the EEPROM protection to the intended protection status.

Parameters:

config – A pointer to the storage for the driver runtime state.
protectStatus – The expected protect status to set to the EEPROM protection register. Each bit corresponds to the protection of the 1/8 of the total EEPROM. The least significant bit corresponds to the lowest address area of the EEPROM. The most significant bit corresponds to the highest address area of EEPROM, and so on. There are two possible cases as shown below: 0: this area is protected. 1: this area is unprotected.

Return values:

kStatus_FTFx_Success – API was executed successfully.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_CommandNotSupported – Flash API is not supported.
kStatus_FTFx_CommandFailure – Run-time error during command execution.

status_t FLEXNVM_EepromGetProtection(flexnvm_config_t *config, uint8_t *protectStatus)

Gets the EEPROM protection status.

Parameters:

config – A pointer to the storage for the driver runtime state.
protectStatus – DFlash Protect status returned by the PFlash IP. Each bit corresponds to the protection of the 1/8 of the total EEPROM. The least significant bit corresponds to the lowest address area of the EEPROM. The most significant bit corresponds to the highest address area of the EEPROM. There are two possible cases as below: 0: this area is protected. 1: this area is unprotected.

Return values:

kStatus_FTFx_Success – API was executed successfully.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_CommandNotSupported – Flash API is not supported.

status_t FLEXNVM_GetProperty(flexnvm_config_t *config, flexnvm_property_tag_t whichProperty, uint32_t *value)

Returns the desired flexnvm property.

Parameters:

config – A pointer to the storage for the driver runtime state.
whichProperty – The desired property from the list of properties in enum flexnvm_property_tag_t
value – A pointer to the value returned for the desired flexnvm property.

Return values:

kStatus_FTFx_Success – API was executed successfully.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_UnknownProperty – An unknown property tag.

enum _flexnvm_property_tag

Enumeration for various flexnvm properties.

Values:

enumerator kFLEXNVM_PropertyDflashSectorSize: Dflash sector size property.

enumerator kFLEXNVM_PropertyDflashTotalSize: Dflash total size property.

enumerator kFLEXNVM_PropertyDflashBlockSize: Dflash block size property.

enumerator kFLEXNVM_PropertyDflashBlockCount: Dflash block count property.

enumerator kFLEXNVM_PropertyDflashBlockBaseAddr: Dflash block base address property.

enumerator kFLEXNVM_PropertyAliasDflashBlockBaseAddr: Dflash block base address Alias property.

enumerator kFLEXNVM_PropertyFlexRamBlockBaseAddr: FlexRam block base address property.

enumerator kFLEXNVM_PropertyFlexRamTotalSize: FlexRam total size property.

enumerator kFLEXNVM_PropertyEepromTotalSize: EEPROM total size property.

typedef enum _flexnvm_property_tag flexnvm_property_tag_t: Enumeration for various flexnvm properties.

typedef struct _flexnvm_config flexnvm_config_t

Flexnvm driver state information.

An instance of this structure is allocated by the user of the Flexnvm driver and passed into each of the driver APIs.

status_t FLEXNVM_EepromWrite(flexnvm_config_t *config, uint32_t start, uint8_t *src, uint32_t lengthInBytes)

Programs the EEPROM with data at locations passed in through parameters.

This function programs the emulated EEPROM with the desired data for a given flash area as determined by the start address and length.

Parameters:

config – A pointer to the storage for the driver runtime state.
start – The start address of the desired flash memory to be programmed. Must be word-aligned.
src – A pointer to the source buffer of data that is to be programmed into the flash.
lengthInBytes – The length, given in bytes (not words or long-words), to be programmed. Must be word-aligned.

Return values:

kStatus_FTFx_Success – API was executed successfully; the desires data have been successfully programed into specified eeprom region.
kStatus_FTFx_InvalidArgument – An invalid argument is provided.
kStatus_FTFx_AddressError – Address is out of range.
kStatus_FTFx_SetFlexramAsEepromError – Failed to set flexram as eeprom.
kStatus_FTFx_ProtectionViolation – The program/erase operation is requested to execute on protected areas.
kStatus_FTFx_RecoverFlexramAsRamError – Failed to recover the FlexRAM as RAM.

struct _flexnvm_config

#include <fsl_ftfx_flexnvm.h>

Flexnvm driver state information.

An instance of this structure is allocated by the user of the Flexnvm driver and passed into each of the driver APIs.

ftfx utilities

ALIGN_DOWN(x, a): Alignment(down) utility.

ALIGN_UP(x, a): Alignment(up) utility.

MAKE_VERSION(major, minor, bugfix): Constructs the version number for drivers.

MAKE_STATUS(group, code): Constructs a status code value from a group and a code number.

FOUR_CHAR_CODE(a, b, c, d): Constructs the four character code for the Flash driver API key.

B1P4(b): bytes2word utility.

B1P3(b)

B1P2(b)

B1P1(b)

B2P3(b)

B2P2(b)

B2P1(b)

B3P2(b)

B3P1(b)

BYTE2WORD_1_3(x, y)

BYTE2WORD_2_2(x, y)

BYTE2WORD_3_1(x, y)

BYTE2WORD_1_1_2(x, y, z)

BYTE2WORD_1_2_1(x, y, z)

BYTE2WORD_2_1_1(x, y, z)

BYTE2WORD_1_1_1_1(x, y, z, w)

FTM: FlexTimer Driver

status_t FTM_Init(FTM_Type *base, const ftm_config_t *config)

Ungates the FTM clock and configures the peripheral for basic operation.

Note

This API should be called at the beginning of the application which is using the FTM driver. If the FTM instance has only TPM features, please use the TPM driver.

Parameters:

base – FTM peripheral base address
config – Pointer to the user configuration structure.

Returns:

kStatus_Success indicates success; Else indicates failure.

void FTM_Deinit(FTM_Type *base)

Gates the FTM clock.

Parameters:

base – FTM peripheral base address

void FTM_GetDefaultConfig(ftm_config_t *config)

Fills in the FTM configuration structure with the default settings.

The default values are:

config->prescale = kFTM_Prescale_Divide_1;
config->bdmMode = kFTM_BdmMode_0;
config->pwmSyncMode = kFTM_SoftwareTrigger;
config->reloadPoints = 0;
config->faultMode = kFTM_Fault_Disable;
config->faultFilterValue = 0;
config->deadTimePrescale = kFTM_Deadtime_Prescale_1;
config->deadTimeValue =  0;
config->extTriggers = 0;
config->chnlInitState = 0;
config->chnlPolarity = 0;
config->useGlobalTimeBase = false;
config->hwTriggerResetCount = false;
config->swTriggerResetCount = true;

Parameters:

config – Pointer to the user configuration structure.

static inline ftm_clock_prescale_t FTM_CalculateCounterClkDiv(FTM_Type *base, uint32_t counterPeriod_Hz, uint32_t srcClock_Hz)

brief Calculates the counter clock prescaler.

This function calculates the values for SC[PS] bit.

param base FTM peripheral base address param counterPeriod_Hz The desired frequency in Hz which corresponding to the time when the counter reaches the mod value param srcClock_Hz FTM counter clock in Hz

return Calculated clock prescaler value, see ftm_clock_prescale_t.

status_t FTM_SetupPwm(FTM_Type *base, const ftm_chnl_pwm_signal_param_t *chnlParams, uint8_t numOfChnls, ftm_pwm_mode_t mode, uint32_t pwmFreq_Hz, uint32_t srcClock_Hz)

Configures the PWM signal parameters.

Call this function to configure the PWM signal period, mode, duty cycle, and edge. Use this function to configure all FTM channels that are used to output a PWM signal.

Parameters:

base – FTM peripheral base address
chnlParams – Array of PWM channel parameters to configure the channel(s)
numOfChnls – Number of channels to configure; This should be the size of the array passed in
mode – PWM operation mode, options available in enumeration ftm_pwm_mode_t
pwmFreq_Hz – PWM signal frequency in Hz
srcClock_Hz – FTM counter clock in Hz

Returns:

kStatus_Success if the PWM setup was successful kStatus_Error on failure

status_t FTM_UpdatePwmDutycycle(FTM_Type *base, ftm_chnl_t chnlNumber, ftm_pwm_mode_t currentPwmMode, uint8_t dutyCyclePercent)

Updates the duty cycle of an active PWM signal.

Parameters:

base – FTM peripheral base address
chnlNumber – The channel/channel pair number. In combined mode, this represents the channel pair number
currentPwmMode – The current PWM mode set during PWM setup
dutyCyclePercent – New PWM pulse width; The value should be between 0 to 100 0=inactive signal(0% duty cycle)… 100=active signal (100% duty cycle)

Returns:

kStatus_Success if the PWM update was successful kStatus_Error on failure

void FTM_UpdateChnlEdgeLevelSelect(FTM_Type *base, ftm_chnl_t chnlNumber, uint8_t level)

Updates the edge level selection for a channel.

Parameters:

base – FTM peripheral base address
chnlNumber – The channel number
level – The level to be set to the ELSnB:ELSnA field; Valid values are 00, 01, 10, 11. See the Kinetis SoC reference manual for details about this field.

status_t FTM_SetupPwmMode(FTM_Type *base, const ftm_chnl_pwm_config_param_t *chnlParams, uint8_t numOfChnls, ftm_pwm_mode_t mode)

Configures the PWM mode parameters.

Call this function to configure the PWM signal mode, duty cycle in ticks, and edge. Use this function to configure all FTM channels that are used to output a PWM signal. Please note that: This API is similar with FTM_SetupPwm() API, but will not set the timer period, and this API will set channel match value in timer ticks, not period percent.

Parameters:

base – FTM peripheral base address
chnlParams – Array of PWM channel parameters to configure the channel(s)
numOfChnls – Number of channels to configure; This should be the size of the array passed in
mode – PWM operation mode, options available in enumeration ftm_pwm_mode_t

Returns:

kStatus_Success if the PWM setup was successful kStatus_Error on failure

void FTM_ConfigSinglePWM(FTM_Type *base, const ftm_chnl_param_t *chnlParams, ftm_chnl_t chnlNumber)

Configure FTM edge aligned PWM or center aligned PWM by each channel.

This function configure PWM signal by setting channel n value register. Need to invoke FTM_SetInitialModuloValue to configure FTM period.

Parameters:

base – FTM peripheral base address
chnlParams – PWM configuration structure pointer.
chnlPairNumber – Channel number.

void FTM_ConfigCombinePWM(FTM_Type *base, const ftm_chnl_param_t *chnlParams, ftm_chnl_t chnlPairNumber)

Configure FTM Combine PWM, Modified Combine PWM or Asymmetrical PWM by each channel pair.

This function configure PWM signal by setting channel n value register. Need to invoke FTM_SetInitialModuloValue to configure FTM period.

Parameters:

base – FTM peripheral base address
chnlParams – PWM configuration structure pointer.
chnlPairNumber – Channel pair number, options are 0, 1, 2, 3.

void FTM_SetupInputCapture(FTM_Type *base, ftm_chnl_t chnlNumber, ftm_input_capture_edge_t captureMode, uint32_t filterValue)

Enables capturing an input signal on the channel using the function parameters.

When the edge specified in the captureMode argument occurs on the channel, the FTM counter is captured into the CnV register. The user has to read the CnV register separately to get this value. The filter function is disabled if the filterVal argument passed in is 0. The filter function is available only for channels 0, 1, 2, 3.

Parameters:

base – FTM peripheral base address
chnlNumber – The channel number
captureMode – Specifies which edge to capture
filterValue – Filter value, specify 0 to disable filter. Available only for channels 0-3.

void FTM_SetupOutputCompare(FTM_Type *base, ftm_chnl_t chnlNumber, ftm_output_compare_mode_t compareMode, uint32_t compareValue)

Configures the FTM to generate timed pulses.

When the FTM counter matches the value of compareVal argument (this is written into CnV reg), the channel output is changed based on what is specified in the compareMode argument.

Parameters:

base – FTM peripheral base address
chnlNumber – The channel number
compareMode – Action to take on the channel output when the compare condition is met
compareValue – Value to be programmed in the CnV register.

void FTM_SetupDualEdgeCapture(FTM_Type *base, ftm_chnl_t chnlPairNumber, const ftm_dual_edge_capture_param_t *edgeParam, uint32_t filterValue)

Configures the dual edge capture mode of the FTM.

This function sets up the dual edge capture mode on a channel pair. The capture edge for the channel pair and the capture mode (one-shot or continuous) is specified in the parameter argument. The filter function is disabled if the filterVal argument passed is zero. The filter function is available only on channels 0 and 2. The user has to read the channel CnV registers separately to get the capture values.

Parameters:

base – FTM peripheral base address
chnlPairNumber – The FTM channel pair number; options are 0, 1, 2, 3
edgeParam – Sets up the dual edge capture function
filterValue – Filter value, specify 0 to disable filter. Available only for channel pair 0 and 1.

void FTM_EnableInterrupts(FTM_Type *base, uint32_t mask)

Enables the selected FTM interrupts.

Parameters:

base – FTM peripheral base address
mask – The interrupts to enable. This is a logical OR of members of the enumeration ftm_interrupt_enable_t

void FTM_DisableInterrupts(FTM_Type *base, uint32_t mask)

Disables the selected FTM interrupts.

Parameters:

base – FTM peripheral base address
mask – The interrupts to enable. This is a logical OR of members of the enumeration ftm_interrupt_enable_t

uint32_t FTM_GetEnabledInterrupts(FTM_Type *base)

Gets the enabled FTM interrupts.

Parameters:

base – FTM peripheral base address

Returns:

The enabled interrupts. This is the logical OR of members of the enumeration ftm_interrupt_enable_t

uint32_t FTM_GetInstance(FTM_Type *base)

Gets the instance from the base address.

Parameters:

base – FTM peripheral base address

Returns:

The FTM instance

uint32_t FTM_GetStatusFlags(FTM_Type *base)

Gets the FTM status flags.

Parameters:

base – FTM peripheral base address

Returns:

The status flags. This is the logical OR of members of the enumeration ftm_status_flags_t

void FTM_ClearStatusFlags(FTM_Type *base, uint32_t mask)

Clears the FTM status flags.

Parameters:

base – FTM peripheral base address
mask – The status flags to clear. This is a logical OR of members of the enumeration ftm_status_flags_t

static inline void FTM_SetTimerPeriod(FTM_Type *base, uint32_t ticks)

Sets the timer period in units of ticks.

Timers counts from 0 until it equals the count value set here. The count value is written to the MOD register.

Note

This API allows the user to use the FTM module as a timer. Do not mix usage of this API with FTM’s PWM setup API’s.
Call the utility macros provided in the fsl_common.h to convert usec or msec to ticks.

Parameters:

base – FTM peripheral base address
ticks – A timer period in units of ticks, which should be equal or greater than 1.

static inline void FTM_SetInitialModuloValue(FTM_Type *base, uint16_t initialValue, uint16_t moduloValue)

Set initial value and modulo value for FTM.

Parameters:

base – FTM peripheral base address
initialValue – FTM counter initial value.
moduloValue – FTM counter modulo value.

static inline uint32_t FTM_GetCurrentTimerCount(FTM_Type *base)

Reads the current timer counting value.

This function returns the real-time timer counting value in a range from 0 to a timer period.

Note

Call the utility macros provided in the fsl_common.h to convert ticks to usec or msec.

Parameters:

base – FTM peripheral base address

Returns:

The current counter value in ticks

static inline void FTM_SetChannelMatchValue(FTM_Type *base, ftm_chnl_t chnlNumber, uint16_t value)

Set channel match value for output.

Parameters:

base – FTM peripheral base address
chnlNumber – Channel to set.
value – Channel match value for output.

static inline uint32_t FTM_GetInputCaptureValue(FTM_Type *base, ftm_chnl_t chnlNumber)

Reads the captured value.

This function returns the captured value of a FTM channel configured in input capture or dual edge capture mode.

Note

Call the utility macros provided in the fsl_common.h to convert ticks to usec or msec.

Parameters:

base – FTM peripheral base address
chnlNumber – Channel to be read

Returns:

The captured FTM counter value of the input modes.

static inline void FTM_StartTimer(FTM_Type *base, ftm_clock_source_t clockSource)

Starts the FTM counter.

Parameters:

base – FTM peripheral base address
clockSource – FTM clock source; After the clock source is set, the counter starts running.

static inline void FTM_StopTimer(FTM_Type *base)

Stops the FTM counter.

Parameters:

base – FTM peripheral base address

static inline uint32_t FTM_GetSoftwareOutputValue(FTM_Type *base)

Get channel software output status.

Parameters:

base – FTM peripheral base address

Returns:

Status of channel software output, logical OR value of ftm_channel_index_t.

static inline uint32_t FTM_GetSoftwareOutputEnable(FTM_Type *base)

Get channel software enable status.

Parameters:

base – FTM peripheral base address

Returns:

Status of channel software enable, logical OR value of ftm_channel_index_t.

static inline void FTM_SetSoftwareOutputCtrl(FTM_Type *base, uint32_t chnlEnable, uint32_t chnlValue)

Enables or disables the channel software output control and set channel software output value.

Parameters:

base – FTM peripheral base address
chnlEnable – Channels to enable or disable software output control, logical OR of enumeration ftm_channel_index_t members.
chnlValue – Channels output value, logical OR of enumeration ftm_channel_index_t members

static inline void FTM_SetSoftwareCtrlEnable(FTM_Type *base, ftm_chnl_t chnlNumber, bool value)

Enables or disables the channel software output control.

Parameters:

base – FTM peripheral base address
chnlNumber – Channel to be enabled or disabled
value – true: channel output is affected by software output control false: channel output is unaffected by software output control

static inline void FTM_SetSoftwareCtrlVal(FTM_Type *base, ftm_chnl_t chnlNumber, bool value)

Sets the channel software output control value.

Parameters:

base – FTM peripheral base address.
chnlNumber – Channel to be configured
value – true to set 1, false to set 0

static inline void FTM_SetFaultControlEnable(FTM_Type *base, ftm_chnl_t chnlPairNumber, bool value)

This function enables/disables the fault control in a channel pair.

Parameters:

base – FTM peripheral base address
chnlPairNumber – The FTM channel pair number; options are 0, 1, 2, 3
value – true: Enable fault control for this channel pair; false: No fault control

static inline void FTM_SetDeadTimeEnable(FTM_Type *base, ftm_chnl_t chnlPairNumber, bool value)

This function enables/disables the dead time insertion in a channel pair.

Parameters:

base – FTM peripheral base address
chnlPairNumber – The FTM channel pair number; options are 0, 1, 2, 3
value – true: Insert dead time in this channel pair; false: No dead time inserted

static inline void FTM_SetComplementaryEnable(FTM_Type *base, ftm_chnl_t chnlPairNumber, bool value)

This function enables/disables complementary mode in a channel pair.

Parameters:

base – FTM peripheral base address
chnlPairNumber – The FTM channel pair number; options are 0, 1, 2, 3
value – true: enable complementary mode; false: disable complementary mode

static inline void FTM_SetInvertEnable(FTM_Type *base, ftm_chnl_t chnlPairNumber, bool value)

This function enables/disables inverting control in a channel pair.

Parameters:

base – FTM peripheral base address
chnlPairNumber – The FTM channel pair number; options are 0, 1, 2, 3
value – true: enable inverting; false: disable inverting

void FTM_SetupQuadDecode(FTM_Type *base, const ftm_phase_params_t *phaseAParams, const ftm_phase_params_t *phaseBParams, ftm_quad_decode_mode_t quadMode)

Configures the parameters and activates the quadrature decoder mode.

Parameters:

base – FTM peripheral base address
phaseAParams – Phase A configuration parameters
phaseBParams – Phase B configuration parameters
quadMode – Selects encoding mode used in quadrature decoder mode

static inline uint32_t FTM_GetQuadDecoderFlags(FTM_Type *base)

Gets the FTM Quad Decoder flags.

Parameters:

base – FTM peripheral base address.

Returns:

Flag mask of FTM Quad Decoder, see _ftm_quad_decoder_flags.

static inline void FTM_SetQuadDecoderModuloValue(FTM_Type *base, uint32_t startValue, uint32_t overValue)

Sets the modulo values for Quad Decoder.

The modulo values configure the minimum and maximum values that the Quad decoder counter can reach. After the counter goes over, the counter value goes to the other side and decrease/increase again.

Parameters:

base – FTM peripheral base address.
startValue – The low limit value for Quad Decoder counter.
overValue – The high limit value for Quad Decoder counter.

static inline uint32_t FTM_GetQuadDecoderCounterValue(FTM_Type *base)

Gets the current Quad Decoder counter value.

Parameters:

base – FTM peripheral base address.

Returns:

Current quad Decoder counter value.

static inline void FTM_ClearQuadDecoderCounterValue(FTM_Type *base)

Clears the current Quad Decoder counter value.

The counter is set as the initial value.

Parameters:

base – FTM peripheral base address.

FSL_FTM_DRIVER_VERSION: FTM driver version 2.7.1.

enum _ftm_chnl

List of FTM channels.

Note

Actual number of available channels is SoC dependent

Values:

enumerator kFTM_Chnl_0: FTM channel number 0

enumerator kFTM_Chnl_1: FTM channel number 1

enumerator kFTM_Chnl_2: FTM channel number 2

enumerator kFTM_Chnl_3: FTM channel number 3

enumerator kFTM_Chnl_4: FTM channel number 4

enumerator kFTM_Chnl_5: FTM channel number 5

enumerator kFTM_Chnl_6: FTM channel number 6

enumerator kFTM_Chnl_7: FTM channel number 7

enum _ftm_fault_input

List of FTM faults.

Values:

enumerator kFTM_Fault_0: FTM fault 0 input pin

enumerator kFTM_Fault_1: FTM fault 1 input pin

enumerator kFTM_Fault_2: FTM fault 2 input pin

enumerator kFTM_Fault_3: FTM fault 3 input pin

enum _ftm_pwm_mode

FTM PWM operation modes.

Values:

enumerator kFTM_EdgeAlignedPwm: Edge-aligned PWM

enumerator kFTM_CenterAlignedPwm: Center-aligned PWM

enumerator kFTM_EdgeAlignedCombinedPwm: Edge-aligned combined PWM

enumerator kFTM_CenterAlignedCombinedPwm: Center-aligned combined PWM

enumerator kFTM_ModifiedCombinedPwm: Modified combined PWM

enumerator kFTM_AsymmetricalCombinedPwm: Asymmetrical combined PWM

enum _ftm_pwm_level_select

FTM PWM output pulse mode: high-true, low-true or no output.

Note

kFTM_NoPwmSignal: ELSnB:ELSnA = 0:0 kFTM_LowTrue: ELSnB:ELSnA = 0:1 EPWM: Channel n output is forced low at counter overflow, forced high at channel n match. CPWM: Channel n output is forced low at channel n match when counting down, and forced high at channel n match when counting up. Combined PWM: Channel n output is forced high at beginning of period and at channel n+1 match. It is forced low at the channel n match. kFTM_HighTrue: ELSnB:ELSnA = 1:0 EPWM: Channel n output is forced high at counter overflow, forced low at channel n match. CPWM: Channel n output is forced high at channel n match when counting down, and forced low at channel n match when counting up. Combined PWM: Channel n output is forced low at beginning of period and at channel n+1 match. It is forced high at the channel n match.

Values:

enumerator kFTM_NoPwmSignal: No PWM output on pin

enumerator kFTM_LowTrue: Low true pulses

enumerator kFTM_HighTrue: High true pulses

enum _ftm_output_compare_mode

FlexTimer output compare mode.

Values:

enumerator kFTM_NoOutputSignal: No channel output when counter reaches CnV

enumerator kFTM_ToggleOnMatch: Toggle output

enumerator kFTM_ClearOnMatch: Clear output

enumerator kFTM_SetOnMatch: Set output

enum _ftm_input_capture_edge

FlexTimer input capture edge.

Values:

enumerator kFTM_RisingEdge: Capture on rising edge only

enumerator kFTM_FallingEdge: Capture on falling edge only

enumerator kFTM_RiseAndFallEdge: Capture on rising or falling edge

enum _ftm_dual_edge_capture_mode

FlexTimer dual edge capture modes.

Values:

enumerator kFTM_OneShot: One-shot capture mode

enumerator kFTM_Continuous: Continuous capture mode

enum _ftm_quad_decode_mode

FlexTimer quadrature decode modes.

Values:

enumerator kFTM_QuadPhaseEncode: Phase A and Phase B encoding mode

enumerator kFTM_QuadCountAndDir: Count and direction encoding mode

enum _ftm_phase_polarity

FlexTimer quadrature phase polarities.

Values:

enumerator kFTM_QuadPhaseNormal: Phase input signal is not inverted

enumerator kFTM_QuadPhaseInvert: Phase input signal is inverted

enum _ftm_fault_output_state

FlexTimer pre-scaler factor for the dead time insertion.

Values:

enumerator kFTM_FaultOutput_PreDefined: FTM outputs will be placed into safe values when fault events in ongoing (defined by POL bits).

enumerator kFTM_FaultOutput_TriStated: FTM outputs will be tri-stated when fault event is ongoing.

enum _ftm_deadtime_prescale

FlexTimer pre-scaler factor for the dead time insertion.

Values:

enumerator kFTM_Deadtime_Prescale_1: Divide by 1

enumerator kFTM_Deadtime_Prescale_4: Divide by 4

enumerator kFTM_Deadtime_Prescale_16: Divide by 16

enum _ftm_clock_source

FlexTimer clock source selection.

Values:

enumerator kFTM_SystemClock: System clock selected

enumerator kFTM_FixedClock: Fixed frequency clock

enumerator kFTM_ExternalClock: External clock

enum _ftm_clock_prescale

FlexTimer pre-scaler factor selection for the clock source.

Values:

enumerator kFTM_Prescale_Divide_1: Divide by 1

enumerator kFTM_Prescale_Divide_2: Divide by 2

enumerator kFTM_Prescale_Divide_4: Divide by 4

enumerator kFTM_Prescale_Divide_8: Divide by 8

enumerator kFTM_Prescale_Divide_16: Divide by 16

enumerator kFTM_Prescale_Divide_32: Divide by 32

enumerator kFTM_Prescale_Divide_64: Divide by 64

enumerator kFTM_Prescale_Divide_128: Divide by 128

enum _ftm_filter_prescale

FlexTimer filter clock prescaler selection.

Values:

enumerator kFTM_Filter_Prescale_Divide_1: Divide by 1

enumerator kFTM_Filter_Prescale_Divide_2: Divide by 2

enumerator kFTM_Filter_Prescale_Divide_3: Divide by 3

enumerator kFTM_Filter_Prescale_Divide_4: Divide by 4

enumerator kFTM_Filter_Prescale_Divide_5: Divide by 5

enumerator kFTM_Filter_Prescale_Divide_6: Divide by 6

enumerator kFTM_Filter_Prescale_Divide_7: Divide by 7

enumerator kFTM_Filter_Prescale_Divide_8: Divide by 8

enumerator kFTM_Filter_Prescale_Divide_9: Divide by 9

enumerator kFTM_Filter_Prescale_Divide_10: Divide by 10

enumerator kFTM_Filter_Prescale_Divide_11: Divide by 11

enumerator kFTM_Filter_Prescale_Divide_12: Divide by 12

enumerator kFTM_Filter_Prescale_Divide_13: Divide by 13

enumerator kFTM_Filter_Prescale_Divide_14: Divide by 14

enumerator kFTM_Filter_Prescale_Divide_15: Divide by 15

enumerator kFTM_Filter_Prescale_Divide_16: Divide by 16

enum _ftm_bdm_mode

Options for the FlexTimer behaviour in BDM Mode.

Values:

enumerator kFTM_BdmMode_0: FTM counter stopped, CH(n)F bit can be set, FTM channels in functional mode, writes to MOD,CNTIN and C(n)V registers bypass the register buffers

enumerator kFTM_BdmMode_1: FTM counter stopped, CH(n)F bit is not set, FTM channels outputs are forced to their safe value , writes to MOD,CNTIN and C(n)V registers bypass the register buffers

enumerator kFTM_BdmMode_2: FTM counter stopped, CH(n)F bit is not set, FTM channels outputs are frozen when chip enters in BDM mode, writes to MOD,CNTIN and C(n)V registers bypass the register buffers

enumerator kFTM_BdmMode_3: FTM counter in functional mode, CH(n)F bit can be set, FTM channels in functional mode, writes to MOD,CNTIN and C(n)V registers is in fully functional mode

enum _ftm_fault_mode

Options for the FTM fault control mode.

Values:

enumerator kFTM_Fault_Disable: Fault control is disabled for all channels

enumerator kFTM_Fault_EvenChnls: Enabled for even channels only(0,2,4,6) with manual fault clearing

enumerator kFTM_Fault_AllChnlsMan: Enabled for all channels with manual fault clearing

enumerator kFTM_Fault_AllChnlsAuto: Enabled for all channels with automatic fault clearing

enum _ftm_external_trigger

FTM external trigger options.

Note

Actual available external trigger sources are SoC-specific

Values:

enumerator kFTM_Chnl0Trigger: Generate trigger when counter equals chnl 0 CnV reg

enumerator kFTM_Chnl1Trigger: Generate trigger when counter equals chnl 1 CnV reg

enumerator kFTM_Chnl2Trigger: Generate trigger when counter equals chnl 2 CnV reg

enumerator kFTM_Chnl3Trigger: Generate trigger when counter equals chnl 3 CnV reg

enumerator kFTM_Chnl4Trigger: Generate trigger when counter equals chnl 4 CnV reg

enumerator kFTM_Chnl5Trigger: Generate trigger when counter equals chnl 5 CnV reg

enumerator kFTM_Chnl6Trigger: Available on certain SoC’s, generate trigger when counter equals chnl 6 CnV reg

enumerator kFTM_Chnl7Trigger: Available on certain SoC’s, generate trigger when counter equals chnl 7 CnV reg

enumerator kFTM_InitTrigger: Generate Trigger when counter is updated with CNTIN

enumerator kFTM_ReloadInitTrigger: Available on certain SoC’s, trigger on reload point

enum _ftm_pwm_sync_method

FlexTimer PWM sync options to update registers with buffer.

Values:

enumerator kFTM_SoftwareTrigger: Software triggers PWM sync

enumerator kFTM_HardwareTrigger_0: Hardware trigger 0 causes PWM sync

enumerator kFTM_HardwareTrigger_1: Hardware trigger 1 causes PWM sync

enumerator kFTM_HardwareTrigger_2: Hardware trigger 2 causes PWM sync

enum _ftm_reload_point

FTM options available as loading point for register reload.

Note

Actual available reload points are SoC-specific

Values:

enumerator kFTM_Chnl0Match: Channel 0 match included as a reload point

enumerator kFTM_Chnl1Match: Channel 1 match included as a reload point

enumerator kFTM_Chnl2Match: Channel 2 match included as a reload point

enumerator kFTM_Chnl3Match: Channel 3 match included as a reload point

enumerator kFTM_Chnl4Match: Channel 4 match included as a reload point

enumerator kFTM_Chnl5Match: Channel 5 match included as a reload point

enumerator kFTM_Chnl6Match: Channel 6 match included as a reload point

enumerator kFTM_Chnl7Match: Channel 7 match included as a reload point

enumerator kFTM_CntMax: Use in up-down count mode only, reload when counter reaches the maximum value

enumerator kFTM_CntMin: Use in up-down count mode only, reload when counter reaches the minimum value

enumerator kFTM_HalfCycMatch: Available on certain SoC’s, half cycle match reload point

enum _ftm_interrupt_enable

List of FTM interrupts.

Note

Actual available interrupts are SoC-specific

Values:

enumerator kFTM_Chnl0InterruptEnable: Channel 0 interrupt

enumerator kFTM_Chnl1InterruptEnable: Channel 1 interrupt

enumerator kFTM_Chnl2InterruptEnable: Channel 2 interrupt

enumerator kFTM_Chnl3InterruptEnable: Channel 3 interrupt

enumerator kFTM_Chnl4InterruptEnable: Channel 4 interrupt

enumerator kFTM_Chnl5InterruptEnable: Channel 5 interrupt

enumerator kFTM_Chnl6InterruptEnable: Channel 6 interrupt

enumerator kFTM_Chnl7InterruptEnable: Channel 7 interrupt

enumerator kFTM_FaultInterruptEnable: Fault interrupt

enumerator kFTM_TimeOverflowInterruptEnable: Time overflow interrupt

enumerator kFTM_ReloadInterruptEnable: Reload interrupt; Available only on certain SoC’s

enum _ftm_status_flags

List of FTM flags.

Note

Actual available flags are SoC-specific

Values:

enumerator kFTM_Chnl0Flag: Channel 0 Flag

enumerator kFTM_Chnl1Flag: Channel 1 Flag

enumerator kFTM_Chnl2Flag: Channel 2 Flag

enumerator kFTM_Chnl3Flag: Channel 3 Flag

enumerator kFTM_Chnl4Flag: Channel 4 Flag

enumerator kFTM_Chnl5Flag: Channel 5 Flag

enumerator kFTM_Chnl6Flag: Channel 6 Flag

enumerator kFTM_Chnl7Flag: Channel 7 Flag

enumerator kFTM_FaultFlag: Fault Flag

enumerator kFTM_TimeOverflowFlag: Time overflow Flag

enumerator kFTM_ChnlTriggerFlag: Channel trigger Flag

enumerator kFTM_ReloadFlag: Reload Flag; Available only on certain SoC’s

enum _ftm_channel_index

List of FTM channel index used in logic OR.

Values:

enumerator kFTM_Chnl0_Mask: Channel 0 Mask

enumerator kFTM_Chnl1_Mask: Channel 1 Mask

enumerator kFTM_Chnl2_Mask: Channel 2 Mask

enumerator kFTM_Chnl3_Mask: Channel 3 Mask

enumerator kFTM_Chnl4_Mask: Channel 4 Mask

enumerator kFTM_Chnl5_Mask: Channel 5 Mask

enumerator kFTM_Chnl6_Mask: Channel 6 Mask

enumerator kFTM_Chnl7_Mask: Channel 7 Mask

List of FTM Quad Decoder flags.

Values:

enumerator kFTM_QuadDecoderCountingIncreaseFlag: Counting direction is increasing (FTM counter increment), or the direction is decreasing.

enumerator kFTM_QuadDecoderCountingOverflowOnTopFlag: Indicates if the TOF bit was set on the top or the bottom of counting.

typedef enum _ftm_chnl ftm_chnl_t: List of FTM channels.

Note

Actual number of available channels is SoC dependent

typedef enum _ftm_fault_input ftm_fault_input_t: List of FTM faults.

typedef enum _ftm_pwm_mode ftm_pwm_mode_t: FTM PWM operation modes.

typedef enum _ftm_pwm_level_select ftm_pwm_level_select_t: FTM PWM output pulse mode: high-true, low-true or no output.

Note

kFTM_NoPwmSignal: ELSnB:ELSnA = 0:0 kFTM_LowTrue: ELSnB:ELSnA = 0:1 EPWM: Channel n output is forced low at counter overflow, forced high at channel n match. CPWM: Channel n output is forced low at channel n match when counting down, and forced high at channel n match when counting up. Combined PWM: Channel n output is forced high at beginning of period and at channel n+1 match. It is forced low at the channel n match. kFTM_HighTrue: ELSnB:ELSnA = 1:0 EPWM: Channel n output is forced high at counter overflow, forced low at channel n match. CPWM: Channel n output is forced high at channel n match when counting down, and forced low at channel n match when counting up. Combined PWM: Channel n output is forced low at beginning of period and at channel n+1 match. It is forced high at the channel n match.

typedef struct _ftm_chnl_pwm_signal_param ftm_chnl_pwm_signal_param_t: Options to configure a FTM channel’s PWM signal.

typedef struct _ftm_chnl_pwm_config_param ftm_chnl_pwm_config_param_t: Options to configure a FTM channel using precise setting.

typedef struct _ftm_chnl_param ftm_chnl_param_t: General options to configure a FTM channel using precise setting.

typedef enum _ftm_output_compare_mode ftm_output_compare_mode_t: FlexTimer output compare mode.

typedef enum _ftm_input_capture_edge ftm_input_capture_edge_t: FlexTimer input capture edge.

typedef enum _ftm_dual_edge_capture_mode ftm_dual_edge_capture_mode_t: FlexTimer dual edge capture modes.

typedef struct _ftm_dual_edge_capture_param ftm_dual_edge_capture_param_t: FlexTimer dual edge capture parameters.

typedef enum _ftm_quad_decode_mode ftm_quad_decode_mode_t: FlexTimer quadrature decode modes.

typedef enum _ftm_phase_polarity ftm_phase_polarity_t: FlexTimer quadrature phase polarities.

typedef struct _ftm_phase_param ftm_phase_params_t: FlexTimer quadrature decode phase parameters.

typedef struct _ftm_fault_param ftm_fault_param_t: Structure is used to hold the parameters to configure a FTM fault.

typedef enum _ftm_fault_output_state ftm_fault_output_state_t: FlexTimer pre-scaler factor for the dead time insertion.

typedef enum _ftm_deadtime_prescale ftm_deadtime_prescale_t: FlexTimer pre-scaler factor for the dead time insertion.

typedef struct _ftm_deadtime_param ftm_deadtime_param_t: Options to configure FTM combined channel pair deadtime.

typedef enum _ftm_clock_source ftm_clock_source_t: FlexTimer clock source selection.

typedef enum _ftm_clock_prescale ftm_clock_prescale_t: FlexTimer pre-scaler factor selection for the clock source.

typedef enum _ftm_filter_prescale ftm_filter_prescale_t: FlexTimer filter clock prescaler selection.

typedef enum _ftm_bdm_mode ftm_bdm_mode_t: Options for the FlexTimer behaviour in BDM Mode.

typedef enum _ftm_fault_mode ftm_fault_mode_t: Options for the FTM fault control mode.

typedef enum _ftm_external_trigger ftm_external_trigger_t: FTM external trigger options.

Note

Actual available external trigger sources are SoC-specific

typedef enum _ftm_pwm_sync_method ftm_pwm_sync_method_t: FlexTimer PWM sync options to update registers with buffer.

typedef enum _ftm_reload_point ftm_reload_point_t: FTM options available as loading point for register reload.

Note

Actual available reload points are SoC-specific

typedef enum _ftm_interrupt_enable ftm_interrupt_enable_t: List of FTM interrupts.

Note

Actual available interrupts are SoC-specific

typedef enum _ftm_status_flags ftm_status_flags_t: List of FTM flags.

Note

Actual available flags are SoC-specific

typedef enum _ftm_channel_index ftm_channel_index_t: List of FTM channel index used in logic OR.

typedef struct _ftm_config ftm_config_t

FTM configuration structure.

This structure holds the configuration settings for the FTM peripheral. To initialize this structure to reasonable defaults, call the FTM_GetDefaultConfig() function and pass a pointer to the configuration structure instance.

The configuration structure can be made constant so as to reside in flash.

void FTM_SetupFaultInput(FTM_Type *base, ftm_fault_input_t faultNumber, const ftm_fault_param_t *faultParams)

Sets up the working of the FTM fault inputs protection.

FTM can have up to 4 fault inputs. This function sets up fault parameters, fault level, and input filter.

Parameters:

base – FTM peripheral base address
faultNumber – FTM fault to configure.
faultParams – Parameters passed in to set up the fault

static inline void FTM_SetGlobalTimeBaseOutputEnable(FTM_Type *base, bool enable)

Enables or disables the FTM global time base signal generation to other FTMs.

Parameters:

base – FTM peripheral base address
enable – true to enable, false to disable

static inline void FTM_SetOutputMask(FTM_Type *base, ftm_chnl_t chnlNumber, bool mask)

Sets the FTM peripheral timer channel output mask.

Parameters:

base – FTM peripheral base address
chnlNumber – Channel to be configured
mask – true: masked, channel is forced to its inactive state; false: unmasked

static inline void FTM_SetPwmOutputEnable(FTM_Type *base, ftm_chnl_t chnlNumber, bool value)

Allows users to enable an output on an FTM channel.

To enable the PWM channel output call this function with val=true. For input mode, call this function with val=false.

Parameters:

base – FTM peripheral base address
chnlNumber – Channel to be configured
value – true: enable output; false: output is disabled, used in input mode

static inline void FTM_SetSoftwareTrigger(FTM_Type *base, bool enable)

Enables or disables the FTM software trigger for PWM synchronization.

Parameters:

base – FTM peripheral base address
enable – true: software trigger is selected, false: software trigger is not selected

static inline void FTM_SetWriteProtection(FTM_Type *base, bool enable)

Enables or disables the FTM write protection.

Parameters:

base – FTM peripheral base address
enable – true: Write-protection is enabled, false: Write-protection is disabled

static inline void FTM_EnableDmaTransfer(FTM_Type *base, ftm_chnl_t chnlNumber, bool enable)

Enable DMA transfer or not.

Note: CHnIE bit needs to be set when calling this API. The channel DMA transfer request is generated and the channel interrupt is not generated if (CHnF = 1) when DMA and CHnIE bits are set.

Parameters:

base – FTM peripheral base address.
chnlNumber – Channel to be configured
enable – true to enable, false to disable

static inline void FTM_SetLdok(FTM_Type *base, bool value)

Enable the LDOK bit.

This function enables loading updated values.

Parameters:

base – FTM peripheral base address
value – true: loading updated values is enabled; false: loading updated values is disabled.

static inline void FTM_SetHalfCycReloadMatchValue(FTM_Type *base, uint32_t ticks)

Sets the half cycle relade period in units of ticks.

This function can be callled to set the half-cycle reload value when half-cycle matching is enabled as a reload point. Note: Need enable kFTM_HalfCycMatch as reload point, and when this API call after FTM_StartTimer(), the new HCR value will not be active until next reload point (need call FTM_SetLdok to set LDOK) or register synchronization.

Parameters:

base – FTM peripheral base address
ticks – A timer period in units of ticks, which should be equal or greater than 1.

static inline void FTM_SetLoadFreq(FTM_Type *base, uint32_t loadfreq)

Set load frequency value.

Parameters:

base – FTM peripheral base address.
loadfreq – PWM reload frequency, range: 0 ~ 31.

static inline void FTM_SetPairDeadTime(FTM_Type *base, const ftm_deadtime_param_t *config, ftm_chnl_t chnlPairNumber)

brief Configure deadtime for specific combined channel pair.

param base FTM peripheral base address param config Pointer to the user configuration structure. param chnlPairNumber The FTM channel pair number; options are 0, 1, 2, 3

static inline void FTM_SetPeriodDithering(FTM_Type *base, uint16_t moduloValue, uint8_t fractionalValue)

Set PWM Period Dithering. For the PWM period dithering, the register MOD_MIRROR should be used instead of the register MOD.

Parameters:

base – FTM peripheral base address.
moduloValue – FTM counter modulo value.
fractionalValue – The modulo fractional value used in the PWM period dithering.

static inline void FTM_SetEdgeDithering(FTM_Type *base, ftm_chnl_t chnlNumber, uint16_t matchValue, uint8_t fractionalValue)

Set PWM Edge Dithering. For the PWM edge dithering, the register CnV_MIRROR should be used instead of the register CnV.

Parameters:

base – FTM peripheral base address.
chnlNumber – The channel number.
matchValue – FTM channel n match value.
fractionalValue – The channel n match fractional value used in the PWM edge dithering.

static inline uint32_t FTM_GetChannelInputState(FTM_Type *base, ftm_chnl_t chnlNumber)

Get value of channel n input after the double-sampling or the filtering.

Parameters:

base – FTM peripheral base address.
chnlNumber – The channel number.

Returns:

Channel n input state, 0 or 1.

static inline uint32_t FTM_GetChannelOutputState(FTM_Type *base, ftm_chnl_t chnlNumber)

Get final value of the channel n output.

Parameters:

base – FTM peripheral base address.
chnlNumber – The channel number.

Returns:

Channel n output value, 0 or 1.

struct _ftm_chnl_pwm_signal_param

#include <fsl_ftm.h>

Options to configure a FTM channel’s PWM signal.

Public Members

ftm_chnl_t chnlNumber: The channel/channel pair number. In combined mode, this represents the channel pair number.

ftm_pwm_level_select_t level: PWM output active level select.

uint8_t dutyCyclePercent: PWM pulse width, value should be between 0 to 100 0 = inactive signal(0% duty cycle)… 100 = always active signal (100% duty cycle).

uint8_t firstEdgeDelayPercent: Used only in kFTM_AsymmetricalCombinedPwm mode to generate an asymmetrical PWM. Specifies the delay to the first edge in a PWM period. If unsure leave as 0; Should be specified as a percentage of the PWM period

bool enableComplementary: Used only in combined PWM mode. true: The combined channels output complementary signals; false: The combined channels output same signals;

bool enableDeadtime: Used only in combined PWM mode with enable complementary. true: The deadtime insertion in this pair of channels is enabled; false: The deadtime insertion in this pair of channels is disabled.

struct _ftm_chnl_pwm_config_param

#include <fsl_ftm.h>

Options to configure a FTM channel using precise setting.

Public Members

ftm_chnl_t chnlNumber: The channel/channel pair number. In combined mode, this represents the channel pair number.

ftm_pwm_level_select_t level: PWM output active level select.

uint16_t dutyValue: PWM pulse width, the uint of this value is timer ticks.

uint16_t firstEdgeValue: Used only in kFTM_AsymmetricalCombinedPwm mode to generate an asymmetrical PWM. Specifies the delay to the first edge in a PWM period. If unsure leave as 0, uint of this value is timer ticks.

bool enableComplementary: Used only in combined PWM mode. true: The combined channels output complementary signals; false: The combined channels output same signals;

bool enableDeadtime: Used only in combined PWM mode with enable complementary. true: The deadtime insertion in this pair of channels is enabled; false: The deadtime insertion in this pair of channels is disabled.

struct _ftm_chnl_param

#include <fsl_ftm.h>

General options to configure a FTM channel using precise setting.

Public Members

ftm_pwm_mode_t mode: PWM output mode.

ftm_pwm_level_select_t level: PWM output active level select.

uint16_t initialValue: FTM counter initial value.

uint16_t moduloValue: FTM counter modulo value.

uint16_t chnlValue: FTM channel n match value.

uint16_t combinedChnlValue: FTM combined channel n+1 match value, used only in (modified) combined PWM mode.

bool enableComplementary: Used only in combined PWM mode. true: The combined channels output complementary signals; false: The combined channels output same signals;

bool enableDeadtime: Used only in combined PWM mode with enable complementary. true: The deadtime insertion in this pair of channels is enabled; false: The deadtime insertion in this pair of channels is disabled.

bool enablePulseOutput: Used only in Edge-aligned PWM and Center-aligned PWM. true: If a match in channel occurs, a trigger pulse with one FTM input clock width is generated in the channel n; false: Channel outputs will generate normal PWM outputs without generating a pulse.

bool enableDithering: Enable fractional delay to achieve fine resolution on generated PWM signals. true: Enable dithering; false: Disable dithering.

uint8_t moduloFracValue: Modulo fractional value, used in Period Dithering.

uint8_t chnlFracValue: Channel n match fractional value, used in Edge Dithering.

uint8_t combinedChnlFracValue: Combined channel n+1 match fractional value, used in Edge Dithering. It is recommended to use only one PWM Edge Dithering (channel n PWM Edge Dithering or channel n+1 PWM Edge Dithering) at a time.

struct _ftm_dual_edge_capture_param

#include <fsl_ftm.h>

FlexTimer dual edge capture parameters.

Public Members

ftm_dual_edge_capture_mode_t mode: Dual Edge Capture mode

ftm_input_capture_edge_t currChanEdgeMode: Input capture edge select for channel n

ftm_input_capture_edge_t nextChanEdgeMode: Input capture edge select for channel n+1

struct _ftm_phase_param

#include <fsl_ftm.h>

FlexTimer quadrature decode phase parameters.

Public Members

bool enablePhaseFilter: True: enable phase filter; false: disable filter

uint32_t phaseFilterVal: Filter value, used only if phase filter is enabled

ftm_phase_polarity_t phasePolarity: Phase polarity

struct _ftm_fault_param

#include <fsl_ftm.h>

Structure is used to hold the parameters to configure a FTM fault.

Public Members

bool enableFaultInput: True: Fault input is enabled; false: Fault input is disabled

bool faultLevel: True: Fault polarity is active low; in other words, ‘0’ indicates a fault; False: Fault polarity is active high

bool useFaultFilter: True: Use the filtered fault signal; False: Use the direct path from fault input

struct _ftm_deadtime_param

#include <fsl_ftm.h>

Options to configure FTM combined channel pair deadtime.

Public Members

ftm_deadtime_prescale_t deadTimePrescale: The dead time prescalar value

uint32_t deadTimeValue: The dead time value deadTimeValue’s available range is 0-1023 when register has DTVALEX, otherwise its available range is 0-63.

struct _ftm_config

#include <fsl_ftm.h>

FTM configuration structure.

This structure holds the configuration settings for the FTM peripheral. To initialize this structure to reasonable defaults, call the FTM_GetDefaultConfig() function and pass a pointer to the configuration structure instance.

The configuration structure can be made constant so as to reside in flash.

Public Members

ftm_clock_prescale_t prescale: FTM clock prescale value

ftm_filter_prescale_t filterPrescale: Clock prescaler used in FTM filters

ftm_bdm_mode_t bdmMode: FTM behavior in BDM mode

uint32_t pwmSyncMode: Synchronization methods to use to update buffered registers; Multiple update modes can be used by providing an OR’ed list of options available in enumeration ftm_pwm_sync_method_t.

uint32_t reloadPoints: FTM reload points; When using this, the PWM synchronization is not required. Multiple reload points can be used by providing an OR’ed list of options available in enumeration ftm_reload_point_t.

ftm_fault_mode_t faultMode: FTM fault control mode

uint8_t faultFilterValue: Fault input filter value

ftm_fault_output_state_t faultOutputState: Fault output state

ftm_deadtime_prescale_t deadTimePrescale: The dead time prescalar value

uint32_t deadTimeValue: The dead time value deadTimeValue’s available range is 0-1023 when register has DTVALEX, otherwise its available range is 0-63.

uint32_t extTriggers: External triggers to enable. Multiple trigger sources can be enabled by providing an OR’ed list of options available in enumeration ftm_external_trigger_t.

uint8_t chnlInitState: Defines the initialization value of the channels in OUTINT register

uint8_t chnlPolarity: Defines the output polarity of the channels in POL register

bool useGlobalTimeBase: True: Use of an external global time base is enabled; False: disabled

bool swTriggerResetCount: FTM counter synchronization activated by software trigger, avtive when (syncMethod & FTM_SYNC_SWSYNC_MASK) != 0U

bool hwTriggerResetCount: FTM counter synchronization activated by hardware trigger, avtive when (syncMethod & (FTM_SYNC_TRIG0_MASK | FTM_SYNC_TRIG1_MASK | FTM_SYNC_TRIG2_MASK)) != 0U

GPIO: General-Purpose Input/Output Driver

FSL_GPIO_DRIVER_VERSION: GPIO driver version.

enum _gpio_pin_direction

GPIO direction definition.

Values:

enumerator kGPIO_DigitalInput: Set current pin as digital input

enumerator kGPIO_DigitalOutput: Set current pin as digital output

enum _gpio_checker_attribute

GPIO checker attribute.

Values:

enumerator kGPIO_UsernonsecureRWUsersecureRWPrivilegedsecureRW: User nonsecure:Read+Write; User Secure:Read+Write; Privileged Secure:Read+Write

enumerator kGPIO_UsernonsecureRUsersecureRWPrivilegedsecureRW: User nonsecure:Read; User Secure:Read+Write; Privileged Secure:Read+Write

enumerator kGPIO_UsernonsecureNUsersecureRWPrivilegedsecureRW: User nonsecure:None; User Secure:Read+Write; Privileged Secure:Read+Write

enumerator kGPIO_UsernonsecureRUsersecureRPrivilegedsecureRW: User nonsecure:Read; User Secure:Read; Privileged Secure:Read+Write

enumerator kGPIO_UsernonsecureNUsersecureRPrivilegedsecureRW: User nonsecure:None; User Secure:Read; Privileged Secure:Read+Write

enumerator kGPIO_UsernonsecureNUsersecureNPrivilegedsecureRW: User nonsecure:None; User Secure:None; Privileged Secure:Read+Write

enumerator kGPIO_UsernonsecureNUsersecureNPrivilegedsecureR: User nonsecure:None; User Secure:None; Privileged Secure:Read

enumerator kGPIO_UsernonsecureNUsersecureNPrivilegedsecureN: User nonsecure:None; User Secure:None; Privileged Secure:None

enumerator kGPIO_IgnoreAttributeCheck: Ignores the attribute check

enum _gpio_interrupt_selection

Configures the selection of interrupt/DMA request/trigger output.

Values:

enumerator kGPIO_InterruptOutput0: Interrupt/DMA request/trigger output 0.

enumerator kGPIO_InterruptOutput1: Interrupt/DMA request/trigger output 1.

enum gpio_pin_interrupt_control_t

GPIO pin and interrupt control.

Values:

enumerator kGPIO_PinControlNonSecure: Pin Control Non-Secure.

enumerator kGPIO_InterruptControlNonSecure: Interrupt Control Non-Secure.

enumerator kGPIO_PinControlNonPrivilege: Pin Control Non-Privilege.

enumerator kGPIO_InterruptControlNonPrivilege: Interrupt Control Non-Privilege.

typedef enum _gpio_pin_direction gpio_pin_direction_t: GPIO direction definition.

typedef enum _gpio_checker_attribute gpio_checker_attribute_t: GPIO checker attribute.

typedef struct _gpio_pin_config gpio_pin_config_t

The GPIO pin configuration structure.

Each pin can only be configured as either an output pin or an input pin at a time. If configured as an input pin, leave the outputConfig unused. Note that in some use cases, the corresponding port property should be configured in advance with the PORT_SetPinConfig().

typedef enum _gpio_interrupt_selection gpio_interrupt_selection_t: Configures the selection of interrupt/DMA request/trigger output.

typedef struct _gpio_version_info gpio_version_info_t: GPIO version information.

GPIO_FIT_REG(value)

struct _gpio_pin_config

#include <fsl_gpio.h>

The GPIO pin configuration structure.

Each pin can only be configured as either an output pin or an input pin at a time. If configured as an input pin, leave the outputConfig unused. Note that in some use cases, the corresponding port property should be configured in advance with the PORT_SetPinConfig().

Public Members

gpio_pin_direction_t pinDirection: GPIO direction, input or output

uint8_t outputLogic: Set a default output logic, which has no use in input

struct _gpio_version_info

#include <fsl_gpio.h>

GPIO version information.

Public Members

uint16_t feature: Feature Specification Number.

uint8_t minor: Minor Version Number.

uint8_t major: Major Version Number.

GPIO Driver

void GPIO_PortInit(GPIO_Type *base)

Initializes the GPIO peripheral.

This function ungates the GPIO clock.

Parameters:

base – GPIO peripheral base pointer.

void GPIO_PortDenit(GPIO_Type *base)

Denitializes the GPIO peripheral.

Parameters:

base – GPIO peripheral base pointer.

void GPIO_PinInit(GPIO_Type *base, uint32_t pin, const gpio_pin_config_t *config)

Initializes a GPIO pin used by the board.

To initialize the GPIO, define a pin configuration, as either input or output, in the user file. Then, call the GPIO_PinInit() function.

This is an example to define an input pin or an output pin configuration.

Define a digital input pin configuration,
gpio_pin_config_t config =
{
  kGPIO_DigitalInput,
  0,
}
Define a digital output pin configuration,
gpio_pin_config_t config =
{
  kGPIO_DigitalOutput,
  0,
}

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
pin – GPIO port pin number
config – GPIO pin configuration pointer

void GPIO_GetVersionInfo(GPIO_Type *base, gpio_version_info_t *info)

Get GPIO version information.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
info – GPIO version information

static inline void GPIO_SecurePrivilegeLock(GPIO_Type *base, gpio_pin_interrupt_control_t mask)

lock or unlock secure privilege.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – pin or interrupt macro

static inline void GPIO_EnablePinControlNonSecure(GPIO_Type *base, uint32_t mask)

Enable Pin Control Non-Secure.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_DisablePinControlNonSecure(GPIO_Type *base, uint32_t mask)

Disable Pin Control Non-Secure.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_EnablePinControlNonPrivilege(GPIO_Type *base, uint32_t mask)

Enable Pin Control Non-Privilege.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_DisablePinControlNonPrivilege(GPIO_Type *base, uint32_t mask)

Disable Pin Control Non-Privilege.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_EnableInterruptControlNonSecure(GPIO_Type *base, uint32_t mask)

Enable Interrupt Control Non-Secure.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_DisableInterruptControlNonSecure(GPIO_Type *base, uint32_t mask)

Disable Interrupt Control Non-Secure.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_EnableInterruptControlNonPrivilege(GPIO_Type *base, uint32_t mask)

Enable Interrupt Control Non-Privilege.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_DisableInterruptControlNonPrivilege(GPIO_Type *base, uint32_t mask)

Disable Interrupt Control Non-Privilege.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_PortInputEnable(GPIO_Type *base, uint32_t mask)

Enable port input.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_PortInputDisable(GPIO_Type *base, uint32_t mask)

Disable port input.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_PinWrite(GPIO_Type *base, uint32_t pin, uint8_t output)

Sets the output level of the multiple GPIO pins to the logic 1 or 0.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
pin – GPIO pin number
output – GPIO pin output logic level.
- 0: corresponding pin output low-logic level.
- 1: corresponding pin output high-logic level.

static inline void GPIO_PortSet(GPIO_Type *base, uint32_t mask)

Sets the output level of the multiple GPIO pins to the logic 1.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_PortClear(GPIO_Type *base, uint32_t mask)

Sets the output level of the multiple GPIO pins to the logic 0.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline void GPIO_PortToggle(GPIO_Type *base, uint32_t mask)

Reverses the current output logic of the multiple GPIO pins.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

static inline uint32_t GPIO_PinRead(GPIO_Type *base, uint32_t pin)

Reads the current input value of the GPIO port.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
pin – GPIO pin number

Return values:

GPIO – port input value

0: corresponding pin input low-logic level.
1: corresponding pin input high-logic level.

uint32_t GPIO_PortGetInterruptFlags(GPIO_Type *base)

Reads the GPIO port interrupt status flag.

If a pin is configured to generate the DMA request, the corresponding flag is cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic one is written to that flag. If configured for a level sensitive interrupt that remains asserted, the flag is set again immediately.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)

Return values:

The – current GPIO port interrupt status flag, for example, 0x00010001 means the pin 0 and 17 have the interrupt.

void GPIO_PortClearInterruptFlags(GPIO_Type *base, uint32_t mask)

Clears multiple GPIO pin interrupt status flags.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
mask – GPIO pin number macro

void GPIO_CheckAttributeBytes(GPIO_Type *base, gpio_checker_attribute_t attribute)

brief The GPIO module supports a device-specific number of data ports, organized as 32-bit words/8-bit Bytes. Each 32-bit/8-bit data port includes a GACR register, which defines the byte-level attributes required for a successful access to the GPIO programming model. If the GPIO module’s GACR register organized as 32-bit words, the attribute controls for the 4 data bytes in the GACR follow a standard little endian data convention.

Parameters:

base – GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
attribute – GPIO checker attribute

Common Driver

FSL_COMMON_DRIVER_VERSION: common driver version.

DEBUG_CONSOLE_DEVICE_TYPE_NONE: No debug console.

DEBUG_CONSOLE_DEVICE_TYPE_UART: Debug console based on UART.

DEBUG_CONSOLE_DEVICE_TYPE_LPUART: Debug console based on LPUART.

DEBUG_CONSOLE_DEVICE_TYPE_LPSCI: Debug console based on LPSCI.

DEBUG_CONSOLE_DEVICE_TYPE_USBCDC: Debug console based on USBCDC.

DEBUG_CONSOLE_DEVICE_TYPE_FLEXCOMM: Debug console based on FLEXCOMM.

DEBUG_CONSOLE_DEVICE_TYPE_IUART: Debug console based on i.MX UART.

DEBUG_CONSOLE_DEVICE_TYPE_VUSART: Debug console based on LPC_VUSART.

DEBUG_CONSOLE_DEVICE_TYPE_MINI_USART: Debug console based on LPC_USART.

DEBUG_CONSOLE_DEVICE_TYPE_SWO: Debug console based on SWO.

DEBUG_CONSOLE_DEVICE_TYPE_QSCI: Debug console based on QSCI.

MIN(a, b): Computes the minimum of a and b.

MAX(a, b): Computes the maximum of a and b.

UINT16_MAX: Max value of uint16_t type.

UINT32_MAX: Max value of uint32_t type.

SDK_ATOMIC_LOCAL_ADD(addr, val): Add value val from the variable at address address.

SDK_ATOMIC_LOCAL_SUB(addr, val): Subtract value val to the variable at address address.

SDK_ATOMIC_LOCAL_SET(addr, bits): Set the bits specifiled by bits to the variable at address address.

SDK_ATOMIC_LOCAL_CLEAR(addr, bits): Clear the bits specifiled by bits to the variable at address address.

SDK_ATOMIC_LOCAL_TOGGLE(addr, bits): Toggle the bits specifiled by bits to the variable at address address.

SDK_ATOMIC_LOCAL_CLEAR_AND_SET(addr, clearBits, setBits): For the variable at address address, clear the bits specifiled by clearBits and set the bits specifiled by setBits.

SDK_ATOMIC_LOCAL_COMPARE_AND_SET(addr, expected, newValue): For the variable at address address, check whether the value equal to expected. If value same as expected then update newValue to address and return true , else return false .

SDK_ATOMIC_LOCAL_TEST_AND_SET(addr, newValue): For the variable at address address, set as newValue value and return old value.

USEC_TO_COUNT(us, clockFreqInHz): Macro to convert a microsecond period to raw count value

COUNT_TO_USEC(count, clockFreqInHz): Macro to convert a raw count value to microsecond

MSEC_TO_COUNT(ms, clockFreqInHz): Macro to convert a millisecond period to raw count value

COUNT_TO_MSEC(count, clockFreqInHz): Macro to convert a raw count value to millisecond

SDK_ISR_EXIT_BARRIER

SDK_L1DCACHE_ALIGN(var): Macro to define a variable with L1 d-cache line size alignment

SDK_SIZEALIGN(var, alignbytes)

Macro to define a variable with L2 cache line size alignment

Macro to change a value to a given size aligned value

AT_NONCACHEABLE_SECTION(var): Define a variable var, and place it in non-cacheable section.

AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes): Define a variable var, and place it in non-cacheable section, the start address of the variable is aligned to alignbytes.

AT_NONCACHEABLE_SECTION_INIT(var): Define a variable var with initial value, and place it in non-cacheable section.

AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes): Define a variable var with initial value, and place it in non-cacheable section, the start address of the variable is aligned to alignbytes.

CACHE_LINE_DATA

enum _status_groups

Status group numbers.

Values:

enumerator kStatusGroup_Generic: Group number for generic status codes.

enumerator kStatusGroup_FLASH: Group number for FLASH status codes.

enumerator kStatusGroup_LPSPI: Group number for LPSPI status codes.

enumerator kStatusGroup_FLEXIO_SPI: Group number for FLEXIO SPI status codes.

enumerator kStatusGroup_DSPI: Group number for DSPI status codes.

enumerator kStatusGroup_FLEXIO_UART: Group number for FLEXIO UART status codes.

enumerator kStatusGroup_FLEXIO_I2C: Group number for FLEXIO I2C status codes.

enumerator kStatusGroup_LPI2C: Group number for LPI2C status codes.

enumerator kStatusGroup_UART: Group number for UART status codes.

enumerator kStatusGroup_I2C: Group number for UART status codes.

enumerator kStatusGroup_LPSCI: Group number for LPSCI status codes.

enumerator kStatusGroup_LPUART: Group number for LPUART status codes.

enumerator kStatusGroup_SPI: Group number for SPI status code.

enumerator kStatusGroup_XRDC: Group number for XRDC status code.

enumerator kStatusGroup_SEMA42: Group number for SEMA42 status code.

enumerator kStatusGroup_SDHC: Group number for SDHC status code

enumerator kStatusGroup_SDMMC: Group number for SDMMC status code

enumerator kStatusGroup_SAI: Group number for SAI status code

enumerator kStatusGroup_MCG: Group number for MCG status codes.

enumerator kStatusGroup_SCG: Group number for SCG status codes.

enumerator kStatusGroup_SDSPI: Group number for SDSPI status codes.

enumerator kStatusGroup_FLEXIO_I2S: Group number for FLEXIO I2S status codes

enumerator kStatusGroup_FLEXIO_MCULCD: Group number for FLEXIO LCD status codes

enumerator kStatusGroup_FLASHIAP: Group number for FLASHIAP status codes

enumerator kStatusGroup_FLEXCOMM_I2C: Group number for FLEXCOMM I2C status codes

enumerator kStatusGroup_I2S: Group number for I2S status codes

enumerator kStatusGroup_IUART: Group number for IUART status codes

enumerator kStatusGroup_CSI: Group number for CSI status codes

enumerator kStatusGroup_MIPI_DSI: Group number for MIPI DSI status codes

enumerator kStatusGroup_SDRAMC: Group number for SDRAMC status codes.

enumerator kStatusGroup_POWER: Group number for POWER status codes.

enumerator kStatusGroup_ENET: Group number for ENET status codes.

enumerator kStatusGroup_PHY: Group number for PHY status codes.

enumerator kStatusGroup_TRGMUX: Group number for TRGMUX status codes.

enumerator kStatusGroup_SMARTCARD: Group number for SMARTCARD status codes.

enumerator kStatusGroup_LMEM: Group number for LMEM status codes.

enumerator kStatusGroup_QSPI: Group number for QSPI status codes.

enumerator kStatusGroup_DMA: Group number for DMA status codes.

enumerator kStatusGroup_EDMA: Group number for EDMA status codes.

enumerator kStatusGroup_DMAMGR: Group number for DMAMGR status codes.

enumerator kStatusGroup_FLEXCAN: Group number for FlexCAN status codes.

enumerator kStatusGroup_LTC: Group number for LTC status codes.

enumerator kStatusGroup_FLEXIO_CAMERA: Group number for FLEXIO CAMERA status codes.

enumerator kStatusGroup_LPC_SPI: Group number for LPC_SPI status codes.

enumerator kStatusGroup_LPC_USART: Group number for LPC_USART status codes.

enumerator kStatusGroup_DMIC: Group number for DMIC status codes.

enumerator kStatusGroup_SDIF: Group number for SDIF status codes.

enumerator kStatusGroup_SPIFI: Group number for SPIFI status codes.

enumerator kStatusGroup_OTP: Group number for OTP status codes.

enumerator kStatusGroup_MCAN: Group number for MCAN status codes.

enumerator kStatusGroup_CAAM: Group number for CAAM status codes.

enumerator kStatusGroup_ECSPI: Group number for ECSPI status codes.

enumerator kStatusGroup_USDHC: Group number for USDHC status codes.

enumerator kStatusGroup_LPC_I2C: Group number for LPC_I2C status codes.

enumerator kStatusGroup_DCP: Group number for DCP status codes.

enumerator kStatusGroup_MSCAN: Group number for MSCAN status codes.

enumerator kStatusGroup_ESAI: Group number for ESAI status codes.

enumerator kStatusGroup_FLEXSPI: Group number for FLEXSPI status codes.

enumerator kStatusGroup_MMDC: Group number for MMDC status codes.

enumerator kStatusGroup_PDM: Group number for MIC status codes.

enumerator kStatusGroup_SDMA: Group number for SDMA status codes.

enumerator kStatusGroup_ICS: Group number for ICS status codes.

enumerator kStatusGroup_SPDIF: Group number for SPDIF status codes.

enumerator kStatusGroup_LPC_MINISPI: Group number for LPC_MINISPI status codes.

enumerator kStatusGroup_HASHCRYPT: Group number for Hashcrypt status codes

enumerator kStatusGroup_LPC_SPI_SSP: Group number for LPC_SPI_SSP status codes.

enumerator kStatusGroup_I3C: Group number for I3C status codes

enumerator kStatusGroup_LPC_I2C_1: Group number for LPC_I2C_1 status codes.

enumerator kStatusGroup_NOTIFIER: Group number for NOTIFIER status codes.

enumerator kStatusGroup_DebugConsole: Group number for debug console status codes.

enumerator kStatusGroup_SEMC: Group number for SEMC status codes.

enumerator kStatusGroup_ApplicationRangeStart: Starting number for application groups.

enumerator kStatusGroup_IAP: Group number for IAP status codes

enumerator kStatusGroup_SFA: Group number for SFA status codes

enumerator kStatusGroup_SPC: Group number for SPC status codes.

enumerator kStatusGroup_PUF: Group number for PUF status codes.

enumerator kStatusGroup_TOUCH_PANEL: Group number for touch panel status codes

enumerator kStatusGroup_VBAT: Group number for VBAT status codes

enumerator kStatusGroup_XSPI: Group number for XSPI status codes

enumerator kStatusGroup_PNGDEC: Group number for PNGDEC status codes

enumerator kStatusGroup_JPEGDEC: Group number for JPEGDEC status codes

enumerator kStatusGroup_HAL_GPIO: Group number for HAL GPIO status codes.

enumerator kStatusGroup_HAL_UART: Group number for HAL UART status codes.

enumerator kStatusGroup_HAL_TIMER: Group number for HAL TIMER status codes.

enumerator kStatusGroup_HAL_SPI: Group number for HAL SPI status codes.

enumerator kStatusGroup_HAL_I2C: Group number for HAL I2C status codes.

enumerator kStatusGroup_HAL_FLASH: Group number for HAL FLASH status codes.

enumerator kStatusGroup_HAL_PWM: Group number for HAL PWM status codes.

enumerator kStatusGroup_HAL_RNG: Group number for HAL RNG status codes.

enumerator kStatusGroup_HAL_I2S: Group number for HAL I2S status codes.

enumerator kStatusGroup_HAL_ADC_SENSOR: Group number for HAL ADC SENSOR status codes.

enumerator kStatusGroup_TIMERMANAGER: Group number for TiMER MANAGER status codes.

enumerator kStatusGroup_SERIALMANAGER: Group number for SERIAL MANAGER status codes.

enumerator kStatusGroup_LED: Group number for LED status codes.

enumerator kStatusGroup_BUTTON: Group number for BUTTON status codes.

enumerator kStatusGroup_EXTERN_EEPROM: Group number for EXTERN EEPROM status codes.

enumerator kStatusGroup_SHELL: Group number for SHELL status codes.

enumerator kStatusGroup_MEM_MANAGER: Group number for MEM MANAGER status codes.

enumerator kStatusGroup_LIST: Group number for List status codes.

enumerator kStatusGroup_OSA: Group number for OSA status codes.

enumerator kStatusGroup_COMMON_TASK: Group number for Common task status codes.

enumerator kStatusGroup_MSG: Group number for messaging status codes.

enumerator kStatusGroup_SDK_OCOTP: Group number for OCOTP status codes.

enumerator kStatusGroup_SDK_FLEXSPINOR: Group number for FLEXSPINOR status codes.

enumerator kStatusGroup_CODEC: Group number for codec status codes.

enumerator kStatusGroup_ASRC: Group number for codec status ASRC.

enumerator kStatusGroup_OTFAD: Group number for codec status codes.

enumerator kStatusGroup_SDIOSLV: Group number for SDIOSLV status codes.

enumerator kStatusGroup_MECC: Group number for MECC status codes.

enumerator kStatusGroup_ENET_QOS: Group number for ENET_QOS status codes.

enumerator kStatusGroup_LOG: Group number for LOG status codes.

enumerator kStatusGroup_I3CBUS: Group number for I3CBUS status codes.

enumerator kStatusGroup_QSCI: Group number for QSCI status codes.

enumerator kStatusGroup_ELEMU: Group number for ELEMU status codes.

enumerator kStatusGroup_QUEUEDSPI: Group number for QSPI status codes.

enumerator kStatusGroup_POWER_MANAGER: Group number for POWER_MANAGER status codes.

enumerator kStatusGroup_IPED: Group number for IPED status codes.

enumerator kStatusGroup_ELS_PKC: Group number for ELS PKC status codes.

enumerator kStatusGroup_CSS_PKC: Group number for CSS PKC status codes.

enumerator kStatusGroup_HOSTIF: Group number for HOSTIF status codes.

enumerator kStatusGroup_CLIF: Group number for CLIF status codes.

enumerator kStatusGroup_BMA: Group number for BMA status codes.

enumerator kStatusGroup_NETC: Group number for NETC status codes.

enumerator kStatusGroup_ELE: Group number for ELE status codes.

enumerator kStatusGroup_GLIKEY: Group number for GLIKEY status codes.

enumerator kStatusGroup_AON_POWER: Group number for AON_POWER status codes.

enumerator kStatusGroup_AON_COMMON: Group number for AON_COMMON status codes.

enumerator kStatusGroup_ENDAT3: Group number for ENDAT3 status codes.

enumerator kStatusGroup_HIPERFACE: Group number for HIPERFACE status codes.

enumerator kStatusGroup_NPX: Group number for NPX status codes.

enumerator kStatusGroup_ELA_CSEC: Group number for ELA_CSEC status codes.

enumerator kStatusGroup_FLEXIO_T_FORMAT: Group number for T-format status codes.

enumerator kStatusGroup_FLEXIO_A_FORMAT: Group number for A-format status codes.

Generic status return codes.

Values:

enumerator kStatus_Success: Generic status for Success.

enumerator kStatus_Fail: Generic status for Fail.

enumerator kStatus_ReadOnly: Generic status for read only failure.

enumerator kStatus_OutOfRange: Generic status for out of range access.

enumerator kStatus_InvalidArgument: Generic status for invalid argument check.

enumerator kStatus_Timeout: Generic status for timeout.

enumerator kStatus_NoTransferInProgress: Generic status for no transfer in progress.

enumerator kStatus_Busy: Generic status for module is busy.

enumerator kStatus_NoData: Generic status for no data is found for the operation.

typedef int32_t status_t: Type used for all status and error return values.

void *SDK_Malloc(size_t size, size_t alignbytes)

Allocate memory with given alignment and aligned size.

This is provided to support the dynamically allocated memory used in cache-able region.

Parameters:

size – The length required to malloc.
alignbytes – The alignment size.

Return values:

The – allocated memory.

void SDK_Free(void *ptr)

Free memory.

Parameters:

ptr – The memory to be release.

void SDK_DelayAtLeastUs(uint32_t delayTime_us, uint32_t coreClock_Hz)

Delay at least for some time. Please note that, this API uses while loop for delay, different run-time environments make the time not precise, if precise delay count was needed, please implement a new delay function with hardware timer.

Parameters:

delayTime_us – Delay time in unit of microsecond.
coreClock_Hz – Core clock frequency with Hz.

static inline status_t EnableIRQ(IRQn_Type interrupt)

Enable specific interrupt.

Enable LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.

This function only enables the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:

interrupt – The IRQ number.

Return values:

kStatus_Success – Interrupt enabled successfully
kStatus_Fail – Failed to enable the interrupt

static inline status_t DisableIRQ(IRQn_Type interrupt)

Disable specific interrupt.

Disable LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.

This function only disables the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:

interrupt – The IRQ number.

Return values:

kStatus_Success – Interrupt disabled successfully
kStatus_Fail – Failed to disable the interrupt

static inline status_t EnableIRQWithPriority(IRQn_Type interrupt, uint8_t priNum)

Enable the IRQ, and also set the interrupt priority.

Only handle LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.

This function only handles the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:

interrupt – The IRQ to Enable.
priNum – Priority number set to interrupt controller register.

Return values:

kStatus_Success – Interrupt priority set successfully
kStatus_Fail – Failed to set the interrupt priority.

static inline status_t IRQ_SetPriority(IRQn_Type interrupt, uint8_t priNum)

Set the IRQ priority.

Only handle LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.

This function only handles the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:

interrupt – The IRQ to set.
priNum – Priority number set to interrupt controller register.

Return values:

kStatus_Success – Interrupt priority set successfully
kStatus_Fail – Failed to set the interrupt priority.

static inline status_t IRQ_ClearPendingIRQ(IRQn_Type interrupt)

Clear the pending IRQ flag.

Only handle LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.

This function only handles the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:

interrupt – The flag which IRQ to clear.

Return values:

kStatus_Success – Interrupt priority set successfully
kStatus_Fail – Failed to set the interrupt priority.

static inline uint32_t DisableGlobalIRQ(void)

Disable the global IRQ.

Disable the global interrupt and return the current primask register. User is required to provided the primask register for the EnableGlobalIRQ().

Returns:: Current primask value.

static inline void EnableGlobalIRQ(uint32_t primask)

Enable the global IRQ.

Set the primask register with the provided primask value but not just enable the primask. The idea is for the convenience of integration of RTOS. some RTOS get its own management mechanism of primask. User is required to use the EnableGlobalIRQ() and DisableGlobalIRQ() in pair.

Parameters:

primask – value of primask register to be restored. The primask value is supposed to be provided by the DisableGlobalIRQ().

static inline bool _SDK_AtomicLocalCompareAndSet(uint32_t *addr, uint32_t expected, uint32_t newValue)

static inline uint32_t _SDK_AtomicTestAndSet(uint32_t *addr, uint32_t newValue)

FSL_DRIVER_TRANSFER_DOUBLE_WEAK_IRQ: Macro to use the default weak IRQ handler in drivers.

MAKE_STATUS(group, code): Construct a status code value from a group and code number.

MAKE_VERSION(major, minor, bugfix)

Construct the version number for drivers.

The driver version is a 32-bit number, for both 32-bit platforms(such as Cortex M) and 16-bit platforms(such as DSC).

| Unused    || Major Version || Minor Version ||  Bug Fix    |
31        25  24           17  16            9  8            0

ARRAY_SIZE(x): Computes the number of elements in an array.

UINT64_H(X): Macro to get upper 32 bits of a 64-bit value

UINT64_L(X): Macro to get lower 32 bits of a 64-bit value

SUPPRESS_FALL_THROUGH_WARNING(): For switch case code block, if case section ends without “break;” statement, there wil be fallthrough warning with compiler flag -Wextra or -Wimplicit-fallthrough=n when using armgcc. To suppress this warning, “SUPPRESS_FALL_THROUGH_WARNING();” need to be added at the end of each case section which misses “break;”statement.

MSDK_REG_SECURE_ADDR(x): Convert the register address to the one used in secure mode.

MSDK_REG_NONSECURE_ADDR(x): Convert the register address to the one used in non-secure mode.

MSDK_INVALID_IRQ_HANDLER: Invalid IRQ handler address.

LPI2C: Low Power Inter-Integrated Circuit Driver

void LPI2C_DriverIRQHandler(uint32_t instance)

LPI2C driver IRQ handler common entry.

This function provides the common IRQ request entry for LPI2C.

Parameters:

instance – LPI2C instance.

FSL_LPI2C_DRIVER_VERSION: LPI2C driver version.

LPI2C status return codes.

Values:

enumerator kStatus_LPI2C_Busy: The master is already performing a transfer.

enumerator kStatus_LPI2C_Idle: The slave driver is idle.

enumerator kStatus_LPI2C_Nak: The slave device sent a NAK in response to a byte.

enumerator kStatus_LPI2C_FifoError: FIFO under run or overrun.

enumerator kStatus_LPI2C_BitError: Transferred bit was not seen on the bus.

enumerator kStatus_LPI2C_ArbitrationLost: Arbitration lost error.

enumerator kStatus_LPI2C_PinLowTimeout: SCL or SDA were held low longer than the timeout.

enumerator kStatus_LPI2C_NoTransferInProgress: Attempt to abort a transfer when one is not in progress.

enumerator kStatus_LPI2C_DmaRequestFail: DMA request failed.

enumerator kStatus_LPI2C_Timeout: Timeout polling status flags.

IRQn_Type const kLpi2cMasterIrqs[]: Array to map LPI2C instance number to IRQ number, used internally for LPI2C master interrupt and EDMA transactional APIs.

IRQn_Type const kLpi2cSlaveIrqs[]

lpi2c_master_isr_t s_lpi2cMasterIsr: Pointer to master IRQ handler for each instance, used internally for LPI2C master interrupt and EDMA transactional APIs.

void *s_lpi2cMasterHandle[]: Pointers to master handles for each instance, used internally for LPI2C master interrupt and EDMA transactional APIs.

uint32_t LPI2C_GetInstance(LPI2C_Type *base)

Returns an instance number given a base address.

If an invalid base address is passed, debug builds will assert. Release builds will just return instance number 0.

Parameters:

base – The LPI2C peripheral base address.

Returns:

LPI2C instance number starting from 0.

I2C_RETRY_TIMES: Retry times for waiting flag.

LPI2C Master Driver

void LPI2C_MasterGetDefaultConfig(lpi2c_master_config_t *masterConfig)

Provides a default configuration for the LPI2C master peripheral.

This function provides the following default configuration for the LPI2C master peripheral:

masterConfig->enableMaster            = true;
masterConfig->debugEnable             = false;
masterConfig->ignoreAck               = false;
masterConfig->pinConfig               = kLPI2C_2PinOpenDrain;
masterConfig->baudRate_Hz             = 100000U;
masterConfig->busIdleTimeout_ns       = 0;
masterConfig->pinLowTimeout_ns        = 0;
masterConfig->sdaGlitchFilterWidth_ns = 0;
masterConfig->sclGlitchFilterWidth_ns = 0;
masterConfig->hostRequest.enable      = false;
masterConfig->hostRequest.source      = kLPI2C_HostRequestExternalPin;
masterConfig->hostRequest.polarity    = kLPI2C_HostRequestPinActiveHigh;

After calling this function, you can override any settings in order to customize the configuration, prior to initializing the master driver with LPI2C_MasterInit().

Parameters:

masterConfig – [out] User provided configuration structure for default values. Refer to lpi2c_master_config_t.

void LPI2C_MasterInit(LPI2C_Type *base, const lpi2c_master_config_t *masterConfig, uint32_t sourceClock_Hz)

Initializes the LPI2C master peripheral.

This function enables the peripheral clock and initializes the LPI2C master peripheral as described by the user provided configuration. A software reset is performed prior to configuration.

Parameters:

base – The LPI2C peripheral base address.
masterConfig – User provided peripheral configuration. Use LPI2C_MasterGetDefaultConfig() to get a set of defaults that you can override.
sourceClock_Hz – Frequency in Hertz of the LPI2C functional clock. Used to calculate the baud rate divisors, filter widths, and timeout periods.

void LPI2C_MasterDeinit(LPI2C_Type *base)

Deinitializes the LPI2C master peripheral.

This function disables the LPI2C master peripheral and gates the clock. It also performs a software reset to restore the peripheral to reset conditions.

Parameters:

base – The LPI2C peripheral base address.

void LPI2C_MasterConfigureDataMatch(LPI2C_Type *base, const lpi2c_data_match_config_t *matchConfig)

Configures LPI2C master data match feature.

Parameters:

base – The LPI2C peripheral base address.
matchConfig – Settings for the data match feature.

status_t LPI2C_MasterCheckAndClearError(LPI2C_Type *base, uint32_t status)

Convert provided flags to status code, and clear any errors if present.

Parameters:

base – The LPI2C peripheral base address.
status – Current status flags value that will be checked.

Return values:

kStatus_Success –
kStatus_LPI2C_PinLowTimeout –
kStatus_LPI2C_ArbitrationLost –
kStatus_LPI2C_Nak –
kStatus_LPI2C_FifoError –

status_t LPI2C_CheckForBusyBus(LPI2C_Type *base)

Make sure the bus isn’t already busy.

A busy bus is allowed if we are the one driving it.

Parameters:

base – The LPI2C peripheral base address.

Return values:

kStatus_Success –
kStatus_LPI2C_Busy –

static inline void LPI2C_MasterReset(LPI2C_Type *base)

Performs a software reset.

Restores the LPI2C master peripheral to reset conditions.

Parameters:

base – The LPI2C peripheral base address.

static inline void LPI2C_MasterEnable(LPI2C_Type *base, bool enable)

Enables or disables the LPI2C module as master.

Parameters:

base – The LPI2C peripheral base address.
enable – Pass true to enable or false to disable the specified LPI2C as master.

static inline uint32_t LPI2C_MasterGetStatusFlags(LPI2C_Type *base)

Gets the LPI2C master status flags.

A bit mask with the state of all LPI2C master status flags is returned. For each flag, the corresponding bit in the return value is set if the flag is asserted.

See also

_lpi2c_master_flags

Parameters:

base – The LPI2C peripheral base address.

Returns:

State of the status flags:

1: related status flag is set.
0: related status flag is not set.

static inline void LPI2C_MasterClearStatusFlags(LPI2C_Type *base, uint32_t statusMask)

Clears the LPI2C master status flag state.

The following status register flags can be cleared:

kLPI2C_MasterEndOfPacketFlag
kLPI2C_MasterStopDetectFlag
kLPI2C_MasterNackDetectFlag
kLPI2C_MasterArbitrationLostFlag
kLPI2C_MasterFifoErrFlag
kLPI2C_MasterPinLowTimeoutFlag
kLPI2C_MasterDataMatchFlag

Attempts to clear other flags has no effect.

See also

_lpi2c_master_flags.

Parameters:

base – The LPI2C peripheral base address.
statusMask – A bitmask of status flags that are to be cleared. The mask is composed of _lpi2c_master_flags enumerators OR’d together. You may pass the result of a previous call to LPI2C_MasterGetStatusFlags().

static inline void LPI2C_MasterEnableInterrupts(LPI2C_Type *base, uint32_t interruptMask)

Enables the LPI2C master interrupt requests.

All flags except kLPI2C_MasterBusyFlag and kLPI2C_MasterBusBusyFlag can be enabled as interrupts.

Parameters:

base – The LPI2C peripheral base address.
interruptMask – Bit mask of interrupts to enable. See _lpi2c_master_flags for the set of constants that should be OR’d together to form the bit mask.

static inline void LPI2C_MasterDisableInterrupts(LPI2C_Type *base, uint32_t interruptMask)

Disables the LPI2C master interrupt requests.

All flags except kLPI2C_MasterBusyFlag and kLPI2C_MasterBusBusyFlag can be enabled as interrupts.

Parameters:

base – The LPI2C peripheral base address.
interruptMask – Bit mask of interrupts to disable. See _lpi2c_master_flags for the set of constants that should be OR’d together to form the bit mask.

static inline uint32_t LPI2C_MasterGetEnabledInterrupts(LPI2C_Type *base)

Returns the set of currently enabled LPI2C master interrupt requests.

Parameters:

base – The LPI2C peripheral base address.

Returns:

A bitmask composed of _lpi2c_master_flags enumerators OR’d together to indicate the set of enabled interrupts.

static inline void LPI2C_MasterEnableDMA(LPI2C_Type *base, bool enableTx, bool enableRx)

Enables or disables LPI2C master DMA requests.

Parameters:

base – The LPI2C peripheral base address.
enableTx – Enable flag for transmit DMA request. Pass true for enable, false for disable.
enableRx – Enable flag for receive DMA request. Pass true for enable, false for disable.

static inline uint32_t LPI2C_MasterGetTxFifoAddress(LPI2C_Type *base)

Gets LPI2C master transmit data register address for DMA transfer.

Parameters:

base – The LPI2C peripheral base address.

Returns:

The LPI2C Master Transmit Data Register address.

static inline uint32_t LPI2C_MasterGetRxFifoAddress(LPI2C_Type *base)

Gets LPI2C master receive data register address for DMA transfer.

Parameters:

base – The LPI2C peripheral base address.

Returns:

The LPI2C Master Receive Data Register address.

static inline void LPI2C_MasterSetWatermarks(LPI2C_Type *base, size_t txWords, size_t rxWords)

Sets the watermarks for LPI2C master FIFOs.

Parameters:

base – The LPI2C peripheral base address.
txWords – Transmit FIFO watermark value in words. The kLPI2C_MasterTxReadyFlag flag is set whenever the number of words in the transmit FIFO is equal or less than txWords. Writing a value equal or greater than the FIFO size is truncated.
rxWords – Receive FIFO watermark value in words. The kLPI2C_MasterRxReadyFlag flag is set whenever the number of words in the receive FIFO is greater than rxWords. Writing a value equal or greater than the FIFO size is truncated.

static inline void LPI2C_MasterGetFifoCounts(LPI2C_Type *base, size_t *rxCount, size_t *txCount)

Gets the current number of words in the LPI2C master FIFOs.

Parameters:

base – The LPI2C peripheral base address.
txCount – [out] Pointer through which the current number of words in the transmit FIFO is returned. Pass NULL if this value is not required.
rxCount – [out] Pointer through which the current number of words in the receive FIFO is returned. Pass NULL if this value is not required.

void LPI2C_MasterSetBaudRate(LPI2C_Type *base, uint32_t sourceClock_Hz, uint32_t baudRate_Hz)

Sets the I2C bus frequency for master transactions.

The LPI2C master is automatically disabled and re-enabled as necessary to configure the baud rate. Do not call this function during a transfer, or the transfer is aborted.

Note

Please note that the second parameter is the clock frequency of LPI2C module, the third parameter means user configured bus baudrate, this implementation is different from other I2C drivers which use baudrate configuration as second parameter and source clock frequency as third parameter.

Parameters:

base – The LPI2C peripheral base address.
sourceClock_Hz – LPI2C functional clock frequency in Hertz.
baudRate_Hz – Requested bus frequency in Hertz.

static inline bool LPI2C_MasterGetBusIdleState(LPI2C_Type *base)

Returns whether the bus is idle.

Requires the master mode to be enabled.

Parameters:

base – The LPI2C peripheral base address.

Return values:

true – Bus is busy.
false – Bus is idle.

status_t LPI2C_MasterStart(LPI2C_Type *base, uint8_t address, lpi2c_direction_t dir)

Sends a START signal and slave address on the I2C bus.

This function is used to initiate a new master mode transfer. First, the bus state is checked to ensure that another master is not occupying the bus. Then a START signal is transmitted, followed by the 7-bit address specified in the address parameter. Note that this function does not actually wait until the START and address are successfully sent on the bus before returning.

Parameters:

base – The LPI2C peripheral base address.
address – 7-bit slave device address, in bits [6:0].
dir – Master transfer direction, either kLPI2C_Read or kLPI2C_Write. This parameter is used to set the R/w bit (bit 0) in the transmitted slave address.

Return values:

kStatus_Success – START signal and address were successfully enqueued in the transmit FIFO.
kStatus_LPI2C_Busy – Another master is currently utilizing the bus.

static inline status_t LPI2C_MasterRepeatedStart(LPI2C_Type *base, uint8_t address, lpi2c_direction_t dir)

Sends a repeated START signal and slave address on the I2C bus.

This function is used to send a Repeated START signal when a transfer is already in progress. Like LPI2C_MasterStart(), it also sends the specified 7-bit address.

Note

This function exists primarily to maintain compatible APIs between LPI2C and I2C drivers, as well as to better document the intent of code that uses these APIs.

Parameters:

base – The LPI2C peripheral base address.
address – 7-bit slave device address, in bits [6:0].
dir – Master transfer direction, either kLPI2C_Read or kLPI2C_Write. This parameter is used to set the R/w bit (bit 0) in the transmitted slave address.

Return values:

kStatus_Success – Repeated START signal and address were successfully enqueued in the transmit FIFO.
kStatus_LPI2C_Busy – Another master is currently utilizing the bus.

status_t LPI2C_MasterSend(LPI2C_Type *base, void *txBuff, size_t txSize)

Performs a polling send transfer on the I2C bus.

Sends up to txSize number of bytes to the previously addressed slave device. The slave may reply with a NAK to any byte in order to terminate the transfer early. If this happens, this function returns kStatus_LPI2C_Nak.

Parameters:

base – The LPI2C peripheral base address.
txBuff – The pointer to the data to be transferred.
txSize – The length in bytes of the data to be transferred.

Return values:

kStatus_Success – Data was sent successfully.
kStatus_LPI2C_Busy – Another master is currently utilizing the bus.
kStatus_LPI2C_Nak – The slave device sent a NAK in response to a byte.
kStatus_LPI2C_FifoError – FIFO under run or over run.
kStatus_LPI2C_ArbitrationLost – Arbitration lost error.
kStatus_LPI2C_PinLowTimeout – SCL or SDA were held low longer than the timeout.

status_t LPI2C_MasterReceive(LPI2C_Type *base, void *rxBuff, size_t rxSize)

Performs a polling receive transfer on the I2C bus.

Parameters:

base – The LPI2C peripheral base address.
rxBuff – The pointer to the data to be transferred.
rxSize – The length in bytes of the data to be transferred.

Return values:

kStatus_Success – Data was received successfully.
kStatus_LPI2C_Busy – Another master is currently utilizing the bus.
kStatus_LPI2C_Nak – The slave device sent a NAK in response to a byte.
kStatus_LPI2C_FifoError – FIFO under run or overrun.
kStatus_LPI2C_ArbitrationLost – Arbitration lost error.
kStatus_LPI2C_PinLowTimeout – SCL or SDA were held low longer than the timeout.

status_t LPI2C_MasterStop(LPI2C_Type *base)

Sends a STOP signal on the I2C bus.

This function does not return until the STOP signal is seen on the bus, or an error occurs.

Parameters:

base – The LPI2C peripheral base address.

Return values:

kStatus_Success – The STOP signal was successfully sent on the bus and the transaction terminated.
kStatus_LPI2C_Busy – Another master is currently utilizing the bus.
kStatus_LPI2C_Nak – The slave device sent a NAK in response to a byte.
kStatus_LPI2C_FifoError – FIFO under run or overrun.
kStatus_LPI2C_ArbitrationLost – Arbitration lost error.
kStatus_LPI2C_PinLowTimeout – SCL or SDA were held low longer than the timeout.

status_t LPI2C_MasterTransferBlocking(LPI2C_Type *base, lpi2c_master_transfer_t *transfer)

Performs a master polling transfer on the I2C bus.

Note

The API does not return until the transfer succeeds or fails due to error happens during transfer.

Parameters:

base – The LPI2C peripheral base address.
transfer – Pointer to the transfer structure.

Return values:

kStatus_Success – Data was received successfully.
kStatus_LPI2C_Busy – Another master is currently utilizing the bus.
kStatus_LPI2C_Nak – The slave device sent a NAK in response to a byte.
kStatus_LPI2C_FifoError – FIFO under run or overrun.
kStatus_LPI2C_ArbitrationLost – Arbitration lost error.
kStatus_LPI2C_PinLowTimeout – SCL or SDA were held low longer than the timeout.

void LPI2C_MasterTransferCreateHandle(LPI2C_Type *base, lpi2c_master_handle_t *handle, lpi2c_master_transfer_callback_t callback, void *userData)

Creates a new handle for the LPI2C master non-blocking APIs.

The creation of a handle is for use with the non-blocking APIs. Once a handle is created, there is not a corresponding destroy handle. If the user wants to terminate a transfer, the LPI2C_MasterTransferAbort() API shall be called.

Note

The function also enables the NVIC IRQ for the input LPI2C. Need to notice that on some SoCs the LPI2C IRQ is connected to INTMUX, in this case user needs to enable the associated INTMUX IRQ in application.

Parameters:

base – The LPI2C peripheral base address.
handle – [out] Pointer to the LPI2C master driver handle.
callback – User provided pointer to the asynchronous callback function.
userData – User provided pointer to the application callback data.

status_t LPI2C_MasterTransferNonBlocking(LPI2C_Type *base, lpi2c_master_handle_t *handle, lpi2c_master_transfer_t *transfer)

Performs a non-blocking transaction on the I2C bus.

Parameters:

base – The LPI2C peripheral base address.
handle – Pointer to the LPI2C master driver handle.
transfer – The pointer to the transfer descriptor.

Return values:

kStatus_Success – The transaction was started successfully.
kStatus_LPI2C_Busy – Either another master is currently utilizing the bus, or a non-blocking transaction is already in progress.

status_t LPI2C_MasterTransferGetCount(LPI2C_Type *base, lpi2c_master_handle_t *handle, size_t *count)

Returns number of bytes transferred so far.

Parameters:

base – The LPI2C peripheral base address.
handle – Pointer to the LPI2C master driver handle.
count – [out] Number of bytes transferred so far by the non-blocking transaction.

Return values:

kStatus_Success –
kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.

void LPI2C_MasterTransferAbort(LPI2C_Type *base, lpi2c_master_handle_t *handle)

Terminates a non-blocking LPI2C master transmission early.

Note

It is not safe to call this function from an IRQ handler that has a higher priority than the LPI2C peripheral’s IRQ priority.

Parameters:

base – The LPI2C peripheral base address.
handle – Pointer to the LPI2C master driver handle.

void LPI2C_MasterTransferHandleIRQ(LPI2C_Type *base, void *lpi2cMasterHandle)

Reusable routine to handle master interrupts.

Note

This function does not need to be called unless you are reimplementing the nonblocking API’s interrupt handler routines to add special functionality.

Parameters:

base – The LPI2C peripheral base address.
lpi2cMasterHandle – Pointer to the LPI2C master driver handle.

enum _lpi2c_master_flags

LPI2C master peripheral flags.

The following status register flags can be cleared:

kLPI2C_MasterEndOfPacketFlag
kLPI2C_MasterStopDetectFlag
kLPI2C_MasterNackDetectFlag
kLPI2C_MasterArbitrationLostFlag
kLPI2C_MasterFifoErrFlag
kLPI2C_MasterPinLowTimeoutFlag
kLPI2C_MasterDataMatchFlag

All flags except kLPI2C_MasterBusyFlag and kLPI2C_MasterBusBusyFlag can be enabled as interrupts.

Note

These enums are meant to be OR’d together to form a bit mask.

Values:

enumerator kLPI2C_MasterTxReadyFlag: Transmit data flag

enumerator kLPI2C_MasterRxReadyFlag: Receive data flag

enumerator kLPI2C_MasterEndOfPacketFlag: End Packet flag

enumerator kLPI2C_MasterStopDetectFlag: Stop detect flag

enumerator kLPI2C_MasterNackDetectFlag: NACK detect flag

enumerator kLPI2C_MasterArbitrationLostFlag: Arbitration lost flag

enumerator kLPI2C_MasterFifoErrFlag: FIFO error flag

enumerator kLPI2C_MasterPinLowTimeoutFlag: Pin low timeout flag

enumerator kLPI2C_MasterDataMatchFlag: Data match flag

enumerator kLPI2C_MasterBusyFlag: Master busy flag

enumerator kLPI2C_MasterBusBusyFlag: Bus busy flag

enumerator kLPI2C_MasterClearFlags: All flags which are cleared by the driver upon starting a transfer.

enumerator kLPI2C_MasterIrqFlags: IRQ sources enabled by the non-blocking transactional API.

enumerator kLPI2C_MasterErrorFlags: Errors to check for.

enum _lpi2c_direction

Direction of master and slave transfers.

Values:

enumerator kLPI2C_Write: Master transmit.

enumerator kLPI2C_Read: Master receive.

enum _lpi2c_master_pin_config

LPI2C pin configuration.

Values:

enumerator kLPI2C_2PinOpenDrain: LPI2C Configured for 2-pin open drain mode

enumerator kLPI2C_2PinOutputOnly: LPI2C Configured for 2-pin output only mode (ultra-fast mode)

enumerator kLPI2C_2PinPushPull: LPI2C Configured for 2-pin push-pull mode

enumerator kLPI2C_4PinPushPull: LPI2C Configured for 4-pin push-pull mode

enumerator kLPI2C_2PinOpenDrainWithSeparateSlave: LPI2C Configured for 2-pin open drain mode with separate LPI2C slave

enumerator kLPI2C_2PinOutputOnlyWithSeparateSlave: LPI2C Configured for 2-pin output only mode(ultra-fast mode) with separate LPI2C slave

enumerator kLPI2C_2PinPushPullWithSeparateSlave: LPI2C Configured for 2-pin push-pull mode with separate LPI2C slave

enumerator kLPI2C_4PinPushPullWithInvertedOutput: LPI2C Configured for 4-pin push-pull mode(inverted outputs)

enum _lpi2c_host_request_source

LPI2C master host request selection.

Values:

enumerator kLPI2C_HostRequestExternalPin: Select the LPI2C_HREQ pin as the host request input

enumerator kLPI2C_HostRequestInputTrigger: Select the input trigger as the host request input

enum _lpi2c_host_request_polarity

LPI2C master host request pin polarity configuration.

Values:

enumerator kLPI2C_HostRequestPinActiveLow: Configure the LPI2C_HREQ pin active low

enumerator kLPI2C_HostRequestPinActiveHigh: Configure the LPI2C_HREQ pin active high

enum _lpi2c_data_match_config_mode

LPI2C master data match configuration modes.

Values:

enumerator kLPI2C_MatchDisabled: LPI2C Match Disabled

enumerator kLPI2C_1stWordEqualsM0OrM1: LPI2C Match Enabled and 1st data word equals MATCH0 OR MATCH1

enumerator kLPI2C_AnyWordEqualsM0OrM1: LPI2C Match Enabled and any data word equals MATCH0 OR MATCH1

enumerator kLPI2C_1stWordEqualsM0And2ndWordEqualsM1: LPI2C Match Enabled and 1st data word equals MATCH0, 2nd data equals MATCH1

enumerator kLPI2C_AnyWordEqualsM0AndNextWordEqualsM1: LPI2C Match Enabled and any data word equals MATCH0, next data equals MATCH1

enumerator kLPI2C_1stWordAndM1EqualsM0AndM1: LPI2C Match Enabled and 1st data word and MATCH0 equals MATCH0 and MATCH1

enumerator kLPI2C_AnyWordAndM1EqualsM0AndM1: LPI2C Match Enabled and any data word and MATCH0 equals MATCH0 and MATCH1

enum _lpi2c_master_transfer_flags

Transfer option flags.

Note

These enumerations are intended to be OR’d together to form a bit mask of options for the _lpi2c_master_transfer::flags field.

Values:

enumerator kLPI2C_TransferDefaultFlag: Transfer starts with a start signal, stops with a stop signal.

enumerator kLPI2C_TransferNoStartFlag: Don’t send a start condition, address, and sub address

enumerator kLPI2C_TransferRepeatedStartFlag: Send a repeated start condition

enumerator kLPI2C_TransferNoStopFlag: Don’t send a stop condition.

typedef enum _lpi2c_direction lpi2c_direction_t: Direction of master and slave transfers.

typedef enum _lpi2c_master_pin_config lpi2c_master_pin_config_t: LPI2C pin configuration.

typedef enum _lpi2c_host_request_source lpi2c_host_request_source_t: LPI2C master host request selection.

typedef enum _lpi2c_host_request_polarity lpi2c_host_request_polarity_t: LPI2C master host request pin polarity configuration.

typedef struct _lpi2c_master_config lpi2c_master_config_t

Structure with settings to initialize the LPI2C master module.

This structure holds configuration settings for the LPI2C peripheral. To initialize this structure to reasonable defaults, call the LPI2C_MasterGetDefaultConfig() function and pass a pointer to your configuration structure instance.

The configuration structure can be made constant so it resides in flash.

typedef enum _lpi2c_data_match_config_mode lpi2c_data_match_config_mode_t: LPI2C master data match configuration modes.

typedef struct _lpi2c_match_config lpi2c_data_match_config_t: LPI2C master data match configuration structure.

typedef struct _lpi2c_master_transfer lpi2c_master_transfer_t: LPI2C master descriptor of the transfer.

typedef struct _lpi2c_master_handle lpi2c_master_handle_t: LPI2C master handle of the transfer.

typedef void (*lpi2c_master_transfer_callback_t)(LPI2C_Type *base, lpi2c_master_handle_t *handle, status_t completionStatus, void *userData)

Master completion callback function pointer type.

This callback is used only for the non-blocking master transfer API. Specify the callback you wish to use in the call to LPI2C_MasterTransferCreateHandle().

Param base:: The LPI2C peripheral base address.
Param handle:: Pointer to the LPI2C master driver handle.
Param completionStatus:: Either kStatus_Success or an error code describing how the transfer completed.
Param userData:: Arbitrary pointer-sized value passed from the application.

typedef void (*lpi2c_master_isr_t)(LPI2C_Type *base, void *handle): Typedef for master interrupt handler, used internally for LPI2C master interrupt and EDMA transactional APIs.

struct _lpi2c_master_config

#include <fsl_lpi2c.h>

Structure with settings to initialize the LPI2C master module.

This structure holds configuration settings for the LPI2C peripheral. To initialize this structure to reasonable defaults, call the LPI2C_MasterGetDefaultConfig() function and pass a pointer to your configuration structure instance.

The configuration structure can be made constant so it resides in flash.

Public Members

bool enableMaster: Whether to enable master mode.

bool enableDoze: Whether master is enabled in doze mode.

bool debugEnable: Enable transfers to continue when halted in debug mode.

bool ignoreAck: Whether to ignore ACK/NACK.

lpi2c_master_pin_config_t pinConfig: The pin configuration option.

uint32_t baudRate_Hz: Desired baud rate in Hertz.

uint32_t busIdleTimeout_ns: Bus idle timeout in nanoseconds. Set to 0 to disable.

uint32_t pinLowTimeout_ns: Pin low timeout in nanoseconds. Set to 0 to disable.

uint8_t sdaGlitchFilterWidth_ns: Width in nanoseconds of glitch filter on SDA pin. Set to 0 to disable.

uint8_t sclGlitchFilterWidth_ns: Width in nanoseconds of glitch filter on SCL pin. Set to 0 to disable.

struct _lpi2c_master_config hostRequest: Host request options.

struct _lpi2c_match_config

#include <fsl_lpi2c.h>

LPI2C master data match configuration structure.

Public Members

lpi2c_data_match_config_mode_t matchMode: Data match configuration setting.

bool rxDataMatchOnly: When set to true, received data is ignored until a successful match.

uint32_t match0: Match value 0.

uint32_t match1: Match value 1.

struct _lpi2c_master_transfer

#include <fsl_lpi2c.h>

Non-blocking transfer descriptor structure.

This structure is used to pass transaction parameters to the LPI2C_MasterTransferNonBlocking() API.

Public Members

uint32_t flags: Bit mask of options for the transfer. See enumeration _lpi2c_master_transfer_flags for available options. Set to 0 or kLPI2C_TransferDefaultFlag for normal transfers.

uint16_t slaveAddress: The 7-bit slave address.

lpi2c_direction_t direction: Either kLPI2C_Read or kLPI2C_Write.

uint32_t subaddress: Sub address. Transferred MSB first.

size_t subaddressSize: Length of sub address to send in bytes. Maximum size is 4 bytes.

void *data: Pointer to data to transfer.

size_t dataSize: Number of bytes to transfer.

struct _lpi2c_master_handle

#include <fsl_lpi2c.h>

Driver handle for master non-blocking APIs.

Note

The contents of this structure are private and subject to change.

Public Members

uint8_t state: Transfer state machine current state.

uint16_t remainingBytes: Remaining byte count in current state.

uint8_t *buf: Buffer pointer for current state.

uint16_t commandBuffer[6]: LPI2C command sequence. When all 6 command words are used: Start&addr&write[1 word] + subaddr[4 words] + restart&addr&read[1 word]

lpi2c_master_transfer_t transfer: Copy of the current transfer info.

lpi2c_master_transfer_callback_t completionCallback: Callback function pointer.

void *userData: Application data passed to callback.

struct hostRequest

Public Members

bool enable: Enable host request.

lpi2c_host_request_source_t source: Host request source.

lpi2c_host_request_polarity_t polarity: Host request pin polarity.

LPI2C Master DMA Driver

void LPI2C_MasterCreateEDMAHandle(LPI2C_Type *base, lpi2c_master_edma_handle_t *handle, edma_handle_t *rxDmaHandle, edma_handle_t *txDmaHandle, lpi2c_master_edma_transfer_callback_t callback, void *userData)

Create a new handle for the LPI2C master DMA APIs.

The creation of a handle is for use with the DMA APIs. Once a handle is created, there is not a corresponding destroy handle. If the user wants to terminate a transfer, the LPI2C_MasterTransferAbortEDMA() API shall be called.

For devices where the LPI2C send and receive DMA requests are OR’d together, the txDmaHandle parameter is ignored and may be set to NULL.

Parameters:

base – The LPI2C peripheral base address.
handle – [out] Pointer to the LPI2C master driver handle.
rxDmaHandle – Handle for the eDMA receive channel. Created by the user prior to calling this function.
txDmaHandle – Handle for the eDMA transmit channel. Created by the user prior to calling this function.
callback – User provided pointer to the asynchronous callback function.
userData – User provided pointer to the application callback data.

status_t LPI2C_MasterTransferEDMA(LPI2C_Type *base, lpi2c_master_edma_handle_t *handle, lpi2c_master_transfer_t *transfer)

Performs a non-blocking DMA-based transaction on the I2C bus.

The callback specified when the handle was created is invoked when the transaction has completed.

Parameters:

base – The LPI2C peripheral base address.
handle – Pointer to the LPI2C master driver handle.
transfer – The pointer to the transfer descriptor.

Return values:

kStatus_Success – The transaction was started successfully.
kStatus_LPI2C_Busy – Either another master is currently utilizing the bus, or another DMA transaction is already in progress.

status_t LPI2C_MasterTransferGetCountEDMA(LPI2C_Type *base, lpi2c_master_edma_handle_t *handle, size_t *count)

Returns number of bytes transferred so far.

Parameters:

base – The LPI2C peripheral base address.
handle – Pointer to the LPI2C master driver handle.
count – [out] Number of bytes transferred so far by the non-blocking transaction.

Return values:

kStatus_Success –
kStatus_NoTransferInProgress – There is not a DMA transaction currently in progress.

status_t LPI2C_MasterTransferAbortEDMA(LPI2C_Type *base, lpi2c_master_edma_handle_t *handle)

Terminates a non-blocking LPI2C master transmission early.

Note

It is not safe to call this function from an IRQ handler that has a higher priority than the eDMA peripheral’s IRQ priority.

Parameters:

base – The LPI2C peripheral base address.
handle – Pointer to the LPI2C master driver handle.

Return values:

kStatus_Success – A transaction was successfully aborted.
kStatus_LPI2C_Idle – There is not a DMA transaction currently in progress.

typedef struct _lpi2c_master_edma_handle lpi2c_master_edma_handle_t: LPI2C master EDMA handle of the transfer.

typedef void (*lpi2c_master_edma_transfer_callback_t)(LPI2C_Type *base, lpi2c_master_edma_handle_t *handle, status_t completionStatus, void *userData)

Master DMA completion callback function pointer type.

This callback is used only for the non-blocking master transfer API. Specify the callback you wish to use in the call to LPI2C_MasterCreateEDMAHandle().

Param base:: The LPI2C peripheral base address.
Param handle:: Handle associated with the completed transfer.
Param completionStatus:: Either kStatus_Success or an error code describing how the transfer completed.
Param userData:: Arbitrary pointer-sized value passed from the application.

struct _lpi2c_master_edma_handle

#include <fsl_lpi2c_edma.h>

Driver handle for master DMA APIs.

Note

The contents of this structure are private and subject to change.

Public Members

LPI2C_Type *base: LPI2C base pointer.

bool isBusy: Transfer state machine current state.

uint8_t nbytes: eDMA minor byte transfer count initially configured.

uint16_t commandBuffer[20]: LPI2C command sequence. When all 10 command words are used: Start&addr&write[1 word] + subaddr[4 words] + restart&addr&read[1 word] + receive&Size[4 words]

lpi2c_master_transfer_t transfer: Copy of the current transfer info.

lpi2c_master_edma_transfer_callback_t completionCallback: Callback function pointer.

void *userData: Application data passed to callback.

edma_handle_t *rx: Handle for receive DMA channel.

edma_handle_t *tx: Handle for transmit DMA channel.

edma_tcd_t tcds[3]: Software TCD. Three are allocated to provide enough room to align to 32-bytes.

LPI2C Slave Driver

void LPI2C_SlaveGetDefaultConfig(lpi2c_slave_config_t *slaveConfig)

Provides a default configuration for the LPI2C slave peripheral.

This function provides the following default configuration for the LPI2C slave peripheral:

slaveConfig->enableSlave               = true;
slaveConfig->address0                  = 0U;
slaveConfig->address1                  = 0U;
slaveConfig->addressMatchMode          = kLPI2C_MatchAddress0;
slaveConfig->filterDozeEnable          = true;
slaveConfig->filterEnable              = true;
slaveConfig->enableGeneralCall         = false;
slaveConfig->sclStall.enableAck        = false;
slaveConfig->sclStall.enableTx         = true;
slaveConfig->sclStall.enableRx         = true;
slaveConfig->sclStall.enableAddress    = true;
slaveConfig->ignoreAck                 = false;
slaveConfig->enableReceivedAddressRead = false;
slaveConfig->sdaGlitchFilterWidth_ns   = 0;
slaveConfig->sclGlitchFilterWidth_ns   = 0;
slaveConfig->dataValidDelay_ns         = 0;
slaveConfig->clockHoldTime_ns          = 0;

After calling this function, override any settings to customize the configuration, prior to initializing the master driver with LPI2C_SlaveInit(). Be sure to override at least the address0 member of the configuration structure with the desired slave address.

Parameters:

slaveConfig – [out] User provided configuration structure that is set to default values. Refer to lpi2c_slave_config_t.

void LPI2C_SlaveInit(LPI2C_Type *base, const lpi2c_slave_config_t *slaveConfig, uint32_t sourceClock_Hz)

Initializes the LPI2C slave peripheral.

This function enables the peripheral clock and initializes the LPI2C slave peripheral as described by the user provided configuration.

Parameters:

base – The LPI2C peripheral base address.
slaveConfig – User provided peripheral configuration. Use LPI2C_SlaveGetDefaultConfig() to get a set of defaults that you can override.
sourceClock_Hz – Frequency in Hertz of the LPI2C functional clock. Used to calculate the filter widths, data valid delay, and clock hold time.

void LPI2C_SlaveDeinit(LPI2C_Type *base)

Deinitializes the LPI2C slave peripheral.

This function disables the LPI2C slave peripheral and gates the clock. It also performs a software reset to restore the peripheral to reset conditions.

Parameters:

base – The LPI2C peripheral base address.

static inline void LPI2C_SlaveReset(LPI2C_Type *base)

Performs a software reset of the LPI2C slave peripheral.

Parameters:

base – The LPI2C peripheral base address.

static inline void LPI2C_SlaveEnable(LPI2C_Type *base, bool enable)

Enables or disables the LPI2C module as slave.

Parameters:

base – The LPI2C peripheral base address.
enable – Pass true to enable or false to disable the specified LPI2C as slave.

static inline uint32_t LPI2C_SlaveGetStatusFlags(LPI2C_Type *base)

Gets the LPI2C slave status flags.

A bit mask with the state of all LPI2C slave status flags is returned. For each flag, the corresponding bit in the return value is set if the flag is asserted.

See also

_lpi2c_slave_flags

Parameters:

base – The LPI2C peripheral base address.

Returns:

State of the status flags:

1: related status flag is set.
0: related status flag is not set.

static inline void LPI2C_SlaveClearStatusFlags(LPI2C_Type *base, uint32_t statusMask)

Clears the LPI2C status flag state.

The following status register flags can be cleared:

kLPI2C_SlaveRepeatedStartDetectFlag
kLPI2C_SlaveStopDetectFlag
kLPI2C_SlaveBitErrFlag
kLPI2C_SlaveFifoErrFlag

Attempts to clear other flags has no effect.

See also

_lpi2c_slave_flags.

Parameters:

base – The LPI2C peripheral base address.
statusMask – A bitmask of status flags that are to be cleared. The mask is composed of _lpi2c_slave_flags enumerators OR’d together. You may pass the result of a previous call to LPI2C_SlaveGetStatusFlags().

static inline void LPI2C_SlaveEnableInterrupts(LPI2C_Type *base, uint32_t interruptMask)

Enables the LPI2C slave interrupt requests.

All flags except kLPI2C_SlaveBusyFlag and kLPI2C_SlaveBusBusyFlag can be enabled as interrupts.

Parameters:

base – The LPI2C peripheral base address.
interruptMask – Bit mask of interrupts to enable. See _lpi2c_slave_flags for the set of constants that should be OR’d together to form the bit mask.

static inline void LPI2C_SlaveDisableInterrupts(LPI2C_Type *base, uint32_t interruptMask)

Disables the LPI2C slave interrupt requests.

All flags except kLPI2C_SlaveBusyFlag and kLPI2C_SlaveBusBusyFlag can be enabled as interrupts.

Parameters:

base – The LPI2C peripheral base address.
interruptMask – Bit mask of interrupts to disable. See _lpi2c_slave_flags for the set of constants that should be OR’d together to form the bit mask.

static inline uint32_t LPI2C_SlaveGetEnabledInterrupts(LPI2C_Type *base)

Returns the set of currently enabled LPI2C slave interrupt requests.

Parameters:

base – The LPI2C peripheral base address.

Returns:

A bitmask composed of _lpi2c_slave_flags enumerators OR’d together to indicate the set of enabled interrupts.

static inline void LPI2C_SlaveEnableDMA(LPI2C_Type *base, bool enableAddressValid, bool enableRx, bool enableTx)

Enables or disables the LPI2C slave peripheral DMA requests.

Parameters:

base – The LPI2C peripheral base address.
enableAddressValid – Enable flag for the address valid DMA request. Pass true for enable, false for disable. The address valid DMA request is shared with the receive data DMA request.
enableRx – Enable flag for the receive data DMA request. Pass true for enable, false for disable.
enableTx – Enable flag for the transmit data DMA request. Pass true for enable, false for disable.

static inline bool LPI2C_SlaveGetBusIdleState(LPI2C_Type *base)

Returns whether the bus is idle.

Requires the slave mode to be enabled.

Parameters:

base – The LPI2C peripheral base address.

Return values:

true – Bus is busy.
false – Bus is idle.

static inline void LPI2C_SlaveTransmitAck(LPI2C_Type *base, bool ackOrNack)

Transmits either an ACK or NAK on the I2C bus in response to a byte from the master.

Use this function to send an ACK or NAK when the kLPI2C_SlaveTransmitAckFlag is asserted. This only happens if you enable the sclStall.enableAck field of the lpi2c_slave_config_t configuration structure used to initialize the slave peripheral.

Parameters:

base – The LPI2C peripheral base address.
ackOrNack – Pass true for an ACK or false for a NAK.

static inline void LPI2C_SlaveEnableAckStall(LPI2C_Type *base, bool enable)

Enables or disables ACKSTALL.

When enables ACKSTALL, software can transmit either an ACK or NAK on the I2C bus in response to a byte from the master.

Parameters:

base – The LPI2C peripheral base address.
enable – True will enable ACKSTALL,false will disable ACKSTALL.

static inline uint32_t LPI2C_SlaveGetReceivedAddress(LPI2C_Type *base)

Returns the slave address sent by the I2C master.

This function should only be called if the kLPI2C_SlaveAddressValidFlag is asserted.

Parameters:

base – The LPI2C peripheral base address.

Returns:

The 8-bit address matched by the LPI2C slave. Bit 0 contains the R/w direction bit, and the 7-bit slave address is in the upper 7 bits.

status_t LPI2C_SlaveSend(LPI2C_Type *base, void *txBuff, size_t txSize, size_t *actualTxSize)

Performs a polling send transfer on the I2C bus.

Parameters:

base – The LPI2C peripheral base address.
txBuff – The pointer to the data to be transferred.
txSize – The length in bytes of the data to be transferred.
actualTxSize – [out]

Returns:

Error or success status returned by API.

status_t LPI2C_SlaveReceive(LPI2C_Type *base, void *rxBuff, size_t rxSize, size_t *actualRxSize)

Performs a polling receive transfer on the I2C bus.

Parameters:

base – The LPI2C peripheral base address.
rxBuff – The pointer to the data to be transferred.
rxSize – The length in bytes of the data to be transferred.
actualRxSize – [out]

Returns:

Error or success status returned by API.

void LPI2C_SlaveTransferCreateHandle(LPI2C_Type *base, lpi2c_slave_handle_t *handle, lpi2c_slave_transfer_callback_t callback, void *userData)

Creates a new handle for the LPI2C slave non-blocking APIs.

The creation of a handle is for use with the non-blocking APIs. Once a handle is created, there is not a corresponding destroy handle. If the user wants to terminate a transfer, the LPI2C_SlaveTransferAbort() API shall be called.

Note

The function also enables the NVIC IRQ for the input LPI2C. Need to notice that on some SoCs the LPI2C IRQ is connected to INTMUX, in this case user needs to enable the associated INTMUX IRQ in application.

Parameters:

base – The LPI2C peripheral base address.
handle – [out] Pointer to the LPI2C slave driver handle.
callback – User provided pointer to the asynchronous callback function.
userData – User provided pointer to the application callback data.

status_t LPI2C_SlaveTransferNonBlocking(LPI2C_Type *base, lpi2c_slave_handle_t *handle, uint32_t eventMask)

Starts accepting slave transfers.

Call this API after calling I2C_SlaveInit() and LPI2C_SlaveTransferCreateHandle() to start processing transactions driven by an I2C master. The slave monitors the I2C bus and pass events to the callback that was passed into the call to LPI2C_SlaveTransferCreateHandle(). The callback is always invoked from the interrupt context.

The set of events received by the callback is customizable. To do so, set the eventMask parameter to the OR’d combination of lpi2c_slave_transfer_event_t enumerators for the events you wish to receive. The kLPI2C_SlaveTransmitEvent and kLPI2C_SlaveReceiveEvent events are always enabled and do not need to be included in the mask. Alternatively, you can pass 0 to get a default set of only the transmit and receive events that are always enabled. In addition, the kLPI2C_SlaveAllEvents constant is provided as a convenient way to enable all events.

Parameters:

base – The LPI2C peripheral base address.
handle – Pointer to lpi2c_slave_handle_t structure which stores the transfer state.
eventMask – Bit mask formed by OR’ing together lpi2c_slave_transfer_event_t enumerators to specify which events to send to the callback. Other accepted values are 0 to get a default set of only the transmit and receive events, and kLPI2C_SlaveAllEvents to enable all events.

Return values:

kStatus_Success – Slave transfers were successfully started.
kStatus_LPI2C_Busy – Slave transfers have already been started on this handle.

status_t LPI2C_SlaveTransferGetCount(LPI2C_Type *base, lpi2c_slave_handle_t *handle, size_t *count)

Gets the slave transfer status during a non-blocking transfer.

Parameters:

base – The LPI2C peripheral base address.
handle – Pointer to i2c_slave_handle_t structure.
count – [out] Pointer to a value to hold the number of bytes transferred. May be NULL if the count is not required.

Return values:

kStatus_Success –
kStatus_NoTransferInProgress –

void LPI2C_SlaveTransferAbort(LPI2C_Type *base, lpi2c_slave_handle_t *handle)

Aborts the slave non-blocking transfers.

Note

This API could be called at any time to stop slave for handling the bus events.

Parameters:

base – The LPI2C peripheral base address.
handle – Pointer to lpi2c_slave_handle_t structure which stores the transfer state.

void LPI2C_SlaveTransferHandleIRQ(LPI2C_Type *base, lpi2c_slave_handle_t *handle)

Reusable routine to handle slave interrupts.

Note

This function does not need to be called unless you are reimplementing the non blocking API’s interrupt handler routines to add special functionality.

Parameters:

base – The LPI2C peripheral base address.
handle – Pointer to lpi2c_slave_handle_t structure which stores the transfer state.

enum _lpi2c_slave_flags

LPI2C slave peripheral flags.

The following status register flags can be cleared:

kLPI2C_SlaveRepeatedStartDetectFlag
kLPI2C_SlaveStopDetectFlag
kLPI2C_SlaveBitErrFlag
kLPI2C_SlaveFifoErrFlag

All flags except kLPI2C_SlaveBusyFlag and kLPI2C_SlaveBusBusyFlag can be enabled as interrupts.

Note

These enumerations are meant to be OR’d together to form a bit mask.

Values:

enumerator kLPI2C_SlaveTxReadyFlag: Transmit data flag

enumerator kLPI2C_SlaveRxReadyFlag: Receive data flag

enumerator kLPI2C_SlaveAddressValidFlag: Address valid flag

enumerator kLPI2C_SlaveTransmitAckFlag: Transmit ACK flag

enumerator kLPI2C_SlaveRepeatedStartDetectFlag: Repeated start detect flag

enumerator kLPI2C_SlaveStopDetectFlag: Stop detect flag

enumerator kLPI2C_SlaveBitErrFlag: Bit error flag

enumerator kLPI2C_SlaveFifoErrFlag: FIFO error flag

enumerator kLPI2C_SlaveAddressMatch0Flag: Address match 0 flag

enumerator kLPI2C_SlaveAddressMatch1Flag: Address match 1 flag

enumerator kLPI2C_SlaveGeneralCallFlag: General call flag

enumerator kLPI2C_SlaveBusyFlag: Master busy flag

enumerator kLPI2C_SlaveBusBusyFlag: Bus busy flag

enumerator kLPI2C_SlaveClearFlags: All flags which are cleared by the driver upon starting a transfer.

enumerator kLPI2C_SlaveIrqFlags: IRQ sources enabled by the non-blocking transactional API.

enumerator kLPI2C_SlaveErrorFlags: Errors to check for.

enum _lpi2c_slave_address_match

LPI2C slave address match options.

Values:

enumerator kLPI2C_MatchAddress0: Match only address 0.

enumerator kLPI2C_MatchAddress0OrAddress1: Match either address 0 or address 1.

enumerator kLPI2C_MatchAddress0ThroughAddress1: Match a range of slave addresses from address 0 through address 1.

enum _lpi2c_slave_transfer_event

Set of events sent to the callback for non blocking slave transfers.

These event enumerations are used for two related purposes. First, a bit mask created by OR’ing together events is passed to LPI2C_SlaveTransferNonBlocking() in order to specify which events to enable. Then, when the slave callback is invoked, it is passed the current event through its transfer parameter.

Note

These enumerations are meant to be OR’d together to form a bit mask of events.

Values:

enumerator kLPI2C_SlaveAddressMatchEvent: Received the slave address after a start or repeated start.

enumerator kLPI2C_SlaveTransmitEvent: Callback is requested to provide data to transmit (slave-transmitter role).

enumerator kLPI2C_SlaveReceiveEvent: Callback is requested to provide a buffer in which to place received data (slave-receiver role).

enumerator kLPI2C_SlaveTransmitAckEvent: Callback needs to either transmit an ACK or NACK.

enumerator kLPI2C_SlaveRepeatedStartEvent: A repeated start was detected.

enumerator kLPI2C_SlaveCompletionEvent: A stop was detected, completing the transfer.

enumerator kLPI2C_SlaveAllEvents: Bit mask of all available events.

typedef enum _lpi2c_slave_address_match lpi2c_slave_address_match_t: LPI2C slave address match options.

typedef struct _lpi2c_slave_config lpi2c_slave_config_t

Structure with settings to initialize the LPI2C slave module.

This structure holds configuration settings for the LPI2C slave peripheral. To initialize this structure to reasonable defaults, call the LPI2C_SlaveGetDefaultConfig() function and pass a pointer to your configuration structure instance.

The configuration structure can be made constant so it resides in flash.

typedef enum _lpi2c_slave_transfer_event lpi2c_slave_transfer_event_t

Set of events sent to the callback for non blocking slave transfers.

These event enumerations are used for two related purposes. First, a bit mask created by OR’ing together events is passed to LPI2C_SlaveTransferNonBlocking() in order to specify which events to enable. Then, when the slave callback is invoked, it is passed the current event through its transfer parameter.

Note

These enumerations are meant to be OR’d together to form a bit mask of events.

typedef struct _lpi2c_slave_transfer lpi2c_slave_transfer_t: LPI2C slave transfer structure.

typedef struct _lpi2c_slave_handle lpi2c_slave_handle_t: LPI2C slave handle structure.

typedef void (*lpi2c_slave_transfer_callback_t)(LPI2C_Type *base, lpi2c_slave_transfer_t *transfer, void *userData)

Slave event callback function pointer type.

This callback is used only for the slave non-blocking transfer API. To install a callback, use the LPI2C_SlaveSetCallback() function after you have created a handle.

Param base:: Base address for the LPI2C instance on which the event occurred.
Param transfer:: Pointer to transfer descriptor containing values passed to and/or from the callback.
Param userData:: Arbitrary pointer-sized value passed from the application.

struct _lpi2c_slave_config

#include <fsl_lpi2c.h>

Structure with settings to initialize the LPI2C slave module.

This structure holds configuration settings for the LPI2C slave peripheral. To initialize this structure to reasonable defaults, call the LPI2C_SlaveGetDefaultConfig() function and pass a pointer to your configuration structure instance.

The configuration structure can be made constant so it resides in flash.

Public Members

bool enableSlave: Enable slave mode.

uint8_t address0: Slave’s 7-bit address.

uint8_t address1: Alternate slave 7-bit address.

lpi2c_slave_address_match_t addressMatchMode: Address matching options.

bool filterDozeEnable: Enable digital glitch filter in doze mode.

bool filterEnable: Enable digital glitch filter.

bool enableGeneralCall: Enable general call address matching.

struct _lpi2c_slave_config sclStall: SCL stall enable options.

bool ignoreAck: Continue transfers after a NACK is detected.

bool enableReceivedAddressRead: Enable reading the address received address as the first byte of data.

uint32_t sdaGlitchFilterWidth_ns: Width in nanoseconds of the digital filter on the SDA signal. Set to 0 to disable.

uint32_t sclGlitchFilterWidth_ns: Width in nanoseconds of the digital filter on the SCL signal. Set to 0 to disable.

uint32_t dataValidDelay_ns: Width in nanoseconds of the data valid delay.

uint32_t clockHoldTime_ns: Width in nanoseconds of the clock hold time.

struct _lpi2c_slave_transfer

#include <fsl_lpi2c.h>

LPI2C slave transfer structure.

Public Members

lpi2c_slave_transfer_event_t event: Reason the callback is being invoked.

uint8_t receivedAddress: Matching address send by master.

uint8_t *data: Transfer buffer

size_t dataSize: Transfer size

status_t completionStatus: Success or error code describing how the transfer completed. Only applies for kLPI2C_SlaveCompletionEvent.

size_t transferredCount: Number of bytes actually transferred since start or last repeated start.

struct _lpi2c_slave_handle

#include <fsl_lpi2c.h>

LPI2C slave handle structure.

Note

The contents of this structure are private and subject to change.

Public Members

lpi2c_slave_transfer_t transfer: LPI2C slave transfer copy.

bool isBusy: Whether transfer is busy.

bool wasTransmit: Whether the last transfer was a transmit.

uint32_t eventMask: Mask of enabled events.

uint32_t transferredCount: Count of bytes transferred.

lpi2c_slave_transfer_callback_t callback: Callback function called at transfer event.

void *userData: Callback parameter passed to callback.

struct sclStall

Public Members

bool enableAck: Enables SCL clock stretching during slave-transmit address byte(s) and slave-receiver address and data byte(s) to allow software to write the Transmit ACK Register before the ACK or NACK is transmitted. Clock stretching occurs when transmitting the 9th bit. When enableAckSCLStall is enabled, there is no need to set either enableRxDataSCLStall or enableAddressSCLStall.

bool enableTx: Enables SCL clock stretching when the transmit data flag is set during a slave-transmit transfer.

bool enableRx: Enables SCL clock stretching when receive data flag is set during a slave-receive transfer.

bool enableAddress: Enables SCL clock stretching when the address valid flag is asserted.

LPIT: Low-Power Interrupt Timer

enum _lpit_chnl

List of LPIT channels.

Note

Actual number of available channels is SoC-dependent

Values:

enumerator kLPIT_Chnl_0: LPIT channel number 0

enumerator kLPIT_Chnl_1: LPIT channel number 1

enumerator kLPIT_Chnl_2: LPIT channel number 2

enumerator kLPIT_Chnl_3: LPIT channel number 3

enum _lpit_timer_modes

Mode options available for the LPIT timer.

Values:

enumerator kLPIT_PeriodicCounter: Use the all 32-bits, counter loads and decrements to zero

enumerator kLPIT_DualPeriodicCounter: Counter loads, lower 16-bits decrement to zero, then upper 16-bits decrement

enumerator kLPIT_TriggerAccumulator: Counter loads on first trigger and decrements on each trigger

enumerator kLPIT_InputCapture: Counter loads with 0xFFFFFFFF, decrements to zero. It stores the inverse of the current value when a input trigger is detected

enum _lpit_trigger_select

Trigger options available.

This is used for both internal and external trigger sources. The actual trigger options available is SoC-specific, user should refer to the reference manual.

Values:

enumerator kLPIT_Trigger_TimerChn0: Channel 0 is selected as a trigger source

enumerator kLPIT_Trigger_TimerChn1: Channel 1 is selected as a trigger source

enumerator kLPIT_Trigger_TimerChn2: Channel 2 is selected as a trigger source

enumerator kLPIT_Trigger_TimerChn3: Channel 3 is selected as a trigger source

enumerator kLPIT_Trigger_TimerChn4: Channel 4 is selected as a trigger source

enumerator kLPIT_Trigger_TimerChn5: Channel 5 is selected as a trigger source

enumerator kLPIT_Trigger_TimerChn6: Channel 6 is selected as a trigger source

enumerator kLPIT_Trigger_TimerChn7: Channel 7 is selected as a trigger source

enumerator kLPIT_Trigger_TimerChn8: Channel 8 is selected as a trigger source

enumerator kLPIT_Trigger_TimerChn9: Channel 9 is selected as a trigger source

enumerator kLPIT_Trigger_TimerChn10: Channel 10 is selected as a trigger source

enumerator kLPIT_Trigger_TimerChn11: Channel 11 is selected as a trigger source

enumerator kLPIT_Trigger_TimerChn12: Channel 12 is selected as a trigger source

enumerator kLPIT_Trigger_TimerChn13: Channel 13 is selected as a trigger source

enumerator kLPIT_Trigger_TimerChn14: Channel 14 is selected as a trigger source

enumerator kLPIT_Trigger_TimerChn15: Channel 15 is selected as a trigger source

enum _lpit_trigger_source

Trigger source options available.

Values:

enumerator kLPIT_TriggerSource_External: Use external trigger input

enumerator kLPIT_TriggerSource_Internal: Use internal trigger

enum _lpit_interrupt_enable

List of LPIT interrupts.

Note

Number of timer channels are SoC-specific. See the SoC Reference Manual.

Values:

enumerator kLPIT_Channel0TimerInterruptEnable: Channel 0 Timer interrupt

enumerator kLPIT_Channel1TimerInterruptEnable: Channel 1 Timer interrupt

enumerator kLPIT_Channel2TimerInterruptEnable: Channel 2 Timer interrupt

enumerator kLPIT_Channel3TimerInterruptEnable: Channel 3 Timer interrupt

enum _lpit_status_flags

List of LPIT status flags.

Note

Number of timer channels are SoC-specific. See the SoC Reference Manual.

Values:

enumerator kLPIT_Channel0TimerFlag: Channel 0 Timer interrupt flag

enumerator kLPIT_Channel1TimerFlag: Channel 1 Timer interrupt flag

enumerator kLPIT_Channel2TimerFlag: Channel 2 Timer interrupt flag

enumerator kLPIT_Channel3TimerFlag: Channel 3 Timer interrupt flag

typedef enum _lpit_chnl lpit_chnl_t: List of LPIT channels.

Note

Actual number of available channels is SoC-dependent

typedef enum _lpit_timer_modes lpit_timer_modes_t: Mode options available for the LPIT timer.

typedef enum _lpit_trigger_select lpit_trigger_select_t

Trigger options available.

This is used for both internal and external trigger sources. The actual trigger options available is SoC-specific, user should refer to the reference manual.

typedef enum _lpit_trigger_source lpit_trigger_source_t: Trigger source options available.

typedef enum _lpit_interrupt_enable lpit_interrupt_enable_t: List of LPIT interrupts.

Note

Number of timer channels are SoC-specific. See the SoC Reference Manual.

typedef enum _lpit_status_flags lpit_status_flags_t: List of LPIT status flags.

Note

Number of timer channels are SoC-specific. See the SoC Reference Manual.

typedef struct _lpit_chnl_params lpit_chnl_params_t: Structure to configure the channel timer.

typedef struct _lpit_config lpit_config_t

LPIT configuration structure.

This structure holds the configuration settings for the LPIT peripheral. To initialize this structure to reasonable defaults, call the LPIT_GetDefaultConfig() function and pass a pointer to the configuration structure instance.

The configuration structure can be made constant so as to reside in flash.

FSL_LPIT_DRIVER_VERSION: Version 2.1.1

LPIT_RESET_STATE_DELAY

Delay used in LPIT_Reset.

The macro value should be larger than 4 * core clock / LPIT peripheral clock.

void LPIT_Init(LPIT_Type *base, const lpit_config_t *config)

Ungates the LPIT clock and configures the peripheral for a basic operation.

This function issues a software reset to reset all channels and registers except the Module Control register.

Note

This API should be called at the beginning of the application using the LPIT driver.

Parameters:

base – LPIT peripheral base address.
config – Pointer to the user configuration structure.

void LPIT_Deinit(LPIT_Type *base)

Disables the module and gates the LPIT clock.

Parameters:

base – LPIT peripheral base address.

void LPIT_GetDefaultConfig(lpit_config_t *config)

Fills in the LPIT configuration structure with default settings.

The default values are:

config->enableRunInDebug = false;
config->enableRunInDoze = false;

Parameters:

config – Pointer to the user configuration structure.

status_t LPIT_SetupChannel(LPIT_Type *base, lpit_chnl_t channel, const lpit_chnl_params_t *chnlSetup)

Sets up an LPIT channel based on the user’s preference.

This function sets up the operation mode to one of the options available in the enumeration lpit_timer_modes_t. It sets the trigger source as either internal or external, trigger selection and the timers behaviour when a timeout occurs. It also chains the timer if a prior timer if requested by the user.

Parameters:

base – LPIT peripheral base address.
channel – Channel that is being configured.
chnlSetup – Configuration parameters.

static inline void LPIT_EnableInterrupts(LPIT_Type *base, uint32_t mask)

Enables the selected PIT interrupts.

Parameters:

base – LPIT peripheral base address.
mask – The interrupts to enable. This is a logical OR of members of the enumeration lpit_interrupt_enable_t

static inline void LPIT_DisableInterrupts(LPIT_Type *base, uint32_t mask)

Disables the selected PIT interrupts.

Parameters:

base – LPIT peripheral base address.
mask – The interrupts to enable. This is a logical OR of members of the enumeration lpit_interrupt_enable_t

static inline uint32_t LPIT_GetEnabledInterrupts(LPIT_Type *base)

Gets the enabled LPIT interrupts.

Parameters:

base – LPIT peripheral base address.

Returns:

The enabled interrupts. This is the logical OR of members of the enumeration lpit_interrupt_enable_t

static inline uint32_t LPIT_GetStatusFlags(LPIT_Type *base)

Gets the LPIT status flags.

Parameters:

base – LPIT peripheral base address.

Returns:

The status flags. This is the logical OR of members of the enumeration lpit_status_flags_t

static inline void LPIT_ClearStatusFlags(LPIT_Type *base, uint32_t mask)

Clears the LPIT status flags.

Parameters:

base – LPIT peripheral base address.
mask – The status flags to clear. This is a logical OR of members of the enumeration lpit_status_flags_t

static inline void LPIT_SetTimerPeriod(LPIT_Type *base, lpit_chnl_t channel, uint32_t ticks)

Sets the timer period in units of count.

Timers begin counting down from the value set by this function until it reaches 0, at which point it generates an interrupt and loads this register value again. Writing a new value to this register does not restart the timer. Instead, the value is loaded after the timer expires.

Note

User can call the utility macros provided in fsl_common.h to convert to ticks.

Parameters:

base – LPIT peripheral base address.
channel – Timer channel number.
ticks – Timer period in units of ticks.

static inline void LPIT_SetTimerValue(LPIT_Type *base, lpit_chnl_t channel, uint32_t ticks)

Sets the timer period in units of count.

In the Dual 16-bit Periodic Counter mode, the counter will load and then the lower 16-bits will decrement down to zero, which will assert the output pre-trigger. The upper 16-bits will then decrement down to zero, which will negate the output pre-trigger and set the timer interrupt flag.

Note

Set TVAL register to 0 or 1 is invalid in compare mode.

Parameters:

base – LPIT peripheral base address.
channel – Timer channel number.
ticks – Timer period in units of ticks.

static inline uint32_t LPIT_GetCurrentTimerCount(LPIT_Type *base, lpit_chnl_t channel)

Reads the current timer counting value.

This function returns the real-time timer counting value, in a range from 0 to a timer period.

Note

User can call the utility macros provided in fsl_common.h to convert ticks to microseconds or milliseconds.

Parameters:

base – LPIT peripheral base address.
channel – Timer channel number.

Returns:

Current timer counting value in ticks.

static inline void LPIT_StartTimer(LPIT_Type *base, lpit_chnl_t channel)

Starts the timer counting.

After calling this function, timers load the period value and count down to 0. When the timer reaches 0, it generates a trigger pulse and sets the timeout interrupt flag.

Parameters:

base – LPIT peripheral base address.
channel – Timer channel number.

static inline void LPIT_StopTimer(LPIT_Type *base, lpit_chnl_t channel)

Stops the timer counting.

Parameters:

base – LPIT peripheral base address.
channel – Timer channel number.

static void LPIT_ResetStateDelay(void)

Short wait for LPIT state reset.

After clear or set LPIT_EN, there should be delay longer than 4 LPIT functional clock.

Parameters:

count – Delay count.

static inline void LPIT_Reset(LPIT_Type *base)

Performs a software reset on the LPIT module.

This resets all channels and registers except the Module Control Register.

Parameters:

base – LPIT peripheral base address.

struct _lpit_chnl_params

#include <fsl_lpit.h>

Structure to configure the channel timer.

Public Members

bool chainChannel: true: Timer chained to previous timer; false: Timer not chained

lpit_timer_modes_t timerMode: Timers mode of operation.

lpit_trigger_select_t triggerSelect: Trigger selection for the timer

lpit_trigger_source_t triggerSource: Decides if we use external or internal trigger.

bool enableReloadOnTrigger: true: Timer reloads when a trigger is detected; false: No effect

bool enableStopOnTimeout: true: Timer will stop after timeout; false: does not stop after timeout

bool enableStartOnTrigger: true: Timer starts when a trigger is detected; false: decrement immediately

struct _lpit_config

#include <fsl_lpit.h>

LPIT configuration structure.

This structure holds the configuration settings for the LPIT peripheral. To initialize this structure to reasonable defaults, call the LPIT_GetDefaultConfig() function and pass a pointer to the configuration structure instance.

The configuration structure can be made constant so as to reside in flash.

Public Members

bool enableRunInDebug: true: Timers run in debug mode; false: Timers stop in debug mode

bool enableRunInDoze: true: Timers run in doze mode; false: Timers stop in doze mode

LPSPI: Low Power Serial Peripheral Interface

LPSPI Peripheral driver

void LPSPI_MasterInit(LPSPI_Type *base, const lpspi_master_config_t *masterConfig, uint32_t srcClock_Hz)

Initializes the LPSPI master.

Parameters:

base – LPSPI peripheral address.
masterConfig – Pointer to structure lpspi_master_config_t.
srcClock_Hz – Module source input clock in Hertz

void LPSPI_MasterGetDefaultConfig(lpspi_master_config_t *masterConfig)

Sets the lpspi_master_config_t structure to default values.

This API initializes the configuration structure for LPSPI_MasterInit(). The initialized structure can remain unchanged in LPSPI_MasterInit(), or can be modified before calling the LPSPI_MasterInit(). Example:

lpspi_master_config_t  masterConfig;
LPSPI_MasterGetDefaultConfig(&masterConfig);

Parameters:

masterConfig – pointer to lpspi_master_config_t structure

void LPSPI_SlaveInit(LPSPI_Type *base, const lpspi_slave_config_t *slaveConfig)

LPSPI slave configuration.

Parameters:

base – LPSPI peripheral address.
slaveConfig – Pointer to a structure lpspi_slave_config_t.

void LPSPI_SlaveGetDefaultConfig(lpspi_slave_config_t *slaveConfig)

Sets the lpspi_slave_config_t structure to default values.

This API initializes the configuration structure for LPSPI_SlaveInit(). The initialized structure can remain unchanged in LPSPI_SlaveInit() or can be modified before calling the LPSPI_SlaveInit(). Example:

lpspi_slave_config_t  slaveConfig;
LPSPI_SlaveGetDefaultConfig(&slaveConfig);

Parameters:

slaveConfig – pointer to lpspi_slave_config_t structure.

void LPSPI_Deinit(LPSPI_Type *base)

De-initializes the LPSPI peripheral. Call this API to disable the LPSPI clock.

Parameters:

base – LPSPI peripheral address.

void LPSPI_Reset(LPSPI_Type *base)

Restores the LPSPI peripheral to reset state. Note that this function sets all registers to reset state. As a result, the LPSPI module can’t work after calling this API.

Parameters:

base – LPSPI peripheral address.

uint32_t LPSPI_GetInstance(LPSPI_Type *base)

Get the LPSPI instance from peripheral base address.

Parameters:

base – LPSPI peripheral base address.

Returns:

LPSPI instance.

static inline void LPSPI_Enable(LPSPI_Type *base, bool enable)

Enables the LPSPI peripheral and sets the MCR MDIS to 0.

Parameters:

base – LPSPI peripheral address.
enable – Pass true to enable module, false to disable module.

static inline uint32_t LPSPI_GetStatusFlags(LPSPI_Type *base)

Gets the LPSPI status flag state.

Parameters:

base – LPSPI peripheral address.

Returns:

The LPSPI status(in SR register).

static inline uint8_t LPSPI_GetTxFifoSize(LPSPI_Type *base)

Gets the LPSPI Tx FIFO size.

Parameters:

base – LPSPI peripheral address.

Returns:

The LPSPI Tx FIFO size.

static inline uint8_t LPSPI_GetRxFifoSize(LPSPI_Type *base)

Gets the LPSPI Rx FIFO size.

Parameters:

base – LPSPI peripheral address.

Returns:

The LPSPI Rx FIFO size.

static inline uint32_t LPSPI_GetTxFifoCount(LPSPI_Type *base)

Gets the LPSPI Tx FIFO count.

Parameters:

base – LPSPI peripheral address.

Returns:

The number of words in the transmit FIFO.

static inline uint32_t LPSPI_GetRxFifoCount(LPSPI_Type *base)

Gets the LPSPI Rx FIFO count.

Parameters:

base – LPSPI peripheral address.

Returns:

The number of words in the receive FIFO.

static inline void LPSPI_ClearStatusFlags(LPSPI_Type *base, uint32_t statusFlags)

Clears the LPSPI status flag.

This function clears the desired status bit by using a write-1-to-clear. The user passes in the base and the desired status flag bit to clear. The list of status flags is defined in the _lpspi_flags. Example usage:

LPSPI_ClearStatusFlags(base, kLPSPI_TxDataRequestFlag|kLPSPI_RxDataReadyFlag);

Parameters:

base – LPSPI peripheral address.
statusFlags – The status flag used from type _lpspi_flags.

static inline uint32_t LPSPI_GetTcr(LPSPI_Type *base)

static inline void LPSPI_EnableInterrupts(LPSPI_Type *base, uint32_t mask)

Enables the LPSPI interrupts.

This function configures the various interrupt masks of the LPSPI. The parameters are base and an interrupt mask. Note that, for Tx fill and Rx FIFO drain requests, enabling the interrupt request disables the DMA request.

LPSPI_EnableInterrupts(base, kLPSPI_TxInterruptEnable | kLPSPI_RxInterruptEnable );

Parameters:

base – LPSPI peripheral address.
mask – The interrupt mask; Use the enum _lpspi_interrupt_enable.

static inline void LPSPI_DisableInterrupts(LPSPI_Type *base, uint32_t mask)

Disables the LPSPI interrupts.

LPSPI_DisableInterrupts(base, kLPSPI_TxInterruptEnable | kLPSPI_RxInterruptEnable );

Parameters:

base – LPSPI peripheral address.
mask – The interrupt mask; Use the enum _lpspi_interrupt_enable.

static inline void LPSPI_EnableDMA(LPSPI_Type *base, uint32_t mask)

Enables the LPSPI DMA request.

This function configures the Rx and Tx DMA mask of the LPSPI. The parameters are base and a DMA mask.

LPSPI_EnableDMA(base, kLPSPI_TxDmaEnable | kLPSPI_RxDmaEnable);

Parameters:

base – LPSPI peripheral address.
mask – The interrupt mask; Use the enum _lpspi_dma_enable.

static inline void LPSPI_DisableDMA(LPSPI_Type *base, uint32_t mask)

Disables the LPSPI DMA request.

This function configures the Rx and Tx DMA mask of the LPSPI. The parameters are base and a DMA mask.

SPI_DisableDMA(base, kLPSPI_TxDmaEnable | kLPSPI_RxDmaEnable);

Parameters:

base – LPSPI peripheral address.
mask – The interrupt mask; Use the enum _lpspi_dma_enable.

static inline uint32_t LPSPI_GetTxRegisterAddress(LPSPI_Type *base)

Gets the LPSPI Transmit Data Register address for a DMA operation.

This function gets the LPSPI Transmit Data Register address because this value is needed for the DMA operation. This function can be used for either master or slave mode.

Parameters:

base – LPSPI peripheral address.

Returns:

The LPSPI Transmit Data Register address.

static inline uint32_t LPSPI_GetRxRegisterAddress(LPSPI_Type *base)

Gets the LPSPI Receive Data Register address for a DMA operation.

This function gets the LPSPI Receive Data Register address because this value is needed for the DMA operation. This function can be used for either master or slave mode.

Parameters:

base – LPSPI peripheral address.

Returns:

The LPSPI Receive Data Register address.

bool LPSPI_CheckTransferArgument(LPSPI_Type *base, lpspi_transfer_t *transfer, bool isEdma)

Check the argument for transfer .

Parameters:

base – LPSPI peripheral address.
transfer – the transfer struct to be used.
isEdma – True to check for EDMA transfer, false to check interrupt non-blocking transfer

Returns:

Return true for right and false for wrong.

static inline void LPSPI_SetMasterSlaveMode(LPSPI_Type *base, lpspi_master_slave_mode_t mode)

Configures the LPSPI for either master or slave.

Note that the CFGR1 should only be written when the LPSPI is disabled (LPSPIx_CR_MEN = 0).

Parameters:

base – LPSPI peripheral address.
mode – Mode setting (master or slave) of type lpspi_master_slave_mode_t.

static inline void LPSPI_SelectTransferPCS(LPSPI_Type *base, lpspi_which_pcs_t select)

Configures the peripheral chip select used for the transfer.

Parameters:

base – LPSPI peripheral address.
select – LPSPI Peripheral Chip Select (PCS) configuration.

static inline void LPSPI_SetPCSContinous(LPSPI_Type *base, bool IsContinous)

Set the PCS signal to continuous or uncontinuous mode.

Note

In master mode, continuous transfer will keep the PCS asserted at the end of the frame size, until a command word is received that starts a new frame. So PCS must be set back to uncontinuous when transfer finishes. In slave mode, when continuous transfer is enabled, the LPSPI will only transmit the first frame size bits, after that the LPSPI will transmit received data back (assuming a 32-bit shift register).

Parameters:

base – LPSPI peripheral address.
IsContinous – True to set the transfer PCS to continuous mode, false to set to uncontinuous mode.

static inline bool LPSPI_IsMaster(LPSPI_Type *base)

Returns whether the LPSPI module is in master mode.

Parameters:

base – LPSPI peripheral address.

Returns:

Returns true if the module is in master mode or false if the module is in slave mode.

static inline void LPSPI_FlushFifo(LPSPI_Type *base, bool flushTxFifo, bool flushRxFifo)

Flushes the LPSPI FIFOs.

Parameters:

base – LPSPI peripheral address.
flushTxFifo – Flushes (true) the Tx FIFO, else do not flush (false) the Tx FIFO.
flushRxFifo – Flushes (true) the Rx FIFO, else do not flush (false) the Rx FIFO.

static inline void LPSPI_SetFifoWatermarks(LPSPI_Type *base, uint32_t txWater, uint32_t rxWater)

Sets the transmit and receive FIFO watermark values.

This function allows the user to set the receive and transmit FIFO watermarks. The function does not compare the watermark settings to the FIFO size. The FIFO watermark should not be equal to or greater than the FIFO size. It is up to the higher level driver to make this check.

Parameters:

base – LPSPI peripheral address.
txWater – The TX FIFO watermark value. Writing a value equal or greater than the FIFO size is truncated.
rxWater – The RX FIFO watermark value. Writing a value equal or greater than the FIFO size is truncated.

static inline void LPSPI_SetAllPcsPolarity(LPSPI_Type *base, uint32_t mask)

Configures all LPSPI peripheral chip select polarities simultaneously.

Note that the CFGR1 should only be written when the LPSPI is disabled (LPSPIx_CR_MEN = 0).

This is an example: PCS0 and PCS1 set to active low and other PCSs set to active high. Note that the number of PCS is device-specific.

LPSPI_SetAllPcsPolarity(base, kLPSPI_Pcs0ActiveLow | kLPSPI_Pcs1ActiveLow);

Parameters:

base – LPSPI peripheral address.
mask – The PCS polarity mask; Use the enum _lpspi_pcs_polarity.

static inline void LPSPI_SetFrameSize(LPSPI_Type *base, uint32_t frameSize)

Configures the frame size.

The minimum frame size is 8-bits and the maximum frame size is 4096-bits. If the frame size is less than or equal to 32-bits, the word size and frame size are identical. If the frame size is greater than 32-bits, the word size is 32-bits for each word except the last (the last word contains the remainder bits if the frame size is not divisible by 32). The minimum word size is 2-bits. A frame size of 33-bits (or similar) is not supported.

Note 1: The transmit command register should be initialized before enabling the LPSPI in slave mode, although the command register does not update until after the LPSPI is enabled. After it is enabled, the transmit command register should only be changed if the LPSPI is idle.

Note 2: The transmit and command FIFO is a combined FIFO that includes both transmit data and command words. That means the TCR register should be written to when the Tx FIFO is not full.

Parameters:

base – LPSPI peripheral address.
frameSize – The frame size in number of bits.

uint32_t LPSPI_MasterSetBaudRate(LPSPI_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz, uint32_t *tcrPrescaleValue)

Sets the LPSPI baud rate in bits per second.

This function takes in the desired bitsPerSec (baud rate) and calculates the nearest possible baud rate without exceeding the desired baud rate and returns the calculated baud rate in bits-per-second. It requires the caller to provide the frequency of the module source clock (in Hertz). Note that the baud rate does not go into effect until the Transmit Control Register (TCR) is programmed with the prescale value. Hence, this function returns the prescale tcrPrescaleValue parameter for later programming in the TCR. The higher level peripheral driver should alert the user of an out of range baud rate input.

Note that the LPSPI module must first be disabled before configuring this. Note that the LPSPI module must be configured for master mode before configuring this.

Parameters:

base – LPSPI peripheral address.
baudRate_Bps – The desired baud rate in bits per second.
srcClock_Hz – Module source input clock in Hertz.
tcrPrescaleValue – The TCR prescale value needed to program the TCR.

Returns:

The actual calculated baud rate. This function may also return a “0” if the LPSPI is not configured for master mode or if the LPSPI module is not disabled.

void LPSPI_MasterSetDelayScaler(LPSPI_Type *base, uint32_t scaler, lpspi_delay_type_t whichDelay)

Manually configures a specific LPSPI delay parameter (module must be disabled to change the delay values).

This function configures the following: SCK to PCS delay, or PCS to SCK delay, or The configurations must occur between the transfer delay.

The delay names are available in type lpspi_delay_type_t.

The user passes the desired delay along with the delay value. This allows the user to directly set the delay values if they have pre-calculated them or if they simply wish to manually increment the value.

Note that the LPSPI module must first be disabled before configuring this. Note that the LPSPI module must be configured for master mode before configuring this.

Parameters:

base – LPSPI peripheral address.
scaler – The 8-bit delay value 0x00 to 0xFF (255).
whichDelay – The desired delay to configure, must be of type lpspi_delay_type_t.

uint32_t LPSPI_MasterSetDelayTimes(LPSPI_Type *base, uint32_t delayTimeInNanoSec, lpspi_delay_type_t whichDelay, uint32_t srcClock_Hz)

Calculates the delay based on the desired delay input in nanoseconds (module must be disabled to change the delay values).

This function calculates the values for the following: SCK to PCS delay, or PCS to SCK delay, or The configurations must occur between the transfer delay.

The delay names are available in type lpspi_delay_type_t.

The user passes the desired delay and the desired delay value in nano-seconds. The function calculates the value needed for the desired delay parameter and returns the actual calculated delay because an exact delay match may not be possible. In this case, the closest match is calculated without going below the desired delay value input. It is possible to input a very large delay value that exceeds the capability of the part, in which case the maximum supported delay is returned. It is up to the higher level peripheral driver to alert the user of an out of range delay input.

Note that the LPSPI module must be configured for master mode before configuring this. And note that the delayTime = LPSPI_clockSource / (PRESCALE * Delay_scaler).

Parameters:

base – LPSPI peripheral address.
delayTimeInNanoSec – The desired delay value in nano-seconds.
whichDelay – The desired delay to configuration, which must be of type lpspi_delay_type_t.
srcClock_Hz – Module source input clock in Hertz.

Returns:

actual Calculated delay value in nano-seconds.

static inline void LPSPI_WriteData(LPSPI_Type *base, uint32_t data)

Writes data into the transmit data buffer.

This function writes data passed in by the user to the Transmit Data Register (TDR). The user can pass up to 32-bits of data to load into the TDR. If the frame size exceeds 32-bits, the user has to manage sending the data one 32-bit word at a time. Any writes to the TDR result in an immediate push to the transmit FIFO. This function can be used for either master or slave modes.

Parameters:

base – LPSPI peripheral address.
data – The data word to be sent.

static inline uint32_t LPSPI_ReadData(LPSPI_Type *base)

Reads data from the data buffer.

This function reads the data from the Receive Data Register (RDR). This function can be used for either master or slave mode.

Parameters:

base – LPSPI peripheral address.

Returns:

The data read from the data buffer.

void LPSPI_SetDummyData(LPSPI_Type *base, uint8_t dummyData)

Set up the dummy data.

Parameters:

base – LPSPI peripheral address.
dummyData – Data to be transferred when tx buffer is NULL. Note: This API has no effect when LPSPI in slave interrupt mode, because driver will set the TXMSK bit to 1 if txData is NULL, no data is loaded from transmit FIFO and output pin is tristated.

void LPSPI_MasterTransferCreateHandle(LPSPI_Type *base, lpspi_master_handle_t *handle, lpspi_master_transfer_callback_t callback, void *userData)

Initializes the LPSPI master handle.

This function initializes the LPSPI handle, which can be used for other LPSPI transactional APIs. Usually, for a specified LPSPI instance, call this API once to get the initialized handle.

Parameters:

base – LPSPI peripheral address.
handle – LPSPI handle pointer to lpspi_master_handle_t.
callback – DSPI callback.
userData – callback function parameter.

status_t LPSPI_MasterTransferBlocking(LPSPI_Type *base, lpspi_transfer_t *transfer)

LPSPI master transfer data using a polling method.

This function transfers data using a polling method. This is a blocking function, which does not return until all transfers have been completed.

Note: The transfer data size should be integer multiples of bytesPerFrame if bytesPerFrame is less than or equal to 4. For bytesPerFrame greater than 4: The transfer data size should be equal to bytesPerFrame if the bytesPerFrame is not integer multiples of 4. Otherwise, the transfer data size can be an integer multiple of bytesPerFrame.

Parameters:

base – LPSPI peripheral address.
transfer – pointer to lpspi_transfer_t structure.

Returns:

status of status_t.

status_t LPSPI_MasterTransferNonBlocking(LPSPI_Type *base, lpspi_master_handle_t *handle, lpspi_transfer_t *transfer)

LPSPI master transfer data using an interrupt method.

This function transfers data using an interrupt method. This is a non-blocking function, which returns right away. When all data is transferred, the callback function is called.

Note: The transfer data size should be integer multiples of bytesPerFrame if bytesPerFrame is less than or equal to 4. For bytesPerFrame greater than 4: The transfer data size should be equal to bytesPerFrame if the bytesPerFrame is not integer multiples of 4. Otherwise, the transfer data size can be an integer multiple of bytesPerFrame.

Parameters:

base – LPSPI peripheral address.
handle – pointer to lpspi_master_handle_t structure which stores the transfer state.
transfer – pointer to lpspi_transfer_t structure.

Returns:

status of status_t.

status_t LPSPI_MasterTransferGetCount(LPSPI_Type *base, lpspi_master_handle_t *handle, size_t *count)

Gets the master transfer remaining bytes.

This function gets the master transfer remaining bytes.

Parameters:

base – LPSPI peripheral address.
handle – pointer to lpspi_master_handle_t structure which stores the transfer state.
count – Number of bytes transferred so far by the non-blocking transaction.

Returns:

status of status_t.

void LPSPI_MasterTransferAbort(LPSPI_Type *base, lpspi_master_handle_t *handle)

LPSPI master abort transfer which uses an interrupt method.

This function aborts a transfer which uses an interrupt method.

Parameters:

base – LPSPI peripheral address.
handle – pointer to lpspi_master_handle_t structure which stores the transfer state.

void LPSPI_MasterTransferHandleIRQ(LPSPI_Type *base, lpspi_master_handle_t *handle)

LPSPI Master IRQ handler function.

This function processes the LPSPI transmit and receive IRQ.

Parameters:

base – LPSPI peripheral address.
handle – pointer to lpspi_master_handle_t structure which stores the transfer state.

void LPSPI_SlaveTransferCreateHandle(LPSPI_Type *base, lpspi_slave_handle_t *handle, lpspi_slave_transfer_callback_t callback, void *userData)

Initializes the LPSPI slave handle.

This function initializes the LPSPI handle, which can be used for other LPSPI transactional APIs. Usually, for a specified LPSPI instance, call this API once to get the initialized handle.

Parameters:

base – LPSPI peripheral address.
handle – LPSPI handle pointer to lpspi_slave_handle_t.
callback – DSPI callback.
userData – callback function parameter.

status_t LPSPI_SlaveTransferNonBlocking(LPSPI_Type *base, lpspi_slave_handle_t *handle, lpspi_transfer_t *transfer)

LPSPI slave transfer data using an interrupt method.

This function transfer data using an interrupt method. This is a non-blocking function, which returns right away. When all data is transferred, the callback function is called.

Note: The transfer data size should be integer multiples of bytesPerFrame if bytesPerFrame is less than or equal to 4. For bytesPerFrame greater than 4: The transfer data size should be equal to bytesPerFrame if the bytesPerFrame is not an integer multiple of 4. Otherwise, the transfer data size can be an integer multiple of bytesPerFrame.

Parameters:

base – LPSPI peripheral address.
handle – pointer to lpspi_slave_handle_t structure which stores the transfer state.
transfer – pointer to lpspi_transfer_t structure.

Returns:

status of status_t.

status_t LPSPI_SlaveTransferGetCount(LPSPI_Type *base, lpspi_slave_handle_t *handle, size_t *count)

Gets the slave transfer remaining bytes.

This function gets the slave transfer remaining bytes.

Parameters:

base – LPSPI peripheral address.
handle – pointer to lpspi_slave_handle_t structure which stores the transfer state.
count – Number of bytes transferred so far by the non-blocking transaction.

Returns:

status of status_t.

void LPSPI_SlaveTransferAbort(LPSPI_Type *base, lpspi_slave_handle_t *handle)

LPSPI slave aborts a transfer which uses an interrupt method.

This function aborts a transfer which uses an interrupt method.

Parameters:

base – LPSPI peripheral address.
handle – pointer to lpspi_slave_handle_t structure which stores the transfer state.

void LPSPI_SlaveTransferHandleIRQ(LPSPI_Type *base, lpspi_slave_handle_t *handle)

LPSPI Slave IRQ handler function.

This function processes the LPSPI transmit and receives an IRQ.

Parameters:

base – LPSPI peripheral address.
handle – pointer to lpspi_slave_handle_t structure which stores the transfer state.

bool LPSPI_WaitTxFifoEmpty(LPSPI_Type *base)

Wait for tx FIFO to be empty.

This function wait the tx fifo empty

Parameters:

base – LPSPI peripheral address.

Returns:

true for the tx FIFO is ready, false is not.

void LPSPI_DriverIRQHandler(uint32_t instance)

LPSPI driver IRQ handler common entry.

This function provides the common IRQ request entry for LPSPI.

Parameters:

instance – LPSPI instance.

FSL_LPSPI_DRIVER_VERSION: LPSPI driver version.

Status for the LPSPI driver.

Values:

enumerator kStatus_LPSPI_Busy: LPSPI transfer is busy.

enumerator kStatus_LPSPI_Error: LPSPI driver error.

enumerator kStatus_LPSPI_Idle: LPSPI is idle.

enumerator kStatus_LPSPI_OutOfRange: LPSPI transfer out Of range.

enumerator kStatus_LPSPI_Timeout: LPSPI timeout polling status flags.

enum _lpspi_flags

LPSPI status flags in SPIx_SR register.

Values:

enumerator kLPSPI_TxDataRequestFlag: Transmit data flag

enumerator kLPSPI_RxDataReadyFlag: Receive data flag

enumerator kLPSPI_WordCompleteFlag: Word Complete flag

enumerator kLPSPI_FrameCompleteFlag: Frame Complete flag

enumerator kLPSPI_TransferCompleteFlag: Transfer Complete flag

enumerator kLPSPI_TransmitErrorFlag: Transmit Error flag (FIFO underrun)

enumerator kLPSPI_ReceiveErrorFlag: Receive Error flag (FIFO overrun)

enumerator kLPSPI_DataMatchFlag: Data Match flag

enumerator kLPSPI_ModuleBusyFlag: Module Busy flag

enumerator kLPSPI_AllStatusFlag: Used for clearing all w1c status flags

enum _lpspi_interrupt_enable

LPSPI interrupt source.

Values:

enumerator kLPSPI_TxInterruptEnable: Transmit data interrupt enable

enumerator kLPSPI_RxInterruptEnable: Receive data interrupt enable

enumerator kLPSPI_WordCompleteInterruptEnable: Word complete interrupt enable

enumerator kLPSPI_FrameCompleteInterruptEnable: Frame complete interrupt enable

enumerator kLPSPI_TransferCompleteInterruptEnable: Transfer complete interrupt enable

enumerator kLPSPI_TransmitErrorInterruptEnable: Transmit error interrupt enable(FIFO underrun)

enumerator kLPSPI_ReceiveErrorInterruptEnable: Receive Error interrupt enable (FIFO overrun)

enumerator kLPSPI_DataMatchInterruptEnable: Data Match interrupt enable

enumerator kLPSPI_AllInterruptEnable: All above interrupts enable.

enum _lpspi_dma_enable

LPSPI DMA source.

Values:

enumerator kLPSPI_TxDmaEnable: Transmit data DMA enable

enumerator kLPSPI_RxDmaEnable: Receive data DMA enable

enum _lpspi_master_slave_mode

LPSPI master or slave mode configuration.

Values:

enumerator kLPSPI_Master: LPSPI peripheral operates in master mode.

enumerator kLPSPI_Slave: LPSPI peripheral operates in slave mode.

enum _lpspi_which_pcs_config

LPSPI Peripheral Chip Select (PCS) configuration (which PCS to configure).

Values:

enumerator kLPSPI_Pcs0: PCS[0]

enumerator kLPSPI_Pcs1: PCS[1]

enumerator kLPSPI_Pcs2: PCS[2]

enumerator kLPSPI_Pcs3: PCS[3]

enum _lpspi_pcs_polarity_config

LPSPI Peripheral Chip Select (PCS) Polarity configuration.

Values:

enumerator kLPSPI_PcsActiveHigh: PCS Active High (idles low)

enumerator kLPSPI_PcsActiveLow: PCS Active Low (idles high)

enum _lpspi_pcs_polarity

LPSPI Peripheral Chip Select (PCS) Polarity.

Values:

enumerator kLPSPI_Pcs0ActiveLow: Pcs0 Active Low (idles high).

enumerator kLPSPI_Pcs1ActiveLow: Pcs1 Active Low (idles high).

enumerator kLPSPI_Pcs2ActiveLow: Pcs2 Active Low (idles high).

enumerator kLPSPI_Pcs3ActiveLow: Pcs3 Active Low (idles high).

enumerator kLPSPI_PcsAllActiveLow: Pcs0 to Pcs5 Active Low (idles high).

enum _lpspi_clock_polarity

LPSPI clock polarity configuration.

Values:

enumerator kLPSPI_ClockPolarityActiveHigh: CPOL=0. Active-high LPSPI clock (idles low)

enumerator kLPSPI_ClockPolarityActiveLow: CPOL=1. Active-low LPSPI clock (idles high)

enum _lpspi_clock_phase

LPSPI clock phase configuration.

Values:

enumerator kLPSPI_ClockPhaseFirstEdge: CPHA=0. Data is captured on the leading edge of the SCK and changed on the following edge.

enumerator kLPSPI_ClockPhaseSecondEdge: CPHA=1. Data is changed on the leading edge of the SCK and captured on the following edge.

enum _lpspi_shift_direction

LPSPI data shifter direction options.

Values:

enumerator kLPSPI_MsbFirst: Data transfers start with most significant bit.

enumerator kLPSPI_LsbFirst: Data transfers start with least significant bit.

enum _lpspi_host_request_select

LPSPI Host Request select configuration.

Values:

enumerator kLPSPI_HostReqExtPin: Host Request is an ext pin.

enumerator kLPSPI_HostReqInternalTrigger: Host Request is an internal trigger.

enum _lpspi_match_config

LPSPI Match configuration options.

Values:

enumerator kLPSI_MatchDisabled: LPSPI Match Disabled.

enumerator kLPSI_1stWordEqualsM0orM1: LPSPI Match Enabled.

enumerator kLPSI_AnyWordEqualsM0orM1: LPSPI Match Enabled.

enumerator kLPSI_1stWordEqualsM0and2ndWordEqualsM1: LPSPI Match Enabled.

enumerator kLPSI_AnyWordEqualsM0andNxtWordEqualsM1: LPSPI Match Enabled.

enumerator kLPSI_1stWordAndM1EqualsM0andM1: LPSPI Match Enabled.

enumerator kLPSI_AnyWordAndM1EqualsM0andM1: LPSPI Match Enabled.

enum _lpspi_pin_config

LPSPI pin (SDO and SDI) configuration.

Values:

enumerator kLPSPI_SdiInSdoOut: LPSPI SDI input, SDO output.

enumerator kLPSPI_SdiInSdiOut: LPSPI SDI input, SDI output.

enumerator kLPSPI_SdoInSdoOut: LPSPI SDO input, SDO output.

enumerator kLPSPI_SdoInSdiOut: LPSPI SDO input, SDI output.

enum _lpspi_data_out_config

LPSPI data output configuration.

Values:

enumerator kLpspiDataOutRetained: Data out retains last value when chip select is de-asserted

enumerator kLpspiDataOutTristate: Data out is tristated when chip select is de-asserted

enum _lpspi_transfer_width

LPSPI transfer width configuration.

Values:

enumerator kLPSPI_SingleBitXfer: 1-bit shift at a time, data out on SDO, in on SDI (normal mode)

enumerator kLPSPI_TwoBitXfer: 2-bits shift out on SDO/SDI and in on SDO/SDI

enumerator kLPSPI_FourBitXfer: 4-bits shift out on SDO/SDI/PCS[3:2] and in on SDO/SDI/PCS[3:2]

enum _lpspi_delay_type

LPSPI delay type selection.

Values:

enumerator kLPSPI_PcsToSck: PCS-to-SCK delay.

enumerator kLPSPI_LastSckToPcs: Last SCK edge to PCS delay.

enumerator kLPSPI_BetweenTransfer: Delay between transfers.

enum _lpspi_transfer_config_flag_for_master

Use this enumeration for LPSPI master transfer configFlags.

Values:

enumerator kLPSPI_MasterPcs0: LPSPI master PCS shift macro , internal used. LPSPI master transfer use PCS0 signal

enumerator kLPSPI_MasterPcs1: LPSPI master PCS shift macro , internal used. LPSPI master transfer use PCS1 signal

enumerator kLPSPI_MasterPcs2: LPSPI master PCS shift macro , internal used. LPSPI master transfer use PCS2 signal

enumerator kLPSPI_MasterPcs3: LPSPI master PCS shift macro , internal used. LPSPI master transfer use PCS3 signal

enumerator kLPSPI_MasterPcsContinuous: Is PCS signal continuous

enumerator kLPSPI_MasterByteSwap

Is master swap the byte. For example, when want to send data 1 2 3 4 5 6 7 8 (suppose you set lpspi_shift_direction_t to MSB).

If you set bitPerFrame = 8 , no matter the kLPSPI_MasterByteSwapyou flag is used or not, the waveform is 1 2 3 4 5 6 7 8.
If you set bitPerFrame = 16 : (1) the waveform is 2 1 4 3 6 5 8 7 if you do not use the kLPSPI_MasterByteSwap flag. (2) the waveform is 1 2 3 4 5 6 7 8 if you use the kLPSPI_MasterByteSwap flag.
If you set bitPerFrame = 32 : (1) the waveform is 4 3 2 1 8 7 6 5 if you do not use the kLPSPI_MasterByteSwap flag. (2) the waveform is 1 2 3 4 5 6 7 8 if you use the kLPSPI_MasterByteSwap flag.

enum _lpspi_transfer_config_flag_for_slave

Use this enumeration for LPSPI slave transfer configFlags.

Values:

enumerator kLPSPI_SlavePcs0: LPSPI slave PCS shift macro , internal used. LPSPI slave transfer use PCS0 signal

enumerator kLPSPI_SlavePcs1: LPSPI slave PCS shift macro , internal used. LPSPI slave transfer use PCS1 signal

enumerator kLPSPI_SlavePcs2: LPSPI slave PCS shift macro , internal used. LPSPI slave transfer use PCS2 signal

enumerator kLPSPI_SlavePcs3: LPSPI slave PCS shift macro , internal used. LPSPI slave transfer use PCS3 signal

enumerator kLPSPI_SlaveByteSwap

Is slave swap the byte. For example, when want to send data 1 2 3 4 5 6 7 8 (suppose you set lpspi_shift_direction_t to MSB).

If you set bitPerFrame = 8 , no matter the kLPSPI_SlaveByteSwap flag is used or not, the waveform is 1 2 3 4 5 6 7 8.
If you set bitPerFrame = 16 : (1) the waveform is 2 1 4 3 6 5 8 7 if you do not use the kLPSPI_SlaveByteSwap flag. (2) the waveform is 1 2 3 4 5 6 7 8 if you use the kLPSPI_SlaveByteSwap flag.
If you set bitPerFrame = 32 : (1) the waveform is 4 3 2 1 8 7 6 5 if you do not use the kLPSPI_SlaveByteSwap flag. (2) the waveform is 1 2 3 4 5 6 7 8 if you use the kLPSPI_SlaveByteSwap flag.

enum _lpspi_transfer_state

LPSPI transfer state, which is used for LPSPI transactional API state machine.

Values:

enumerator kLPSPI_Idle: Nothing in the transmitter/receiver.

enumerator kLPSPI_Busy: Transfer queue is not finished.

enumerator kLPSPI_Error: Transfer error.

typedef enum _lpspi_master_slave_mode lpspi_master_slave_mode_t: LPSPI master or slave mode configuration.

typedef enum _lpspi_which_pcs_config lpspi_which_pcs_t: LPSPI Peripheral Chip Select (PCS) configuration (which PCS to configure).

typedef enum _lpspi_pcs_polarity_config lpspi_pcs_polarity_config_t: LPSPI Peripheral Chip Select (PCS) Polarity configuration.

typedef enum _lpspi_clock_polarity lpspi_clock_polarity_t: LPSPI clock polarity configuration.

typedef enum _lpspi_clock_phase lpspi_clock_phase_t: LPSPI clock phase configuration.

typedef enum _lpspi_shift_direction lpspi_shift_direction_t: LPSPI data shifter direction options.

typedef enum _lpspi_host_request_select lpspi_host_request_select_t: LPSPI Host Request select configuration.

typedef enum _lpspi_match_config lpspi_match_config_t: LPSPI Match configuration options.

typedef enum _lpspi_pin_config lpspi_pin_config_t: LPSPI pin (SDO and SDI) configuration.

typedef enum _lpspi_data_out_config lpspi_data_out_config_t: LPSPI data output configuration.

typedef enum _lpspi_transfer_width lpspi_transfer_width_t: LPSPI transfer width configuration.

typedef enum _lpspi_delay_type lpspi_delay_type_t: LPSPI delay type selection.

typedef struct _lpspi_master_config lpspi_master_config_t: LPSPI master configuration structure.

typedef struct _lpspi_slave_config lpspi_slave_config_t: LPSPI slave configuration structure.

typedef struct _lpspi_master_handle lpspi_master_handle_t: Forward declaration of the _lpspi_master_handle typedefs.

typedef struct _lpspi_slave_handle lpspi_slave_handle_t: Forward declaration of the _lpspi_slave_handle typedefs.

typedef void (*lpspi_master_transfer_callback_t)(LPSPI_Type *base, lpspi_master_handle_t *handle, status_t status, void *userData)

Master completion callback function pointer type.

Param base:: LPSPI peripheral address.
Param handle:: Pointer to the handle for the LPSPI master.
Param status:: Success or error code describing whether the transfer is completed.
Param userData:: Arbitrary pointer-dataSized value passed from the application.

typedef void (*lpspi_slave_transfer_callback_t)(LPSPI_Type *base, lpspi_slave_handle_t *handle, status_t status, void *userData)

Slave completion callback function pointer type.

Param base:: LPSPI peripheral address.
Param handle:: Pointer to the handle for the LPSPI slave.
Param status:: Success or error code describing whether the transfer is completed.
Param userData:: Arbitrary pointer-dataSized value passed from the application.

typedef struct _lpspi_transfer lpspi_transfer_t: LPSPI master/slave transfer structure.

volatile uint8_t g_lpspiDummyData[]: Global variable for dummy data value setting.

LPSPI_DUMMY_DATA

LPSPI dummy data if no Tx data.

Dummy data used for tx if there is not txData.

SPI_RETRY_TIMES: Retry times for waiting flag.

LPSPI_MASTER_PCS_SHIFT: LPSPI master PCS shift macro , internal used.

LPSPI_MASTER_PCS_MASK: LPSPI master PCS shift macro , internal used.

LPSPI_SLAVE_PCS_SHIFT: LPSPI slave PCS shift macro , internal used.

LPSPI_SLAVE_PCS_MASK: LPSPI slave PCS shift macro , internal used.

struct _lpspi_master_config

#include <fsl_lpspi.h>

LPSPI master configuration structure.

Public Members

uint32_t baudRate: Baud Rate for LPSPI.

uint32_t bitsPerFrame: Bits per frame, minimum 8, maximum 4096.

lpspi_clock_polarity_t cpol: Clock polarity.

lpspi_clock_phase_t cpha: Clock phase.

lpspi_shift_direction_t direction: MSB or LSB data shift direction.

uint32_t pcsToSckDelayInNanoSec: PCS to SCK delay time in nanoseconds, setting to 0 sets the minimum delay. It sets the boundary value if out of range.

uint32_t lastSckToPcsDelayInNanoSec: Last SCK to PCS delay time in nanoseconds, setting to 0 sets the minimum delay. It sets the boundary value if out of range.

uint32_t betweenTransferDelayInNanoSec: After the SCK delay time with nanoseconds, setting to 0 sets the minimum delay. It sets the boundary value if out of range.

lpspi_which_pcs_t whichPcs: Desired Peripheral Chip Select (PCS).

lpspi_pcs_polarity_config_t pcsActiveHighOrLow: Desired PCS active high or low

lpspi_pin_config_t pinCfg: Configures which pins are used for input and output data during single bit transfers.

lpspi_data_out_config_t dataOutConfig: Configures if the output data is tristated between accesses (LPSPI_PCS is negated).

bool enableInputDelay: Enable master to sample the input data on a delayed SCK. This can help improve slave setup time. Refer to device data sheet for specific time length.

struct _lpspi_slave_config

#include <fsl_lpspi.h>

LPSPI slave configuration structure.

Public Members

uint32_t bitsPerFrame: Bits per frame, minimum 8, maximum 4096.

lpspi_clock_polarity_t cpol: Clock polarity.

lpspi_clock_phase_t cpha: Clock phase.

lpspi_shift_direction_t direction: MSB or LSB data shift direction.

lpspi_which_pcs_t whichPcs: Desired Peripheral Chip Select (pcs)

lpspi_pcs_polarity_config_t pcsActiveHighOrLow: Desired PCS active high or low

lpspi_pin_config_t pinCfg: Configures which pins are used for input and output data during single bit transfers.

lpspi_data_out_config_t dataOutConfig: Configures if the output data is tristated between accesses (LPSPI_PCS is negated).

struct _lpspi_transfer

#include <fsl_lpspi.h>

LPSPI master/slave transfer structure.

Public Members

const uint8_t *txData: Send buffer.

uint8_t *rxData: Receive buffer.

volatile size_t dataSize: Transfer bytes.

uint32_t configFlags: Transfer transfer configuration flags. Set from _lpspi_transfer_config_flag_for_master if the transfer is used for master or _lpspi_transfer_config_flag_for_slave enumeration if the transfer is used for slave.

struct _lpspi_master_handle

#include <fsl_lpspi.h>

LPSPI master transfer handle structure used for transactional API.

Public Members

volatile bool isPcsContinuous: Is PCS continuous in transfer.

volatile bool writeTcrInIsr: A flag that whether should write TCR in ISR.

volatile bool isByteSwap: A flag that whether should byte swap.

volatile bool isTxMask: A flag that whether TCR[TXMSK] is set.

volatile uint16_t bytesPerFrame: Number of bytes in each frame

volatile uint16_t frameSize: Backup of TCR[FRAMESZ]

volatile uint8_t fifoSize: FIFO dataSize.

volatile uint8_t rxWatermark: Rx watermark.

volatile uint8_t bytesEachWrite: Bytes for each write TDR.

volatile uint8_t bytesEachRead: Bytes for each read RDR.

const uint8_t *volatile txData: Send buffer.

uint8_t *volatile rxData: Receive buffer.

volatile size_t txRemainingByteCount: Number of bytes remaining to send.

volatile size_t rxRemainingByteCount: Number of bytes remaining to receive.

volatile uint32_t writeRegRemainingTimes: Write TDR register remaining times.

volatile uint32_t readRegRemainingTimes: Read RDR register remaining times.

uint32_t totalByteCount: Number of transfer bytes

uint32_t txBuffIfNull: Used if the txData is NULL.

volatile uint8_t state: LPSPI transfer state , _lpspi_transfer_state.

lpspi_master_transfer_callback_t callback: Completion callback.

void *userData: Callback user data.

struct _lpspi_slave_handle

#include <fsl_lpspi.h>

LPSPI slave transfer handle structure used for transactional API.

Public Members

volatile bool isByteSwap: A flag that whether should byte swap.

volatile uint8_t fifoSize: FIFO dataSize.

volatile uint8_t rxWatermark: Rx watermark.

volatile uint8_t bytesEachWrite: Bytes for each write TDR.

volatile uint8_t bytesEachRead: Bytes for each read RDR.

const uint8_t *volatile txData: Send buffer.

uint8_t *volatile rxData: Receive buffer.

volatile size_t txRemainingByteCount: Number of bytes remaining to send.

volatile size_t rxRemainingByteCount: Number of bytes remaining to receive.

volatile uint32_t writeRegRemainingTimes: Write TDR register remaining times.

volatile uint32_t readRegRemainingTimes: Read RDR register remaining times.

uint32_t totalByteCount: Number of transfer bytes

volatile uint8_t state: LPSPI transfer state , _lpspi_transfer_state.

volatile uint32_t errorCount: Error count for slave transfer.

lpspi_slave_transfer_callback_t callback: Completion callback.

void *userData: Callback user data.

LPSPI eDMA Driver

FSL_LPSPI_EDMA_DRIVER_VERSION: LPSPI EDMA driver version.

DMA_MAX_TRANSFER_COUNT: DMA max transfer size.

typedef struct _lpspi_master_edma_handle lpspi_master_edma_handle_t: Forward declaration of the _lpspi_master_edma_handle typedefs.

typedef struct _lpspi_slave_edma_handle lpspi_slave_edma_handle_t: Forward declaration of the _lpspi_slave_edma_handle typedefs.

typedef void (*lpspi_master_edma_transfer_callback_t)(LPSPI_Type *base, lpspi_master_edma_handle_t *handle, status_t status, void *userData)

Completion callback function pointer type.

Param base:: LPSPI peripheral base address.
Param handle:: Pointer to the handle for the LPSPI master.
Param status:: Success or error code describing whether the transfer completed.
Param userData:: Arbitrary pointer-dataSized value passed from the application.

typedef void (*lpspi_slave_edma_transfer_callback_t)(LPSPI_Type *base, lpspi_slave_edma_handle_t *handle, status_t status, void *userData)

Completion callback function pointer type.

Param base:: LPSPI peripheral base address.
Param handle:: Pointer to the handle for the LPSPI slave.
Param status:: Success or error code describing whether the transfer completed.
Param userData:: Arbitrary pointer-dataSized value passed from the application.

void LPSPI_MasterTransferCreateHandleEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *handle, lpspi_master_edma_transfer_callback_t callback, void *userData, edma_handle_t *edmaRxRegToRxDataHandle, edma_handle_t *edmaTxDataToTxRegHandle)

Initializes the LPSPI master eDMA handle.

This function initializes the LPSPI eDMA handle which can be used for other LPSPI transactional APIs. Usually, for a specified LPSPI instance, call this API once to get the initialized handle.

Note that the LPSPI eDMA has a separated (Rx and Tx as two sources) or shared (Rx and Tx are the same source) DMA request source. (1) For a separated DMA request source, enable and set the Rx DMAMUX source for edmaRxRegToRxDataHandle and Tx DMAMUX source for edmaTxDataToTxRegHandle. (2) For a shared DMA request source, enable and set the Rx/Tx DMAMUX source for edmaRxRegToRxDataHandle.

Parameters:

base – LPSPI peripheral base address.
handle – LPSPI handle pointer to lpspi_master_edma_handle_t.
callback – LPSPI callback.
userData – callback function parameter.
edmaRxRegToRxDataHandle – edmaRxRegToRxDataHandle pointer to edma_handle_t.
edmaTxDataToTxRegHandle – edmaTxDataToTxRegHandle pointer to edma_handle_t.

status_t LPSPI_MasterTransferEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *handle, lpspi_transfer_t *transfer)

LPSPI master transfer data using eDMA.

This function transfers data using eDMA. This is a non-blocking function, which returns right away. When all data is transferred, the callback function is called.

Note: The transfer data size should be an integer multiple of bytesPerFrame if bytesPerFrame is less than or equal to 4. For bytesPerFrame greater than 4: The transfer data size should be equal to bytesPerFrame if the bytesPerFrame is not an integer multiple of 4. Otherwise, the transfer data size can be an integer multiple of bytesPerFrame.

Parameters:

base – LPSPI peripheral base address.
handle – pointer to lpspi_master_edma_handle_t structure which stores the transfer state.
transfer – pointer to lpspi_transfer_t structure.

Returns:

status of status_t.

status_t LPSPI_MasterTransferPrepareEDMALite(LPSPI_Type *base, lpspi_master_edma_handle_t *handle, uint32_t configFlags)

LPSPI master config transfer parameter while using eDMA.

This function is preparing to transfer data using eDMA, work with LPSPI_MasterTransferEDMALite.

Parameters:

base – LPSPI peripheral base address.
handle – pointer to lpspi_master_edma_handle_t structure which stores the transfer state.
configFlags – transfer configuration flags. _lpspi_transfer_config_flag_for_master.

Return values:

kStatus_Success – Execution successfully.
kStatus_LPSPI_Busy – The LPSPI device is busy.

Returns:

Indicates whether LPSPI master transfer was successful or not.

status_t LPSPI_MasterTransferEDMALite(LPSPI_Type *base, lpspi_master_edma_handle_t *handle, lpspi_transfer_t *transfer)

LPSPI master transfer data using eDMA without configs.

This function transfers data using eDMA. This is a non-blocking function, which returns right away. When all data is transferred, the callback function is called.

Note: This API is only for transfer through DMA without configuration. Before calling this API, you must call LPSPI_MasterTransferPrepareEDMALite to configure it once. The transfer data size should be an integer multiple of bytesPerFrame if bytesPerFrame is less than or equal to 4. For bytesPerFrame greater than 4: The transfer data size should be equal to bytesPerFrame if the bytesPerFrame is not an integer multiple of 4. Otherwise, the transfer data size can be an integer multiple of bytesPerFrame.

Parameters:

base – LPSPI peripheral base address.
handle – pointer to lpspi_master_edma_handle_t structure which stores the transfer state.
transfer – pointer to lpspi_transfer_t structure, config field is not uesed.

Return values:

kStatus_Success – Execution successfully.
kStatus_LPSPI_Busy – The LPSPI device is busy.
kStatus_InvalidArgument – The transfer structure is invalid.

Returns:

Indicates whether LPSPI master transfer was successful or not.

void LPSPI_MasterTransferAbortEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *handle)

LPSPI master aborts a transfer which is using eDMA.

This function aborts a transfer which is using eDMA.

Parameters:

base – LPSPI peripheral base address.
handle – pointer to lpspi_master_edma_handle_t structure which stores the transfer state.

status_t LPSPI_MasterTransferGetCountEDMA(LPSPI_Type *base, lpspi_master_edma_handle_t *handle, size_t *count)

Gets the master eDMA transfer remaining bytes.

This function gets the master eDMA transfer remaining bytes.

Parameters:

base – LPSPI peripheral base address.
handle – pointer to lpspi_master_edma_handle_t structure which stores the transfer state.
count – Number of bytes transferred so far by the EDMA transaction.

Returns:

status of status_t.

void LPSPI_SlaveTransferCreateHandleEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *handle, lpspi_slave_edma_transfer_callback_t callback, void *userData, edma_handle_t *edmaRxRegToRxDataHandle, edma_handle_t *edmaTxDataToTxRegHandle)

Initializes the LPSPI slave eDMA handle.

This function initializes the LPSPI eDMA handle which can be used for other LPSPI transactional APIs. Usually, for a specified LPSPI instance, call this API once to get the initialized handle.

Note that LPSPI eDMA has a separated (Rx and Tx as two sources) or shared (Rx and Tx as the same source) DMA request source.

(1) For a separated DMA request source, enable and set the Rx DMAMUX source for edmaRxRegToRxDataHandle and Tx DMAMUX source for edmaTxDataToTxRegHandle. (2) For a shared DMA request source, enable and set the Rx/Rx DMAMUX source for edmaRxRegToRxDataHandle .

Parameters:

base – LPSPI peripheral base address.
handle – LPSPI handle pointer to lpspi_slave_edma_handle_t.
callback – LPSPI callback.
userData – callback function parameter.
edmaRxRegToRxDataHandle – edmaRxRegToRxDataHandle pointer to edma_handle_t.
edmaTxDataToTxRegHandle – edmaTxDataToTxRegHandle pointer to edma_handle_t.

status_t LPSPI_SlaveTransferEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *handle, lpspi_transfer_t *transfer)

LPSPI slave transfers data using eDMA.

This function transfers data using eDMA. This is a non-blocking function, which return right away. When all data is transferred, the callback function is called.

Note: The transfer data size should be an integer multiple of bytesPerFrame if bytesPerFrame is less than or equal to 4. For bytesPerFrame greater than 4: The transfer data size should be equal to bytesPerFrame if the bytesPerFrame is not an integer multiple of 4. Otherwise, the transfer data size can be an integer multiple of bytesPerFrame.

Parameters:

base – LPSPI peripheral base address.
handle – pointer to lpspi_slave_edma_handle_t structure which stores the transfer state.
transfer – pointer to lpspi_transfer_t structure.

Returns:

status of status_t.

void LPSPI_SlaveTransferAbortEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *handle)

LPSPI slave aborts a transfer which is using eDMA.

This function aborts a transfer which is using eDMA.

Parameters:

base – LPSPI peripheral base address.
handle – pointer to lpspi_slave_edma_handle_t structure which stores the transfer state.

status_t LPSPI_SlaveTransferGetCountEDMA(LPSPI_Type *base, lpspi_slave_edma_handle_t *handle, size_t *count)

Gets the slave eDMA transfer remaining bytes.

This function gets the slave eDMA transfer remaining bytes.

Parameters:

base – LPSPI peripheral base address.
handle – pointer to lpspi_slave_edma_handle_t structure which stores the transfer state.
count – Number of bytes transferred so far by the eDMA transaction.

Returns:

status of status_t.

struct _lpspi_master_edma_handle

#include <fsl_lpspi_edma.h>

LPSPI master eDMA transfer handle structure used for transactional API.

Public Members

volatile bool isPcsContinuous: Is PCS continuous in transfer.

volatile bool isByteSwap: A flag that whether should byte swap.

volatile uint8_t fifoSize: FIFO dataSize.

volatile uint8_t rxWatermark: Rx watermark.

volatile uint8_t bytesEachWrite: Bytes for each write TDR.

volatile uint8_t bytesEachRead: Bytes for each read RDR.

volatile uint8_t bytesLastRead: Bytes for last read RDR.

volatile bool isThereExtraRxBytes: Is there extra RX byte.

const uint8_t *volatile txData: Send buffer.

uint8_t *volatile rxData: Receive buffer.

volatile size_t txRemainingByteCount: Number of bytes remaining to send.

volatile size_t rxRemainingByteCount: Number of bytes remaining to receive.

volatile uint32_t writeRegRemainingTimes: Write TDR register remaining times.

volatile uint32_t readRegRemainingTimes: Read RDR register remaining times.

uint32_t totalByteCount: Number of transfer bytes

edma_tcd_t *lastTimeTCD: Pointer to the lastTime TCD

bool isMultiDMATransmit: Is there multi DMA transmit

volatile uint8_t dmaTransmitTime: DMA Transfer times.

uint32_t lastTimeDataBytes: DMA transmit last Time data Bytes

uint32_t dataBytesEveryTime: Bytes in a time for DMA transfer, default is DMA_MAX_TRANSFER_COUNT

edma_transfer_config_t transferConfigRx: Config of DMA rx channel.

edma_transfer_config_t transferConfigTx: Config of DMA tx channel.

uint32_t txBuffIfNull: Used if there is not txData for DMA purpose.

uint32_t rxBuffIfNull: Used if there is not rxData for DMA purpose.

uint32_t transmitCommand: Used to write TCR for DMA purpose.

volatile uint8_t state: LPSPI transfer state , _lpspi_transfer_state.

uint8_t nbytes: eDMA minor byte transfer count initially configured.

lpspi_master_edma_transfer_callback_t callback: Completion callback.

void *userData: Callback user data.

edma_handle_t *edmaRxRegToRxDataHandle: edma_handle_t handle point used for RxReg to RxData buff

edma_handle_t *edmaTxDataToTxRegHandle: edma_handle_t handle point used for TxData to TxReg buff

edma_tcd_t lpspiSoftwareTCD[3]: SoftwareTCD, internal used

struct _lpspi_slave_edma_handle

#include <fsl_lpspi_edma.h>

LPSPI slave eDMA transfer handle structure used for transactional API.

Public Members

volatile bool isByteSwap: A flag that whether should byte swap.

volatile uint8_t fifoSize: FIFO dataSize.

volatile uint8_t rxWatermark: Rx watermark.

volatile uint8_t bytesEachWrite: Bytes for each write TDR.

volatile uint8_t bytesEachRead: Bytes for each read RDR.

volatile uint8_t bytesLastRead: Bytes for last read RDR.

volatile bool isThereExtraRxBytes: Is there extra RX byte.

uint8_t nbytes: eDMA minor byte transfer count initially configured.

const uint8_t *volatile txData: Send buffer.

uint8_t *volatile rxData: Receive buffer.

volatile size_t txRemainingByteCount: Number of bytes remaining to send.

volatile size_t rxRemainingByteCount: Number of bytes remaining to receive.

volatile uint32_t writeRegRemainingTimes: Write TDR register remaining times.

volatile uint32_t readRegRemainingTimes: Read RDR register remaining times.

uint32_t totalByteCount: Number of transfer bytes

uint32_t txBuffIfNull: Used if there is not txData for DMA purpose.

uint32_t rxBuffIfNull: Used if there is not rxData for DMA purpose.

volatile uint8_t state: LPSPI transfer state.

uint32_t errorCount: Error count for slave transfer.

lpspi_slave_edma_transfer_callback_t callback: Completion callback.

void *userData: Callback user data.

edma_handle_t *edmaRxRegToRxDataHandle: edma_handle_t handle point used for RxReg to RxData buff

edma_handle_t *edmaTxDataToTxRegHandle: edma_handle_t handle point used for TxData to TxReg

edma_tcd_t lpspiSoftwareTCD[2]: SoftwareTCD, internal used

LPTMR: Low-Power Timer

void LPTMR_Init(LPTMR_Type *base, const lptmr_config_t *config)

Ungates the LPTMR clock and configures the peripheral for a basic operation.

Note

This API should be called at the beginning of the application using the LPTMR driver.

Parameters:

base – LPTMR peripheral base address
config – A pointer to the LPTMR configuration structure.

void LPTMR_Deinit(LPTMR_Type *base)

Gates the LPTMR clock.

Parameters:

base – LPTMR peripheral base address

void LPTMR_GetDefaultConfig(lptmr_config_t *config)

Fills in the LPTMR configuration structure with default settings.

The default values are as follows.

config->timerMode = kLPTMR_TimerModeTimeCounter;
config->pinSelect = kLPTMR_PinSelectInput_0;
config->pinPolarity = kLPTMR_PinPolarityActiveHigh;
config->enableFreeRunning = false;
config->bypassPrescaler = true;
config->prescalerClockSource = kLPTMR_PrescalerClock_1;
config->value = kLPTMR_Prescale_Glitch_0;

Parameters:

config – A pointer to the LPTMR configuration structure.

static inline void LPTMR_EnableInterrupts(LPTMR_Type *base, uint32_t mask)

Enables the selected LPTMR interrupts.

Parameters:

base – LPTMR peripheral base address
mask – The interrupts to enable. This is a logical OR of members of the enumeration lptmr_interrupt_enable_t

static inline void LPTMR_DisableInterrupts(LPTMR_Type *base, uint32_t mask)

Disables the selected LPTMR interrupts.

Parameters:

base – LPTMR peripheral base address
mask – The interrupts to disable. This is a logical OR of members of the enumeration lptmr_interrupt_enable_t.

static inline uint32_t LPTMR_GetEnabledInterrupts(LPTMR_Type *base)

Gets the enabled LPTMR interrupts.

Parameters:

base – LPTMR peripheral base address

Returns:

The enabled interrupts. This is the logical OR of members of the enumeration lptmr_interrupt_enable_t

static inline uint32_t LPTMR_GetStatusFlags(LPTMR_Type *base)

Gets the LPTMR status flags.

Parameters:

base – LPTMR peripheral base address

Returns:

The status flags. This is the logical OR of members of the enumeration lptmr_status_flags_t

static inline void LPTMR_ClearStatusFlags(LPTMR_Type *base, uint32_t mask)

Clears the LPTMR status flags.

Parameters:

base – LPTMR peripheral base address
mask – The status flags to clear. This is a logical OR of members of the enumeration lptmr_status_flags_t.

static inline void LPTMR_SetTimerPeriod(LPTMR_Type *base, uint32_t ticks)

Sets the timer period in units of count.

Timers counts from 0 until it equals the count value set here. The count value is written to the CMR register.

Note

The TCF flag is set with the CNR equals the count provided here and then increments.
Call the utility macros provided in the fsl_common.h to convert to ticks.

Parameters:

base – LPTMR peripheral base address
ticks – A timer period in units of ticks, which should be equal or greater than 1.

static inline uint32_t LPTMR_GetCurrentTimerCount(LPTMR_Type *base)

Reads the current timer counting value.

This function returns the real-time timer counting value in a range from 0 to a timer period.

Note

Call the utility macros provided in the fsl_common.h to convert ticks to usec or msec.

Parameters:

base – LPTMR peripheral base address

Returns:

The current counter value in ticks

static inline void LPTMR_StartTimer(LPTMR_Type *base)

Starts the timer.

After calling this function, the timer counts up to the CMR register value. Each time the timer reaches the CMR value and then increments, it generates a trigger pulse and sets the timeout interrupt flag. An interrupt is also triggered if the timer interrupt is enabled.

Parameters:

base – LPTMR peripheral base address

static inline void LPTMR_StopTimer(LPTMR_Type *base)

Stops the timer.

This function stops the timer and resets the timer’s counter register.

Parameters:

base – LPTMR peripheral base address

FSL_LPTMR_DRIVER_VERSION: Driver Version

enum _lptmr_pin_select

LPTMR pin selection used in pulse counter mode.

Values:

enumerator kLPTMR_PinSelectInput_0: Pulse counter input 0 is selected

enumerator kLPTMR_PinSelectInput_1: Pulse counter input 1 is selected

enumerator kLPTMR_PinSelectInput_2: Pulse counter input 2 is selected

enumerator kLPTMR_PinSelectInput_3: Pulse counter input 3 is selected

enum _lptmr_pin_polarity

LPTMR pin polarity used in pulse counter mode.

Values:

enumerator kLPTMR_PinPolarityActiveHigh: Pulse Counter input source is active-high

enumerator kLPTMR_PinPolarityActiveLow: Pulse Counter input source is active-low

enum _lptmr_timer_mode

LPTMR timer mode selection.

Values:

enumerator kLPTMR_TimerModeTimeCounter: Time Counter mode

enumerator kLPTMR_TimerModePulseCounter: Pulse Counter mode

enum _lptmr_prescaler_glitch_value

LPTMR prescaler/glitch filter values.

Values:

enumerator kLPTMR_Prescale_Glitch_0: Prescaler divide 2, glitch filter does not support this setting

enumerator kLPTMR_Prescale_Glitch_1: Prescaler divide 4, glitch filter 2

enumerator kLPTMR_Prescale_Glitch_2: Prescaler divide 8, glitch filter 4

enumerator kLPTMR_Prescale_Glitch_3: Prescaler divide 16, glitch filter 8

enumerator kLPTMR_Prescale_Glitch_4: Prescaler divide 32, glitch filter 16

enumerator kLPTMR_Prescale_Glitch_5: Prescaler divide 64, glitch filter 32

enumerator kLPTMR_Prescale_Glitch_6: Prescaler divide 128, glitch filter 64

enumerator kLPTMR_Prescale_Glitch_7: Prescaler divide 256, glitch filter 128

enumerator kLPTMR_Prescale_Glitch_8: Prescaler divide 512, glitch filter 256

enumerator kLPTMR_Prescale_Glitch_9: Prescaler divide 1024, glitch filter 512

enumerator kLPTMR_Prescale_Glitch_10: Prescaler divide 2048 glitch filter 1024

enumerator kLPTMR_Prescale_Glitch_11: Prescaler divide 4096, glitch filter 2048

enumerator kLPTMR_Prescale_Glitch_12: Prescaler divide 8192, glitch filter 4096

enumerator kLPTMR_Prescale_Glitch_13: Prescaler divide 16384, glitch filter 8192

enumerator kLPTMR_Prescale_Glitch_14: Prescaler divide 32768, glitch filter 16384

enumerator kLPTMR_Prescale_Glitch_15: Prescaler divide 65536, glitch filter 32768

enum _lptmr_prescaler_clock_select

LPTMR prescaler/glitch filter clock select.

Note

Clock connections are SoC-specific

Values:

enum _lptmr_interrupt_enable

List of the LPTMR interrupts.

Values:

enumerator kLPTMR_TimerInterruptEnable: Timer interrupt enable

enum _lptmr_status_flags

List of the LPTMR status flags.

Values:

enumerator kLPTMR_TimerCompareFlag: Timer compare flag

typedef enum _lptmr_pin_select lptmr_pin_select_t: LPTMR pin selection used in pulse counter mode.

typedef enum _lptmr_pin_polarity lptmr_pin_polarity_t: LPTMR pin polarity used in pulse counter mode.

typedef enum _lptmr_timer_mode lptmr_timer_mode_t: LPTMR timer mode selection.

typedef enum _lptmr_prescaler_glitch_value lptmr_prescaler_glitch_value_t: LPTMR prescaler/glitch filter values.

typedef enum _lptmr_prescaler_clock_select lptmr_prescaler_clock_select_t: LPTMR prescaler/glitch filter clock select.

Note

Clock connections are SoC-specific

typedef enum _lptmr_interrupt_enable lptmr_interrupt_enable_t: List of the LPTMR interrupts.

typedef enum _lptmr_status_flags lptmr_status_flags_t: List of the LPTMR status flags.

typedef struct _lptmr_config lptmr_config_t

LPTMR config structure.

This structure holds the configuration settings for the LPTMR peripheral. To initialize this structure to reasonable defaults, call the LPTMR_GetDefaultConfig() function and pass a pointer to your configuration structure instance.

The configuration struct can be made constant so it resides in flash.

static inline void LPTMR_EnableTimerDMA(LPTMR_Type *base, bool enable)

Enable or disable timer DMA request.

Parameters:

base – base LPTMR peripheral base address
enable – Switcher of timer DMA feature. “true” means to enable, “false” means to disable.

struct _lptmr_config

#include <fsl_lptmr.h>

LPTMR config structure.

This structure holds the configuration settings for the LPTMR peripheral. To initialize this structure to reasonable defaults, call the LPTMR_GetDefaultConfig() function and pass a pointer to your configuration structure instance.

The configuration struct can be made constant so it resides in flash.

Public Members

lptmr_timer_mode_t timerMode: Time counter mode or pulse counter mode

lptmr_pin_select_t pinSelect: LPTMR pulse input pin select; used only in pulse counter mode

lptmr_pin_polarity_t pinPolarity: LPTMR pulse input pin polarity; used only in pulse counter mode

bool enableFreeRunning: True: enable free running, counter is reset on overflow False: counter is reset when the compare flag is set

bool bypassPrescaler: True: bypass prescaler; false: use clock from prescaler

lptmr_prescaler_clock_select_t prescalerClockSource: LPTMR clock source

lptmr_prescaler_glitch_value_t value: Prescaler or glitch filter value

LPUART: Low Power Universal Asynchronous Receiver/Transmitter Driver

LPUART Driver

static inline void LPUART_SoftwareReset(LPUART_Type *base)

Resets the LPUART using software.

This function resets all internal logic and registers except the Global Register. Remains set until cleared by software.

Parameters:

base – LPUART peripheral base address.

status_t LPUART_Init(LPUART_Type *base, const lpuart_config_t *config, uint32_t srcClock_Hz)

Initializes an LPUART instance with the user configuration structure and the peripheral clock.

This function configures the LPUART module with user-defined settings. Call the LPUART_GetDefaultConfig() function to configure the configuration structure and get the default configuration. The example below shows how to use this API to configure the LPUART.

lpuart_config_t lpuartConfig;
lpuartConfig.baudRate_Bps = 115200U;
lpuartConfig.parityMode = kLPUART_ParityDisabled;
lpuartConfig.dataBitsCount = kLPUART_EightDataBits;
lpuartConfig.isMsb = false;
lpuartConfig.stopBitCount = kLPUART_OneStopBit;
lpuartConfig.txFifoWatermark = 0;
lpuartConfig.rxFifoWatermark = 1;
LPUART_Init(LPUART1, &lpuartConfig, 20000000U);

Parameters:

base – LPUART peripheral base address.
config – Pointer to a user-defined configuration structure.
srcClock_Hz – LPUART clock source frequency in HZ.

Return values:

kStatus_LPUART_BaudrateNotSupport – Baudrate is not support in current clock source.
kStatus_Success – LPUART initialize succeed

void LPUART_Deinit(LPUART_Type *base)

Deinitializes a LPUART instance.

This function waits for transmit to complete, disables TX and RX, and disables the LPUART clock.

Parameters:

base – LPUART peripheral base address.

void LPUART_GetDefaultConfig(lpuart_config_t *config)

Gets the default configuration structure.

This function initializes the LPUART configuration structure to a default value. The default values are: lpuartConfig->baudRate_Bps = 115200U; lpuartConfig->parityMode = kLPUART_ParityDisabled; lpuartConfig->dataBitsCount = kLPUART_EightDataBits; lpuartConfig->isMsb = false; lpuartConfig->stopBitCount = kLPUART_OneStopBit; lpuartConfig->txFifoWatermark = 0; lpuartConfig->rxFifoWatermark = 1; lpuartConfig->rxIdleType = kLPUART_IdleTypeStartBit; lpuartConfig->rxIdleConfig = kLPUART_IdleCharacter1; lpuartConfig->enableTx = false; lpuartConfig->enableRx = false;

Parameters:

config – Pointer to a configuration structure.

status_t LPUART_SetBaudRate(LPUART_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz)

Sets the LPUART instance baudrate.

This function configures the LPUART module baudrate. This function is used to update the LPUART module baudrate after the LPUART module is initialized by the LPUART_Init.

LPUART_SetBaudRate(LPUART1, 115200U, 20000000U);

Parameters:

base – LPUART peripheral base address.
baudRate_Bps – LPUART baudrate to be set.
srcClock_Hz – LPUART clock source frequency in HZ.

Return values:

kStatus_LPUART_BaudrateNotSupport – Baudrate is not supported in the current clock source.
kStatus_Success – Set baudrate succeeded.

void LPUART_Enable9bitMode(LPUART_Type *base, bool enable)

Enable 9-bit data mode for LPUART.

This function set the 9-bit mode for LPUART module. The 9th bit is not used for parity thus can be modified by user.

Parameters:

base – LPUART peripheral base address.
enable – true to enable, flase to disable.

static inline void LPUART_SetMatchAddress(LPUART_Type *base, uint16_t address1, uint16_t address2)

Set the LPUART address.

This function configures the address for LPUART module that works as slave in 9-bit data mode. One or two address fields can be configured. When the address field’s match enable bit is set, the frame it receices with MSB being 1 is considered as an address frame, otherwise it is considered as data frame. Once the address frame matches one of slave’s own addresses, this slave is addressed. This address frame and its following data frames are stored in the receive buffer, otherwise the frames will be discarded. To un-address a slave, just send an address frame with unmatched address.

Note

Any LPUART instance joined in the multi-slave system can work as slave. The position of the address mark is the same as the parity bit when parity is enabled for 8 bit and 9 bit data formats.

Parameters:

base – LPUART peripheral base address.
address1 – LPUART slave address1.
address2 – LPUART slave address2.

static inline void LPUART_EnableMatchAddress(LPUART_Type *base, bool match1, bool match2)

Enable the LPUART match address feature.

Parameters:

base – LPUART peripheral base address.
match1 – true to enable match address1, false to disable.
match2 – true to enable match address2, false to disable.

static inline void LPUART_SetRxFifoWatermark(LPUART_Type *base, uint8_t water)

Sets the rx FIFO watermark.

Parameters:

base – LPUART peripheral base address.
water – Rx FIFO watermark.

static inline void LPUART_SetTxFifoWatermark(LPUART_Type *base, uint8_t water)

Sets the tx FIFO watermark.

Parameters:

base – LPUART peripheral base address.
water – Tx FIFO watermark.

static inline void LPUART_TransferEnable16Bit(lpuart_handle_t *handle, bool enable)

Sets the LPUART using 16bit transmit, only for 9bit or 10bit mode.

This function Enable 16bit Data transmit in lpuart_handle_t.

Parameters:

handle – LPUART handle pointer.
enable – true to enable, false to disable.

uint32_t LPUART_GetStatusFlags(LPUART_Type *base)

Gets LPUART status flags.

This function gets all LPUART status flags. The flags are returned as the logical OR value of the enumerators _lpuart_flags. To check for a specific status, compare the return value with enumerators in the _lpuart_flags. For example, to check whether the TX is empty:

if (kLPUART_TxDataRegEmptyFlag & LPUART_GetStatusFlags(LPUART1))
{
    ...
}

Parameters:

base – LPUART peripheral base address.

Returns:

LPUART status flags which are ORed by the enumerators in the _lpuart_flags.

status_t LPUART_ClearStatusFlags(LPUART_Type *base, uint32_t mask)

Clears status flags with a provided mask.

This function clears LPUART status flags with a provided mask. Automatically cleared flags can’t be cleared by this function. Flags that can only cleared or set by hardware are: kLPUART_TxDataRegEmptyFlag, kLPUART_TransmissionCompleteFlag, kLPUART_RxDataRegFullFlag, kLPUART_RxActiveFlag, kLPUART_NoiseErrorFlag, kLPUART_ParityErrorFlag, kLPUART_TxFifoEmptyFlag,kLPUART_RxFifoEmptyFlag Note: This API should be called when the Tx/Rx is idle, otherwise it takes no effects.

Parameters:

base – LPUART peripheral base address.
mask – the status flags to be cleared. The user can use the enumerators in the _lpuart_status_flag_t to do the OR operation and get the mask.

Return values:

kStatus_LPUART_FlagCannotClearManually – The flag can’t be cleared by this function but it is cleared automatically by hardware.
kStatus_Success – Status in the mask are cleared.

Returns:

0 succeed, others failed.

void LPUART_EnableInterrupts(LPUART_Type *base, uint32_t mask)

Enables LPUART interrupts according to a provided mask.

This function enables the LPUART interrupts according to a provided mask. The mask is a logical OR of enumeration members. See the _lpuart_interrupt_enable. This examples shows how to enable TX empty interrupt and RX full interrupt:

LPUART_EnableInterrupts(LPUART1,kLPUART_TxDataRegEmptyInterruptEnable | kLPUART_RxDataRegFullInterruptEnable);

Parameters:

base – LPUART peripheral base address.
mask – The interrupts to enable. Logical OR of _lpuart_interrupt_enable.

void LPUART_DisableInterrupts(LPUART_Type *base, uint32_t mask)

Disables LPUART interrupts according to a provided mask.

This function disables the LPUART interrupts according to a provided mask. The mask is a logical OR of enumeration members. See _lpuart_interrupt_enable. This example shows how to disable the TX empty interrupt and RX full interrupt:

LPUART_DisableInterrupts(LPUART1,kLPUART_TxDataRegEmptyInterruptEnable | kLPUART_RxDataRegFullInterruptEnable);

Parameters:

base – LPUART peripheral base address.
mask – The interrupts to disable. Logical OR of _lpuart_interrupt_enable.

uint32_t LPUART_GetEnabledInterrupts(LPUART_Type *base)

Gets enabled LPUART interrupts.

This function gets the enabled LPUART interrupts. The enabled interrupts are returned as the logical OR value of the enumerators _lpuart_interrupt_enable. To check a specific interrupt enable status, compare the return value with enumerators in _lpuart_interrupt_enable. For example, to check whether the TX empty interrupt is enabled:

uint32_t enabledInterrupts = LPUART_GetEnabledInterrupts(LPUART1);

if (kLPUART_TxDataRegEmptyInterruptEnable & enabledInterrupts)
{
    ...
}

Parameters:

base – LPUART peripheral base address.

Returns:

LPUART interrupt flags which are logical OR of the enumerators in _lpuart_interrupt_enable.

static inline uintptr_t LPUART_GetDataRegisterAddress(LPUART_Type *base)

Gets the LPUART data register address.

This function returns the LPUART data register address, which is mainly used by the DMA/eDMA.

Parameters:

base – LPUART peripheral base address.

Returns:

LPUART data register addresses which are used both by the transmitter and receiver.

static inline void LPUART_EnableTxDMA(LPUART_Type *base, bool enable)

Enables or disables the LPUART transmitter DMA request.

This function enables or disables the transmit data register empty flag, STAT[TDRE], to generate DMA requests.

Parameters:

base – LPUART peripheral base address.
enable – True to enable, false to disable.

static inline void LPUART_EnableRxDMA(LPUART_Type *base, bool enable)

Enables or disables the LPUART receiver DMA.

This function enables or disables the receiver data register full flag, STAT[RDRF], to generate DMA requests.

Parameters:

base – LPUART peripheral base address.
enable – True to enable, false to disable.

uint32_t LPUART_GetInstance(LPUART_Type *base)

Get the LPUART instance from peripheral base address.

Parameters:

base – LPUART peripheral base address.

Returns:

LPUART instance.

static inline void LPUART_EnableTx(LPUART_Type *base, bool enable)

Enables or disables the LPUART transmitter.

This function enables or disables the LPUART transmitter.

Parameters:

base – LPUART peripheral base address.
enable – True to enable, false to disable.

static inline void LPUART_EnableRx(LPUART_Type *base, bool enable)

Enables or disables the LPUART receiver.

This function enables or disables the LPUART receiver.

Parameters:

base – LPUART peripheral base address.
enable – True to enable, false to disable.

static inline void LPUART_WriteByte(LPUART_Type *base, uint8_t data)

Writes to the transmitter register.

This function writes data to the transmitter register directly. The upper layer must ensure that the TX register is empty or that the TX FIFO has room before calling this function.

Parameters:

base – LPUART peripheral base address.
data – Data write to the TX register.

static inline uint8_t LPUART_ReadByte(LPUART_Type *base)

Reads the receiver register.

This function reads data from the receiver register directly. The upper layer must ensure that the receiver register is full or that the RX FIFO has data before calling this function.

Parameters:

base – LPUART peripheral base address.

Returns:

Data read from data register.

static inline uint8_t LPUART_GetRxFifoCount(LPUART_Type *base)

Gets the rx FIFO data count.

Parameters:

base – LPUART peripheral base address.

Returns:

rx FIFO data count.

static inline uint8_t LPUART_GetTxFifoCount(LPUART_Type *base)

Gets the tx FIFO data count.

Parameters:

base – LPUART peripheral base address.

Returns:

tx FIFO data count.

void LPUART_SendAddress(LPUART_Type *base, uint8_t address)

Transmit an address frame in 9-bit data mode.

Parameters:

base – LPUART peripheral base address.
address – LPUART slave address.

status_t LPUART_WriteBlocking(LPUART_Type *base, const uint8_t *data, size_t length)

Writes to the transmitter register using a blocking method.

This function polls the transmitter register, first waits for the register to be empty or TX FIFO to have room, and writes data to the transmitter buffer, then waits for the dat to be sent out to the bus.

Parameters:

base – LPUART peripheral base address.
data – Start address of the data to write.
length – Size of the data to write.

Return values:

kStatus_LPUART_Timeout – Transmission timed out and was aborted.
kStatus_Success – Successfully wrote all data.

status_t LPUART_WriteBlocking16bit(LPUART_Type *base, const uint16_t *data, size_t length)

Writes to the transmitter register using a blocking method in 9bit or 10bit mode.

Note

This function only support 9bit or 10bit transfer. Please make sure only 10bit of data is valid and other bits are 0.

Parameters:

base – LPUART peripheral base address.
data – Start address of the data to write.
length – Size of the data to write.

Return values:

kStatus_LPUART_Timeout – Transmission timed out and was aborted.
kStatus_Success – Successfully wrote all data.

status_t LPUART_ReadBlocking(LPUART_Type *base, uint8_t *data, size_t length)

Reads the receiver data register using a blocking method.

This function polls the receiver register, waits for the receiver register full or receiver FIFO has data, and reads data from the TX register.

Parameters:

base – LPUART peripheral base address.
data – Start address of the buffer to store the received data.
length – Size of the buffer.

Return values:

kStatus_LPUART_RxHardwareOverrun – Receiver overrun happened while receiving data.
kStatus_LPUART_NoiseError – Noise error happened while receiving data.
kStatus_LPUART_FramingError – Framing error happened while receiving data.
kStatus_LPUART_ParityError – Parity error happened while receiving data.
kStatus_LPUART_Timeout – Transmission timed out and was aborted.
kStatus_Success – Successfully received all data.

status_t LPUART_ReadBlocking16bit(LPUART_Type *base, uint16_t *data, size_t length)

Reads the receiver data register in 9bit or 10bit mode.

Note

This function only support 9bit or 10bit transfer.

Parameters:

base – LPUART peripheral base address.
data – Start address of the buffer to store the received data by 16bit, only 10bit is valid.
length – Size of the buffer.

Return values:

kStatus_LPUART_RxHardwareOverrun – Receiver overrun happened while receiving data.
kStatus_LPUART_NoiseError – Noise error happened while receiving data.
kStatus_LPUART_FramingError – Framing error happened while receiving data.
kStatus_LPUART_ParityError – Parity error happened while receiving data.
kStatus_LPUART_Timeout – Transmission timed out and was aborted.
kStatus_Success – Successfully received all data.

void LPUART_TransferCreateHandle(LPUART_Type *base, lpuart_handle_t *handle, lpuart_transfer_callback_t callback, void *userData)

Initializes the LPUART handle.

This function initializes the LPUART handle, which can be used for other LPUART transactional APIs. Usually, for a specified LPUART instance, call this API once to get the initialized handle.

The LPUART driver supports the “background” receiving, which means that user can set up an RX ring buffer optionally. Data received is stored into the ring buffer even when the user doesn’t call the LPUART_TransferReceiveNonBlocking() API. If there is already data received in the ring buffer, the user can get the received data from the ring buffer directly. The ring buffer is disabled if passing NULL as ringBuffer.

Parameters:

base – LPUART peripheral base address.
handle – LPUART handle pointer.
callback – Callback function.
userData – User data.

status_t LPUART_TransferSendNonBlocking(LPUART_Type *base, lpuart_handle_t *handle, lpuart_transfer_t *xfer)

Transmits a buffer of data using the interrupt method.

This function send data using an interrupt method. This is a non-blocking function, which returns directly without waiting for all data written to the transmitter register. When all data is written to the TX register in the ISR, the LPUART driver calls the callback function and passes the kStatus_LPUART_TxIdle as status parameter.

Note

The kStatus_LPUART_TxIdle is passed to the upper layer when all data are written to the TX register. However, there is no check to ensure that all the data sent out. Before disabling the TX, check the kLPUART_TransmissionCompleteFlag to ensure that the transmit is finished.

Parameters:

base – LPUART peripheral base address.
handle – LPUART handle pointer.
xfer – LPUART transfer structure, see lpuart_transfer_t.

Return values:

kStatus_Success – Successfully start the data transmission.
kStatus_LPUART_TxBusy – Previous transmission still not finished, data not all written to the TX register.
kStatus_InvalidArgument – Invalid argument.

void LPUART_TransferStartRingBuffer(LPUART_Type *base, lpuart_handle_t *handle, uint8_t *ringBuffer, size_t ringBufferSize)

Sets up the RX ring buffer.

This function sets up the RX ring buffer to a specific UART handle.

When the RX ring buffer is used, data received is stored into the ring buffer even when the user doesn’t call the UART_TransferReceiveNonBlocking() API. If there is already data received in the ring buffer, the user can get the received data from the ring buffer directly.

Note

When using RX ring buffer, one byte is reserved for internal use. In other words, if ringBufferSize is 32, then only 31 bytes are used for saving data.

Parameters:

base – LPUART peripheral base address.
handle – LPUART handle pointer.
ringBuffer – Start address of ring buffer for background receiving. Pass NULL to disable the ring buffer.
ringBufferSize – size of the ring buffer.

void LPUART_TransferStopRingBuffer(LPUART_Type *base, lpuart_handle_t *handle)

Aborts the background transfer and uninstalls the ring buffer.

This function aborts the background transfer and uninstalls the ring buffer.

Parameters:

base – LPUART peripheral base address.
handle – LPUART handle pointer.

size_t LPUART_TransferGetRxRingBufferLength(LPUART_Type *base, lpuart_handle_t *handle)

Get the length of received data in RX ring buffer.

Parameters:

base – LPUART peripheral base address.
handle – LPUART handle pointer.

Returns:

Length of received data in RX ring buffer.

void LPUART_TransferAbortSend(LPUART_Type *base, lpuart_handle_t *handle)

Aborts the interrupt-driven data transmit.

This function aborts the interrupt driven data sending. The user can get the remainBtyes to find out how many bytes are not sent out.

Parameters:

base – LPUART peripheral base address.
handle – LPUART handle pointer.

status_t LPUART_TransferGetSendCount(LPUART_Type *base, lpuart_handle_t *handle, uint32_t *count)

Gets the number of bytes that have been sent out to bus.

This function gets the number of bytes that have been sent out to bus by an interrupt method.

Parameters:

base – LPUART peripheral base address.
handle – LPUART handle pointer.
count – Send bytes count.

Return values:

kStatus_NoTransferInProgress – No send in progress.
kStatus_InvalidArgument – Parameter is invalid.
kStatus_Success – Get successfully through the parameter count;

status_t LPUART_TransferReceiveNonBlocking(LPUART_Type *base, lpuart_handle_t *handle, lpuart_transfer_t *xfer, size_t *receivedBytes)

Receives a buffer of data using the interrupt method.

This function receives data using an interrupt method. This is a non-blocking function which returns without waiting to ensure that all data are received. If the RX ring buffer is used and not empty, the data in the ring buffer is copied and the parameter receivedBytes shows how many bytes are copied from the ring buffer. After copying, if the data in the ring buffer is not enough for read, the receive request is saved by the LPUART driver. When the new data arrives, the receive request is serviced first. When all data is received, the LPUART driver notifies the upper layer through a callback function and passes a status parameter kStatus_UART_RxIdle. For example, the upper layer needs 10 bytes but there are only 5 bytes in ring buffer. The 5 bytes are copied to xfer->data, which returns with the parameter receivedBytes set to 5. For the remaining 5 bytes, the newly arrived data is saved from xfer->data[5]. When 5 bytes are received, the LPUART driver notifies the upper layer. If the RX ring buffer is not enabled, this function enables the RX and RX interrupt to receive data to xfer->data. When all data is received, the upper layer is notified.

Parameters:

base – LPUART peripheral base address.
handle – LPUART handle pointer.
xfer – LPUART transfer structure, see uart_transfer_t.
receivedBytes – Bytes received from the ring buffer directly.

Return values:

kStatus_Success – Successfully queue the transfer into the transmit queue.
kStatus_LPUART_RxBusy – Previous receive request is not finished.
kStatus_InvalidArgument – Invalid argument.

void LPUART_TransferAbortReceive(LPUART_Type *base, lpuart_handle_t *handle)

Aborts the interrupt-driven data receiving.

This function aborts the interrupt-driven data receiving. The user can get the remainBytes to find out how many bytes not received yet.

Parameters:

base – LPUART peripheral base address.
handle – LPUART handle pointer.

status_t LPUART_TransferGetReceiveCount(LPUART_Type *base, lpuart_handle_t *handle, uint32_t *count)

Gets the number of bytes that have been received.

This function gets the number of bytes that have been received.

Parameters:

base – LPUART peripheral base address.
handle – LPUART handle pointer.
count – Receive bytes count.

Return values:

kStatus_NoTransferInProgress – No receive in progress.
kStatus_InvalidArgument – Parameter is invalid.
kStatus_Success – Get successfully through the parameter count;

void LPUART_TransferHandleIRQ(LPUART_Type *base, void *irqHandle)

LPUART IRQ handle function.

This function handles the LPUART transmit and receive IRQ request.

Parameters:

base – LPUART peripheral base address.
irqHandle – LPUART handle pointer.

void LPUART_TransferHandleErrorIRQ(LPUART_Type *base, void *irqHandle)

LPUART Error IRQ handle function.

This function handles the LPUART error IRQ request.

Parameters:

base – LPUART peripheral base address.
irqHandle – LPUART handle pointer.

void LPUART_DriverIRQHandler(uint32_t instance)

LPUART driver IRQ handler common entry.

This function provides the common IRQ request entry for LPUART.

Parameters:

instance – LPUART instance.

FSL_LPUART_DRIVER_VERSION: LPUART driver version.

Error codes for the LPUART driver.

Values:

enumerator kStatus_LPUART_TxBusy: TX busy

enumerator kStatus_LPUART_RxBusy: RX busy

enumerator kStatus_LPUART_TxIdle: LPUART transmitter is idle.

enumerator kStatus_LPUART_RxIdle: LPUART receiver is idle.

enumerator kStatus_LPUART_TxWatermarkTooLarge: TX FIFO watermark too large

enumerator kStatus_LPUART_RxWatermarkTooLarge: RX FIFO watermark too large

enumerator kStatus_LPUART_FlagCannotClearManually: Some flag can’t manually clear

enumerator kStatus_LPUART_Error: Error happens on LPUART.

enumerator kStatus_LPUART_RxRingBufferOverrun: LPUART RX software ring buffer overrun.

enumerator kStatus_LPUART_RxHardwareOverrun: LPUART RX receiver overrun.

enumerator kStatus_LPUART_NoiseError: LPUART noise error.

enumerator kStatus_LPUART_FramingError: LPUART framing error.

enumerator kStatus_LPUART_ParityError: LPUART parity error.

enumerator kStatus_LPUART_BaudrateNotSupport: Baudrate is not support in current clock source

enumerator kStatus_LPUART_IdleLineDetected: IDLE flag.

enumerator kStatus_LPUART_Timeout: LPUART times out.

enum _lpuart_parity_mode

LPUART parity mode.

Values:

enumerator kLPUART_ParityDisabled: Parity disabled

enumerator kLPUART_ParityEven: Parity enabled, type even, bit setting: PE|PT = 10

enumerator kLPUART_ParityOdd: Parity enabled, type odd, bit setting: PE|PT = 11

enum _lpuart_data_bits

LPUART data bits count.

Values:

enumerator kLPUART_EightDataBits: Eight data bit

enumerator kLPUART_SevenDataBits: Seven data bit

enum _lpuart_stop_bit_count

LPUART stop bit count.

Values:

enumerator kLPUART_OneStopBit: One stop bit

enumerator kLPUART_TwoStopBit: Two stop bits

enum _lpuart_transmit_cts_source

LPUART transmit CTS source.

Values:

enumerator kLPUART_CtsSourcePin: CTS resource is the LPUART_CTS pin.

enumerator kLPUART_CtsSourceMatchResult: CTS resource is the match result.

enum _lpuart_transmit_cts_config

LPUART transmit CTS configure.

Values:

enumerator kLPUART_CtsSampleAtStart: CTS input is sampled at the start of each character.

enumerator kLPUART_CtsSampleAtIdle: CTS input is sampled when the transmitter is idle

enum _lpuart_idle_type_select

LPUART idle flag type defines when the receiver starts counting.

Values:

enumerator kLPUART_IdleTypeStartBit: Start counting after a valid start bit.

enumerator kLPUART_IdleTypeStopBit: Start counting after a stop bit.

enum _lpuart_idle_config

LPUART idle detected configuration. This structure defines the number of idle characters that must be received before the IDLE flag is set.

Values:

enumerator kLPUART_IdleCharacter1: the number of idle characters.

enumerator kLPUART_IdleCharacter2: the number of idle characters.

enumerator kLPUART_IdleCharacter4: the number of idle characters.

enumerator kLPUART_IdleCharacter8: the number of idle characters.

enumerator kLPUART_IdleCharacter16: the number of idle characters.

enumerator kLPUART_IdleCharacter32: the number of idle characters.

enumerator kLPUART_IdleCharacter64: the number of idle characters.

enumerator kLPUART_IdleCharacter128: the number of idle characters.

enum _lpuart_interrupt_enable

LPUART interrupt configuration structure, default settings all disabled.

This structure contains the settings for all LPUART interrupt configurations.

Values:

enumerator kLPUART_LinBreakInterruptEnable: LIN break detect. bit 7

enumerator kLPUART_RxActiveEdgeInterruptEnable: Receive Active Edge. bit 6

enumerator kLPUART_TxDataRegEmptyInterruptEnable: Transmit data register empty. bit 23

enumerator kLPUART_TransmissionCompleteInterruptEnable: Transmission complete. bit 22

enumerator kLPUART_RxDataRegFullInterruptEnable: Receiver data register full. bit 21

enumerator kLPUART_IdleLineInterruptEnable: Idle line. bit 20

enumerator kLPUART_RxOverrunInterruptEnable: Receiver Overrun. bit 27

enumerator kLPUART_NoiseErrorInterruptEnable: Noise error flag. bit 26

enumerator kLPUART_FramingErrorInterruptEnable: Framing error flag. bit 25

enumerator kLPUART_ParityErrorInterruptEnable: Parity error flag. bit 24

enumerator kLPUART_Match1InterruptEnable: Parity error flag. bit 15

enumerator kLPUART_Match2InterruptEnable: Parity error flag. bit 14

enumerator kLPUART_TxFifoOverflowInterruptEnable: Transmit FIFO Overflow. bit 9

enumerator kLPUART_RxFifoUnderflowInterruptEnable: Receive FIFO Underflow. bit 8

enumerator kLPUART_AllInterruptEnable

enum _lpuart_flags

LPUART status flags.

This provides constants for the LPUART status flags for use in the LPUART functions.

Values:

enumerator kLPUART_TxDataRegEmptyFlag: Transmit data register empty flag, sets when transmit buffer is empty. bit 23

enumerator kLPUART_TransmissionCompleteFlag: Transmission complete flag, sets when transmission activity complete. bit 22

enumerator kLPUART_RxDataRegFullFlag: Receive data register full flag, sets when the receive data buffer is full. bit 21

enumerator kLPUART_IdleLineFlag: Idle line detect flag, sets when idle line detected. bit 20

enumerator kLPUART_RxOverrunFlag: Receive Overrun, sets when new data is received before data is read from receive register. bit 19

enumerator kLPUART_NoiseErrorFlag: Receive takes 3 samples of each received bit. If any of these samples differ, noise flag sets. bit 18

enumerator kLPUART_FramingErrorFlag: Frame error flag, sets if logic 0 was detected where stop bit expected. bit 17

enumerator kLPUART_ParityErrorFlag: If parity enabled, sets upon parity error detection. bit 16

enumerator kLPUART_LinBreakFlag: LIN break detect interrupt flag, sets when LIN break char detected and LIN circuit enabled. bit 31

enumerator kLPUART_RxActiveEdgeFlag: Receive pin active edge interrupt flag, sets when active edge detected. bit 30

enumerator kLPUART_RxActiveFlag: Receiver Active Flag (RAF), sets at beginning of valid start. bit 24

enumerator kLPUART_DataMatch1Flag: The next character to be read from LPUART_DATA matches MA1. bit 15

enumerator kLPUART_DataMatch2Flag: The next character to be read from LPUART_DATA matches MA2. bit 14

enumerator kLPUART_TxFifoEmptyFlag: TXEMPT bit, sets if transmit buffer is empty. bit 7

enumerator kLPUART_RxFifoEmptyFlag: RXEMPT bit, sets if receive buffer is empty. bit 6

enumerator kLPUART_TxFifoOverflowFlag: TXOF bit, sets if transmit buffer overflow occurred. bit 1

enumerator kLPUART_RxFifoUnderflowFlag: RXUF bit, sets if receive buffer underflow occurred. bit 0

enumerator kLPUART_AllClearFlags

enumerator kLPUART_AllFlags

typedef enum _lpuart_parity_mode lpuart_parity_mode_t: LPUART parity mode.

typedef enum _lpuart_data_bits lpuart_data_bits_t: LPUART data bits count.

typedef enum _lpuart_stop_bit_count lpuart_stop_bit_count_t: LPUART stop bit count.

typedef enum _lpuart_transmit_cts_source lpuart_transmit_cts_source_t: LPUART transmit CTS source.

typedef enum _lpuart_transmit_cts_config lpuart_transmit_cts_config_t: LPUART transmit CTS configure.

typedef enum _lpuart_idle_type_select lpuart_idle_type_select_t: LPUART idle flag type defines when the receiver starts counting.

typedef enum _lpuart_idle_config lpuart_idle_config_t: LPUART idle detected configuration. This structure defines the number of idle characters that must be received before the IDLE flag is set.

typedef struct _lpuart_config lpuart_config_t: LPUART configuration structure.

typedef struct _lpuart_transfer lpuart_transfer_t: LPUART transfer structure.

typedef struct _lpuart_handle lpuart_handle_t

typedef void (*lpuart_transfer_callback_t)(LPUART_Type *base, lpuart_handle_t *handle, status_t status, void *userData): LPUART transfer callback function.

typedef void (*lpuart_isr_t)(LPUART_Type *base, void *handle)

void *s_lpuartHandle[]

const IRQn_Type s_lpuartTxIRQ[]

lpuart_isr_t s_lpuartIsr[]

UART_RETRY_TIMES: Retry times for waiting flag.

struct _lpuart_config

#include <fsl_lpuart.h>

LPUART configuration structure.

Public Members

uint32_t baudRate_Bps: LPUART baud rate

lpuart_parity_mode_t parityMode: Parity mode, disabled (default), even, odd

lpuart_data_bits_t dataBitsCount: Data bits count, eight (default), seven

bool isMsb: Data bits order, LSB (default), MSB

lpuart_stop_bit_count_t stopBitCount: Number of stop bits, 1 stop bit (default) or 2 stop bits

uint8_t txFifoWatermark: TX FIFO watermark

uint8_t rxFifoWatermark: RX FIFO watermark

bool enableRxRTS: RX RTS enable

bool enableTxCTS: TX CTS enable

lpuart_transmit_cts_source_t txCtsSource: TX CTS source

lpuart_transmit_cts_config_t txCtsConfig: TX CTS configure

lpuart_idle_type_select_t rxIdleType: RX IDLE type.

lpuart_idle_config_t rxIdleConfig: RX IDLE configuration.

bool enableTx: Enable TX

bool enableRx: Enable RX

bool swapTxdRxd: Swap TXD and RXD pins

struct _lpuart_transfer

#include <fsl_lpuart.h>

LPUART transfer structure.

Public Members

size_t dataSize: The byte count to be transfer.

struct _lpuart_handle

#include <fsl_lpuart.h>

LPUART handle structure.

Public Members

volatile size_t txDataSize: Size of the remaining data to send.

size_t txDataSizeAll: Size of the data to send out.

volatile size_t rxDataSize: Size of the remaining data to receive.

size_t rxDataSizeAll: Size of the data to receive.

size_t rxRingBufferSize: Size of the ring buffer.

volatile uint16_t rxRingBufferHead: Index for the driver to store received data into ring buffer.

volatile uint16_t rxRingBufferTail: Index for the user to get data from the ring buffer.

lpuart_transfer_callback_t callback: Callback function.

void *userData: LPUART callback function parameter.

volatile uint8_t txState: TX transfer state.

volatile uint8_t rxState: RX transfer state.

bool isSevenDataBits: Seven data bits flag.

bool is16bitData: 16bit data bits flag, only used for 9bit or 10bit data

union __unnamed67__

Public Members

uint8_t *data: The buffer of data to be transfer.

uint8_t *rxData: The buffer to receive data.

uint16_t *rxData16: The buffer to receive data.

const uint8_t *txData: The buffer of data to be sent.

const uint16_t *txData16: The buffer of data to be sent.

union __unnamed69__

Public Members

const uint8_t *volatile txData: Address of remaining data to send.

const uint16_t *volatile txData16: Address of remaining data to send.

union __unnamed71__

Public Members

uint8_t *volatile rxData: Address of remaining data to receive.

uint16_t *volatile rxData16: Address of remaining data to receive.

union __unnamed73__

Public Members

uint8_t *rxRingBuffer: Start address of the receiver ring buffer.

uint16_t *rxRingBuffer16: Start address of the receiver ring buffer.

LPUART eDMA Driver

void LPUART_TransferCreateHandleEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle, lpuart_edma_transfer_callback_t callback, void *userData, edma_handle_t *txEdmaHandle, edma_handle_t *rxEdmaHandle)

Initializes the LPUART handle which is used in transactional functions.

Note

This function disables all LPUART interrupts.

Parameters:

base – LPUART peripheral base address.
handle – Pointer to lpuart_edma_handle_t structure.
callback – Callback function.
userData – User data.
txEdmaHandle – User requested DMA handle for TX DMA transfer.
rxEdmaHandle – User requested DMA handle for RX DMA transfer.

status_t LPUART_SendEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle, lpuart_transfer_t *xfer)

Sends data using eDMA.

This function sends data using eDMA. This is a non-blocking function, which returns right away. When all data is sent, the send callback function is called.

Parameters:

base – LPUART peripheral base address.
handle – LPUART handle pointer.
xfer – LPUART eDMA transfer structure. See lpuart_transfer_t.

Return values:

kStatus_Success – if succeed, others failed.
kStatus_LPUART_TxBusy – Previous transfer on going.
kStatus_InvalidArgument – Invalid argument.

status_t LPUART_ReceiveEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle, lpuart_transfer_t *xfer)

Receives data using eDMA.

This function receives data using eDMA. This is non-blocking function, which returns right away. When all data is received, the receive callback function is called.

Parameters:

base – LPUART peripheral base address.
handle – Pointer to lpuart_edma_handle_t structure.
xfer – LPUART eDMA transfer structure, see lpuart_transfer_t.

Return values:

kStatus_Success – if succeed, others fail.
kStatus_LPUART_RxBusy – Previous transfer ongoing.
kStatus_InvalidArgument – Invalid argument.

void LPUART_TransferAbortSendEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle)

Aborts the sent data using eDMA.

This function aborts the sent data using eDMA.

Parameters:

base – LPUART peripheral base address.
handle – Pointer to lpuart_edma_handle_t structure.

void LPUART_TransferAbortReceiveEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle)

Aborts the received data using eDMA.

This function aborts the received data using eDMA.

Parameters:

base – LPUART peripheral base address.
handle – Pointer to lpuart_edma_handle_t structure.

status_t LPUART_TransferGetSendCountEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle, uint32_t *count)

Gets the number of bytes written to the LPUART TX register.

This function gets the number of bytes written to the LPUART TX register by DMA.

Parameters:

base – LPUART peripheral base address.
handle – LPUART handle pointer.
count – Send bytes count.

Return values:

kStatus_NoTransferInProgress – No send in progress.
kStatus_InvalidArgument – Parameter is invalid.
kStatus_Success – Get successfully through the parameter count;

status_t LPUART_TransferGetReceiveCountEDMA(LPUART_Type *base, lpuart_edma_handle_t *handle, uint32_t *count)

Gets the number of received bytes.

This function gets the number of received bytes.

Parameters:

base – LPUART peripheral base address.
handle – LPUART handle pointer.
count – Receive bytes count.

Return values:

kStatus_NoTransferInProgress – No receive in progress.
kStatus_InvalidArgument – Parameter is invalid.
kStatus_Success – Get successfully through the parameter count;

void LPUART_TransferEdmaHandleIRQ(LPUART_Type *base, void *lpuartEdmaHandle)

LPUART eDMA IRQ handle function.

This function handles the LPUART tx complete IRQ request and invoke user callback. It is not set to static so that it can be used in user application.

Note

This function is used as default IRQ handler by double weak mechanism. If user’s specific IRQ handler is implemented, make sure this function is invoked in the handler.

Parameters:

base – LPUART peripheral base address.
lpuartEdmaHandle – LPUART handle pointer.

FSL_LPUART_EDMA_DRIVER_VERSION: LPUART EDMA driver version.

typedef struct _lpuart_edma_handle lpuart_edma_handle_t

typedef void (*lpuart_edma_transfer_callback_t)(LPUART_Type *base, lpuart_edma_handle_t *handle, status_t status, void *userData): LPUART transfer callback function.

struct _lpuart_edma_handle

#include <fsl_lpuart_edma.h>

LPUART eDMA handle.

Public Members

lpuart_edma_transfer_callback_t callback: Callback function.

void *userData: LPUART callback function parameter.

size_t rxDataSizeAll: Size of the data to receive.

size_t txDataSizeAll: Size of the data to send out.

edma_handle_t *txEdmaHandle: The eDMA TX channel used.

edma_handle_t *rxEdmaHandle: The eDMA RX channel used.

uint8_t nbytes: eDMA minor byte transfer count initially configured.

volatile uint8_t txState: TX transfer state.

volatile uint8_t rxState: RX transfer state

MCM: Miscellaneous Control Module

FSL_MCM_DRIVER_VERSION: MCM driver version.

Enum _mcm_interrupt_flag. Interrupt status flag mask. .

Values:

enumerator kMCM_CacheWriteBuffer: Cache Write Buffer Error Enable.

enumerator kMCM_ParityError: Cache Parity Error Enable.

enumerator kMCM_FPUInvalidOperation: FPU Invalid Operation Interrupt Enable.

enumerator kMCM_FPUDivideByZero: FPU Divide-by-zero Interrupt Enable.

enumerator kMCM_FPUOverflow: FPU Overflow Interrupt Enable.

enumerator kMCM_FPUUnderflow: FPU Underflow Interrupt Enable.

enumerator kMCM_FPUInexact: FPU Inexact Interrupt Enable.

enumerator kMCM_FPUInputDenormalInterrupt: FPU Input Denormal Interrupt Enable.

typedef union _mcm_buffer_fault_attribute mcm_buffer_fault_attribute_t: The union of buffer fault attribute.

typedef union _mcm_lmem_fault_attribute mcm_lmem_fault_attribute_t: The union of LMEM fault attribute.

static inline void MCM_EnableCrossbarRoundRobin(MCM_Type *base, bool enable)

Enables/Disables crossbar round robin.

Parameters:

base – MCM peripheral base address.
enable – Used to enable/disable crossbar round robin.
- true Enable crossbar round robin.
- false disable crossbar round robin.

static inline void MCM_EnableInterruptStatus(MCM_Type *base, uint32_t mask)

Enables the interrupt.

Parameters:

base – MCM peripheral base address.
mask – Interrupt status flags mask(_mcm_interrupt_flag).

static inline void MCM_DisableInterruptStatus(MCM_Type *base, uint32_t mask)

Disables the interrupt.

Parameters:

base – MCM peripheral base address.
mask – Interrupt status flags mask(_mcm_interrupt_flag).

static inline uint16_t MCM_GetInterruptStatus(MCM_Type *base)

Gets the Interrupt status .

Parameters:

base – MCM peripheral base address.

static inline void MCM_ClearCacheWriteBufferErroStatus(MCM_Type *base)

Clears the Interrupt status .

Parameters:

base – MCM peripheral base address.

static inline uint32_t MCM_GetBufferFaultAddress(MCM_Type *base)

Gets buffer fault address.

Parameters:

base – MCM peripheral base address.

static inline void MCM_GetBufferFaultAttribute(MCM_Type *base, mcm_buffer_fault_attribute_t *bufferfault)

Gets buffer fault attributes.

Parameters:

base – MCM peripheral base address.

static inline uint32_t MCM_GetBufferFaultData(MCM_Type *base)

Gets buffer fault data.

Parameters:

base – MCM peripheral base address.

static inline void MCM_LimitCodeCachePeripheralWriteBuffering(MCM_Type *base, bool enable)

Limit code cache peripheral write buffering.

Parameters:

base – MCM peripheral base address.
enable – Used to enable/disable limit code cache peripheral write buffering.
- true Enable limit code cache peripheral write buffering.
- false disable limit code cache peripheral write buffering.

static inline void MCM_BypassFixedCodeCacheMap(MCM_Type *base, bool enable)

Bypass fixed code cache map.

Parameters:

base – MCM peripheral base address.
enable – Used to enable/disable bypass fixed code cache map.
- true Enable bypass fixed code cache map.
- false disable bypass fixed code cache map.

static inline void MCM_EnableCodeBusCache(MCM_Type *base, bool enable)

Enables/Disables code bus cache.

Parameters:

base – MCM peripheral base address.
enable – Used to disable/enable code bus cache.
- true Enable code bus cache.
- false disable code bus cache.

static inline void MCM_ForceCodeCacheToNoAllocation(MCM_Type *base, bool enable)

Force code cache to no allocation.

Parameters:

base – MCM peripheral base address.
enable – Used to force code cache to allocation or no allocation.
- true Force code cache to no allocation.
- false Force code cache to allocation.

static inline void MCM_EnableCodeCacheWriteBuffer(MCM_Type *base, bool enable)

Enables/Disables code cache write buffer.

Parameters:

base – MCM peripheral base address.
enable – Used to enable/disable code cache write buffer.
- true Enable code cache write buffer.
- false Disable code cache write buffer.

static inline void MCM_ClearCodeBusCache(MCM_Type *base)

Clear code bus cache.

Parameters:

base – MCM peripheral base address.

static inline void MCM_EnablePcParityFaultReport(MCM_Type *base, bool enable)

Enables/Disables PC Parity Fault Report.

Parameters:

base – MCM peripheral base address.
enable – Used to enable/disable PC Parity Fault Report.
- true Enable PC Parity Fault Report.
- false disable PC Parity Fault Report.

static inline void MCM_EnablePcParity(MCM_Type *base, bool enable)

Enables/Disables PC Parity.

Parameters:

base – MCM peripheral base address.
enable – Used to enable/disable PC Parity.
- true Enable PC Parity.
- false disable PC Parity.

static inline void MCM_LockConfigState(MCM_Type *base)

Lock the configuration state.

Parameters:

base – MCM peripheral base address.

static inline void MCM_EnableCacheParityReporting(MCM_Type *base, bool enable)

Enables/Disables cache parity reporting.

Parameters:

base – MCM peripheral base address.
enable – Used to enable/disable cache parity reporting.
- true Enable cache parity reporting.
- false disable cache parity reporting.

static inline uint32_t MCM_GetLmemFaultAddress(MCM_Type *base)

Gets LMEM fault address.

Parameters:

base – MCM peripheral base address.

static inline void MCM_GetLmemFaultAttribute(MCM_Type *base, mcm_lmem_fault_attribute_t *lmemFault)

Get LMEM fault attributes.

Parameters:

base – MCM peripheral base address.

static inline uint64_t MCM_GetLmemFaultData(MCM_Type *base)

Gets LMEM fault data.

Parameters:

base – MCM peripheral base address.

MCM_LMFATR_TYPE_MASK

MCM_LMFATR_MODE_MASK

MCM_LMFATR_BUFF_MASK

MCM_LMFATR_CACH_MASK

MCM_ISCR_STAT_MASK

FSL_COMPONENT_ID

union _mcm_buffer_fault_attribute

#include <fsl_mcm.h>

The union of buffer fault attribute.

Public Members

uint32_t attribute: Indicates the faulting attributes, when a properly-enabled cache write buffer error interrupt event is detected.

struct _mcm_buffer_fault_attribute._mcm_buffer_fault_attribut attribute_memory

struct _mcm_buffer_fault_attribut

#include <fsl_mcm.h>

Public Members

uint32_t busErrorDataAccessType: Indicates the type of cache write buffer access.

uint32_t busErrorPrivilegeLevel: Indicates the privilege level of the cache write buffer access.

uint32_t busErrorSize: Indicates the size of the cache write buffer access.

uint32_t busErrorAccess: Indicates the type of system bus access.

uint32_t busErrorMasterID: Indicates the crossbar switch bus master number of the captured cache write buffer bus error.

uint32_t busErrorOverrun: Indicates if another cache write buffer bus error is detected.

union _mcm_lmem_fault_attribute

#include <fsl_mcm.h>

The union of LMEM fault attribute.

Public Members

uint32_t attribute: Indicates the attributes of the LMEM fault detected.

struct _mcm_lmem_fault_attribute._mcm_lmem_fault_attribut attribute_memory

struct _mcm_lmem_fault_attribut

#include <fsl_mcm.h>

Public Members

uint32_t parityFaultProtectionSignal: Indicates the features of parity fault protection signal.

uint32_t parityFaultMasterSize: Indicates the parity fault master size.

uint32_t parityFaultWrite: Indicates the parity fault is caused by read or write.

uint32_t backdoorAccess: Indicates the LMEM access fault is initiated by core access or backdoor access.

uint32_t parityFaultSyndrome: Indicates the parity fault syndrome.

uint32_t overrun: Indicates the number of faultss.

PDB: Programmable Delay Block

void PDB_Init(PDB_Type *base, const pdb_config_t *config)

Initializes the PDB module.

This function initializes the PDB module. The operations included are as follows.

Enable the clock for PDB instance.
Configure the PDB module.
Enable the PDB module.

Parameters:

base – PDB peripheral base address.
config – Pointer to the configuration structure. See “pdb_config_t”.

void PDB_Deinit(PDB_Type *base)

De-initializes the PDB module.

Parameters:

base – PDB peripheral base address.

void PDB_GetDefaultConfig(pdb_config_t *config)

Initializes the PDB user configuration structure.

This function initializes the user configuration structure to a default value. The default values are as follows.

config->loadValueMode = kPDB_LoadValueImmediately;
config->prescalerDivider = kPDB_PrescalerDivider1;
config->dividerMultiplicationFactor = kPDB_DividerMultiplicationFactor1;
config->triggerInputSource = kPDB_TriggerSoftware;
config->enableContinuousMode = false;

Parameters:

config – Pointer to configuration structure. See “pdb_config_t”.

static inline void PDB_Enable(PDB_Type *base, bool enable)

Enables the PDB module.

Parameters:

base – PDB peripheral base address.
enable – Enable the module or not.

static inline void PDB_DoSoftwareTrigger(PDB_Type *base)

Triggers the PDB counter by software.

Parameters:

base – PDB peripheral base address.

static inline void PDB_DoLoadValues(PDB_Type *base)

Loads the counter values.

This function loads the counter values from the internal buffer. See “pdb_load_value_mode_t” about PDB’s load mode.

Parameters:

base – PDB peripheral base address.

static inline void PDB_EnableDMA(PDB_Type *base, bool enable)

Enables the DMA for the PDB module.

Parameters:

base – PDB peripheral base address.
enable – Enable the feature or not.

static inline void PDB_EnableInterrupts(PDB_Type *base, uint32_t mask)

Enables the interrupts for the PDB module.

Parameters:

base – PDB peripheral base address.
mask – Mask value for interrupts. See “_pdb_interrupt_enable”.

static inline void PDB_DisableInterrupts(PDB_Type *base, uint32_t mask)

Disables the interrupts for the PDB module.

Parameters:

base – PDB peripheral base address.
mask – Mask value for interrupts. See “_pdb_interrupt_enable”.

static inline uint32_t PDB_GetStatusFlags(PDB_Type *base)

Gets the status flags of the PDB module.

Parameters:

base – PDB peripheral base address.

Returns:

Mask value for asserted flags. See “_pdb_status_flags”.

static inline void PDB_ClearStatusFlags(PDB_Type *base, uint32_t mask)

Clears the status flags of the PDB module.

Parameters:

base – PDB peripheral base address.
mask – Mask value of flags. See “_pdb_status_flags”.

static inline void PDB_SetModulusValue(PDB_Type *base, uint32_t value)

Specifies the counter period.

Parameters:

base – PDB peripheral base address.
value – Setting value for the modulus. 16-bit is available.

static inline uint32_t PDB_GetCounterValue(PDB_Type *base)

Gets the PDB counter’s current value.

Parameters:

base – PDB peripheral base address.

Returns:

PDB counter’s current value.

static inline void PDB_SetCounterDelayValue(PDB_Type *base, uint32_t value)

Sets the value for the PDB counter delay event.

Parameters:

base – PDB peripheral base address.
value – Setting value for PDB counter delay event. 16-bit is available.

static inline void PDB_SetADCPreTriggerConfig(PDB_Type *base, pdb_adc_trigger_channel_t channel, pdb_adc_pretrigger_config_t *config)

Configures the ADC pre-trigger in the PDB module.

Parameters:

base – PDB peripheral base address.
channel – Channel index for ADC instance.
config – Pointer to the configuration structure. See “pdb_adc_pretrigger_config_t”.

static inline void PDB_SetADCPreTriggerDelayValue(PDB_Type *base, pdb_adc_trigger_channel_t channel, pdb_adc_pretrigger_t pretriggerNumber, uint32_t value)

Sets the value for the ADC pre-trigger delay event.

This function sets the value for ADC pre-trigger delay event. It specifies the delay value for the channel’s corresponding pre-trigger. The pre-trigger asserts when the PDB counter is equal to the set value.

Parameters:

base – PDB peripheral base address.
channel – Channel index for ADC instance.
pretriggerNumber – Channel group index for ADC instance.
value – Setting value for ADC pre-trigger delay event. 16-bit is available.

static inline uint32_t PDB_GetADCPreTriggerStatusFlags(PDB_Type *base, pdb_adc_trigger_channel_t channel)

Gets the ADC pre-trigger’s status flags.

Parameters:

base – PDB peripheral base address.
channel – Channel index for ADC instance.

Returns:

Mask value for asserted flags. See “_pdb_adc_pretrigger_flags”.

static inline void PDB_ClearADCPreTriggerStatusFlags(PDB_Type *base, pdb_adc_trigger_channel_t channel, uint32_t mask)

Clears the ADC pre-trigger status flags.

Parameters:

base – PDB peripheral base address.
channel – Channel index for ADC instance.
mask – Mask value for flags. See “_pdb_adc_pretrigger_flags”.

void PDB_SetDACTriggerConfig(PDB_Type *base, pdb_dac_trigger_channel_t channel, pdb_dac_trigger_config_t *config)

Configures the DAC trigger in the PDB module.

Parameters:

base – PDB peripheral base address.
channel – Channel index for DAC instance.
config – Pointer to the configuration structure. See “pdb_dac_trigger_config_t”.

static inline void PDB_SetDACTriggerIntervalValue(PDB_Type *base, pdb_dac_trigger_channel_t channel, uint32_t value)

Sets the value for the DAC interval event.

This function sets the value for DAC interval event. DAC interval trigger triggers the DAC module to update the buffer when the DAC interval counter is equal to the set value.

Parameters:

base – PDB peripheral base address.
channel – Channel index for DAC instance.
value – Setting value for the DAC interval event.

static inline void PDB_EnablePulseOutTrigger(PDB_Type *base, pdb_pulse_out_channel_mask_t channelMask, bool enable)

Enables the pulse out trigger channels.

Parameters:

base – PDB peripheral base address.
channelMask – Channel mask value for multiple pulse out trigger channel.
enable – Whether the feature is enabled or not.

static inline void PDB_SetPulseOutTriggerDelayValue(PDB_Type *base, pdb_pulse_out_trigger_channel_t channel, uint32_t value1, uint32_t value2)

Sets event values for the pulse out trigger.

This function is used to set event values for the pulse output trigger. These pulse output trigger delay values specify the delay for the PDB Pulse-out. Pulse-out goes high when the PDB counter is equal to the pulse output high value (value1). Pulse-out goes low when the PDB counter is equal to the pulse output low value (value2).

Parameters:

base – PDB peripheral base address.
channel – Channel index for pulse out trigger channel.
value1 – Setting value for pulse out high.
value2 – Setting value for pulse out low.

FSL_PDB_DRIVER_VERSION: PDB driver version 2.0.4.

enum _pdb_status_flags

PDB flags.

Values:

enumerator kPDB_LoadOKFlag: This flag is automatically cleared when the values in buffers are loaded into the internal registers after the LDOK bit is set or the PDBEN is cleared.

enumerator kPDB_DelayEventFlag: PDB timer delay event flag.

enum _pdb_adc_pretrigger_flags

PDB ADC PreTrigger channel flags.

Values:

enumerator kPDB_ADCPreTriggerChannel0Flag: Pre-trigger 0 flag.

enumerator kPDB_ADCPreTriggerChannel1Flag: Pre-trigger 1 flag.

enumerator kPDB_ADCPreTriggerChannel0ErrorFlag: Pre-trigger 0 Error.

enumerator kPDB_ADCPreTriggerChannel1ErrorFlag: Pre-trigger 1 Error.

enum _pdb_interrupt_enable

PDB buffer interrupts.

Values:

enumerator kPDB_SequenceErrorInterruptEnable: PDB sequence error interrupt enable.

enumerator kPDB_DelayInterruptEnable: PDB delay interrupt enable.

enum _pdb_load_value_mode

PDB load value mode.

Selects the mode to load the internal values after doing the load operation (write 1 to PDBx_SC[LDOK]). These values are for the following operations.

PDB counter (PDBx_MOD, PDBx_IDLY)
ADC trigger (PDBx_CHnDLYm)
DAC trigger (PDBx_DACINTx)
CMP trigger (PDBx_POyDLY)

Values:

enumerator kPDB_LoadValueImmediately: Load immediately after 1 is written to LDOK.

enumerator kPDB_LoadValueOnCounterOverflow: Load when the PDB counter overflows (reaches the MOD register value).

enumerator kPDB_LoadValueOnTriggerInput: Load a trigger input event is detected.

enumerator kPDB_LoadValueOnCounterOverflowOrTriggerInput: Load either when the PDB counter overflows or a trigger input is detected.

enum _pdb_prescaler_divider

Prescaler divider.

Counting uses the peripheral clock divided by multiplication factor selected by times of MULT.

Values:

enumerator kPDB_PrescalerDivider1: Divider x1.

enumerator kPDB_PrescalerDivider2: Divider x2.

enumerator kPDB_PrescalerDivider4: Divider x4.

enumerator kPDB_PrescalerDivider8: Divider x8.

enumerator kPDB_PrescalerDivider16: Divider x16.

enumerator kPDB_PrescalerDivider32: Divider x32.

enumerator kPDB_PrescalerDivider64: Divider x64.

enumerator kPDB_PrescalerDivider128: Divider x128.

enum _pdb_divider_multiplication_factor

Multiplication factor select for prescaler.

Selects the multiplication factor of the prescaler divider for the counter clock.

Values:

enumerator kPDB_DividerMultiplicationFactor1: Multiplication factor is 1.

enumerator kPDB_DividerMultiplicationFactor10: Multiplication factor is 10.

enumerator kPDB_DividerMultiplicationFactor20: Multiplication factor is 20.

enumerator kPDB_DividerMultiplicationFactor40: Multiplication factor is 40.

enum _pdb_trigger_input_source

Trigger input source.

Selects the trigger input source for the PDB. The trigger input source can be internal or external (EXTRG pin), or the software trigger. See chip configuration details for the actual PDB input trigger connections.

Values:

enumerator kPDB_TriggerInput0: Trigger-In 0.

enumerator kPDB_TriggerInput1: Trigger-In 1.

enumerator kPDB_TriggerInput2: Trigger-In 2.

enumerator kPDB_TriggerInput3: Trigger-In 3.

enumerator kPDB_TriggerInput4: Trigger-In 4.

enumerator kPDB_TriggerInput5: Trigger-In 5.

enumerator kPDB_TriggerInput6: Trigger-In 6.

enumerator kPDB_TriggerInput7: Trigger-In 7.

enumerator kPDB_TriggerInput8: Trigger-In 8.

enumerator kPDB_TriggerInput9: Trigger-In 9.

enumerator kPDB_TriggerInput10: Trigger-In 10.

enumerator kPDB_TriggerInput11: Trigger-In 11.

enumerator kPDB_TriggerInput12: Trigger-In 12.

enumerator kPDB_TriggerInput13: Trigger-In 13.

enumerator kPDB_TriggerInput14: Trigger-In 14.

enumerator kPDB_TriggerSoftware: Trigger-In 15, software trigger.

enum _pdb_adc_trigger_channel

List of PDB ADC trigger channels.

Note

Actual number of available channels is SoC dependent

Values:

enumerator kPDB_ADCTriggerChannel0: PDB ADC trigger channel number 0

enumerator kPDB_ADCTriggerChannel1: PDB ADC trigger channel number 1

enumerator kPDB_ADCTriggerChannel2: PDB ADC trigger channel number 2

enumerator kPDB_ADCTriggerChannel3: PDB ADC trigger channel number 3

enum _pdb_adc_pretrigger

List of PDB ADC pretrigger.

Note

Actual number of available pretrigger channels is SoC dependent

Values:

enumerator kPDB_ADCPreTrigger0: PDB ADC pretrigger number 0

enumerator kPDB_ADCPreTrigger1: PDB ADC pretrigger number 1

enumerator kPDB_ADCPreTrigger2: PDB ADC pretrigger number 2

enumerator kPDB_ADCPreTrigger3: PDB ADC pretrigger number 3

enumerator kPDB_ADCPreTrigger4: PDB ADC pretrigger number 4

enumerator kPDB_ADCPreTrigger5: PDB ADC pretrigger number 5

enumerator kPDB_ADCPreTrigger6: PDB ADC pretrigger number 6

enumerator kPDB_ADCPreTrigger7: PDB ADC pretrigger number 7

enum _pdb_dac_trigger_channel

List of PDB DAC trigger channels.

Note

Actual number of available channels is SoC dependent

Values:

enumerator kPDB_DACTriggerChannel0: PDB DAC trigger channel number 0

enumerator kPDB_DACTriggerChannel1: PDB DAC trigger channel number 1

enum _pdb_pulse_out_trigger_channel

List of PDB pulse out trigger channels.

Note

Actual number of available channels is SoC dependent

Values:

enumerator kPDB_PulseOutTriggerChannel0: PDB pulse out trigger channel number 0

enumerator kPDB_PulseOutTriggerChannel1: PDB pulse out trigger channel number 1

enumerator kPDB_PulseOutTriggerChannel2: PDB pulse out trigger channel number 2

enumerator kPDB_PulseOutTriggerChannel3: PDB pulse out trigger channel number 3

enum _pdb_pulse_out_channel_mask

List of PDB pulse out trigger channels mask.

Note

Actual number of available channels mask is SoC dependent

Values:

enumerator kPDB_PulseOutChannel0Mask: PDB pulse out trigger channel number 0 mask

enumerator kPDB_PulseOutChannel1Mask: PDB pulse out trigger channel number 1 mask

enumerator kPDB_PulseOutChannel2Mask: PDB pulse out trigger channel number 2 mask

enumerator kPDB_PulseOutChannel3Mask: PDB pulse out trigger channel number 3 mask

typedef enum _pdb_load_value_mode pdb_load_value_mode_t

PDB load value mode.

Selects the mode to load the internal values after doing the load operation (write 1 to PDBx_SC[LDOK]). These values are for the following operations.

PDB counter (PDBx_MOD, PDBx_IDLY)
ADC trigger (PDBx_CHnDLYm)
DAC trigger (PDBx_DACINTx)
CMP trigger (PDBx_POyDLY)

typedef enum _pdb_prescaler_divider pdb_prescaler_divider_t

Prescaler divider.

Counting uses the peripheral clock divided by multiplication factor selected by times of MULT.

typedef enum _pdb_divider_multiplication_factor pdb_divider_multiplication_factor_t

Multiplication factor select for prescaler.

Selects the multiplication factor of the prescaler divider for the counter clock.

typedef enum _pdb_trigger_input_source pdb_trigger_input_source_t

Trigger input source.

Selects the trigger input source for the PDB. The trigger input source can be internal or external (EXTRG pin), or the software trigger. See chip configuration details for the actual PDB input trigger connections.

typedef enum _pdb_adc_trigger_channel pdb_adc_trigger_channel_t: List of PDB ADC trigger channels.

Note

Actual number of available channels is SoC dependent

typedef enum _pdb_adc_pretrigger pdb_adc_pretrigger_t: List of PDB ADC pretrigger.

Note

Actual number of available pretrigger channels is SoC dependent

typedef enum _pdb_dac_trigger_channel pdb_dac_trigger_channel_t: List of PDB DAC trigger channels.

Note

Actual number of available channels is SoC dependent

typedef enum _pdb_pulse_out_trigger_channel pdb_pulse_out_trigger_channel_t: List of PDB pulse out trigger channels.

Note

Actual number of available channels is SoC dependent

typedef enum _pdb_pulse_out_channel_mask pdb_pulse_out_channel_mask_t: List of PDB pulse out trigger channels mask.

Note

Actual number of available channels mask is SoC dependent

typedef struct _pdb_config pdb_config_t: PDB module configuration.

typedef struct _pdb_adc_pretrigger_config pdb_adc_pretrigger_config_t: PDB ADC Pre-trigger configuration.

typedef struct _pdb_dac_trigger_config pdb_dac_trigger_config_t: PDB DAC trigger configuration.

struct _pdb_config

#include <fsl_pdb.h>

PDB module configuration.

Public Members

pdb_load_value_mode_t loadValueMode: Select the load value mode.

pdb_prescaler_divider_t prescalerDivider: Select the prescaler divider.

pdb_divider_multiplication_factor_t dividerMultiplicationFactor: Multiplication factor select for prescaler.

pdb_trigger_input_source_t triggerInputSource: Select the trigger input source.

bool enableContinuousMode: Enable the PDB operation in Continuous mode.

struct _pdb_adc_pretrigger_config

#include <fsl_pdb.h>

PDB ADC Pre-trigger configuration.

Public Members

uint32_t enablePreTriggerMask: PDB Channel Pre-trigger Enable.

uint32_t enableOutputMask: PDB Channel Pre-trigger Output Select. PDB channel’s corresponding pre-trigger asserts when the counter reaches the channel delay register.

uint32_t enableBackToBackOperationMask: PDB Channel pre-trigger Back-to-Back Operation Enable. Back-to-back operation enables the ADC conversions complete to trigger the next PDB channel pre-trigger and trigger output, so that the ADC conversions can be triggered on next set of configuration and results registers.

struct _pdb_dac_trigger_config

#include <fsl_pdb.h>

PDB DAC trigger configuration.

Public Members

bool enableExternalTriggerInput: Enables the external trigger for DAC interval counter.

bool enableIntervalTrigger: Enables the DAC interval trigger.

PMC: Power Management Controller

static inline void PMC_GetVersionId(PMC_Type *base, pmc_version_id_t *versionId)

Gets the PMC version ID.

This function gets the PMC version ID, including major version number, minor version number, and a feature specification number.

Parameters:

base – PMC peripheral base address.
versionId – Pointer to version ID structure.

void PMC_GetParam(PMC_Type *base, pmc_param_t *param)

Gets the PMC parameter.

This function gets the PMC parameter including the VLPO enable and the HVD enable.

Parameters:

base – PMC peripheral base address.
param – Pointer to PMC param structure.

void PMC_ConfigureLowVoltDetect(PMC_Type *base, const pmc_low_volt_detect_config_t *config)

Configures the low-voltage detect setting.

This function configures the low-voltage detect setting, including the trip point voltage setting, enables or disables the interrupt, enables or disables the system reset.

Parameters:

base – PMC peripheral base address.
config – Low-voltage detect configuration structure.

static inline bool PMC_GetLowVoltDetectFlag(PMC_Type *base)

Gets the Low-voltage Detect Flag status.

This function reads the current LVDF status. If it returns 1, a low-voltage event is detected.

Parameters:

base – PMC peripheral base address.

Returns:

Current low-voltage detect flag

true: Low-voltage detected
false: Low-voltage not detected

static inline void PMC_ClearLowVoltDetectFlag(PMC_Type *base)

Acknowledges clearing the Low-voltage Detect flag.

This function acknowledges the low-voltage detection errors (write 1 to clear LVDF).

Parameters:

base – PMC peripheral base address.

void PMC_ConfigureLowVoltWarning(PMC_Type *base, const pmc_low_volt_warning_config_t *config)

Configures the low-voltage warning setting.

This function configures the low-voltage warning setting, including the trip point voltage setting and enabling or disabling the interrupt.

Parameters:

base – PMC peripheral base address.
config – Low-voltage warning configuration structure.

static inline bool PMC_GetLowVoltWarningFlag(PMC_Type *base)

Gets the Low-voltage Warning Flag status.

This function polls the current LVWF status. When 1 is returned, it indicates a low-voltage warning event. LVWF is set when V Supply transitions below the trip point or after reset and V Supply is already below the V LVW.

Parameters:

base – PMC peripheral base address.

Returns:

Current LVWF status

true: Low-voltage Warning Flag is set.
false: the Low-voltage Warning does not happen.

static inline void PMC_ClearLowVoltWarningFlag(PMC_Type *base)

Acknowledges the Low-voltage Warning flag.

This function acknowledges the low voltage warning errors (write 1 to clear LVWF).

Parameters:

base – PMC peripheral base address.

void PMC_ConfigureHighVoltDetect(PMC_Type *base, const pmc_high_volt_detect_config_t *config)

Configures the high-voltage detect setting.

This function configures the high-voltage detect setting, including the trip point voltage setting, enabling or disabling the interrupt, enabling or disabling the system reset.

Parameters:

base – PMC peripheral base address.
config – High-voltage detect configuration structure.

static inline bool PMC_GetHighVoltDetectFlag(PMC_Type *base)

Gets the High-voltage Detect Flag status.

This function reads the current HVDF status. If it returns 1, a low voltage event is detected.

Parameters:

base – PMC peripheral base address.

Returns:

Current high-voltage detect flag

true: High-voltage detected
false: High-voltage not detected

static inline void PMC_ClearHighVoltDetectFlag(PMC_Type *base)

Acknowledges clearing the High-voltage Detect flag.

This function acknowledges the high-voltage detection errors (write 1 to clear HVDF).

Parameters:

base – PMC peripheral base address.

void PMC_ConfigureBandgapBuffer(PMC_Type *base, const pmc_bandgap_buffer_config_t *config)

Configures the PMC bandgap.

This function configures the PMC bandgap, including the drive select and behavior in low-power mode.

Parameters:

base – PMC peripheral base address.
config – Pointer to the configuration structure

static inline bool PMC_GetPeriphIOIsolationFlag(PMC_Type *base)

Gets the acknowledge Peripherals and I/O pads isolation flag.

This function reads the Acknowledge Isolation setting that indicates whether certain peripherals and the I/O pads are in a latched state as a result of having been in the VLLS mode.

Parameters:

base – PMC peripheral base address.
base – Base address for current PMC instance.

Returns:

ACK isolation 0 - Peripherals and I/O pads are in a normal run state. 1 - Certain peripherals and I/O pads are in an isolated and latched state.

static inline void PMC_ClearPeriphIOIsolationFlag(PMC_Type *base)

Acknowledges the isolation flag to Peripherals and I/O pads.

This function clears the ACK Isolation flag. Writing one to this setting when it is set releases the I/O pads and certain peripherals to their normal run mode state.

Parameters:

base – PMC peripheral base address.

static inline bool PMC_IsRegulatorInRunRegulation(PMC_Type *base)

Gets the regulator regulation status.

This function returns the regulator to run a regulation status. It provides the current status of the internal voltage regulator.

Parameters:

base – PMC peripheral base address.
base – Base address for current PMC instance.

Returns:

Regulation status 0 - Regulator is in a stop regulation or in transition to/from the regulation. 1 - Regulator is in a run regulation.

FSL_PMC_DRIVER_VERSION

PMC driver version.

Version 2.0.3.

enum _pmc_low_volt_detect_volt_select

Low-voltage Detect Voltage Select.

Values:

enumerator kPMC_LowVoltDetectLowTrip: Low-trip point selected (VLVD = VLVDL )

enumerator kPMC_LowVoltDetectHighTrip: High-trip point selected (VLVD = VLVDH )

enum _pmc_low_volt_warning_volt_select

Low-voltage Warning Voltage Select.

Values:

enumerator kPMC_LowVoltWarningLowTrip: Low-trip point selected (VLVW = VLVW1)

enumerator kPMC_LowVoltWarningMid1Trip: Mid 1 trip point selected (VLVW = VLVW2)

enumerator kPMC_LowVoltWarningMid2Trip: Mid 2 trip point selected (VLVW = VLVW3)

enumerator kPMC_LowVoltWarningHighTrip: High-trip point selected (VLVW = VLVW4)

enum _pmc_high_volt_detect_volt_select

High-voltage Detect Voltage Select.

Values:

enumerator kPMC_HighVoltDetectLowTrip: Low-trip point selected (VHVD = VHVDL )

enumerator kPMC_HighVoltDetectHighTrip: High-trip point selected (VHVD = VHVDH )

enum _pmc_bandgap_buffer_drive_select

Bandgap Buffer Drive Select.

Values:

enumerator kPMC_BandgapBufferDriveLow: Low-drive.

enumerator kPMC_BandgapBufferDriveHigh: High-drive.

enum _pmc_vlp_freq_option

VLPx Option.

Values:

enumerator kPMC_FreqRestrict: Frequency is restricted in VLPx mode.

enumerator kPMC_FreqUnrestrict: Frequency is unrestricted in VLPx mode.

typedef enum _pmc_low_volt_detect_volt_select pmc_low_volt_detect_volt_select_t: Low-voltage Detect Voltage Select.

typedef enum _pmc_low_volt_warning_volt_select pmc_low_volt_warning_volt_select_t: Low-voltage Warning Voltage Select.

typedef enum _pmc_high_volt_detect_volt_select pmc_high_volt_detect_volt_select_t: High-voltage Detect Voltage Select.

typedef enum _pmc_bandgap_buffer_drive_select pmc_bandgap_buffer_drive_select_t: Bandgap Buffer Drive Select.

typedef enum _pmc_vlp_freq_option pmc_vlp_freq_mode_t: VLPx Option.

typedef struct _pmc_version_id pmc_version_id_t: IP version ID definition.

typedef struct _pmc_param pmc_param_t: IP parameter definition.

typedef struct _pmc_low_volt_detect_config pmc_low_volt_detect_config_t: Low-voltage Detect Configuration Structure.

typedef struct _pmc_low_volt_warning_config pmc_low_volt_warning_config_t: Low-voltage Warning Configuration Structure.

typedef struct _pmc_high_volt_detect_config pmc_high_volt_detect_config_t: High-voltage Detect Configuration Structure.

typedef struct _pmc_bandgap_buffer_config pmc_bandgap_buffer_config_t: Bandgap Buffer configuration.

struct _pmc_version_id

#include <fsl_pmc.h>

IP version ID definition.

Public Members

uint16_t feature: Feature Specification Number.

uint8_t minor: Minor version number.

uint8_t major: Major version number.

struct _pmc_param

#include <fsl_pmc.h>

IP parameter definition.

Public Members

bool vlpoEnable: VLPO enable.

bool hvdEnable: HVD enable.

struct _pmc_low_volt_detect_config

#include <fsl_pmc.h>

Low-voltage Detect Configuration Structure.

Public Members

bool enableInt: Enable interrupt when Low-voltage detect

bool enableReset: Enable system reset when Low-voltage detect

pmc_low_volt_detect_volt_select_t voltSelect: Low-voltage detect trip point voltage selection

struct _pmc_low_volt_warning_config

#include <fsl_pmc.h>

Low-voltage Warning Configuration Structure.

Public Members

bool enableInt: Enable interrupt when low-voltage warning

pmc_low_volt_warning_volt_select_t voltSelect: Low-voltage warning trip point voltage selection

struct _pmc_high_volt_detect_config

#include <fsl_pmc.h>

High-voltage Detect Configuration Structure.

Public Members

bool enableInt: Enable interrupt when high-voltage detect

bool enableReset: Enable system reset when high-voltage detect

pmc_high_volt_detect_volt_select_t voltSelect: High-voltage detect trip point voltage selection

struct _pmc_bandgap_buffer_config

#include <fsl_pmc.h>

Bandgap Buffer configuration.

Public Members

bool enable: Enable bandgap buffer.

bool enableInLowPowerMode: Enable bandgap buffer in low-power mode.

pmc_bandgap_buffer_drive_select_t drive: Bandgap buffer drive select.

PORT: Port Control and Interrupts

static inline void PORT_SetPinConfig(PORT_Type *base, uint32_t pin, const port_pin_config_t *config)

Sets the port PCR register.

This is an example to define an input pin or output pin PCR configuration.

// Define a digital input pin PCR configuration
port_pin_config_t config = {
     kPORT_PullUp,
     kPORT_FastSlewRate,
     kPORT_PassiveFilterDisable,
     kPORT_OpenDrainDisable,
     kPORT_LowDriveStrength,
     kPORT_MuxAsGpio,
     kPORT_UnLockRegister,
};

Parameters:

base – PORT peripheral base pointer.
pin – PORT pin number.
config – PORT PCR register configuration structure.

static inline void PORT_SetMultiplePinsConfig(PORT_Type *base, uint32_t mask, const port_pin_config_t *config)

Sets the port PCR register for multiple pins.

This is an example to define input pins or output pins PCR configuration.

Define a digital input pin PCR configuration
port_pin_config_t config = {
     kPORT_PullUp ,
     kPORT_PullEnable,
     kPORT_FastSlewRate,
     kPORT_PassiveFilterDisable,
     kPORT_OpenDrainDisable,
     kPORT_LowDriveStrength,
     kPORT_MuxAsGpio,
     kPORT_UnlockRegister,
};

Parameters:

base – PORT peripheral base pointer.
mask – PORT pin number macro.
config – PORT PCR register configuration structure.

static inline void PORT_SetMultipleInterruptPinsConfig(PORT_Type *base, uint32_t mask, port_interrupt_t config)

Sets the port interrupt configuration in PCR register for multiple pins.

Parameters:

base – PORT peripheral base pointer.
mask – PORT pin number macro.
config – PORT pin interrupt configuration.
- kPORT_InterruptOrDMADisabled: Interrupt/DMA request disabled.
- kPORT_DMARisingEdge : DMA request on rising edge(if the DMA requests exit).
- kPORT_DMAFallingEdge: DMA request on falling edge(if the DMA requests exit).
- kPORT_DMAEitherEdge : DMA request on either edge(if the DMA requests exit).
- kPORT_FlagRisingEdge : Flag sets on rising edge(if the Flag states exit).
- kPORT_FlagFallingEdge : Flag sets on falling edge(if the Flag states exit).
- kPORT_FlagEitherEdge : Flag sets on either edge(if the Flag states exit).
- kPORT_InterruptLogicZero : Interrupt when logic zero.
- kPORT_InterruptRisingEdge : Interrupt on rising edge.
- kPORT_InterruptFallingEdge: Interrupt on falling edge.
- kPORT_InterruptEitherEdge : Interrupt on either edge.
- kPORT_InterruptLogicOne : Interrupt when logic one.
- kPORT_ActiveHighTriggerOutputEnable : Enable active high-trigger output (if the trigger states exit).
- kPORT_ActiveLowTriggerOutputEnable : Enable active low-trigger output (if the trigger states exit)..

static inline void PORT_SetPinMux(PORT_Type *base, uint32_t pin, port_mux_t mux)

Configures the pin muxing.

Note

: This function is NOT recommended to use together with the PORT_SetPinsConfig, because the PORT_SetPinsConfig need to configure the pin mux anyway (Otherwise the pin mux is reset to zero : kPORT_PinDisabledOrAnalog). This function is recommended to use to reset the pin mux

Parameters:

base – PORT peripheral base pointer.
pin – PORT pin number.
mux – pin muxing slot selection.
- kPORT_PinDisabledOrAnalog: Pin disabled or work in analog function.
- kPORT_MuxAsGpio : Set as GPIO.
- kPORT_MuxAlt2 : chip-specific.
- kPORT_MuxAlt3 : chip-specific.
- kPORT_MuxAlt4 : chip-specific.
- kPORT_MuxAlt5 : chip-specific.
- kPORT_MuxAlt6 : chip-specific.
- kPORT_MuxAlt7 : chip-specific.

static inline void PORT_EnablePinsDigitalFilter(PORT_Type *base, uint32_t mask, bool enable)

Enables the digital filter in one port, each bit of the 32-bit register represents one pin.

Parameters:

base – PORT peripheral base pointer.
mask – PORT pin number macro.
enable – PORT digital filter configuration.

static inline void PORT_SetDigitalFilterConfig(PORT_Type *base, const port_digital_filter_config_t *config)

Sets the digital filter in one port, each bit of the 32-bit register represents one pin.

Parameters:

base – PORT peripheral base pointer.
config – PORT digital filter configuration structure.

static inline void PORT_SetPinInterruptConfig(PORT_Type *base, uint32_t pin, port_interrupt_t config)

Configures the port pin interrupt/DMA request.

Parameters:

base – PORT peripheral base pointer.
pin – PORT pin number.
config – PORT pin interrupt configuration.
- kPORT_InterruptOrDMADisabled: Interrupt/DMA request disabled.
- kPORT_DMARisingEdge : DMA request on rising edge(if the DMA requests exit).
- kPORT_DMAFallingEdge: DMA request on falling edge(if the DMA requests exit).
- kPORT_DMAEitherEdge : DMA request on either edge(if the DMA requests exit).
- kPORT_FlagRisingEdge : Flag sets on rising edge(if the Flag states exit).
- kPORT_FlagFallingEdge : Flag sets on falling edge(if the Flag states exit).
- kPORT_FlagEitherEdge : Flag sets on either edge(if the Flag states exit).
- kPORT_InterruptLogicZero : Interrupt when logic zero.
- kPORT_InterruptRisingEdge : Interrupt on rising edge.
- kPORT_InterruptFallingEdge: Interrupt on falling edge.
- kPORT_InterruptEitherEdge : Interrupt on either edge.
- kPORT_InterruptLogicOne : Interrupt when logic one.
- kPORT_ActiveHighTriggerOutputEnable : Enable active high-trigger output (if the trigger states exit).
- kPORT_ActiveLowTriggerOutputEnable : Enable active low-trigger output (if the trigger states exit).

static inline void PORT_SetPinDriveStrength(PORT_Type *base, uint32_t pin, uint8_t strength)

Configures the port pin drive strength.

Parameters:

base – PORT peripheral base pointer.
pin – PORT pin number.
strength – PORT pin drive strength
- kPORT_LowDriveStrength = 0U - Low-drive strength is configured.
- kPORT_HighDriveStrength = 1U - High-drive strength is configured.

static inline uint32_t PORT_GetPinsInterruptFlags(PORT_Type *base)

Reads the whole port status flag.

If a pin is configured to generate the DMA request, the corresponding flag is cleared automatically at the completion of the requested DMA transfer. Otherwise, the flag remains set until a logic one is written to that flag. If configured for a level sensitive interrupt that remains asserted, the flag is set again immediately.

Parameters:

base – PORT peripheral base pointer.

Returns:

Current port interrupt status flags, for example, 0x00010001 means the pin 0 and 16 have the interrupt.

static inline void PORT_ClearPinsInterruptFlags(PORT_Type *base, uint32_t mask)

Clears the multiple pin interrupt status flag.

Parameters:

base – PORT peripheral base pointer.
mask – PORT pin number macro.

FSL_PORT_DRIVER_VERSION: PORT driver version.

enum _port_pull

Internal resistor pull feature selection.

Values:

enumerator kPORT_PullDisable: Internal pull-up/down resistor is disabled.

enumerator kPORT_PullDown: Internal pull-down resistor is enabled.

enumerator kPORT_PullUp: Internal pull-up resistor is enabled.

enum _port_slew_rate

Slew rate selection.

Values:

enumerator kPORT_FastSlewRate: Fast slew rate is configured.

enumerator kPORT_SlowSlewRate: Slow slew rate is configured.

enum _port_open_drain_enable

Open Drain feature enable/disable.

Values:

enumerator kPORT_OpenDrainDisable: Open drain output is disabled.

enumerator kPORT_OpenDrainEnable: Open drain output is enabled.

enum _port_passive_filter_enable

Passive filter feature enable/disable.

Values:

enumerator kPORT_PassiveFilterDisable: Passive input filter is disabled.

enumerator kPORT_PassiveFilterEnable: Passive input filter is enabled.

enum _port_drive_strength

Configures the drive strength.

Values:

enumerator kPORT_LowDriveStrength: Low-drive strength is configured.

enumerator kPORT_HighDriveStrength: High-drive strength is configured.

enum _port_lock_register

Unlock/lock the pin control register field[15:0].

Values:

enumerator kPORT_UnlockRegister: Pin Control Register fields [15:0] are not locked.

enumerator kPORT_LockRegister: Pin Control Register fields [15:0] are locked.

enum _port_mux

Pin mux selection.

Values:

enumerator kPORT_PinDisabledOrAnalog: Corresponding pin is disabled, but is used as an analog pin.

enumerator kPORT_MuxAsGpio: Corresponding pin is configured as GPIO.

enumerator kPORT_MuxAlt0: Chip-specific

enumerator kPORT_MuxAlt1: Chip-specific

enumerator kPORT_MuxAlt2: Chip-specific

enumerator kPORT_MuxAlt3: Chip-specific

enumerator kPORT_MuxAlt4: Chip-specific

enumerator kPORT_MuxAlt5: Chip-specific

enumerator kPORT_MuxAlt6: Chip-specific

enumerator kPORT_MuxAlt7: Chip-specific

enumerator kPORT_MuxAlt8: Chip-specific

enumerator kPORT_MuxAlt9: Chip-specific

enumerator kPORT_MuxAlt10: Chip-specific

enumerator kPORT_MuxAlt11: Chip-specific

enumerator kPORT_MuxAlt12: Chip-specific

enumerator kPORT_MuxAlt13: Chip-specific

enumerator kPORT_MuxAlt14: Chip-specific

enumerator kPORT_MuxAlt15: Chip-specific

enum _port_interrupt

Configures the interrupt generation condition.

Values:

enumerator kPORT_InterruptOrDMADisabled: Interrupt/DMA request is disabled.

enumerator kPORT_DMARisingEdge: DMA request on rising edge.

enumerator kPORT_DMAFallingEdge: DMA request on falling edge.

enumerator kPORT_DMAEitherEdge: DMA request on either edge.

enumerator kPORT_FlagRisingEdge: Flag sets on rising edge.

enumerator kPORT_FlagFallingEdge: Flag sets on falling edge.

enumerator kPORT_FlagEitherEdge: Flag sets on either edge.

enumerator kPORT_InterruptLogicZero: Interrupt when logic zero.

enumerator kPORT_InterruptRisingEdge: Interrupt on rising edge.

enumerator kPORT_InterruptFallingEdge: Interrupt on falling edge.

enumerator kPORT_InterruptEitherEdge: Interrupt on either edge.

enumerator kPORT_InterruptLogicOne: Interrupt when logic one.

enumerator kPORT_ActiveHighTriggerOutputEnable: Enable active high-trigger output.

enumerator kPORT_ActiveLowTriggerOutputEnable: Enable active low-trigger output.

enum _port_digital_filter_clock_source

Digital filter clock source selection.

Values:

enumerator kPORT_BusClock: Digital filters are clocked by the bus clock.

enumerator kPORT_LpoClock: Digital filters are clocked by the 1 kHz LPO clock.

typedef enum _port_mux port_mux_t: Pin mux selection.

typedef enum _port_interrupt port_interrupt_t: Configures the interrupt generation condition.

typedef enum _port_digital_filter_clock_source port_digital_filter_clock_source_t: Digital filter clock source selection.

typedef struct _port_digital_filter_config port_digital_filter_config_t: PORT digital filter feature configuration definition.

typedef struct _port_pin_config port_pin_config_t: PORT pin configuration structure.

FSL_COMPONENT_ID

struct _port_digital_filter_config

#include <fsl_port.h>

PORT digital filter feature configuration definition.

Public Members

uint32_t digitalFilterWidth: Set digital filter width

port_digital_filter_clock_source_t clockSource: Set digital filter clockSource

struct _port_pin_config

#include <fsl_port.h>

PORT pin configuration structure.

Public Members

uint16_t pullSelect: No-pull/pull-down/pull-up select

uint16_t slewRate: Fast/slow slew rate Configure

uint16_t passiveFilterEnable: Passive filter enable/disable

uint16_t openDrainEnable: Open drain enable/disable

uint16_t driveStrength: Fast/slow drive strength configure

uint16_t lockRegister: Lock/unlock the PCR field[15:0]

QSPI: Quad Serial Peripheral Interface

Quad Serial Peripheral Interface Driver

uint32_t QSPI_GetInstance(QuadSPI_Type *base)

Get the instance number for QSPI.

Parameters:

base – QSPI base pointer.

void QSPI_Init(QuadSPI_Type *base, qspi_config_t *config, uint32_t srcClock_Hz)

Initializes the QSPI module and internal state.

This function enables the clock for QSPI and also configures the QSPI with the input configure parameters. Users should call this function before any QSPI operations.

Parameters:

base – Pointer to QuadSPI Type.
config – QSPI configure structure.
srcClock_Hz – QSPI source clock frequency in Hz.

void QSPI_GetDefaultQspiConfig(qspi_config_t *config)

Gets default settings for QSPI.

Parameters:

config – QSPI configuration structure.

void QSPI_Deinit(QuadSPI_Type *base)

Deinitializes the QSPI module.

Clears the QSPI state and QSPI module registers.

Parameters:

base – Pointer to QuadSPI Type.

void QSPI_SetFlashConfig(QuadSPI_Type *base, qspi_flash_config_t *config)

Configures the serial flash parameter.

This function configures the serial flash relevant parameters, such as the size, command, and so on. The flash configuration value cannot have a default value. The user needs to configure it according to the QSPI features.

Parameters:

base – Pointer to QuadSPI Type.
config – Flash configuration parameters.

void QSPI_SetDelayChainConfig(QuadSPI_Type *base, qspi_delay_chain_config_t *config)

Configures the delay chain parameter.

This function configures the slave delay chain.

Parameters:

base – Pointer to QuadSPI Type.
config – Delay chain configuration parameters.

void QSPI_SoftwareReset(QuadSPI_Type *base)

Software reset for the QSPI logic.

This function sets the software reset flags for both AHB and buffer domain and resets both AHB buffer and also IP FIFOs.

Parameters:

base – Pointer to QuadSPI Type.

static inline void QSPI_Enable(QuadSPI_Type *base, bool enable)

Enables or disables the QSPI module.

Parameters:

base – Pointer to QuadSPI Type.
enable – True means enable QSPI, false means disable.

static inline uint32_t QSPI_GetStatusFlags(QuadSPI_Type *base)

Gets the state value of QSPI.

Parameters:

base – Pointer to QuadSPI Type.

Returns:

status flag, use status flag to AND _qspi_flags could get the related status.

static inline uint32_t QSPI_GetErrorStatusFlags(QuadSPI_Type *base)

Gets QSPI error status flags.

Parameters:

base – Pointer to QuadSPI Type.

Returns:

status flag, use status flag to AND _qspi_error_flags could get the related status.

static inline void QSPI_ClearErrorFlag(QuadSPI_Type *base, uint32_t mask)

Clears the QSPI error flags.

Parameters:

base – Pointer to QuadSPI Type.
mask – Which kind of QSPI flags to be cleared, a combination of _qspi_error_flags.

static inline void QSPI_EnableInterrupts(QuadSPI_Type *base, uint32_t mask)

Enables the QSPI interrupts.

Parameters:

base – Pointer to QuadSPI Type.
mask – QSPI interrupt source.

static inline void QSPI_DisableInterrupts(QuadSPI_Type *base, uint32_t mask)

Disables the QSPI interrupts.

Parameters:

base – Pointer to QuadSPI Type.
mask – QSPI interrupt source.

static inline void QSPI_EnableDMA(QuadSPI_Type *base, uint32_t mask, bool enable)

Enables the QSPI DMA source.

Parameters:

base – Pointer to QuadSPI Type.
mask – QSPI DMA source.
enable – True means enable DMA, false means disable.

static inline uint32_t QSPI_GetTxDataRegisterAddress(QuadSPI_Type *base)

Gets the Tx data register address. It is used for DMA operation.

Parameters:

base – Pointer to QuadSPI Type.

Returns:

QSPI Tx data register address.

uint32_t QSPI_GetRxDataRegisterAddress(QuadSPI_Type *base)

Gets the Rx data register address used for DMA operation.

This function returns the Rx data register address or Rx buffer address according to the Rx read area settings.

Parameters:

base – Pointer to QuadSPI Type.

Returns:

QSPI Rx data register address.

static inline void QSPI_SetIPCommandAddress(QuadSPI_Type *base, uint32_t addr)

Sets the IP command address.

Parameters:

base – Pointer to QuadSPI Type.
addr – IP command address.

static inline void QSPI_SetIPCommandSize(QuadSPI_Type *base, uint32_t size)

Sets the IP command size.

Parameters:

base – Pointer to QuadSPI Type.
size – IP command size.

void QSPI_ExecuteIPCommand(QuadSPI_Type *base, uint32_t index)

Executes IP commands located in LUT table.

Parameters:

base – Pointer to QuadSPI Type.
index – IP command located in which LUT table index.

void QSPI_ExecuteAHBCommand(QuadSPI_Type *base, uint32_t index)

Executes AHB commands located in LUT table.

Parameters:

base – Pointer to QuadSPI Type.
index – AHB command located in which LUT table index.

static inline void QSPI_EnableIPParallelMode(QuadSPI_Type *base, bool enable)

Enables/disables the QSPI IP command parallel mode.

Parameters:

base – Pointer to QuadSPI Type.
enable – True means enable parallel mode, false means disable parallel mode.

static inline void QSPI_EnableAHBParallelMode(QuadSPI_Type *base, bool enable)

Enables/disables the QSPI AHB command parallel mode.

Parameters:

base – Pointer to QuadSPI Type.
enable – True means enable parallel mode, false means disable parallel mode.

void QSPI_UpdateLUT(QuadSPI_Type *base, uint32_t index, uint32_t *cmd)

Updates the LUT table.

Parameters:

base – Pointer to QuadSPI Type.
index – Which LUT index needs to be located. It should be an integer divided by 4.
cmd – Command sequence array.

static inline void QSPI_ClearFifo(QuadSPI_Type *base, uint32_t mask)

Clears the QSPI FIFO logic.

Parameters:

base – Pointer to QuadSPI Type.
mask – Which kind of QSPI FIFO to be cleared.

static inline void QSPI_ClearCommandSequence(QuadSPI_Type *base, qspi_command_seq_t seq)

@ brief Clears the command sequence for the IP/buffer command.

This function can reset the command sequence.

Parameters:

base – QSPI base address.
seq – Which command sequence need to reset, IP command, buffer command or both.

static inline void QSPI_EnableDDRMode(QuadSPI_Type *base, bool enable)

Enable or disable DDR mode.

Parameters:

base – QSPI base pointer
enable – True means enable DDR mode, false means disable DDR mode.

void QSPI_SetReadDataArea(QuadSPI_Type *base, qspi_read_area_t area)

@ brief Set the RX buffer readout area.

This function can set the RX buffer readout, from AHB bus or IP Bus.

Parameters:

base – QSPI base address.
area – QSPI Rx buffer readout area. AHB bus buffer or IP bus buffer.

void QSPI_WriteBlocking(QuadSPI_Type *base, const uint32_t *buffer, size_t size)

Sends a buffer of data bytes using a blocking method.

Note

This function blocks via polling until all bytes have been sent.

Parameters:

base – QSPI base pointer
buffer – The data bytes to send
size – The number of data bytes to send

static inline void QSPI_WriteData(QuadSPI_Type *base, uint32_t data)

Writes data into FIFO.

Parameters:

base – QSPI base pointer
data – The data bytes to send

void QSPI_ReadBlocking(QuadSPI_Type *base, uint32_t *buffer, size_t size)

Receives a buffer of data bytes using a blocking method.

Note

This function blocks via polling until all bytes have been sent. Users shall notice that this receive size shall not bigger than 64 bytes. As this interface is used to read flash status registers. For flash contents read, please use AHB bus read, this is much more efficiency.

Parameters:

base – QSPI base pointer
buffer – The data bytes to send
size – The number of data bytes to receive

uint32_t QSPI_ReadData(QuadSPI_Type *base)

Receives data from data FIFO.

Parameters:

base – QSPI base pointer

Returns:

The data in the FIFO.

static inline void QSPI_TransferSendBlocking(QuadSPI_Type *base, qspi_transfer_t *xfer)

Writes data to the QSPI transmit buffer.

This function writes a continuous data to the QSPI transmit FIFO. This function is a block function and can return only when finished. This function uses polling methods.

Parameters:

base – Pointer to QuadSPI Type.
xfer – QSPI transfer structure.

static inline void QSPI_TransferReceiveBlocking(QuadSPI_Type *base, qspi_transfer_t *xfer)

Reads data from the QSPI receive buffer in polling way.

This function reads continuous data from the QSPI receive buffer/FIFO. This function is a blocking function and can return only when finished. This function uses polling methods. Users shall notice that this receive size shall not bigger than 64 bytes. As this interface is used to read flash status registers. For flash contents read, please use AHB bus read, this is much more efficiency.

Parameters:

base – Pointer to QuadSPI Type.
xfer – QSPI transfer structure.

FSL_QSPI_DRIVER_VERSION: QSPI driver version.

Status structure of QSPI.

Values:

enumerator kStatus_QSPI_Idle: QSPI is in idle state

enumerator kStatus_QSPI_Busy: QSPI is busy

enumerator kStatus_QSPI_Error: Error occurred during QSPI transfer

enum _qspi_read_area

QSPI read data area, from IP FIFO or AHB buffer.

Values:

enumerator kQSPI_ReadAHB: QSPI read from AHB buffer.

enumerator kQSPI_ReadIP: QSPI read from IP FIFO.

enum _qspi_command_seq

QSPI command sequence type.

Values:

enumerator kQSPI_IPSeq: IP command sequence

enumerator kQSPI_BufferSeq: Buffer command sequence

enumerator kQSPI_AllSeq

enum _qspi_fifo

QSPI buffer type.

Values:

enumerator kQSPI_TxFifo: QSPI Tx FIFO

enumerator kQSPI_RxFifo: QSPI Rx FIFO

enumerator kQSPI_AllFifo: QSPI all FIFO, including Tx and Rx

enum _qspi_error_flags

QSPI error flags.

Values:

enumerator kQSPI_DataLearningFail: Data learning pattern failure flag

enumerator kQSPI_TxBufferFill: Tx buffer fill flag

enumerator kQSPI_TxBufferUnderrun: Tx buffer underrun flag

enumerator kQSPI_IllegalInstruction: Illegal instruction error flag

enumerator kQSPI_RxBufferOverflow: Rx buffer overflow flag

enumerator kQSPI_RxBufferDrain: Rx buffer drain flag

enumerator kQSPI_AHBSequenceError: AHB sequence error flag

enumerator kQSPI_AHBBufferOverflow: AHB buffer overflow flag

enumerator kQSPI_IPCommandUsageError: IP command usage error flag

enumerator kQSPI_IPCommandTriggerDuringAHBAccess: IP command trigger during AHB access error

enumerator kQSPI_IPCommandTriggerDuringIPAccess: IP command trigger cannot be executed

enumerator kQSPI_IPCommandTriggerDuringAHBGrant: IP command trigger during AHB grant error

enumerator kQSPI_IPCommandTransactionFinished: IP command transaction finished flag

enumerator kQSPI_FlagAll: All error flag

enum _qspi_flags

QSPI state bit.

Values:

enumerator kQSPI_DataLearningSamplePoint: Data learning sample point

enumerator kQSPI_TxBufferFull: Tx buffer full flag

enumerator kQSPI_TxBufferEnoughData: Tx buffer enough data available

enumerator kQSPI_RxDMA: Rx DMA is requesting or running

enumerator kQSPI_RxBufferFull: Rx buffer full

enumerator kQSPI_RxWatermark: Rx buffer watermark exceeded

enumerator kQSPI_AHB3BufferFull: AHB buffer 3 full

enumerator kQSPI_AHB2BufferFull: AHB buffer 2 full

enumerator kQSPI_AHB1BufferFull: AHB buffer 1 full

enumerator kQSPI_AHB0BufferFull: AHB buffer 0 full

enumerator kQSPI_AHB3BufferNotEmpty: AHB buffer 3 not empty

enumerator kQSPI_AHB2BufferNotEmpty: AHB buffer 2 not empty

enumerator kQSPI_AHB1BufferNotEmpty: AHB buffer 1 not empty

enumerator kQSPI_AHB0BufferNotEmpty: AHB buffer 0 not empty

enumerator kQSPI_AHBTransactionPending: AHB access transaction pending

enumerator kQSPI_AHBCommandPriorityGranted: AHB command priority granted

enumerator kQSPI_AHBAccess: AHB access

enumerator kQSPI_IPAccess: IP access

enumerator kQSPI_Busy: Module busy

enumerator kQSPI_StateAll: All flags

enum _qspi_interrupt_enable

QSPI interrupt enable.

Values:

enumerator kQSPI_DataLearningFailInterruptEnable: Data learning pattern failure interrupt enable

enumerator kQSPI_TxBufferFillInterruptEnable: Tx buffer fill interrupt enable

enumerator kQSPI_TxBufferUnderrunInterruptEnable: Tx buffer underrun interrupt enable

enumerator kQSPI_IllegalInstructionInterruptEnable: Illegal instruction error interrupt enable

enumerator kQSPI_RxBufferOverflowInterruptEnable: Rx buffer overflow interrupt enable

enumerator kQSPI_RxBufferDrainInterruptEnable: Rx buffer drain interrupt enable

enumerator kQSPI_AHBSequenceErrorInterruptEnable: AHB sequence error interrupt enable

enumerator kQSPI_AHBBufferOverflowInterruptEnable: AHB buffer overflow interrupt enable

enumerator kQSPI_IPCommandUsageErrorInterruptEnable: IP command usage error interrupt enable

enumerator kQSPI_IPCommandTriggerDuringAHBAccessInterruptEnable: IP command trigger during AHB access error

enumerator kQSPI_IPCommandTriggerDuringIPAccessInterruptEnable: IP command trigger cannot be executed

enumerator kQSPI_IPCommandTriggerDuringAHBGrantInterruptEnable: IP command trigger during AHB grant error

enumerator kQSPI_IPCommandTransactionFinishedInterruptEnable: IP command transaction finished interrupt enable

enumerator kQSPI_AllInterruptEnable: All error interrupt enable

enum _qspi_dma_enable

QSPI DMA request flag.

Values:

enumerator kQSPI_RxBufferDrainDMAEnable: Rx buffer drain DMA

enumerator kQSPI_AllDDMAEnable

enum _qspi_dqs_phrase_shift

Phrase shift number for DQS mode.

Values:

enumerator kQSPI_DQSNoPhraseShift: No phase shift

enumerator kQSPI_DQSPhraseShift45Degree: Select 45 degree phase shift

enumerator kQSPI_DQSPhraseShift90Degree: Select 90 degree phase shift

enumerator kQSPI_DQSPhraseShift135Degree: Select 135 degree phase shift

enum _qspi_dqs_read_sample_clock

Qspi read sampling option.

Values:

enumerator kQSPI_ReadSampleClkInternalLoopback: Read sample clock adopts internal loopback mode.

enumerator kQSPI_ReadSampleClkLoopbackFromDqsPad: Dummy Read strobe generated by QSPI Controller and loopback from DQS pad.

enumerator kQSPI_ReadSampleClkExternalInputFromDqsPad: Flash provided Read strobe and input from DQS pad.

typedef enum _qspi_read_area qspi_read_area_t: QSPI read data area, from IP FIFO or AHB buffer.

typedef enum _qspi_command_seq qspi_command_seq_t: QSPI command sequence type.

typedef enum _qspi_fifo qspi_fifo_t: QSPI buffer type.

typedef enum _qspi_dqs_phrase_shift qspi_dqs_phrase_shift_t: Phrase shift number for DQS mode.

typedef enum _qspi_dqs_read_sample_clock qspi_dqs_read_sample_clock_t: Qspi read sampling option.

typedef struct QspiDQSConfig qspi_dqs_config_t: DQS configure features.

typedef struct QspiFlashTiming qspi_flash_timing_t: Flash timing configuration.

typedef struct QspiConfig qspi_config_t: QSPI configuration structure.

typedef struct _qspi_flash_config qspi_flash_config_t: External flash configuration items.

typedef struct _qspi_transfer qspi_transfer_t: Transfer structure for QSPI.

typedef struct _ip_command_config ip_command_config_t: 16-bit access reg for IPCR register

typedef struct _qspi_delay_chain_config qspi_delay_chain_config_t: Slave delay chain configuration items.

QSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1): Macro functions for LUT table.

QSPI_CMD: Macro for QSPI LUT command.

QSPI_ADDR

QSPI_DUMMY

QSPI_MODE

QSPI_MODE2

QSPI_MODE4

QSPI_READ

QSPI_WRITE

QSPI_JMP_ON_CS

QSPI_ADDR_DDR

QSPI_MODE_DDR

QSPI_MODE2_DDR

QSPI_MODE4_DDR

QSPI_READ_DDR

QSPI_WRITE_DDR

QSPI_DATA_LEARN

QSPI_CMD_DDR

QSPI_CADDR

QSPI_CADDR_DDR

QSPI_STOP

QSPI_PAD_1: Macro for QSPI PAD.

QSPI_PAD_2

QSPI_PAD_4

QSPI_PAD_8

struct QspiDQSConfig

#include <fsl_qspi.h>

DQS configure features.

Public Members

uint32_t portADelayTapNum: Delay chain tap number selection for QSPI port A DQS

qspi_dqs_phrase_shift_t shift: Phase shift for internal DQS generation

qspi_dqs_read_sample_clock_t rxSampleClock: Read sample clock for Dqs.

bool enableDQSClkInverse: Enable inverse clock for internal DQS generation

struct QspiFlashTiming

#include <fsl_qspi.h>

Flash timing configuration.

Public Members

uint32_t dataHoldTime: Serial flash data in hold time

uint32_t CSHoldTime: Serial flash CS hold time in terms of serial flash clock cycles

uint32_t CSSetupTime: Serial flash CS setup time in terms of serial flash clock cycles

struct QspiConfig

#include <fsl_qspi.h>

QSPI configuration structure.

Public Members

uint8_t txWatermark: QSPI transmit watermark value

uint8_t rxWatermark: QSPI receive watermark value.

uint32_t AHBbufferSize[1]: AHB buffer size.

uint8_t AHBbufferMaster[1]: AHB buffer master.

bool enableAHBbuffer3AllMaster: Is AHB buffer3 for all master.

qspi_read_area_t area: Which area Rx data readout

bool enableQspi: Enable QSPI after initialization

struct _qspi_flash_config

#include <fsl_qspi.h>

External flash configuration items.

Public Members

uint32_t flashA1Size: Flash A1 size

uint32_t flashA2Size: Flash A2 size

uint32_t flashB1Size: Flash B1 size

uint32_t flashB2Size: Flash B2 size

uint32_t lookuptable[1]: Flash command in LUT

uint32_t CSHoldTime: CS line hold time

uint32_t CSSetupTime: CS line setup time

uint32_t cloumnspace: Column space size

uint32_t dataLearnValue: Data Learn value if enable data learn

bool enableWordAddress: If enable word address.

struct _qspi_transfer

#include <fsl_qspi.h>

Transfer structure for QSPI.

Public Members

uint32_t *data: Pointer to data to transmit

size_t dataSize: Bytes to be transmit

struct _ip_command_config: #include <fsl_qspi.h>

16-bit access reg for IPCR register

struct _qspi_delay_chain_config

#include <fsl_qspi.h>

Slave delay chain configuration items.

Public Members

bool highFreqDelay: Selects delay chain for low/high frequency of operation.

union IPCR_REG

Public Members

__IO uint32_t IPCR: IP Configuration Register

struct _ip_command_config BITFIELD

struct BITFIELD

Public Members

__IO uint16_t IDATZ: 16-bit access for IDATZ field in IPCR register

__IO uint8_t RESERVED_0: 8-bit access for RESERVED_0 field in IPCR register

__IO uint8_t SEQID: 8-bit access for SEQID field in IPCR register

Quad Serial Peripheral Interface EDMA Driver

void QSPI_TransferTxCreateHandleEDMA(QuadSPI_Type *base, qspi_edma_handle_t *handle, qspi_edma_callback_t callback, void *userData, edma_handle_t *dmaHandle)

Initializes the QSPI handle for send which is used in transactional functions and set the callback.

Parameters:

base – QSPI peripheral base address
handle – Pointer to qspi_edma_handle_t structure
callback – QSPI callback, NULL means no callback.
userData – User callback function data.
dmaHandle – User requested eDMA handle for eDMA transfer

void QSPI_TransferRxCreateHandleEDMA(QuadSPI_Type *base, qspi_edma_handle_t *handle, qspi_edma_callback_t callback, void *userData, edma_handle_t *dmaHandle)

Initializes the QSPI handle for receive which is used in transactional functions and set the callback.

Parameters:

base – QSPI peripheral base address
handle – Pointer to qspi_edma_handle_t structure
callback – QSPI callback, NULL means no callback.
userData – User callback function data.
dmaHandle – User requested eDMA handle for eDMA transfer

status_t QSPI_TransferSendEDMA(QuadSPI_Type *base, qspi_edma_handle_t *handle, qspi_transfer_t *xfer)

Transfers QSPI data using an eDMA non-blocking method.

This function writes data to the QSPI transmit FIFO. This function is non-blocking.

Parameters:

base – Pointer to QuadSPI Type.
handle – Pointer to qspi_edma_handle_t structure
xfer – QSPI transfer structure.

status_t QSPI_TransferReceiveEDMA(QuadSPI_Type *base, qspi_edma_handle_t *handle, qspi_transfer_t *xfer)

Receives data using an eDMA non-blocking method.

This function receive data from the QSPI receive buffer/FIFO. This function is non-blocking. Users shall notice that this receive size shall not bigger than 64 bytes. As this interface is used to read flash status registers. For flash contents read, please use AHB bus read, this is much more efficiency.

Parameters:

base – Pointer to QuadSPI Type.
handle – Pointer to qspi_edma_handle_t structure
xfer – QSPI transfer structure.

void QSPI_TransferAbortSendEDMA(QuadSPI_Type *base, qspi_edma_handle_t *handle)

Aborts the sent data using eDMA.

This function aborts the sent data using eDMA.

Parameters:

base – QSPI peripheral base address.
handle – Pointer to qspi_edma_handle_t structure

void QSPI_TransferAbortReceiveEDMA(QuadSPI_Type *base, qspi_edma_handle_t *handle)

Aborts the receive data using eDMA.

This function abort receive data which using eDMA.

Parameters:

base – QSPI peripheral base address.
handle – Pointer to qspi_edma_handle_t structure

status_t QSPI_TransferGetSendCountEDMA(QuadSPI_Type *base, qspi_edma_handle_t *handle, size_t *count)

Gets the transferred counts of send.

Parameters:

base – Pointer to QuadSPI Type.
handle – Pointer to qspi_edma_handle_t structure.
count – Bytes sent.

Return values:

kStatus_Success – Succeed get the transfer count.
kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.

status_t QSPI_TransferGetReceiveCountEDMA(QuadSPI_Type *base, qspi_edma_handle_t *handle, size_t *count)

Gets the status of the receive transfer.

Parameters:

base – Pointer to QuadSPI Type.
handle – Pointer to qspi_edma_handle_t structure
count – Bytes received.

Return values:

kStatus_Success – Succeed get the transfer count.
kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.

FSL_QSPI_EDMA_DRIVER_VERSION: QSPI EDMA driver version.

typedef struct _qspi_edma_handle qspi_edma_handle_t

typedef void (*qspi_edma_callback_t)(QuadSPI_Type *base, qspi_edma_handle_t *handle, status_t status, void *userData): QSPI eDMA transfer callback function for finish and error.

struct _qspi_edma_handle

#include <fsl_qspi_edma.h>

QSPI DMA transfer handle, users should not touch the content of the handle.

Public Members

edma_handle_t *dmaHandle: eDMA handler for QSPI send

size_t transferSize: Bytes need to transfer.

uint8_t nbytes: eDMA minor byte transfer count initially configured.

uint8_t count: The transfer data count in a DMA request

uint32_t state: Internal state for QSPI eDMA transfer

qspi_edma_callback_t callback: Callback for users while transfer finish or error occurred

void *userData: User callback parameter

RCM: Reset Control Module Driver

static inline void RCM_GetVersionId(RCM_Type *base, rcm_version_id_t *versionId)

Gets the RCM version ID.

This function gets the RCM version ID including the major version number, the minor version number, and the feature specification number.

Parameters:

base – RCM peripheral base address.
versionId – Pointer to the version ID structure.

static inline uint32_t RCM_GetResetSourceImplementedStatus(RCM_Type *base)

Gets the reset source implemented status.

This function gets the RCM parameter that indicates whether the corresponding reset source is implemented. Use source masks defined in the rcm_reset_source_t to get the desired source status.

This is an example.

uint32_t status;

To test whether the MCU is reset using Watchdog.
status = RCM_GetResetSourceImplementedStatus(RCM) & (kRCM_SourceWdog | kRCM_SourcePin);

Parameters:

base – RCM peripheral base address.

Returns:

All reset source implemented status bit map.

static inline uint32_t RCM_GetPreviousResetSources(RCM_Type *base)

Gets the reset source status which caused a previous reset.

This function gets the current reset source status. Use source masks defined in the rcm_reset_source_t to get the desired source status.

This is an example.

uint32_t resetStatus;

To get all reset source statuses.
resetStatus = RCM_GetPreviousResetSources(RCM) & kRCM_SourceAll;

To test whether the MCU is reset using Watchdog.
resetStatus = RCM_GetPreviousResetSources(RCM) & kRCM_SourceWdog;

To test multiple reset sources.
resetStatus = RCM_GetPreviousResetSources(RCM) & (kRCM_SourceWdog | kRCM_SourcePin);

Parameters:

base – RCM peripheral base address.

Returns:

All reset source status bit map.

static inline uint32_t RCM_GetStickyResetSources(RCM_Type *base)

Gets the sticky reset source status.

This function gets the current reset source status that has not been cleared by software for a specific source.

This is an example.

uint32_t resetStatus;

To get all reset source statuses.
resetStatus = RCM_GetStickyResetSources(RCM) & kRCM_SourceAll;

To test whether the MCU is reset using Watchdog.
resetStatus = RCM_GetStickyResetSources(RCM) & kRCM_SourceWdog;

To test multiple reset sources.
resetStatus = RCM_GetStickyResetSources(RCM) & (kRCM_SourceWdog | kRCM_SourcePin);

Parameters:

base – RCM peripheral base address.

Returns:

All reset source status bit map.

static inline void RCM_ClearStickyResetSources(RCM_Type *base, uint32_t sourceMasks)

Clears the sticky reset source status.

This function clears the sticky system reset flags indicated by source masks.

This is an example.

Clears multiple reset sources.
RCM_ClearStickyResetSources(kRCM_SourceWdog | kRCM_SourcePin);

Parameters:

base – RCM peripheral base address.
sourceMasks – reset source status bit map

void RCM_ConfigureResetPinFilter(RCM_Type *base, const rcm_reset_pin_filter_config_t *config)

Configures the reset pin filter.

This function sets the reset pin filter including the filter source, filter width, and so on.

Parameters:

base – RCM peripheral base address.
config – Pointer to the configuration structure.

static inline bool RCM_GetEasyPortModePinStatus(RCM_Type *base)

Gets the EZP_MS_B pin assert status.

This function gets the easy port mode status (EZP_MS_B) pin assert status.

Parameters:

base – RCM peripheral base address.

Returns:

status true - asserted, false - reasserted

static inline rcm_boot_rom_config_t RCM_GetBootRomSource(RCM_Type *base)

Gets the ROM boot source.

This function gets the ROM boot source during the last chip reset.

Parameters:

base – RCM peripheral base address.

Returns:

The ROM boot source.

static inline void RCM_ClearBootRomSource(RCM_Type *base)

Clears the ROM boot source flag.

This function clears the ROM boot source flag.

Parameters:

base – Register base address of RCM

void RCM_SetForceBootRomSource(RCM_Type *base, rcm_boot_rom_config_t config)

Forces the boot from ROM.

This function forces booting from ROM during all subsequent system resets.

Parameters:

base – RCM peripheral base address.
config – Boot configuration.

static inline void RCM_SetSystemResetInterruptConfig(RCM_Type *base, uint32_t intMask, rcm_reset_delay_t delay)

Sets the system reset interrupt configuration.

For a graceful shut down, the RCM supports delaying the assertion of the system reset for a period of time when the reset interrupt is generated. This function can be used to enable the interrupt and the delay period. The interrupts are passed in as bit mask. See rcm_int_t for details. For example, to delay a reset for 512 LPO cycles after the WDOG timeout or loss-of-clock occurs, configure as follows: RCM_SetSystemResetInterruptConfig(kRCM_IntWatchDog | kRCM_IntLossOfClk, kRCM_ResetDelay512Lpo);

Parameters:

base – RCM peripheral base address.
intMask – Bit mask of the system reset interrupts to enable. See rcm_interrupt_enable_t for details.
delay – Bit mask of the system reset interrupts to enable.

FSL_RCM_DRIVER_VERSION: RCM driver version 2.0.4.

enum _rcm_reset_source

System Reset Source Name definitions.

Values:

enumerator kRCM_SourceWakeup: Low-leakage wakeup reset

enumerator kRCM_SourceLvd: Low-voltage detect reset

enumerator kRCM_SourceLoc: Loss of clock reset

enumerator kRCM_SourceLol: Loss of lock reset

enumerator kRCM_SourceWdog: Watchdog reset

enumerator kRCM_SourcePin: External pin reset

enumerator kRCM_SourcePor: Power on reset

enumerator kRCM_SourceJtag: JTAG generated reset

enumerator kRCM_SourceLockup: Core lock up reset

enumerator kRCM_SourceSw: Software reset

enumerator kRCM_SourceMdmap: MDM-AP system reset

enumerator kRCM_SourceEzpt: EzPort reset

enumerator kRCM_SourceSackerr: Parameter could get all reset flags

enumerator kRCM_SourceAll

enum _rcm_run_wait_filter_mode

Reset pin filter select in Run and Wait modes.

Values:

enumerator kRCM_FilterDisable: All filtering disabled

enumerator kRCM_FilterBusClock: Bus clock filter enabled

enumerator kRCM_FilterLpoClock: LPO clock filter enabled

enum _rcm_boot_rom_config

Boot from ROM configuration.

Values:

enumerator kRCM_BootFlash: Boot from flash

enumerator kRCM_BootRomCfg0: Boot from boot ROM due to BOOTCFG0

enumerator kRCM_BootRomFopt: Boot from boot ROM due to FOPT[7]

enumerator kRCM_BootRomBoth: Boot from boot ROM due to both BOOTCFG0 and FOPT[7]

enum _rcm_reset_delay

Maximum delay time from interrupt asserts to system reset.

Values:

enumerator kRCM_ResetDelay8Lpo: Delay 8 LPO cycles.

enumerator kRCM_ResetDelay32Lpo: Delay 32 LPO cycles.

enumerator kRCM_ResetDelay128Lpo: Delay 128 LPO cycles.

enumerator kRCM_ResetDelay512Lpo: Delay 512 LPO cycles.

enum _rcm_interrupt_enable

System reset interrupt enable bit definitions.

Values:

enumerator kRCM_IntNone: No interrupt enabled.

enumerator kRCM_IntLossOfClk: Loss of clock interrupt.

enumerator kRCM_IntLossOfLock: Loss of lock interrupt.

enumerator kRCM_IntWatchDog: Watch dog interrupt.

enumerator kRCM_IntExternalPin: External pin interrupt.

enumerator kRCM_IntGlobal: Global interrupts.

enumerator kRCM_IntCoreLockup: Core lock up interrupt

enumerator kRCM_IntSoftware: software interrupt

enumerator kRCM_IntStopModeAckErr: Stop mode ACK error interrupt.

enumerator kRCM_IntCore1: Core 1 interrupt.

enumerator kRCM_IntAll: Enable all interrupts.

typedef enum _rcm_reset_source rcm_reset_source_t: System Reset Source Name definitions.

typedef enum _rcm_run_wait_filter_mode rcm_run_wait_filter_mode_t: Reset pin filter select in Run and Wait modes.

typedef enum _rcm_boot_rom_config rcm_boot_rom_config_t: Boot from ROM configuration.

typedef enum _rcm_reset_delay rcm_reset_delay_t: Maximum delay time from interrupt asserts to system reset.

typedef enum _rcm_interrupt_enable rcm_interrupt_enable_t: System reset interrupt enable bit definitions.

typedef struct _rcm_version_id rcm_version_id_t: IP version ID definition.

typedef struct _rcm_reset_pin_filter_config rcm_reset_pin_filter_config_t: Reset pin filter configuration.

struct _rcm_version_id

#include <fsl_rcm.h>

IP version ID definition.

Public Members

uint16_t feature: Feature Specification Number.

uint8_t minor: Minor version number.

uint8_t major: Major version number.

struct _rcm_reset_pin_filter_config

#include <fsl_rcm.h>

Reset pin filter configuration.

Public Members

bool enableFilterInStop: Reset pin filter select in stop mode.

rcm_run_wait_filter_mode_t filterInRunWait: Reset pin filter in run/wait mode.

uint8_t busClockFilterCount: Reset pin bus clock filter width.

RTC: Real Time Clock

void RTC_Init(RTC_Type *base, const rtc_config_t *config)

Ungates the RTC clock and configures the peripheral for basic operation.

This function issues a software reset if the timer invalid flag is set.

Note

This API should be called at the beginning of the application using the RTC driver.

Parameters:

base – RTC peripheral base address
config – Pointer to the user’s RTC configuration structure.

static inline void RTC_Deinit(RTC_Type *base)

Stops the timer and gate the RTC clock.

Parameters:

base – RTC peripheral base address

void RTC_GetDefaultConfig(rtc_config_t *config)

Fills in the RTC config struct with the default settings.

The default values are as follows.

config->wakeupSelect = false;
config->updateMode = false;
config->supervisorAccess = false;
config->compensationInterval = 0;
config->compensationTime = 0;

Parameters:

config – Pointer to the user’s RTC configuration structure.

status_t RTC_SetDatetime(RTC_Type *base, const rtc_datetime_t *datetime)

Sets the RTC date and time according to the given time structure.

The RTC counter must be stopped prior to calling this function because writes to the RTC seconds register fail if the RTC counter is running.

Parameters:

base – RTC peripheral base address
datetime – Pointer to the structure where the date and time details are stored.

Returns:

kStatus_Success: Success in setting the time and starting the RTC kStatus_InvalidArgument: Error because the datetime format is incorrect

void RTC_GetDatetime(RTC_Type *base, rtc_datetime_t *datetime)

Gets the RTC time and stores it in the given time structure.

Parameters:

base – RTC peripheral base address
datetime – Pointer to the structure where the date and time details are stored.

status_t RTC_SetAlarm(RTC_Type *base, const rtc_datetime_t *alarmTime)

Sets the RTC alarm time.

The function checks whether the specified alarm time is greater than the present time. If not, the function does not set the alarm and returns an error.

Parameters:

base – RTC peripheral base address
alarmTime – Pointer to the structure where the alarm time is stored.

Returns:

kStatus_Success: success in setting the RTC alarm kStatus_InvalidArgument: Error because the alarm datetime format is incorrect kStatus_Fail: Error because the alarm time has already passed

void RTC_GetAlarm(RTC_Type *base, rtc_datetime_t *datetime)

Returns the RTC alarm time.

Parameters:

base – RTC peripheral base address
datetime – Pointer to the structure where the alarm date and time details are stored.

void RTC_EnableInterrupts(RTC_Type *base, uint32_t mask)

Enables the selected RTC interrupts.

Parameters:

base – RTC peripheral base address
mask – The interrupts to enable. This is a logical OR of members of the enumeration rtc_interrupt_enable_t

void RTC_DisableInterrupts(RTC_Type *base, uint32_t mask)

Disables the selected RTC interrupts.

Parameters:

base – RTC peripheral base address
mask – The interrupts to enable. This is a logical OR of members of the enumeration rtc_interrupt_enable_t

uint32_t RTC_GetEnabledInterrupts(RTC_Type *base)

Gets the enabled RTC interrupts.

Parameters:

base – RTC peripheral base address

Returns:

The enabled interrupts. This is the logical OR of members of the enumeration rtc_interrupt_enable_t

uint32_t RTC_GetStatusFlags(RTC_Type *base)

Gets the RTC status flags.

Parameters:

base – RTC peripheral base address

Returns:

The status flags. This is the logical OR of members of the enumeration rtc_status_flags_t

void RTC_ClearStatusFlags(RTC_Type *base, uint32_t mask)

Clears the RTC status flags.

Parameters:

base – RTC peripheral base address
mask – The status flags to clear. This is a logical OR of members of the enumeration rtc_status_flags_t

static inline void RTC_EnableLPOClock(RTC_Type *base, bool enable)

Enable/Disable RTC 1kHz LPO clock.

Note

After setting this bit, RTC prescaler increments using the LPO 1kHz clock and not the RTC 32kHz crystal clock.

Parameters:

base – RTC peripheral base address
enable – Enable/Disable RTC 1kHz LPO clock

static inline void RTC_StartTimer(RTC_Type *base)

Starts the RTC time counter.

After calling this function, the timer counter increments once a second provided SR[TOF] or SR[TIF] are not set.

Parameters:

base – RTC peripheral base address

static inline void RTC_StopTimer(RTC_Type *base)

Stops the RTC time counter.

RTC’s seconds register can be written to only when the timer is stopped.

Parameters:

base – RTC peripheral base address

void RTC_GetMonotonicCounter(RTC_Type *base, uint64_t *counter)

Reads the values of the Monotonic Counter High and Monotonic Counter Low and returns them as a single value.

Parameters:

base – RTC peripheral base address
counter – Pointer to variable where the value is stored.

void RTC_SetMonotonicCounter(RTC_Type *base, uint64_t counter)

Writes values Monotonic Counter High and Monotonic Counter Low by decomposing the given single value. The Monotonic Overflow Flag in RTC_SR is cleared due to the API.

Parameters:

base – RTC peripheral base address
counter – Counter value

status_t RTC_IncrementMonotonicCounter(RTC_Type *base)

Increments the Monotonic Counter by one.

Increments the Monotonic Counter (registers RTC_MCLR and RTC_MCHR accordingly) by setting the monotonic counter enable (MER[MCE]) and then writing to the RTC_MCLR register. A write to the monotonic counter low that causes it to overflow also increments the monotonic counter high.

Parameters:

base – RTC peripheral base address

Returns:

kStatus_Success: success kStatus_Fail: error occurred, either time invalid or monotonic overflow flag was found

FSL_RTC_DRIVER_VERSION: Version 2.3.3

enum _rtc_interrupt_enable

List of RTC interrupts.

Values:

enumerator kRTC_TimeInvalidInterruptEnable: Time invalid interrupt.

enumerator kRTC_TimeOverflowInterruptEnable: Time overflow interrupt.

enumerator kRTC_AlarmInterruptEnable: Alarm interrupt.

enumerator kRTC_MonotonicOverflowInterruptEnable: Monotonic Overflow Interrupt Enable

enumerator kRTC_SecondsInterruptEnable: Seconds interrupt.

enumerator kRTC_TestModeInterruptEnable

enumerator kRTC_FlashSecurityInterruptEnable

enumerator kRTC_TamperPinInterruptEnable

enumerator kRTC_SecurityModuleInterruptEnable

enumerator kRTC_LossOfClockInterruptEnable

enum _rtc_status_flags

List of RTC flags.

Values:

enumerator kRTC_TimeInvalidFlag: Time invalid flag

enumerator kRTC_TimeOverflowFlag: Time overflow flag

enumerator kRTC_AlarmFlag: Alarm flag

enumerator kRTC_MonotonicOverflowFlag: Monotonic Overflow Flag

enumerator kRTC_TamperInterruptDetectFlag: Tamper interrupt detect flag

enumerator kRTC_TestModeFlag

enumerator kRTC_FlashSecurityFlag

enumerator kRTC_TamperPinFlag

enumerator kRTC_SecurityTamperFlag

enumerator kRTC_LossOfClockTamperFlag

enum _rtc_osc_cap_load

List of RTC Oscillator capacitor load settings.

Values:

enumerator kRTC_Capacitor_2p: 2 pF capacitor load

enumerator kRTC_Capacitor_4p: 4 pF capacitor load

enumerator kRTC_Capacitor_8p: 8 pF capacitor load

enumerator kRTC_Capacitor_16p: 16 pF capacitor load

typedef enum _rtc_interrupt_enable rtc_interrupt_enable_t: List of RTC interrupts.

typedef enum _rtc_status_flags rtc_status_flags_t: List of RTC flags.

typedef enum _rtc_osc_cap_load rtc_osc_cap_load_t: List of RTC Oscillator capacitor load settings.

typedef struct _rtc_datetime rtc_datetime_t: Structure is used to hold the date and time.

typedef struct _rtc_pin_config rtc_pin_config_t: RTC pin config structure.

typedef struct _rtc_config rtc_config_t

RTC config structure.

This structure holds the configuration settings for the RTC peripheral. To initialize this structure to reasonable defaults, call the RTC_GetDefaultConfig() function and pass a pointer to your config structure instance.

The config struct can be made const so it resides in flash

static inline uint32_t RTC_GetTamperTimeSeconds(RTC_Type *base)

Get the RTC tamper time seconds.

Parameters:

base – RTC peripheral base address

static inline void RTC_SetOscCapLoad(RTC_Type *base, uint32_t capLoad)

This function sets the specified capacitor configuration for the RTC oscillator.

Parameters:

base – RTC peripheral base address
capLoad – Oscillator loads to enable. This is a logical OR of members of the enumeration rtc_osc_cap_load_t

static inline void RTC_Reset(RTC_Type *base)

Performs a software reset on the RTC module.

This resets all RTC registers except for the SWR bit and the RTC_WAR and RTC_RAR registers. The SWR bit is cleared by software explicitly clearing it.

Parameters:

base – RTC peripheral base address

static inline void RTC_EnableWakeUpPin(RTC_Type *base, bool enable)

Enables or disables the RTC Wakeup Pin Operation.

This function enable or disable RTC Wakeup Pin. The wakeup pin is optional and not available on all devices.

Parameters:

base – RTC_Type base pointer.
enable – true to enable, false to disable.

struct _rtc_datetime

#include <fsl_rtc.h>

Structure is used to hold the date and time.

Public Members

uint16_t year: Range from 1970 to 2099.

uint8_t month: Range from 1 to 12.

uint8_t day: Range from 1 to 31 (depending on month).

uint8_t hour: Range from 0 to 23.

uint8_t minute: Range from 0 to 59.

uint8_t second: Range from 0 to 59.

struct _rtc_pin_config

#include <fsl_rtc.h>

RTC pin config structure.

Public Members

bool inputLogic: true: Tamper pin input data is logic one. false: Tamper pin input data is logic zero.

bool pinActiveLow: true: Tamper pin is active low. false: Tamper pin is active high.

bool filterEnable: true: Input filter is enabled on the tamper pin. false: Input filter is disabled on the tamper pin.

bool pullSelectNegate: true: Tamper pin pull resistor direction will negate the tamper pin. false: Tamper pin pull resistor direction will assert the tamper pin.

bool pullEnable: true: Pull resistor is enabled on tamper pin. false: Pull resistor is disabled on tamper pin.

struct _rtc_config

#include <fsl_rtc.h>

RTC config structure.

This structure holds the configuration settings for the RTC peripheral. To initialize this structure to reasonable defaults, call the RTC_GetDefaultConfig() function and pass a pointer to your config structure instance.

The config struct can be made const so it resides in flash

Public Members

bool wakeupSelect: true: Wakeup pin outputs the 32 KHz clock; false:Wakeup pin used to wakeup the chip

bool updateMode: true: Registers can be written even when locked under certain conditions, false: No writes allowed when registers are locked

bool supervisorAccess: true: Non-supervisor accesses are allowed; false: Non-supervisor accesses are not supported

uint32_t compensationInterval: Compensation interval that is written to the CIR field in RTC TCR Register

uint32_t compensationTime: Compensation time that is written to the TCR field in RTC TCR Register

SAI: Serial Audio Interface

SAI Driver

void SAI_Init(I2S_Type *base)

Initializes the SAI peripheral.

This API gates the SAI clock. The SAI module can’t operate unless SAI_Init is called to enable the clock.

Parameters:

base – SAI base pointer.

void SAI_Deinit(I2S_Type *base)

De-initializes the SAI peripheral.

This API gates the SAI clock. The SAI module can’t operate unless SAI_TxInit or SAI_RxInit is called to enable the clock.

Parameters:

base – SAI base pointer.

void SAI_TxReset(I2S_Type *base)

Resets the SAI Tx.

This function enables the software reset and FIFO reset of SAI Tx. After reset, clear the reset bit.

Parameters:

base – SAI base pointer

void SAI_RxReset(I2S_Type *base)

Resets the SAI Rx.

This function enables the software reset and FIFO reset of SAI Rx. After reset, clear the reset bit.

Parameters:

base – SAI base pointer

void SAI_TxEnable(I2S_Type *base, bool enable)

Enables/disables the SAI Tx.

Parameters:

base – SAI base pointer.
enable – True means enable SAI Tx, false means disable.

void SAI_RxEnable(I2S_Type *base, bool enable)

Enables/disables the SAI Rx.

Parameters:

base – SAI base pointer.
enable – True means enable SAI Rx, false means disable.

static inline void SAI_TxSetBitClockDirection(I2S_Type *base, sai_master_slave_t masterSlave)

Set Rx bit clock direction.

Select bit clock direction, master or slave.

Parameters:

base – SAI base pointer.
masterSlave – reference sai_master_slave_t.

static inline void SAI_RxSetBitClockDirection(I2S_Type *base, sai_master_slave_t masterSlave)

Set Rx bit clock direction.

Select bit clock direction, master or slave.

Parameters:

base – SAI base pointer.
masterSlave – reference sai_master_slave_t.

static inline void SAI_RxSetFrameSyncDirection(I2S_Type *base, sai_master_slave_t masterSlave)

Set Rx frame sync direction.

Select frame sync direction, master or slave.

Parameters:

base – SAI base pointer.
masterSlave – reference sai_master_slave_t.

static inline void SAI_TxSetFrameSyncDirection(I2S_Type *base, sai_master_slave_t masterSlave)

Set Tx frame sync direction.

Select frame sync direction, master or slave.

Parameters:

base – SAI base pointer.
masterSlave – reference sai_master_slave_t.

void SAI_TxSetBitClockRate(I2S_Type *base, uint32_t sourceClockHz, uint32_t sampleRate, uint32_t bitWidth, uint32_t channelNumbers)

Transmitter bit clock rate configurations.

Parameters:

base – SAI base pointer.
sourceClockHz – Bit clock source frequency.
sampleRate – Audio data sample rate.
bitWidth – Audio data bitWidth.
channelNumbers – Audio channel numbers.

void SAI_RxSetBitClockRate(I2S_Type *base, uint32_t sourceClockHz, uint32_t sampleRate, uint32_t bitWidth, uint32_t channelNumbers)

Receiver bit clock rate configurations.

Parameters:

base – SAI base pointer.
sourceClockHz – Bit clock source frequency.
sampleRate – Audio data sample rate.
bitWidth – Audio data bitWidth.
channelNumbers – Audio channel numbers.

void SAI_TxSetBitclockConfig(I2S_Type *base, sai_master_slave_t masterSlave, sai_bit_clock_t *config)

Transmitter Bit clock configurations.

Parameters:

base – SAI base pointer.
masterSlave – master or slave.
config – bit clock other configurations, can be NULL in slave mode.

void SAI_RxSetBitclockConfig(I2S_Type *base, sai_master_slave_t masterSlave, sai_bit_clock_t *config)

Receiver Bit clock configurations.

Parameters:

base – SAI base pointer.
masterSlave – master or slave.
config – bit clock other configurations, can be NULL in slave mode.

void SAI_SetMasterClockConfig(I2S_Type *base, sai_master_clock_t *config)

Master clock configurations.

Parameters:

base – SAI base pointer.
config – master clock configurations.

void SAI_TxSetFifoConfig(I2S_Type *base, sai_fifo_t *config)

SAI transmitter fifo configurations.

Parameters:

base – SAI base pointer.
config – fifo configurations.

void SAI_RxSetFifoConfig(I2S_Type *base, sai_fifo_t *config)

SAI receiver fifo configurations.

Parameters:

base – SAI base pointer.
config – fifo configurations.

void SAI_TxSetFrameSyncConfig(I2S_Type *base, sai_master_slave_t masterSlave, sai_frame_sync_t *config)

SAI transmitter Frame sync configurations.

Parameters:

base – SAI base pointer.
masterSlave – master or slave.
config – frame sync configurations, can be NULL in slave mode.

void SAI_RxSetFrameSyncConfig(I2S_Type *base, sai_master_slave_t masterSlave, sai_frame_sync_t *config)

SAI receiver Frame sync configurations.

Parameters:

base – SAI base pointer.
masterSlave – master or slave.
config – frame sync configurations, can be NULL in slave mode.

void SAI_TxSetSerialDataConfig(I2S_Type *base, sai_serial_data_t *config)

SAI transmitter Serial data configurations.

Parameters:

base – SAI base pointer.
config – serial data configurations.

void SAI_RxSetSerialDataConfig(I2S_Type *base, sai_serial_data_t *config)

SAI receiver Serial data configurations.

Parameters:

base – SAI base pointer.
config – serial data configurations.

void SAI_TxSetConfig(I2S_Type *base, sai_transceiver_t *config)

SAI transmitter configurations.

Parameters:

base – SAI base pointer.
config – transmitter configurations.

void SAI_RxSetConfig(I2S_Type *base, sai_transceiver_t *config)

SAI receiver configurations.

Parameters:

base – SAI base pointer.
config – receiver configurations.

void SAI_GetClassicI2SConfig(sai_transceiver_t *config, sai_word_width_t bitWidth, sai_mono_stereo_t mode, uint32_t saiChannelMask)

Get classic I2S mode configurations.

Parameters:

config – transceiver configurations.
bitWidth – audio data bitWidth.
mode – audio data channel.
saiChannelMask – mask value of the channel to be enable.

void SAI_GetLeftJustifiedConfig(sai_transceiver_t *config, sai_word_width_t bitWidth, sai_mono_stereo_t mode, uint32_t saiChannelMask)

Get left justified mode configurations.

Parameters:

config – transceiver configurations.
bitWidth – audio data bitWidth.
mode – audio data channel.
saiChannelMask – mask value of the channel to be enable.

void SAI_GetRightJustifiedConfig(sai_transceiver_t *config, sai_word_width_t bitWidth, sai_mono_stereo_t mode, uint32_t saiChannelMask)

Get right justified mode configurations.

Parameters:

config – transceiver configurations.
bitWidth – audio data bitWidth.
mode – audio data channel.
saiChannelMask – mask value of the channel to be enable.

void SAI_GetTDMConfig(sai_transceiver_t *config, sai_frame_sync_len_t frameSyncWidth, sai_word_width_t bitWidth, uint32_t dataWordNum, uint32_t saiChannelMask)

Get TDM mode configurations.

Parameters:

config – transceiver configurations.
frameSyncWidth – length of frame sync.
bitWidth – audio data word width.
dataWordNum – word number in one frame.
saiChannelMask – mask value of the channel to be enable.

void SAI_GetDSPConfig(sai_transceiver_t *config, sai_frame_sync_len_t frameSyncWidth, sai_word_width_t bitWidth, sai_mono_stereo_t mode, uint32_t saiChannelMask)

Get DSP mode configurations.

DSP/PCM MODE B configuration flow for TX. RX is similiar but uses SAI_RxSetConfig instead of SAI_TxSetConfig:

SAI_GetDSPConfig(config, kSAI_FrameSyncLenOneBitClk, bitWidth, kSAI_Stereo, channelMask)
SAI_TxSetConfig(base, config)

Note

DSP mode is also called PCM mode which support MODE A and MODE B, DSP/PCM MODE A configuration flow. RX is similiar but uses SAI_RxSetConfig instead of SAI_TxSetConfig:

SAI_GetDSPConfig(config, kSAI_FrameSyncLenOneBitClk, bitWidth, kSAI_Stereo, channelMask)
config->frameSync.frameSyncEarly    = true;
SAI_TxSetConfig(base, config)

Parameters:

config – transceiver configurations.
frameSyncWidth – length of frame sync.
bitWidth – audio data bitWidth.
mode – audio data channel.
saiChannelMask – mask value of the channel to enable.

static inline uint32_t SAI_TxGetStatusFlag(I2S_Type *base)

Gets the SAI Tx status flag state.

Parameters:

base – SAI base pointer

Returns:

SAI Tx status flag value. Use the Status Mask to get the status value needed.

static inline void SAI_TxClearStatusFlags(I2S_Type *base, uint32_t mask)

Clears the SAI Tx status flag state.

Parameters:

base – SAI base pointer
mask – State mask. It can be a combination of the following source if defined:
- kSAI_WordStartFlag
- kSAI_SyncErrorFlag
- kSAI_FIFOErrorFlag

static inline uint32_t SAI_RxGetStatusFlag(I2S_Type *base)

Gets the SAI Tx status flag state.

Parameters:

base – SAI base pointer

Returns:

SAI Rx status flag value. Use the Status Mask to get the status value needed.

static inline void SAI_RxClearStatusFlags(I2S_Type *base, uint32_t mask)

Clears the SAI Rx status flag state.

Parameters:

base – SAI base pointer
mask – State mask. It can be a combination of the following sources if defined.
- kSAI_WordStartFlag
- kSAI_SyncErrorFlag
- kSAI_FIFOErrorFlag

void SAI_TxSoftwareReset(I2S_Type *base, sai_reset_type_t resetType)

Do software reset or FIFO reset .

FIFO reset means clear all the data in the FIFO, and make the FIFO pointer both to 0. Software reset means clear the Tx internal logic, including the bit clock, frame count etc. But software reset will not clear any configuration registers like TCR1~TCR5. This function will also clear all the error flags such as FIFO error, sync error etc.

Parameters:

base – SAI base pointer
resetType – Reset type, FIFO reset or software reset

void SAI_RxSoftwareReset(I2S_Type *base, sai_reset_type_t resetType)

Do software reset or FIFO reset .

FIFO reset means clear all the data in the FIFO, and make the FIFO pointer both to 0. Software reset means clear the Rx internal logic, including the bit clock, frame count etc. But software reset will not clear any configuration registers like RCR1~RCR5. This function will also clear all the error flags such as FIFO error, sync error etc.

Parameters:

base – SAI base pointer
resetType – Reset type, FIFO reset or software reset

void SAI_TxSetChannelFIFOMask(I2S_Type *base, uint8_t mask)

Set the Tx channel FIFO enable mask.

Parameters:

base – SAI base pointer
mask – Channel enable mask, 0 means all channel FIFO disabled, 1 means channel 0 enabled, 3 means both channel 0 and channel 1 enabled.

void SAI_RxSetChannelFIFOMask(I2S_Type *base, uint8_t mask)

Set the Rx channel FIFO enable mask.

Parameters:

base – SAI base pointer
mask – Channel enable mask, 0 means all channel FIFO disabled, 1 means channel 0 enabled, 3 means both channel 0 and channel 1 enabled.

void SAI_TxSetDataOrder(I2S_Type *base, sai_data_order_t order)

Set the Tx data order.

Parameters:

base – SAI base pointer
order – Data order MSB or LSB

void SAI_RxSetDataOrder(I2S_Type *base, sai_data_order_t order)

Set the Rx data order.

Parameters:

base – SAI base pointer
order – Data order MSB or LSB

void SAI_TxSetBitClockPolarity(I2S_Type *base, sai_clock_polarity_t polarity)

Set the Tx data order.

Parameters:

base – SAI base pointer
polarity –

void SAI_RxSetBitClockPolarity(I2S_Type *base, sai_clock_polarity_t polarity)

Set the Rx data order.

Parameters:

base – SAI base pointer
polarity –

void SAI_TxSetFrameSyncPolarity(I2S_Type *base, sai_clock_polarity_t polarity)

Set the Tx data order.

Parameters:

base – SAI base pointer
polarity –

void SAI_RxSetFrameSyncPolarity(I2S_Type *base, sai_clock_polarity_t polarity)

Set the Rx data order.

Parameters:

base – SAI base pointer
polarity –

void SAI_TxSetFIFOPacking(I2S_Type *base, sai_fifo_packing_t pack)

Set Tx FIFO packing feature.

Parameters:

base – SAI base pointer.
pack – FIFO pack type. It is element of sai_fifo_packing_t.

void SAI_RxSetFIFOPacking(I2S_Type *base, sai_fifo_packing_t pack)

Set Rx FIFO packing feature.

Parameters:

base – SAI base pointer.
pack – FIFO pack type. It is element of sai_fifo_packing_t.

static inline void SAI_TxSetFIFOErrorContinue(I2S_Type *base, bool isEnabled)

Set Tx FIFO error continue.

FIFO error continue mode means SAI will keep running while FIFO error occurred. If this feature not enabled, SAI will hang and users need to clear FEF flag in TCSR register.

Parameters:

base – SAI base pointer.
isEnabled – Is FIFO error continue enabled, true means enable, false means disable.

static inline void SAI_RxSetFIFOErrorContinue(I2S_Type *base, bool isEnabled)

Set Rx FIFO error continue.

FIFO error continue mode means SAI will keep running while FIFO error occurred. If this feature not enabled, SAI will hang and users need to clear FEF flag in RCSR register.

Parameters:

base – SAI base pointer.
isEnabled – Is FIFO error continue enabled, true means enable, false means disable.

static inline void SAI_TxEnableInterrupts(I2S_Type *base, uint32_t mask)

Enables the SAI Tx interrupt requests.

Parameters:

base – SAI base pointer
mask – interrupt source The parameter can be a combination of the following sources if defined.
- kSAI_WordStartInterruptEnable
- kSAI_SyncErrorInterruptEnable
- kSAI_FIFOWarningInterruptEnable
- kSAI_FIFORequestInterruptEnable
- kSAI_FIFOErrorInterruptEnable

static inline void SAI_RxEnableInterrupts(I2S_Type *base, uint32_t mask)

Enables the SAI Rx interrupt requests.

Parameters:

base – SAI base pointer
mask – interrupt source The parameter can be a combination of the following sources if defined.
- kSAI_WordStartInterruptEnable
- kSAI_SyncErrorInterruptEnable
- kSAI_FIFOWarningInterruptEnable
- kSAI_FIFORequestInterruptEnable
- kSAI_FIFOErrorInterruptEnable

static inline void SAI_TxDisableInterrupts(I2S_Type *base, uint32_t mask)

Disables the SAI Tx interrupt requests.

Parameters:

base – SAI base pointer
mask – interrupt source The parameter can be a combination of the following sources if defined.
- kSAI_WordStartInterruptEnable
- kSAI_SyncErrorInterruptEnable
- kSAI_FIFOWarningInterruptEnable
- kSAI_FIFORequestInterruptEnable
- kSAI_FIFOErrorInterruptEnable

static inline void SAI_RxDisableInterrupts(I2S_Type *base, uint32_t mask)

Disables the SAI Rx interrupt requests.

Parameters:

base – SAI base pointer
mask – interrupt source The parameter can be a combination of the following sources if defined.
- kSAI_WordStartInterruptEnable
- kSAI_SyncErrorInterruptEnable
- kSAI_FIFOWarningInterruptEnable
- kSAI_FIFORequestInterruptEnable
- kSAI_FIFOErrorInterruptEnable

static inline void SAI_TxEnableDMA(I2S_Type *base, uint32_t mask, bool enable)

Enables/disables the SAI Tx DMA requests.

Parameters:

base – SAI base pointer
mask – DMA source The parameter can be combination of the following sources if defined.
- kSAI_FIFOWarningDMAEnable
- kSAI_FIFORequestDMAEnable
enable – True means enable DMA, false means disable DMA.

static inline void SAI_RxEnableDMA(I2S_Type *base, uint32_t mask, bool enable)

Enables/disables the SAI Rx DMA requests.

Parameters:

base – SAI base pointer
mask – DMA source The parameter can be a combination of the following sources if defined.
- kSAI_FIFOWarningDMAEnable
- kSAI_FIFORequestDMAEnable
enable – True means enable DMA, false means disable DMA.

static inline uintptr_t SAI_TxGetDataRegisterAddress(I2S_Type *base, uint32_t channel)

Gets the SAI Tx data register address.

This API is used to provide a transfer address for the SAI DMA transfer configuration.

Parameters:

base – SAI base pointer.
channel – Which data channel used.

Returns:

data register address.

static inline uintptr_t SAI_RxGetDataRegisterAddress(I2S_Type *base, uint32_t channel)

Gets the SAI Rx data register address.

This API is used to provide a transfer address for the SAI DMA transfer configuration.

Parameters:

base – SAI base pointer.
channel – Which data channel used.

Returns:

data register address.

void SAI_WriteBlocking(I2S_Type *base, uint32_t channel, uint32_t bitWidth, uint8_t *buffer, uint32_t size)

Sends data using a blocking method.

Note

This function blocks by polling until data is ready to be sent.

Parameters:

base – SAI base pointer.
channel – Data channel used.
bitWidth – How many bits in an audio word; usually 8/16/24/32 bits.
buffer – Pointer to the data to be written.
size – Bytes to be written.

void SAI_WriteMultiChannelBlocking(I2S_Type *base, uint32_t channel, uint32_t channelMask, uint32_t bitWidth, uint8_t *buffer, uint32_t size)

Sends data to multi channel using a blocking method.

Note

This function blocks by polling until data is ready to be sent.

Parameters:

base – SAI base pointer.
channel – Data channel used.
channelMask – channel mask.
bitWidth – How many bits in an audio word; usually 8/16/24/32 bits.
buffer – Pointer to the data to be written.
size – Bytes to be written.

static inline void SAI_WriteData(I2S_Type *base, uint32_t channel, uint32_t data)

Writes data into SAI FIFO.

Parameters:

base – SAI base pointer.
channel – Data channel used.
data – Data needs to be written.

void SAI_ReadBlocking(I2S_Type *base, uint32_t channel, uint32_t bitWidth, uint8_t *buffer, uint32_t size)

Receives data using a blocking method.

Note

This function blocks by polling until data is ready to be sent.

Parameters:

base – SAI base pointer.
channel – Data channel used.
bitWidth – How many bits in an audio word; usually 8/16/24/32 bits.
buffer – Pointer to the data to be read.
size – Bytes to be read.

void SAI_ReadMultiChannelBlocking(I2S_Type *base, uint32_t channel, uint32_t channelMask, uint32_t bitWidth, uint8_t *buffer, uint32_t size)

Receives multi channel data using a blocking method.

Note

This function blocks by polling until data is ready to be sent.

Parameters:

base – SAI base pointer.
channel – Data channel used.
channelMask – channel mask.
bitWidth – How many bits in an audio word; usually 8/16/24/32 bits.
buffer – Pointer to the data to be read.
size – Bytes to be read.

static inline uint32_t SAI_ReadData(I2S_Type *base, uint32_t channel)

Reads data from the SAI FIFO.

Parameters:

base – SAI base pointer.
channel – Data channel used.

Returns:

Data in SAI FIFO.

void SAI_TransferTxCreateHandle(I2S_Type *base, sai_handle_t *handle, sai_transfer_callback_t callback, void *userData)

Initializes the SAI Tx handle.

This function initializes the Tx handle for the SAI Tx transactional APIs. Call this function once to get the handle initialized.

Parameters:

base – SAI base pointer
handle – SAI handle pointer.
callback – Pointer to the user callback function.
userData – User parameter passed to the callback function

void SAI_TransferRxCreateHandle(I2S_Type *base, sai_handle_t *handle, sai_transfer_callback_t callback, void *userData)

Initializes the SAI Rx handle.

This function initializes the Rx handle for the SAI Rx transactional APIs. Call this function once to get the handle initialized.

Parameters:

base – SAI base pointer.
handle – SAI handle pointer.
callback – Pointer to the user callback function.
userData – User parameter passed to the callback function.

void SAI_TransferTxSetConfig(I2S_Type *base, sai_handle_t *handle, sai_transceiver_t *config)

SAI transmitter transfer configurations.

This function initializes the Tx, include bit clock, frame sync, master clock, serial data and fifo configurations.

Parameters:

base – SAI base pointer.
handle – SAI handle pointer.
config – tranmitter configurations.

void SAI_TransferRxSetConfig(I2S_Type *base, sai_handle_t *handle, sai_transceiver_t *config)

SAI receiver transfer configurations.

This function initializes the Rx, include bit clock, frame sync, master clock, serial data and fifo configurations.

Parameters:

base – SAI base pointer.
handle – SAI handle pointer.
config – receiver configurations.

status_t SAI_TransferSendNonBlocking(I2S_Type *base, sai_handle_t *handle, sai_transfer_t *xfer)

Performs an interrupt non-blocking send transfer on SAI.

Note

This API returns immediately after the transfer initiates. Call the SAI_TxGetTransferStatusIRQ to poll the transfer status and check whether the transfer is finished. If the return status is not kStatus_SAI_Busy, the transfer is finished.

Parameters:

base – SAI base pointer.
handle – Pointer to the sai_handle_t structure which stores the transfer state.
xfer – Pointer to the sai_transfer_t structure.

Return values:

kStatus_Success – Successfully started the data receive.
kStatus_SAI_TxBusy – Previous receive still not finished.
kStatus_InvalidArgument – The input parameter is invalid.

status_t SAI_TransferReceiveNonBlocking(I2S_Type *base, sai_handle_t *handle, sai_transfer_t *xfer)

Performs an interrupt non-blocking receive transfer on SAI.

Note

This API returns immediately after the transfer initiates. Call the SAI_RxGetTransferStatusIRQ to poll the transfer status and check whether the transfer is finished. If the return status is not kStatus_SAI_Busy, the transfer is finished.

Parameters:

base – SAI base pointer
handle – Pointer to the sai_handle_t structure which stores the transfer state.
xfer – Pointer to the sai_transfer_t structure.

Return values:

kStatus_Success – Successfully started the data receive.
kStatus_SAI_RxBusy – Previous receive still not finished.
kStatus_InvalidArgument – The input parameter is invalid.

status_t SAI_TransferGetSendCount(I2S_Type *base, sai_handle_t *handle, size_t *count)

Gets a set byte count.

Parameters:

base – SAI base pointer.
handle – Pointer to the sai_handle_t structure which stores the transfer state.
count – Bytes count sent.

Return values:

kStatus_Success – Succeed get the transfer count.
kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.

status_t SAI_TransferGetReceiveCount(I2S_Type *base, sai_handle_t *handle, size_t *count)

Gets a received byte count.

Parameters:

base – SAI base pointer.
handle – Pointer to the sai_handle_t structure which stores the transfer state.
count – Bytes count received.

Return values:

kStatus_Success – Succeed get the transfer count.
kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.

void SAI_TransferAbortSend(I2S_Type *base, sai_handle_t *handle)

Aborts the current send.

Note

This API can be called any time when an interrupt non-blocking transfer initiates to abort the transfer early.

Parameters:

base – SAI base pointer.
handle – Pointer to the sai_handle_t structure which stores the transfer state.

void SAI_TransferAbortReceive(I2S_Type *base, sai_handle_t *handle)

Aborts the current IRQ receive.

Note

This API can be called when an interrupt non-blocking transfer initiates to abort the transfer early.

Parameters:

base – SAI base pointer
handle – Pointer to the sai_handle_t structure which stores the transfer state.

void SAI_TransferTerminateSend(I2S_Type *base, sai_handle_t *handle)

Terminate all SAI send.

This function will clear all transfer slots buffered in the sai queue. If users only want to abort the current transfer slot, please call SAI_TransferAbortSend.

Parameters:

base – SAI base pointer.
handle – SAI eDMA handle pointer.

void SAI_TransferTerminateReceive(I2S_Type *base, sai_handle_t *handle)

Terminate all SAI receive.

This function will clear all transfer slots buffered in the sai queue. If users only want to abort the current transfer slot, please call SAI_TransferAbortReceive.

Parameters:

base – SAI base pointer.
handle – SAI eDMA handle pointer.

void SAI_TransferTxHandleIRQ(I2S_Type *base, sai_handle_t *handle)

Tx interrupt handler.

Parameters:

base – SAI base pointer.
handle – Pointer to the sai_handle_t structure.

void SAI_TransferRxHandleIRQ(I2S_Type *base, sai_handle_t *handle)

Tx interrupt handler.

Parameters:

base – SAI base pointer.
handle – Pointer to the sai_handle_t structure.

void SAI_DriverIRQHandler(uint32_t instance)

SAI driver IRQ handler common entry.

This function provides the common IRQ request entry for SAI.

Parameters:

instance – SAI instance.

FSL_SAI_DRIVER_VERSION: Version 2.4.7

_sai_status_t, SAI return status.

Values:

enumerator kStatus_SAI_TxBusy: SAI Tx is busy.

enumerator kStatus_SAI_RxBusy: SAI Rx is busy.

enumerator kStatus_SAI_TxError: SAI Tx FIFO error.

enumerator kStatus_SAI_RxError: SAI Rx FIFO error.

enumerator kStatus_SAI_QueueFull: SAI transfer queue is full.

enumerator kStatus_SAI_TxIdle: SAI Tx is idle

enumerator kStatus_SAI_RxIdle: SAI Rx is idle

_sai_channel_mask,.sai channel mask value, actual channel numbers is depend soc specific

Values:

enumerator kSAI_Channel0Mask: channel 0 mask value

enumerator kSAI_Channel1Mask: channel 1 mask value

enumerator kSAI_Channel2Mask: channel 2 mask value

enumerator kSAI_Channel3Mask: channel 3 mask value

enumerator kSAI_Channel4Mask: channel 4 mask value

enumerator kSAI_Channel5Mask: channel 5 mask value

enumerator kSAI_Channel6Mask: channel 6 mask value

enumerator kSAI_Channel7Mask: channel 7 mask value

enum _sai_protocol

Define the SAI bus type.

Values:

enumerator kSAI_BusLeftJustified: Uses left justified format.

enumerator kSAI_BusRightJustified: Uses right justified format.

enumerator kSAI_BusI2S: Uses I2S format.

enumerator kSAI_BusPCMA: Uses I2S PCM A format.

enumerator kSAI_BusPCMB: Uses I2S PCM B format.

enum _sai_master_slave

Master or slave mode.

Values:

enumerator kSAI_Master: Master mode include bclk and frame sync

enumerator kSAI_Slave: Slave mode include bclk and frame sync

enumerator kSAI_Bclk_Master_FrameSync_Slave: bclk in master mode, frame sync in slave mode

enumerator kSAI_Bclk_Slave_FrameSync_Master: bclk in slave mode, frame sync in master mode

enum _sai_mono_stereo

Mono or stereo audio format.

Values:

enumerator kSAI_Stereo: Stereo sound.

enumerator kSAI_MonoRight: Only Right channel have sound.

enumerator kSAI_MonoLeft: Only left channel have sound.

enum _sai_data_order

SAI data order, MSB or LSB.

Values:

enumerator kSAI_DataLSB: LSB bit transferred first

enumerator kSAI_DataMSB: MSB bit transferred first

enum _sai_clock_polarity

SAI clock polarity, active high or low.

Values:

enumerator kSAI_PolarityActiveHigh: Drive outputs on rising edge

enumerator kSAI_PolarityActiveLow: Drive outputs on falling edge

enumerator kSAI_SampleOnFallingEdge: Sample inputs on falling edge

enumerator kSAI_SampleOnRisingEdge: Sample inputs on rising edge

enum _sai_sync_mode

Synchronous or asynchronous mode.

Values:

enumerator kSAI_ModeAsync: Asynchronous mode

enumerator kSAI_ModeSync: Synchronous mode (with receiver or transmit)

enumerator kSAI_ModeSyncWithOtherTx: Synchronous with another SAI transmit

enumerator kSAI_ModeSyncWithOtherRx: Synchronous with another SAI receiver

enum _sai_bclk_source

Bit clock source.

Values:

enumerator kSAI_BclkSourceBusclk: Bit clock using bus clock

enumerator kSAI_BclkSourceMclkOption1: Bit clock MCLK option 1

enumerator kSAI_BclkSourceMclkOption2: Bit clock MCLK option2

enumerator kSAI_BclkSourceMclkOption3: Bit clock MCLK option3

enumerator kSAI_BclkSourceMclkDiv: Bit clock using master clock divider

enumerator kSAI_BclkSourceOtherSai0: Bit clock from other SAI device

enumerator kSAI_BclkSourceOtherSai1: Bit clock from other SAI device

_sai_interrupt_enable_t, The SAI interrupt enable flag

Values:

enumerator kSAI_WordStartInterruptEnable: Word start flag, means the first word in a frame detected

enumerator kSAI_SyncErrorInterruptEnable: Sync error flag, means the sync error is detected

enumerator kSAI_FIFOWarningInterruptEnable: FIFO warning flag, means the FIFO is empty

enumerator kSAI_FIFOErrorInterruptEnable: FIFO error flag

enumerator kSAI_FIFORequestInterruptEnable: FIFO request, means reached watermark

_sai_dma_enable_t, The DMA request sources

Values:

enumerator kSAI_FIFOWarningDMAEnable: FIFO warning caused by the DMA request

enumerator kSAI_FIFORequestDMAEnable: FIFO request caused by the DMA request

_sai_flags, The SAI status flag

Values:

enumerator kSAI_WordStartFlag: Word start flag, means the first word in a frame detected

enumerator kSAI_SyncErrorFlag: Sync error flag, means the sync error is detected

enumerator kSAI_FIFOErrorFlag: FIFO error flag

enumerator kSAI_FIFORequestFlag: FIFO request flag.

enumerator kSAI_FIFOWarningFlag: FIFO warning flag

enum _sai_reset_type

The reset type.

Values:

enumerator kSAI_ResetTypeSoftware: Software reset, reset the logic state

enumerator kSAI_ResetTypeFIFO: FIFO reset, reset the FIFO read and write pointer

enumerator kSAI_ResetAll: All reset.

enum _sai_fifo_packing

The SAI packing mode The mode includes 8 bit and 16 bit packing.

Values:

enumerator kSAI_FifoPackingDisabled: Packing disabled

enumerator kSAI_FifoPacking8bit: 8 bit packing enabled

enumerator kSAI_FifoPacking16bit: 16bit packing enabled

enum _sai_sample_rate

Audio sample rate.

Values:

enumerator kSAI_SampleRate8KHz: Sample rate 8000 Hz

enumerator kSAI_SampleRate11025Hz: Sample rate 11025 Hz

enumerator kSAI_SampleRate12KHz: Sample rate 12000 Hz

enumerator kSAI_SampleRate16KHz: Sample rate 16000 Hz

enumerator kSAI_SampleRate22050Hz: Sample rate 22050 Hz

enumerator kSAI_SampleRate24KHz: Sample rate 24000 Hz

enumerator kSAI_SampleRate32KHz: Sample rate 32000 Hz

enumerator kSAI_SampleRate44100Hz: Sample rate 44100 Hz

enumerator kSAI_SampleRate48KHz: Sample rate 48000 Hz

enumerator kSAI_SampleRate96KHz: Sample rate 96000 Hz

enumerator kSAI_SampleRate192KHz: Sample rate 192000 Hz

enumerator kSAI_SampleRate384KHz: Sample rate 384000 Hz

enum _sai_word_width

Audio word width.

Values:

enumerator kSAI_WordWidth8bits: Audio data width 8 bits

enumerator kSAI_WordWidth16bits: Audio data width 16 bits

enumerator kSAI_WordWidth24bits: Audio data width 24 bits

enumerator kSAI_WordWidth32bits: Audio data width 32 bits

enum _sai_data_pin_state

sai data pin state definition

Values:

enumerator kSAI_DataPinStateTriState: transmit data pins are tri-stated when slots are masked or channels are disabled

enumerator kSAI_DataPinStateOutputZero: transmit data pins are never tri-stated and will output zero when slots are masked or channel disabled

enum _sai_fifo_combine

sai fifo combine mode definition

Values:

enumerator kSAI_FifoCombineDisabled: sai TX/RX fifo combine mode disabled

enumerator kSAI_FifoCombineModeEnabledOnRead: sai TX fifo combine mode enabled on FIFO reads

enumerator kSAI_FifoCombineModeEnabledOnWrite: sai TX fifo combine mode enabled on FIFO write

enumerator kSAI_RxFifoCombineModeEnabledOnWrite: sai RX fifo combine mode enabled on FIFO write

enumerator kSAI_RXFifoCombineModeEnabledOnRead: sai RX fifo combine mode enabled on FIFO reads

enumerator kSAI_FifoCombineModeEnabledOnReadWrite: sai TX/RX fifo combined mode enabled on FIFO read/writes

enum _sai_transceiver_type

sai transceiver type

Values:

enumerator kSAI_Transmitter: sai transmitter

enumerator kSAI_Receiver: sai receiver

enum _sai_frame_sync_len

sai frame sync len

Values:

enumerator kSAI_FrameSyncLenOneBitClk: 1 bit clock frame sync len for DSP mode

enumerator kSAI_FrameSyncLenPerWordWidth: Frame sync length decided by word width

typedef enum _sai_protocol sai_protocol_t: Define the SAI bus type.

typedef enum _sai_master_slave sai_master_slave_t: Master or slave mode.

typedef enum _sai_mono_stereo sai_mono_stereo_t: Mono or stereo audio format.

typedef enum _sai_data_order sai_data_order_t: SAI data order, MSB or LSB.

typedef enum _sai_clock_polarity sai_clock_polarity_t: SAI clock polarity, active high or low.

typedef enum _sai_sync_mode sai_sync_mode_t: Synchronous or asynchronous mode.

typedef enum _sai_bclk_source sai_bclk_source_t: Bit clock source.

typedef enum _sai_reset_type sai_reset_type_t: The reset type.

typedef enum _sai_fifo_packing sai_fifo_packing_t: The SAI packing mode The mode includes 8 bit and 16 bit packing.

typedef struct _sai_config sai_config_t: SAI user configuration structure.

typedef enum _sai_sample_rate sai_sample_rate_t: Audio sample rate.

typedef enum _sai_word_width sai_word_width_t: Audio word width.

typedef enum _sai_data_pin_state sai_data_pin_state_t: sai data pin state definition

typedef enum _sai_fifo_combine sai_fifo_combine_t: sai fifo combine mode definition

typedef enum _sai_transceiver_type sai_transceiver_type_t: sai transceiver type

typedef enum _sai_frame_sync_len sai_frame_sync_len_t: sai frame sync len

typedef struct _sai_transfer_format sai_transfer_format_t: sai transfer format

typedef struct _sai_master_clock sai_master_clock_t: master clock configurations

typedef struct _sai_fifo sai_fifo_t: sai fifo configurations

typedef struct _sai_bit_clock sai_bit_clock_t: sai bit clock configurations

typedef struct _sai_frame_sync sai_frame_sync_t: sai frame sync configurations

typedef struct _sai_serial_data sai_serial_data_t: sai serial data configurations

typedef struct _sai_transceiver sai_transceiver_t: sai transceiver configurations

typedef struct _sai_transfer sai_transfer_t: SAI transfer structure.

typedef struct _sai_handle sai_handle_t

typedef void (*sai_transfer_callback_t)(I2S_Type *base, sai_handle_t *handle, status_t status, void *userData): SAI transfer callback prototype.

SAI_XFER_QUEUE_SIZE: SAI transfer queue size, user can refine it according to use case.

FSL_SAI_HAS_FIFO_EXTEND_FEATURE: sai fifo feature

struct _sai_config

#include <fsl_sai.h>

SAI user configuration structure.

Public Members

sai_protocol_t protocol: Audio bus protocol in SAI

sai_sync_mode_t syncMode: SAI sync mode, control Tx/Rx clock sync

bool mclkOutputEnable: Master clock output enable, true means master clock divider enabled

sai_bclk_source_t bclkSource: Bit Clock source

sai_master_slave_t masterSlave: Master or slave

struct _sai_transfer_format

#include <fsl_sai.h>

sai transfer format

Public Members

uint32_t sampleRate_Hz: Sample rate of audio data

uint32_t bitWidth: Data length of audio data, usually 8/16/24/32 bits

sai_mono_stereo_t stereo: Mono or stereo

uint32_t masterClockHz: Master clock frequency in Hz

uint8_t watermark: Watermark value

uint8_t channel: Transfer start channel

uint8_t channelMask: enabled channel mask value, reference _sai_channel_mask

uint8_t endChannel: end channel number

uint8_t channelNums: Total enabled channel numbers

sai_protocol_t protocol: Which audio protocol used

bool isFrameSyncCompact: True means Frame sync length is configurable according to bitWidth, false means frame sync length is 64 times of bit clock.

struct _sai_master_clock

#include <fsl_sai.h>

master clock configurations

Public Members

bool mclkOutputEnable: master clock output enable

uint32_t mclkHz: target mclk frequency

uint32_t mclkSourceClkHz: mclk source frequency

struct _sai_fifo

#include <fsl_sai.h>

sai fifo configurations

Public Members

bool fifoContinueOneError: fifo continues when error occur

sai_fifo_combine_t fifoCombine: fifo combine mode

sai_fifo_packing_t fifoPacking: fifo packing mode

uint8_t fifoWatermark: fifo watermark

struct _sai_bit_clock

#include <fsl_sai.h>

sai bit clock configurations

Public Members

bool bclkSrcSwap: bit clock source swap

bool bclkInputDelay: bit clock actually used by the transmitter is delayed by the pad output delay, this has effect of decreasing the data input setup time, but increasing the data output valid time .

sai_clock_polarity_t bclkPolarity: bit clock polarity

sai_bclk_source_t bclkSource: bit Clock source

struct _sai_frame_sync

#include <fsl_sai.h>

sai frame sync configurations

Public Members

uint8_t frameSyncWidth: frame sync width in number of bit clocks

bool frameSyncEarly: TRUE is frame sync assert one bit before the first bit of frame FALSE is frame sync assert with the first bit of the frame

bool frameSyncGenerateOnDemand: internal frame sync is generated when FIFO waring flag is clear

sai_clock_polarity_t frameSyncPolarity: frame sync polarity

struct _sai_serial_data

#include <fsl_sai.h>

sai serial data configurations

Public Members

sai_data_pin_state_t dataMode: sai data pin state when slots masked or channel disabled

sai_data_order_t dataOrder: configure whether the LSB or MSB is transmitted first

uint8_t dataWord0Length: configure the number of bits in the first word in each frame

uint8_t dataWordNLength: configure the number of bits in the each word in each frame, except the first word

uint8_t dataWordLength: used to record the data length for dma transfer

uint8_t dataFirstBitShifted: Configure the bit index for the first bit transmitted for each word in the frame

uint8_t dataWordNum: configure the number of words in each frame

uint32_t dataMaskedWord: configure whether the transmit word is masked

struct _sai_transceiver

#include <fsl_sai.h>

sai transceiver configurations

Public Members

sai_serial_data_t serialData: serial data configurations

sai_frame_sync_t frameSync: ws configurations

sai_bit_clock_t bitClock: bit clock configurations

sai_fifo_t fifo: fifo configurations

sai_master_slave_t masterSlave: transceiver is master or slave

sai_sync_mode_t syncMode: transceiver sync mode

uint8_t startChannel: Transfer start channel

uint8_t channelMask: enabled channel mask value, reference _sai_channel_mask

uint8_t endChannel: end channel number

uint8_t channelNums: Total enabled channel numbers

struct _sai_transfer

#include <fsl_sai.h>

SAI transfer structure.

Public Members

uint8_t *data: Data start address to transfer.

size_t dataSize: Transfer size.

struct _sai_handle

#include <fsl_sai.h>

SAI handle structure.

Public Members

I2S_Type *base: base address

uint32_t state: Transfer status

sai_transfer_callback_t callback: Callback function called at transfer event

void *userData: Callback parameter passed to callback function

uint8_t bitWidth: Bit width for transfer, 8/16/24/32 bits

uint8_t channel: Transfer start channel

uint8_t channelMask: enabled channel mask value, refernece _sai_channel_mask

uint8_t endChannel: end channel number

uint8_t channelNums: Total enabled channel numbers

sai_transfer_t saiQueue[(4U)]: Transfer queue storing queued transfer

size_t transferSize[(4U)]: Data bytes need to transfer

volatile uint8_t queueUser: Index for user to queue transfer

volatile uint8_t queueDriver: Index for driver to get the transfer data and size

uint8_t watermark: Watermark value

SAI EDMA Driver

void SAI_TransferTxCreateHandleEDMA(I2S_Type *base, sai_edma_handle_t *handle, sai_edma_callback_t callback, void *userData, edma_handle_t *txDmaHandle)

Initializes the SAI eDMA handle.

This function initializes the SAI master DMA handle, which can be used for other SAI master transactional APIs. Usually, for a specified SAI instance, call this API once to get the initialized handle.

Parameters:

base – SAI base pointer.
handle – SAI eDMA handle pointer.
callback – Pointer to user callback function.
userData – User parameter passed to the callback function.
txDmaHandle – eDMA handle pointer, this handle shall be static allocated by users.

void SAI_TransferRxCreateHandleEDMA(I2S_Type *base, sai_edma_handle_t *handle, sai_edma_callback_t callback, void *userData, edma_handle_t *rxDmaHandle)

Initializes the SAI Rx eDMA handle.

This function initializes the SAI slave DMA handle, which can be used for other SAI master transactional APIs. Usually, for a specified SAI instance, call this API once to get the initialized handle.

Parameters:

base – SAI base pointer.
handle – SAI eDMA handle pointer.
callback – Pointer to user callback function.
userData – User parameter passed to the callback function.
rxDmaHandle – eDMA handle pointer, this handle shall be static allocated by users.

void SAI_TransferSetInterleaveType(sai_edma_handle_t *handle, sai_edma_interleave_t interleaveType)

Initializes the SAI interleave type.

This function initializes the SAI DMA handle member interleaveType, it shall be called only when application would like to use type kSAI_EDMAInterleavePerChannelBlock, since the default interleaveType is kSAI_EDMAInterleavePerChannelSample always

Parameters:

handle – SAI eDMA handle pointer.
interleaveType – Multi channel interleave type.

void SAI_TransferTxSetConfigEDMA(I2S_Type *base, sai_edma_handle_t *handle, sai_transceiver_t *saiConfig)

Configures the SAI Tx.

Note

SAI eDMA supports data transfer in a multiple SAI channels if the FIFO Combine feature is supported. To activate the multi-channel transfer enable SAI channels by filling the channelMask of sai_transceiver_t with the corresponding values of _sai_channel_mask enum, enable the FIFO Combine mode by assigning kSAI_FifoCombineModeEnabledOnWrite to the fifoCombine member of sai_fifo_combine_t which is a member of sai_transceiver_t. This is an example of multi-channel data transfer configuration step.

sai_transceiver_t config;
SAI_GetClassicI2SConfig(&config, kSAI_WordWidth16bits, kSAI_Stereo, kSAI_Channel0Mask|kSAI_Channel1Mask);
config.fifo.fifoCombine = kSAI_FifoCombineModeEnabledOnWrite;
SAI_TransferTxSetConfigEDMA(I2S0, &edmaHandle, &config);

Parameters:

base – SAI base pointer.
handle – SAI eDMA handle pointer.
saiConfig – sai configurations.

void SAI_TransferRxSetConfigEDMA(I2S_Type *base, sai_edma_handle_t *handle, sai_transceiver_t *saiConfig)

Configures the SAI Rx.

Note

SAI eDMA supports data transfer in a multiple SAI channels if the FIFO Combine feature is supported. To activate the multi-channel transfer enable SAI channels by filling the channelMask of sai_transceiver_t with the corresponding values of _sai_channel_mask enum, enable the FIFO Combine mode by assigning kSAI_FifoCombineModeEnabledOnRead to the fifoCombine member of sai_fifo_combine_t which is a member of sai_transceiver_t. This is an example of multi-channel data transfer configuration step.

sai_transceiver_t config;
SAI_GetClassicI2SConfig(&config, kSAI_WordWidth16bits, kSAI_Stereo, kSAI_Channel0Mask|kSAI_Channel1Mask);
config.fifo.fifoCombine = kSAI_FifoCombineModeEnabledOnRead;
SAI_TransferRxSetConfigEDMA(I2S0, &edmaHandle, &config);

Parameters:

base – SAI base pointer.
handle – SAI eDMA handle pointer.
saiConfig – sai configurations.

status_t SAI_TransferSendEDMA(I2S_Type *base, sai_edma_handle_t *handle, sai_transfer_t *xfer)

Performs a non-blocking SAI transfer using DMA.

This function support multi channel transfer,

for the sai IP support fifo combine mode, application should enable the fifo combine mode, no limitation on channel numbers
for the sai IP not support fifo combine mode, sai edma provide another solution which using EDMA modulo feature, but support 2 or 4 channels only.

Note

This interface returns immediately after the transfer initiates. Call SAI_GetTransferStatus to poll the transfer status and check whether the SAI transfer is finished.

Parameters:

base – SAI base pointer.
handle – SAI eDMA handle pointer.
xfer – Pointer to the DMA transfer structure.

Return values:

kStatus_Success – Start a SAI eDMA send successfully.
kStatus_InvalidArgument – The input argument is invalid.
kStatus_TxBusy – SAI is busy sending data.

status_t SAI_TransferReceiveEDMA(I2S_Type *base, sai_edma_handle_t *handle, sai_transfer_t *xfer)

Performs a non-blocking SAI receive using eDMA.

This function support multi channel transfer,

for the sai IP support fifo combine mode, application should enable the fifo combine mode, no limitation on channel numbers
for the sai IP not support fifo combine mode, sai edma provide another solution which using EDMA modulo feature, but support 2 or 4 channels only.

Note

This interface returns immediately after the transfer initiates. Call the SAI_GetReceiveRemainingBytes to poll the transfer status and check whether the SAI transfer is finished.

Parameters:

base – SAI base pointer
handle – SAI eDMA handle pointer.
xfer – Pointer to DMA transfer structure.

Return values:

kStatus_Success – Start a SAI eDMA receive successfully.
kStatus_InvalidArgument – The input argument is invalid.
kStatus_RxBusy – SAI is busy receiving data.

status_t SAI_TransferSendLoopEDMA(I2S_Type *base, sai_edma_handle_t *handle, sai_transfer_t *xfer, uint32_t loopTransferCount)

Performs a non-blocking SAI loop transfer using eDMA.

Once the loop transfer start, application can use function SAI_TransferAbortSendEDMA to stop the loop transfer.

Note

This function support loop transfer only,such as A->B->…->A, application must be aware of that the more counts of the loop transfer, then more tcd memory required, as the function use the tcd pool in sai_edma_handle_t, so application could redefine the SAI_XFER_QUEUE_SIZE to determine the proper TCD pool size. This function support one sai channel only.

Parameters:

base – SAI base pointer.
handle – SAI eDMA handle pointer.
xfer – Pointer to the DMA transfer structure, should be a array with elements counts >=1(loopTransferCount).
loopTransferCount – the counts of xfer array.

Return values:

kStatus_Success – Start a SAI eDMA send successfully.
kStatus_InvalidArgument – The input argument is invalid.

status_t SAI_TransferReceiveLoopEDMA(I2S_Type *base, sai_edma_handle_t *handle, sai_transfer_t *xfer, uint32_t loopTransferCount)

Performs a non-blocking SAI loop transfer using eDMA.

Once the loop transfer start, application can use function SAI_TransferAbortReceiveEDMA to stop the loop transfer.

Note

This function support loop transfer only,such as A->B->…->A, application must be aware of that the more counts of the loop transfer, then more tcd memory required, as the function use the tcd pool in sai_edma_handle_t, so application could redefine the SAI_XFER_QUEUE_SIZE to determine the proper TCD pool size. This function support one sai channel only.

Parameters:

base – SAI base pointer.
handle – SAI eDMA handle pointer.
xfer – Pointer to the DMA transfer structure, should be a array with elements counts >=1(loopTransferCount).
loopTransferCount – the counts of xfer array.

Return values:

kStatus_Success – Start a SAI eDMA receive successfully.
kStatus_InvalidArgument – The input argument is invalid.

void SAI_TransferTerminateSendEDMA(I2S_Type *base, sai_edma_handle_t *handle)

Terminate all SAI send.

This function will clear all transfer slots buffered in the sai queue. If users only want to abort the current transfer slot, please call SAI_TransferAbortSendEDMA.

Parameters:

base – SAI base pointer.
handle – SAI eDMA handle pointer.

void SAI_TransferTerminateReceiveEDMA(I2S_Type *base, sai_edma_handle_t *handle)

Terminate all SAI receive.

This function will clear all transfer slots buffered in the sai queue. If users only want to abort the current transfer slot, please call SAI_TransferAbortReceiveEDMA.

Parameters:

base – SAI base pointer.
handle – SAI eDMA handle pointer.

void SAI_TransferAbortSendEDMA(I2S_Type *base, sai_edma_handle_t *handle)

Aborts a SAI transfer using eDMA.

This function only aborts the current transfer slots, the other transfer slots’ information still kept in the handler. If users want to terminate all transfer slots, just call SAI_TransferTerminateSendEDMA.

Parameters:

base – SAI base pointer.
handle – SAI eDMA handle pointer.

void SAI_TransferAbortReceiveEDMA(I2S_Type *base, sai_edma_handle_t *handle)

Aborts a SAI receive using eDMA.

This function only aborts the current transfer slots, the other transfer slots’ information still kept in the handler. If users want to terminate all transfer slots, just call SAI_TransferTerminateReceiveEDMA.

Parameters:

base – SAI base pointer
handle – SAI eDMA handle pointer.

status_t SAI_TransferGetSendCountEDMA(I2S_Type *base, sai_edma_handle_t *handle, size_t *count)

Gets byte count sent by SAI.

Parameters:

base – SAI base pointer.
handle – SAI eDMA handle pointer.
count – Bytes count sent by SAI.

Return values:

kStatus_Success – Succeed get the transfer count.
kStatus_NoTransferInProgress – There is no non-blocking transaction in progress.

status_t SAI_TransferGetReceiveCountEDMA(I2S_Type *base, sai_edma_handle_t *handle, size_t *count)

Gets byte count received by SAI.

Parameters:

base – SAI base pointer
handle – SAI eDMA handle pointer.
count – Bytes count received by SAI.

Return values:

kStatus_Success – Succeed get the transfer count.
kStatus_NoTransferInProgress – There is no non-blocking transaction in progress.

uint32_t SAI_TransferGetValidTransferSlotsEDMA(I2S_Type *base, sai_edma_handle_t *handle)

Gets valid transfer slot.

This function can be used to query the valid transfer request slot that the application can submit. It should be called in the critical section, that means the application could call it in the corresponding callback function or disable IRQ before calling it in the application, otherwise, the returned value may not correct.

Parameters:

base – SAI base pointer
handle – SAI eDMA handle pointer.

Return values:

valid – slot count that application submit.

FSL_SAI_EDMA_DRIVER_VERSION: Version 2.7.3

enum _sai_edma_interleave

sai interleave type

Values:

enumerator kSAI_EDMAInterleavePerChannelSample

enumerator kSAI_EDMAInterleavePerChannelBlock

typedef struct sai_edma_handle sai_edma_handle_t

typedef void (*sai_edma_callback_t)(I2S_Type *base, sai_edma_handle_t *handle, status_t status, void *userData): SAI eDMA transfer callback function for finish and error.

typedef enum _sai_edma_interleave sai_edma_interleave_t: sai interleave type

MCUX_SDK_SAI_EDMA_RX_ENABLE_INTERNAL: the SAI enable position When calling SAI_TransferReceiveEDMA

MCUX_SDK_SAI_EDMA_TX_ENABLE_INTERNAL: the SAI enable position When calling SAI_TransferSendEDMA

struct sai_edma_handle

#include <fsl_sai_edma.h>

SAI DMA transfer handle, users should not touch the content of the handle.

Public Members

edma_handle_t *dmaHandle: DMA handler for SAI send

uint8_t nbytes: eDMA minor byte transfer count initially configured.

uint8_t bytesPerFrame: Bytes in a frame

uint8_t channelMask: Enabled channel mask value, reference _sai_channel_mask

uint8_t channelNums: total enabled channel nums

uint8_t channel: Which data channel

uint8_t count: The transfer data count in a DMA request

uint32_t state: Internal state for SAI eDMA transfer

sai_edma_callback_t callback: Callback for users while transfer finish or error occurs

void *userData: User callback parameter

uint8_t tcd[((4U) + 1U) * sizeof(edma_tcd_t)]: TCD pool for eDMA transfer.

sai_transfer_t saiQueue[(4U)]: Transfer queue storing queued transfer.

size_t transferSize[(4U)]: Data bytes need to transfer

sai_edma_interleave_t interleaveType: Transfer interleave type

volatile uint8_t queueUser: Index for user to queue transfer.

volatile uint8_t queueDriver: Index for driver to get the transfer data and size

SIM: System Integration Module Driver

FSL_SIM_DRIVER_VERSION: Driver version.

enum _sim_usb_volt_reg_enable_mode

USB voltage regulator enable setting.

Values:

enumerator kSIM_UsbVoltRegEnable: Enable voltage regulator.

enumerator kSIM_UsbVoltRegEnableInLowPower: Enable voltage regulator in VLPR/VLPW modes.

enumerator kSIM_UsbVoltRegEnableInStop: Enable voltage regulator in STOP/VLPS/LLS/VLLS modes.

enumerator kSIM_UsbVoltRegEnableInAllModes: Enable voltage regulator in all power modes.

enum _sim_flash_mode

Flash enable mode.

Values:

enumerator kSIM_FlashDisableInWait: Disable flash in wait mode.

enumerator kSIM_FlashDisable: Disable flash in normal mode.

typedef struct _sim_uid sim_uid_t: Unique ID.

typedef struct _sim_rf_addr sim_rf_addr_t: RF Mac Address.

void SIM_SetUsbVoltRegulatorEnableMode(uint32_t mask)

Sets the USB voltage regulator setting.

This function configures whether the USB voltage regulator is enabled in normal RUN mode, STOP/VLPS/LLS/VLLS modes, and VLPR/VLPW modes. The configurations are passed in as mask value of _sim_usb_volt_reg_enable_mode. For example, to enable USB voltage regulator in RUN/VLPR/VLPW modes and disable in STOP/VLPS/LLS/VLLS mode, use:

SIM_SetUsbVoltRegulatorEnableMode(kSIM_UsbVoltRegEnable | kSIM_UsbVoltRegEnableInLowPower);

Parameters:

mask – USB voltage regulator enable setting.

void SIM_GetUniqueId(sim_uid_t *uid)

Gets the unique identification register value.

Parameters:

uid – Pointer to the structure to save the UID value.

static inline void SIM_SetFlashMode(uint8_t mode)

Sets the flash enable mode.

Parameters:

mode – The mode to set; see _sim_flash_mode for mode details.

void SIM_GetRfAddr(sim_rf_addr_t *info)

Gets the RF address register value.

Parameters:

info – Pointer to the structure to save the RF address value.

static inline void SIM_EnableSystickClock(bool enable)

Enable the Systick clock or not.

The Systick clock is enabled by default.

Parameters:

enable – The switcher for Systick clock.

static inline void SIM_SetSoftwareTrigger(void)

Software trigger to TRGMUX.

Generates software trigger to peripherals through TRGMUX.

struct _sim_uid

#include <fsl_sim.h>

Unique ID.

Public Members

uint32_t H: UIDH.

uint32_t M: SIM_UIDM.

uint32_t L: UIDL.

struct _sim_rf_addr

#include <fsl_sim.h>

RF Mac Address.

Public Members

uint32_t rfAddrL: RFADDRL.

uint32_t rfAddrH: RFADDRH.

SMC: System Mode Controller Driver

static inline void SMC_GetVersionId(SMC_Type *base, smc_version_id_t *versionId)

Gets the SMC version ID.

This function gets the SMC version ID, including major version number, minor version number, and feature specification number.

Parameters:

base – SMC peripheral base address.
versionId – Pointer to the version ID structure.

void SMC_GetParam(SMC_Type *base, smc_param_t *param)

Gets the SMC parameter.

This function gets the SMC parameter including the enabled power mdoes.

Parameters:

base – SMC peripheral base address.
param – Pointer to the SMC param structure.

static inline void SMC_SetPowerModeProtection(SMC_Type *base, uint8_t allowedModes)

Configures all power mode protection settings.

This function configures the power mode protection settings for supported power modes in the specified chip family. The available power modes are defined in the smc_power_mode_protection_t. This should be done at an early system level initialization stage. See the reference manual for details. This register can only write once after the power reset.

The allowed modes are passed as bit map. For example, to allow LLS and VLLS, use SMC_SetPowerModeProtection(kSMC_AllowPowerModeVlls | kSMC_AllowPowerModeVlps). To allow all modes, use SMC_SetPowerModeProtection(kSMC_AllowPowerModeAll).

Parameters:

base – SMC peripheral base address.
allowedModes – Bitmap of the allowed power modes.

static inline smc_power_state_t SMC_GetPowerModeState(SMC_Type *base)

Gets the current power mode status.

This function returns the current power mode status. After the application switches the power mode, it should always check the status to check whether it runs into the specified mode or not. The application should check this mode before switching to a different mode. The system requires that only certain modes can switch to other specific modes. See the reference manual for details and the smc_power_state_t for information about the power status.

Parameters:

base – SMC peripheral base address.

Returns:

Current power mode status.

void SMC_PreEnterStopModes(void)

Prepares to enter stop modes.

This function should be called before entering STOP/VLPS/LLS/VLLS modes.

void SMC_PostExitStopModes(void)

Recovers after wake up from stop modes.

This function should be called after wake up from STOP/VLPS/LLS/VLLS modes. It is used with SMC_PreEnterStopModes.

void SMC_PreEnterWaitModes(void)

Prepares to enter wait modes.

This function should be called before entering WAIT/VLPW modes.

void SMC_PostExitWaitModes(void)

Recovers after wake up from stop modes.

This function should be called after wake up from WAIT/VLPW modes. It is used with SMC_PreEnterWaitModes.

status_t SMC_SetPowerModeRun(SMC_Type *base)

Configures the system to RUN power mode.

Parameters:

base – SMC peripheral base address.

Returns:

SMC configuration error code.

status_t SMC_SetPowerModeHsrun(SMC_Type *base)

Configures the system to HSRUN power mode.

Parameters:

base – SMC peripheral base address.

Returns:

SMC configuration error code.

status_t SMC_SetPowerModeWait(SMC_Type *base)

Configures the system to WAIT power mode.

Parameters:

base – SMC peripheral base address.

Returns:

SMC configuration error code.

status_t SMC_SetPowerModeStop(SMC_Type *base, smc_partial_stop_option_t option)

Configures the system to Stop power mode.

Parameters:

base – SMC peripheral base address.
option – Partial Stop mode option.

Returns:

SMC configuration error code.

status_t SMC_SetPowerModeVlpr(SMC_Type *base, bool wakeupMode)

Configures the system to VLPR power mode.

Parameters:

base – SMC peripheral base address.
wakeupMode – Enter Normal Run mode if true, else stay in VLPR mode.

Returns:

SMC configuration error code.

status_t SMC_SetPowerModeVlpw(SMC_Type *base)

Configures the system to VLPW power mode.

Parameters:

base – SMC peripheral base address.

Returns:

SMC configuration error code.

status_t SMC_SetPowerModeVlps(SMC_Type *base)

Configures the system to VLPS power mode.

Parameters:

base – SMC peripheral base address.

Returns:

SMC configuration error code.

status_t SMC_SetPowerModeLls(SMC_Type *base, const smc_power_mode_lls_config_t *config)

Configures the system to LLS power mode.

Parameters:

base – SMC peripheral base address.
config – The LLS power mode configuration structure

Returns:

SMC configuration error code.

status_t SMC_SetPowerModeVlls(SMC_Type *base, const smc_power_mode_vlls_config_t *config)

Configures the system to VLLS power mode.

Parameters:

base – SMC peripheral base address.
config – The VLLS power mode configuration structure.

Returns:

SMC configuration error code.

FSL_SMC_DRIVER_VERSION: SMC driver version.

enum _smc_power_mode_protection

Power Modes Protection.

Values:

enumerator kSMC_AllowPowerModeVlls: Allow Very-low-leakage Stop Mode.

enumerator kSMC_AllowPowerModeLls: Allow Low-leakage Stop Mode.

enumerator kSMC_AllowPowerModeVlp: Allow Very-Low-power Mode.

enumerator kSMC_AllowPowerModeHsrun: Allow High-speed Run mode.

enumerator kSMC_AllowPowerModeAll: Allow all power mode.

enum _smc_power_state

Power Modes in PMSTAT.

Values:

enumerator kSMC_PowerStateRun: 0000_0001 - Current power mode is RUN

enumerator kSMC_PowerStateStop: 0000_0010 - Current power mode is STOP

enumerator kSMC_PowerStateVlpr: 0000_0100 - Current power mode is VLPR

enumerator kSMC_PowerStateVlpw: 0000_1000 - Current power mode is VLPW

enumerator kSMC_PowerStateVlps: 0001_0000 - Current power mode is VLPS

enumerator kSMC_PowerStateLls: 0010_0000 - Current power mode is LLS

enumerator kSMC_PowerStateVlls: 0100_0000 - Current power mode is VLLS

enumerator kSMC_PowerStateHsrun: 1000_0000 - Current power mode is HSRUN

enum _smc_run_mode

Run mode definition.

Values:

enumerator kSMC_RunNormal: Normal RUN mode.

enumerator kSMC_RunVlpr: Very-low-power RUN mode.

enumerator kSMC_Hsrun: High-speed Run mode (HSRUN).

enum _smc_stop_mode

Stop mode definition.

Values:

enumerator kSMC_StopNormal: Normal STOP mode.

enumerator kSMC_StopVlps: Very-low-power STOP mode.

enumerator kSMC_StopLls: Low-leakage Stop mode.

enumerator kSMC_StopVlls: Very-low-leakage Stop mode.

enum _smc_stop_submode

VLLS/LLS stop sub mode definition.

Values:

enumerator kSMC_StopSub0: Stop submode 0, for VLLS0/LLS0.

enumerator kSMC_StopSub1: Stop submode 1, for VLLS1/LLS1.

enumerator kSMC_StopSub2: Stop submode 2, for VLLS2/LLS2.

enumerator kSMC_StopSub3: Stop submode 3, for VLLS3/LLS3.

enum _smc_partial_stop_mode

Partial STOP option.

Values:

enumerator kSMC_PartialStop: STOP - Normal Stop mode

enumerator kSMC_PartialStop1: Partial Stop with both system and bus clocks disabled

enumerator kSMC_PartialStop2: Partial Stop with system clock disabled and bus clock enabled

_smc_status, SMC configuration status.

Values:

enumerator kStatus_SMC_StopAbort: Entering Stop mode is abort

typedef enum _smc_power_mode_protection smc_power_mode_protection_t: Power Modes Protection.

typedef enum _smc_power_state smc_power_state_t: Power Modes in PMSTAT.

typedef enum _smc_run_mode smc_run_mode_t: Run mode definition.

typedef enum _smc_stop_mode smc_stop_mode_t: Stop mode definition.

typedef enum _smc_stop_submode smc_stop_submode_t: VLLS/LLS stop sub mode definition.

typedef enum _smc_partial_stop_mode smc_partial_stop_option_t: Partial STOP option.

typedef struct _smc_version_id smc_version_id_t: IP version ID definition.

typedef struct _smc_param smc_param_t: IP parameter definition.

typedef struct _smc_power_mode_lls_config smc_power_mode_lls_config_t: SMC Low-Leakage Stop power mode configuration.

typedef struct _smc_power_mode_vlls_config smc_power_mode_vlls_config_t: SMC Very Low-Leakage Stop power mode configuration.

struct _smc_version_id

#include <fsl_smc.h>

IP version ID definition.

Public Members

uint16_t feature: Feature Specification Number.

uint8_t minor: Minor version number.

uint8_t major: Major version number.

struct _smc_param

#include <fsl_smc.h>

IP parameter definition.

Public Members

bool hsrunEnable: HSRUN mode enable.

bool llsEnable: LLS mode enable.

bool lls2Enable: LLS2 mode enable.

bool vlls0Enable: VLLS0 mode enable.

struct _smc_power_mode_lls_config

#include <fsl_smc.h>

SMC Low-Leakage Stop power mode configuration.

Public Members

smc_stop_submode_t subMode: Low-leakage Stop sub-mode

bool enableLpoClock: Enable LPO clock in LLS mode

struct _smc_power_mode_vlls_config

#include <fsl_smc.h>

SMC Very Low-Leakage Stop power mode configuration.

Public Members

smc_stop_submode_t subMode: Very Low-leakage Stop sub-mode

bool enablePorDetectInVlls0: Enable Power on reset detect in VLLS mode

bool enableRam2InVlls2: Enable RAM2 power in VLLS2

bool enableLpoClock: Enable LPO clock in VLLS mode

SYSMPU: System Memory Protection Unit

void SYSMPU_Init(SYSMPU_Type *base, const sysmpu_config_t *config)

Initializes the SYSMPU with the user configuration structure.

This function configures the SYSMPU module with the user-defined configuration.

Parameters:

base – SYSMPU peripheral base address.
config – The pointer to the configuration structure.

void SYSMPU_Deinit(SYSMPU_Type *base)

Deinitializes the SYSMPU regions.

Parameters:

base – SYSMPU peripheral base address.

static inline void SYSMPU_Enable(SYSMPU_Type *base, bool enable)

Enables/disables the SYSMPU globally.

Call this API to enable or disable the SYSMPU module.

Parameters:

base – SYSMPU peripheral base address.
enable – True enable SYSMPU, false disable SYSMPU.

static inline void SYSMPU_RegionEnable(SYSMPU_Type *base, uint32_t number, bool enable)

Enables/disables the SYSMPU for a special region.

When SYSMPU is enabled, call this API to disable an unused region of an enabled SYSMPU. Call this API to minimize the power dissipation.

Parameters:

base – SYSMPU peripheral base address.
number – SYSMPU region number.
enable – True enable the special region SYSMPU, false disable the special region SYSMPU.

void SYSMPU_GetHardwareInfo(SYSMPU_Type *base, sysmpu_hardware_info_t *hardwareInform)

Gets the SYSMPU basic hardware information.

Parameters:

base – SYSMPU peripheral base address.
hardwareInform – The pointer to the SYSMPU hardware information structure. See “sysmpu_hardware_info_t”.

void SYSMPU_SetRegionConfig(SYSMPU_Type *base, const sysmpu_region_config_t *regionConfig)

Sets the SYSMPU region.

Note: Due to the SYSMPU protection, the region number 0 does not allow writes from core to affect the start and end address nor the permissions associated with the debugger. It can only write the permission fields associated with the other masters.

Parameters:

base – SYSMPU peripheral base address.
regionConfig – The pointer to the SYSMPU user configuration structure. See “sysmpu_region_config_t”.

void SYSMPU_SetRegionAddr(SYSMPU_Type *base, uint32_t regionNum, uint32_t startAddr, uint32_t endAddr)

Sets the region start and end address.

Memory region start address. Note: bit0 ~ bit4 is always marked as 0 by SYSMPU. The actual start address by SYSMPU is 0-modulo-32 byte address. Memory region end address. Note: bit0 ~ bit4 always be marked as 1 by SYSMPU. The end address used by the SYSMPU is 31-modulo-32 byte address. Note: Due to the SYSMPU protection, the startAddr and endAddr can’t be changed by the core when regionNum is 0.

Parameters:

base – SYSMPU peripheral base address.
regionNum – SYSMPU region number. The range is from 0 to FSL_FEATURE_SYSMPU_DESCRIPTOR_COUNT - 1.
startAddr – Region start address.
endAddr – Region end address.

void SYSMPU_SetRegionRwxMasterAccessRights(SYSMPU_Type *base, uint32_t regionNum, uint32_t masterNum, const sysmpu_rwxrights_master_access_control_t *accessRights)

Sets the SYSMPU region access rights for masters with read, write, and execute rights. The SYSMPU access rights depend on two board classifications of bus masters. The privilege rights masters and the normal rights masters. The privilege rights masters have the read, write, and execute access rights. Except the normal read and write rights, the execute rights are also allowed for these masters. The privilege rights masters normally range from bus masters 0 - 3. However, the maximum master number is device-specific. See the “SYSMPU_PRIVILEGED_RIGHTS_MASTER_MAX_INDEX”. The normal rights masters access rights control see “SYSMPU_SetRegionRwMasterAccessRights()”.

Parameters:

base – SYSMPU peripheral base address.
regionNum – SYSMPU region number. Should range from 0 to FSL_FEATURE_SYSMPU_DESCRIPTOR_COUNT - 1.
masterNum – SYSMPU bus master number. Should range from 0 to SYSMPU_PRIVILEGED_RIGHTS_MASTER_MAX_INDEX.
accessRights – The pointer to the SYSMPU access rights configuration. See “sysmpu_rwxrights_master_access_control_t”.

bool SYSMPU_GetSlavePortErrorStatus(SYSMPU_Type *base, sysmpu_slave_t slaveNum)

Gets the numbers of slave ports where errors occur.

Parameters:

base – SYSMPU peripheral base address.
slaveNum – SYSMPU slave port number.

Returns:

The slave ports error status. true - error happens in this slave port. false - error didn’t happen in this slave port.

void SYSMPU_GetDetailErrorAccessInfo(SYSMPU_Type *base, sysmpu_slave_t slaveNum, sysmpu_access_err_info_t *errInform)

Gets the SYSMPU detailed error access information.

Parameters:

base – SYSMPU peripheral base address.
slaveNum – SYSMPU slave port number.
errInform – The pointer to the SYSMPU access error information. See “sysmpu_access_err_info_t”.

FSL_SYSMPU_DRIVER_VERSION: SYSMPU driver version 2.2.3.

enum _sysmpu_region_total_num

Describes the number of SYSMPU regions.

Values:

enumerator kSYSMPU_8Regions: SYSMPU supports 8 regions.

enumerator kSYSMPU_12Regions: SYSMPU supports 12 regions.

enumerator kSYSMPU_16Regions: SYSMPU supports 16 regions.

enum _sysmpu_slave

SYSMPU slave port number.

Values:

enumerator kSYSMPU_Slave0: SYSMPU slave port 0.

enumerator kSYSMPU_Slave1: SYSMPU slave port 1.

enumerator kSYSMPU_Slave2: SYSMPU slave port 2.

enumerator kSYSMPU_Slave3: SYSMPU slave port 3.

enumerator kSYSMPU_Slave4: SYSMPU slave port 4.

enum _sysmpu_err_access_control

SYSMPU error access control detail.

Values:

enumerator kSYSMPU_NoRegionHit: No region hit error.

enumerator kSYSMPU_NoneOverlappRegion: Access single region error.

enumerator kSYSMPU_OverlappRegion: Access overlapping region error.

enum _sysmpu_err_access_type

SYSMPU error access type.

Values:

enumerator kSYSMPU_ErrTypeRead: SYSMPU error access type — read.

enumerator kSYSMPU_ErrTypeWrite: SYSMPU error access type — write.

enum _sysmpu_err_attributes

SYSMPU access error attributes.

Values:

enumerator kSYSMPU_InstructionAccessInUserMode: Access instruction error in user mode.

enumerator kSYSMPU_DataAccessInUserMode: Access data error in user mode.

enumerator kSYSMPU_InstructionAccessInSupervisorMode: Access instruction error in supervisor mode.

enumerator kSYSMPU_DataAccessInSupervisorMode: Access data error in supervisor mode.

enum _sysmpu_supervisor_access_rights

SYSMPU access rights in supervisor mode for bus master 0 ~ 3.

Values:

enumerator kSYSMPU_SupervisorReadWriteExecute: Read write and execute operations are allowed in supervisor mode.

enumerator kSYSMPU_SupervisorReadExecute: Read and execute operations are allowed in supervisor mode.

enumerator kSYSMPU_SupervisorReadWrite: Read write operations are allowed in supervisor mode.

enumerator kSYSMPU_SupervisorEqualToUsermode: Access permission equal to user mode.

enum _sysmpu_user_access_rights

SYSMPU access rights in user mode for bus master 0 ~ 3.

Values:

enumerator kSYSMPU_UserNoAccessRights: No access allowed in user mode.

enumerator kSYSMPU_UserExecute: Execute operation is allowed in user mode.

enumerator kSYSMPU_UserWrite: Write operation is allowed in user mode.

enumerator kSYSMPU_UserWriteExecute: Write and execute operations are allowed in user mode.

enumerator kSYSMPU_UserRead: Read is allowed in user mode.

enumerator kSYSMPU_UserReadExecute: Read and execute operations are allowed in user mode.

enumerator kSYSMPU_UserReadWrite: Read and write operations are allowed in user mode.

enumerator kSYSMPU_UserReadWriteExecute: Read write and execute operations are allowed in user mode.

typedef enum _sysmpu_region_total_num sysmpu_region_total_num_t: Describes the number of SYSMPU regions.

typedef enum _sysmpu_slave sysmpu_slave_t: SYSMPU slave port number.

typedef enum _sysmpu_err_access_control sysmpu_err_access_control_t: SYSMPU error access control detail.

typedef enum _sysmpu_err_access_type sysmpu_err_access_type_t: SYSMPU error access type.

typedef enum _sysmpu_err_attributes sysmpu_err_attributes_t: SYSMPU access error attributes.

typedef enum _sysmpu_supervisor_access_rights sysmpu_supervisor_access_rights_t: SYSMPU access rights in supervisor mode for bus master 0 ~ 3.

typedef enum _sysmpu_user_access_rights sysmpu_user_access_rights_t: SYSMPU access rights in user mode for bus master 0 ~ 3.

typedef struct _sysmpu_hardware_info sysmpu_hardware_info_t: SYSMPU hardware basic information.

typedef struct _sysmpu_access_err_info sysmpu_access_err_info_t: SYSMPU detail error access information.

typedef struct _sysmpu_rwxrights_master_access_control sysmpu_rwxrights_master_access_control_t: SYSMPU read/write/execute rights control for bus master 0 ~ 3.

typedef struct _sysmpu_rwrights_master_access_control sysmpu_rwrights_master_access_control_t: SYSMPU read/write access control for bus master 4 ~ 7.

typedef struct _sysmpu_region_config sysmpu_region_config_t

SYSMPU region configuration structure.

This structure is used to configure the regionNum region. The accessRights1[0] ~ accessRights1[3] are used to configure the bus master 0 ~ 3 with the privilege rights setting. The accessRights2[0] ~ accessRights2[3] are used to configure the high master 4 ~ 7 with the normal read write permission. The master port assignment is the chip configuration. Normally, the core is the master 0, debugger is the master 1. Note that the SYSMPU assigns a priority scheme where the debugger is treated as the highest priority master followed by the core and then all the remaining masters. SYSMPU protection does not allow writes from the core to affect the “regionNum 0” start and end address nor the permissions associated with the debugger. It can only write the permission fields associated with the other masters. This protection guarantees that the debugger always has access to the entire address space and those rights can’t be changed by the core or any other bus master. Prepare the region configuration when regionNum is 0.

typedef struct _sysmpu_config sysmpu_config_t

The configuration structure for the SYSMPU initialization.

This structure is used when calling the SYSMPU_Init function.

SYSMPU_MASTER_RWATTRIBUTE_START_PORT: define the start master port with read and write attributes.

SYSMPU_REGION_RWXRIGHTS_MASTER_SHIFT(n): SYSMPU the bit shift for masters with privilege rights: read write and execute.

SYSMPU_REGION_RWXRIGHTS_MASTER_MASK(n): SYSMPU masters with read, write and execute rights bit mask.

SYSMPU_REGION_RWXRIGHTS_MASTER_WIDTH: SYSMPU masters with read, write and execute rights bit width.

SYSMPU_REGION_RWXRIGHTS_MASTER(n, x): SYSMPU masters with read, write and execute rights priority setting.

SYSMPU_REGION_RWXRIGHTS_MASTER_PE_SHIFT(n): SYSMPU masters with read, write and execute rights process enable bit shift.

SYSMPU_REGION_RWXRIGHTS_MASTER_PE_MASK(n): SYSMPU masters with read, write and execute rights process enable bit mask.

SYSMPU_REGION_RWXRIGHTS_MASTER_PE(n, x): SYSMPU masters with read, write and execute rights process enable setting.

SYSMPU_REGION_RWRIGHTS_MASTER_SHIFT(n): SYSMPU masters with normal read write permission bit shift.

SYSMPU_REGION_RWRIGHTS_MASTER_MASK(n): SYSMPU masters with normal read write rights bit mask.

SYSMPU_REGION_RWRIGHTS_MASTER(n, x): SYSMPU masters with normal read write rights priority setting.

struct _sysmpu_hardware_info

#include <fsl_sysmpu.h>

SYSMPU hardware basic information.

Public Members

uint8_t hardwareRevisionLevel: Specifies the SYSMPU’s hardware and definition reversion level.

uint8_t slavePortsNumbers: Specifies the number of slave ports connected to SYSMPU.

sysmpu_region_total_num_t regionsNumbers: Indicates the number of region descriptors implemented.

struct _sysmpu_access_err_info

#include <fsl_sysmpu.h>

SYSMPU detail error access information.

Public Members

uint32_t master: Access error master.

sysmpu_err_attributes_t attributes: Access error attributes.

sysmpu_err_access_type_t accessType: Access error type.

sysmpu_err_access_control_t accessControl: Access error control.

uint32_t address: Access error address.

uint8_t processorIdentification: Access error processor identification.

struct _sysmpu_rwxrights_master_access_control

#include <fsl_sysmpu.h>

SYSMPU read/write/execute rights control for bus master 0 ~ 3.

Public Members

sysmpu_supervisor_access_rights_t superAccessRights: Master access rights in supervisor mode.

sysmpu_user_access_rights_t userAccessRights: Master access rights in user mode.

bool processIdentifierEnable: Enables or disables process identifier.

struct _sysmpu_rwrights_master_access_control

#include <fsl_sysmpu.h>

SYSMPU read/write access control for bus master 4 ~ 7.

Public Members

bool writeEnable: Enables or disables write permission.

bool readEnable: Enables or disables read permission.

struct _sysmpu_region_config

#include <fsl_sysmpu.h>

SYSMPU region configuration structure.

This structure is used to configure the regionNum region. The accessRights1[0] ~ accessRights1[3] are used to configure the bus master 0 ~ 3 with the privilege rights setting. The accessRights2[0] ~ accessRights2[3] are used to configure the high master 4 ~ 7 with the normal read write permission. The master port assignment is the chip configuration. Normally, the core is the master 0, debugger is the master 1. Note that the SYSMPU assigns a priority scheme where the debugger is treated as the highest priority master followed by the core and then all the remaining masters. SYSMPU protection does not allow writes from the core to affect the “regionNum 0” start and end address nor the permissions associated with the debugger. It can only write the permission fields associated with the other masters. This protection guarantees that the debugger always has access to the entire address space and those rights can’t be changed by the core or any other bus master. Prepare the region configuration when regionNum is 0.

Public Members

uint32_t regionNum: SYSMPU region number, range form 0 ~ FSL_FEATURE_SYSMPU_DESCRIPTOR_COUNT - 1.

uint32_t startAddress: Memory region start address. Note: bit0 ~ bit4 always be marked as 0 by SYSMPU. The actual start address is 0-modulo-32 byte address.

uint32_t endAddress: Memory region end address. Note: bit0 ~ bit4 always be marked as 1 by SYSMPU. The actual end address is 31-modulo-32 byte address.

sysmpu_rwxrights_master_access_control_t accessRights1[4]: Masters with read, write and execute rights setting.

sysmpu_rwrights_master_access_control_t accessRights2[4]: Masters with normal read write rights setting.

uint8_t processIdentifier: Process identifier used when “processIdentifierEnable” set with true.

uint8_t processIdMask: Process identifier mask. The setting bit will ignore the same bit in process identifier.

struct _sysmpu_config

#include <fsl_sysmpu.h>

The configuration structure for the SYSMPU initialization.

This structure is used when calling the SYSMPU_Init function.

Public Members

sysmpu_region_config_t regionConfig: Region access permission.

struct _sysmpu_config *next: Pointer to the next structure.

TRGMUX: Trigger Mux Driver

static inline void TRGMUX_LockRegister(TRGMUX_Type *base, uint32_t index)

Sets the flag of the register which is used to mark writeable.

The function sets the flag of the register which is used to mark writeable. Example:

TRGMUX_LockRegister(TRGMUX0,kTRGMUX_Trgmux0Dmamux0);

Parameters:

base – TRGMUX peripheral base address.
index – The index of the TRGMUX register, see the enum trgmux_device_t defined in <SOC>.h.

status_t TRGMUX_SetTriggerSource(TRGMUX_Type *base, uint32_t index, trgmux_trigger_input_t input, uint32_t trigger_src)

Configures the trigger source of the appointed peripheral.

The function configures the trigger source of the appointed peripheral. Example:

TRGMUX_SetTriggerSource(TRGMUX0, kTRGMUX_Trgmux0Dmamux0, kTRGMUX_TriggerInput0, kTRGMUX_SourcePortPin);

Parameters:

base – TRGMUX peripheral base address.
index – The index of the TRGMUX register, see the enum trgmux_device_t defined in <SOC>.h.
input – The MUX select for peripheral trigger input
trigger_src – The trigger inputs for various peripherals. See the enum trgmux_source_t defined in <SOC>.h.

Return values:

kStatus_Success – Configured successfully.
kStatus_TRGMUX_Locked – Configuration failed because the register is locked.

FSL_TRGMUX_DRIVER_VERSION: TRGMUX driver version.

TRGMUX configure status.

Values:

enumerator kStatus_TRGMUX_Locked: Configure failed for register is locked

enum _trgmux_trigger_input

Defines the MUX select for peripheral trigger input.

Values:

enumerator kTRGMUX_TriggerInput0: The MUX select for peripheral trigger input 0

enumerator kTRGMUX_TriggerInput1: The MUX select for peripheral trigger input 1

enumerator kTRGMUX_TriggerInput2: The MUX select for peripheral trigger input 2

enumerator kTRGMUX_TriggerInput3: The MUX select for peripheral trigger input 3

typedef enum _trgmux_trigger_input trgmux_trigger_input_t: Defines the MUX select for peripheral trigger input.

WDOG32: 32-bit Watchdog Timer

void WDOG32_GetDefaultConfig(wdog32_config_t *config)

Initializes the WDOG32 configuration structure.

This function initializes the WDOG32 configuration structure to default values. The default values are:

wdog32Config->enableWdog32 = true;
wdog32Config->clockSource = kWDOG32_ClockSource1;
wdog32Config->prescaler = kWDOG32_ClockPrescalerDivide1;
wdog32Config->workMode.enableWait = true;
wdog32Config->workMode.enableStop = false;
wdog32Config->workMode.enableDebug = false;
wdog32Config->testMode = kWDOG32_TestModeDisabled;
wdog32Config->enableUpdate = true;
wdog32Config->enableInterrupt = false;
wdog32Config->enableWindowMode = false;
wdog32Config->windowValue = 0U;
wdog32Config->timeoutValue = 0xFFFFU;

See also

wdog32_config_t

Parameters:

config – Pointer to the WDOG32 configuration structure.

AT_QUICKACCESS_SECTION_CODE (status_t WDOG32_Init(WDOG_Type *base, const wdog32_config_t *config))

Initializes the WDOG32 module.

This function initializes the WDOG32. To reconfigure the WDOG32 without forcing a reset first, enableUpdate must be set to true in the configuration.

Example:

wdog32_config_t config;
WDOG32_GetDefaultConfig(&config);
config.timeoutValue = 0x7ffU;
config.enableUpdate = true;
WDOG32_Init(wdog_base,&config);

Note

If there is errata ERR010536 (FSL_FEATURE_WDOG_HAS_ERRATA_010536 defined as 1), then after calling this function, user need delay at least 4 LPO clock cycles before accessing other WDOG32 registers.

Parameters:

base – WDOG32 peripheral base address.
config – The configuration of the WDOG32.

Return values:

kStatus_Success – The initialization was successful
kStatus_Timeout – The initialization timed out

status_t WDOG32_Deinit(WDOG_Type *base)

De-initializes the WDOG32 module.

This function shuts down the WDOG32. Ensure that the WDOG_CS.UPDATE is 1, which means that the register update is enabled.

Parameters:

base – WDOG32 peripheral base address.

Return values:

kStatus_Success – The de-initialization was successful
kStatus_Timeout – The de-initialization timed out

AT_QUICKACCESS_SECTION_CODE (status_t WDOG32_Unlock(WDOG_Type *base))

Unlocks the WDOG32 register written.

This function unlocks the WDOG32 register written.

Before starting the unlock sequence and following the configuration, disable the global interrupts. Otherwise, an interrupt could effectively invalidate the unlock sequence and the WCT may expire. After the configuration finishes, re-enable the global interrupts.

Parameters:

base – WDOG32 peripheral base address

Return values:

kStatus_Success – The unlock sequence was successful
kStatus_Timeout – The unlock sequence timed out

AT_QUICKACCESS_SECTION_CODE (void WDOG32_Enable(WDOG_Type *base))

Enables the WDOG32 module.

Disables the WDOG32 module.

This function writes a value into the WDOG_CS register to enable the WDOG32. The WDOG_CS register is a write-once register. Please check the enableUpdate is set to true for calling WDOG32_Init to do wdog initialize. Before call the re-configuration APIs, ensure that the WCT window is still open and this register has not been written in this WCT while the function is called.

This function writes a value into the WDOG_CS register to disable the WDOG32. The WDOG_CS register is a write-once register. Please check the enableUpdate is set to true for calling WDOG32_Init to do wdog initialize. Before call the re-configuration APIs, ensure that the WCT window is still open and this register has not been written in this WCT while the function is called.

Parameters:

base – WDOG32 peripheral base address.
base – WDOG32 peripheral base address

AT_QUICKACCESS_SECTION_CODE (void WDOG32_EnableInterrupts(WDOG_Type *base, uint32_t mask))

Enables the WDOG32 interrupt.

Clears the WDOG32 flag.

Disables the WDOG32 interrupt.

This function writes a value into the WDOG_CS register to enable the WDOG32 interrupt. The WDOG_CS register is a write-once register. Please check the enableUpdate is set to true for calling WDOG32_Init to do wdog initialize. Before call the re-configuration APIs, ensure that the WCT window is still open and this register has not been written in this WCT while the function is called.

Example to clear an interrupt flag:

WDOG32_ClearStatusFlags(wdog_base,kWDOG32_InterruptFlag);

Parameters:

base – WDOG32 peripheral base address.
mask – The interrupts to enable. The parameter can be a combination of the following source if defined:
- kWDOG32_InterruptEnable
This function writes a value into the WDOG_CS register to disable the WDOG32 interrupt. The WDOG_CS register is a write-once register. Please check the enableUpdate is set to true for calling WDOG32_Init to do wdog initialize. Before call the re-configuration APIs, ensure that the WCT window is still open and this register has not been written in this WCT while the function is called.
base – WDOG32 peripheral base address.
mask – The interrupts to disabled. The parameter can be a combination of the following source if defined:
- kWDOG32_InterruptEnable
This function clears the WDOG32 status flag.
base – WDOG32 peripheral base address.
mask – The status flags to clear. The parameter can be any combination of the following values:
- kWDOG32_InterruptFlag

static inline uint32_t WDOG32_GetStatusFlags(WDOG_Type *base)

Gets the WDOG32 all status flags.

This function gets all status flags.

Example to get the running flag:

uint32_t status;
status = WDOG32_GetStatusFlags(wdog_base) & kWDOG32_RunningFlag;

See also

_wdog32_status_flags_t

true: related status flag has been set.
false: related status flag is not set.

Parameters:

base – WDOG32 peripheral base address

Returns:

State of the status flag: asserted (true) or not-asserted (false).

AT_QUICKACCESS_SECTION_CODE (void WDOG32_SetTimeoutValue(WDOG_Type *base, uint16_t timeoutCount))

Sets the WDOG32 timeout value.

This function writes a timeout value into the WDOG_TOVAL register. The WDOG_TOVAL register is a write-once register. To ensure the reconfiguration fits the timing of WCT, unlock function will be called inline.

Parameters:

base – WDOG32 peripheral base address
timeoutCount – WDOG32 timeout value, count of WDOG32 clock ticks.

AT_QUICKACCESS_SECTION_CODE (void WDOG32_SetWindowValue(WDOG_Type *base, uint16_t windowValue))

Sets the WDOG32 window value.

This function writes a window value into the WDOG_WIN register. The WDOG_WIN register is a write-once register. Please check the enableUpdate is set to true for calling WDOG32_Init to do wdog initialize. Before call the re-configuration APIs, ensure that the WCT window is still open and this register has not been written in this WCT while the function is called.

Parameters:

base – WDOG32 peripheral base address.
windowValue – WDOG32 window value.

static inline void WDOG32_Refresh(WDOG_Type *base)

Refreshes the WDOG32 timer.

This function feeds the WDOG32. This function should be called before the Watchdog timer is in timeout. Otherwise, a reset is asserted.

Parameters:

base – WDOG32 peripheral base address

static inline uint16_t WDOG32_GetCounterValue(WDOG_Type *base)

Gets the WDOG32 counter value.

This function gets the WDOG32 counter value.

Parameters:

base – WDOG32 peripheral base address.

Returns:

Current WDOG32 counter value.

WDOG_FIRST_WORD_OF_UNLOCK: First word of unlock sequence

WDOG_SECOND_WORD_OF_UNLOCK: Second word of unlock sequence

WDOG_FIRST_WORD_OF_REFRESH: First word of refresh sequence

WDOG_SECOND_WORD_OF_REFRESH: Second word of refresh sequence

FSL_WDOG32_DRIVER_VERSION: WDOG32 driver version.

enum _wdog32_clock_source

Max loops to wait for WDOG32 unlock sequence complete.

This is the maximum number of loops to wait for the wdog32 unlock sequence to complete. If set to 0, it will wait indefinitely until the unlock sequence is complete.

Max loops to wait for WDOG32 reconfiguration complete.

This is the maximum number of loops to wait for the wdog32 reconfiguration to complete. If set to 0, it will wait indefinitely until the reconfiguration is complete.

Describes WDOG32 clock source.

Values:

enumerator kWDOG32_ClockSource0: Clock source 0

enumerator kWDOG32_ClockSource1: Clock source 1

enumerator kWDOG32_ClockSource2: Clock source 2

enumerator kWDOG32_ClockSource3: Clock source 3

enum _wdog32_clock_prescaler

Describes the selection of the clock prescaler.

Values:

enumerator kWDOG32_ClockPrescalerDivide1: Divided by 1

enumerator kWDOG32_ClockPrescalerDivide256: Divided by 256

enum _wdog32_test_mode

Describes WDOG32 test mode.

Values:

enumerator kWDOG32_TestModeDisabled: Test Mode disabled

enumerator kWDOG32_UserModeEnabled: User Mode enabled

enumerator kWDOG32_LowByteTest: Test Mode enabled, only low byte is used

enumerator kWDOG32_HighByteTest: Test Mode enabled, only high byte is used

enum _wdog32_interrupt_enable_t

WDOG32 interrupt configuration structure.

This structure contains the settings for all of the WDOG32 interrupt configurations.

Values:

enumerator kWDOG32_InterruptEnable: Interrupt is generated before forcing a reset

enum _wdog32_status_flags_t

WDOG32 status flags.

This structure contains the WDOG32 status flags for use in the WDOG32 functions.

Values:

enumerator kWDOG32_RunningFlag: Running flag, set when WDOG32 is enabled

enumerator kWDOG32_InterruptFlag: Interrupt flag, set when interrupt occurs

typedef enum _wdog32_clock_source wdog32_clock_source_t

Max loops to wait for WDOG32 unlock sequence complete.

This is the maximum number of loops to wait for the wdog32 unlock sequence to complete. If set to 0, it will wait indefinitely until the unlock sequence is complete.

Max loops to wait for WDOG32 reconfiguration complete.

This is the maximum number of loops to wait for the wdog32 reconfiguration to complete. If set to 0, it will wait indefinitely until the reconfiguration is complete.

Describes WDOG32 clock source.

typedef enum _wdog32_clock_prescaler wdog32_clock_prescaler_t: Describes the selection of the clock prescaler.

typedef struct _wdog32_work_mode wdog32_work_mode_t: Defines WDOG32 work mode.

typedef enum _wdog32_test_mode wdog32_test_mode_t: Describes WDOG32 test mode.

typedef struct _wdog32_config wdog32_config_t: Describes WDOG32 configuration structure.

struct _wdog32_work_mode

#include <fsl_wdog32.h>

Defines WDOG32 work mode.

Public Members

bool enableWait: Enables or disables WDOG32 in wait mode

bool enableStop: Enables or disables WDOG32 in stop mode

bool enableDebug: Enables or disables WDOG32 in debug mode

struct _wdog32_config

#include <fsl_wdog32.h>

Describes WDOG32 configuration structure.

Public Members

bool enableWdog32: Enables or disables WDOG32

wdog32_clock_source_t clockSource: Clock source select

wdog32_clock_prescaler_t prescaler: Clock prescaler value

wdog32_work_mode_t workMode: Configures WDOG32 work mode in debug stop and wait mode

wdog32_test_mode_t testMode: Configures WDOG32 test mode

bool enableUpdate: Update write-once register enable

bool enableInterrupt: Enables or disables WDOG32 interrupt

bool enableWindowMode: Enables or disables WDOG32 window mode

uint16_t windowValue: Window value

uint16_t timeoutValue: Timeout value