Supported Operator List

Supported Operator List by Tensorflow Lite for Microcontrollers

The TensorFlow Lite library since version 2.3 provides an alternative implementation optimized for microcontrollers with low memory capacity called TensorFlow Lite for Microcontrollers (or TensorFlow Lite Micro). In comparison to TensorFlow Lite, the Micro version uses static memory allocation, has no dependencies on standard C or C++ libraries and contains implementations of operation kernels optimized for Arm Cortex-M architecture using Arm’s CMSIS-NN library. The following table contains a comparison of supported operations by both libraries.

TensorFlow Lite operations	Supported by TensorFlow Lite for Microcontrollers
ABS	Yes
ADD	Yes
ADD_N	Yes
ARG_MAX	Yes
ARG_MIN	Yes
ASSIGN_VARIABLE	Yes
ATAN2	No
AVERAGE_POOL_2D	Yes
BATCH_MATMUL	Yes
BATCH_TO_SPACE_ND	Yes
BIDIRECTIONAL_SEQUENCE_LSTM	No
BIDIRECTIONAL_SEQUENCE_RNN	No
BROADCAST_ARGS	Yes
BROADCAST_TO	Yes
BUCKETIZE	No
CALL_ONCE	No
CAST	Yes
CEIL	Yes
COMPLEX_ABS	No
CONCATENATION	Yes
CONV_2D	Yes
CONV_3D	No
CONV_3D_TRANSPOSE	No
COS	Yes
CUMSUM	Yes
DELAY	Yes
DENSIFY	No
DEPTH_TO_SPACE	Yes
DEPTHWISE_CONV_2D	Yes
DEQUANTIZE	Yes
DETECTION_POSTPROCESS	Yes
DIV	Yes
DYNAMIC_UPDATE_SLICE	No
ELU	Yes
EMBEDDING_LOOKUP	Yes
EMBEDDING_LOOKUP_SPARSE	No
EQUAL	Yes
EXP	Yes
EXPAND_DIMS	Yes
FAKE_QUANT	No
FILL	Yes
FLOOR	Yes
FLOOR_DIV	Yes
FLOOR_MOD	Yes
FULLY_CONNECTED	Yes
GATHER	Yes
GELU	No
GATHER_ND	Yes
GREATER	Yes
GREATER_EQUAL	Yes
HARD_SWISH	Yes
HASHTABLE	No
HASHTABLE_FIND	No
HASHTABLE_IMPORT	No
HASHTABLE_LOOKUP	No
HASHTABLE_SIZE	No
IF	Yes
IMAG	No
L2_NORMALIZATION	Yes
L2_POOL_2D	Yes
LEAKY_RELU	Yes
LESS	Yes
LESS_EQUAL	Yes
LOCAL_RESPONSE_NORMALIZATION	No
LOG	Yes
LOG_SOFTMAX	Yes
LOGICAL_AND	Yes
LOGICAL_NOT	Yes
LOGICAL_OR	Yes
LOGISTIC	Yes
LSH_PROJECTION	No
LSTM	No
MATRIX_DIAG	No
MATRIX_SET_DIAG	No
MAX_POOL_2D	Yes
MAXIMUM	Yes
MEAN	Yes
MINIMUM	Yes
MIRROR_PAD	Yes
MUL	Yes
MULTINOMIAL	No
NEG	Yes
NON_MAX_SUPPRESSION_V4	No
NON_MAX_SUPPRESSION_V5	No
NOT_EQUAL	Yes
ONE_HOT	No
PACK	Yes
PAD	Yes
PADV2	Yes
POW	No
PRELU	Yes
QUANTIZE	Yes
RANDOM_STANDARD_NORMAL	No
RANDOM_UNIFORM	No
RANGE	No
RANK	No
READ_VARIABLE	No
REAL	No
REDUCE_ALL	No
REDUCE_ANY	No
REDUCE_MAX	Yes
REDUCE_MIN	No
REDUCE_PROD	No
RELU	Yes
RELU_N1_TO_1	No
RELU6	Yes
RFFT2D	No
RESHAPE	Yes
RESIZE_BILINEAR	Yes
RESIZE_NEAREST_NEIGHBOR	Yes
REVERSE_SEQUENCE	No
REVERSE_V2	No
RNN	No
ROUND	Yes
RSQRT	Yes
SCATTER_ND	No
SEGMENT_SUM	No
SELECT	No
SELECT_V2	Yes
SHAPE	Yes
SIN	Yes
SKIP_GRAM	No
SLICE	Yes
SOFTMAX	Yes
SPACE_TO_BATCH_ND	Yes
SPACE_TO_DEPTH	Yes
SPARSE_TO_DENSE	No
SPLIT	Yes
SPLIT_V	Yes
SQRT	Yes
SQUARE	Yes
SQUARED_DIFFERENCE	Yes
SQUEEZE	Yes
STRIDED_SLICE	Yes
SUB	Yes
SUM	Yes
SVDF	Yes
TANH	Yes
TILE	No
TOPK_V2	No
TRANSPOSE	Yes
TRANSPOSE_CONV	Yes
UNIDIRECTIONAL_SEQUENCE_LSTM	Yes (on Xtensa cores)
UNIDIRECTIONAL_SEQUENCE_RNN	No
UNIQUE	No
UNPACK	Yes
WHERE	No
WHILE	Yes
UNSORTED_SEGMENT_MAX	No
UNSORTED_SEGMENT_PROD	No
UNSORTED_SEGMENT_SUM	No
VAR_HANDLE	No
ZEROS_LIKE	Yes

Table 2 contains an overview of hardware optimized TensorFlow Lite Micro operators on supported devices. Operators not listed in the table are reference C++ implementations only. Optimized operators for ARM Cortex-M cores leverage the ARM CMSIS-NN library. For details, see the middleware/eiq/tensorflow-lite/third_party/cmsis/CMSIS/NN/README.md file. Optimized operators for Cadence Xtensa cores (HiFi4 and FusionF1) leverage the Xtensa HiFi4 NN library.

Supported Operator List by eIQ Neutron NPU Library and HiFi 4 NN Library

Operator	Operator input type	CMSIS-NN for Cortex-M33 and Cortex-M7	MCXN947 (eIQ Neutron NPU) MCXN547 (eIQ Neutron NPU)	i.MX RT700 (eIQ Neutron NPU)	i.MX RT600 i.MX RT700 (HiFi4 NN)
ABS	float uint8 int8 int16	No No No No	No Yes Yes No	No Yes Yes No	Yes No No No
ADD	float uint8 int8 int16	Yes No Yes Yes	No Yes Yes No	No Yes Yes Yes	Yes No Yes Yes
ARGMAX	float uint8 int8 int16	Yes No Yes Yes	No Yes Yes No	No Yes Yes No	Yes Yes Yes Yes
AVERAGE_POOL_2D	float uint8 int8 int16	Yes No Yes Yes	No Yes Yes No	No Yes Yes No	Yes Yes Yes No
BATCHMATMUL	float uint8 int8 int16	Yes No Yes Yes	No Yes Yes No	No Yes Yes Yes	No No No No
BATCHNORML	float uint8 int8 int16	No No No No	No Yes Yes No	No Yes Yes No	No No No No
CONCAT	float uint8 int8 int16	No No No No	No Yes Yes No	No Yes Yes Yes	No No No No
CONV_1D	float uint8 int8 int16	No No No No	No Yes Yes No	No Yes Yes Yes	No No No No
CONV_2D	float uint8 int8 int16	Yes No Yes Yes	No Yes Yes No	No Yes Yes Yes	Yes Yes Yes Yes
DEPTHWISE_CONV_2D	float uint8 int8 int16	Yes No Yes Yes	No Yes Yes Yes	No Yes Yes Yes	Yes Yes Yes Yes
FULLY_CONNECTED	float uint8 int8 int16	Yes No Yes No	No Yes Yes No	No Yes Yes Yes	Yes Yes Yes Yes
GATHER	float uint8 int8 int16	No No No No	No Yes Yes No	No Yes Yes No	No No No No
RELU6	float uint8 int8 int16	No No No No	No Yes Yes No	No Yes Yes No	Yes No Yes No
RELU	float uint8 int8 int16	No No No No	No Yes Yes No	No Yes Yes No	Yes Yes Yes No
LEAKY_RELU	float uint8 int8 int16	No No No No	No Yes Yes No	No Yes Yes No	No No Yes No
LOGISTIC	float uint8 int8 int16	No No No No	No Yes Yes No	No Yes Yes No	No No Yes No
MAX	float uint8 int8 int16	Yes No Yes Yes	No No Yes No	No No Yes No	No No Yes No
MAX_POOL_2D	float uint8 int8 int16	Yes No Yes Yes	No Yes Yes No	No Yes Yes No	Yes Yes Yes No
MIRRORPAD	float uint8 int8 int16	No No No No	No Yes Yes No	No Yes Yes No	No No No No
MUL	float uint8 int8 int16	Yes No Yes Yes	No Yes Yes No	No Yes Yes Yes	Yes No Yes Yes
PAD	float uint8 int8 int16	No No No No	No Yes Yes No	No Yes Yes No	Yes No Yes Yes
PRELU	float uint8 int8 int16	No No No No	No No Yes No	No No Yes Yes	No No Yes No
RESIZE_NEAREST_NEIGHBOR	float uint8 int8 int16	No No No No	No Yes Yes No	No Yes Yes No	No No No No
SLICE	float uint8 int8 int16	No No No No	No Yes Yes No	No Yes Yes Yes	No No No No
STRIDED_SLICE	float uint8 int8 int16	No No No No	No No Yes No	No No Yes No	Yes No Yes Yes
SOFTMAX	float uint8 int8 int16	Yes Yes Yes Yes	No Yes Yes No	No Yes Yes No	No Yes Yes No
SUB	float uint8 int8 int16	No No No No	No Yes Yes No	No Yes Yes Yes	Yes No Yes Yes
TANH	float uint8 int8 int16	No No No No	No Yes Yes No	No Yes Yes No	Yes No Yes Yes
TRANSPOSE	float uint8 int8 int16	Yes No Yes Yes	No Yes Yes No	No Yes Yes No	No No Yes No
TRANSPOSE_CONV	float uint8 int8 int16	Yes No Yes Yes	No Yes Yes No	No Yes Yes Yes	Yes No Yes Yes
UNIDIRECTIONAL_SEQUENCE_LSTM	float uint8 int8 int16	No No Yes Yes	No No Yes Ye*	No No Yes Yes	No No No Yes