LPC865

LPC865#

Clock Driver#

enum _clock_ip_name#

Clock gate name used for CLOCK_EnableClock/CLOCK_DisableClock.

Values:

enumerator kCLOCK_IpInvalid#: Invalid Ip Name.

enumerator kCLOCK_Rom#: Clock gate name: Rom.

enumerator kCLOCK_Ram0_1#: Clock gate name: Ram0_1.

enumerator kCLOCK_I2c0#: Clock gate name: I2c0.

enumerator kCLOCK_Gpio0#: Clock gate name: Gpio0.

enumerator kCLOCK_Swm#: Clock gate name: Swm.

enumerator kCLOCK_Wkt#: Clock gate name: Wkt.

enumerator kCLOCK_Mrt#: Clock gate name: Mrt.

enumerator kCLOCK_Spi0#: Clock gate name: Spi0.

enumerator kCLOCK_Spi1#: Clock gate name: Spi1.

enumerator kCLOCK_Crc#: Clock gate name: Crc.

enumerator kCLOCK_Uart0#: Clock gate name: Uart0.

enumerator kCLOCK_Uart1#: Clock gate name: Uart1.

enumerator kCLOCK_Uart2#: Clock gate name: Uart2.

enumerator kCLOCK_Wwdt#: Clock gate name: Wwdt.

enumerator kCLOCK_Iocon#: Clock gate name: Iocon.

enumerator kCLOCK_Acmp#: Clock gate name: Acmp.

enumerator kCLOCK_Gpio1#: Clock gate name: Gpio1.

enumerator kCLOCK_Ftm0#: Clock gate name: Ftm0.

enumerator kCLOCK_Ftm1#: Clock gate name: Ftm1.

enumerator kCLOCK_I3c0#: Clock gate name: I3c0.

enumerator kCLOCK_Adc#: Clock gate name: Adc.

enumerator kCLOCK_GpioInt#: Clock gate name: GpioInt.

enumerator kCLOCK_Dma#: Clock gate name: Dma.

enum _clock_name#

Clock name used to get clock frequency.

Values:

enumerator kCLOCK_CoreSysClk#: Cpu/AHB/AHB matrix/Memories,etc

enumerator kCLOCK_MainClk#: Main clock

enumerator kCLOCK_Fro#: FRO18/24/30

enumerator kCLOCK_FroDiv#: FRO div clock

enumerator kCLOCK_ExtClk#: External Clock

enumerator kCLOCK_PllOut#: PLL Output

enumerator kCLOCK_LpOsc#: Low power Oscillator

enumerator kCLOCK_Frg0#: fractional rate0

enumerator kCLOCK_Frg1#: fractional rate1

enum _clock_select#

Clock Mux Switches CLK_MUX_DEFINE(reg, mux) reg is used to define the mux register mux is used to define the mux value.

Values:

enumerator kADC_Clk_From_Fro#: Mux ADC_Clk from Fro.

enumerator kADC_Clk_From_SysPll_DIV#: Mux ADC_Clk from SysPllDiv.

enumerator kEXT_Clk_From_SysOsc#: Mux EXT_Clk from SysOsc.

enumerator kEXT_Clk_From_ClkIn#: Mux EXT_Clk from ClkIn.

enumerator kUART0_Clk_From_Fro#: Mux UART0_Clk from Fro.

enumerator kUART0_Clk_From_MainClk#: Mux UART0_Clk from MainClk.

enumerator kUART0_Clk_From_Frg0Clk#: Mux UART0_Clk from Frg0Clk.

enumerator kUART0_Clk_From_Frg1Clk#: Mux UART0_Clk from Frg1Clk.

enumerator kUART0_Clk_From_Fro_Div#: Mux UART0_Clk from Fro_Div.

enumerator kUART1_Clk_From_Fro#: Mux UART1_Clk from Fro.

enumerator kUART1_Clk_From_MainClk#: Mux UART1_Clk from MainClk.

enumerator kUART1_Clk_From_Frg0Clk#: Mux UART1_Clk from Frg0Clk.

enumerator kUART1_Clk_From_Frg1Clk#: Mux UART1_Clk from Frg1Clk.

enumerator kUART1_Clk_From_Fro_Div#: Mux UART1_Clk from Fro_Div.

enumerator kUART2_Clk_From_Fro#: Mux UART2_Clk from Fro.

enumerator kUART2_Clk_From_MainClk#: Mux UART2_Clk from MainClk.

enumerator kUART2_Clk_From_Frg0Clk#: Mux UART2_Clk from Frg0Clk.

enumerator kUART2_Clk_From_Frg1Clk#: Mux UART2_Clk from Frg1Clk.

enumerator kUART2_Clk_From_Fro_Div#: Mux UART2_Clk from Fro_Div.

enumerator kI2C0_Clk_From_Fro#: Mux I2C0_Clk from Fro.

enumerator kI2C0_Clk_From_MainClk#: Mux I2C0_Clk from MainClk.

enumerator kI2C0_Clk_From_Frg0Clk#: Mux I2C0_Clk from Frg0Clk.

enumerator kI2C0_Clk_From_Frg1Clk#: Mux I2C0_Clk from Frg1Clk.

enumerator kI2C0_Clk_From_Fro_Div#: Mux I2C0_Clk from Fro_Div.

enumerator kI3C_Clk_From_Fro#: Mux I3C_Clk from Fro.

enumerator kI3C_Clk_From_ExtClk#: Mux I3C_Clk from ExtClk.

enumerator kI3C_TC_Clk_From_I3C_Clk#: Mux I3C_TC_Clk from I3C_Clk.

enumerator kI3C_TC_Clk_From_LpOsc#: Mux I3C_TC_Clk from LpOsc.

enumerator kSPI0_Clk_From_Fro#: Mux SPI0_Clk from Fro.

enumerator kSPI0_Clk_From_MainClk#: Mux SPI0_Clk from MainClk.

enumerator kSPI0_Clk_From_Frg0Clk#: Mux SPI0_Clk from Frg0Clk.

enumerator kSPI0_Clk_From_Frg1Clk#: Mux SPI0_Clk from Frg1Clk.

enumerator kSPI0_Clk_From_Fro_Div#: Mux SPI0_Clk from Fro_Div.

enumerator kSPI1_Clk_From_Fro#: Mux SPI1_Clk from Fro.

enumerator kSPI1_Clk_From_MainClk#: Mux SPI1_Clk from MainClk.

enumerator kSPI1_Clk_From_Frg0Clk#: Mux SPI1_Clk from Frg0Clk.

enumerator kSPI1_Clk_From_Frg1Clk#: Mux SPI1_Clk from Frg1Clk.

enumerator kSPI1_Clk_From_Fro_Div#: Mux SPI1_Clk from Fro_Div.

enumerator kFRG0_Clk_From_Fro#: Mux FRG0_Clk from Fro.

enumerator kFRG0_Clk_From_MainClk#: Mux FRG0_Clk from MainClk.

enumerator kFRG0_Clk_From_SysPll_DIV#: Mux FRG0_Clk from SysPllDiv.

enumerator kFRG1_Clk_From_Fro#: Mux FRG1_Clk from Fro.

enumerator kFRG1_Clk_From_MainClk#: Mux FRG1_Clk from MainClk.

enumerator kFRG1_Clk_From_SysPll_DIV#: Mux FRG1_Clk from SysPllDiv.

enumerator kCLKOUT_From_Fro#: Mux CLKOUT from Fro.

enumerator kCLKOUT_From_MainClk#: Mux CLKOUT from MainClk.

enumerator kCLKOUT_From_SysPll_DIV#: Mux CLKOUT from SysPllDiv.

enumerator kCLKOUT_From_ExtClk#: Mux CLKOUT from ExtClk.

enumerator kCLKOUT_From_LpOsc#: Mux CLKOUT from LpOsc.

enumerator kWKT_Clk_From_Fro#: Mux Wkt_Clk from FroOsc.

enumerator kWKT_Clk_From_LpOsc#: Mux Wkt_Clk from LpOsc.

enum _clock_divider#

Clock divider.

Values:

enumerator kCLOCK_DivPllClk#: Pll Clock Divider.

enumerator kCLOCK_DivAdcClk#: Adc Clock Divider.

enumerator kCLOCK_DivClkOut#: Clk Out Divider.

enumerator kCLOCK_IOCONCLKDiv6#: IOCON Clock Div6 Divider.

enumerator kCLOCK_IOCONCLKDiv5#: IOCON Clock Div5 Divider.

enumerator kCLOCK_IOCONCLKDiv4#: IOCON Clock Div4 Divider.

enumerator kCLOCK_IOCONCLKDiv3#: IOCON Clock Div3 Divider.

enumerator kCLOCK_IOCONCLKDiv2#: IOCON Clock Div2 Divider.

enumerator kCLOCK_IOCONCLKDiv1#: IOCON Clock Div1 Divider.

enumerator kCLOCK_IOCONCLKDiv0#: IOCON Clock Div0 Divider.

enum _clock_fro_src#

fro output frequency source definition

Values:

enumerator kCLOCK_FroSrcFroOscDiv#: fro source from the fro oscillator divided by 2

enumerator kCLOCK_FroSrcFroOsc#: fre source from the fro oscillator directly

enum _clock_fro_osc_freq#

fro oscillator output frequency value definition

Values:

enumerator kCLOCK_FroOscOut36M#: FRO oscillator output 36M

enumerator kCLOCK_FroOscOut48M#: FRO oscillator output 48M

enumerator kCLOCK_FroOscOut60M#: FRO oscillator output 60M

enum _clock_sys_pll_src#

PLL clock definition.

Values:

enumerator kCLOCK_SysPllSrcFRO#: system pll source from FRO

enumerator kCLOCK_SysPllSrcExtClk#: system pll source from external clock

enumerator kCLOCK_SysPllSrcLpOsc#: system pll source from Low power oscillator

enumerator kCLOCK_SysPllSrcFroDiv#: system pll source from FRO divided clock

enum _clock_main_clk_src#

Main clock source definition.

Values:

enumerator kCLOCK_MainClkSrcFro#: main clock source from FRO

enumerator kCLOCK_MainClkSrcExtClk#: main clock source from Ext clock

enumerator kCLOCK_MainClkSrcLpOsc#: main clock source from Low power oscillator

enumerator kCLOCK_MainClkSrcFroDiv#: main clock source from FRO Div

enumerator kCLOCK_MainClkSrcSysPll#: main clock source from system pll

typedef enum _clock_ip_name clock_ip_name_t#: Clock gate name used for CLOCK_EnableClock/CLOCK_DisableClock.

typedef enum _clock_name clock_name_t#: Clock name used to get clock frequency.

typedef enum _clock_select clock_select_t#: Clock Mux Switches CLK_MUX_DEFINE(reg, mux) reg is used to define the mux register mux is used to define the mux value.

typedef enum _clock_divider clock_divider_t#: Clock divider.

typedef enum _clock_fro_src clock_fro_src_t#: fro output frequency source definition

typedef enum _clock_fro_osc_freq clock_fro_osc_freq_t#: fro oscillator output frequency value definition

typedef enum _clock_sys_pll_src clock_sys_pll_src#: PLL clock definition.

typedef enum _clock_main_clk_src clock_main_clk_src_t#: Main clock source definition.

typedef struct _clock_sys_pll clock_sys_pll_t#: PLL configuration structure.

volatile uint32_t g_Ext_Clk_Freq#

external clock frequency.

This variable is used to store the external clock frequency which is include external oscillator clock and external clk in clock frequency value, it is set by CLOCK_InitExtClkin when CLK IN is used as external clock or by CLOCK_InitSysOsc when external oscillator is used as external clock ,and it is returned by CLOCK_GetExtClkFreq.

FSL_CLOCK_DRIVER_VERSION#: CLOCK driver version 2.3.3.

SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY#

g_Lp_Osc_Freq#

Low power oscilltor clock frequency.

Definition for the low power oscillator frequency which is 1 Mhz at default, and it is returned by CLOCK_GetLpOscFreq.

CLOCK_FRO_SETTING_API_ROM_ADDRESS#: FRO clock setting API address in ROM.

CLOCK_FAIM_BASE#: FAIM base address.

ADC_CLOCKS#: Clock ip name array for ADC.

ACMP_CLOCKS#: Clock ip name array for ACMP.

SWM_CLOCKS#: Clock ip name array for SWM.

ROM_CLOCKS#: Clock ip name array for ROM.

SRAM_CLOCKS#: Clock ip name array for SRAM.

IOCON_CLOCKS#: Clock ip name array for IOCON.

GPIO_CLOCKS#: Clock ip name array for GPIO.

GPIO_INT_CLOCKS#: Clock ip name array for GPIO_INT.

DMA_CLOCKS#: Clock ip name array for DMA.

CRC_CLOCKS#: Clock ip name array for CRC.

WWDT_CLOCKS#: Clock ip name array for WWDT.

I2C_CLOCKS#: Clock ip name array for I2C.

USART_CLOCKS#: Clock ip name array for I2C.

SPI_CLOCKS#: Clock ip name array for SPI.

MRT_CLOCKS#: Clock ip name array for MRT.

WKT_CLOCKS#: Clock ip name array for WKT.

FTM_CLOCKS#: Clock ip name array for FLEXTMR.

I3C_CLOCKS#: Clock ip name array for I3C.

CLK_GATE_DEFINE(reg, bit)#: Internal used Clock definition only.

CLK_GATE_GET_REG(x)#

CLK_GATE_GET_BITS_SHIFT(x)#

CLK_MUX_DEFINE(reg, mux)#

CLK_MUX_GET_REG(x)#

CLK_MUX_GET_MUX(x)#

CLK_MAIN_CLK_MUX_DEFINE(preMux, mux)#

CLK_MAIN_CLK_MUX_GET_PRE_MUX(x)#

CLK_MAIN_CLK_MUX_GET_MUX(x)#

CLK_DIV_DEFINE(reg)#

CLK_DIV_GET_REG(x)#

CLK_WDT_OSC_DEFINE(freq, regValue)#

CLK_WDT_OSC_GET_FREQ(x)#

CLK_WDT_OSC_GET_REG(x)#

CLK_FRG_DIV_REG_MAP(base)#

CLK_FRG_MUL_REG_MAP(base)#

CLK_FRG_SEL_REG_MAP(base)#

SYS_AHB_CLK_CTRL0#

SYS_AHB_CLK_CTRL1#

static inline void CLOCK_EnableClock(clock_ip_name_t clk)#

static inline void CLOCK_DisableClock(clock_ip_name_t clk)#

static inline void CLOCK_Select(clock_select_t sel)#

static inline void CLOCK_SetClkDivider(clock_divider_t name, uint32_t value)#

static inline uint32_t CLOCK_GetClkDivider(clock_divider_t name)#

static inline void CLOCK_SetCoreSysClkDiv(uint32_t value)#

static inline void CLOCK_SetI3CFClkDiv(uint32_t value)#

static inline void CLOCK_SetI3CTCClkDiv(uint32_t value)#

static inline void CLOCK_SetI3CSClkDiv(uint32_t value)#

void CLOCK_SetMainClkSrc(clock_main_clk_src_t src)#

Set main clock reference source.

Parameters:

src – Refer to clock_main_clk_src_t to set the main clock source.

void CLOCK_SetFroOutClkSrc(clock_fro_src_t src)#

Set FRO clock source.

Parameters:

src – Please refer to _clock_fro_src definition.

static inline void CLOCK_SetFRGClkMul(uint32_t *base, uint32_t mul)#

void CLOCK_SetFLASHAccessCyclesForFreq(uint32_t iFreq)#

Set the flash wait states for the input freuqency.

Parameters:

iFreq – : Input frequency

uint32_t CLOCK_GetFRG0ClkFreq(void)#

Return Frequency of FRG0 Clock.

Returns:: Frequency of FRG0 Clock.

uint32_t CLOCK_GetFRG1ClkFreq(void)#

Return Frequency of FRG1 Clock.

Returns:: Frequency of FRG1 Clock.

uint32_t CLOCK_GetMainClkFreq(void)#

Return Frequency of Main Clock.

Returns:: Frequency of Main Clock.

uint32_t CLOCK_GetFroFreq(void)#

Return Frequency of FRO.

Returns:: Frequency of FRO.

static inline uint32_t CLOCK_GetCoreSysClkFreq(void)#

Return Frequency of core.

Returns:: Frequency of core.

uint32_t CLOCK_GetClockOutClkFreq(void)#

Return Frequency of ClockOut.

Returns:: Frequency of ClockOut

uint32_t CLOCK_GetUart0ClkFreq(void)#

Get UART0 frequency.

Return values:: UART0 – frequency value.

uint32_t CLOCK_GetUart1ClkFreq(void)#

Get UART1 frequency.

Return values:: UART1 – frequency value.

uint32_t CLOCK_GetUart2ClkFreq(void)#

Get UART2 frequency.

Return values:: UART2 – frequency value.

uint32_t CLOCK_GetUart3ClkFreq(void)#

Get UART3 frequency.

Return values:: UART3 – frequency value.

uint32_t CLOCK_GetUart4ClkFreq(void)#

Get UART4 frequency.

Return values:: UART4 – frequency value.

uint32_t CLOCK_GetI3cClkFreq(void)#

Get I3C frequency.

Return values:: I3C – frequency value.

uint32_t CLOCK_GetLpOscClkFreq(void)#

Get LP_OSC frequency.

Return values:: LP_OSC – frequency value.

uint32_t CLOCK_GetFreq(clock_name_t clockName)#

Return Frequency of selected clock.

Returns:: Frequency of selected clock

uint32_t CLOCK_GetSystemPLLInClockRate(void)#

Return System PLL input clock rate.

Returns:: System PLL input clock rate

static inline uint32_t CLOCK_GetSystemPLLFreq(void)#

Return Frequency of System PLL.

Returns:: Frequency of PLL

static inline uint32_t CLOCK_GetLpOscFreq(void)#

Get low power OSC frequency.

Return values:: low – power OSC frequency value.

static inline uint32_t CLOCK_GetExtClkFreq(void)#

Get external clock frequency.

Return values:: external – clock frequency value.

void CLOCK_InitSystemPll(const clock_sys_pll_t *config)#

System PLL initialize.

Parameters:

config – System PLL configurations.

static inline void CLOCK_DenitSystemPll(void)#: System PLL Deinitialize.

bool CLOCK_SetFRG0ClkFreq(uint32_t freq)#

Set FRG0 output frequency.

Parameters:

freq – Target output frequency, freq < input and (input / freq) < 2 should be satisfy.

Return values:

true – - successfully, false - input argument is invalid.

bool CLOCK_SetFRG1ClkFreq(uint32_t freq)#

Set FRG1 output frequency.

Parameters:

freq – Target output frequency, freq < input and (input / freq) < 2 should be satisfy.

Return values:

true – - successfully, false - input argument is invalid.

void CLOCK_InitExtClkin(uint32_t clkInFreq)#

Init external CLK IN, select the CLKIN as the external clock source.

Parameters:

clkInFreq – external clock in frequency.

void CLOCK_InitSysOsc(uint32_t oscFreq)#

Init SYS OSC.

Parameters:

oscFreq – oscillator frequency value.

void CLOCK_InitXtalin(uint32_t xtalInFreq)#

XTALIN init function system oscillator is bypassed, sys_osc_clk is fed driectly from the XTALIN.

Parameters:

xtalInFreq – XTALIN frequency value

Returns:

Frequency of PLL

static inline void CLOCK_DeinitSysOsc(void)#: Deinit SYS OSC.

static inline void CLOCK_SetFroOscFreq(clock_fro_osc_freq_t freq)#

Set FRO oscillator output frequency. Initialize the FRO clock to given frequency (36, 48 or 60 MHz).

Parameters:

freq – Please refer to clock_fro_osc_freq_t definition, frequency must be one of 36000, 48000 or 60000 KHz.

uint32_t targetFreq#: System pll fclk output frequency, the output frequency should be lower than 100MHZ

clock_sys_pll_src src#: System pll clock source

struct _clock_sys_pll#: #include <fsl_clock.h>

PLL configuration structure.

CRC: Cyclic Redundancy Check Driver#

FSL_CRC_DRIVER_VERSION#

CRC driver version. Version 2.1.1.

Current version: 2.1.1

Change log:

Version 2.0.0
- initial version
Version 2.0.1
- add explicit type cast when writing to WR_DATA
Version 2.0.2
- Fix MISRA issue
Version 2.1.0
- Add CRC_WriteSeed function
Version 2.1.1
- Fix MISRA issue

enum _crc_polynomial#

CRC polynomials to use.

Values:

enumerator kCRC_Polynomial_CRC_CCITT#: x^16+x^12+x^5+1

enumerator kCRC_Polynomial_CRC_16#: x^16+x^15+x^2+1

enumerator kCRC_Polynomial_CRC_32#: x^32+x^26+x^23+x^22+x^16+x^12+x^11+x^10+x^8+x^7+x^5+x^4+x^2+x+1

typedef enum _crc_polynomial crc_polynomial_t#: CRC polynomials to use.

typedef struct _crc_config crc_config_t#

CRC protocol configuration.

This structure holds the configuration for the CRC protocol.

void CRC_Init(CRC_Type *base, const crc_config_t *config)#

Enables and configures the CRC peripheral module.

This functions enables the CRC peripheral clock in the LPC SYSCON block. It also configures the CRC engine and starts checksum computation by writing the seed.

Parameters:

base – CRC peripheral address.
config – CRC module configuration structure.

static inline void CRC_Deinit(CRC_Type *base)#

Disables the CRC peripheral module.

This functions disables the CRC peripheral clock in the LPC SYSCON block.

Parameters:

base – CRC peripheral address.

void CRC_Reset(CRC_Type *base)#

resets CRC peripheral module.

Parameters:

base – CRC peripheral address.

void CRC_WriteSeed(CRC_Type *base, uint32_t seed)#

Write seed to CRC peripheral module.

Parameters:

base – CRC peripheral address.
seed – CRC Seed value.

void CRC_GetDefaultConfig(crc_config_t *config)#

Loads default values to CRC protocol configuration structure.

Loads default values to CRC protocol configuration structure. The default values are:

config->polynomial = kCRC_Polynomial_CRC_CCITT;
config->reverseIn = false;
config->complementIn = false;
config->reverseOut = false;
config->complementOut = false;
config->seed = 0xFFFFU;

Parameters:

config – CRC protocol configuration structure

void CRC_GetConfig(CRC_Type *base, crc_config_t *config)#

Loads actual values configured in CRC peripheral to CRC protocol configuration structure.

The values, including seed, can be used to resume CRC calculation later.

Parameters:

base – CRC peripheral address.
config – CRC protocol configuration structure

void CRC_WriteData(CRC_Type *base, const uint8_t *data, size_t dataSize)#

Writes data to the CRC module.

Writes input data buffer bytes to CRC data register.

Parameters:

base – CRC peripheral address.
data – Input data stream, MSByte in data[0].
dataSize – Size of the input data buffer in bytes.

static inline uint32_t CRC_Get32bitResult(CRC_Type *base)#

Reads 32-bit checksum from the CRC module.

Reads CRC data register.

Parameters:

base – CRC peripheral address.

Returns:

final 32-bit checksum, after configured bit reverse and complement operations.

static inline uint16_t CRC_Get16bitResult(CRC_Type *base)#

Reads 16-bit checksum from the CRC module.

Reads CRC data register.

Parameters:

base – CRC peripheral address.

Returns:

final 16-bit checksum, after configured bit reverse and complement operations.

CRC_DRIVER_USE_CRC16_CCITT_FALSE_AS_DEFAULT#: Default configuration structure filled by CRC_GetDefaultConfig(). Uses CRC-16/CCITT-FALSE as default.

struct _crc_config#

#include <fsl_crc.h>

CRC protocol configuration.

This structure holds the configuration for the CRC protocol.

Public Members

crc_polynomial_t polynomial#: CRC polynomial.

bool reverseIn#: Reverse bits on input.

bool complementIn#: Perform 1’s complement on input.

bool reverseOut#: Reverse bits on output.

bool complementOut#: Perform 1’s complement on output.

uint32_t seed#: Starting checksum value.

DMA: Direct Memory Access Controller Driver#

void DMA_Init(DMA_Type *base)#

Initializes DMA peripheral.

This function enable the DMA clock, set descriptor table and enable DMA peripheral.

Parameters:

base – DMA peripheral base address.

void DMA_Deinit(DMA_Type *base)#

Deinitializes DMA peripheral.

This function gates the DMA clock.

Parameters:

base – DMA peripheral base address.

void DMA_InstallDescriptorMemory(DMA_Type *base, void *addr)#

Install DMA descriptor memory.

This function used to register DMA descriptor memory for linked transfer, a typical case is ping pong transfer which will request more than one DMA descriptor memory space, althrough current DMA driver has a default DMA descriptor buffer, but it support one DMA descriptor for one channel only.

Parameters:

base – DMA base address.
addr – DMA descriptor address

static inline bool DMA_ChannelIsActive(DMA_Type *base, uint32_t channel)#

Return whether DMA channel is processing transfer.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

Returns:

True for active state, false otherwise.

static inline bool DMA_ChannelIsBusy(DMA_Type *base, uint32_t channel)#

Return whether DMA channel is busy.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

Returns:

True for busy state, false otherwise.

static inline void DMA_EnableChannelInterrupts(DMA_Type *base, uint32_t channel)#

Enables the interrupt source for the DMA transfer.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

static inline void DMA_DisableChannelInterrupts(DMA_Type *base, uint32_t channel)#

Disables the interrupt source for the DMA transfer.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

static inline void DMA_EnableChannel(DMA_Type *base, uint32_t channel)#

Enable DMA channel.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

static inline void DMA_DisableChannel(DMA_Type *base, uint32_t channel)#

Disable DMA channel.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

static inline void DMA_EnableChannelPeriphRq(DMA_Type *base, uint32_t channel)#

Set PERIPHREQEN of channel configuration register.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

static inline void DMA_DisableChannelPeriphRq(DMA_Type *base, uint32_t channel)#

Get PERIPHREQEN value of channel configuration register.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

Returns:

True for enabled PeriphRq, false for disabled.

void DMA_ConfigureChannelTrigger(DMA_Type *base, uint32_t channel, dma_channel_trigger_t *trigger)#

Set trigger settings of DMA channel.

Deprecated:: Do not use this function. It has been superceded by DMA_SetChannelConfig.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.
trigger – trigger configuration.

void DMA_SetChannelConfig(DMA_Type *base, uint32_t channel, dma_channel_trigger_t *trigger, bool isPeriph)#

set channel config.

This function provide a interface to configure channel configuration reisters.

Parameters:

base – DMA base address.
channel – DMA channel number.
trigger – channel configurations structure.
isPeriph – true is periph request, false is not.

static inline uint32_t DMA_SetChannelXferConfig(bool reload, bool clrTrig, bool intA, bool intB, uint8_t width, uint8_t srcInc, uint8_t dstInc, uint32_t bytes)#

DMA channel xfer transfer configurations.

Parameters:

reload – true is reload link descriptor after current exhaust, false is not
clrTrig – true is clear trigger status, wait software trigger, false is not
intA – enable interruptA
intB – enable interruptB
width – transfer width
srcInc – source address interleave size
dstInc – destination address interleave size
bytes – transfer bytes

Returns:

The vaule of xfer config

uint32_t DMA_GetRemainingBytes(DMA_Type *base, uint32_t channel)#

Gets the remaining bytes of the current DMA descriptor transfer.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

Returns:

The number of bytes which have not been transferred yet.

static inline void DMA_SetChannelPriority(DMA_Type *base, uint32_t channel, dma_priority_t priority)#

Set priority of channel configuration register.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.
priority – Channel priority value.

static inline dma_priority_t DMA_GetChannelPriority(DMA_Type *base, uint32_t channel)#

Get priority of channel configuration register.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

Returns:

Channel priority value.

static inline void DMA_SetChannelConfigValid(DMA_Type *base, uint32_t channel)#

Set channel configuration valid.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

static inline void DMA_DoChannelSoftwareTrigger(DMA_Type *base, uint32_t channel)#

Do software trigger for the channel.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

static inline void DMA_LoadChannelTransferConfig(DMA_Type *base, uint32_t channel, uint32_t xfer)#

Load channel transfer configurations.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.
xfer – transfer configurations.

void DMA_CreateDescriptor(dma_descriptor_t *desc, dma_xfercfg_t *xfercfg, void *srcAddr, void *dstAddr, void *nextDesc)#

Create application specific DMA descriptor to be used in a chain in transfer.

Deprecated:: Do not use this function. It has been superceded by DMA_SetupDescriptor.

Parameters:

desc – DMA descriptor address.
xfercfg – Transfer configuration for DMA descriptor.
srcAddr – Address of last item to transmit
dstAddr – Address of last item to receive.
nextDesc – Address of next descriptor in chain.

void DMA_SetupDescriptor(dma_descriptor_t *desc, uint32_t xfercfg, void *srcStartAddr, void *dstStartAddr, void *nextDesc)#

setup dma descriptor

Note: This function do not support configure wrap descriptor.

Parameters:

desc – DMA descriptor address.
xfercfg – Transfer configuration for DMA descriptor.
srcStartAddr – Start address of source address.
dstStartAddr – Start address of destination address.
nextDesc – Address of next descriptor in chain.

void DMA_SetupChannelDescriptor(dma_descriptor_t *desc, uint32_t xfercfg, void *srcStartAddr, void *dstStartAddr, void *nextDesc, dma_burst_wrap_t wrapType, uint32_t burstSize)#

setup dma channel descriptor

Note: This function support configure wrap descriptor.

Parameters:

desc – DMA descriptor address.
xfercfg – Transfer configuration for DMA descriptor.
srcStartAddr – Start address of source address.
dstStartAddr – Start address of destination address.
nextDesc – Address of next descriptor in chain.
wrapType – burst wrap type.
burstSize – burst size, reference _dma_burst_size.

void DMA_LoadChannelDescriptor(DMA_Type *base, uint32_t channel, dma_descriptor_t *descriptor)#

load channel transfer decriptor.

This function can be used to load desscriptor to driver internal channel descriptor that is used to start DMA transfer, the head descriptor table is defined in DMA driver, it is useful for the case:

for the polling transfer, application can allocate a local descriptor memory table to prepare a descriptor firstly and then call this api to load the configured descriptor to driver descriptor table.

DMA_Init(DMA0);
DMA_EnableChannel(DMA0, DEMO_DMA_CHANNEL);
DMA_SetupDescriptor(desc, xferCfg, s_srcBuffer, &s_destBuffer[0], NULL);
DMA_LoadChannelDescriptor(DMA0, DEMO_DMA_CHANNEL, (dma_descriptor_t *)desc);
DMA_DoChannelSoftwareTrigger(DMA0, DEMO_DMA_CHANNEL);
while(DMA_ChannelIsBusy(DMA0, DEMO_DMA_CHANNEL))
{}

Parameters:

base – DMA base address.
channel – DMA channel.
descriptor – configured DMA descriptor.

void DMA_AbortTransfer(dma_handle_t *handle)#

Abort running transfer by handle.

This function aborts DMA transfer specified by handle.

Parameters:

handle – DMA handle pointer.

void DMA_CreateHandle(dma_handle_t *handle, DMA_Type *base, uint32_t channel)#

Creates the DMA handle.

This function is called if using transaction API for DMA. This function initializes the internal state of DMA handle.

Parameters:

handle – DMA handle pointer. The DMA handle stores callback function and parameters.
base – DMA peripheral base address.
channel – DMA channel number.

void DMA_SetCallback(dma_handle_t *handle, dma_callback callback, void *userData)#

Installs a callback function for the DMA transfer.

This callback is called in DMA IRQ handler. Use the callback to do something after the current major loop transfer completes.

Parameters:

handle – DMA handle pointer.
callback – DMA callback function pointer.
userData – Parameter for callback function.

void DMA_PrepareTransfer(dma_transfer_config_t *config, void *srcAddr, void *dstAddr, uint32_t byteWidth, uint32_t transferBytes, dma_transfer_type_t type, void *nextDesc)#

Prepares the DMA transfer structure.

Deprecated:: Do not use this function. It has been superceded by DMA_PrepareChannelTransfer. This function prepares the transfer configuration structure according to the user input.

Note

The data address and the data width must be consistent. For example, if the SRC is 4 bytes, so the source address must be 4 bytes aligned, or it shall result in source address error(SAE).

Parameters:

config – The user configuration structure of type dma_transfer_t.
srcAddr – DMA transfer source address.
dstAddr – DMA transfer destination address.
byteWidth – DMA transfer destination address width(bytes).
transferBytes – DMA transfer bytes to be transferred.
type – DMA transfer type.
nextDesc – Chain custom descriptor to transfer.

void DMA_PrepareChannelTransfer(dma_channel_config_t *config, void *srcStartAddr, void *dstStartAddr, uint32_t xferCfg, dma_transfer_type_t type, dma_channel_trigger_t *trigger, void *nextDesc)#

Prepare channel transfer configurations.

This function used to prepare channel transfer configurations.

Parameters:

config – Pointer to DMA channel transfer configuration structure.
srcStartAddr – source start address.
dstStartAddr – destination start address.
xferCfg – xfer configuration, user can reference DMA_CHANNEL_XFER about to how to get xferCfg value.
type – transfer type.
trigger – DMA channel trigger configurations.
nextDesc – address of next descriptor.

status_t DMA_SubmitTransfer(dma_handle_t *handle, dma_transfer_config_t *config)#

Submits the DMA transfer request.

Deprecated:: Do not use this function. It has been superceded by DMA_SubmitChannelTransfer.

This function submits the DMA transfer request according to the transfer configuration structure. If the user submits the transfer request repeatedly, this function packs an unprocessed request as a TCD and enables scatter/gather feature to process it in the next time.

Parameters:

handle – DMA handle pointer.
config – Pointer to DMA transfer configuration structure.

Return values:

kStatus_DMA_Success – It means submit transfer request succeed.
kStatus_DMA_QueueFull – It means TCD queue is full. Submit transfer request is not allowed.
kStatus_DMA_Busy – It means the given channel is busy, need to submit request later.

void DMA_SubmitChannelTransferParameter(dma_handle_t *handle, uint32_t xferCfg, void *srcStartAddr, void *dstStartAddr, void *nextDesc)#

Submit channel transfer paramter directly.

This function used to configue channel head descriptor that is used to start DMA transfer, the head descriptor table is defined in DMA driver, it is useful for the case:

for the single transfer, application doesn’t need to allocate descriptor table, the head descriptor can be used for it.

   DMA_SetChannelConfig(base, channel, trigger, isPeriph);
   DMA_CreateHandle(handle, base, channel)
   DMA_SubmitChannelTransferParameter(handle, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc,
bytes), srcStartAddr, dstStartAddr, NULL);
   DMA_StartTransfer(handle)

for the linked transfer, application should responsible for link descriptor, for example, if 4 transfer is required, then application should prepare three descriptor table with macro , the head descriptor in driver can be used for the first transfer descriptor.

   define link descriptor table in application with macro
   DMA_ALLOCATE_LINK_DESCRIPTOR(nextDesc[3]);

   DMA_SetupDescriptor(nextDesc0,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, nextDesc1);
   DMA_SetupDescriptor(nextDesc1,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, nextDesc2);
   DMA_SetupDescriptor(nextDesc2,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, NULL);
   DMA_SetChannelConfig(base, channel, trigger, isPeriph);
   DMA_CreateHandle(handle, base, channel)
   DMA_SubmitChannelTransferParameter(handle, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc,
bytes), srcStartAddr, dstStartAddr, nextDesc0);
   DMA_StartTransfer(handle);

Parameters:

handle – Pointer to DMA handle.
xferCfg – xfer configuration, user can reference DMA_CHANNEL_XFER about to how to get xferCfg value.
srcStartAddr – source start address.
dstStartAddr – destination start address.
nextDesc – address of next descriptor.

void DMA_SubmitChannelDescriptor(dma_handle_t *handle, dma_descriptor_t *descriptor)#

Submit channel descriptor.

This function used to configue channel head descriptor that is used to start DMA transfer, the head descriptor table is defined in DMA driver, this functiono is typical for the ping pong case:

for the ping pong case, application should responsible for the descriptor, for example, application should prepare two descriptor table with macro.

   define link descriptor table in application with macro
   DMA_ALLOCATE_LINK_DESCRIPTOR(nextDesc[2]);

   DMA_SetupDescriptor(nextDesc0,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, nextDesc1);
   DMA_SetupDescriptor(nextDesc1,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, nextDesc0);
   DMA_SetChannelConfig(base, channel, trigger, isPeriph);
   DMA_CreateHandle(handle, base, channel)
   DMA_SubmitChannelDescriptor(handle,  nextDesc0);
   DMA_StartTransfer(handle);

Parameters:

handle – Pointer to DMA handle.
descriptor – descriptor to submit.

status_t DMA_SubmitChannelTransfer(dma_handle_t *handle, dma_channel_config_t *config)#

Submits the DMA channel transfer request.

for the single transfer, application doesn’t need to allocate descriptor table, the head descriptor can be used for it.

DMA_CreateHandle(handle, base, channel)
DMA_PrepareChannelTransfer(config,srcStartAddr,dstStartAddr,xferCfg,type,trigger,NULL);
DMA_SubmitChannelTransfer(handle, config)
DMA_StartTransfer(handle)

   define link descriptor table in application with macro
   DMA_ALLOCATE_LINK_DESCRIPTOR(nextDesc);
   DMA_SetupDescriptor(nextDesc0,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, nextDesc1);
   DMA_SetupDescriptor(nextDesc1,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, nextDesc2);
   DMA_SetupDescriptor(nextDesc2,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, NULL);
   DMA_CreateHandle(handle, base, channel)
   DMA_PrepareChannelTransfer(config,srcStartAddr,dstStartAddr,xferCfg,type,trigger,nextDesc0);
   DMA_SubmitChannelTransfer(handle, config)
   DMA_StartTransfer(handle)

for the ping pong case, application should responsible for link descriptor, for example, application should prepare two descriptor table with macro , the head descriptor in driver can be used for the first transfer descriptor.

   define link descriptor table in application with macro
   DMA_ALLOCATE_LINK_DESCRIPTOR(nextDesc);

   DMA_SetupDescriptor(nextDesc0,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, nextDesc1);
   DMA_SetupDescriptor(nextDesc1,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, nextDesc0);
   DMA_CreateHandle(handle, base, channel)
   DMA_PrepareChannelTransfer(config,srcStartAddr,dstStartAddr,xferCfg,type,trigger,nextDesc0);
   DMA_SubmitChannelTransfer(handle, config)
   DMA_StartTransfer(handle)

Parameters:

handle – DMA handle pointer.
config – Pointer to DMA transfer configuration structure.

Return values:

kStatus_DMA_Success – It means submit transfer request succeed.
kStatus_DMA_QueueFull – It means TCD queue is full. Submit transfer request is not allowed.
kStatus_DMA_Busy – It means the given channel is busy, need to submit request later.

void DMA_StartTransfer(dma_handle_t *handle)#

DMA start transfer.

This function enables the channel request. User can call this function after submitting the transfer request It will trigger transfer start with software trigger only when hardware trigger is not used.

Parameters:

handle – DMA handle pointer.

void DMA_IRQHandle(DMA_Type *base)#

DMA IRQ handler for descriptor transfer complete.

This function clears the channel major interrupt flag and call the callback function if it is not NULL.

Parameters:

base – DMA base address.

void DMA_DriverIRQHandler(uint32_t instance)#

DMA common IRQ handler entry for parameterized dispatch.

Parameters:

instance – DMA peripheral instance number.

FSL_DMA_DRIVER_VERSION#

DMA driver version.

Version 2.5.5.

_dma_transfer_status DMA transfer status

Values:

enumerator kStatus_DMA_Busy#: Channel is busy and can’t handle the transfer request.

_dma_addr_interleave_size dma address interleave size

Values:

enumerator kDMA_AddressInterleave0xWidth#: dma source/destination address no interleave

enumerator kDMA_AddressInterleave1xWidth#: dma source/destination address interleave 1xwidth

enumerator kDMA_AddressInterleave2xWidth#: dma source/destination address interleave 2xwidth

enumerator kDMA_AddressInterleave4xWidth#: dma source/destination address interleave 3xwidth

_dma_transfer_width dma transfer width

Values:

enumerator kDMA_Transfer8BitWidth#: dma channel transfer bit width is 8 bit

enumerator kDMA_Transfer16BitWidth#: dma channel transfer bit width is 16 bit

enumerator kDMA_Transfer32BitWidth#: dma channel transfer bit width is 32 bit

enum _dma_priority#

DMA channel priority.

Values:

enumerator kDMA_ChannelPriority0#: Highest channel priority - priority 0

enumerator kDMA_ChannelPriority1#: Channel priority 1

enumerator kDMA_ChannelPriority2#: Channel priority 2

enumerator kDMA_ChannelPriority3#: Channel priority 3

enumerator kDMA_ChannelPriority4#: Channel priority 4

enumerator kDMA_ChannelPriority5#: Channel priority 5

enumerator kDMA_ChannelPriority6#: Channel priority 6

enumerator kDMA_ChannelPriority7#: Lowest channel priority - priority 7

enum _dma_int#

DMA interrupt flags.

Values:

enumerator kDMA_IntA#: DMA interrupt flag A

enumerator kDMA_IntB#: DMA interrupt flag B

enumerator kDMA_IntError#: DMA interrupt flag error

enum _dma_trigger_type#

DMA trigger type.

Values:

enumerator kDMA_NoTrigger#: Trigger is disabled

enumerator kDMA_LowLevelTrigger#: Low level active trigger

enumerator kDMA_HighLevelTrigger#: High level active trigger

enumerator kDMA_FallingEdgeTrigger#: Falling edge active trigger

enumerator kDMA_RisingEdgeTrigger#: Rising edge active trigger

_dma_burst_size DMA burst size

Values:

enumerator kDMA_BurstSize1#: burst size 1 transfer

enumerator kDMA_BurstSize2#: burst size 2 transfer

enumerator kDMA_BurstSize4#: burst size 4 transfer

enumerator kDMA_BurstSize8#: burst size 8 transfer

enumerator kDMA_BurstSize16#: burst size 16 transfer

enumerator kDMA_BurstSize32#: burst size 32 transfer

enumerator kDMA_BurstSize64#: burst size 64 transfer

enumerator kDMA_BurstSize128#: burst size 128 transfer

enumerator kDMA_BurstSize256#: burst size 256 transfer

enumerator kDMA_BurstSize512#: burst size 512 transfer

enumerator kDMA_BurstSize1024#: burst size 1024 transfer

enum _dma_trigger_burst#

DMA trigger burst.

Values:

enumerator kDMA_SingleTransfer#: Single transfer

enumerator kDMA_LevelBurstTransfer#: Burst transfer driven by level trigger

enumerator kDMA_EdgeBurstTransfer1#: Perform 1 transfer by edge trigger

enumerator kDMA_EdgeBurstTransfer2#: Perform 2 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer4#: Perform 4 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer8#: Perform 8 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer16#: Perform 16 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer32#: Perform 32 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer64#: Perform 64 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer128#: Perform 128 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer256#: Perform 256 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer512#: Perform 512 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer1024#: Perform 1024 transfers by edge trigger

enum _dma_burst_wrap#

DMA burst wrapping.

Values:

enumerator kDMA_NoWrap#: Wrapping is disabled

enumerator kDMA_SrcWrap#: Wrapping is enabled for source

enumerator kDMA_DstWrap#: Wrapping is enabled for destination

enumerator kDMA_SrcAndDstWrap#: Wrapping is enabled for source and destination

enum _dma_transfer_type#

DMA transfer type.

Values:

enumerator kDMA_MemoryToMemory#: Transfer from memory to memory (increment source and destination)

enumerator kDMA_PeripheralToMemory#: Transfer from peripheral to memory (increment only destination)

enumerator kDMA_MemoryToPeripheral#: Transfer from memory to peripheral (increment only source)

enumerator kDMA_StaticToStatic#: Peripheral to static memory (do not increment source or destination)

typedef struct _dma_descriptor dma_descriptor_t#: DMA descriptor structure.

typedef struct _dma_xfercfg dma_xfercfg_t#: DMA transfer configuration.

typedef enum _dma_priority dma_priority_t#: DMA channel priority.

typedef enum _dma_int dma_irq_t#: DMA interrupt flags.

typedef enum _dma_trigger_type dma_trigger_type_t#: DMA trigger type.

typedef enum _dma_trigger_burst dma_trigger_burst_t#: DMA trigger burst.

typedef enum _dma_burst_wrap dma_burst_wrap_t#: DMA burst wrapping.

typedef enum _dma_transfer_type dma_transfer_type_t#: DMA transfer type.

typedef struct _dma_channel_trigger dma_channel_trigger_t#: DMA channel trigger.

typedef struct _dma_channel_config dma_channel_config_t#: DMA channel trigger.

typedef struct _dma_transfer_config dma_transfer_config_t#: DMA transfer configuration.

typedef void (*dma_callback)(struct _dma_handle *handle, void *userData, bool transferDone, uint32_t intmode)#: Define Callback function for DMA.

typedef struct _dma_handle dma_handle_t#: DMA transfer handle structure.

DMA_MAX_TRANSFER_COUNT#: DMA max transfer size.

FSL_FEATURE_DMA_NUMBER_OF_CHANNELSn(x)#: DMA channel numbers.

FSL_FEATURE_DMA_MAX_CHANNELS#

FSL_FEATURE_DMA_ALL_CHANNELS#

FSL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE#: DMA head link descriptor table align size.

DMA_ALLOCATE_HEAD_DESCRIPTORS(name, number)#

DMA head descriptor table allocate macro To simplify user interface, this macro will help allocate descriptor memory, user just need to provide the name and the number for the allocate descriptor.

Parameters:

name – Allocate decriptor name.
number – Number of descriptor to be allocated.

DMA_ALLOCATE_HEAD_DESCRIPTORS_AT_NONCACHEABLE(name, number)#

DMA head descriptor table allocate macro at noncacheable section To simplify user interface, this macro will help allocate descriptor memory at noncacheable section, user just need to provide the name and the number for the allocate descriptor.

Parameters:

name – Allocate decriptor name.
number – Number of descriptor to be allocated.

DMA_ALLOCATE_LINK_DESCRIPTORS(name, number)#

DMA link descriptor table allocate macro To simplify user interface, this macro will help allocate descriptor memory, user just need to provide the name and the number for the allocate descriptor.

Parameters:

name – Allocate decriptor name.
number – Number of descriptor to be allocated.

DMA_ALLOCATE_LINK_DESCRIPTORS_AT_NONCACHEABLE(name, number)#

DMA link descriptor table allocate macro at noncacheable section To simplify user interface, this macro will help allocate descriptor memory at noncacheable section, user just need to provide the name and the number for the allocate descriptor.

Parameters:

name – Allocate decriptor name.
number – Number of descriptor to be allocated.

DMA_ALLOCATE_DATA_TRANSFER_BUFFER(name, width)#: DMA transfer buffer address need to align with the transfer width.

DMA_CHANNEL_GROUP(channel)#

DMA_CHANNEL_INDEX(base, channel)#

DMA_COMMON_REG_GET(base, channel, reg)#: DMA linked descriptor address algin size.

DMA_COMMON_CONST_REG_GET(base, channel, reg)#

DMA_COMMON_REG_SET(base, channel, reg, value)#

DMA_DESCRIPTOR_END_ADDRESS(start, inc, bytes, width)#

DMA descriptor end address calculate.

Parameters:

start – start address
inc – address interleave size
bytes – transfer bytes
width – transfer width

DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes)#

struct _dma_descriptor#

#include <fsl_dma.h>

DMA descriptor structure.

Public Members

volatile uint32_t xfercfg#: Transfer configuration

void *srcEndAddr#: Last source address of DMA transfer

void *dstEndAddr#: Last destination address of DMA transfer

void *linkToNextDesc#: Address of next DMA descriptor in chain

struct _dma_xfercfg#

#include <fsl_dma.h>

DMA transfer configuration.

Public Members

bool valid#: Descriptor is ready to transfer

bool reload#: Reload channel configuration register after current descriptor is exhausted

bool swtrig#: Perform software trigger. Transfer if fired when ‘valid’ is set

bool clrtrig#: Clear trigger

bool intA#: Raises IRQ when transfer is done and set IRQA status register flag

bool intB#: Raises IRQ when transfer is done and set IRQB status register flag

uint8_t byteWidth#: Byte width of data to transfer

uint8_t srcInc#: Increment source address by ‘srcInc’ x ‘byteWidth’

uint8_t dstInc#: Increment destination address by ‘dstInc’ x ‘byteWidth’

uint16_t transferCount#: Number of transfers

struct _dma_channel_trigger#

#include <fsl_dma.h>

DMA channel trigger.

Public Members

dma_trigger_type_t type#: Select hardware trigger as edge triggered or level triggered.

dma_trigger_burst_t burst#: Select whether hardware triggers cause a single or burst transfer.

dma_burst_wrap_t wrap#: Select wrap type, source wrap or dest wrap, or both.

struct _dma_channel_config#

#include <fsl_dma.h>

DMA channel trigger.

Public Members

void *srcStartAddr#: Source data address

void *dstStartAddr#: Destination data address

void *nextDesc#: Chain custom descriptor

uint32_t xferCfg#: channel transfer configurations

dma_channel_trigger_t *trigger#: DMA trigger type

bool isPeriph#: select the request type

struct _dma_transfer_config#

#include <fsl_dma.h>

DMA transfer configuration.

Public Members

uint8_t *srcAddr#: Source data address

uint8_t *dstAddr#: Destination data address

uint8_t *nextDesc#: Chain custom descriptor

dma_xfercfg_t xfercfg#: Transfer options

bool isPeriph#: DMA transfer is driven by peripheral

struct _dma_handle#

#include <fsl_dma.h>

DMA transfer handle structure.

Public Members

dma_callback callback#: Callback function. Invoked when transfer of descriptor with interrupt flag finishes

void *userData#: Callback function parameter

DMA_Type *base#: DMA peripheral base address

uint8_t channel#: DMA channel number

FTM: FlexTimer Driver#

status_t FTM_Init(FTM_Type *base, const ftm_config_t *config)#

Ungates the FTM clock and configures the peripheral for basic operation.

Note

This API should be called at the beginning of the application which is using the FTM driver. If the FTM instance has only TPM features, please use the TPM driver.

Parameters:

base – FTM peripheral base address
config – Pointer to the user configuration structure.

Returns:

kStatus_Success indicates success; Else indicates failure.

void FTM_Deinit(FTM_Type *base)#

Gates the FTM clock.

Parameters:

base – FTM peripheral base address

void FTM_GetDefaultConfig(ftm_config_t *config)#

Fills in the FTM configuration structure with the default settings.

The default values are:

config->prescale = kFTM_Prescale_Divide_1;
config->bdmMode = kFTM_BdmMode_0;
config->pwmSyncMode = kFTM_SoftwareTrigger;
config->reloadPoints = 0;
config->faultMode = kFTM_Fault_Disable;
config->faultFilterValue = 0;
config->deadTimePrescale = kFTM_Deadtime_Prescale_1;
config->deadTimeValue =  0;
config->extTriggers = 0;
config->chnlInitState = 0;
config->chnlPolarity = 0;
config->useGlobalTimeBase = false;
config->hwTriggerResetCount = false;
config->swTriggerResetCount = true;

Parameters:

config – Pointer to the user configuration structure.

static inline ftm_clock_prescale_t FTM_CalculateCounterClkDiv(FTM_Type *base, uint32_t counterPeriod_Hz, uint32_t srcClock_Hz)#

brief Calculates the counter clock prescaler.

This function calculates the values for SC[PS] bit.

param base FTM peripheral base address param counterPeriod_Hz The desired frequency in Hz which corresponding to the time when the counter reaches the mod value param srcClock_Hz FTM counter clock in Hz

return Calculated clock prescaler value, see ftm_clock_prescale_t.

status_t FTM_SetupPwm(FTM_Type *base, const ftm_chnl_pwm_signal_param_t *chnlParams, uint8_t numOfChnls, ftm_pwm_mode_t mode, uint32_t pwmFreq_Hz, uint32_t srcClock_Hz)#

Configures the PWM signal parameters.

Call this function to configure the PWM signal period, mode, duty cycle, and edge. Use this function to configure all FTM channels that are used to output a PWM signal.

Parameters:

base – FTM peripheral base address
chnlParams – Array of PWM channel parameters to configure the channel(s)
numOfChnls – Number of channels to configure; This should be the size of the array passed in
mode – PWM operation mode, options available in enumeration ftm_pwm_mode_t
pwmFreq_Hz – PWM signal frequency in Hz
srcClock_Hz – FTM counter clock in Hz

Returns:

kStatus_Success if the PWM setup was successful kStatus_Error on failure

status_t FTM_UpdatePwmDutycycle(FTM_Type *base, ftm_chnl_t chnlNumber, ftm_pwm_mode_t currentPwmMode, uint8_t dutyCyclePercent)#

Updates the duty cycle of an active PWM signal.

Note

This function only writes the new duty cycle value to the CnV buffer register. FTM_Init() unconditionally enables enhanced PWM synchronization mode by setting SYNCONF.SYNCMODE = 1 and COMBINE.SYNCENn = 1 in FTM_SetPwmSync(), regardless of the configuration passed by the user. Therefore, the buffered CnV value does NOT take effect immediately. The caller must trigger a register reload after this function returns, using one of the following methods:

Software trigger: call FTM_SetSoftwareTrigger(base, true) (if pwmSyncMode includes kFTM_SoftwareTrigger). Note that if swTriggerResetCount was set to true during initialization, this trigger will also force the FTM counter to the CNTIN value (SYNCONF.SWRSTCNT = 1).
Hardware trigger: no software call is needed. If pwmSyncMode includes kFTM_HardwareTrigger_0/1/2, the reload happens automatically when the corresponding hardware trigger fires (SYNCONF.HWWRBUF is set by FTM_Init()).
LDOK: call FTM_SetLdok(base, true). The new value becomes active at the next reload point: by default at counter overflow (MOD to CNTIN), or at earlier events if additional reload points are configured via FTM_SetReloadPoints().

Parameters:

base – FTM peripheral base address
chnlNumber – The channel/channel pair number. In combined mode, this represents the channel pair number
currentPwmMode – The current PWM mode set during PWM setup
dutyCyclePercent – New PWM pulse width; The value should be between 0 to 100 0=inactive signal(0% duty cycle)… 100=active signal (100% duty cycle)

Returns:

kStatus_Success if the PWM update was successful kStatus_Error on failure

void FTM_UpdateChnlEdgeLevelSelect(FTM_Type *base, ftm_chnl_t chnlNumber, uint8_t level)#

Updates the edge level selection for a channel.

Parameters:

base – FTM peripheral base address
chnlNumber – The channel number
level – The level to be set to the ELSnB:ELSnA field; Valid values are 00, 01, 10, 11. See the Kinetis SoC reference manual for details about this field.

status_t FTM_SetupPwmMode(FTM_Type *base, const ftm_chnl_pwm_config_param_t *chnlParams, uint8_t numOfChnls, ftm_pwm_mode_t mode)#

Configures the PWM mode parameters.

Call this function to configure the PWM signal mode, duty cycle in ticks, and edge. Use this function to configure all FTM channels that are used to output a PWM signal. Please note that: This API is similar with FTM_SetupPwm() API, but will not set the timer period, and this API will set channel match value in timer ticks, not period percent.

Parameters:

base – FTM peripheral base address
chnlParams – Array of PWM channel parameters to configure the channel(s)
numOfChnls – Number of channels to configure; This should be the size of the array passed in
mode – PWM operation mode, options available in enumeration ftm_pwm_mode_t

Returns:

kStatus_Success if the PWM setup was successful kStatus_Error on failure

void FTM_ConfigSinglePWM(FTM_Type *base, const ftm_chnl_param_t *chnlParams, ftm_chnl_t chnlNumber)#

Configure FTM edge aligned PWM or center aligned PWM by each channel.

This function configure PWM signal by setting channel n value register. Need to invoke FTM_SetInitialModuloValue to configure FTM period.

Parameters:

base – FTM peripheral base address
chnlParams – PWM configuration structure pointer.
chnlPairNumber – Channel number.

void FTM_ConfigCombinePWM(FTM_Type *base, const ftm_chnl_param_t *chnlParams, ftm_chnl_t chnlPairNumber)#

Configure FTM Combine PWM, Modified Combine PWM or Asymmetrical PWM by each channel pair.

This function configure PWM signal by setting channel n value register. Need to invoke FTM_SetInitialModuloValue to configure FTM period.

Parameters:

base – FTM peripheral base address
chnlParams – PWM configuration structure pointer.
chnlPairNumber – Channel pair number, options are 0, 1, 2, 3.

void FTM_SetupInputCapture(FTM_Type *base, ftm_chnl_t chnlNumber, ftm_input_capture_edge_t captureMode, uint32_t filterValue)#

Enables capturing an input signal on the channel using the function parameters.

When the edge specified in the captureMode argument occurs on the channel, the FTM counter is captured into the CnV register. The user has to read the CnV register separately to get this value. The filter function is disabled if the filterVal argument passed in is 0. The filter function is available only for channels 0, 1, 2, 3.

Parameters:

base – FTM peripheral base address
chnlNumber – The channel number
captureMode – Specifies which edge to capture
filterValue – Filter value, specify 0 to disable filter. Available only for channels 0-3.

void FTM_SetupOutputCompare(FTM_Type *base, ftm_chnl_t chnlNumber, ftm_output_compare_mode_t compareMode, uint32_t compareValue)#

Configures the FTM to generate timed pulses.

When the FTM counter matches the value of compareVal argument (this is written into CnV reg), the channel output is changed based on what is specified in the compareMode argument.

Parameters:

base – FTM peripheral base address
chnlNumber – The channel number
compareMode – Action to take on the channel output when the compare condition is met
compareValue – Value to be programmed in the CnV register.

void FTM_SetupDualEdgeCapture(FTM_Type *base, ftm_chnl_t chnlPairNumber, const ftm_dual_edge_capture_param_t *edgeParam, uint32_t filterValue)#

Configures the dual edge capture mode of the FTM.

This function sets up the dual edge capture mode on a channel pair. The capture edge for the channel pair and the capture mode (one-shot or continuous) is specified in the parameter argument. The filter function is disabled if the filterVal argument passed is zero. The filter function is available only on channels 0 and 2. The user has to read the channel CnV registers separately to get the capture values.

Parameters:

base – FTM peripheral base address
chnlPairNumber – The FTM channel pair number; options are 0, 1, 2, 3
edgeParam – Sets up the dual edge capture function
filterValue – Filter value, specify 0 to disable filter. Available only for channel pair 0 and 1.

void FTM_EnableInterrupts(FTM_Type *base, uint32_t mask)#

Enables the selected FTM interrupts.

Parameters:

base – FTM peripheral base address
mask – The interrupts to enable. This is a logical OR of members of the enumeration ftm_interrupt_enable_t

void FTM_DisableInterrupts(FTM_Type *base, uint32_t mask)#

Disables the selected FTM interrupts.

Parameters:

base – FTM peripheral base address
mask – The interrupts to enable. This is a logical OR of members of the enumeration ftm_interrupt_enable_t

uint32_t FTM_GetEnabledInterrupts(FTM_Type *base)#

Gets the enabled FTM interrupts.

Parameters:

base – FTM peripheral base address

Returns:

The enabled interrupts. This is the logical OR of members of the enumeration ftm_interrupt_enable_t

uint32_t FTM_GetInstance(FTM_Type *base)#

Gets the instance from the base address.

Parameters:

base – FTM peripheral base address

Returns:

The FTM instance

uint32_t FTM_GetStatusFlags(FTM_Type *base)#

Gets the FTM status flags.

Parameters:

base – FTM peripheral base address

Returns:

The status flags. This is the logical OR of members of the enumeration ftm_status_flags_t

void FTM_ClearStatusFlags(FTM_Type *base, uint32_t mask)#

Clears the FTM status flags.

Parameters:

base – FTM peripheral base address
mask – The status flags to clear. This is a logical OR of members of the enumeration ftm_status_flags_t

static inline void FTM_SetTimerPeriod(FTM_Type *base, uint32_t ticks)#

Sets the timer period in units of ticks.

Timers counts from 0 until it equals the count value set here. The count value is written to the MOD register.

Note

This API allows the user to use the FTM module as a timer. Do not mix usage of this API with FTM’s PWM setup API’s.
Call the utility macros provided in the fsl_common.h to convert usec or msec to ticks.

Parameters:

base – FTM peripheral base address
ticks – A timer period in units of ticks, which should be equal or greater than 1.

static inline void FTM_SetInitialModuloValue(FTM_Type *base, uint16_t initialValue, uint16_t moduloValue)#

Set initial value and modulo value for FTM.

Parameters:

base – FTM peripheral base address
initialValue – FTM counter initial value.
moduloValue – FTM counter modulo value.

static inline uint32_t FTM_GetCurrentTimerCount(FTM_Type *base)#

Reads the current timer counting value.

This function returns the real-time timer counting value in a range from 0 to a timer period.

Note

Call the utility macros provided in the fsl_common.h to convert ticks to usec or msec.

Parameters:

base – FTM peripheral base address

Returns:

The current counter value in ticks

static inline void FTM_SetChannelMatchValue(FTM_Type *base, ftm_chnl_t chnlNumber, uint16_t value)#

Set channel match value for output.

Parameters:

base – FTM peripheral base address
chnlNumber – Channel to set.
value – Channel match value for output.

static inline uint32_t FTM_GetInputCaptureValue(FTM_Type *base, ftm_chnl_t chnlNumber)#

Reads the captured value.

This function returns the captured value of a FTM channel configured in input capture or dual edge capture mode.

Note

Call the utility macros provided in the fsl_common.h to convert ticks to usec or msec.

Parameters:

base – FTM peripheral base address
chnlNumber – Channel to be read

Returns:

The captured FTM counter value of the input modes.

static inline void FTM_StartTimer(FTM_Type *base, ftm_clock_source_t clockSource)#

Starts the FTM counter.

Parameters:

base – FTM peripheral base address
clockSource – FTM clock source; After the clock source is set, the counter starts running.

static inline void FTM_StopTimer(FTM_Type *base)#

Stops the FTM counter.

Parameters:

base – FTM peripheral base address

static inline uint32_t FTM_GetSoftwareOutputValue(FTM_Type *base)#

Get channel software output status.

Parameters:

base – FTM peripheral base address

Returns:

Status of channel software output, logical OR value of ftm_channel_index_t.

static inline uint32_t FTM_GetSoftwareOutputEnable(FTM_Type *base)#

Get channel software enable status.

Parameters:

base – FTM peripheral base address

Returns:

Status of channel software enable, logical OR value of ftm_channel_index_t.

static inline void FTM_SetSoftwareOutputCtrl(FTM_Type *base, uint32_t chnlEnable, uint32_t chnlValue)#

Enables or disables the channel software output control and set channel software output value.

Parameters:

base – FTM peripheral base address
chnlEnable – Channels to enable or disable software output control, logical OR of enumeration ftm_channel_index_t members.
chnlValue – Channels output value, logical OR of enumeration ftm_channel_index_t members

static inline void FTM_SetSoftwareCtrlEnable(FTM_Type *base, ftm_chnl_t chnlNumber, bool value)#

Enables or disables the channel software output control.

Parameters:

base – FTM peripheral base address
chnlNumber – Channel to be enabled or disabled
value – true: channel output is affected by software output control false: channel output is unaffected by software output control

static inline void FTM_SetSoftwareCtrlVal(FTM_Type *base, ftm_chnl_t chnlNumber, bool value)#

Sets the channel software output control value.

Parameters:

base – FTM peripheral base address.
chnlNumber – Channel to be configured
value – true to set 1, false to set 0

static inline void FTM_SetFaultControlEnable(FTM_Type *base, ftm_chnl_t chnlPairNumber, bool value)#

This function enables/disables the fault control in a channel pair.

Parameters:

base – FTM peripheral base address
chnlPairNumber – The FTM channel pair number; options are 0, 1, 2, 3
value – true: Enable fault control for this channel pair; false: No fault control

static inline void FTM_SetDeadTimeEnable(FTM_Type *base, ftm_chnl_t chnlPairNumber, bool value)#

This function enables/disables the dead time insertion in a channel pair.

Parameters:

base – FTM peripheral base address
chnlPairNumber – The FTM channel pair number; options are 0, 1, 2, 3
value – true: Insert dead time in this channel pair; false: No dead time inserted

static inline void FTM_SetComplementaryEnable(FTM_Type *base, ftm_chnl_t chnlPairNumber, bool value)#

This function enables/disables complementary mode in a channel pair.

Parameters:

base – FTM peripheral base address
chnlPairNumber – The FTM channel pair number; options are 0, 1, 2, 3
value – true: enable complementary mode; false: disable complementary mode

static inline void FTM_SetInvertEnable(FTM_Type *base, ftm_chnl_t chnlPairNumber, bool value)#

This function enables/disables inverting control in a channel pair.

Parameters:

base – FTM peripheral base address
chnlPairNumber – The FTM channel pair number; options are 0, 1, 2, 3
value – true: enable inverting; false: disable inverting

void FTM_SetupQuadDecode(FTM_Type *base, const ftm_phase_params_t *phaseAParams, const ftm_phase_params_t *phaseBParams, ftm_quad_decode_mode_t quadMode)#

Configures the parameters and activates the quadrature decoder mode.

Parameters:

base – FTM peripheral base address
phaseAParams – Phase A configuration parameters
phaseBParams – Phase B configuration parameters
quadMode – Selects encoding mode used in quadrature decoder mode

static inline void FTM_SetQuadDecoderModuloValue(FTM_Type *base, uint32_t startValue, uint32_t overValue)#

Sets the modulo values for Quad Decoder.

The modulo values configure the minimum and maximum values that the Quad decoder counter can reach. After the counter goes over, the counter value goes to the other side and decrease/increase again.

Parameters:

base – FTM peripheral base address.
startValue – The low limit value for Quad Decoder counter.
overValue – The high limit value for Quad Decoder counter.

static inline uint32_t FTM_GetQuadDecoderCounterValue(FTM_Type *base)#

Gets the current Quad Decoder counter value.

Parameters:

base – FTM peripheral base address.

Returns:

Current quad Decoder counter value.

static inline void FTM_ClearQuadDecoderCounterValue(FTM_Type *base)#

Clears the current Quad Decoder counter value.

The counter is set as the initial value.

Parameters:

base – FTM peripheral base address.

FSL_FTM_DRIVER_VERSION#: FTM driver version 2.7.6.

enum _ftm_chnl#

List of FTM channels.

Note

Actual number of available channels is SoC dependent

Values:

enumerator kFTM_Chnl_0#: FTM channel number 0

enumerator kFTM_Chnl_1#: FTM channel number 1

enumerator kFTM_Chnl_2#: FTM channel number 2

enumerator kFTM_Chnl_3#: FTM channel number 3

enumerator kFTM_Chnl_4#: FTM channel number 4

enumerator kFTM_Chnl_5#: FTM channel number 5

enumerator kFTM_Chnl_6#: FTM channel number 6

enumerator kFTM_Chnl_7#: FTM channel number 7

enum _ftm_fault_input#

List of FTM faults.

Values:

enumerator kFTM_Fault_0#: FTM fault 0 input pin

enumerator kFTM_Fault_1#: FTM fault 1 input pin

enumerator kFTM_Fault_2#: FTM fault 2 input pin

enumerator kFTM_Fault_3#: FTM fault 3 input pin

enum _ftm_pwm_mode#

FTM PWM operation modes.

Values:

enumerator kFTM_EdgeAlignedPwm#: Edge-aligned PWM

enumerator kFTM_CenterAlignedPwm#: Center-aligned PWM

enumerator kFTM_EdgeAlignedCombinedPwm#: Edge-aligned combined PWM

enumerator kFTM_CenterAlignedCombinedPwm#: Center-aligned combined PWM

enumerator kFTM_ModifiedCombinedPwm#: Modified combined PWM

enumerator kFTM_AsymmetricalCombinedPwm#: Asymmetrical combined PWM

enum _ftm_pwm_level_select#

FTM PWM output pulse mode: high-true, low-true or no output.

Note

kFTM_NoPwmSignal: ELSnB:ELSnA = 0:0 kFTM_LowTrue: ELSnB:ELSnA = 0:1 EPWM: Channel n output is forced low at counter overflow, forced high at channel n match. CPWM: Channel n output is forced low at channel n match when counting down, and forced high at channel n match when counting up. Combined PWM: Channel n output is forced high at beginning of period and at channel n+1 match. It is forced low at the channel n match. kFTM_HighTrue: ELSnB:ELSnA = 1:0 EPWM: Channel n output is forced high at counter overflow, forced low at channel n match. CPWM: Channel n output is forced high at channel n match when counting down, and forced low at channel n match when counting up. Combined PWM: Channel n output is forced low at beginning of period and at channel n+1 match. It is forced high at the channel n match.

Values:

enumerator kFTM_NoPwmSignal#: No PWM output on pin

enumerator kFTM_LowTrue#: Low true pulses

enumerator kFTM_HighTrue#: High true pulses

enum _ftm_output_compare_mode#

FlexTimer output compare mode.

Values:

enumerator kFTM_NoOutputSignal#: No channel output when counter reaches CnV

enumerator kFTM_ToggleOnMatch#: Toggle output

enumerator kFTM_ClearOnMatch#: Clear output

enumerator kFTM_SetOnMatch#: Set output

enum _ftm_input_capture_edge#

FlexTimer input capture edge.

Values:

enumerator kFTM_RisingEdge#: Capture on rising edge only

enumerator kFTM_FallingEdge#: Capture on falling edge only

enumerator kFTM_RiseAndFallEdge#: Capture on rising or falling edge

enum _ftm_dual_edge_capture_mode#

FlexTimer dual edge capture modes.

Values:

enumerator kFTM_OneShot#: One-shot capture mode

enumerator kFTM_Continuous#: Continuous capture mode

enum _ftm_quad_decode_mode#

FlexTimer quadrature decode modes.

Values:

enumerator kFTM_QuadPhaseEncode#: Phase A and Phase B encoding mode

enumerator kFTM_QuadCountAndDir#: Count and direction encoding mode

enum _ftm_phase_polarity#

FlexTimer quadrature phase polarities.

Values:

enumerator kFTM_QuadPhaseNormal#: Phase input signal is not inverted

enumerator kFTM_QuadPhaseInvert#: Phase input signal is inverted

enum _ftm_fault_output_state#

FlexTimer pre-scaler factor for the dead time insertion.

Values:

enumerator kFTM_FaultOutput_PreDefined#: FTM outputs will be placed into safe values when fault events in ongoing (defined by POL bits).

enumerator kFTM_FaultOutput_TriStated#: FTM outputs will be tri-stated when fault event is ongoing.

enum _ftm_deadtime_prescale#

FlexTimer pre-scaler factor for the dead time insertion.

Values:

enumerator kFTM_Deadtime_Prescale_1#: Divide by 1

enumerator kFTM_Deadtime_Prescale_4#: Divide by 4

enumerator kFTM_Deadtime_Prescale_16#: Divide by 16

enum _ftm_clock_source#

FlexTimer clock source selection.

Values:

enumerator kFTM_SystemClock#: System clock selected

enumerator kFTM_FixedClock#: Fixed frequency clock

enumerator kFTM_ExternalClock#: External clock

enum _ftm_clock_prescale#

FlexTimer pre-scaler factor selection for the clock source.

Values:

enumerator kFTM_Prescale_Divide_1#: Divide by 1

enumerator kFTM_Prescale_Divide_2#: Divide by 2

enumerator kFTM_Prescale_Divide_4#: Divide by 4

enumerator kFTM_Prescale_Divide_8#: Divide by 8

enumerator kFTM_Prescale_Divide_16#: Divide by 16

enumerator kFTM_Prescale_Divide_32#: Divide by 32

enumerator kFTM_Prescale_Divide_64#: Divide by 64

enumerator kFTM_Prescale_Divide_128#: Divide by 128

enum _ftm_filter_prescale#

FlexTimer filter clock prescaler selection.

Values:

enumerator kFTM_Filter_Prescale_Divide_1#: Divide by 1

enumerator kFTM_Filter_Prescale_Divide_2#: Divide by 2

enumerator kFTM_Filter_Prescale_Divide_3#: Divide by 3

enumerator kFTM_Filter_Prescale_Divide_4#: Divide by 4

enumerator kFTM_Filter_Prescale_Divide_5#: Divide by 5

enumerator kFTM_Filter_Prescale_Divide_6#: Divide by 6

enumerator kFTM_Filter_Prescale_Divide_7#: Divide by 7

enumerator kFTM_Filter_Prescale_Divide_8#: Divide by 8

enumerator kFTM_Filter_Prescale_Divide_9#: Divide by 9

enumerator kFTM_Filter_Prescale_Divide_10#: Divide by 10

enumerator kFTM_Filter_Prescale_Divide_11#: Divide by 11

enumerator kFTM_Filter_Prescale_Divide_12#: Divide by 12

enumerator kFTM_Filter_Prescale_Divide_13#: Divide by 13

enumerator kFTM_Filter_Prescale_Divide_14#: Divide by 14

enumerator kFTM_Filter_Prescale_Divide_15#: Divide by 15

enumerator kFTM_Filter_Prescale_Divide_16#: Divide by 16

enum _ftm_bdm_mode#

Options for the FlexTimer behaviour in BDM Mode.

Values:

enumerator kFTM_BdmMode_0#: FTM counter stopped, CH(n)F bit can be set, FTM channels in functional mode, writes to MOD,CNTIN and C(n)V registers bypass the register buffers

enumerator kFTM_BdmMode_1#: FTM counter stopped, CH(n)F bit is not set, FTM channels outputs are forced to their safe value , writes to MOD,CNTIN and C(n)V registers bypass the register buffers

enumerator kFTM_BdmMode_2#: FTM counter stopped, CH(n)F bit is not set, FTM channels outputs are frozen when chip enters in BDM mode, writes to MOD,CNTIN and C(n)V registers bypass the register buffers

enumerator kFTM_BdmMode_3#: FTM counter in functional mode, CH(n)F bit can be set, FTM channels in functional mode, writes to MOD,CNTIN and C(n)V registers is in fully functional mode

enum _ftm_fault_mode#

Options for the FTM fault control mode.

Values:

enumerator kFTM_Fault_Disable#: Fault control is disabled for all channels

enumerator kFTM_Fault_EvenChnls#: Enabled for even channels only(0,2,4,6) with manual fault clearing

enumerator kFTM_Fault_AllChnlsMan#: Enabled for all channels with manual fault clearing

enumerator kFTM_Fault_AllChnlsAuto#: Enabled for all channels with automatic fault clearing

enum _ftm_external_trigger#

FTM external trigger options.

Note

Actual available external trigger sources are SoC-specific

Values:

enumerator kFTM_Chnl0Trigger#: Generate trigger when counter equals chnl 0 CnV reg

enumerator kFTM_Chnl1Trigger#: Generate trigger when counter equals chnl 1 CnV reg

enumerator kFTM_Chnl2Trigger#: Generate trigger when counter equals chnl 2 CnV reg

enumerator kFTM_Chnl3Trigger#: Generate trigger when counter equals chnl 3 CnV reg

enumerator kFTM_Chnl4Trigger#: Generate trigger when counter equals chnl 4 CnV reg

enumerator kFTM_Chnl5Trigger#: Generate trigger when counter equals chnl 5 CnV reg

enumerator kFTM_Chnl6Trigger#: Available on certain SoC’s, generate trigger when counter equals chnl 6 CnV reg

enumerator kFTM_Chnl7Trigger#: Available on certain SoC’s, generate trigger when counter equals chnl 7 CnV reg

enumerator kFTM_InitTrigger#: Generate Trigger when counter is updated with CNTIN

enumerator kFTM_ReloadInitTrigger#: Available on certain SoC’s, trigger on reload point

enum _ftm_pwm_sync_method#

FlexTimer PWM sync options to update registers with buffer.

Values:

enumerator kFTM_SoftwareTrigger#: Software triggers PWM sync

enumerator kFTM_HardwareTrigger_0#: Hardware trigger 0 causes PWM sync

enumerator kFTM_HardwareTrigger_1#: Hardware trigger 1 causes PWM sync

enumerator kFTM_HardwareTrigger_2#: Hardware trigger 2 causes PWM sync

enum _ftm_reload_point#

FTM options available as loading point for register reload.

Note

Actual available reload points are SoC-specific

Values:

enumerator kFTM_Chnl0Match#: Channel 0 match included as a reload point

enumerator kFTM_Chnl1Match#: Channel 1 match included as a reload point

enumerator kFTM_Chnl2Match#: Channel 2 match included as a reload point

enumerator kFTM_Chnl3Match#: Channel 3 match included as a reload point

enumerator kFTM_Chnl4Match#: Channel 4 match included as a reload point

enumerator kFTM_Chnl5Match#: Channel 5 match included as a reload point

enumerator kFTM_Chnl6Match#: Channel 6 match included as a reload point

enumerator kFTM_Chnl7Match#: Channel 7 match included as a reload point

enumerator kFTM_CntMax#: Use in up-down count mode only, reload when counter reaches the maximum value

enumerator kFTM_CntMin#: Use in up-down count mode only, reload when counter reaches the minimum value

enumerator kFTM_HalfCycMatch#: Available on certain SoC’s, half cycle match reload point

enum _ftm_interrupt_enable#

List of FTM interrupts.

Note

Actual available interrupts are SoC-specific

Values:

enumerator kFTM_Chnl0InterruptEnable#: Channel 0 interrupt

enumerator kFTM_Chnl1InterruptEnable#: Channel 1 interrupt

enumerator kFTM_Chnl2InterruptEnable#: Channel 2 interrupt

enumerator kFTM_Chnl3InterruptEnable#: Channel 3 interrupt

enumerator kFTM_Chnl4InterruptEnable#: Channel 4 interrupt

enumerator kFTM_Chnl5InterruptEnable#: Channel 5 interrupt

enumerator kFTM_Chnl6InterruptEnable#: Channel 6 interrupt

enumerator kFTM_Chnl7InterruptEnable#: Channel 7 interrupt

enumerator kFTM_FaultInterruptEnable#: Fault interrupt

enumerator kFTM_TimeOverflowInterruptEnable#: Time overflow interrupt

enumerator kFTM_ReloadInterruptEnable#: Reload interrupt; Available only on certain SoC’s

enum _ftm_status_flags#

List of FTM flags.

Note

Actual available flags are SoC-specific

Values:

enumerator kFTM_Chnl0Flag#: Channel 0 Flag

enumerator kFTM_Chnl1Flag#: Channel 1 Flag

enumerator kFTM_Chnl2Flag#: Channel 2 Flag

enumerator kFTM_Chnl3Flag#: Channel 3 Flag

enumerator kFTM_Chnl4Flag#: Channel 4 Flag

enumerator kFTM_Chnl5Flag#: Channel 5 Flag

enumerator kFTM_Chnl6Flag#: Channel 6 Flag

enumerator kFTM_Chnl7Flag#: Channel 7 Flag

enumerator kFTM_FaultFlag#: Fault Flag

enumerator kFTM_TimeOverflowFlag#: Time overflow Flag

enumerator kFTM_ChnlTriggerFlag#: Channel trigger Flag

enumerator kFTM_ReloadFlag#: Reload Flag; Available only on certain SoC’s

enum _ftm_channel_index#

List of FTM channel index used in logic OR.

Values:

enumerator kFTM_Chnl0_Mask#: Channel 0 Mask

enumerator kFTM_Chnl1_Mask#: Channel 1 Mask

enumerator kFTM_Chnl2_Mask#: Channel 2 Mask

enumerator kFTM_Chnl3_Mask#: Channel 3 Mask

enumerator kFTM_Chnl4_Mask#: Channel 4 Mask

enumerator kFTM_Chnl5_Mask#: Channel 5 Mask

enumerator kFTM_Chnl6_Mask#: Channel 6 Mask

enumerator kFTM_Chnl7_Mask#: Channel 7 Mask

typedef enum _ftm_chnl ftm_chnl_t#: List of FTM channels.

Note

Actual number of available channels is SoC dependent

typedef enum _ftm_fault_input ftm_fault_input_t#: List of FTM faults.

typedef enum _ftm_pwm_mode ftm_pwm_mode_t#: FTM PWM operation modes.

typedef enum _ftm_pwm_level_select ftm_pwm_level_select_t#: FTM PWM output pulse mode: high-true, low-true or no output.

Note

kFTM_NoPwmSignal: ELSnB:ELSnA = 0:0 kFTM_LowTrue: ELSnB:ELSnA = 0:1 EPWM: Channel n output is forced low at counter overflow, forced high at channel n match. CPWM: Channel n output is forced low at channel n match when counting down, and forced high at channel n match when counting up. Combined PWM: Channel n output is forced high at beginning of period and at channel n+1 match. It is forced low at the channel n match. kFTM_HighTrue: ELSnB:ELSnA = 1:0 EPWM: Channel n output is forced high at counter overflow, forced low at channel n match. CPWM: Channel n output is forced high at channel n match when counting down, and forced low at channel n match when counting up. Combined PWM: Channel n output is forced low at beginning of period and at channel n+1 match. It is forced high at the channel n match.

typedef struct _ftm_chnl_pwm_signal_param ftm_chnl_pwm_signal_param_t#: Options to configure a FTM channel’s PWM signal.

typedef struct _ftm_chnl_pwm_config_param ftm_chnl_pwm_config_param_t#: Options to configure a FTM channel using precise setting.

typedef struct _ftm_chnl_param ftm_chnl_param_t#: General options to configure a FTM channel using precise setting.

typedef enum _ftm_output_compare_mode ftm_output_compare_mode_t#: FlexTimer output compare mode.

typedef enum _ftm_input_capture_edge ftm_input_capture_edge_t#: FlexTimer input capture edge.

typedef enum _ftm_dual_edge_capture_mode ftm_dual_edge_capture_mode_t#: FlexTimer dual edge capture modes.

typedef struct _ftm_dual_edge_capture_param ftm_dual_edge_capture_param_t#: FlexTimer dual edge capture parameters.

typedef enum _ftm_quad_decode_mode ftm_quad_decode_mode_t#: FlexTimer quadrature decode modes.

typedef enum _ftm_phase_polarity ftm_phase_polarity_t#: FlexTimer quadrature phase polarities.

typedef struct _ftm_phase_param ftm_phase_params_t#: FlexTimer quadrature decode phase parameters.

typedef struct _ftm_fault_param ftm_fault_param_t#: Structure is used to hold the parameters to configure a FTM fault.

typedef enum _ftm_fault_output_state ftm_fault_output_state_t#: FlexTimer pre-scaler factor for the dead time insertion.

typedef enum _ftm_deadtime_prescale ftm_deadtime_prescale_t#: FlexTimer pre-scaler factor for the dead time insertion.

typedef struct _ftm_deadtime_param ftm_deadtime_param_t#: Options to configure FTM combined channel pair deadtime.

typedef enum _ftm_clock_source ftm_clock_source_t#: FlexTimer clock source selection.

typedef enum _ftm_clock_prescale ftm_clock_prescale_t#: FlexTimer pre-scaler factor selection for the clock source.

typedef enum _ftm_filter_prescale ftm_filter_prescale_t#: FlexTimer filter clock prescaler selection.

typedef enum _ftm_bdm_mode ftm_bdm_mode_t#: Options for the FlexTimer behaviour in BDM Mode.

typedef enum _ftm_fault_mode ftm_fault_mode_t#: Options for the FTM fault control mode.

typedef enum _ftm_external_trigger ftm_external_trigger_t#: FTM external trigger options.

Note

Actual available external trigger sources are SoC-specific

typedef enum _ftm_pwm_sync_method ftm_pwm_sync_method_t#: FlexTimer PWM sync options to update registers with buffer.

typedef enum _ftm_reload_point ftm_reload_point_t#: FTM options available as loading point for register reload.

Note

Actual available reload points are SoC-specific

typedef enum _ftm_interrupt_enable ftm_interrupt_enable_t#: List of FTM interrupts.

Note

Actual available interrupts are SoC-specific

typedef enum _ftm_status_flags ftm_status_flags_t#: List of FTM flags.

Note

Actual available flags are SoC-specific

typedef enum _ftm_channel_index ftm_channel_index_t#: List of FTM channel index used in logic OR.

typedef struct _ftm_config ftm_config_t#

FTM configuration structure.

This structure holds the configuration settings for the FTM peripheral. To initialize this structure to reasonable defaults, call the FTM_GetDefaultConfig() function and pass a pointer to the configuration structure instance.

The configuration structure can be made constant so as to reside in flash.

void FTM_SetupFaultInput(FTM_Type *base, ftm_fault_input_t faultNumber, const ftm_fault_param_t *faultParams)#

Sets up the working of the FTM fault inputs protection.

FTM can have up to 4 fault inputs. This function sets up fault parameters, fault level, and input filter.

Parameters:

base – FTM peripheral base address
faultNumber – FTM fault to configure.
faultParams – Parameters passed in to set up the fault

void FTM_ERRATA_010856(FTM_Type *base, uint8_t *faultFlag, uint32_t channel, uint32_t channelValue)#

Workaround for ERR010856.

This API should be invoked in TOF interrupt handler when a fault is detected to ensure that the outputs return to the value configured by SWOCTRL, then FTM should be configured as follows:

MODE[FAULTM] configured for manual fault clearing. (MODE[FAULTM] = 0b10)
For devices that include the CONF[NUMTOF] field, it must be cleared to 0b00000.
SYNC[SYNCHOM] and SYNCONF[SWOC] configured for update OUTMASK and SWOCTRL register at each rising edge of system clock. (SYNC[SYNCHOM] = 0, SYNCONF[SWOC] = 0)

Parameters:

base – FTM peripheral base address
faultFlag – Pointer to variable to indicate that a fault was detected
channel – Channels controlled by Software output, logical OR of enumeration ftm_channel_index_t
channelValue – Channels value controlled by Software output, logical OR of enumeration ftm_channel_index_t

static inline void FTM_SetGlobalTimeBaseOutputEnable(FTM_Type *base, bool enable)#

Enables or disables the FTM global time base signal generation to other FTMs.

Parameters:

base – FTM peripheral base address
enable – true to enable, false to disable

static inline void FTM_SetOutputMask(FTM_Type *base, ftm_chnl_t chnlNumber, bool mask)#

Sets the FTM peripheral timer channel output mask.

Parameters:

base – FTM peripheral base address
chnlNumber – Channel to be configured
mask – true: masked, channel is forced to its inactive state; false: unmasked

static inline void FTM_SetPwmOutputEnable(FTM_Type *base, ftm_chnl_t chnlNumber, bool value)#

Allows users to enable an output on an FTM channel.

To enable the PWM channel output call this function with val=true. For input mode, call this function with val=false.

Parameters:

base – FTM peripheral base address
chnlNumber – Channel to be configured
value – true: enable output; false: output is disabled, used in input mode

static inline void FTM_SetSoftwareTrigger(FTM_Type *base, bool enable)#

Enables or disables the FTM software trigger for PWM synchronization.

Parameters:

base – FTM peripheral base address
enable – true: software trigger is selected, false: software trigger is not selected

static inline void FTM_SetWriteProtection(FTM_Type *base, bool enable)#

Enables or disables the FTM write protection.

Parameters:

base – FTM peripheral base address
enable – true: Write-protection is enabled, false: Write-protection is disabled

static inline void FTM_EnableDmaTransfer(FTM_Type *base, ftm_chnl_t chnlNumber, bool enable)#

Enable DMA transfer or not.

Note: CHnIE bit needs to be set when calling this API. The channel DMA transfer request is generated and the channel interrupt is not generated if (CHnF = 1) when DMA and CHnIE bits are set.

Parameters:

base – FTM peripheral base address.
chnlNumber – Channel to be configured
enable – true to enable, false to disable

static inline void FTM_SetLdok(FTM_Type *base, bool value)#

Enable the LDOK bit.

This function enables loading updated values.

Parameters:

base – FTM peripheral base address
value – true: loading updated values is enabled; false: loading updated values is disabled.

static inline void FTM_SetHalfCycReloadMatchValue(FTM_Type *base, uint32_t ticks)#

Sets the half cycle relade period in units of ticks.

This function can be callled to set the half-cycle reload value when half-cycle matching is enabled as a reload point. Note: Need enable kFTM_HalfCycMatch as reload point, and when this API call after FTM_StartTimer(), the new HCR value will not be active until next reload point (need call FTM_SetLdok to set LDOK) or register synchronization.

Parameters:

base – FTM peripheral base address
ticks – A timer period in units of ticks, which should be equal or greater than 1.

static inline void FTM_SetLoadFreq(FTM_Type *base, uint32_t loadfreq)#

Set load frequency value.

Parameters:

base – FTM peripheral base address.
loadfreq – PWM reload frequency, range: 0 ~ 31.

static inline void FTM_SetPairDeadTime(FTM_Type *base, const ftm_deadtime_param_t *config, ftm_chnl_t chnlPairNumber)#

brief Configure deadtime for specific combined channel pair.

param base FTM peripheral base address param config Pointer to the user configuration structure. param chnlPairNumber The FTM channel pair number; options are 0, 1, 2, 3

static inline void FTM_SetPeriodDithering(FTM_Type *base, uint16_t moduloValue, uint8_t fractionalValue)#

Set PWM Period Dithering. For the PWM period dithering, the register MOD_MIRROR should be used instead of the register MOD.

Parameters:

base – FTM peripheral base address.
moduloValue – FTM counter modulo value.
fractionalValue – The modulo fractional value used in the PWM period dithering.

static inline void FTM_SetEdgeDithering(FTM_Type *base, ftm_chnl_t chnlNumber, uint16_t matchValue, uint8_t fractionalValue)#

Set PWM Edge Dithering. For the PWM edge dithering, the register CnV_MIRROR should be used instead of the register CnV.

Parameters:

base – FTM peripheral base address.
chnlNumber – The channel number.
matchValue – FTM channel n match value.
fractionalValue – The channel n match fractional value used in the PWM edge dithering.

static inline uint32_t FTM_GetChannelInputState(FTM_Type *base, ftm_chnl_t chnlNumber)#

Get value of channel n input after the double-sampling or the filtering.

Parameters:

base – FTM peripheral base address.
chnlNumber – The channel number.

Returns:

Channel n input state, 0 or 1.

static inline uint32_t FTM_GetChannelOutputState(FTM_Type *base, ftm_chnl_t chnlNumber)#

Get final value of the channel n output.

Parameters:

base – FTM peripheral base address.
chnlNumber – The channel number.

Returns:

Channel n output value, 0 or 1.

struct _ftm_chnl_pwm_signal_param#

#include <fsl_ftm.h>

Options to configure a FTM channel’s PWM signal.

Public Members

ftm_chnl_t chnlNumber#: The channel/channel pair number. In combined mode, this represents the channel pair number.

ftm_pwm_level_select_t level#: PWM output active level select.

uint8_t dutyCyclePercent#: PWM pulse width, value should be between 0 to 100 0 = inactive signal(0% duty cycle)… 100 = always active signal (100% duty cycle).

uint8_t firstEdgeDelayPercent#: Used only in kFTM_AsymmetricalCombinedPwm mode to generate an asymmetrical PWM. Specifies the delay to the first edge in a PWM period. If unsure leave as 0; Should be specified as a percentage of the PWM period

bool enableComplementary#: Used only in combined PWM mode. true: The combined channels output complementary signals; false: The combined channels output same signals;

bool enableDeadtime#: Used only in combined PWM mode with enable complementary. true: The deadtime insertion in this pair of channels is enabled; false: The deadtime insertion in this pair of channels is disabled.

struct _ftm_chnl_pwm_config_param#

#include <fsl_ftm.h>

Options to configure a FTM channel using precise setting.

Public Members

ftm_chnl_t chnlNumber#: The channel/channel pair number. In combined mode, this represents the channel pair number.

ftm_pwm_level_select_t level#: PWM output active level select.

uint16_t dutyValue#: PWM pulse width, the uint of this value is timer ticks.

uint16_t firstEdgeValue#: Used only in kFTM_AsymmetricalCombinedPwm mode to generate an asymmetrical PWM. Specifies the delay to the first edge in a PWM period. If unsure leave as 0, uint of this value is timer ticks.

bool enableComplementary#: Used only in combined PWM mode. true: The combined channels output complementary signals; false: The combined channels output same signals;

bool enableDeadtime#: Used only in combined PWM mode with enable complementary. true: The deadtime insertion in this pair of channels is enabled; false: The deadtime insertion in this pair of channels is disabled.

struct _ftm_chnl_param#

#include <fsl_ftm.h>

General options to configure a FTM channel using precise setting.

Public Members

ftm_pwm_mode_t mode#: PWM output mode.

ftm_pwm_level_select_t level#: PWM output active level select.

uint16_t initialValue#: FTM counter initial value.

uint16_t moduloValue#: FTM counter modulo value.

uint16_t chnlValue#: FTM channel n match value.

uint16_t combinedChnlValue#: FTM combined channel n+1 match value, used only in (modified) combined PWM mode.

bool enableComplementary#: Used only in combined PWM mode. true: The combined channels output complementary signals; false: The combined channels output same signals;

bool enableDeadtime#: Used only in combined PWM mode with enable complementary. true: The deadtime insertion in this pair of channels is enabled; false: The deadtime insertion in this pair of channels is disabled.

bool enablePulseOutput#: Used only in Edge-aligned PWM and Center-aligned PWM. true: If a match in channel occurs, a trigger pulse with one FTM input clock width is generated in the channel n; false: Channel outputs will generate normal PWM outputs without generating a pulse.

bool enableDithering#: Enable fractional delay to achieve fine resolution on generated PWM signals. true: Enable dithering; false: Disable dithering.

uint8_t moduloFracValue#: Modulo fractional value, used in Period Dithering.

uint8_t chnlFracValue#: Channel n match fractional value, used in Edge Dithering.

uint8_t combinedChnlFracValue#: Combined channel n+1 match fractional value, used in Edge Dithering. It is recommended to use only one PWM Edge Dithering (channel n PWM Edge Dithering or channel n+1 PWM Edge Dithering) at a time.

struct _ftm_dual_edge_capture_param#

#include <fsl_ftm.h>

FlexTimer dual edge capture parameters.

Public Members

ftm_dual_edge_capture_mode_t mode#: Dual Edge Capture mode

ftm_input_capture_edge_t currChanEdgeMode#: Input capture edge select for channel n

ftm_input_capture_edge_t nextChanEdgeMode#: Input capture edge select for channel n+1

struct _ftm_phase_param#

#include <fsl_ftm.h>

FlexTimer quadrature decode phase parameters.

Public Members

bool enablePhaseFilter#: True: enable phase filter; false: disable filter

uint32_t phaseFilterVal#: Filter value, used only if phase filter is enabled

ftm_phase_polarity_t phasePolarity#: Phase polarity

struct _ftm_fault_param#

#include <fsl_ftm.h>

Structure is used to hold the parameters to configure a FTM fault.

Public Members

bool enableFaultInput#: True: Fault input is enabled; false: Fault input is disabled

bool faultLevel#: True: Fault polarity is active low; in other words, ‘0’ indicates a fault; False: Fault polarity is active high

bool useFaultFilter#: True: Use the filtered fault signal; False: Use the direct path from fault input

struct _ftm_deadtime_param#

#include <fsl_ftm.h>

Options to configure FTM combined channel pair deadtime.

Public Members

ftm_deadtime_prescale_t deadTimePrescale#: The dead time prescalar value

uint32_t deadTimeValue#: The dead time value deadTimeValue’s available range is 0-1023 when register has DTVALEX, otherwise its available range is 0-63.

struct _ftm_config#

#include <fsl_ftm.h>

FTM configuration structure.

The configuration structure can be made constant so as to reside in flash.

Public Members

ftm_clock_prescale_t prescale#: FTM clock prescale value

ftm_filter_prescale_t filterPrescale#: Clock prescaler used in FTM filters

ftm_bdm_mode_t bdmMode#: FTM behavior in BDM mode

uint32_t pwmSyncMode#: Synchronization methods to use to update buffered registers; Multiple update modes can be used by providing an OR’ed list of options available in enumeration ftm_pwm_sync_method_t.

uint32_t reloadPoints#: FTM reload points; When using this, the PWM synchronization is not required. Multiple reload points can be used by providing an OR’ed list of options available in enumeration ftm_reload_point_t.

ftm_fault_mode_t faultMode#: FTM fault control mode

uint8_t faultFilterValue#: Fault input filter value

ftm_fault_output_state_t faultOutputState#: Fault output state

ftm_deadtime_prescale_t deadTimePrescale#: The dead time prescalar value

uint32_t deadTimeValue#: The dead time value deadTimeValue’s available range is 0-1023 when register has DTVALEX, otherwise its available range is 0-63.

uint32_t extTriggers#: External triggers to enable. Multiple trigger sources can be enabled by providing an OR’ed list of options available in enumeration ftm_external_trigger_t.

uint8_t chnlInitState#: Defines the initialization value of the channels in OUTINT register

uint8_t chnlPolarity#: Defines the output polarity of the channels in POL register

bool useGlobalTimeBase#: True: Use of an external global time base is enabled; False: disabled

bool swTriggerResetCount#: FTM counter synchronization activated by software trigger, avtive when (syncMethod & FTM_SYNC_SWSYNC_MASK) != 0U

bool hwTriggerResetCount#: FTM counter synchronization activated by hardware trigger, avtive when (syncMethod & (FTM_SYNC_TRIG0_MASK | FTM_SYNC_TRIG1_MASK | FTM_SYNC_TRIG2_MASK)) != 0U

I2C: Inter-Integrated Circuit Driver#

I2C Driver#

FSL_I2C_DRIVER_VERSION#: I2C driver version.

I2C status return codes.

Values:

enumerator kStatus_I2C_Busy#: The master is already performing a transfer.

enumerator kStatus_I2C_Idle#: The slave driver is idle.

enumerator kStatus_I2C_Nak#: The slave device sent a NAK in response to a byte.

enumerator kStatus_I2C_InvalidParameter#: Unable to proceed due to invalid parameter.

enumerator kStatus_I2C_BitError#: Transferred bit was not seen on the bus.

enumerator kStatus_I2C_ArbitrationLost#: Arbitration lost error.

enumerator kStatus_I2C_NoTransferInProgress#: Attempt to abort a transfer when one is not in progress.

enumerator kStatus_I2C_DmaRequestFail#: DMA request failed.

enumerator kStatus_I2C_StartStopError#: Start and stop error.

enumerator kStatus_I2C_UnexpectedState#: Unexpected state.

enumerator kStatus_I2C_Addr_Nak#: NAK received during the address probe.

enumerator kStatus_I2C_Timeout#: Timeout polling status flags.

I2C_RETRY_TIMES#: Retry times for waiting flag.

I2C_STAT_MSTCODE_IDLE#: Master Idle State Code

I2C_STAT_MSTCODE_RXREADY#: Master Receive Ready State Code

I2C_STAT_MSTCODE_TXREADY#: Master Transmit Ready State Code

I2C_STAT_MSTCODE_NACKADR#: Master NACK by slave on address State Code

I2C_STAT_MSTCODE_NACKDAT#: Master NACK by slave on data State Code

I2C_STAT_SLVST_ADDR#

I2C_STAT_SLVST_RX#

I2C_STAT_SLVST_TX#

I2C Master Driver#

void I2C_MasterGetDefaultConfig(i2c_master_config_t *masterConfig)#

Provides a default configuration for the I2C master peripheral.

This function provides the following default configuration for the I2C master peripheral:

masterConfig->enableMaster            = true;
masterConfig->baudRate_Bps            = 100000U;
masterConfig->enableTimeout           = false;

After calling this function, you can override any settings in order to customize the configuration, prior to initializing the master driver with I2C_MasterInit().

Parameters:

masterConfig – [out] User provided configuration structure for default values. Refer to i2c_master_config_t.

void I2C_MasterInit(I2C_Type *base, const i2c_master_config_t *masterConfig, uint32_t srcClock_Hz)#

Initializes the I2C master peripheral.

This function enables the peripheral clock and initializes the I2C master peripheral as described by the user provided configuration. A software reset is performed prior to configuration.

Parameters:

base – The I2C peripheral base address.
masterConfig – User provided peripheral configuration. Use I2C_MasterGetDefaultConfig() to get a set of defaults that you can override.
srcClock_Hz – Frequency in Hertz of the I2C functional clock. Used to calculate the baud rate divisors, filter widths, and timeout periods.

void I2C_MasterDeinit(I2C_Type *base)#

Deinitializes the I2C master peripheral.

This function disables the I2C master peripheral and gates the clock. It also performs a software reset to restore the peripheral to reset conditions.

Parameters:

base – The I2C peripheral base address.

uint32_t I2C_GetInstance(I2C_Type *base)#

Returns an instance number given a base address.

If an invalid base address is passed, debug builds will assert. Release builds will just return instance number 0.

Parameters:

base – The I2C peripheral base address.

Returns:

I2C instance number starting from 0.

static inline void I2C_MasterReset(I2C_Type *base)#

Performs a software reset.

Restores the I2C master peripheral to reset conditions.

Parameters:

base – The I2C peripheral base address.

static inline void I2C_MasterEnable(I2C_Type *base, bool enable)#

Enables or disables the I2C module as master.

Parameters:

base – The I2C peripheral base address.
enable – Pass true to enable or false to disable the specified I2C as master.

static inline uint32_t I2C_GetStatusFlags(I2C_Type *base)#

Gets the I2C status flags.

A bit mask with the state of all I2C status flags is returned. For each flag, the corresponding bit in the return value is set if the flag is asserted.

I2C Slave Driver#

void I2C_SlaveGetDefaultConfig(i2c_slave_config_t *slaveConfig)#

Provides a default configuration for the I2C slave peripheral.

This function provides the following default configuration for the I2C slave peripheral:

slaveConfig->enableSlave = true;
slaveConfig->address0.disable = false;
slaveConfig->address0.address = 0u;
slaveConfig->address1.disable = true;
slaveConfig->address2.disable = true;
slaveConfig->address3.disable = true;
slaveConfig->busSpeed = kI2C_SlaveStandardMode;

After calling this function, override any settings to customize the configuration, prior to initializing the master driver with I2C_SlaveInit(). Be sure to override at least the address0.address member of the configuration structure with the desired slave address.

Parameters:

slaveConfig – [out] User provided configuration structure that is set to default values. Refer to i2c_slave_config_t.

status_t I2C_SlaveInit(I2C_Type *base, const i2c_slave_config_t *slaveConfig, uint32_t srcClock_Hz)#

Initializes the I2C slave peripheral.

This function enables the peripheral clock and initializes the I2C slave peripheral as described by the user provided configuration.

Parameters:

base – The I2C peripheral base address.
slaveConfig – User provided peripheral configuration. Use I2C_SlaveGetDefaultConfig() to get a set of defaults that you can override.
srcClock_Hz – Frequency in Hertz of the I2C functional clock. Used to calculate CLKDIV value to provide enough data setup time for master when slave stretches the clock.

void I2C_SlaveSetAddress(I2C_Type *base, i2c_slave_address_register_t addressRegister, uint8_t address, bool addressDisable)#

Configures Slave Address n register.

This function writes new value to Slave Address register.

Parameters:

base – The I2C peripheral base address.
addressRegister – The module supports multiple address registers. The parameter determines which one shall be changed.
address – The slave address to be stored to the address register for matching.
addressDisable – Disable matching of the specified address register.

void I2C_SlaveDeinit(I2C_Type *base)#

Deinitializes the I2C slave peripheral.

This function disables the I2C slave peripheral and gates the clock. It also performs a software reset to restore the peripheral to reset conditions.

Parameters:

base – The I2C peripheral base address.

static inline void I2C_SlaveEnable(I2C_Type *base, bool enable)#

Enables or disables the I2C module as slave.

Parameters:

base – The I2C peripheral base address.
enable – True to enable or flase to disable.

static inline void I2C_SlaveClearStatusFlags(I2C_Type *base, uint32_t statusMask)#

Clears the I2C status flag state.

The following status register flags can be cleared:

slave deselected flag

Attempts to clear other flags has no effect.

I3C: I3C Driver#

FSL_I3C_DRIVER_VERSION#: I3C driver version.

I3C status return codes.

Values:

enumerator kStatus_I3C_Busy#: The master is already performing a transfer.

enumerator kStatus_I3C_Idle#: The slave driver is idle.

enumerator kStatus_I3C_Nak#: The slave device sent a NAK in response to an address.

enumerator kStatus_I3C_WriteAbort#: The slave device sent a NAK in response to a write.

enumerator kStatus_I3C_Term#: The master terminates slave read.

enumerator kStatus_I3C_HdrParityError#: Parity error from DDR read.

enumerator kStatus_I3C_CrcError#: CRC error from DDR read.

enumerator kStatus_I3C_ReadFifoError#: Read from M/SRDATAB register when FIFO empty.

enumerator kStatus_I3C_WriteFifoError#: Write to M/SWDATAB register when FIFO full.

enumerator kStatus_I3C_MsgError#: Message SDR/DDR mismatch or read/write message in wrong state

enumerator kStatus_I3C_InvalidReq#: Invalid use of request.

enumerator kStatus_I3C_Timeout#: The module has stalled too long in a frame.

enumerator kStatus_I3C_SlaveCountExceed#: The I3C slave count has exceed the definition in I3C_MAX_DEVCNT.

enumerator kStatus_I3C_IBIWon#: The I3C slave event IBI or MR or HJ won the arbitration on a header address.

enumerator kStatus_I3C_OverrunError#: Slave internal from-bus buffer/FIFO overrun.

enumerator kStatus_I3C_UnderrunError#: Slave internal to-bus buffer/FIFO underrun

enumerator kStatus_I3C_UnderrunNak#: Slave internal from-bus buffer/FIFO underrun and NACK error

enumerator kStatus_I3C_InvalidStart#: Slave invalid start flag

enumerator kStatus_I3C_SdrParityError#: SDR parity error

enumerator kStatus_I3C_S0S1Error#: S0 or S1 error

enum _i3c_hdr_mode#

I3C HDR modes.

Values:

enumerator kI3C_HDRModeNone#

enumerator kI3C_HDRModeDDR#

enumerator kI3C_HDRModeTSP#

enumerator kI3C_HDRModeTSL#

typedef enum _i3c_hdr_mode i3c_hdr_mode_t#: I3C HDR modes.

typedef struct _i3c_device_info i3c_device_info_t#: I3C device information.

I3C_RETRY_TIMES#

Max loops to wait for I3C operation status complete.

This is the maximum number of loops to wait for I3C operation status complete. If set to 0, it will wait indefinitely.

I3C_MAX_DEVCNT#

I3C_IBI_BUFF_SIZE#

struct _i3c_device_info#

#include <fsl_i3c.h>

I3C device information.

Public Members

uint8_t dynamicAddr#: Device dynamic address.

uint8_t staticAddr#: Static address.

uint8_t dcr#: Device characteristics register information.

uint8_t bcr#: Bus characteristics register information.

uint16_t vendorID#: Device vendor ID(manufacture ID).

uint32_t partNumber#: Device part number info

uint16_t maxReadLength#: Maximum read length.

uint16_t maxWriteLength#: Maximum write length.

uint8_t hdrMode#: Support hdr mode, could be OR logic in i3c_hdr_mode.

I3C Common Driver#

typedef struct _i3c_config i3c_config_t#

Structure with settings to initialize the I3C module, could both initialize master and slave functionality.

This structure holds configuration settings for the I3C peripheral. To initialize this structure to reasonable defaults, call the I3C_GetDefaultConfig() function and pass a pointer to your configuration structure instance.

The configuration structure can be made constant so it resides in flash.

uint32_t I3C_GetInstance(I3C_Type *base)#

Get which instance current I3C is used.

Parameters:

base – The I3C peripheral base address.

void I3C_GetDefaultConfig(i3c_config_t *config)#

Provides a default configuration for the I3C peripheral, the configuration covers both master functionality and slave functionality.

This function provides the following default configuration for I3C:

config->disableTimeout config->hKeep config->enableOpenDrainStop config->enableOpenDrainHigh config->baudRate_Hzconfig->baudRate_Hzconfig->baudRate_Hzconfig->masterDynamicAddress config->slowClock_Hz config->enableSlave config->vendorID config->enableRandomPart config->partNumber config->dcr config->bcr config->hdrMode config->nakAllRequest config->ignoreS0S1Error config->offline config->matchSlaveStartStop 

notranslate">

config->enableMaster                 = kI3C_MasterCapable; = false; = kI3C_MasterHighKeeperNone; = true; = true; class="o">.i2cBaud          = 400000U; class="o">.i3cPushPullBaud  = 12500000U; class="o">.i3cOpenDrainBaud = 2500000U; = 0x0AU; = 1000000U; = true; = 0x11BU; = false; = 0; = 0; = 0; = (uint8_t)kI3C_HDRModeDDR; = false; = false; = false; = false;
After calling this function, you can override any settings in order to customize the configuration, prior to initializing the common I3C driver with I3C_Init().

Parameters:

config – [out] User provided configuration structure for default values. Refer to i3c_config_t. 







void I3C_Init(I3C_Type *base, const i3c_config_t *config, uint32_t sourceClock_Hz)#

Initializes the I3C peripheral. This function enables the peripheral clock and initializes the I3C peripheral as described by the user provided configuration. This will initialize both the master peripheral and slave peripheral so that I3C module could work as pure master, pure slave or secondary master, etc. A software reset is performed prior to configuration. 

Parameters:

base – The I3C peripheral base address. 
config – User provided peripheral configuration. Use I3C_GetDefaultConfig() to get a set of defaults that you can override. 
sourceClock_Hz – Frequency in Hertz of the I3C functional clock. Used to calculate the baud rate divisors, filter widths, and timeout periods. 







struct _i3c_config#


#include <fsl_i3c.h>
Structure with settings to initialize the I3C module, could both initialize master and slave functionality. 
This structure holds configuration settings for the I3C peripheral. To initialize this structure to reasonable defaults, call the I3C_GetDefaultConfig() function and pass a pointer to your configuration structure instance.
The configuration structure can be made constant so it resides in flash. 

Public Members


i3c_master_enable_t enableMaster#

Enable master mode. 




bool disableTimeout#

Whether to disable timeout to prevent the ERRWARN. 




i3c_master_hkeep_t hKeep#

High keeper mode setting. 




bool enableOpenDrainStop#

Whether to emit open-drain speed STOP. 




bool enableOpenDrainHigh#

Enable Open-Drain High to be 1 PPBAUD count for i3c messages, or 1 ODBAUD. 




i3c_baudrate_hz_t baudRate_Hz#

Desired baud rate settings. 




i3c_start_scl_delay_t startSclDelay#

I3C SCL delay after START. 




i3c_start_scl_delay_t restartSclDelay#

I3C SCL delay after Repeated START. 




uint8_t masterDynamicAddress#

Main master dynamic address configuration. 




uint32_t maxWriteLength#

Maximum write length. 




uint32_t maxReadLength#

Maximum read length. 




bool enableSlave#

Whether to enable slave. 




uint8_t staticAddr#

Static address. 




uint16_t vendorID#

Device vendor ID(manufacture ID). 




uint32_t partNumber#

Device part number info 




uint8_t dcr#

Device characteristics register information. 




uint8_t bcr#

Bus characteristics register information. 




uint8_t hdrMode#

Support hdr mode, could be OR logic in enumeration:i3c_hdr_mode_t. 




bool nakAllRequest#

Whether to reply NAK to all requests except broadcast CCC. 




bool ignoreS0S1Error#

Whether to ignore S0/S1 error in SDR mode. 




bool offline#

Whether to wait 60 us of bus quiet or HDR request to ensure slave track SDR mode safely. 




bool matchSlaveStartStop#

Whether to assert start/stop status only the time slave is addressed. 







I3C Master DMA Driver#


typedef struct _i3c_master_dma_handle i3c_master_dma_handle_t#





typedef struct _i3c_master_dma_callback i3c_master_dma_callback_t#

i3c master callback functions. 




void I3C_MasterTransferCreateHandleDMA(I3C_Type *base, i3c_master_dma_handle_t *handle, const i3c_master_dma_callback_t *callback, void *userData, dma_handle_t *rxDmaHandle, dma_handle_t *txDmaHandle)#

Create a new handle for the I3C master DMA APIs. 
The creation of a handle is for use with the DMA APIs. Once a handle is created, there is not a corresponding destroy handle. If the user wants to terminate a transfer, the I3C_MasterTransferAbortDMA() API shall be called.
For devices where the I3C send and receive DMA requests are OR’d together, the txDmaHandle parameter is ignored and may be set to NULL.

Parameters:

base – The I3C peripheral base address. 
handle – Pointer to the I3C master driver handle. 
callback – User provided pointer to the asynchronous callback function. 
userData – User provided pointer to the application callback data. 
rxDmaHandle – Handle for the DMA receive channel. Created by the user prior to calling this function. 
txDmaHandle – Handle for the DMA transmit channel. Created by the user prior to calling this function. 







status_t I3C_MasterTransferDMA(I3C_Type *base, i3c_master_dma_handle_t *handle, i3c_master_transfer_t *transfer)#

Performs a non-blocking DMA-based transaction on the I3C bus. 
The callback specified when the handle was created is invoked when the transaction has completed.

Parameters:

base – The I3C peripheral base address. 
handle – Pointer to the I3C master driver handle. 
transfer – The pointer to the transfer descriptor. 


Return values:

kStatus_Success – The transaction was started successfully. 
kStatus_I3C_Busy – Either another master is currently utilizing the bus, or another DMA transaction is already in progress. 







status_t I3C_MasterTransferGetCountDMA(I3C_Type *base, i3c_master_dma_handle_t *handle, size_t *count)#

Returns number of bytes transferred so far. 

Parameters:

base – The I3C peripheral base address. 
handle – Pointer to the I3C master driver handle. 
count – [out] Number of bytes transferred so far by the non-blocking transaction. 


Return values:

kStatus_Success – 
kStatus_NoTransferInProgress – There is not a DMA transaction currently in progress. 







void I3C_MasterTransferAbortDMA(I3C_Type *base, i3c_master_dma_handle_t *handle)#

Terminates a non-blocking I3C master transmission early. 

Note
It is not safe to call this function from an IRQ handler that has a higher priority than the DMA peripheral’s IRQ priority.


Parameters:

base – The I3C peripheral base address. 
handle – Pointer to the I3C master driver handle. 







void I3C_MasterTransferDMAHandleIRQ(I3C_Type *base, void *i3cHandle)#

Reusable routine to handle master interrupts. 

Note
This function does not need to be called unless you are reimplementing the nonblocking API’s interrupt handler routines to add special functionality. 


Parameters:

base – The I3C peripheral base address. 
handle – Pointer to the I3C master DMA driver handle. 







void (*slave2Master)(I3C_Type *base, void *userData)#

Transfer complete callback 




void (*ibiCallback)(I3C_Type *base, i3c_master_dma_handle_t *handle, i3c_ibi_type_t ibiType, i3c_ibi_state_t ibiState)#

IBI event callback 




void (*transferComplete)(I3C_Type *base, i3c_master_dma_handle_t *handle, status_t status, void *userData)#

Transfer complete callback 




I3C_Type *base#

I3C base pointer. 




uint8_t state#

Transfer state machine current state. 




uint32_t transferCount#

Indicates progress of the transfer 




uint8_t subaddressBuffer[4]#

Saving subaddress command. 




uint8_t subaddressCount#

Saving command count. 




i3c_master_transfer_t transfer#

Copy of the current transfer info. 




i3c_master_dma_callback_t callback#

Callback function pointer. 




void *userData#

Application data passed to callback. 




dma_handle_t *rxDmaHandle#

Handle for receive DMA channel. 




dma_handle_t *txDmaHandle#

Handle for transmit DMA channel. 




uint8_t ibiAddress#

Slave address which request IBI. 




uint8_t *ibiBuff#

Pointer to IBI buffer to keep ibi bytes. 




size_t ibiPayloadSize#

IBI payload size. 




i3c_ibi_type_t ibiType#

IBI type. 




uint32_t transDataSize#

Transferred data size. 




uint8_t workaroundBuff[16]#

Workaround buffer to store temporary data. 




uint32_t event#

Reason the callback is being invoked. 




uint8_t *txData#

Transfer buffer 




size_t txDataSize#

Transfer size 




uint8_t *rxData#

Transfer buffer 




size_t rxDataSize#

Transfer size 




status_t completionStatus#

Success or error code describing how the transfer completed. Only applies for kI3C_SlaveCompletionEvent. 




I3C_Type *base

I3C base pointer. 




i3c_slave_dma_transfer_t transfer

I3C slave transfer copy. 




bool isBusy#

Whether transfer is busy. 




bool wasTransmit#

Whether the last transfer was a transmit. 




uint32_t eventMask#

Mask of enabled events. 




i3c_slave_dma_callback_t callback

Callback function called at transfer event. 




dma_handle_t *rxDmaHandle

Handle for receive DMA channel. 




dma_handle_t *txDmaHandle

Handle for transmit DMA channel. 




void *userData

Callback parameter passed to callback. 




struct _i3c_master_dma_callback#


#include <fsl_i3c_dma.h>
i3c master callback functions. 




struct _i3c_master_dma_handle#


#include <fsl_i3c_dma.h>
Driver handle for master DMA APIs. 

Note
The contents of this structure are private and subject to change. 





I3C Master Driver#


void I3C_MasterGetDefaultConfig(i3c_master_config_t *masterConfig)#

Provides a default configuration for the I3C master peripheral. 
This function provides the following default configuration for the I3C master peripheral: 
masterConfig->enableMaster            = kI3C_MasterOn;
masterConfig->disableTimeout          = false;
masterConfig->hKeep                   = kI3C_MasterHighKeeperNone;
masterConfig->enableOpenDrainStop     = true;
masterConfig->enableOpenDrainHigh     = true;
masterConfig->baudRate_Hz             = 100000U;
masterConfig->busType                 = kI3C_TypeI2C;



After calling this function, you can override any settings in order to customize the configuration, prior to initializing the master driver with I3C_MasterInit().

Parameters:

masterConfig – [out] User provided configuration structure for default values. Refer to i3c_master_config_t. 







void I3C_MasterInit(I3C_Type *base, const i3c_master_config_t *masterConfig, uint32_t sourceClock_Hz)#

Initializes the I3C master peripheral. 
This function enables the peripheral clock and initializes the I3C master peripheral as described by the user provided configuration. A software reset is performed prior to configuration.

Parameters:

base – The I3C peripheral base address. 
masterConfig – User provided peripheral configuration. Use I3C_MasterGetDefaultConfig() to get a set of defaults that you can override. 
sourceClock_Hz – Frequency in Hertz of the I3C functional clock. Used to calculate the baud rate divisors, filter widths, and timeout periods. 







void I3C_MasterDeinit(I3C_Type *base)#

Deinitializes the I3C master peripheral. 
This function disables the I3C master peripheral and gates the clock. It also performs a software reset to restore the peripheral to reset conditions.

Parameters:

base – The I3C peripheral base address. 







static inline void I3C_MasterEnable(I3C_Type *base, i3c_master_enable_t enable)#

Set I3C module master mode. 

Parameters:

base – The I3C peripheral base address. 
enable – Enable master mode. 







status_t I3C_MasterCheckAndClearError(I3C_Type *base, uint32_t status)#





status_t I3C_MasterWaitForCtrlDone(I3C_Type *base, bool waitIdle)#





status_t I3C_CheckForBusyBus(I3C_Type *base)#





void I3C_SlaveGetDefaultConfig(i3c_slave_config_t *slaveConfig)#

Provides a default configuration for the I3C slave peripheral. 
This function provides the following default configuration for the I3C slave peripheral: 
slaveConfig->enableslave             = true;



After calling this function, you can override any settings in order to customize the configuration, prior to initializing the slave driver with I3C_SlaveInit().

Parameters:

slaveConfig – [out] User provided configuration structure for default values. Refer to i3c_slave_config_t. 







void I3C_SlaveInit(I3C_Type *base, const i3c_slave_config_t *slaveConfig, uint32_t slowClock_Hz)#

Initializes the I3C slave peripheral. 
This function enables the peripheral clock and initializes the I3C slave peripheral as described by the user provided configuration.

Parameters:

base – The I3C peripheral base address. 
slaveConfig – User provided peripheral configuration. Use I3C_SlaveGetDefaultConfig() to get a set of defaults that you can override. 
slowClock_Hz – Frequency in Hertz of the I3C slow clock. Used to calculate the bus match condition values. If FSL_FEATURE_I3C_HAS_NO_SCONFIG_BAMATCH defines as 1, this parameter is useless. 







void I3C_SlaveDeinit(I3C_Type *base)#

Deinitializes the I3C slave peripheral. 
This function disables the I3C slave peripheral and gates the clock.

Parameters:

base – The I3C peripheral base address. 







static inline void I3C_SlaveEnable(I3C_Type *base, bool isEnable)#

Enable/Disable Slave. 

Parameters:

base – The I3C peripheral base address. 
isEnable – Enable or disable. 







static inline uint32_t I3C_MasterGetStatusFlags(I3C_Type *base)#

Gets the I3C master status flags. 
A bit mask with the state of all I3C master status flags is returned. For each flag, the corresponding bit in the return value is set if the flag is asserted.

See also
_i3c_master_flags



Parameters:

base – The I3C peripheral base address. 


Returns:
State of the status flags:

1: related status flag is set.
0: related status flag is not set. 








static inline void I3C_MasterClearStatusFlags(I3C_Type *base, uint32_t statusMask)#

Clears the I3C master status flag state. 
The following status register flags can be cleared:

kI3C_MasterSlaveStartFlag
kI3C_MasterControlDoneFlag
kI3C_MasterCompleteFlag
kI3C_MasterArbitrationWonFlag
kI3C_MasterSlave2MasterFlag


Attempts to clear other flags has no effect.

See also
_i3c_master_flags. 



Parameters:

base – The I3C peripheral base address. 
statusMask – A bitmask of status flags that are to be cleared. The mask is composed of _i3c_master_flags enumerators OR’d together. You may pass the result of a previous call to I3C_MasterGetStatusFlags(). 







static inline uint32_t I3C_MasterGetErrorStatusFlags(I3C_Type *base)#

Gets the I3C master error status flags. 
A bit mask with the state of all I3C master error status flags is returned. For each flag, the corresponding bit in the return value is set if the flag is asserted.

See also
_i3c_master_error_flags



Parameters:

base – The I3C peripheral base address. 


Returns:
State of the error status flags:

1: related status flag is set.
0: related status flag is not set. 








static inline void I3C_MasterClearErrorStatusFlags(I3C_Type *base, uint32_t statusMask)#

Clears the I3C master error status flag state. 

See also
_i3c_master_error_flags. 



Parameters:

base – The I3C peripheral base address. 
statusMask – A bitmask of error status flags that are to be cleared. The mask is composed of _i3c_master_error_flags enumerators OR’d together. You may pass the result of a previous call to I3C_MasterGetStatusFlags(). 







i3c_master_state_t I3C_MasterGetState(I3C_Type *base)#

Gets the I3C master state. 

Parameters:

base – The I3C peripheral base address. 


Returns:
I3C master state. 






static inline uint32_t I3C_SlaveGetStatusFlags(I3C_Type *base)#

Gets the I3C slave status flags. 
A bit mask with the state of all I3C slave status flags is returned. For each flag, the corresponding bit in the return value is set if the flag is asserted.

See also
_i3c_slave_flags



Parameters:

base – The I3C peripheral base address. 


Returns:
State of the status flags:

1: related status flag is set.
0: related status flag is not set. 








static inline void I3C_SlaveClearStatusFlags(I3C_Type *base, uint32_t statusMask)#

Clears the I3C slave status flag state. 
The following status register flags can be cleared:

kI3C_SlaveBusStartFlag
kI3C_SlaveMatchedFlag
kI3C_SlaveBusStopFlag


Attempts to clear other flags has no effect.

See also
_i3c_slave_flags. 



Parameters:

base – The I3C peripheral base address. 
statusMask – A bitmask of status flags that are to be cleared. The mask is composed of _i3c_slave_flags enumerators OR’d together. You may pass the result of a previous call to I3C_SlaveGetStatusFlags(). 







static inline uint32_t I3C_SlaveGetErrorStatusFlags(I3C_Type *base)#

Gets the I3C slave error status flags. 
A bit mask with the state of all I3C slave error status flags is returned. For each flag, the corresponding bit in the return value is set if the flag is asserted.

See also
_i3c_slave_error_flags



Parameters:

base – The I3C peripheral base address. 


Returns:
State of the error status flags:

1: related status flag is set.
0: related status flag is not set. 








static inline void I3C_SlaveClearErrorStatusFlags(I3C_Type *base, uint32_t statusMask)#

Clears the I3C slave error status flag state. 

See also
_i3c_slave_error_flags. 



Parameters:

base – The I3C peripheral base address. 
statusMask – A bitmask of error status flags that are to be cleared. The mask is composed of _i3c_slave_error_flags enumerators OR’d together. You may pass the result of a previous call to I3C_SlaveGetErrorStatusFlags(). 







i3c_slave_activity_state_t I3C_SlaveGetActivityState(I3C_Type *base)#

Gets the I3C slave state. 

Parameters:

base – The I3C peripheral base address. 


Returns:
I3C slave activity state, refer i3c_slave_activity_state_t. 






status_t I3C_SlaveCheckAndClearError(I3C_Type *base, uint32_t status)#





static inline void I3C_MasterEnableInterrupts(I3C_Type *base, uint32_t interruptMask)#

Enables the I3C master interrupt requests. 
All flags except kI3C_MasterBetweenFlag and kI3C_MasterNackDetectFlag can be enabled as interrupts.

Parameters:

base – The I3C peripheral base address. 
interruptMask – Bit mask of interrupts to enable. See _i3c_master_flags for the set of constants that should be OR’d together to form the bit mask. 







static inline void I3C_MasterDisableInterrupts(I3C_Type *base, uint32_t interruptMask)#

Disables the I3C master interrupt requests. 
All flags except kI3C_MasterBetweenFlag and kI3C_MasterNackDetectFlag can be enabled as interrupts.

Parameters:

base – The I3C peripheral base address. 
interruptMask – Bit mask of interrupts to disable. See _i3c_master_flags for the set of constants that should be OR’d together to form the bit mask. 







static inline uint32_t I3C_MasterGetEnabledInterrupts(I3C_Type *base)#

Returns the set of currently enabled I3C master interrupt requests. 

Parameters:

base – The I3C peripheral base address. 


Returns:
A bitmask composed of _i3c_master_flags enumerators OR’d together to indicate the set of enabled interrupts. 






static inline uint32_t I3C_MasterGetPendingInterrupts(I3C_Type *base)#

Returns the set of pending I3C master interrupt requests. 

Parameters:

base – The I3C peripheral base address. 


Returns:
A bitmask composed of _i3c_master_flags enumerators OR’d together to indicate the set of pending interrupts. 






static inline void I3C_SlaveEnableInterrupts(I3C_Type *base, uint32_t interruptMask)#

Enables the I3C slave interrupt requests. 
Only below flags can be enabled as interrupts.

kI3C_SlaveBusStartFlag
kI3C_SlaveMatchedFlag
kI3C_SlaveBusStopFlag
kI3C_SlaveRxReadyFlag
kI3C_SlaveTxReadyFlag
kI3C_SlaveDynamicAddrChangedFlag
kI3C_SlaveReceivedCCCFlag
kI3C_SlaveErrorFlag
kI3C_SlaveHDRCommandMatchFlag
kI3C_SlaveCCCHandledFlag
kI3C_SlaveEventSentFlag



Parameters:

base – The I3C peripheral base address. 
interruptMask – Bit mask of interrupts to enable. See _i3c_slave_flags for the set of constants that should be OR’d together to form the bit mask. 







static inline void I3C_SlaveDisableInterrupts(I3C_Type *base, uint32_t interruptMask)#

Disables the I3C slave interrupt requests. 
Only below flags can be disabled as interrupts.

kI3C_SlaveBusStartFlag
kI3C_SlaveMatchedFlag
kI3C_SlaveBusStopFlag
kI3C_SlaveRxReadyFlag
kI3C_SlaveTxReadyFlag
kI3C_SlaveDynamicAddrChangedFlag
kI3C_SlaveReceivedCCCFlag
kI3C_SlaveErrorFlag
kI3C_SlaveHDRCommandMatchFlag
kI3C_SlaveCCCHandledFlag
kI3C_SlaveEventSentFlag



Parameters:

base – The I3C peripheral base address. 
interruptMask – Bit mask of interrupts to disable. See _i3c_slave_flags for the set of constants that should be OR’d together to form the bit mask. 







static inline uint32_t I3C_SlaveGetEnabledInterrupts(I3C_Type *base)#

Returns the set of currently enabled I3C slave interrupt requests. 

Parameters:

base – The I3C peripheral base address. 


Returns:
A bitmask composed of _i3c_slave_flags enumerators OR’d together to indicate the set of enabled interrupts. 






static inline uint32_t I3C_SlaveGetPendingInterrupts(I3C_Type *base)#

Returns the set of pending I3C slave interrupt requests. 

Parameters:

base – The I3C peripheral base address. 


Returns:
A bitmask composed of _i3c_slave_flags enumerators OR’d together to indicate the set of pending interrupts. 






static inline void I3C_MasterEnableDMA(I3C_Type *base, bool enableTx, bool enableRx, uint32_t width)#

Enables or disables I3C master DMA requests. 

Parameters:

base – The I3C peripheral base address. 
enableTx – Enable flag for transmit DMA request. Pass true for enable, false for disable. 
enableRx – Enable flag for receive DMA request. Pass true for enable, false for disable. 
width – DMA read/write unit in bytes. 







static inline uint32_t I3C_MasterGetTxFifoAddress(I3C_Type *base, uint32_t width)#

Gets I3C master transmit data register address for DMA transfer. 

Parameters:

base – The I3C peripheral base address. 
width – DMA read/write unit in bytes. 


Returns:
The I3C Master Transmit Data Register address. 






static inline uint32_t I3C_MasterGetRxFifoAddress(I3C_Type *base, uint32_t width)#

Gets I3C master receive data register address for DMA transfer. 

Parameters:

base – The I3C peripheral base address. 
width – DMA read/write unit in bytes. 


Returns:
The I3C Master Receive Data Register address. 






static inline void I3C_SlaveEnableDMA(I3C_Type *base, bool enableTx, bool enableRx, uint32_t width)#

Enables or disables I3C slave DMA requests. 

Parameters:

base – The I3C peripheral base address. 
enableTx – Enable flag for transmit DMA request. Pass true for enable, false for disable. 
enableRx – Enable flag for receive DMA request. Pass true for enable, false for disable. 
width – DMA read/write unit in bytes. 







static inline uint32_t I3C_SlaveGetTxFifoAddress(I3C_Type *base, uint32_t width)#

Gets I3C slave transmit data register address for DMA transfer. 

Parameters:

base – The I3C peripheral base address. 
width – DMA read/write unit in bytes. 


Returns:
The I3C Slave Transmit Data Register address. 






static inline uint32_t I3C_SlaveGetRxFifoAddress(I3C_Type *base, uint32_t width)#

Gets I3C slave receive data register address for DMA transfer. 

Parameters:

base – The I3C peripheral base address. 
width – DMA read/write unit in bytes. 


Returns:
The I3C Slave Receive Data Register address. 






static inline void I3C_MasterSetWatermarks(I3C_Type *base, i3c_tx_trigger_level_t txLvl, i3c_rx_trigger_level_t rxLvl, bool flushTx, bool flushRx)#

Sets the watermarks for I3C master FIFOs. 

Parameters:

base – The I3C peripheral base address. 
txLvl – Transmit FIFO watermark level. The kI3C_MasterTxReadyFlag flag is set whenever the number of words in the transmit FIFO reaches txLvl. 
rxLvl – Receive FIFO watermark level. The kI3C_MasterRxReadyFlag flag is set whenever the number of words in the receive FIFO reaches rxLvl. 
flushTx – true if TX FIFO is to be cleared, otherwise TX FIFO remains unchanged. 
flushRx – true if RX FIFO is to be cleared, otherwise RX FIFO remains unchanged. 







static inline void I3C_MasterGetFifoCounts(I3C_Type *base, size_t *rxCount, size_t *txCount)#

Gets the current number of bytes in the I3C master FIFOs. 

Parameters:

base – The I3C peripheral base address. 
txCount – [out] Pointer through which the current number of bytes in the transmit FIFO is returned. Pass NULL if this value is not required. 
rxCount – [out] Pointer through which the current number of bytes in the receive FIFO is returned. Pass NULL if this value is not required. 







static inline void I3C_SlaveSetWatermarks(I3C_Type *base, i3c_tx_trigger_level_t txLvl, i3c_rx_trigger_level_t rxLvl, bool flushTx, bool flushRx)#

Sets the watermarks for I3C slave FIFOs. 

Parameters:

base – The I3C peripheral base address. 
txLvl – Transmit FIFO watermark level. The kI3C_SlaveTxReadyFlag flag is set whenever the number of words in the transmit FIFO reaches txLvl. 
rxLvl – Receive FIFO watermark level. The kI3C_SlaveRxReadyFlag flag is set whenever the number of words in the receive FIFO reaches rxLvl. 
flushTx – true if TX FIFO is to be cleared, otherwise TX FIFO remains unchanged. 
flushRx – true if RX FIFO is to be cleared, otherwise RX FIFO remains unchanged. 







static inline void I3C_SlaveGetFifoCounts(I3C_Type *base, size_t *rxCount, size_t *txCount)#

Gets the current number of bytes in the I3C slave FIFOs. 

Parameters:

base – The I3C peripheral base address. 
txCount – [out] Pointer through which the current number of bytes in the transmit FIFO is returned. Pass NULL if this value is not required. 
rxCount – [out] Pointer through which the current number of bytes in the receive FIFO is returned. Pass NULL if this value is not required. 







void I3C_MasterSetBaudRate(I3C_Type *base, const i3c_baudrate_hz_t *baudRate_Hz, uint32_t sourceClock_Hz)#

Sets the I3C bus frequency for master transactions. 
The I3C master is automatically disabled and re-enabled as necessary to configure the baud rate. Do not call this function during a transfer, or the transfer is aborted.

Note
On devices affected by I3C errata ERR053429, an SDR read with PPBAUD < 2 can lose the last received byte when the RxFIFO fills before the CPU/DMA services it. For safe SDR reads, request a push-pull baud that yields PPBAUD > 1, or guarantee the CPU/DMA drains the RxFIFO fast enough to avoid a Full event.


Parameters:

base – The I3C peripheral base address. 
baudRate_Hz – Pointer to structure of requested bus frequency in Hertz. 
sourceClock_Hz – I3C functional clock frequency in Hertz. 







status_t I3C_MasterGetI2CPresetTiming(i3c_legacy_i2c_speed_mode_t speed, i3c_master_src_clk_t srcClk, i3c_timing_t *timing)#

Get prevalidated timing values for supported I2C speed. 

Parameters:

speed – [in] I2C Speed mode. 
srcClk – [in] FCLK source clock. 
timing – [out] Prevalidated timing values. Valid when kStatus_Success is returned. 


Returns:
kStatus_Success A supported preset timing is found. kStatus_Fail The requested timing is not supported. 






status_t I3C_MasterCalcTiming(const i3c_master_baudrate_config_t *baudRate, uint32_t sourceClock_Hz, i3c_timing_t *timing)#

Calculate timing from desired baud rates. 

Parameters:

baudRate – [in] Desired baud rates and bus configuration. 
sourceClock_Hz – [in] Master peripheral clock (FCLK) frequency in Hz. 
timing – [out] I3C timing register field values. Valid only when kStatus_Success is returned. 


Returns:
kStatus_Success Target rate is achieved. kStatus_Fail Target rate isn’t achieved. 






void I3C_MasterSetTiming(I3C_Type *base, const i3c_timing_t *timing)#

Set I3C timing parameters. 

Parameters:

base – I3C peripheral base address. 
timing – Pre-calculated timing values. 







static inline bool I3C_MasterGetBusIdleState(I3C_Type *base)#

Returns whether the bus is idle. 
Requires the master mode to be enabled. 

Parameters:

base – The I3C peripheral base address. 


Return values:

true – Bus is busy. 
false – Bus is idle. 







status_t I3C_MasterStartWithRxSize(I3C_Type *base, i3c_bus_type_t type, uint8_t address, i3c_direction_t dir, uint8_t rxSize)#

Sends a START signal and slave address on the I2C/I3C bus, receive size is also specified in the call. 
This function is used to initiate a new master mode transfer. First, the bus state is checked to ensure that another master is not occupying the bus. Then a START signal is transmitted, followed by the 7-bit address specified in the a address parameter. Note that this function does not actually wait until the START and address are successfully sent on the bus before returning.

Parameters:

base – The I3C peripheral base address. 
type – The bus type to use in this transaction. 
address – 7-bit slave device address, in bits [6:0]. 
dir – Master transfer direction, either kI3C_Read or kI3C_Write. This parameter is used to set the R/w bit (bit 0) in the transmitted slave address. 
rxSize – Read terminate size for the followed read transfer, limit to 255 bytes. 


Return values:

kStatus_Success – START signal and address were successfully enqueued in the transmit FIFO. 
kStatus_I3C_Busy – Another master is currently utilizing the bus. 







status_t I3C_MasterStart(I3C_Type *base, i3c_bus_type_t type, uint8_t address, i3c_direction_t dir)#

Sends a START signal and slave address on the I2C/I3C bus. 
This function is used to initiate a new master mode transfer. First, the bus state is checked to ensure that another master is not occupying the bus. Then a START signal is transmitted, followed by the 7-bit address specified in the address parameter. Note that this function does not actually wait until the START and address are successfully sent on the bus before returning.

Parameters:

base – The I3C peripheral base address. 
type – The bus type to use in this transaction. 
address – 7-bit slave device address, in bits [6:0]. 
dir – Master transfer direction, either kI3C_Read or kI3C_Write. This parameter is used to set the R/w bit (bit 0) in the transmitted slave address. 


Return values:

kStatus_Success – START signal and address were successfully enqueued in the transmit FIFO. 
kStatus_I3C_Busy – Another master is currently utilizing the bus. 







status_t I3C_MasterRepeatedStartWithRxSize(I3C_Type *base, i3c_bus_type_t type, uint8_t address, i3c_direction_t dir, uint8_t rxSize)#

Sends a repeated START signal and slave address on the I2C/I3C bus, receive size is also specified in the call. 
This function is used to send a Repeated START signal when a transfer is already in progress. Like I3C_MasterStart(), it also sends the specified 7-bit address. Call this API also configures the read terminate size for the following read transfer. For example, set the rxSize = 2, the following read transfer will be terminated after two bytes of data received. Write transfer will not be affected by the rxSize configuration.

Note
This function exists primarily to maintain compatible APIs between I3C and I2C drivers, as well as to better document the intent of code that uses these APIs.


Parameters:

base – The I3C peripheral base address. 
type – The bus type to use in this transaction. 
address – 7-bit slave device address, in bits [6:0]. 
dir – Master transfer direction, either kI3C_Read or kI3C_Write. This parameter is used to set the R/w bit (bit 0) in the transmitted slave address. 
rxSize – Read terminate size for the followed read transfer, limit to 255 bytes. 


Return values:
kStatus_Success – Repeated START signal and address were successfully enqueued in the transmit FIFO. 






static inline status_t I3C_MasterRepeatedStart(I3C_Type *base, i3c_bus_type_t type, uint8_t address, i3c_direction_t dir)#

Sends a repeated START signal and slave address on the I2C/I3C bus. 
This function is used to send a Repeated START signal when a transfer is already in progress. Like I3C_MasterStart(), it also sends the specified 7-bit address.

Note
This function exists primarily to maintain compatible APIs between I3C and I2C drivers, as well as to better document the intent of code that uses these APIs.


Parameters:

base – The I3C peripheral base address. 
type – The bus type to use in this transaction. 
address – 7-bit slave device address, in bits [6:0]. 
dir – Master transfer direction, either kI3C_Read or kI3C_Write. This parameter is used to set the R/w bit (bit 0) in the transmitted slave address. 


Return values:
kStatus_Success – Repeated START signal and address were successfully enqueued in the transmit FIFO. 






status_t I3C_MasterSend(I3C_Type *base, const void *txBuff, size_t txSize, uint32_t flags)#

Performs a polling send transfer on the I2C/I3C bus. 
Sends up to txSize number of bytes to the previously addressed slave device. The slave may reply with a NAK to any byte in order to terminate the transfer early. If this happens, this function returns kStatus_I3C_Nak.

Parameters:

base – The I3C peripheral base address. 
txBuff – The pointer to the data to be transferred. 
txSize – The length in bytes of the data to be transferred. 
flags – Bit mask of options for the transfer. See enumeration _i3c_master_transfer_flags for available options. 


Return values:

kStatus_Success – Data was sent successfully. 
kStatus_I3C_Busy – Another master is currently utilizing the bus. 
kStatus_I3C_Timeout – The module has stalled too long in a frame. 
kStatus_I3C_Nak – The slave device sent a NAK in response to an address. 
kStatus_I3C_WriteAbort – The slave device sent a NAK in response to a write. 
kStatus_I3C_MsgError – Message SDR/DDR mismatch or read/write message in wrong state. 
kStatus_I3C_WriteFifoError – Write to M/SWDATAB register when FIFO full. 
kStatus_I3C_InvalidReq – Invalid use of request. 







status_t I3C_MasterReceive(I3C_Type *base, void *rxBuff, size_t rxSize, uint32_t flags)#

Performs a polling receive transfer on the I2C/I3C bus. 

Parameters:

base – The I3C peripheral base address. 
rxBuff – The pointer to the data to be transferred. 
rxSize – The length in bytes of the data to be transferred. 
flags – Bit mask of options for the transfer. See enumeration _i3c_master_transfer_flags for available options. 


Return values:

kStatus_Success – Data was received successfully. 
kStatus_I3C_Busy – Another master is currently utilizing the bus. 
kStatus_I3C_Timeout – The module has stalled too long in a frame. 
kStatus_I3C_Term – The master terminates slave read. 
kStatus_I3C_HdrParityError – Parity error from DDR read. 
kStatus_I3C_CrcError – CRC error from DDR read. 
kStatus_I3C_MsgError – Message SDR/DDR mismatch or read/write message in wrong state. 
kStatus_I3C_ReadFifoError – Read from M/SRDATAB register when FIFO empty. 
kStatus_I3C_InvalidReq – Invalid use of request. 







status_t I3C_MasterStop(I3C_Type *base)#

Sends a STOP signal on the I2C/I3C bus. 
This function does not return until the STOP signal is seen on the bus, or an error occurs.

Parameters:

base – The I3C peripheral base address. 


Return values:

kStatus_Success – The STOP signal was successfully sent on the bus and the transaction terminated. 
kStatus_I3C_Busy – Another master is currently utilizing the bus. 
kStatus_I3C_Timeout – The module has stalled too long in a frame. 
kStatus_I3C_InvalidReq – Invalid use of request. 







void I3C_MasterEmitRequest(I3C_Type *base, i3c_bus_request_t masterReq)#

I3C master emit request. 

Parameters:

base – The I3C peripheral base address. 
masterReq – I3C master request of type i3c_bus_request_t







static inline void I3C_MasterEmitIBIResponse(I3C_Type *base, i3c_ibi_response_t ibiResponse)#

I3C master emit request. 

Parameters:

base – The I3C peripheral base address. 
ibiResponse – I3C master emit IBI response of type i3c_ibi_response_t







void I3C_MasterRegisterIBI(I3C_Type *base, i3c_register_ibi_addr_t *ibiRule)#

I3C master register IBI rule. 

Parameters:

base – The I3C peripheral base address. 
ibiRule – Pointer to ibi rule description of type i3c_register_ibi_addr_t







void I3C_MasterGetIBIRules(I3C_Type *base, i3c_register_ibi_addr_t *ibiRule)#

I3C master get IBI rule. 

Parameters:

base – The I3C peripheral base address. 
ibiRule – Pointer to store the read out ibi rule description. 







i3c_ibi_type_t I3C_GetIBIType(I3C_Type *base)#

I3C master get IBI Type. 

Parameters:

base – The I3C peripheral base address. 


Return values:
i3c_ibi_type_t – Type of i3c_ibi_type_t. 






static inline uint8_t I3C_GetIBIAddress(I3C_Type *base)#

I3C master get IBI Address. 

Parameters:

base – The I3C peripheral base address. 


Return values:
The – 8-bit IBI address. 






status_t I3C_MasterProcessDAASpecifiedBaudrate(I3C_Type *base, uint8_t *addressList, uint32_t count, i3c_master_daa_baudrate_t *daaBaudRate)#

Performs a DAA in the i3c bus with specified temporary baud rate. 

Parameters:

base – The I3C peripheral base address. 
addressList – The pointer for address list which is used to do DAA. 
count – The address count in the address list. 
daaBaudRate – The temporary baud rate in DAA process, NULL for using initial setting. The initial setting is set back between the completion of the DAA and the return of this function. 


Return values:

kStatus_Success – The transaction was started successfully. 
kStatus_I3C_Busy – Either another master is currently utilizing the bus, or a non-blocking transaction is already in progress. 
kStatus_I3C_SlaveCountExceed – The I3C slave count has exceed the definition in I3C_MAX_DEVCNT. 







static inline status_t I3C_MasterProcessDAA(I3C_Type *base, uint8_t *addressList, uint32_t count)#

Performs a DAA in the i3c bus. 

Parameters:

base – The I3C peripheral base address. 
addressList – The pointer for address list which is used to do DAA. 
count – The address count in the address list. The initial setting is set back between the completion of the DAA and the return of this function. 


Return values:

kStatus_Success – The transaction was started successfully. 
kStatus_I3C_Busy – Either another master is currently utilizing the bus, or a non-blocking transaction is already in progress. 
kStatus_I3C_SlaveCountExceed – The I3C slave count has exceed the definition in I3C_MAX_DEVCNT. 







i3c_device_info_t *I3C_MasterGetDeviceListAfterDAA(I3C_Type *base, uint8_t *count)#

Get device information list after DAA process is done. 

Parameters:

base – The I3C peripheral base address. 
count – [out] The pointer to store the available device count. 


Returns:
Pointer to the i3c_device_info_t array. 






void I3C_MasterClearDeviceCount(I3C_Type *base)#

Clear the global device count which represents current devices number on the bus. When user resets all dynamic addresses on the bus, should call this API. 

Parameters:

base – The I3C peripheral base address. 







status_t I3C_MasterTransferBlocking(I3C_Type *base, i3c_master_transfer_t *transfer)#

Performs a master polling transfer on the I2C/I3C bus. 

Note
The API does not return until the transfer succeeds or fails due to error happens during transfer.


Parameters:

base – The I3C peripheral base address. 
transfer – Pointer to the transfer structure. 


Return values:

kStatus_Success – Data was received successfully. 
kStatus_I3C_Busy – Another master is currently utilizing the bus. 
kStatus_I3C_IBIWon – The I3C slave event IBI or MR or HJ won the arbitration on a header address. 
kStatus_I3C_Timeout – The module has stalled too long in a frame. 
kStatus_I3C_Nak – The slave device sent a NAK in response to an address. 
kStatus_I3C_WriteAbort – The slave device sent a NAK in response to a write. 
kStatus_I3C_Term – The master terminates slave read. 
kStatus_I3C_HdrParityError – Parity error from DDR read. 
kStatus_I3C_CrcError – CRC error from DDR read. 
kStatus_I3C_MsgError – Message SDR/DDR mismatch or read/write message in wrong state. 
kStatus_I3C_ReadFifoError – Read from M/SRDATAB register when FIFO empty. 
kStatus_I3C_WriteFifoError – Write to M/SWDATAB register when FIFO full. 
kStatus_I3C_InvalidReq – Invalid use of request. 







status_t I3C_SlaveSend(I3C_Type *base, const void *txBuff, size_t txSize)#

Performs a polling send transfer on the I3C bus. 

Parameters:

base – The I3C peripheral base address. 
txBuff – The pointer to the data to be transferred. 
txSize – The length in bytes of the data to be transferred. 


Returns:
Error or success status returned by API. 






status_t I3C_SlaveReceive(I3C_Type *base, void *rxBuff, size_t rxSize)#

Performs a polling receive transfer on the I3C bus. 

Parameters:

base – The I3C peripheral base address. 
rxBuff – The pointer to the data to be transferred. 
rxSize – The length in bytes of the data to be transferred. 


Returns:
Error or success status returned by API. 






void I3C_MasterTransferCreateHandle(I3C_Type *base, i3c_master_handle_t *handle, const i3c_master_transfer_callback_t *callback, void *userData)#

Creates a new handle for the I3C master non-blocking APIs. 
The creation of a handle is for use with the non-blocking APIs. Once a handle is created, there is not a corresponding destroy handle. If the user wants to terminate a transfer, the I3C_MasterTransferAbort() API shall be called.

Note
The function also enables the NVIC IRQ for the input I3C. Need to notice that on some SoCs the I3C IRQ is connected to INTMUX, in this case user needs to enable the associated INTMUX IRQ in application.


Parameters:

base – The I3C peripheral base address. 
handle – [out] Pointer to the I3C master driver handle. 
callback – User provided pointer to the asynchronous callback function. 
userData – User provided pointer to the application callback data. 







status_t I3C_MasterTransferNonBlocking(I3C_Type *base, i3c_master_handle_t *handle, i3c_master_transfer_t *transfer)#

Performs a non-blocking transaction on the I2C/I3C bus. 

Parameters:

base – The I3C peripheral base address. 
handle – Pointer to the I3C master driver handle. 
transfer – The pointer to the transfer descriptor. 


Return values:

kStatus_Success – The transaction was started successfully. 
kStatus_I3C_Busy – Either another master is currently utilizing the bus, or a non-blocking transaction is already in progress. 







status_t I3C_MasterTransferGetCount(I3C_Type *base, i3c_master_handle_t *handle, size_t *count)#

Returns number of bytes transferred so far. 

Parameters:

base – The I3C peripheral base address. 
handle – Pointer to the I3C master driver handle. 
count – [out] Number of bytes transferred so far by the non-blocking transaction. 


Return values:

kStatus_Success – 
kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress. 







void I3C_MasterTransferAbort(I3C_Type *base, i3c_master_handle_t *handle)#

Terminates a non-blocking I3C master transmission early. 

Note
It is not safe to call this function from an IRQ handler that has a higher priority than the I3C peripheral’s IRQ priority.


Parameters:

base – The I3C peripheral base address. 
handle – Pointer to the I3C master driver handle. 







void I3C_MasterTransferHandleIRQ(I3C_Type *base, void *intHandle)#

Reusable routine to handle master interrupts. 

Note
This function does not need to be called unless you are reimplementing the nonblocking API’s interrupt handler routines to add special functionality. 


Parameters:

base – The I3C peripheral base address. 
intHandle – Pointer to the I3C master driver handle. 







void I3C_DriverIRQHandler(uint32_t instance)#

Common IRQ handler entry for all I3C instances. 
This function dispatches the IRQ to the correct instance handler using the instance index.

Parameters:

instance – I3C instance number. 







enum _i3c_master_flags#

I3C master peripheral flags. 
The following status register flags can be cleared:

kI3C_MasterSlaveStartFlag
kI3C_MasterControlDoneFlag
kI3C_MasterCompleteFlag
kI3C_MasterArbitrationWonFlag
kI3C_MasterSlave2MasterFlag


All flags except kI3C_MasterBetweenFlag and kI3C_MasterNackDetectFlag can be enabled as interrupts.

Note
These enums are meant to be OR’d together to form a bit mask. 

Values:


enumerator kI3C_MasterBetweenFlag#

Between messages/DAAs flag 




enumerator kI3C_MasterNackDetectFlag#

NACK detected flag 




enumerator kI3C_MasterSlaveStartFlag#

Slave request start flag 




enumerator kI3C_MasterControlDoneFlag#

Master request complete flag 




enumerator kI3C_MasterCompleteFlag#

Transfer complete flag 




enumerator kI3C_MasterRxReadyFlag#

Rx data ready in Rx buffer flag 




enumerator kI3C_MasterTxReadyFlag#

Tx buffer ready for Tx data flag 




enumerator kI3C_MasterArbitrationWonFlag#

Header address won arbitration flag 




enumerator kI3C_MasterErrorFlag#

Error occurred flag 




enumerator kI3C_MasterSlave2MasterFlag#

Switch from slave to master flag 




enumerator kI3C_MasterClearFlags#







enum _i3c_master_error_flags#

I3C master error flags to indicate the causes. 

Note
These enums are meant to be OR’d together to form a bit mask. 

Values:


enumerator kI3C_MasterErrorNackFlag#

Slave NACKed the last address 




enumerator kI3C_MasterErrorWriteAbortFlag#

Slave NACKed the write data 




enumerator kI3C_MasterErrorParityFlag#

Parity error from DDR read 




enumerator kI3C_MasterErrorCrcFlag#

CRC error from DDR read 




enumerator kI3C_MasterErrorReadFlag#

Read from MRDATAB register when FIFO empty 




enumerator kI3C_MasterErrorWriteFlag#

Write to MWDATAB register when FIFO full 




enumerator kI3C_MasterErrorMsgFlag#

Message SDR/DDR mismatch or read/write message in wrong state 




enumerator kI3C_MasterErrorInvalidReqFlag#

Invalid use of request 




enumerator kI3C_MasterErrorTimeoutFlag#

The module has stalled too long in a frame 




enumerator kI3C_MasterAllErrorFlags#

All error flags 






enum _i3c_master_state#

I3C working master state. 
Values:


enumerator kI3C_MasterStateIdle#

Bus stopped. 




enumerator kI3C_MasterStateSlvReq#

Bus stopped but slave holding SDA low. 




enumerator kI3C_MasterStateMsgSdr#

In SDR Message mode from using MWMSG_SDR. 




enumerator kI3C_MasterStateNormAct#

In normal active SDR mode. 




enumerator kI3C_MasterStateDdr#

In DDR Message mode. 




enumerator kI3C_MasterStateDaa#

In ENTDAA mode. 




enumerator kI3C_MasterStateIbiAck#

Waiting on IBI ACK/NACK decision. 




enumerator kI3C_MasterStateIbiRcv#

Receiving IBI. 






enum _i3c_master_enable#

I3C master enable configuration. 
Values:


enumerator kI3C_MasterOff#

Master off. 




enumerator kI3C_MasterOn#

Master on. 




enumerator kI3C_MasterCapable#

Master capable. 






enum _i3c_master_hkeep#

I3C high keeper configuration. 
Values:


enumerator kI3C_MasterHighKeeperNone#

Use PUR to hold SCL high. 




enumerator kI3C_MasterHighKeeperWiredIn#

Use pin_HK controls. 




enumerator kI3C_MasterPassiveSDA#

Hi-Z for Bus Free and hold SDA. 




enumerator kI3C_MasterPassiveSDASCL#

Hi-Z both for Bus Free, and can Hi-Z SDA for hold. 






enum _i3c_bus_request#

Emits the requested operation when doing in pieces vs. by message. 
Values:


enumerator kI3C_RequestNone#

No request. 




enumerator kI3C_RequestEmitStartAddr#

Request to emit start and address on bus. 




enumerator kI3C_RequestEmitStop#

Request to emit stop on bus. 




enumerator kI3C_RequestIbiAckNack#

Manual IBI ACK or NACK. 




enumerator kI3C_RequestProcessDAA#

Process DAA. 




enumerator kI3C_RequestForceExit#

Request to force exit. 




enumerator kI3C_RequestAutoIbi#

Hold in stopped state, but Auto-emit START,7E. 






enum _i3c_bus_type#

Bus type with EmitStartAddr. 
Values:


enumerator kI3C_TypeI3CSdr#

SDR mode of I3C. 




enumerator kI3C_TypeI2C#

Standard i2c protocol. 




enumerator kI3C_TypeI3CDdr#

HDR-DDR mode of I3C. 






enum _i3c_ibi_response#

IBI response. 
Values:


enumerator kI3C_IbiRespAck#

ACK with no mandatory byte. 




enumerator kI3C_IbiRespNack#

NACK. 




enumerator kI3C_IbiRespAckMandatory#

ACK with mandatory byte. 




enumerator kI3C_IbiRespManual#

Reserved. 






enum _i3c_ibi_type#

IBI type. 
Values:


enumerator kI3C_IbiNormal#

In-band interrupt. 




enumerator kI3C_IbiHotJoin#

slave hot join. 




enumerator kI3C_IbiMasterRequest#

slave master ship request. 






enum _i3c_ibi_state#

IBI state. 
Values:


enumerator kI3C_IbiReady#

In-band interrupt ready state, ready for user to handle. 




enumerator kI3C_IbiDataBuffNeed#

In-band interrupt need data buffer for data receive. 




enumerator kI3C_IbiAckNackPending#

In-band interrupt Ack/Nack pending for decision. 






enum _i3c_direction#

Direction of master and slave transfers. 
Values:


enumerator kI3C_Write#

Master transmit. 




enumerator kI3C_Read#

Master receive. 






enum _i3c_tx_trigger_level#

Watermark of TX int/dma trigger level. 
Values:


enumerator kI3C_TxTriggerOnEmpty#

Trigger on empty. 




enumerator kI3C_TxTriggerUntilOneQuarterOrLess#

Trigger on 1/4 full or less. 




enumerator kI3C_TxTriggerUntilOneHalfOrLess#

Trigger on 1/2 full or less. 




enumerator kI3C_TxTriggerUntilOneLessThanFull#

Trigger on 1 less than full or less. 






enum _i3c_rx_trigger_level#

Watermark of RX int/dma trigger level. 
Values:


enumerator kI3C_RxTriggerOnNotEmpty#

Trigger on not empty. 




enumerator kI3C_RxTriggerUntilOneQuarterOrMore#

Trigger on 1/4 full or more. 




enumerator kI3C_RxTriggerUntilOneHalfOrMore#

Trigger on 1/2 full or more. 




enumerator kI3C_RxTriggerUntilThreeQuarterOrMore#

Trigger on 3/4 full or more. 






enum _i3c_rx_term_ops#

I3C master read termination operations. 
Values:


enumerator kI3C_RxTermDisable#

Master doesn’t terminate read, used for CCC transfer. 




enumerator kI3C_RxAutoTerm#

Master auto terminate read after receiving specified bytes(<=255). 




enumerator kI3C_RxTermLastByte#

Master terminates read at any time after START, no length limitation. 






enum _i3c_start_scl_delay#

I3C start SCL delay options. 
Values:


enumerator kI3C_NoDelay#

No delay. 




enumerator kI3C_IncreaseSclHalfPeriod#

Increases SCL clock period by 1/2. 




enumerator kI3C_IncreaseSclOnePeriod#

Increases SCL clock period by 1. 




enumerator kI3C_IncreaseSclOneAndHalfPeriod#

Increases SCL clock period by 1 1/2 






enum _i3c_master_bus_mode#

I3C bus topology. Selects how the baud rate is calculated for the bus. 
Values:


enumerator kI3C_PureBus#

Only I3C devices on the bus. 




enumerator kI3C_MixedFastBus#

I3C and legacy I2C Fm/Fm+ devices share the bus. 




enumerator kI3C_LimitedBus#

I3C controller on a legacy I2C bus. 






enum _i3c_legacy_i2c_speed_mode#

Legacy I2C preset selector. 
Values:


enumerator kI3C_LegacyI2CStandardMode#

Reserved for future Standard-mode support. 




enumerator kI3C_LegacyI2CFastMode#

Legacy I2C Fast-mode preset. 




enumerator kI3C_LegacyI2CFastModePlus#

Legacy I2C Fast-mode Plus preset. 






enum _i3c_master_src_clk#

Validated source clock selector for I2C timing presets. 
Values:


enumerator kI3C_MasterSrcClk24M#

Use the validated 24 MHz timing table. 




enumerator kI3C_MasterSrcClk25M#

Use the validated 25 MHz timing table. 






enum _i3c_master_transfer_flags#

Transfer option flags. 

Note
These enumerations are intended to be OR’d together to form a bit mask of options for the _i3c_master_transfer::flags field. 

Values:


enumerator kI3C_TransferDefaultFlag#

Transfer starts with a start signal, stops with a stop signal. 




enumerator kI3C_TransferNoStartFlag#

Don’t send a start condition, address, and sub address 




enumerator kI3C_TransferRepeatedStartFlag#

Send a repeated start condition 




enumerator kI3C_TransferNoStopFlag#

Don’t send a stop condition. 




enumerator kI3C_TransferWordsFlag#

Transfer in words, else transfer in bytes. 




enumerator kI3C_TransferDisableRxTermFlag#

Disable Rx termination. Note: It’s for I3C CCC transfer. 




enumerator kI3C_TransferRxAutoTermFlag#

Set Rx auto-termination. Note: It’s adaptive based on Rx size(<=255 bytes) except in I3C_MasterReceive. 




enumerator kI3C_TransferStartWithBroadcastAddr#

Start transfer with 0x7E, then read/write data with device address. 






typedef enum _i3c_master_state i3c_master_state_t#

I3C working master state. 




typedef enum _i3c_master_enable i3c_master_enable_t#

I3C master enable configuration. 




typedef enum _i3c_master_hkeep i3c_master_hkeep_t#

I3C high keeper configuration. 




typedef enum _i3c_bus_request i3c_bus_request_t#

Emits the requested operation when doing in pieces vs. by message. 




typedef enum _i3c_bus_type i3c_bus_type_t#

Bus type with EmitStartAddr. 




typedef enum _i3c_ibi_response i3c_ibi_response_t#

IBI response. 




typedef enum _i3c_ibi_type i3c_ibi_type_t#

IBI type. 




typedef enum _i3c_ibi_state i3c_ibi_state_t#

IBI state. 




typedef enum _i3c_direction i3c_direction_t#

Direction of master and slave transfers. 




typedef enum _i3c_tx_trigger_level i3c_tx_trigger_level_t#

Watermark of TX int/dma trigger level. 




typedef enum _i3c_rx_trigger_level i3c_rx_trigger_level_t#

Watermark of RX int/dma trigger level. 




typedef enum _i3c_rx_term_ops i3c_rx_term_ops_t#

I3C master read termination operations. 




typedef enum _i3c_start_scl_delay i3c_start_scl_delay_t#

I3C start SCL delay options. 




typedef struct _i3c_register_ibi_addr i3c_register_ibi_addr_t#

Structure with setting master IBI rules and slave registry. 




typedef struct _i3c_baudrate i3c_baudrate_hz_t#

Structure with I3C baudrate settings. 




typedef struct _i3c_master_daa_baudrate i3c_master_daa_baudrate_t#

I3C DAA baud rate configuration. 




typedef enum _i3c_master_bus_mode i3c_master_bus_mode_t#

I3C bus topology. Selects how the baud rate is calculated for the bus. 




typedef enum _i3c_legacy_i2c_speed_mode i3c_legacy_i2c_speed_mode_t#

Legacy I2C preset selector. 




typedef enum _i3c_master_src_clk i3c_master_src_clk_t#

Validated source clock selector for I2C timing presets. 




typedef struct _i3c_master_baudrate_config i3c_master_baudrate_config_t#

I3C master baud rate configuration. 




typedef struct _i3c_timing i3c_timing_t#

Pre-calculated I3C MCONFIG timing fields. 
Pre-compute the timing at init, then switch with I3C_MasterSetTiming(). The actualXxxBaud fields report the rates the hardware achieves. 




typedef struct _i3c_master_config i3c_master_config_t#

Structure with settings to initialize the I3C master module. 
This structure holds configuration settings for the I3C peripheral. To initialize this structure to reasonable defaults, call the I3C_MasterGetDefaultConfig() function and pass a pointer to your configuration structure instance.
The configuration structure can be made constant so it resides in flash. 




typedef struct _i3c_master_transfer i3c_master_transfer_t#





typedef struct _i3c_master_handle i3c_master_handle_t#





typedef struct _i3c_master_transfer_callback i3c_master_transfer_callback_t#

i3c master callback functions. 




typedef void (*i3c_master_isr_t)(I3C_Type *base, void *handle)#

Typedef for master interrupt handler. 




struct _i3c_register_ibi_addr#


#include <fsl_i3c.h>
Structure with setting master IBI rules and slave registry. 

Public Members


uint8_t address[5]#

Address array for registry. 




bool i3cFastStart#

Allow the START header to run as push-pull speed if all dynamic addresses take MSB 0. 




bool ibiHasPayload#

Whether the address array has mandatory IBI byte. 







struct _i3c_baudrate#


#include <fsl_i3c.h>
Structure with I3C baudrate settings. 

Public Members


uint32_t i2cBaud#

Desired I2C baud rate in Hertz. 




uint32_t i3cPushPullBaud#

Desired I3C push-pull baud rate in Hertz. 




uint32_t i3cOpenDrainBaud#

Desired I3C open-drain baud rate in Hertz. 







struct _i3c_master_daa_baudrate#


#include <fsl_i3c.h>
I3C DAA baud rate configuration. 

Public Members


uint32_t sourceClock_Hz#

FCLK, function clock in Hertz. 




uint32_t i3cPushPullBaud#

Desired I3C push-pull baud rate in Hertz. 




uint32_t i3cOpenDrainBaud#

Desired I3C open-drain baud rate in Hertz. 







struct _i3c_master_baudrate_config#


#include <fsl_i3c.h>
I3C master baud rate configuration. 

Public Members


i3c_master_bus_mode_t busMode#

Bus topology. 




uint32_t i2cBaud#

Desired legacy I2C baud rate in Hz; 0 = do not program I2CBAUD. 




uint32_t i3cPushPullBaud#

Desired I3C push-pull SCL frequency in Hz. 




uint32_t i3cOpenDrainBaud#

Desired I3C open-drain SCL frequency in Hz. 




bool enableODHPP#

Open-drain HIGH shape: true = narrow (normal I3C frames), false = symmetric (required for the first-7Eh broadcast). 







struct _i3c_timing#


#include <fsl_i3c.h>
Pre-calculated I3C MCONFIG timing fields. 
Pre-compute the timing at init, then switch with I3C_MasterSetTiming(). The actualXxxBaud fields report the rates the hardware achieves. 

Public Members


uint8_t ppBaud#

MCONFIG[PPBAUD] field. 




uint8_t ppLow#

MCONFIG[PPLOW] field. 




uint8_t odBaud#

MCONFIG[ODBAUD] field (0 is forbidden). 




bool odHighPP#

MCONFIG[ODHPP] field. 




uint8_t i2cBaud#

MCONFIG[I2CBAUD] field. 




uint32_t actualPpBaud#

Achieved PP SCL frequency in Hz. 




uint32_t actualOdBaud#

Achieved OD SCL frequency in Hz. 




uint32_t actualI2cBaud#

Achieved I2C SCL frequency in Hz (0 if no I2C is configured). 







struct _i3c_master_config#


#include <fsl_i3c.h>
Structure with settings to initialize the I3C master module. 
This structure holds configuration settings for the I3C peripheral. To initialize this structure to reasonable defaults, call the I3C_MasterGetDefaultConfig() function and pass a pointer to your configuration structure instance.
The configuration structure can be made constant so it resides in flash. 

Public Members


i3c_master_enable_t enableMaster#

Enable master mode. 




bool disableTimeout#

Whether to disable timeout to prevent the ERRWARN. 




i3c_master_hkeep_t hKeep#

High keeper mode setting. 




bool enableOpenDrainStop#

Whether to emit open-drain speed STOP. 




bool enableOpenDrainHigh#

Enable Open-Drain High to be 1 PPBAUD count for i3c messages, or 1 ODBAUD. 




i3c_baudrate_hz_t baudRate_Hz#

Desired baud rate settings. 




i3c_start_scl_delay_t startSclDelay#

I3C SCL delay after START. 




i3c_start_scl_delay_t restartSclDelay#

I3C SCL delay after Repeated START. 







struct _i3c_master_transfer_callback#


#include <fsl_i3c.h>
i3c master callback functions. 

Public Members


void (*slave2Master)(I3C_Type *base, void *userData)#

Transfer complete callback 




void (*ibiCallback)(I3C_Type *base, i3c_master_handle_t *handle, i3c_ibi_type_t ibiType, i3c_ibi_state_t ibiState)#

IBI event callback 




void (*transferComplete)(I3C_Type *base, i3c_master_handle_t *handle, status_t completionStatus, void *userData)#

Transfer complete callback 







struct _i3c_master_transfer#


#include <fsl_i3c.h>
Non-blocking transfer descriptor structure. 
This structure is used to pass transaction parameters to the I3C_MasterTransferNonBlocking() API. 

Public Members


uint32_t flags#

Bit mask of options for the transfer. See enumeration _i3c_master_transfer_flags for available options. Set to 0 or kI3C_TransferDefaultFlag for normal transfers. 




uint8_t slaveAddress#

The 7-bit slave address. 




i3c_direction_t direction#

Either kI3C_Read or kI3C_Write. 




uint32_t subaddress#

Sub address. Transferred MSB first. 




size_t subaddressSize#

Length of sub address to send in bytes. Maximum size is 4 bytes. 




void *data#

Pointer to data to transfer. 




size_t dataSize#

Number of bytes to transfer. 




i3c_bus_type_t busType#

bus type. 




i3c_ibi_response_t ibiResponse#

ibi response during transfer. 







struct _i3c_master_handle#


#include <fsl_i3c.h>
Driver handle for master non-blocking APIs. 

Note
The contents of this structure are private and subject to change. 


Public Members


uint8_t state#

Transfer state machine current state. 




uint32_t remainingBytes#

Remaining byte count in current state. 




i3c_rx_term_ops_t rxTermOps#

Read termination operation. 




i3c_master_transfer_t transfer#

Copy of the current transfer info. 




uint8_t ibiAddress#

Slave address which request IBI. 




uint8_t *ibiBuff#

Pointer to IBI buffer to keep ibi bytes. 




size_t ibiPayloadSize#

IBI payload size. 




i3c_ibi_type_t ibiType#

IBI type. 




i3c_master_transfer_callback_t callback#

Callback functions pointer. 




void *userData#

Application data passed to callback. 







I3C Slave DMA Driver#


void I3C_SlaveTransferCreateHandleDMA(I3C_Type *base, i3c_slave_dma_handle_t *handle, i3c_slave_dma_callback_t callback, void *userData, dma_handle_t *rxDmaHandle, dma_handle_t *txDmaHandle)#

Create a new handle for the I3C slave DMA APIs. 
The creation of a handle is for use with the DMA APIs. Once a handle is created, there is not a corresponding destroy handle. If the user wants to terminate a transfer, the I3C_SlaveTransferAbortDMA() API shall be called.
For devices where the I3C send and receive DMA requests are OR’d together, the txDmaHandle parameter is ignored and may be set to NULL.

Parameters:

base – The I3C peripheral base address. 
handle – Pointer to the I3C slave driver handle. 
callback – User provided pointer to the asynchronous callback function. 
userData – User provided pointer to the application callback data. 
rxDmaHandle – Handle for the DMA receive channel. Created by the user prior to calling this function. 
txDmaHandle – Handle for the DMA transmit channel. Created by the user prior to calling this function. 







status_t I3C_SlaveTransferDMA(I3C_Type *base, i3c_slave_dma_handle_t *handle, i3c_slave_dma_transfer_t *transfer, uint32_t eventMask)#

Prepares for a non-blocking DMA-based transaction on the I3C bus. 
The API will do DMA configuration according to the input transfer descriptor, and the data will be transferred when there’s bus master requesting transfer from/to this slave. So the timing of call to this API need be aligned with master application to ensure the transfer is executed as expected. Callback specified when the handle was created is invoked when the transaction has completed.

Parameters:

base – The I3C peripheral base address. 
handle – Pointer to the I3C slave driver handle. 
transfer – The pointer to the transfer descriptor. 
eventMask – Bit mask formed by OR’ing together i3c_slave_transfer_event_t enumerators to specify which events to send to the callback. The transmit and receive events is not allowed to be enabled. 


Return values:

kStatus_Success – The transaction was started successfully. 
kStatus_I3C_Busy – Either another master is currently utilizing the bus, or another DMA transaction is already in progress. 







void I3C_SlaveTransferAbortDMA(I3C_Type *base, i3c_slave_dma_handle_t *handle)#

Abort a slave dma non-blocking transfer in a early time. 

Parameters:

base – I3C peripheral base address 
handle – pointer to i3c_slave_dma_handle_t structure 







void I3C_SlaveTransferDMAHandleIRQ(I3C_Type *base, void *i3cHandle)#

Reusable routine to handle slave interrupts. 

Note
This function does not need to be called unless you are reimplementing the nonblocking API’s interrupt handler routines to add special functionality. 


Parameters:

base – The I3C peripheral base address. 
handle – Pointer to the I3C slave DMA driver handle. 







typedef struct _i3c_slave_dma_handle i3c_slave_dma_handle_t#





typedef struct _i3c_slave_dma_transfer i3c_slave_dma_transfer_t#

I3C slave transfer structure. 




typedef void (*i3c_slave_dma_callback_t)(I3C_Type *base, i3c_slave_dma_transfer_t *transfer, void *userData)#

Slave event callback function pointer type. 
This callback is used only for the slave DMA transfer API.

Param base:
Base address for the I3C instance on which the event occurred. 

Param handle:
Pointer to slave DMA transfer handle. 

Param transfer:
Pointer to transfer descriptor containing values passed to and/or from the callback. 

Param userData:
Arbitrary pointer-sized value passed from the application. 






struct _i3c_slave_dma_transfer#


#include <fsl_i3c_dma.h>
I3C slave transfer structure. 




struct _i3c_slave_dma_handle#


#include <fsl_i3c_dma.h>
I3C slave dma handle structure. 

Note
The contents of this structure are private and subject to change. 





I3C Slave Driver#


void I3C_SlaveGetDefaultConfig(i3c_slave_config_t *slaveConfig)

Provides a default configuration for the I3C slave peripheral. 
This function provides the following default configuration for the I3C slave peripheral: 
slaveConfig->enableslave             = true;



After calling this function, you can override any settings in order to customize the configuration, prior to initializing the slave driver with I3C_SlaveInit().

Parameters:

slaveConfig – [out] User provided configuration structure for default values. Refer to i3c_slave_config_t. 







void I3C_SlaveInit(I3C_Type *base, const i3c_slave_config_t *slaveConfig, uint32_t slowClock_Hz)

Initializes the I3C slave peripheral. 
This function enables the peripheral clock and initializes the I3C slave peripheral as described by the user provided configuration.

Parameters:

base – The I3C peripheral base address. 
slaveConfig – User provided peripheral configuration. Use I3C_SlaveGetDefaultConfig() to get a set of defaults that you can override. 
slowClock_Hz – Frequency in Hertz of the I3C slow clock. Used to calculate the bus match condition values. If FSL_FEATURE_I3C_HAS_NO_SCONFIG_BAMATCH defines as 1, this parameter is useless. 







void I3C_SlaveDeinit(I3C_Type *base)

Deinitializes the I3C slave peripheral. 
This function disables the I3C slave peripheral and gates the clock.

Parameters:

base – The I3C peripheral base address. 







static inline void I3C_SlaveEnable(I3C_Type *base, bool isEnable)

Enable/Disable Slave. 

Parameters:

base – The I3C peripheral base address. 
isEnable – Enable or disable. 







static inline uint32_t I3C_SlaveGetStatusFlags(I3C_Type *base)

Gets the I3C slave status flags. 
A bit mask with the state of all I3C slave status flags is returned. For each flag, the corresponding bit in the return value is set if the flag is asserted.

See also
_i3c_slave_flags



Parameters:

base – The I3C peripheral base address. 


Returns:
State of the status flags:

1: related status flag is set.
0: related status flag is not set. 








static inline void I3C_SlaveClearStatusFlags(I3C_Type *base, uint32_t statusMask)

Clears the I3C slave status flag state. 
The following status register flags can be cleared:

kI3C_SlaveBusStartFlag
kI3C_SlaveMatchedFlag
kI3C_SlaveBusStopFlag


Attempts to clear other flags has no effect.

See also
_i3c_slave_flags. 



Parameters:

base – The I3C peripheral base address. 
statusMask – A bitmask of status flags that are to be cleared. The mask is composed of _i3c_slave_flags enumerators OR’d together. You may pass the result of a previous call to I3C_SlaveGetStatusFlags(). 







static inline uint32_t I3C_SlaveGetErrorStatusFlags(I3C_Type *base)

Gets the I3C slave error status flags. 
A bit mask with the state of all I3C slave error status flags is returned. For each flag, the corresponding bit in the return value is set if the flag is asserted.

See also
_i3c_slave_error_flags



Parameters:

base – The I3C peripheral base address. 


Returns:
State of the error status flags:

1: related status flag is set.
0: related status flag is not set. 








static inline void I3C_SlaveClearErrorStatusFlags(I3C_Type *base, uint32_t statusMask)

Clears the I3C slave error status flag state. 

See also
_i3c_slave_error_flags. 



Parameters:

base – The I3C peripheral base address. 
statusMask – A bitmask of error status flags that are to be cleared. The mask is composed of _i3c_slave_error_flags enumerators OR’d together. You may pass the result of a previous call to I3C_SlaveGetErrorStatusFlags(). 







i3c_slave_activity_state_t I3C_SlaveGetActivityState(I3C_Type *base)

Gets the I3C slave state. 

Parameters:

base – The I3C peripheral base address. 


Returns:
I3C slave activity state, refer i3c_slave_activity_state_t. 






static inline void I3C_SlaveEnableInterrupts(I3C_Type *base, uint32_t interruptMask)

Enables the I3C slave interrupt requests. 
Only below flags can be enabled as interrupts.

kI3C_SlaveBusStartFlag
kI3C_SlaveMatchedFlag
kI3C_SlaveBusStopFlag
kI3C_SlaveRxReadyFlag
kI3C_SlaveTxReadyFlag
kI3C_SlaveDynamicAddrChangedFlag
kI3C_SlaveReceivedCCCFlag
kI3C_SlaveErrorFlag
kI3C_SlaveHDRCommandMatchFlag
kI3C_SlaveCCCHandledFlag
kI3C_SlaveEventSentFlag



Parameters:

base – The I3C peripheral base address. 
interruptMask – Bit mask of interrupts to enable. See _i3c_slave_flags for the set of constants that should be OR’d together to form the bit mask. 







static inline void I3C_SlaveDisableInterrupts(I3C_Type *base, uint32_t interruptMask)

Disables the I3C slave interrupt requests. 
Only below flags can be disabled as interrupts.

kI3C_SlaveBusStartFlag
kI3C_SlaveMatchedFlag
kI3C_SlaveBusStopFlag
kI3C_SlaveRxReadyFlag
kI3C_SlaveTxReadyFlag
kI3C_SlaveDynamicAddrChangedFlag
kI3C_SlaveReceivedCCCFlag
kI3C_SlaveErrorFlag
kI3C_SlaveHDRCommandMatchFlag
kI3C_SlaveCCCHandledFlag
kI3C_SlaveEventSentFlag



Parameters:

base – The I3C peripheral base address. 
interruptMask – Bit mask of interrupts to disable. See _i3c_slave_flags for the set of constants that should be OR’d together to form the bit mask. 







static inline uint32_t I3C_SlaveGetEnabledInterrupts(I3C_Type *base)

Returns the set of currently enabled I3C slave interrupt requests. 

Parameters:

base – The I3C peripheral base address. 


Returns:
A bitmask composed of _i3c_slave_flags enumerators OR’d together to indicate the set of enabled interrupts. 






static inline uint32_t I3C_SlaveGetPendingInterrupts(I3C_Type *base)

Returns the set of pending I3C slave interrupt requests. 

Parameters:

base – The I3C peripheral base address. 


Returns:
A bitmask composed of _i3c_slave_flags enumerators OR’d together to indicate the set of pending interrupts. 






static inline void I3C_SlaveEnableDMA(I3C_Type *base, bool enableTx, bool enableRx, uint32_t width)

Enables or disables I3C slave DMA requests. 

Parameters:

base – The I3C peripheral base address. 
enableTx – Enable flag for transmit DMA request. Pass true for enable, false for disable. 
enableRx – Enable flag for receive DMA request. Pass true for enable, false for disable. 
width – DMA read/write unit in bytes. 







static inline uint32_t I3C_SlaveGetTxFifoAddress(I3C_Type *base, uint32_t width)

Gets I3C slave transmit data register address for DMA transfer. 

Parameters:

base – The I3C peripheral base address. 
width – DMA read/write unit in bytes. 


Returns:
The I3C Slave Transmit Data Register address. 






static inline uint32_t I3C_SlaveGetRxFifoAddress(I3C_Type *base, uint32_t width)

Gets I3C slave receive data register address for DMA transfer. 

Parameters:

base – The I3C peripheral base address. 
width – DMA read/write unit in bytes. 


Returns:
The I3C Slave Receive Data Register address. 






static inline void I3C_SlaveSetWatermarks(I3C_Type *base, i3c_tx_trigger_level_t txLvl, i3c_rx_trigger_level_t rxLvl, bool flushTx, bool flushRx)

Sets the watermarks for I3C slave FIFOs. 

Parameters:

base – The I3C peripheral base address. 
txLvl – Transmit FIFO watermark level. The kI3C_SlaveTxReadyFlag flag is set whenever the number of words in the transmit FIFO reaches txLvl. 
rxLvl – Receive FIFO watermark level. The kI3C_SlaveRxReadyFlag flag is set whenever the number of words in the receive FIFO reaches rxLvl. 
flushTx – true if TX FIFO is to be cleared, otherwise TX FIFO remains unchanged. 
flushRx – true if RX FIFO is to be cleared, otherwise RX FIFO remains unchanged. 







static inline void I3C_SlaveGetFifoCounts(I3C_Type *base, size_t *rxCount, size_t *txCount)

Gets the current number of bytes in the I3C slave FIFOs. 

Parameters:

base – The I3C peripheral base address. 
txCount – [out] Pointer through which the current number of bytes in the transmit FIFO is returned. Pass NULL if this value is not required. 
rxCount – [out] Pointer through which the current number of bytes in the receive FIFO is returned. Pass NULL if this value is not required. 







status_t I3C_SlaveSend(I3C_Type *base, const void *txBuff, size_t txSize)

Performs a polling send transfer on the I3C bus. 

Parameters:

base – The I3C peripheral base address. 
txBuff – The pointer to the data to be transferred. 
txSize – The length in bytes of the data to be transferred. 


Returns:
Error or success status returned by API. 






status_t I3C_SlaveReceive(I3C_Type *base, void *rxBuff, size_t rxSize)

Performs a polling receive transfer on the I3C bus. 

Parameters:

base – The I3C peripheral base address. 
rxBuff – The pointer to the data to be transferred. 
rxSize – The length in bytes of the data to be transferred. 


Returns:
Error or success status returned by API. 






void I3C_SlaveTransferCreateHandle(I3C_Type *base, i3c_slave_handle_t *handle, i3c_slave_transfer_callback_t callback, void *userData)#

Creates a new handle for the I3C slave non-blocking APIs. 
The creation of a handle is for use with the non-blocking APIs. Once a handle is created, there is not a corresponding destroy handle. If the user wants to terminate a transfer, the I3C_SlaveTransferAbort() API shall be called.

Note
The function also enables the NVIC IRQ for the input I3C. Need to notice that on some SoCs the I3C IRQ is connected to INTMUX, in this case user needs to enable the associated INTMUX IRQ in application.


Parameters:

base – The I3C peripheral base address. 
handle – [out] Pointer to the I3C slave driver handle. 
callback – User provided pointer to the asynchronous callback function. 
userData – User provided pointer to the application callback data. 







status_t I3C_SlaveTransferNonBlocking(I3C_Type *base, i3c_slave_handle_t *handle, uint32_t eventMask)#

Starts accepting slave transfers. 
Call this API after calling I2C_SlaveInit() and I3C_SlaveTransferCreateHandle() to start processing transactions driven by an I2C master. The slave monitors the I2C bus and pass events to the callback that was passed into the call to I3C_SlaveTransferCreateHandle(). The callback is always invoked from the interrupt context.
The set of events received by the callback is customizable. To do so, set the eventMask parameter to the OR’d combination of i3c_slave_transfer_event_t enumerators for the events you wish to receive. The kI3C_SlaveTransmitEvent and kI3C_SlaveReceiveEvent events are always enabled and do not need to be included in the mask. Alternatively, you can pass 0 to get a default set of only the transmit and receive events that are always enabled. In addition, the kI3C_SlaveAllEvents constant is provided as a convenient way to enable all events.

Parameters:

base – The I3C peripheral base address. 
handle – Pointer to struct: _i3c_slave_handle structure which stores the transfer state. 
eventMask – Bit mask formed by OR’ing together i3c_slave_transfer_event_t enumerators to specify which events to send to the callback. Other accepted values are 0 to get a default set of only the transmit and receive events, and kI3C_SlaveAllEvents to enable all events.


Return values:

kStatus_Success – Slave transfers were successfully started. 
kStatus_I3C_Busy – Slave transfers have already been started on this handle. 







status_t I3C_SlaveTransferGetCount(I3C_Type *base, i3c_slave_handle_t *handle, size_t *count)#

Gets the slave transfer status during a non-blocking transfer. 

Parameters:

base – The I3C peripheral base address. 
handle – Pointer to i2c_slave_handle_t structure. 
count – [out] Pointer to a value to hold the number of bytes transferred. May be NULL if the count is not required. 


Return values:

kStatus_Success – 
kStatus_NoTransferInProgress – 







void I3C_SlaveTransferAbort(I3C_Type *base, i3c_slave_handle_t *handle)#

Aborts the slave non-blocking transfers. 

Note
This API could be called at any time to stop slave for handling the bus events. 


Parameters:

base – The I3C peripheral base address. 
handle – Pointer to struct: _i3c_slave_handle structure which stores the transfer state. 







void I3C_SlaveTransferHandleIRQ(I3C_Type *base, void *intHandle)#

Reusable routine to handle slave interrupts. 

Note
This function does not need to be called unless you are reimplementing the non blocking API’s interrupt handler routines to add special functionality. 


Parameters:

base – The I3C peripheral base address. 
intHandle – Pointer to struct: _i3c_slave_handle structure which stores the transfer state. 







enum _i3c_slave_flags#

I3C slave peripheral flags. 
The following status register flags can be cleared:

kI3C_SlaveBusStartFlag
kI3C_SlaveMatchedFlag
kI3C_SlaveBusStopFlag


Only below flags can be enabled as interrupts.

kI3C_SlaveBusStartFlag
kI3C_SlaveMatchedFlag
kI3C_SlaveBusStopFlag
kI3C_SlaveRxReadyFlag
kI3C_SlaveTxReadyFlag
kI3C_SlaveDynamicAddrChangedFlag
kI3C_SlaveReceivedCCCFlag
kI3C_SlaveErrorFlag
kI3C_SlaveHDRCommandMatchFlag
kI3C_SlaveCCCHandledFlag
kI3C_SlaveEventSentFlag



Note
These enums are meant to be OR’d together to form a bit mask. 

Values:


enumerator kI3C_SlaveNotStopFlag#

Slave status not stop flag 




enumerator kI3C_SlaveMessageFlag#

Slave status message, indicating slave is listening to the bus traffic or responding 




enumerator kI3C_SlaveRequiredReadFlag#

Slave status required, either is master doing SDR read from slave, or is IBI pushing out. 




enumerator kI3C_SlaveRequiredWriteFlag#

Slave status request write, master is doing SDR write to slave, except slave in ENTDAA mode 




enumerator kI3C_SlaveBusDAAFlag#

I3C bus is in ENTDAA mode 




enumerator kI3C_SlaveBusHDRModeFlag#

I3C bus is in HDR mode 




enumerator kI3C_SlaveBusStartFlag#

Start/Re-start event is seen since the bus was last cleared 




enumerator kI3C_SlaveMatchedFlag#

Slave address(dynamic/static) matched since last cleared 




enumerator kI3C_SlaveBusStopFlag#

Stop event is seen since the bus was last cleared 




enumerator kI3C_SlaveRxReadyFlag#

Rx data ready in rx buffer flag 




enumerator kI3C_SlaveTxReadyFlag#

Tx buffer ready for Tx data flag 




enumerator kI3C_SlaveDynamicAddrChangedFlag#

Slave dynamic address has been assigned, re-assigned, or lost 




enumerator kI3C_SlaveReceivedCCCFlag#

Slave received Common command code 




enumerator kI3C_SlaveErrorFlag#

Error occurred flag 




enumerator kI3C_SlaveHDRCommandMatchFlag#

High data rate command match 




enumerator kI3C_SlaveCCCHandledFlag#

Slave received Common command code is handled by I3C module 




enumerator kI3C_SlaveEventSentFlag#

Slave IBI/P2P/MR/HJ event has been sent 




enumerator kI3C_SlaveIbiDisableFlag#

Slave in band interrupt is disabled. 




enumerator kI3C_SlaveMasterRequestDisabledFlag#

Slave master request is disabled. 




enumerator kI3C_SlaveHotJoinDisabledFlag#

Slave Hot-Join is disabled. 




enumerator kI3C_SlaveClearFlags#

All flags which are cleared by the driver upon starting a transfer. 




enumerator kI3C_SlaveAllIrqFlags#







enum _i3c_slave_error_flags#

I3C slave error flags to indicate the causes. 

Note
These enums are meant to be OR’d together to form a bit mask. 

Values:


enumerator kI3C_SlaveErrorOverrunFlag#

Slave internal from-bus buffer/FIFO overrun. 




enumerator kI3C_SlaveErrorUnderrunFlag#

Slave internal to-bus buffer/FIFO underrun 




enumerator kI3C_SlaveErrorUnderrunNakFlag#

Slave internal from-bus buffer/FIFO underrun and NACK error 




enumerator kI3C_SlaveErrorTermFlag#

Terminate error from master 




enumerator kI3C_SlaveErrorInvalidStartFlag#

Slave invalid start flag 




enumerator kI3C_SlaveErrorSdrParityFlag#

SDR parity error 




enumerator kI3C_SlaveErrorHdrParityFlag#

HDR parity error 




enumerator kI3C_SlaveErrorHdrCRCFlag#

HDR-DDR CRC error 




enumerator kI3C_SlaveErrorS0S1Flag#

S0 or S1 error 




enumerator kI3C_SlaveErrorOverreadFlag#

Over-read error 




enumerator kI3C_SlaveErrorOverwriteFlag#

Over-write error 






enum _i3c_slave_event#

I3C slave.event. 
Values:


enumerator kI3C_SlaveEventNormal#

Normal mode. 




enumerator kI3C_SlaveEventIBI#

In band interrupt event. 




enumerator kI3C_SlaveEventMasterReq#

Master request event. 




enumerator kI3C_SlaveEventHotJoinReq#

Hot-join event. 






enum _i3c_slave_activity_state#

I3C slave.activity state. 
Values:


enumerator kI3C_SlaveNoLatency#

Normal bus operation 




enumerator kI3C_SlaveLatency1Ms#

1ms of latency. 




enumerator kI3C_SlaveLatency100Ms#

100ms of latency. 




enumerator kI3C_SlaveLatency10S#

10s latency. 






enum _i3c_slave_transfer_event#

Set of events sent to the callback for non blocking slave transfers. 
These event enumerations are used for two related purposes. First, a bit mask created by OR’ing together events is passed to I3C_SlaveTransferNonBlocking() in order to specify which events to enable. Then, when the slave callback is invoked, it is passed the current event through its transfer parameter.

Note
These enumerations are meant to be OR’d together to form a bit mask of events. 

Values:


enumerator kI3C_SlaveAddressMatchEvent#

Received the slave address after a start or repeated start. 




enumerator kI3C_SlaveTransmitEvent#

Callback is requested to provide data to transmit (slave-transmitter role). 




enumerator kI3C_SlaveReceiveEvent#

Callback is requested to provide a buffer in which to place received data (slave-receiver role). 




enumerator kI3C_SlaveRequiredTransmitEvent#

Callback is requested to provide a buffer in which to place received data (slave-receiver role). 




enumerator kI3C_SlaveStartEvent#

A start/repeated start was detected. 




enumerator kI3C_SlaveHDRCommandMatchEvent#

Slave Match HDR Command. 




enumerator kI3C_SlaveCompletionEvent#

A stop was detected, completing the transfer. 




enumerator kI3C_SlaveRequestSentEvent#

Slave request event sent. 




enumerator kI3C_SlaveReceivedCCCEvent#

Slave received CCC event, need to handle by application. 




enumerator kI3C_SlaveAllEvents#

Bit mask of all available events. 






typedef enum _i3c_slave_event i3c_slave_event_t#

I3C slave.event. 




typedef enum _i3c_slave_activity_state i3c_slave_activity_state_t#

I3C slave.activity state. 




typedef struct _i3c_slave_config i3c_slave_config_t#

Structure with settings to initialize the I3C slave module. 
This structure holds configuration settings for the I3C peripheral. To initialize this structure to reasonable defaults, call the I3C_SlaveGetDefaultConfig() function and pass a pointer to your configuration structure instance.
The configuration structure can be made constant so it resides in flash. 




typedef enum _i3c_slave_transfer_event i3c_slave_transfer_event_t#

Set of events sent to the callback for non blocking slave transfers. 
These event enumerations are used for two related purposes. First, a bit mask created by OR’ing together events is passed to I3C_SlaveTransferNonBlocking() in order to specify which events to enable. Then, when the slave callback is invoked, it is passed the current event through its transfer parameter.

Note
These enumerations are meant to be OR’d together to form a bit mask of events. 





typedef struct _i3c_slave_transfer i3c_slave_transfer_t#

I3C slave transfer structure. 




typedef struct _i3c_slave_handle i3c_slave_handle_t#





typedef void (*i3c_slave_transfer_callback_t)(I3C_Type *base, i3c_slave_transfer_t *transfer, void *userData)#

Slave event callback function pointer type. 
This callback is used only for the slave non-blocking transfer API. To install a callback, use the I3C_SlaveSetCallback() function after you have created a handle.

Param base:
Base address for the I3C instance on which the event occurred. 

Param transfer:
Pointer to transfer descriptor containing values passed to and/or from the callback. 

Param userData:
Arbitrary pointer-sized value passed from the application. 






typedef void (*i3c_slave_isr_t)(I3C_Type *base, void *handle)#

Typedef for slave interrupt handler. 




struct _i3c_slave_config#


#include <fsl_i3c.h>
Structure with settings to initialize the I3C slave module. 
This structure holds configuration settings for the I3C peripheral. To initialize this structure to reasonable defaults, call the I3C_SlaveGetDefaultConfig() function and pass a pointer to your configuration structure instance.
The configuration structure can be made constant so it resides in flash. 

Public Members


bool enableSlave#

Whether to enable slave. 




uint8_t staticAddr#

Static address. 




uint16_t vendorID#

Device vendor ID(manufacture ID). 




uint32_t partNumber#

Device part number info 




uint8_t dcr#

Device characteristics register information. 




uint8_t bcr#

Bus characteristics register information. 




uint8_t hdrMode#

Support hdr mode, could be OR logic in enumeration:i3c_hdr_mode_t. 




bool nakAllRequest#

Whether to reply NAK to all requests except broadcast CCC. 




bool ignoreS0S1Error#

Whether to ignore S0/S1 error in SDR mode. 




bool offline#

Whether to wait 60 us of bus quiet or HDR request to ensure slave track SDR mode safely. 




bool matchSlaveStartStop#

Whether to assert start/stop status only the time slave is addressed. 




uint32_t maxWriteLength#

Maximum write length. 




uint32_t maxReadLength#

Maximum read length. 







struct _i3c_slave_transfer#


#include <fsl_i3c.h>
I3C slave transfer structure. 

Public Members


uint32_t event#

Reason the callback is being invoked. 




uint8_t *txData#

Transfer buffer 




size_t txDataSize#

Transfer size 




uint8_t *rxData#

Transfer buffer 




size_t rxDataSize#

Transfer size 




status_t completionStatus#

Success or error code describing how the transfer completed. Only applies for kI3C_SlaveCompletionEvent. 




size_t transferredCount#

Number of bytes actually transferred since start or last repeated start. 







struct _i3c_slave_handle#


#include <fsl_i3c.h>
I3C slave handle structure. 

Note
The contents of this structure are private and subject to change. 


Public Members


i3c_slave_transfer_t transfer#

I3C slave transfer copy. 




bool isBusy#

Whether transfer is busy. 




bool wasTransmit#

Whether the last transfer was a transmit. 




uint32_t eventMask#

Mask of enabled events. 




uint32_t transferredCount#

Count of bytes transferred. 




i3c_slave_transfer_callback_t callback#

Callback function called at transfer event. 




void *userData#

Callback parameter passed to callback. 




size_t txFifoSize#

Tx Fifo size 







IAP: In Application Programming Driver#


status_t IAP_ReadPartID(uint32_t *partID)#

Read part identification number. 
This function is used to read the part identification number.

Parameters:

partID – Address to store the part identification number.


Return values:
kStatus_IAP_Success – Api has been executed successfully. 






status_t IAP_ReadBootCodeVersion(uint32_t *bootCodeVersion)#

Read boot code version number. 
This function is used to read the boot code version number.

note Boot code version is two 32-bit words. Word 0 is the major version, word 1 is the minor version. 

Parameters:

bootCodeVersion – Address to store the boot code version.


Return values:
kStatus_IAP_Success – Api has been executed successfully.






void IAP_ReinvokeISP(uint8_t ispType, uint32_t *status)#

Reinvoke ISP. 
This function is used to invoke the boot loader in ISP mode. It maps boot vectors and configures the peripherals for ISP.

note The error response will be returned when IAP is disabled or an invalid ISP type selection appears. The call won’t return unless an error occurs, so there can be no status code. 

Parameters:

ispType – ISP type selection. 
status – store the possible status.


Return values:
kStatus_IAP_ReinvokeISPConfig – reinvoke configuration error.






status_t IAP_ReadUniqueID(uint32_t *uniqueID)#

Read unique identification. 
This function is used to read the unique id.

Parameters:

uniqueID – store the uniqueID.


Return values:
kStatus_IAP_Success – Api has been executed successfully. 






status_t IAP_PrepareSectorForWrite(uint32_t startSector, uint32_t endSector)#

Prepare sector for write operation. 
This function prepares sector(s) for write/erase operation. This function must be called before calling the IAP_CopyRamToFlash() or IAP_EraseSector() or IAP_ErasePage() function. The end sector number must be greater than or equal to the start sector number.

Parameters:

startSector – Start sector number. 
endSector – End sector number.


Return values:

kStatus_IAP_Success – Api has been executed successfully. 
kStatus_IAP_NoPower – Flash memory block is powered down. 
kStatus_IAP_NoClock – Flash memory block or controller is not clocked. 
kStatus_IAP_InvalidSector – Sector number is invalid or end sector number is greater than start sector number. 
kStatus_IAP_Busy – Flash programming hardware interface is busy. 







status_t IAP_CopyRamToFlash(uint32_t dstAddr, uint32_t *srcAddr, uint32_t numOfBytes, uint32_t systemCoreClock)#

Copy RAM to flash. 
This function programs the flash memory. Corresponding sectors must be prepared via IAP_PrepareSectorForWrite before calling this function.

Parameters:

dstAddr – Destination flash address where data bytes are to be written, the address should be multiples of FSL_FEATURE_SYSCON_FLASH_PAGE_SIZE_BYTES boundary. 
srcAddr – Source ram address from where data bytes are to be read. 
numOfBytes – Number of bytes to be written, it should be multiples of FSL_FEATURE_SYSCON_FLASH_PAGE_SIZE_BYTES, and ranges from FSL_FEATURE_SYSCON_FLASH_PAGE_SIZE_BYTES to FSL_FEATURE_SYSCON_FLASH_SECTOR_SIZE_BYTES. 
systemCoreClock – SystemCoreClock in Hz. It is converted to KHz before calling the rom IAP function. When the flash controller has a fixed reference clock, this parameter is bypassed.


Return values:

kStatus_IAP_Success – Api has been executed successfully. 
kStatus_IAP_NoPower – Flash memory block is powered down. 
kStatus_IAP_NoClock – Flash memory block or controller is not clocked. 
kStatus_IAP_SrcAddrError – Source address is not on word boundary. 
kStatus_IAP_DstAddrError – Destination address is not on a correct boundary. 
kStatus_IAP_SrcAddrNotMapped – Source address is not mapped in the memory map. 
kStatus_IAP_DstAddrNotMapped – Destination address is not mapped in the memory map. 
kStatus_IAP_CountError – Byte count is not multiple of 4 or is not a permitted value. 
kStatus_IAP_NotPrepared – Command to prepare sector for write operation has not been executed. 
kStatus_IAP_Busy – Flash programming hardware interface is busy. 







status_t IAP_EraseSector(uint32_t startSector, uint32_t endSector, uint32_t systemCoreClock)#

Erase sector. 
This function erases sector(s). The end sector number must be greater than or equal to the start sector number.

Parameters:

startSector – Start sector number. 
endSector – End sector number. 
systemCoreClock – SystemCoreClock in Hz. It is converted to KHz before calling the rom IAP function. When the flash controller has a fixed reference clock, this parameter is bypassed.


Return values:

kStatus_IAP_Success – Api has been executed successfully. 
kStatus_IAP_NoPower – Flash memory block is powered down. 
kStatus_IAP_NoClock – Flash memory block or controller is not clocked. 
kStatus_IAP_InvalidSector – Sector number is invalid or end sector number is greater than start sector number. 
kStatus_IAP_NotPrepared – Command to prepare sector for write operation has not been executed. 
kStatus_IAP_Busy – Flash programming hardware interface is busy. 







status_t IAP_ErasePage(uint32_t startPage, uint32_t endPage, uint32_t systemCoreClock)#

Erase page. 
This function erases page(s). The end page number must be greater than or equal to the start page number.

Parameters:

startPage – Start page number. 
endPage – End page number. 
systemCoreClock – SystemCoreClock in Hz. It is converted to KHz before calling the rom IAP function. When the flash controller has a fixed reference clock, this parameter is bypassed.


Return values:

kStatus_IAP_Success – Api has been executed successfully. 
kStatus_IAP_NoPower – Flash memory block is powered down. 
kStatus_IAP_NoClock – Flash memory block or controller is not clocked. 
kStatus_IAP_InvalidSector – Page number is invalid or end page number is greater than start page number. 
kStatus_IAP_NotPrepared – Command to prepare sector for write operation has not been executed. 
kStatus_IAP_Busy – Flash programming hardware interface is busy. 







status_t IAP_BlankCheckSector(uint32_t startSector, uint32_t endSector)#

Blank check sector(s) 
Blank check single or multiples sectors of flash memory. The end sector number must be greater than or equal to the start sector number. It can be used to verify the sector erasure after IAP_EraseSector call.

Parameters:

startSector – Start sector number. 
endSector – End sector number. 


Return values:

kStatus_IAP_Success – One or more sectors are in erased state. 
kStatus_IAP_NoPower – Flash memory block is powered down. 
kStatus_IAP_NoClock – Flash memory block or controller is not clocked. 
kStatus_IAP_SectorNotblank – One or more sectors are not blank. 







status_t IAP_Compare(uint32_t dstAddr, uint32_t *srcAddr, uint32_t numOfBytes)#

Compare memory contents of flash with ram. 
This function compares the contents of flash and ram. It can be used to verify the flash memory contents after IAP_CopyRamToFlash call.

Parameters:

dstAddr – Destination flash address. 
srcAddr – Source ram address. 
numOfBytes – Number of bytes to be compared.


Return values:

kStatus_IAP_Success – Contents of flash and ram match. 
kStatus_IAP_NoPower – Flash memory block is powered down. 
kStatus_IAP_NoClock – Flash memory block or controller is not clocked. 
kStatus_IAP_AddrError – Address is not on word boundary. 
kStatus_IAP_AddrNotMapped – Address is not mapped in the memory map. 
kStatus_IAP_CountError – Byte count is not multiple of 4 or is not a permitted value. 
kStatus_IAP_CompareError – Destination and source memory contents do not match. 







status_t IAP_ExtendedFlashSignatureRead(uint32_t startPage, uint32_t endPage, uint32_t numOfStates, uint32_t *signature)#

Extended Read signature. 
This function calculates the signature value for one or more pages of on-chip flash memory.

Parameters:

startPage – Start page number. 
endPage – End page number. 
numOfStates – Number of wait states. 
signature – Address to store the signature value.


Return values:
kStatus_IAP_Success – Api has been executed successfully. 






status_t IAP_ReadFlashSignature(uint32_t *signature)#

Read flash signature. 
This funtion is used to obtain a 32-bit signature value of the entire flash memory.

Parameters:

signature – Address to store the 32-bit generated signature value.


Return values:
kStatus_IAP_Success – Api has been executed successfully. 






status_t IAP_ReadFAIMPage(uint32_t pageNumber, uint32_t *dstAddr)#

Read FAIM page. 
This function is used to read given page of FAIM into the memory provided.

Parameters:

pageNumber – FAIM page number. 
dstAddr – Memory address to store the value read from FAIM.


Return values:

kStatus_IAP_Success – Api has been executed successfully. 
kStatus_IAP_DstAddrNotMapped – Destination address is not mapped in the memory map. 







status_t IAP_WriteFAIMPage(uint32_t pageNumber, uint32_t *srcAddr)#

Write FAIM page. 
This function is used to write given data in the provided memory to a page of G.

Parameters:

pageNumber – FAIM page number. 
srcAddr – Memory address holding data to be stored on to FAIM page.


Return values:

kStatus_IAP_Success – Api has been executed successfully. 
kStatus_IAP_SrcAddrNotMapped – Source address is not mapped in the memory map. 







FSL_IAP_DRIVER_VERSION#






iap status codes. 
Values:


enumerator kStatus_IAP_Success#

Api is executed successfully 




enumerator kStatus_IAP_InvalidCommand#

Invalid command 




enumerator kStatus_IAP_SrcAddrError#

Source address is not on word boundary 




enumerator kStatus_IAP_DstAddrError#

Destination address is not on a correct boundary 




enumerator kStatus_IAP_SrcAddrNotMapped#

Source address is not mapped in the memory map 




enumerator kStatus_IAP_DstAddrNotMapped#

Destination address is not mapped in the memory map 




enumerator kStatus_IAP_CountError#

Byte count is not multiple of 4 or is not a permitted value 




enumerator kStatus_IAP_InvalidSector#

Sector/page number is invalid or end sector/page number is greater than start sector/page number 




enumerator kStatus_IAP_SectorNotblank#

One or more sectors are not blank 




enumerator kStatus_IAP_NotPrepared#

Command to prepare sector for write operation has not been executed 




enumerator kStatus_IAP_CompareError#

Destination and source memory contents do not match 




enumerator kStatus_IAP_Busy#

Flash programming hardware interface is busy 




enumerator kStatus_IAP_ParamError#

Insufficient number of parameters or invalid parameter 




enumerator kStatus_IAP_AddrError#

Address is not on word boundary 




enumerator kStatus_IAP_AddrNotMapped#

Address is not mapped in the memory map 




enumerator kStatus_IAP_NoPower#

Flash memory block is powered down 




enumerator kStatus_IAP_NoClock#

Flash memory block or controller is not clocked 




enumerator kStatus_IAP_ReinvokeISPConfig#

Reinvoke configuration error 






enum _iap_commands#

iap command codes. 
Values:


enumerator kIapCmd_IAP_ReadFactorySettings#

Read the factory settings 




enumerator kIapCmd_IAP_PrepareSectorforWrite#

Prepare Sector for write 




enumerator kIapCmd_IAP_CopyRamToFlash#

Copy RAM to flash 




enumerator kIapCmd_IAP_EraseSector#

Erase Sector 




enumerator kIapCmd_IAP_BlankCheckSector#

Blank check sector 




enumerator kIapCmd_IAP_ReadPartId#

Read part id 




enumerator kIapCmd_IAP_Read_BootromVersion#

Read bootrom version 




enumerator kIapCmd_IAP_Compare#

Compare 




enumerator kIapCmd_IAP_ReinvokeISP#

Reinvoke ISP 




enumerator kIapCmd_IAP_ReadUid#

Read Uid 




enumerator kIapCmd_IAP_ErasePage#

Erase Page 




enumerator kIapCmd_IAP_ReadSignature#

Read Signature 




enumerator kIapCmd_IAP_ExtendedReadSignature#

Extended Read Signature 




enumerator kIapCmd_IAP_ReadFAIMPage#

Read FAIM page 




enumerator kIapCmd_IAP_WriteFAIMPage#

Write FAIM page 






enum _flash_access_time#

Flash memory access time. 
Values:


enumerator kFlash_IAP_OneSystemClockTime#





enumerator kFlash_IAP_TwoSystemClockTime#

1 system clock flash access time 




enumerator kFlash_IAP_ThreeSystemClockTime#

2 system clock flash access time 






INPUTMUX: Input Multiplexing Driver#


enum _inputmux_connection_t#

INPUTMUX connections type. 
Values:


enumerator kINPUTMUX_DmaChannel0TrigoutToTriginChannels#

DMA OTRIG. 




enumerator kINPUTMUX_DmaChannel1TrigoutToTriginChannels#





enumerator kINPUTMUX_DmaChannel2TrigoutToTriginChannels#





enumerator kINPUTMUX_DmaChannel3TrigoutToTriginChannels#





enumerator kINPUTMUX_DmaChannel4TrigoutToTriginChannels#





enumerator kINPUTMUX_DmaChannel5TrigoutToTriginChannels#





enumerator kINPUTMUX_DmaChannel6TrigoutToTriginChannels#





enumerator kINPUTMUX_DmaChannel7TrigoutToTriginChannels#





enumerator kINPUTMUX_DmaChannel8TrigoutToTriginChannels#





enumerator kINPUTMUX_DmaChannel9TrigoutToTriginChannels#





enumerator kINPUTMUX_DmaChannel10TrigoutToTriginChannels#





enumerator kINPUTMUX_DmaChannel11TrigoutToTriginChannels#





enumerator kINPUTMUX_DmaChannel12TrigoutToTriginChannels#





enumerator kINPUTMUX_DmaChannel13TrigoutToTriginChannels#





enumerator kINPUTMUX_DmaChannel14TrigoutToTriginChannels#





enumerator kINPUTMUX_DmaChannel15TrigoutToTriginChannels#

DMA ITRIG. 




enumerator kINPUTMUX_GpioInt4ToDma#





enumerator kINPUTMUX_GpioInt5ToDma#





enumerator kINPUTMUX_GpioInt6ToDma#





enumerator kINPUTMUX_GpioInt7ToDma#





enumerator kINPUTMUX_Adc0SeqaIrqToDma#





enumerator kINPUTMUX_Adc0SeqbIrqToDma#





enumerator kINPUTMUX_Comp0OutToDma#





enumerator kINPUTMUX_Ftm0InitTrigToDma#





enumerator kINPUTMUX_Ftm1InitTrigToDma#





enumerator kINPUTMUX_Ftm0Ch0ToCh5ToDma#





enumerator kINPUTMUX_Ftm1Ch0ToCh3ToDma#





enumerator kINPUTMUX_SdmaTrigoutAToDma#





enumerator kINPUTMUX_SdmaTrigoutBToDma#







typedef enum _inputmux_connection_t inputmux_connection_t#

INPUTMUX connections type. 




DMA_OTRIG_PMUX_ID#

Periphinmux IDs. 




DMA_TRIG0_PMUX_ID#





PMUX_SHIFT#





FSL_INPUTMUX_DRIVER_VERSION#

Group interrupt driver version for SDK. 




void INPUTMUX_Init(void *base)#

Initialize INPUTMUX peripheral. 
This function enables the INPUTMUX clock.

Parameters:

base – Base address of the INPUTMUX peripheral. 







void INPUTMUX_AttachSignal(void *base, uint16_t index, inputmux_connection_t connection)#

Attaches a signal. 
This function writes a source signal selection into an INPUTMUX multiplexer register. The target register address is computed as: 
target address = base + pmux_id + index * 4



Each inputmux_connection_t enum value encodes two fields via PMUX_SHIFT (20): 
31          20 19                    0
+------------+------------------------+
|  pmux_id   |       output_id        |
+------------+------------------------+
     |                   |
group base          signal value
addr offset         to write



When N consecutive registers all accept the same set of source signals (same pmux_id), only one set of enum values is defined for the whole group; index (0 ~ N-1) selects which register to write, avoiding duplicate enum entries.
Example: SCT0 has 8 input mux registers sharing SCT0_INMUX0 = 0x000 as the group base: 
base
 |
 +--[+0x000] SCT0_INMUX0  <-- index=0
 +--[+0x004] SCT0_INMUX1  <-- index=1
 +--[+0x008] SCT0_INMUX2  <-- index=2
 :   ...
 +--[+0x014] SCT0_INMUX5  <-- index=5  (write target for the call below)
 :   ...
 +--[+0x01C] SCT0_INMUX7  <-- index=7


 To connect CMP0 output to SCT0 input 5: INPUTMUX_AttachSignal(INPUTMUX, 5, kINPUTMUX_Cmp0OutToSct0);
// write address = base + 0x000 + 5*4 = base + 0x014  (SCT0_INMUX5)



For peripherals with only a single register per function (e.g. FREQMEAS_REF_REG = 0x180, FREQMEAS_TAR_REG = 0x184), each register has its own unique pmux_id and index must be 0. The two registers are distinguished by their different pmux_id values, not by index: 
base
 |
 +--[+0x180] FREQMEAS_REF_REG  (pmux_id=0x180, index=0)
 +--[+0x184] FREQMEAS_TAR_REG  (pmux_id=0x184, index=0)




Parameters:

base – Base address of the INPUTMUX peripheral. 
index – Zero-based index of the destination register within its group. Each increment advances the address by 4 bytes. Use 0 for single-register groups. 
connection – Encodes the group base offset (bits [31:PMUX_SHIFT]) and the source signal value (bits [PMUX_SHIFT-1:0]). 







void INPUTMUX_EnableSignal(void *base, inputmux_signal_t signal, bool enable)#

Enable/disable a signal. 
This function gates the INPUTMUX clock.

Parameters:

base – Base address of the INPUTMUX peripheral. 
signal – Enable signal register id and bit offset. 
enable – Selects enable or disable. 







void INPUTMUX_Deinit(void *base)#

Deinitialize INPUTMUX peripheral. 
This function disables the INPUTMUX clock.

Parameters:

base – Base address of the INPUTMUX peripheral. 







Common Driver#


FSL_COMMON_DRIVER_VERSION#

common driver version. 




DEBUG_CONSOLE_DEVICE_TYPE_NONE#

No debug console. 




DEBUG_CONSOLE_DEVICE_TYPE_UART#

Debug console based on UART. 




DEBUG_CONSOLE_DEVICE_TYPE_LPUART#

Debug console based on LPUART. 




DEBUG_CONSOLE_DEVICE_TYPE_LPSCI#

Debug console based on LPSCI. 




DEBUG_CONSOLE_DEVICE_TYPE_USBCDC#

Debug console based on USBCDC. 




DEBUG_CONSOLE_DEVICE_TYPE_FLEXCOMM#

Debug console based on FLEXCOMM. 




DEBUG_CONSOLE_DEVICE_TYPE_IUART#

Debug console based on i.MX UART. 




DEBUG_CONSOLE_DEVICE_TYPE_VUSART#

Debug console based on LPC_VUSART. 




DEBUG_CONSOLE_DEVICE_TYPE_MINI_USART#

Debug console based on LPC_USART. 




DEBUG_CONSOLE_DEVICE_TYPE_SWO#

Debug console based on SWO. 




DEBUG_CONSOLE_DEVICE_TYPE_QSCI#

Debug console based on QSCI. 




MIN(a, b)#

Computes the minimum of a and b. 




MAX(a, b)#

Computes the maximum of a and b. 




UINT16_MAX#

Max value of uint16_t type. 




UINT32_MAX#

Max value of uint32_t type. 




UINTPTR_SIZE#





UINT64_H(X)#

Macro to get upper 32 bits of a 64-bit value 




UINT64_L(X)#

Macro to get lower 32 bits of a 64-bit value 




MCUX_MASK_INVERT_8(mask)#

8-bit mask inversion. 




MCUX_MASK_INVERT_16(mask)#

16-bit mask inversion. 




MCUX_MASK_INVERT_32(mask)#

32-bit mask inversion for completeness. 




MCUX_REG_WRITE8(reg, value)#

8-bit register write macro 




MCUX_REG_WRITE16(reg, value)#

16-bit register write macro 




MCUX_REG_WRITE32(reg, value)#

32-bit register write macro 




MCUX_REG_READ8(reg)#

8-bit register read macro 




MCUX_REG_READ16(reg)#

16-bit register read macro 




MCUX_REG_READ32(reg)#

32-bit register read macro 




MCUX_REG_BIT_SET8(reg, mask)#

8-bit register bit set macro 




MCUX_REG_BIT_SET16(reg, mask)#

16-bit register bit set macro 




MCUX_REG_BIT_SET32(reg, mask)#

32-bit register bit set macro 




MCUX_REG_BIT_CLEAR8(reg, mask)#

8-bit register bit clear macro 




MCUX_REG_BIT_CLEAR16(reg, mask)#

16-bit register bit clear macro 




MCUX_REG_BIT_CLEAR32(reg, mask)#

32-bit register bit clear macro 




MCUX_REG_BIT_GET8(reg, mask)#

8-bit register bit get macro 




MCUX_REG_BIT_GET16(reg, mask)#

16-bit register bit get macro 




MCUX_REG_BIT_GET32(reg, mask)#

32-bit register bit get macro 




MCUX_REG_MODIFY8(reg, mask, value)#

32-bit register read-modify-write macro 




MCUX_REG_MODIFY16(reg, mask, value)#

16-bit register read-modify-write macro 




MCUX_REG_MODIFY32(reg, mask, value)#

32-bit register read-modify-write macro 




SDK_ATOMIC_LOCAL_ADD(addr, val)#

Add value val from the variable at address address. 




SDK_ATOMIC_LOCAL_SUB(addr, val)#

Subtract value val to the variable at address address. 




SDK_ATOMIC_LOCAL_SET(addr, bits)#

Set the bits specifiled by bits to the variable at address address. 




SDK_ATOMIC_LOCAL_CLEAR(addr, bits)#

Clear the bits specifiled by bits to the variable at address address. 




SDK_ATOMIC_LOCAL_TOGGLE(addr, bits)#

Toggle the bits specifiled by bits to the variable at address address. 




SDK_ATOMIC_LOCAL_CLEAR_AND_SET(addr, clearBits, setBits)#

For the variable at address address, clear the bits specifiled by clearBits and set the bits specifiled by setBits. 




SDK_ATOMIC_LOCAL_COMPARE_AND_SET(addr, expected, newValue)#

For the variable at address address, check whether the value equal to expected. If value same as expected then update newValue to address and return true , else return false . 




SDK_ATOMIC_LOCAL_TEST_AND_SET(addr, newValue)#

For the variable at address address, set as newValue value and return old value. 




USEC_TO_COUNT(us, clockFreqInHz)#

Macro to convert a microsecond period to raw count value 




COUNT_TO_USEC(count, clockFreqInHz)#

Macro to convert a raw count value to microsecond 




MSEC_TO_COUNT(ms, clockFreqInHz)#

Macro to convert a millisecond period to raw count value 




COUNT_TO_MSEC(count, clockFreqInHz)#

Macro to convert a raw count value to millisecond 




SDK_ISR_EXIT_BARRIER#





SDK_ALIGN(var, alignbytes)#

Macro to define a variable with alignbytes alignment 




SDK_SIZEALIGN(var, alignbytes)#

Macro to define a variable with L1 d-cache line size alignment
Macro to define a variable with L2 cache line size alignment
Macro to change a value to a given size aligned value (rounded up) 




SDK_SIZEALIGN_UP(var, alignbytes)#

Macro to change a value to a given size aligned value (rounded up), the wrapper of SDK_SIZEALIGN 




SDK_SIZEALIGN_DOWN(var, alignbytes)#

Macro to change a value to a given size aligned value (rounded down) 




SDK_IS_ALIGNED(var, alignbytes)#

Macro to check if a value is aligned to a given size 




AT_NONCACHEABLE_SECTION(var)#

Define a variable var, and place it in non-cacheable section. 




AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes)#

Define a variable var, and place it in non-cacheable section, the start address of the variable is aligned to alignbytes. 




AT_NONCACHEABLE_SECTION_INIT(var)#

Define a variable var with initial value, and place it in non-cacheable section. 




AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes)#

Define a variable var with initial value, and place it in non-cacheable section, the start address of the variable is aligned to alignbytes. 




AT_CACHE_LINE_SECTION(var)#

Define a variable var, which is cache line size aligned and be placed in CacheLineData section. 




AT_CACHE_LINE_SECTION_INIT(var)#

Define a variable var with initial value, which is cache line size aligned and be placed in CacheLineData.init section. 




AT_QUICKACCESS_SECTION_CODE(func)#

Place function in a section which can be accessed quickly by core. 




AT_QUICKACCESS_SECTION_DATA(var)#

Place data in a section which can be accessed quickly by core. 




AT_QUICKACCESS_SECTION_DATA_ALIGN(var, alignbytes)#

Place data in a section which can be accessed quickly by core, and the variable address is set to align with alignbytes. 




MCUX_RAMFUNC#

Function attribute to place function in RAM. For example, to place function my_func in ram, use like: 
MCUX_RAMFUNC my_func







RAMFUNCTION_SECTION_CODE(func)#

Place function in ram. 




MCUX_DEPRECATED#

Deprecated APIs. 




MCUX_DEPRECATED_MACRO#

Deprecated macros. 




MCUX_EXPERIMENTAL#

Experimental APIs. 




MCUX_EXPERIMENTAL_MACRO#

Experimental macros. 




enum _status_groups#

Status group numbers. 
Values:


enumerator kStatusGroup_Generic#

Group number for generic status codes. 




enumerator kStatusGroup_FLASH#

Group number for FLASH status codes. 




enumerator kStatusGroup_LPSPI#

Group number for LPSPI status codes. 




enumerator kStatusGroup_FLEXIO_SPI#

Group number for FLEXIO SPI status codes. 




enumerator kStatusGroup_DSPI#

Group number for DSPI status codes. 




enumerator kStatusGroup_FLEXIO_UART#

Group number for FLEXIO UART status codes. 




enumerator kStatusGroup_FLEXIO_I2C#

Group number for FLEXIO I2C status codes. 




enumerator kStatusGroup_LPI2C#

Group number for LPI2C status codes. 




enumerator kStatusGroup_UART#

Group number for UART status codes. 




enumerator kStatusGroup_I2C#

Group number for UART status codes. 




enumerator kStatusGroup_LPSCI#

Group number for LPSCI status codes. 




enumerator kStatusGroup_LPUART#

Group number for LPUART status codes. 




enumerator kStatusGroup_SPI#

Group number for SPI status code. 




enumerator kStatusGroup_XRDC#

Group number for XRDC status code. 




enumerator kStatusGroup_SEMA42#

Group number for SEMA42 status code. 




enumerator kStatusGroup_SDHC#

Group number for SDHC status code 




enumerator kStatusGroup_SDMMC#

Group number for SDMMC status code 




enumerator kStatusGroup_SAI#

Group number for SAI status code 




enumerator kStatusGroup_MCG#

Group number for MCG status codes. 




enumerator kStatusGroup_SCG#

Group number for SCG status codes. 




enumerator kStatusGroup_SDSPI#

Group number for SDSPI status codes. 




enumerator kStatusGroup_FLEXIO_I2S#

Group number for FLEXIO I2S status codes 




enumerator kStatusGroup_FLEXIO_MCULCD#

Group number for FLEXIO LCD status codes 




enumerator kStatusGroup_FLASHIAP#

Group number for FLASHIAP status codes 




enumerator kStatusGroup_FLEXCOMM_I2C#

Group number for FLEXCOMM I2C status codes 




enumerator kStatusGroup_I2S#

Group number for I2S status codes 




enumerator kStatusGroup_IUART#

Group number for IUART status codes 




enumerator kStatusGroup_CSI#

Group number for CSI status codes 




enumerator kStatusGroup_MIPI_DSI#

Group number for MIPI DSI status codes 




enumerator kStatusGroup_SDRAMC#

Group number for SDRAMC status codes. 




enumerator kStatusGroup_POWER#

Group number for POWER status codes. 




enumerator kStatusGroup_ENET#

Group number for ENET status codes. 




enumerator kStatusGroup_PHY#

Group number for PHY status codes. 




enumerator kStatusGroup_TRGMUX#

Group number for TRGMUX status codes. 




enumerator kStatusGroup_SMARTCARD#

Group number for SMARTCARD status codes. 




enumerator kStatusGroup_LMEM#

Group number for LMEM status codes. 




enumerator kStatusGroup_QSPI#

Group number for QSPI status codes. 




enumerator kStatusGroup_DMA#

Group number for DMA status codes. 




enumerator kStatusGroup_EDMA#

Group number for EDMA status codes. 




enumerator kStatusGroup_DMAMGR#

Group number for DMAMGR status codes. 




enumerator kStatusGroup_FLEXCAN#

Group number for FlexCAN status codes. 




enumerator kStatusGroup_LTC#

Group number for LTC status codes. 




enumerator kStatusGroup_FLEXIO_CAMERA#

Group number for FLEXIO CAMERA status codes. 




enumerator kStatusGroup_LPC_SPI#

Group number for LPC_SPI status codes. 




enumerator kStatusGroup_LPC_USART#

Group number for LPC_USART status codes. 




enumerator kStatusGroup_DMIC#

Group number for DMIC status codes. 




enumerator kStatusGroup_SDIF#

Group number for SDIF status codes. 




enumerator kStatusGroup_SPIFI#

Group number for SPIFI status codes. 




enumerator kStatusGroup_OTP#

Group number for OTP status codes. 




enumerator kStatusGroup_MCAN#

Group number for MCAN status codes. 




enumerator kStatusGroup_CAAM#

Group number for CAAM status codes. 




enumerator kStatusGroup_ECSPI#

Group number for ECSPI status codes. 




enumerator kStatusGroup_USDHC#

Group number for USDHC status codes. 




enumerator kStatusGroup_LPC_I2C#

Group number for LPC_I2C status codes. 




enumerator kStatusGroup_DCP#

Group number for DCP status codes. 




enumerator kStatusGroup_MSCAN#

Group number for MSCAN status codes. 




enumerator kStatusGroup_ESAI#

Group number for ESAI status codes. 




enumerator kStatusGroup_FLEXSPI#

Group number for FLEXSPI status codes. 




enumerator kStatusGroup_MMDC#

Group number for MMDC status codes. 




enumerator kStatusGroup_PDM#

Group number for MIC status codes. 




enumerator kStatusGroup_SDMA#

Group number for SDMA status codes. 




enumerator kStatusGroup_ICS#

Group number for ICS status codes. 




enumerator kStatusGroup_SPDIF#

Group number for SPDIF status codes. 




enumerator kStatusGroup_LPC_MINISPI#

Group number for LPC_MINISPI status codes. 




enumerator kStatusGroup_HASHCRYPT#

Group number for Hashcrypt status codes 




enumerator kStatusGroup_LPC_SPI_SSP#

Group number for LPC_SPI_SSP status codes. 




enumerator kStatusGroup_I3C#

Group number for I3C status codes 




enumerator kStatusGroup_LPC_I2C_1#

Group number for LPC_I2C_1 status codes. 




enumerator kStatusGroup_NOTIFIER#

Group number for NOTIFIER status codes. 




enumerator kStatusGroup_DebugConsole#

Group number for debug console status codes. 




enumerator kStatusGroup_SEMC#

Group number for SEMC status codes. 




enumerator kStatusGroup_ApplicationRangeStart#

Starting number for application groups. 




enumerator kStatusGroup_IAP#

Group number for IAP status codes 




enumerator kStatusGroup_SFA#

Group number for SFA status codes 




enumerator kStatusGroup_SPC#

Group number for SPC status codes. 




enumerator kStatusGroup_PUF#

Group number for PUF status codes. 




enumerator kStatusGroup_TOUCH_PANEL#

Group number for touch panel status codes 




enumerator kStatusGroup_VBAT#

Group number for VBAT status codes 




enumerator kStatusGroup_XSPI#

Group number for XSPI status codes 




enumerator kStatusGroup_PNGDEC#

Group number for PNGDEC status codes 




enumerator kStatusGroup_JPEGDEC#

Group number for JPEGDEC status codes 




enumerator kStatusGroup_AUDMIX#

Group number for AUDMIX status codes 




enumerator kStatusGroup_HAL_GPIO#

Group number for HAL GPIO status codes. 




enumerator kStatusGroup_HAL_UART#

Group number for HAL UART status codes. 




enumerator kStatusGroup_HAL_TIMER#

Group number for HAL TIMER status codes. 




enumerator kStatusGroup_HAL_SPI#

Group number for HAL SPI status codes. 




enumerator kStatusGroup_HAL_I2C#

Group number for HAL I2C status codes. 




enumerator kStatusGroup_HAL_FLASH#

Group number for HAL FLASH status codes. 




enumerator kStatusGroup_HAL_PWM#

Group number for HAL PWM status codes. 




enumerator kStatusGroup_HAL_RNG#

Group number for HAL RNG status codes. 




enumerator kStatusGroup_HAL_I2S#

Group number for HAL I2S status codes. 




enumerator kStatusGroup_HAL_ADC_SENSOR#

Group number for HAL ADC SENSOR status codes. 




enumerator kStatusGroup_TIMERMANAGER#

Group number for TiMER MANAGER status codes. 




enumerator kStatusGroup_SERIALMANAGER#

Group number for SERIAL MANAGER status codes. 




enumerator kStatusGroup_LED#

Group number for LED status codes. 




enumerator kStatusGroup_BUTTON#

Group number for BUTTON status codes. 




enumerator kStatusGroup_EXTERN_EEPROM#

Group number for EXTERN EEPROM status codes. 




enumerator kStatusGroup_SHELL#

Group number for SHELL status codes. 




enumerator kStatusGroup_MEM_MANAGER#

Group number for MEM MANAGER status codes. 




enumerator kStatusGroup_LIST#

Group number for List status codes. 




enumerator kStatusGroup_OSA#

Group number for OSA status codes. 




enumerator kStatusGroup_COMMON_TASK#

Group number for Common task status codes. 




enumerator kStatusGroup_MSG#

Group number for messaging status codes. 




enumerator kStatusGroup_SDK_OCOTP#

Group number for OCOTP status codes. 




enumerator kStatusGroup_SDK_FLEXSPINOR#

Group number for FLEXSPINOR status codes. 




enumerator kStatusGroup_CODEC#

Group number for codec status codes. 




enumerator kStatusGroup_ASRC#

Group number for codec status ASRC. 




enumerator kStatusGroup_OTFAD#

Group number for codec status codes. 




enumerator kStatusGroup_SDIOSLV#

Group number for SDIOSLV status codes. 




enumerator kStatusGroup_MECC#

Group number for MECC status codes. 




enumerator kStatusGroup_ENET_QOS#

Group number for ENET_QOS status codes. 




enumerator kStatusGroup_LOG#

Group number for LOG status codes. 




enumerator kStatusGroup_I3CBUS#

Group number for I3CBUS status codes. 




enumerator kStatusGroup_QSCI#

Group number for QSCI status codes. 




enumerator kStatusGroup_ELEMU#

Group number for ELEMU status codes. 




enumerator kStatusGroup_QUEUEDSPI#

Group number for QSPI status codes. 




enumerator kStatusGroup_POWER_MANAGER#

Group number for POWER_MANAGER status codes. 




enumerator kStatusGroup_IPED#

Group number for IPED status codes. 




enumerator kStatusGroup_ELS_PKC#

Group number for ELS PKC status codes. 




enumerator kStatusGroup_CSS_PKC#

Group number for CSS PKC status codes. 




enumerator kStatusGroup_HOSTIF#

Group number for HOSTIF status codes. 




enumerator kStatusGroup_CLIF#

Group number for CLIF status codes. 




enumerator kStatusGroup_BMA#

Group number for BMA status codes. 




enumerator kStatusGroup_NETC#

Group number for NETC status codes. 




enumerator kStatusGroup_ELE#

Group number for ELE status codes. 




enumerator kStatusGroup_GLIKEY#

Group number for GLIKEY status codes. 




enumerator kStatusGroup_AON_POWER#

Group number for AON_POWER status codes. 




enumerator kStatusGroup_AON_COMMON#

Group number for AON_COMMON status codes. 




enumerator kStatusGroup_ENDAT3#

Group number for ENDAT3 status codes. 




enumerator kStatusGroup_HIPERFACE#

Group number for HIPERFACE status codes. 




enumerator kStatusGroup_NPX#

Group number for NPX status codes. 




enumerator kStatusGroup_ELA_CSEC#

Group number for ELA_CSEC status codes. 




enumerator kStatusGroup_FLEXIO_T_FORMAT#

Group number for T-format status codes. 




enumerator kStatusGroup_FLEXIO_A_FORMAT#

Group number for A-format status codes. 




enumerator kStatusGroup_LPC_QSPI#

Group number for LPC QSPI status codes. 




enumerator kStatusGroup_EVENT_CTRL#

Group number for Event controller status codes. 







Generic status return codes. 
Values:


enumerator kStatus_Success#

Generic status for Success. 




enumerator kStatus_Fail#

Generic status for Fail. 




enumerator kStatus_ReadOnly#

Generic status for read only failure. 




enumerator kStatus_OutOfRange#

Generic status for out of range access. 




enumerator kStatus_InvalidArgument#

Generic status for invalid argument check. 




enumerator kStatus_Timeout#

Generic status for timeout. 




enumerator kStatus_NoTransferInProgress#

Generic status for no transfer in progress. 




enumerator kStatus_Busy#

Generic status for module is busy. 




enumerator kStatus_NoData#

Generic status for no data is found for the operation. 






typedef int32_t status_t#

Type used for all status and error return values. 




void *SDK_Malloc(size_t size, size_t alignbytes)#

Allocate memory with given alignment and aligned size. 
This is provided to support the dynamically allocated memory used in cache-able region. 

Parameters:

size – The length required to malloc. 
alignbytes – The alignment size. 


Return values:
The – allocated memory. 






void SDK_Free(void *ptr)#

Free memory. 

Parameters:

ptr – The memory to be release. 







void SDK_DelayAtLeastUs(uint32_t delayTime_us, uint32_t coreClock_Hz)#

Delay at least for some time. Please note that, this API uses while loop for delay, different run-time environments make the time not precise, if precise delay count was needed, please implement a new delay function with hardware timer. 

Parameters:

delayTime_us – Delay time in unit of microsecond. 
coreClock_Hz – Core clock frequency with Hz. 







static inline status_t EnableIRQ(IRQn_Type interrupt)#

Enable specific interrupt. 
Enable LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.
This function only enables the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:

interrupt – The IRQ number. 


Return values:

kStatus_Success – Interrupt enabled successfully 
kStatus_Fail – Failed to enable the interrupt 







static inline status_t DisableIRQ(IRQn_Type interrupt)#

Disable specific interrupt. 
Disable LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.
This function only disables the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:

interrupt – The IRQ number. 


Return values:

kStatus_Success – Interrupt disabled successfully 
kStatus_Fail – Failed to disable the interrupt 







static inline status_t EnableIRQWithPriority(IRQn_Type interrupt, uint8_t priNum)#

Enable the IRQ, and also set the interrupt priority. 
Only handle LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.
This function only handles the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:

interrupt – The IRQ to Enable. 
priNum – Priority number set to interrupt controller register. 


Return values:

kStatus_Success – Interrupt priority set successfully 
kStatus_Fail – Failed to set the interrupt priority. 







static inline status_t IRQ_SetPriority(IRQn_Type interrupt, uint8_t priNum)#

Set the IRQ priority. 
Only handle LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.
This function only handles the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:

interrupt – The IRQ to set. 
priNum – Priority number set to interrupt controller register.


Return values:

kStatus_Success – Interrupt priority set successfully 
kStatus_Fail – Failed to set the interrupt priority. 







static inline status_t IRQ_ClearPendingIRQ(IRQn_Type interrupt)#

Clear the pending IRQ flag. 
Only handle LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.
This function only handles the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:

interrupt – The flag which IRQ to clear.


Return values:

kStatus_Success – Interrupt priority set successfully 
kStatus_Fail – Failed to set the interrupt priority. 







static inline uint32_t DisableGlobalIRQ(void)#

Disable the global IRQ. 
Disable the global interrupt and return the current primask register. User is required to provided the primask register for the EnableGlobalIRQ().

Returns:
Current primask value. 






static inline void EnableGlobalIRQ(uint32_t primask)#

Enable the global IRQ. 
Set the primask register with the provided primask value but not just enable the primask. The idea is for the convenience of integration of RTOS. some RTOS get its own management mechanism of primask. User is required to use the EnableGlobalIRQ() and DisableGlobalIRQ() in pair.

Parameters:

primask – value of primask register to be restored. The primask value is supposed to be provided by the DisableGlobalIRQ(). 







void EnableDeepSleepIRQ(IRQn_Type interrupt)#

Enable specific interrupt for wake-up from deep-sleep mode. 
Enable the interrupt for wake-up from deep sleep mode. Some interrupts are typically used in sleep mode only and will not occur during deep-sleep mode because relevant clocks are stopped. However, it is possible to enable those clocks (significantly increasing power consumption in the reduced power mode), making these wake-ups possible.

Note
This function also enables the interrupt in the NVIC (EnableIRQ() is called internaly).


Parameters:

interrupt – The IRQ number. 







void DisableDeepSleepIRQ(IRQn_Type interrupt)#

Disable specific interrupt for wake-up from deep-sleep mode. 
Disable the interrupt for wake-up from deep sleep mode. Some interrupts are typically used in sleep mode only and will not occur during deep-sleep mode because relevant clocks are stopped. However, it is possible to enable those clocks (significantly increasing power consumption in the reduced power mode), making these wake-ups possible.

Note
This function also disables the interrupt in the NVIC (DisableIRQ() is called internaly).


Parameters:

interrupt – The IRQ number. 







static inline bool _SDK_AtomicLocalCompareAndSet(uint32_t *addr, uint32_t expected, uint32_t newValue)#





static inline uint32_t _SDK_AtomicTestAndSet(uint32_t *addr, uint32_t newValue)#





FSL_DRIVER_TRANSFER_DOUBLE_WEAK_IRQ#

Macro to use the default weak IRQ handler in drivers. 




MAKE_STATUS(group, code)#

Construct a status code value from a group and code number. 




MAKE_VERSION(major, minor, bugfix)#

Construct the version number for drivers. 
The driver version is a 32-bit number, for both 32-bit platforms(such as Cortex M) and 16-bit platforms(such as DSC).
| Unused    || Major Version || Minor Version ||  Bug Fix    |
31        25  24           17  16            9  8            0






ARRAY_SIZE(x)#

Computes the number of elements in an array. 




SUPPRESS_FALL_THROUGH_WARNING()#

For switch case code block, if case section ends without “break;” statement, there wil be fallthrough warning with compiler flag -Wextra or -Wimplicit-fallthrough=n when using armgcc. To suppress this warning, “SUPPRESS_FALL_THROUGH_WARNING();” need to be added at the end of each case section which misses “break;”statement. 




MSDK_REG_SECURE_ADDR(x)#

Convert the register address to the one used in secure mode. 




MSDK_REG_NONSECURE_ADDR(x)#

Convert the register address to the one used in non-secure mode. 




MSDK_HAS_DWT_CYCCNT#

The chip supports DWT CYCCNT or not. 




MSDK_INVALID_IRQ_HANDLER#

Invalid IRQ handler address. 




LPC_ACOMP: Analog comparator Driver#


void ACOMP_Init(ACOMP_Type *base, const acomp_config_t *config)#

Initialize the ACOMP module. 

Parameters:

base – ACOMP peripheral base address. 
config – Pointer to “acomp_config_t” structure. 







void ACOMP_Deinit(ACOMP_Type *base)#

De-initialize the ACOMP module. 

Parameters:

base – ACOMP peripheral base address. 







void ACOMP_GetDefaultConfig(acomp_config_t *config)#

Gets an available pre-defined settings for the ACOMP’s configuration. 
This function initializes the converter configuration structure with available settings. The default values are: 
config->enableSyncToBusClk = false;
config->hysteresisSelection = kACOMP_hysteresisNoneSelection;


 In default configuration, the ACOMP’s output would be used directly and switch as the voltages cross.

Parameters:

config – Pointer to the configuration structure. 







void ACOMP_EnableInterrupts(ACOMP_Type *base, acomp_interrupt_enable_t enable)#

Enable ACOMP interrupts. 

Parameters:

base – ACOMP peripheral base address. 
enable – Enable/Disable interrupt feature. 







static inline bool ACOMP_GetInterruptsStatusFlags(ACOMP_Type *base)#

Get interrupts status flags. 

Parameters:

base – ACOMP peripheral base address. 


Returns:
Reflect the state ACOMP edge-detect status, true or false. 






static inline void ACOMP_ClearInterruptsStatusFlags(ACOMP_Type *base)#

Clear the ACOMP interrupts status flags. 

Parameters:

base – ACOMP peripheral base address. 







static inline bool ACOMP_GetOutputStatusFlags(ACOMP_Type *base)#

Get ACOMP output status flags. 

Parameters:

base – ACOMP peripheral base address. 


Returns:
Reflect the state of the comparator output, true or false. 






static inline void ACOMP_SetInputChannel(ACOMP_Type *base, uint32_t postiveInputChannel, uint32_t negativeInputChannel)#

Set the ACOMP postive and negative input channel. 

Parameters:

base – ACOMP peripheral base address. 
postiveInputChannel – The index of postive input channel. 
negativeInputChannel – The index of negative input channel. 







void ACOMP_SetLadderConfig(ACOMP_Type *base, const acomp_ladder_config_t *config)#

Set the voltage ladder configuration. 

Parameters:

base – ACOMP peripheral base address. 
config – The structure for voltage ladder. If the config is NULL, voltage ladder would be diasbled, otherwise the voltage ladder would be configured and enabled. 







FSL_ACOMP_DRIVER_VERSION#

ACOMP driver version 2.1.0. 




enum _acomp_ladder_reference_voltage#

The ACOMP ladder reference voltage. 
Values:


enumerator kACOMP_LadderRefVoltagePinVDD#

Supply from pin VDD. 




enumerator kACOMP_LadderRefVoltagePinVDDCMP#

Supply from pin VDDCMP. 






enum _acomp_interrupt_enable#

The ACOMP interrupts enable. 
Values:


enumerator kACOMP_InterruptsFallingEdgeEnable#

Enable the falling edge interrupts. 




enumerator kACOMP_InterruptsRisingEdgeEnable#

Enable the rising edge interrupts. 




enumerator kACOMP_InterruptsBothEdgesEnable#

Enable the both edges interrupts. 




enumerator kACOMP_InterruptsDisable#

Disable the interrupts. 






enum _acomp_hysteresis_selection#

The ACOMP hysteresis selection. 
Values:


enumerator kACOMP_HysteresisNoneSelection#

None (the output will switch as the voltages cross). 




enumerator kACOMP_Hysteresis5MVSelection#

5mV. 




enumerator kACOMP_Hysteresis10MVSelection#

10mV. 




enumerator kACOMP_Hysteresis20MVSelection#

20mV. 






typedef enum _acomp_ladder_reference_voltage acomp_ladder_reference_voltage_t#

The ACOMP ladder reference voltage. 




typedef enum _acomp_interrupt_enable acomp_interrupt_enable_t#

The ACOMP interrupts enable. 




typedef enum _acomp_hysteresis_selection acomp_hysteresis_selection_t#

The ACOMP hysteresis selection. 




typedef struct _acomp_config acomp_config_t#

The structure for ACOMP basic configuration. 




typedef struct _acomp_ladder_config acomp_ladder_config_t#

The structure for ACOMP voltage ladder. 




struct _acomp_config#


#include <fsl_acomp.h>
The structure for ACOMP basic configuration. 

Public Members


bool enableSyncToBusClk#

If true, Comparator output is synchronized to the bus clock for output to other modules. If false, Comparator output is used directly. 




acomp_hysteresis_selection_t hysteresisSelection#

Controls the hysteresis of the comparator. 







struct _acomp_ladder_config#


#include <fsl_acomp.h>
The structure for ACOMP voltage ladder. 

Public Members


uint8_t ladderValue#

Voltage ladder value. 00000 = Vss, 00001 = 1*Vref/31, …, 11111 = Vref. 




acomp_ladder_reference_voltage_t referenceVoltage#

Selects the reference voltage(Vref) for the voltage ladder. 







ADC: 12-bit SAR Analog-to-Digital Converter Driver#


void ADC_Init(ADC_Type *base, const adc_config_t *config)#

Initialize the ADC module. 

Parameters:

base – ADC peripheral base address. 
config – Pointer to configuration structure, see to adc_config_t. 







void ADC_Deinit(ADC_Type *base)#

Deinitialize the ADC module. 

Parameters:

base – ADC peripheral base address. 







void ADC_GetDefaultConfig(adc_config_t *config)#

Gets an available pre-defined settings for initial configuration. 
This function initializes the initial configuration structure with an available settings. The default values are: 
config->clockMode = kADC_ClockSynchronousMode;
config->clockDividerNumber = 0U;
config->resolution = kADC_Resolution12bit;
config->enableBypassCalibration = false;
config->sampleTimeNumber = 0U;
config->extendSampleTimeNumber = kADC_ExtendSampleTimeNotUsed;


 

Parameters:

config – Pointer to configuration structure. 







bool ADC_DoSelfCalibration(ADC_Type *base)#

Do the hardware self-calibration. 


Deprecated:
Do not use this function. It has been superceded by ADC_DoOffsetCalibration.



To calibrate the ADC, set the ADC clock to 500 kHz. In order to achieve the specified ADC accuracy, the A/D converter must be recalibrated, at a minimum, following every chip reset before initiating normal ADC operation.

Parameters:

base – ADC peripheral base address. 


Return values:

true – Calibration succeed. 
false – Calibration failed. 







bool ADC_DoOffsetCalibration(ADC_Type *base, uint32_t frequency)#

Do the hardware offset-calibration. 
To calibrate the ADC, set the ADC clock to no more then 30 MHz. In order to achieve the specified ADC accuracy, the A/D converter must be recalibrated, at a minimum, following every chip reset before initiating normal ADC operation.

Parameters:

base – ADC peripheral base address. 
frequency – The clock frequency that ADC operates at. 


Return values:

true – Calibration succeed. 
false – Calibration failed. 







static inline void ADC_EnableConvSeqA(ADC_Type *base, bool enable)#

Enable the conversion sequence A. 
In order to avoid spuriously triggering the sequence, the trigger to conversion sequence should be ready before the sequence is ready. when the sequence is disabled, the trigger would be ignored. Also, it is suggested to disable the sequence during changing the sequence’s setting.

Parameters:

base – ADC peripheral base address. 
enable – Switcher to enable the feature or not. 







void ADC_SetConvSeqAConfig(ADC_Type *base, const adc_conv_seq_config_t *config)#

Configure the conversion sequence A. 

Parameters:

base – ADC peripheral base address. 
config – Pointer to configuration structure, see to adc_conv_seq_config_t. 







static inline void ADC_DoSoftwareTriggerConvSeqA(ADC_Type *base)#

Do trigger the sequence’s conversion by software. 

Parameters:

base – ADC peripheral base address. 







static inline void ADC_EnableConvSeqABurstMode(ADC_Type *base, bool enable)#

Enable the burst conversion of sequence A. 
Enable the burst mode would cause the conversion sequence to be cntinuously cycled through. Other triggers would be ignored while this mode is enabled. Repeated conversions could be halted by disabling this mode. And the sequence currently in process will be completed before cnversions are terminated. Note that a new sequence could begin just before the burst mode is disabled.

Parameters:

base – ADC peripheral base address. 
enable – Switcher to enable this feature. 







static inline void ADC_SetConvSeqAHighPriority(ADC_Type *base)#

Set the high priority for conversion sequence A. 

Parameters:

base – ADC peripheral bass address. 







static inline void ADC_EnableConvSeqB(ADC_Type *base, bool enable)#

Enable the conversion sequence B. 
In order to avoid spuriously triggering the sequence, the trigger to conversion sequence should be ready before the sequence is ready. when the sequence is disabled, the trigger would be ignored. Also, it is suggested to disable the sequence during changing the sequence’s setting.

Parameters:

base – ADC peripheral base address. 
enable – Switcher to enable the feature or not. 







void ADC_SetConvSeqBConfig(ADC_Type *base, const adc_conv_seq_config_t *config)#

Configure the conversion sequence B. 

Parameters:

base – ADC peripheral base address. 
config – Pointer to configuration structure, see to adc_conv_seq_config_t. 







static inline void ADC_DoSoftwareTriggerConvSeqB(ADC_Type *base)#

Do trigger the sequence’s conversion by software. 

Parameters:

base – ADC peripheral base address. 







static inline void ADC_EnableConvSeqBBurstMode(ADC_Type *base, bool enable)#

Enable the burst conversion of sequence B. 
Enable the burst mode would cause the conversion sequence to be continuously cycled through. Other triggers would be ignored while this mode is enabled. Repeated conversions could be halted by disabling this mode. And the sequence currently in process will be completed before cnversions are terminated. Note that a new sequence could begin just before the burst mode is disabled.

Parameters:

base – ADC peripheral base address. 
enable – Switcher to enable this feature. 







static inline void ADC_SetConvSeqBHighPriority(ADC_Type *base)#

Set the high priority for conversion sequence B. 

Parameters:

base – ADC peripheral bass address. 







bool ADC_GetConvSeqAGlobalConversionResult(ADC_Type *base, adc_result_info_t *info)#

Get the global ADC conversion infomation of sequence A. 

Parameters:

base – ADC peripheral base address. 
info – Pointer to information structure, see to adc_result_info_t; 


Return values:

true – The conversion result is ready. 
false – The conversion result is not ready yet. 







bool ADC_GetConvSeqBGlobalConversionResult(ADC_Type *base, adc_result_info_t *info)#

Get the global ADC conversion infomation of sequence B. 

Parameters:

base – ADC peripheral base address. 
info – Pointer to information structure, see to adc_result_info_t; 


Return values:

true – The conversion result is ready. 
false – The conversion result is not ready yet. 







bool ADC_GetChannelConversionResult(ADC_Type *base, uint32_t channel, adc_result_info_t *info)#

Get the channel’s ADC conversion completed under each conversion sequence. 

Parameters:

base – ADC peripheral base address. 
channel – The indicated channel number. 
info – Pointer to information structure, see to adc_result_info_t; 


Return values:

true – The conversion result is ready. 
false – The conversion result is not ready yet. 







static inline void ADC_SetThresholdPair0(ADC_Type *base, uint32_t lowValue, uint32_t highValue)#

Set the threshhold pair 0 with low and high value. 

Parameters:

base – ADC peripheral base address. 
lowValue – LOW threshold value. 
highValue – HIGH threshold value. 







static inline void ADC_SetThresholdPair1(ADC_Type *base, uint32_t lowValue, uint32_t highValue)#

Set the threshhold pair 1 with low and high value. 

Parameters:

base – ADC peripheral base address. 
lowValue – LOW threshold value. The available value is with 12-bit. 
highValue – HIGH threshold value. The available value is with 12-bit. 







static inline void ADC_SetChannelWithThresholdPair0(ADC_Type *base, uint32_t channelMask)#

Set given channels to apply the threshold pare 0. 

Parameters:

base – ADC peripheral base address. 
channelMask – Indicated channels’ mask. 







static inline void ADC_SetChannelWithThresholdPair1(ADC_Type *base, uint32_t channelMask)#

Set given channels to apply the threshold pare 1. 

Parameters:

base – ADC peripheral base address. 
channelMask – Indicated channels’ mask. 







static inline void ADC_EnableInterrupts(ADC_Type *base, uint32_t mask)#

Enable interrupts for conversion sequences. 

Parameters:

base – ADC peripheral base address. 
mask – Mask of interrupt mask value for global block except each channal, see to _adc_interrupt_enable. 







static inline void ADC_DisableInterrupts(ADC_Type *base, uint32_t mask)#

Disable interrupts for conversion sequence. 

Parameters:

base – ADC peripheral base address. 
mask – Mask of interrupt mask value for global block except each channel, see to _adc_interrupt_enable. 







static inline void ADC_EnableThresholdCompareInterrupt(ADC_Type *base, uint32_t channel, adc_threshold_interrupt_mode_t mode)#

Enable the interrupt of threshold compare event for each channel. 

Parameters:

base – ADC peripheral base address. 
channel – Channel number. 
mode – Interrupt mode for threshold compare event, see to adc_threshold_interrupt_mode_t. 







static inline uint32_t ADC_GetStatusFlags(ADC_Type *base)#

Get status flags of ADC module. 

Parameters:

base – ADC peripheral base address. 


Returns:
Mask of status flags of module, see to _adc_status_flags. 






static inline void ADC_ClearStatusFlags(ADC_Type *base, uint32_t mask)#

Clear status flags of ADC module. 

Parameters:

base – ADC peripheral base address. 
mask – Mask of status flags of module, see to _adc_status_flags. 







FSL_ADC_DRIVER_VERSION#

ADC driver version 2.6.0. 




enum _adc_status_flags#

Flags. 
Values:


enumerator kADC_ThresholdCompareFlagOnChn0#

Threshold comparison event on Channel 0. 




enumerator kADC_ThresholdCompareFlagOnChn1#

Threshold comparison event on Channel 1. 




enumerator kADC_ThresholdCompareFlagOnChn2#

Threshold comparison event on Channel 2. 




enumerator kADC_ThresholdCompareFlagOnChn3#

Threshold comparison event on Channel 3. 




enumerator kADC_ThresholdCompareFlagOnChn4#

Threshold comparison event on Channel 4. 




enumerator kADC_ThresholdCompareFlagOnChn5#

Threshold comparison event on Channel 5. 




enumerator kADC_ThresholdCompareFlagOnChn6#

Threshold comparison event on Channel 6. 




enumerator kADC_ThresholdCompareFlagOnChn7#

Threshold comparison event on Channel 7. 




enumerator kADC_ThresholdCompareFlagOnChn8#

Threshold comparison event on Channel 8. 




enumerator kADC_ThresholdCompareFlagOnChn9#

Threshold comparison event on Channel 9. 




enumerator kADC_ThresholdCompareFlagOnChn10#

Threshold comparison event on Channel 10. 




enumerator kADC_ThresholdCompareFlagOnChn11#

Threshold comparison event on Channel 11. 




enumerator kADC_OverrunFlagForChn0#

Mirror the OVERRUN status flag from the result register for ADC channel 0. 




enumerator kADC_OverrunFlagForChn1#

Mirror the OVERRUN status flag from the result register for ADC channel 1. 




enumerator kADC_OverrunFlagForChn2#

Mirror the OVERRUN status flag from the result register for ADC channel 2. 




enumerator kADC_OverrunFlagForChn3#

Mirror the OVERRUN status flag from the result register for ADC channel 3. 




enumerator kADC_OverrunFlagForChn4#

Mirror the OVERRUN status flag from the result register for ADC channel 4. 




enumerator kADC_OverrunFlagForChn5#

Mirror the OVERRUN status flag from the result register for ADC channel 5. 




enumerator kADC_OverrunFlagForChn6#

Mirror the OVERRUN status flag from the result register for ADC channel 6. 




enumerator kADC_OverrunFlagForChn7#

Mirror the OVERRUN status flag from the result register for ADC channel 7. 




enumerator kADC_OverrunFlagForChn8#

Mirror the OVERRUN status flag from the result register for ADC channel 8. 




enumerator kADC_OverrunFlagForChn9#

Mirror the OVERRUN status flag from the result register for ADC channel 9. 




enumerator kADC_OverrunFlagForChn10#

Mirror the OVERRUN status flag from the result register for ADC channel 10. 




enumerator kADC_OverrunFlagForChn11#

Mirror the OVERRUN status flag from the result register for ADC channel 11. 




enumerator kADC_GlobalOverrunFlagForSeqA#

Mirror the glabal OVERRUN status flag for conversion sequence A. 




enumerator kADC_GlobalOverrunFlagForSeqB#

Mirror the global OVERRUN status flag for conversion sequence B. 




enumerator kADC_ConvSeqAInterruptFlag#

Sequence A interrupt/DMA trigger. 




enumerator kADC_ConvSeqBInterruptFlag#

Sequence B interrupt/DMA trigger. 




enumerator kADC_ThresholdCompareInterruptFlag#

Threshold comparision interrupt flag. 




enumerator kADC_OverrunInterruptFlag#

Overrun interrupt flag. 






enum _adc_interrupt_enable#

Interrupts. 

Note
Not all the interrupt options are listed here 

Values:


enumerator kADC_ConvSeqAInterruptEnable#

Enable interrupt upon completion of each individual conversion in sequence A, or entire sequence. 




enumerator kADC_ConvSeqBInterruptEnable#

Enable interrupt upon completion of each individual conversion in sequence B, or entire sequence. 




enumerator kADC_OverrunInterruptEnable#

Enable the detection of an overrun condition on any of the channel data registers will cause an overrun interrupt/DMA trigger. 






enum _adc_clock_mode#

Define selection of clock mode. 
Values:


enumerator kADC_ClockSynchronousMode#

The ADC clock would be derived from the system clock based on “clockDividerNumber”. 




enumerator kADC_ClockAsynchronousMode#

The ADC clock would be based on the SYSCON block’s divider. 






enum _adc_resolution#

Define selection of resolution. 
Values:


enumerator kADC_Resolution6bit#

6-bit resolution. 




enumerator kADC_Resolution8bit#

8-bit resolution. 




enumerator kADC_Resolution10bit#

10-bit resolution. 




enumerator kADC_Resolution12bit#

12-bit resolution. 






enum _adc_voltage_range#

Definfe range of the analog supply voltage VDDA. 
Values:


enumerator kADC_HighVoltageRange#





enumerator kADC_LowVoltageRange#







enum _adc_trigger_polarity#

Define selection of polarity of selected input trigger for conversion sequence. 
Values:


enumerator kADC_TriggerPolarityNegativeEdge#

A negative edge launches the conversion sequence on the trigger(s). 




enumerator kADC_TriggerPolarityPositiveEdge#

A positive edge launches the conversion sequence on the trigger(s). 






enum _adc_priority#

Define selection of conversion sequence’s priority. 
Values:


enumerator kADC_PriorityLow#

This sequence would be preempted when another sequence is started. 




enumerator kADC_PriorityHigh#

This sequence would preempt other sequence even when it is started. 






enum _adc_seq_interrupt_mode#

Define selection of conversion sequence’s interrupt. 
Values:


enumerator kADC_InterruptForEachConversion#

The sequence interrupt/DMA trigger will be set at the end of each individual ADC conversion inside this conversion sequence. 




enumerator kADC_InterruptForEachSequence#

The sequence interrupt/DMA trigger will be set when the entire set of this sequence conversions completes. 






enum _adc_threshold_compare_status#

Define status of threshold compare result. 
Values:


enumerator kADC_ThresholdCompareInRange#

LOW threshold <= conversion value <= HIGH threshold. 




enumerator kADC_ThresholdCompareBelowRange#

conversion value < LOW threshold. 




enumerator kADC_ThresholdCompareAboveRange#

conversion value > HIGH threshold. 






enum _adc_threshold_crossing_status#

Define status of threshold crossing detection result. 
Values:


enumerator kADC_ThresholdCrossingNoDetected#

No threshold Crossing detected. 




enumerator kADC_ThresholdCrossingDownward#

Downward Threshold Crossing detected. 




enumerator kADC_ThresholdCrossingUpward#

Upward Threshold Crossing Detected. 






enum _adc_threshold_interrupt_mode#

Define interrupt mode for threshold compare event. 
Values:


enumerator kADC_ThresholdInterruptDisabled#

Threshold comparison interrupt is disabled. 




enumerator kADC_ThresholdInterruptOnOutside#

Threshold comparison interrupt is enabled on outside threshold. 




enumerator kADC_ThresholdInterruptOnCrossing#

Threshold comparison interrupt is enabled on crossing threshold. 






enum _adc_inforesultshift#

Define the info result mode of different resolution. 
Values:


enumerator kADC_Resolution12bitInfoResultShift#

Info result shift of Resolution12bit. 




enumerator kADC_Resolution10bitInfoResultShift#

Info result shift of Resolution10bit. 




enumerator kADC_Resolution8bitInfoResultShift#

Info result shift of Resolution8bit. 




enumerator kADC_Resolution6bitInfoResultShift#

Info result shift of Resolution6bit. 






enum _adc_tempsensor_common_mode#

Define common modes for Temerature sensor. 
Values:


enumerator kADC_HighNegativeOffsetAdded#

Temperature sensor common mode: high negative offset added. 




enumerator kADC_IntermediateNegativeOffsetAdded#

Temperature sensor common mode: intermediate negative offset added. 




enumerator kADC_NoOffsetAdded#

Temperature sensor common mode: no offset added. 




enumerator kADC_LowPositiveOffsetAdded#

Temperature sensor common mode: low positive offset added. 






enum _adc_second_control#

Define source impedance modes for GPADC control. 
Values:


enumerator kADC_Impedance621Ohm#

Extand ADC sampling time according to source impedance 1: 0.621 kOhm. 




enumerator kADC_Impedance55kOhm#

Extand ADC sampling time according to source impedance 20 (default): 55 kOhm. 




enumerator kADC_Impedance87kOhm#

Extand ADC sampling time according to source impedance 31: 87 kOhm. 




enumerator kADC_NormalFunctionalMode#

TEST mode: Normal functional mode. 




enumerator kADC_MultiplexeTestMode#

TEST mode: Multiplexer test mode. 




enumerator kADC_ADCInUnityGainMode#

TEST mode: ADC in unity gain mode. 






typedef enum _adc_clock_mode adc_clock_mode_t#

Define selection of clock mode. 




typedef enum _adc_resolution adc_resolution_t#

Define selection of resolution. 




typedef enum _adc_voltage_range adc_vdda_range_t#

Definfe range of the analog supply voltage VDDA. 




typedef enum _adc_trigger_polarity adc_trigger_polarity_t#

Define selection of polarity of selected input trigger for conversion sequence. 




typedef enum _adc_priority adc_priority_t#

Define selection of conversion sequence’s priority. 




typedef enum _adc_seq_interrupt_mode adc_seq_interrupt_mode_t#

Define selection of conversion sequence’s interrupt. 




typedef enum _adc_threshold_compare_status adc_threshold_compare_status_t#

Define status of threshold compare result. 




typedef enum _adc_threshold_crossing_status adc_threshold_crossing_status_t#

Define status of threshold crossing detection result. 




typedef enum _adc_threshold_interrupt_mode adc_threshold_interrupt_mode_t#

Define interrupt mode for threshold compare event. 




typedef enum _adc_inforesultshift adc_inforesult_t#

Define the info result mode of different resolution. 




typedef enum _adc_tempsensor_common_mode adc_tempsensor_common_mode_t#

Define common modes for Temerature sensor. 




typedef enum _adc_second_control adc_second_control_t#

Define source impedance modes for GPADC control. 




typedef struct _adc_config adc_config_t#

Define structure for configuring the block. 




typedef struct _adc_conv_seq_config adc_conv_seq_config_t#

Define structure for configuring conversion sequence. 




typedef struct _adc_result_info adc_result_info_t#

Define structure of keeping conversion result information. 




struct _adc_config#


#include <fsl_adc.h>
Define structure for configuring the block. 

Public Members


adc_clock_mode_t clockMode#

Select the clock mode for ADC converter. 




uint32_t clockDividerNumber#

This field is only available when using kADC_ClockSynchronousMode for “clockMode” field. The divider would be plused by 1 based on the value in this field. The available range is in 8 bits. 




adc_resolution_t resolution#

Select the conversion bits. 




bool enableBypassCalibration#

By default, a calibration cycle must be performed each time the chip is powered-up. Re-calibration may be warranted periodically - especially if operating conditions have changed. To enable this option would avoid the need to calibrate if offset error is not a concern in the application. 




uint32_t sampleTimeNumber#

By default, with value as “0U”, the sample period would be 2.5 ADC clocks. Then, to plus the “sampleTimeNumber” value here. The available value range is in 3 bits. 




bool enableLowPowerMode#

If disable low-power mode, ADC remains activated even when no conversions are requested. If enable low-power mode, The ADC is automatically powered-down when no conversions are taking place. 




adc_vdda_range_t voltageRange#

Configure the ADC for the appropriate operating range of the analog supply voltage VDDA. Failure to set the area correctly causes the ADC to return incorrect conversion results. 







struct _adc_conv_seq_config#


#include <fsl_adc.h>
Define structure for configuring conversion sequence. 

Public Members


uint32_t channelMask#

Selects which one or more of the ADC channels will be sampled and converted when this sequence is launched. The masked channels would be involved in current conversion sequence, beginning with the lowest-order. The available range is in 12-bit. 




uint32_t triggerMask#

Selects which one or more of the available hardware trigger sources will cause this conversion sequence to be initiated. The available range is 6-bit. 




adc_trigger_polarity_t triggerPolarity#

Select the trigger to launch conversion sequence. 




bool enableSyncBypass#

To enable this feature allows the hardware trigger input to bypass synchronization flip-flop stages and therefore shorten the time between the trigger input signal and the start of a conversion. 




bool enableSingleStep#

When enabling this feature, a trigger will launch a single conversion on the next channel in the sequence instead of the default response of launching an entire sequence of conversions. 




adc_seq_interrupt_mode_t interruptMode#

Select the interrpt/DMA trigger mode. 




uint8_t seqSampleTimeNumber#

Conversion sequence sampling time. 







struct _adc_result_info#


#include <fsl_adc.h>
Define structure of keeping conversion result information. 

Public Members


uint32_t result#

Keep the conversion data value. 




adc_threshold_compare_status_t thresholdCompareStatus#

Keep the threshold compare status. 




adc_threshold_crossing_status_t thresholdCorssingStatus#

Keep the threshold crossing status. 




uint32_t channelNumber#

Keep the channel number for this conversion. 




bool overrunFlag#

Keep the status whether the conversion is overrun or not. 







GPIO: General Purpose I/O#


void GPIO_PortInit(GPIO_Type *base, uint32_t port)#

Initializes the GPIO peripheral. 
This function ungates the GPIO clock.

Parameters:

base – GPIO peripheral base pointer. 
port – GPIO port number. 







void GPIO_PinInit(GPIO_Type *base, uint32_t port, uint32_t pin, const gpio_pin_config_t *config)#

Initializes a GPIO pin used by the board. 
To initialize the GPIO, define a pin configuration, either input or output, in the user file. Then, call the GPIO_PinInit() function.
This is an example to define an input pin or output pin configuration: 
Define a digital input pin configuration,
gpio_pin_config_t config =
{
  kGPIO_DigitalInput,
  0,
}
Define a digital output pin configuration,
gpio_pin_config_t config =
{
  kGPIO_DigitalOutput,
  0,
}




Parameters:

base – GPIO peripheral base pointer(Typically GPIO) 
port – GPIO port number 
pin – GPIO pin number 
config – GPIO pin configuration pointer 







static inline void GPIO_PinWrite(GPIO_Type *base, uint32_t port, uint32_t pin, uint8_t output)#

Sets the output level of the one GPIO pin to the logic 1 or 0. 

Parameters:

base – GPIO peripheral base pointer(Typically GPIO) 
port – GPIO port number 
pin – GPIO pin number 
output – GPIO pin output logic level.

0: corresponding pin output low-logic level.
1: corresponding pin output high-logic level. 









static inline uint32_t GPIO_PinRead(GPIO_Type *base, uint32_t port, uint32_t pin)#

Reads the current input value of the GPIO PIN. 

Parameters:

base – GPIO peripheral base pointer(Typically GPIO) 
port – GPIO port number 
pin – GPIO pin number 


Return values:
GPIO – port input value

0: corresponding pin input low-logic level.
1: corresponding pin input high-logic level. 








FSL_GPIO_DRIVER_VERSION#

LPC GPIO driver version. 




enum _gpio_pin_direction#

LPC GPIO direction definition. 
Values:


enumerator kGPIO_DigitalInput#

Set current pin as digital input 




enumerator kGPIO_DigitalOutput#

Set current pin as digital output 






typedef enum _gpio_pin_direction gpio_pin_direction_t#

LPC GPIO direction definition. 




typedef struct _gpio_pin_config gpio_pin_config_t#

The GPIO pin configuration structure. 
Every pin can only be configured as either output pin or input pin at a time. If configured as a input pin, then leave the outputConfig unused. 




static inline void GPIO_PortSet(GPIO_Type *base, uint32_t port, uint32_t mask)#

Sets the output level of the multiple GPIO pins to the logic 1. 

Parameters:

base – GPIO peripheral base pointer(Typically GPIO) 
port – GPIO port number 
mask – GPIO pin number macro 







static inline void GPIO_PortClear(GPIO_Type *base, uint32_t port, uint32_t mask)#

Sets the output level of the multiple GPIO pins to the logic 0. 

Parameters:

base – GPIO peripheral base pointer(Typically GPIO) 
port – GPIO port number 
mask – GPIO pin number macro 







static inline void GPIO_PortToggle(GPIO_Type *base, uint32_t port, uint32_t mask)#

Reverses current output logic of the multiple GPIO pins. 

Parameters:

base – GPIO peripheral base pointer(Typically GPIO) 
port – GPIO port number 
mask – GPIO pin number macro 







struct _gpio_pin_config#


#include <fsl_gpio.h>
The GPIO pin configuration structure. 
Every pin can only be configured as either output pin or input pin at a time. If configured as a input pin, then leave the outputConfig unused. 

Public Members


gpio_pin_direction_t pinDirection#

GPIO direction, input or output 




uint8_t outputLogic#

Set default output logic, no use in input 







IOCON: I/O pin configuration#


LPC_IOCON_DRIVER_VERSION#

IOCON driver version 2.0.2. 




typedef struct _iocon_group iocon_group_t#

Array of IOCON pin definitions passed to IOCON_SetPinMuxing() must be in this format. 




__STATIC_INLINE void IOCON_PinMuxSet (IOCON_Type *base, uint8_t ionumber, uint32_t modefunc)
IOCON function and mode selection definitions. 

Sets I/O Control pin mux 

Note
See the User Manual for specific modes and functions supported by the various pins.


Parameters:

base – : The base of IOCON peripheral on the chip 
ionumber – : GPIO number to mux 
modefunc – : OR’ed values of type IOCON_* 


Returns:
Nothing 






__STATIC_INLINE void IOCON_SetPinMuxing (IOCON_Type *base, const iocon_group_t *pinArray, uint32_t arrayLength)
Set all I/O Control pin muxing. 

Parameters:

base – : The base of IOCON peripheral on the chip 
pinArray – : Pointer to array of pin mux selections 
arrayLength – : Number of entries in pinArray 


Returns:
Nothing 






FSL_COMPONENT_ID#





struct _iocon_group#


#include <fsl_iocon.h>
Array of IOCON pin definitions passed to IOCON_SetPinMuxing() must be in this format. 




MRT: Multi-Rate Timer#


void MRT_Init(MRT_Type *base, const mrt_config_t *config)#

Ungates the MRT clock and configures the peripheral for basic operation. 

Note
This API should be called at the beginning of the application using the MRT driver.


Parameters:

base – Multi-Rate timer peripheral base address 
config – Pointer to user’s MRT config structure. If MRT has MULTITASK bit field in MODCFG reigster, param config is useless. 







void MRT_Deinit(MRT_Type *base)#

Gate the MRT clock. 

Parameters:

base – Multi-Rate timer peripheral base address 







static inline void MRT_GetDefaultConfig(mrt_config_t *config)#

Fill in the MRT config struct with the default settings. 
The default values are: 
config->enableMultiTask = false;


 

Parameters:

config – Pointer to user’s MRT config structure. 







static inline void MRT_SetupChannelMode(MRT_Type *base, mrt_chnl_t channel, const mrt_timer_mode_t mode)#

Sets up an MRT channel mode. 

Parameters:

base – Multi-Rate timer peripheral base address 
channel – Channel that is being configured. 
mode – Timer mode to use for the channel. 







static inline void MRT_EnableInterrupts(MRT_Type *base, mrt_chnl_t channel, uint32_t mask)#

Enables the MRT interrupt. 

Parameters:

base – Multi-Rate timer peripheral base address 
channel – Timer channel number 
mask – The interrupts to enable. This is a logical OR of members of the enumeration mrt_interrupt_enable_t







static inline void MRT_DisableInterrupts(MRT_Type *base, mrt_chnl_t channel, uint32_t mask)#

Disables the selected MRT interrupt. 

Parameters:

base – Multi-Rate timer peripheral base address 
channel – Timer channel number 
mask – The interrupts to disable. This is a logical OR of members of the enumeration mrt_interrupt_enable_t







static inline uint32_t MRT_GetEnabledInterrupts(MRT_Type *base, mrt_chnl_t channel)#

Gets the enabled MRT interrupts. 

Parameters:

base – Multi-Rate timer peripheral base address 
channel – Timer channel number


Returns:
The enabled interrupts. This is the logical OR of members of the enumeration mrt_interrupt_enable_t






static inline uint32_t MRT_GetStatusFlags(MRT_Type *base, mrt_chnl_t channel)#

Gets the MRT status flags. 

Parameters:

base – Multi-Rate timer peripheral base address 
channel – Timer channel number


Returns:
The status flags. This is the logical OR of members of the enumeration mrt_status_flags_t






static inline void MRT_ClearStatusFlags(MRT_Type *base, mrt_chnl_t channel, uint32_t mask)#

Clears the MRT status flags. 

Parameters:

base – Multi-Rate timer peripheral base address 
channel – Timer channel number 
mask – The status flags to clear. This is a logical OR of members of the enumeration mrt_status_flags_t







void MRT_UpdateTimerPeriod(MRT_Type *base, mrt_chnl_t channel, uint32_t count, bool immediateLoad)#

Used to update the timer period in units of count. 
The new value will be immediately loaded or will be loaded at the end of the current time interval. For one-shot interrupt mode the new value will be immediately loaded.

Note
User can call the utility macros provided in fsl_common.h to convert to ticks


Parameters:

base – Multi-Rate timer peripheral base address 
channel – Timer channel number 
count – Timer period in units of ticks 
immediateLoad – true: Load the new value immediately into the TIMER register; false: Load the new value at the end of current timer interval 







static inline uint32_t MRT_GetCurrentTimerCount(MRT_Type *base, mrt_chnl_t channel)#

Reads the current timer counting value. 
This function returns the real-time timer counting value, in a range from 0 to a timer period.

Note
User can call the utility macros provided in fsl_common.h to convert ticks to usec or msec


Parameters:

base – Multi-Rate timer peripheral base address 
channel – Timer channel number


Returns:
Current timer counting value in ticks 






static inline void MRT_StartTimer(MRT_Type *base, mrt_chnl_t channel, uint32_t count)#

Starts the timer counting. 
After calling this function, timers load period value, counts down to 0 and depending on the timer mode it will either load the respective start value again or stop.

Note
User can call the utility macros provided in fsl_common.h to convert to ticks


Parameters:

base – Multi-Rate timer peripheral base address 
channel – Timer channel number. 
count – Timer period in units of ticks. Count can contain the LOAD bit, which control the force load feature. 







static inline void MRT_StopTimer(MRT_Type *base, mrt_chnl_t channel)#

Stops the timer counting. 
This function stops the timer from counting.

Parameters:

base – Multi-Rate timer peripheral base address 
channel – Timer channel number. 







static inline uint32_t MRT_GetIdleChannel(MRT_Type *base)#

Find the available channel. 
This function returns the lowest available channel number.

Parameters:

base – Multi-Rate timer peripheral base address 







FSL_MRT_DRIVER_VERSION#





enum _mrt_chnl#

List of MRT channels. 
Values:


enumerator kMRT_Channel_0#

MRT channel number 0 




enumerator kMRT_Channel_1#

MRT channel number 1 




enumerator kMRT_Channel_2#

MRT channel number 2 




enumerator kMRT_Channel_3#

MRT channel number 3 






enum _mrt_timer_mode#

List of MRT timer modes. 
Values:


enumerator kMRT_RepeatMode#

Repeat Interrupt mode 




enumerator kMRT_OneShotMode#

One-shot Interrupt mode 




enumerator kMRT_OneShotStallMode#

One-shot stall mode 






enum _mrt_interrupt_enable#

List of MRT interrupts. 
Values:


enumerator kMRT_TimerInterruptEnable#

Timer interrupt enable 






enum _mrt_status_flags#

List of MRT status flags. 
Values:


enumerator kMRT_TimerInterruptFlag#

Timer interrupt flag 




enumerator kMRT_TimerRunFlag#

Indicates state of the timer 






typedef enum _mrt_chnl mrt_chnl_t#

List of MRT channels. 




typedef enum _mrt_timer_mode mrt_timer_mode_t#

List of MRT timer modes. 




typedef enum _mrt_interrupt_enable mrt_interrupt_enable_t#

List of MRT interrupts. 




typedef enum _mrt_status_flags mrt_status_flags_t#

List of MRT status flags. 




typedef struct _mrt_config mrt_config_t#

MRT configuration structure. 
This structure holds the configuration settings for the MRT peripheral. To initialize this structure to reasonable defaults, call the MRT_GetDefaultConfig() function and pass a pointer to your config structure instance.
The config struct can be made const so it resides in flash 




struct _mrt_config#


#include <fsl_mrt.h>
MRT configuration structure. 
This structure holds the configuration settings for the MRT peripheral. To initialize this structure to reasonable defaults, call the MRT_GetDefaultConfig() function and pass a pointer to your config structure instance.
The config struct can be made const so it resides in flash 

Public Members


bool enableMultiTask#

true: Timers run in multi-task mode; false: Timers run in hardware status mode 







PINT: Pin Interrupt and Pattern Match Driver#


FSL_PINT_DRIVER_VERSION#





enum _pint_pin_enable#

PINT Pin Interrupt enable type. 
Values:


enumerator kPINT_PinIntEnableNone#

Do not generate Pin Interrupt 




enumerator kPINT_PinIntEnableRiseEdge#

Generate Pin Interrupt on rising edge 




enumerator kPINT_PinIntEnableFallEdge#

Generate Pin Interrupt on falling edge 




enumerator kPINT_PinIntEnableBothEdges#

Generate Pin Interrupt on both edges 




enumerator kPINT_PinIntEnableLowLevel#

Generate Pin Interrupt on low level 




enumerator kPINT_PinIntEnableHighLevel#

Generate Pin Interrupt on high level 






enum _pint_int#

PINT Pin Interrupt type. 
Values:


enumerator kPINT_PinInt0#

Pin Interrupt 0 






enum _pint_pmatch_input_src#

PINT Pattern Match bit slice input source type. 
Values:


enumerator kPINT_PatternMatchInp0Src#

Input source 0 




enumerator kPINT_PatternMatchInp1Src#

Input source 1 




enumerator kPINT_PatternMatchInp2Src#

Input source 2 




enumerator kPINT_PatternMatchInp3Src#

Input source 3 




enumerator kPINT_PatternMatchInp4Src#

Input source 4 




enumerator kPINT_PatternMatchInp5Src#

Input source 5 




enumerator kPINT_PatternMatchInp6Src#

Input source 6 




enumerator kPINT_PatternMatchInp7Src#

Input source 7 




enumerator kPINT_SecPatternMatchInp0Src#

Input source 0 




enumerator kPINT_SecPatternMatchInp1Src#

Input source 1 






enum _pint_pmatch_bslice#

PINT Pattern Match bit slice type. 
Values:


enumerator kPINT_PatternMatchBSlice0#

Bit slice 0 






enum _pint_pmatch_bslice_cfg#

PINT Pattern Match configuration type. 
Values:


enumerator kPINT_PatternMatchAlways#

Always Contributes to product term match 




enumerator kPINT_PatternMatchStickyRise#

Sticky Rising edge 




enumerator kPINT_PatternMatchStickyFall#

Sticky Falling edge 




enumerator kPINT_PatternMatchStickyBothEdges#

Sticky Rising or Falling edge 




enumerator kPINT_PatternMatchHigh#

High level 




enumerator kPINT_PatternMatchLow#

Low level 




enumerator kPINT_PatternMatchNever#

Never contributes to product term match 




enumerator kPINT_PatternMatchBothEdges#

Either rising or falling edge 






typedef enum _pint_pin_enable pint_pin_enable_t#

PINT Pin Interrupt enable type. 




typedef enum _pint_int pint_pin_int_t#

PINT Pin Interrupt type. 




typedef enum _pint_pmatch_input_src pint_pmatch_input_src_t#

PINT Pattern Match bit slice input source type. 




typedef enum _pint_pmatch_bslice pint_pmatch_bslice_t#

PINT Pattern Match bit slice type. 




typedef enum _pint_pmatch_bslice_cfg pint_pmatch_bslice_cfg_t#

PINT Pattern Match configuration type. 




typedef struct _pint_status pint_status_t#

PINT event status. 




typedef void (*pint_cb_t)(pint_pin_int_t pintr, pint_status_t *status)#

PINT Callback function. 




typedef struct _pint_pmatch_cfg pint_pmatch_cfg_t#





void PINT_Init(PINT_Type *base)#

Initialize PINT peripheral. 
This function initializes the PINT peripheral and enables the clock.

Parameters:

base – Base address of the PINT peripheral.


Return values:
None. – 






void PINT_SetCallback(PINT_Type *base, pint_cb_t callback)#

Set PINT callback. 
This function set the callback for PINT interupt handler.

Parameters:

base – Base address of the PINT peripheral. 
callback – Callback.


Return values:
None. – 






void PINT_PinInterruptConfig(PINT_Type *base, pint_pin_int_t intr, pint_pin_enable_t enable)#

Configure PINT peripheral pin interrupt. 
This function configures a given pin interrupt.

Parameters:

base – Base address of the PINT peripheral. 
intr – Pin interrupt. 
enable – Selects detection logic.


Return values:
None. – 






void PINT_PinInterruptGetConfig(PINT_Type *base, pint_pin_int_t pintr, pint_pin_enable_t *enable)#

Get PINT peripheral pin interrupt configuration. 
This function returns the configuration of a given pin interrupt.

Parameters:

base – Base address of the PINT peripheral. 
pintr – Pin interrupt. 
enable – Pointer to store the detection logic.


Return values:
None. – 






void PINT_PinInterruptClrStatus(PINT_Type *base, pint_pin_int_t pintr)#

Clear Selected pin interrupt status only when the pin was triggered by edge-sensitive. 
This function clears the selected pin interrupt status.

Parameters:

base – Base address of the PINT peripheral. 
pintr – Pin interrupt.


Return values:
None. – 






static inline uint32_t PINT_PinInterruptGetStatus(PINT_Type *base, pint_pin_int_t pintr)#

Get Selected pin interrupt status. 
This function returns the selected pin interrupt status.

Parameters:

base – Base address of the PINT peripheral. 
pintr – Pin interrupt.


Return values:
status – = 0 No pin interrupt request. = 1 Selected Pin interrupt request active. 






void PINT_PinInterruptClrStatusAll(PINT_Type *base)#

Clear all pin interrupts status only when pins were triggered by edge-sensitive. 
This function clears the status of all pin interrupts.

Parameters:

base – Base address of the PINT peripheral.


Return values:
None. – 






static inline uint32_t PINT_PinInterruptGetStatusAll(PINT_Type *base)#

Get all pin interrupts status. 
This function returns the status of all pin interrupts.

Parameters:

base – Base address of the PINT peripheral.


Return values:
status – Each bit position indicates the status of corresponding pin interrupt. = 0 No pin interrupt request. = 1 Pin interrupt request active. 






static inline void PINT_PinInterruptClrFallFlag(PINT_Type *base, pint_pin_int_t pintr)#

Clear Selected pin interrupt fall flag. 
This function clears the selected pin interrupt fall flag.

Parameters:

base – Base address of the PINT peripheral. 
pintr – Pin interrupt.


Return values:
None. – 






static inline uint32_t PINT_PinInterruptGetFallFlag(PINT_Type *base, pint_pin_int_t pintr)#

Get selected pin interrupt fall flag. 
This function returns the selected pin interrupt fall flag.

Parameters:

base – Base address of the PINT peripheral. 
pintr – Pin interrupt.


Return values:
flag – = 0 Falling edge has not been detected. = 1 Falling edge has been detected. 






static inline void PINT_PinInterruptClrFallFlagAll(PINT_Type *base)#

Clear all pin interrupt fall flags. 
This function clears the fall flag for all pin interrupts.

Parameters:

base – Base address of the PINT peripheral.


Return values:
None. – 






static inline uint32_t PINT_PinInterruptGetFallFlagAll(PINT_Type *base)#

Get all pin interrupt fall flags. 
This function returns the fall flag of all pin interrupts.

Parameters:

base – Base address of the PINT peripheral.


Return values:
flags – Each bit position indicates the falling edge detection of the corresponding pin interrupt. 0 Falling edge has not been detected. = 1 Falling edge has been detected. 






static inline void PINT_PinInterruptClrRiseFlag(PINT_Type *base, pint_pin_int_t pintr)#

Clear Selected pin interrupt rise flag. 
This function clears the selected pin interrupt rise flag.

Parameters:

base – Base address of the PINT peripheral. 
pintr – Pin interrupt.


Return values:
None. – 






static inline uint32_t PINT_PinInterruptGetRiseFlag(PINT_Type *base, pint_pin_int_t pintr)#

Get selected pin interrupt rise flag. 
This function returns the selected pin interrupt rise flag.

Parameters:

base – Base address of the PINT peripheral. 
pintr – Pin interrupt.


Return values:
flag – = 0 Rising edge has not been detected. = 1 Rising edge has been detected. 






static inline void PINT_PinInterruptClrRiseFlagAll(PINT_Type *base)#

Clear all pin interrupt rise flags. 
This function clears the rise flag for all pin interrupts.

Parameters:

base – Base address of the PINT peripheral.


Return values:
None. – 






static inline uint32_t PINT_PinInterruptGetRiseFlagAll(PINT_Type *base)#

Get all pin interrupt rise flags. 
This function returns the rise flag of all pin interrupts.

Parameters:

base – Base address of the PINT peripheral.


Return values:
flags – Each bit position indicates the rising edge detection of the corresponding pin interrupt. 0 Rising edge has not been detected. = 1 Rising edge has been detected. 






void PINT_PatternMatchConfig(PINT_Type *base, pint_pmatch_bslice_t bslice, pint_pmatch_cfg_t *cfg)#

Configure PINT pattern match. 
This function configures a given pattern match bit slice.

Parameters:

base – Base address of the PINT peripheral. 
bslice – Pattern match bit slice number. 
cfg – Pointer to bit slice configuration.


Return values:
None. – 






void PINT_PatternMatchGetConfig(PINT_Type *base, pint_pmatch_bslice_t bslice, pint_pmatch_cfg_t *cfg)#

Get PINT pattern match configuration. 
This function returns the configuration of a given pattern match bit slice.

Parameters:

base – Base address of the PINT peripheral. 
bslice – Pattern match bit slice number. 
cfg – Pointer to bit slice configuration.


Return values:
None. – 






static inline uint32_t PINT_PatternMatchGetStatus(PINT_Type *base, pint_pmatch_bslice_t bslice)#

Get pattern match bit slice status. 
This function returns the status of selected bit slice.

Parameters:

base – Base address of the PINT peripheral. 
bslice – Pattern match bit slice number.


Return values:
status – = 0 Match has not been detected. = 1 Match has been detected. 






static inline uint32_t PINT_PatternMatchGetStatusAll(PINT_Type *base)#

Get status of all pattern match bit slices. 
This function returns the status of all bit slices.

Parameters:

base – Base address of the PINT peripheral.


Return values:
status – Each bit position indicates the match status of corresponding bit slice. = 0 Match has not been detected. = 1 Match has been detected. 






uint32_t PINT_PatternMatchResetDetectLogic(PINT_Type *base)#

Reset pattern match detection logic. 
This function resets the pattern match detection logic if any of the product term is matching.

Parameters:

base – Base address of the PINT peripheral.


Return values:
pmstatus – Each bit position indicates the match status of corresponding bit slice. = 0 Match was detected. = 1 Match was not detected. 






static inline void PINT_PatternMatchEnable(PINT_Type *base)#

Enable pattern match function. 
This function enables the pattern match function.

Parameters:

base – Base address of the PINT peripheral.


Return values:
None. – 






static inline void PINT_PatternMatchDisable(PINT_Type *base)#

Disable pattern match function. 
This function disables the pattern match function.

Parameters:

base – Base address of the PINT peripheral.


Return values:
None. – 






static inline void PINT_PatternMatchEnableRXEV(PINT_Type *base)#

Enable RXEV output. 
This function enables the pattern match RXEV output.

Parameters:

base – Base address of the PINT peripheral.


Return values:
None. – 






static inline void PINT_PatternMatchDisableRXEV(PINT_Type *base)#

Disable RXEV output. 
This function disables the pattern match RXEV output.

Parameters:

base – Base address of the PINT peripheral.


Return values:
None. – 






void PINT_EnableCallback(PINT_Type *base)#

Enable callback. 
This function enables the interrupt for the selected PINT peripheral. Although the pin(s) are monitored as soon as they are enabled, the callback function is not enabled until this function is called.

Parameters:

base – Base address of the PINT peripheral.


Return values:
None. – 






void PINT_DisableCallback(PINT_Type *base)#

Disable callback. 
This function disables the interrupt for the selected PINT peripheral. Although the pins are still being monitored but the callback function is not called.

Parameters:

base – Base address of the peripheral.


Return values:
None. – 






void PINT_Deinit(PINT_Type *base)#

Deinitialize PINT peripheral. 
This function disables the PINT clock.

Parameters:

base – Base address of the PINT peripheral.


Return values:
None. – 






void PINT_EnableCallbackByIndex(PINT_Type *base, pint_pin_int_t pintIdx)#

enable callback by pin index. 
This function enables callback by pin index instead of enabling all pins.

Parameters:

base – Base address of the peripheral. 
pintIdx – pin index.


Return values:
None. – 






void PINT_EnableInterruptByIndex(PINT_Type *base, pint_pin_int_t pintIdx)#

enable interrupt in NVIC by pin index. 
This function enables the interrupt in the NVIC. The difference with PINT_EnableCallbackByIndex() is that PINT_EnableCallbackByIndex() not only enables the interrupt in the NVIC but also clears pending interrupts. Use this function together with PINT_DisableInterruptByIndex() to temporarily disable/enable the pin interrupt. Use PINT_EnableCallbackByIndex() to enable the interrupt after installing the callback.

Parameters:

base – Base address of the peripheral. 
pinIdx – pin index.


Return values:
None. – 






void PINT_DisableInterruptByIndex(PINT_Type *base, pint_pin_int_t pintIdx)#

disable interrupt in NVIC by pin index. 
This function disables the interrupt in the NVIC. The difference with PINT_DisableCallbackByIndex() is that PINT_DisableCallbackByIndex() not only disables the interrupt in the NVIC but also clears pending interrupts. Use this function together with PINT_EnableInterruptByIndex() to temporarily disable/enable the pin interrupt. Use PINT_DisableCallbackByIndex() to disable the interrupt in a de-init function.

Parameters:

base – Base address of the peripheral. 
pinIdx – pin index.


Return values:
None. – 






void PINT_DisableCallbackByIndex(PINT_Type *base, pint_pin_int_t pintIdx)#

disable callback by pin index. 
This function disables callback by pin index instead of disabling all pins.

Parameters:

base – Base address of the peripheral. 
pintIdx – pin index.


Return values:
None. – 






void PINT_DriverIRQHandler(uint32_t instance)#

PINT parameterized IRQ handler entry. 

Parameters:

instance – PINT instance index. 







PINT_USE_LEGACY_CALLBACK#





PININT_BITSLICE_SRC_START#





PININT_BITSLICE_SRC_MASK#





PININT_BITSLICE_CFG_START#





PININT_BITSLICE_CFG_MASK#





PININT_BITSLICE_ENDP_MASK#





PINT_PIN_INT_LEVEL#





PINT_PIN_INT_EDGE#





PINT_PIN_INT_FALL_OR_HIGH_LEVEL#





PINT_PIN_INT_RISE#





PINT_PIN_RISE_EDGE#





PINT_PIN_FALL_EDGE#





PINT_PIN_BOTH_EDGE#





PINT_PIN_LOW_LEVEL#





PINT_PIN_HIGH_LEVEL#





struct _pint_status#


#include <fsl_pint.h>
PINT event status. 




struct _pint_pmatch_cfg#





Power#


enum pd_bits#

power down configurations mask 
Values:


enumerator kPDRUNCFG_PD_FRO_OUT#





enumerator kPDRUNCFG_PD_FRO#





enumerator kPDRUNCFG_PD_FLASH#





enumerator kPDRUNCFG_PD_BOD#





enumerator kPDRUNCFG_PD_ADC0#





enumerator kPDRUNCFG_PD_SYSOSC#





enumerator kPDRUNCFG_PD_LPO_OSC#





enumerator kPDRUNCFG_PD_SYSPLL#





enumerator kPDRUNCFG_PD_ACMP#





enumerator kPDRUNCFG_ForceUnsigned#







enum _power_wakeup#

Deep sleep and power down mode wake up configurations. 
Values:


enumerator kPDAWAKECFG_Wakeup_FRO_OUT#





enumerator kPDAWAKECFG_Wakeup_FRO#





enumerator kPDAWAKECFG_Wakeup_FLASH#





enumerator kPDAWAKECFG_Wakeup_BOD#





enumerator kPDAWAKECFG_Wakeup_ADC#





enumerator kPDAWAKECFG_Wakeup_SYSOSC#





enumerator kPDAWAKECFG_Wakeup_LP_OSC#





enumerator kPDAWAKECFG_Wakeup_ACMP#







enum _power_deep_sleep_active#

Deep sleep/power down mode active part. 
Values:


enumerator kPDSLEEPCFG_DeepSleepBODActive#





enumerator kPDSLEEPCFG_DeepSleepLPOscActive#







enum _power_gen_reg#

pmu general purpose register index 
Values:


enumerator kPmu_GenReg0#

general purpose register0 




enumerator kPmu_GenReg1#

general purpose register1 




enumerator kPmu_GenReg2#

general purpose register2 




enumerator kPmu_GenReg3#

general purpose register3 




enumerator kPmu_GenReg4#

DPDCTRL bit 31-8 






enum _power_mode_config#

Values:


enumerator kPmu_Sleep#





enumerator kPmu_Deep_Sleep#





enumerator kPmu_PowerDown#





enumerator kPmu_Deep_PowerDown#







enum _power_bod_reset_level#

BOD reset level, if VDD below reset level value, the reset will be asserted. 
Values:


enumerator kBod_ResetLevelReserved#

BOD Reset Level reserved. 




enumerator kBod_ResetLevel1#

BOD Reset Level1: 2.05V 




enumerator kBod_ResetLevel2#

BOD Reset Level2: 2.35V 




enumerator kBod_ResetLevel3#

BOD Reset Level3: 2.63V 






enum _power_bod_interrupt_level#

BOD interrupt level, if VDD below interrupt level value, the BOD interrupt will be asserted. 
Values:


enumerator kBod_InterruptLevelReserved#

BOD interrupt level reserved. 




enumerator kBod_InterruptLevel1#

BOD interrupt level1: 2.25V. 




enumerator kBod_InterruptLevel2#

BOD interrupt level2: 2.55V. 




enumerator kBod_InterruptLevel3#

BOD interrupt level3: 2.84V. 






typedef enum pd_bits pd_bit_t#

power down configurations mask 




typedef enum _power_gen_reg power_gen_reg_t#

pmu general purpose register index 




typedef enum _power_mode_config power_mode_cfg_t#





typedef enum _power_bod_reset_level power_bod_reset_level_t#

BOD reset level, if VDD below reset level value, the reset will be asserted. 




typedef enum _power_bod_interrupt_level power_bod_interrupt_level_t#

BOD interrupt level, if VDD below interrupt level value, the BOD interrupt will be asserted. 




FSL_POWER_DRIVER_VERSION#

power driver version 2.1.0. 




PMUC_PCON_RESERVED_MASK#

PMU PCON reserved mask, used to clear reserved field which should not write 1. 




POWER_EnbaleLPO#





POWER_EnbaleLPOInDeepPowerDownMode#





static inline void POWER_EnablePD(pd_bit_t en)#

API to enable PDRUNCFG bit in the Syscon. Note that enabling the bit powers down the peripheral. 

Parameters:

en – peripheral for which to enable the PDRUNCFG bit 


Returns:
none 






static inline void POWER_DisablePD(pd_bit_t en)#

API to disable PDRUNCFG bit in the Syscon. Note that disabling the bit powers up the peripheral. 

Parameters:

en – peripheral for which to disable the PDRUNCFG bit 


Returns:
none 






static inline void POWER_WakeUpConfig(uint32_t mask, bool powerDown)#

API to config wakeup configurations for deep sleep mode and power down mode. 

Parameters:

mask – wake up configurations for deep sleep mode and power down mode, reference _power_wakeup. 
powerDown – true is power down the mask part, false is powered part. 







static inline void POWER_DeepSleepConfig(uint32_t mask, bool powerDown)#

API to config active part for deep sleep mode and power down mode. 

Parameters:

mask – active part configurations for deep sleep mode and power down mode, reference _power_deep_sleep_active. 
powerDown – true is power down the mask part, false is powered part. 







static inline void POWER_EnableDeepSleep(void)#

API to enable deep sleep bit in the ARM Core. 

Returns:
none 






static inline void POWER_DisableDeepSleep(void)#

API to disable deep sleep bit in the ARM Core. 

Returns:
none 






void POWER_EnterSleep(void)#

API to enter sleep power mode. 

Returns:
none 






void POWER_EnterDeepSleep(uint32_t activePart)#

API to enter deep sleep power mode. 

Parameters:

activePart – should be a single or combine value of _power_deep_sleep_active . 


Returns:
none 






void POWER_EnterPowerDown(uint32_t activePart)#

API to enter power down mode. 

Parameters:

activePart – should be a single or combine value of _power_deep_sleep_active . 


Returns:
none 






void POWER_EnterDeepPowerDownMode(void)#

API to enter deep power down mode. 

Returns:
none 






static inline uint32_t POWER_GetSleepModeFlag(void)#

API to get sleep mode flag. 

Returns:
sleep mode flag: 0 is active mode, 1 is sleep mode entered. 






static inline void POWER_ClrSleepModeFlag(void)#

API to clear sleep mode flag. 




static inline uint32_t POWER_GetDeepPowerDownModeFlag(void)#

API to get deep power down mode flag. 

Returns:
sleep mode flag: 0 not deep power down, 1 is deep power down mode entered. 






static inline void POWER_ClrDeepPowerDownModeFlag(void)#

API to clear deep power down mode flag. 




static inline void POWER_EnableNonDpd(bool enable)#

API to enable non deep power down mode. 

Parameters:

enable – true is enable non deep power down, otherwise disable. 







static inline void POWER_EnableLPO(bool enable)#

API to enable LPO. 

Parameters:

enable – true to enable LPO, false to disable LPO. 







static inline void POWER_EnableLPOInDeepPowerDownMode(bool enable)#

API to enable LPO in deep power down mode. 

Parameters:

enable – true to enable LPO, false to disable LPO. 







static inline void POWER_SetRetainData(power_gen_reg_t index, uint32_t data)#

API to retore data to general purpose register which can be retain during deep power down mode. Note the kPMU_GenReg4 can retore 3 byte data only, so the general purpose register can store 19bytes data. 

Parameters:

index – general purpose data register index. 
data – data to restore. 







static inline uint32_t POWER_GetRetainData(power_gen_reg_t index)#

API to get data from general purpose register which retain during deep power down mode. Note the kPMU_GenReg4 can retore 3 byte data only, so the general purpose register can store 19bytes data. 

Parameters:

index – general purpose data register index. 


Returns:
data stored in the general purpose register. 






static inline void POWER_EnableWktClkIn(bool enable, bool enHysteresis)#

API to enable external clock input for self wake up timer. 

Parameters:

enable – true is enable external clock input for self-wake-up timer, otherwise disable. 
enHysteresis – true is enable Hysteresis for the pin, otherwise disable. 







static inline void POWER_EnableWakeupPinForDeepPowerDown(bool enable, bool enHysteresis)#

API to enable wake up pin for deep power down mode. 

Parameters:

enable – true is enable, otherwise disable. 
enHysteresis – true is enable Hysteresis for the pin, otherwise disable. 







static inline void POWER_EnableResetPinForDeepPowerDown(bool enable, bool enHysteresis)#

API to enable external clock input for self wake up timer. 

Parameters:

enable – true is enable , otherwise disable. 
enHysteresis – true is enable Hysteresis for the pin, otherwise disable. 







static inline void POWER_SetBodLevel(power_bod_reset_level_t resetLevel, power_bod_interrupt_level_t interruptLevel, bool enable)#

Set Bod interrupt level and reset level. 

Parameters:

resetLevel – BOD reset threshold level, please refer to power_bod_reset_level_t. 
interruptLevel – BOD interrupt threshold level, please refer to power_bod_interrupt_level_t. 
enable – Used to enable/disable the BOD interrupt and BOD reset. 







Reset#


enum _SYSCON_RSTn#

Enumeration for peripheral reset control bits. 
Defines the enumeration for peripheral reset control bits in PRESETCTRL/ASYNCPRESETCTRL registers 
Values:


enumerator kFLASH_RST_N_SHIFT_RSTn#

Flash controller reset control 




enumerator kI2C0_RST_N_SHIFT_RSTn#

I2C0 reset control 




enumerator kGPIO0_RST_N_SHIFT_RSTn#

GPIO0 reset control 




enumerator kSWM_RST_N_SHIFT_RSTn#

SWM reset control 




enumerator kWKT_RST_N_SHIFT_RSTn#

Self-wake-up timer(WKT) reset control 




enumerator kMRT_RST_N_SHIFT_RSTn#

Multi-rate timer(MRT) reset control 




enumerator kSPI0_RST_N_SHIFT_RSTn#

SPI0 reset control. 




enumerator kSPI1_RST_N_SHIFT_RSTn#

SPI1 reset control 




enumerator kCRC_RST_SHIFT_RSTn#

CRC reset control 




enumerator kUART0_RST_N_SHIFT_RSTn#

UART0 reset control 




enumerator kUART1_RST_N_SHIFT_RSTn#

UART1 reset control 




enumerator kUART2_RST_N_SHIFT_RSTn#

UART2 reset control 




enumerator kIOCON_RST_N_SHIFT_RSTn#

IOCON reset control 




enumerator kACMP_RST_N_SHIFT_RSTn#

Analog comparator reset control 




enumerator kGPIO1_RST_N_SHIFT_RSTn#

GPIO1 reset control 




enumerator kFTM0_RST_N_SHIFT_RSTn#

FTM0 reset control 




enumerator kFTM1_RST_N_SHIFT_RSTn#

FTM1 reset control 




enumerator kI3C_RST_N_SHIFT_RSTn#

I3C reset control 




enumerator kADC_RST_N_SHIFT_RSTn#

ADC reset control 




enumerator kGPIOINT_RST_N_SHIFT_RSTn#

GPIOINT reset control 




enumerator kDMA_RST_N_SHIFT_RSTn#

DMA reset control 




enumerator kFRG0_RST_N_SHIFT_RSTn#

Fractional baud rate generator 0 reset control 




enumerator kFRG1_RST_N_SHIFT_RSTn#

Fractional baud rate generator 1 reset control 






typedef enum _SYSCON_RSTn SYSCON_RSTn_t#

Enumeration for peripheral reset control bits. 
Defines the enumeration for peripheral reset control bits in PRESETCTRL/ASYNCPRESETCTRL registers 




typedef SYSCON_RSTn_t reset_ip_name_t#





void RESET_SetPeripheralReset(reset_ip_name_t peripheral)#

Assert reset to peripheral. 
Asserts reset signal to specified peripheral module.

Parameters:

peripheral – Assert reset to this peripheral. The enum argument contains encoding of reset register and reset bit position in the reset register. 







void RESET_ClearPeripheralReset(reset_ip_name_t peripheral)#

Clear reset to peripheral. 
Clears reset signal to specified peripheral module, allows it to operate.

Parameters:

peripheral – Clear reset to this peripheral. The enum argument contains encoding of reset register and reset bit position in the reset register. 







void RESET_PeripheralReset(reset_ip_name_t peripheral)#

Reset peripheral module. 
Reset peripheral module.

Parameters:

peripheral – Peripheral to reset. The enum argument contains encoding of reset register and reset bit position in the reset register. 







static inline void RESET_ReleasePeripheralReset(reset_ip_name_t peripheral)#

Release peripheral module. 
Release peripheral module.

Parameters:

peripheral – Peripheral to release. The enum argument contains encoding of reset register and reset bit position in the reset register. 







FSL_RESET_DRIVER_VERSION#

reset driver version 2.4.0 




FLASH_RSTS_N#

Array initializers with peripheral reset bits 




I2C_RSTS_N#





GPIO_RSTS_N#





SWM_RSTS_N#





WKT_RSTS_N#





MRT_RSTS_N#





SPI_RSTS_N#





CRC_RSTS_N#





UART_RSTS_N#





IOCON_RSTS_N#





ACMP_RSTS_N#





FTM_RSTS_N#





I3C_RSTS#





ADC_RSTS_N#





GPIOINT_RSTS_N#





DMA_RSTS_N#





FRG_RSTS_N#





SPI: Serial Peripheral Interface Driver#


SPI Driver#


void SPI_MasterGetDefaultConfig(spi_master_config_t *config)#

Sets the SPI master configuration structure to default values. 
The purpose of this API is to get the configuration structure initialized for use in SPI_MasterInit(). User may use the initialized structure unchanged in SPI_MasterInit(), or modify some fields of the structure before calling SPI_MasterInit(). After calling this API, the master is ready to transfer. Example: 
spi_master_config_t config;
SPI_MasterGetDefaultConfig(&config);




Parameters:

config – pointer to master config structure 







status_t SPI_MasterInit(SPI_Type *base, const spi_master_config_t *config, uint32_t srcClock_Hz)#

Initializes the SPI with master configuration. 
The configuration structure can be filled by user from scratch, or be set with default values by SPI_MasterGetDefaultConfig(). After calling this API, the slave is ready to transfer. Example 
spi_master_config_t config = {
.baudRate_Bps = 500000,
...
};
SPI_MasterInit(SPI0, &config);




Parameters:

base – SPI base pointer 
config – pointer to master configuration structure 
srcClock_Hz – Source clock frequency. 







void SPI_SlaveGetDefaultConfig(spi_slave_config_t *config)#

Sets the SPI slave configuration structure to default values. 
The purpose of this API is to get the configuration structure initialized for use in SPI_SlaveInit(). Modify some fields of the structure before calling SPI_SlaveInit(). Example: 
spi_slave_config_t config;
SPI_SlaveGetDefaultConfig(&config);




Parameters:

config – pointer to slave configuration structure 







status_t SPI_SlaveInit(SPI_Type *base, const spi_slave_config_t *config)#

Initializes the SPI with slave configuration. 
The configuration structure can be filled by user from scratch or be set with default values by SPI_SlaveGetDefaultConfig(). After calling this API, the slave is ready to transfer. Example 
spi_slave_config_t config = {
.polarity = kSPI_ClockPolarityActiveHigh;
.phase = kSPI_ClockPhaseFirstEdge;
.direction = kSPI_MsbFirst;
...
};
SPI_SlaveInit(SPI0, &config);




Parameters:

base – SPI base pointer 
config – pointer to slave configuration structure 







void SPI_Deinit(SPI_Type *base)#

De-initializes the SPI. 
Calling this API resets the SPI module, gates the SPI clock. Disable the fifo if enabled. The SPI module can’t work unless calling the SPI_MasterInit/SPI_SlaveInit to initialize module.

Parameters:

base – SPI base pointer 







static inline void SPI_Enable(SPI_Type *base, bool enable)#

Enable or disable the SPI Master or Slave. 

Parameters:

base – SPI base pointer 
enable – or disable ( true = enable, false = disable) 







static inline uint32_t SPI_GetStatusFlags(SPI_Type *base)#

Gets the status flag. 

Parameters:

base – SPI base pointer 


Returns:
SPI Status, use status flag to AND _spi_status_flags could get the related status. 






static inline void SPI_ClearStatusFlags(SPI_Type *base, uint32_t mask)#

Clear the status flag. 

Parameters:

base – SPI base pointer 
mask – SPI Status, use status flag to AND _spi_status_flags could get the related status. 







static inline void SPI_EnableInterrupts(SPI_Type *base, uint32_t irqs)#

Enables the interrupt for the SPI. 

Parameters:

base – SPI base pointer 
irqs – SPI interrupt source. The parameter can be any combination of the following values: 

kSPI_RxReadyInterruptEnable 
kSPI_TxReadyInterruptEnable 









static inline void SPI_DisableInterrupts(SPI_Type *base, uint32_t irqs)#

Disables the interrupt for the SPI. 

Parameters:

base – SPI base pointer 
irqs – SPI interrupt source. The parameter can be any combination of the following values: 

kSPI_RxReadyInterruptEnable 
kSPI_TxReadyInterruptEnable 









static inline bool SPI_IsMaster(SPI_Type *base)#

Returns whether the SPI module is in master mode. 

Parameters:

base – SPI peripheral address. 


Returns:
Returns true if the module is in master mode or false if the module is in slave mode. 






status_t SPI_MasterSetBaudRate(SPI_Type *base, uint32_t baudrate_Bps, uint32_t srcClock_Hz)#

Sets the baud rate for SPI transfer. This is only used in master. 

Parameters:

base – SPI base pointer 
baudrate_Bps – baud rate needed in Hz. 
srcClock_Hz – SPI source clock frequency in Hz. 







static inline void SPI_WriteData(SPI_Type *base, uint16_t data)#

Writes a data into the SPI data register directly. 

Parameters:

base – SPI base pointer 
data – needs to be write. 







static inline void SPI_WriteConfigFlags(SPI_Type *base, uint32_t configFlags)#

Writes a data into the SPI TXCTL register directly. 

Parameters:

base – SPI base pointer 
configFlags – control command needs to be written. 







void SPI_WriteDataWithConfigFlags(SPI_Type *base, uint16_t data, uint32_t configFlags)#

Writes a data control info and data into the SPI TX register directly. 

Parameters:

base – SPI base pointer 
data – value needs to be written. 
configFlags – control command needs to be written. 







static inline uint32_t SPI_ReadData(SPI_Type *base)#

Gets a data from the SPI data register. 

Parameters:

base – SPI base pointer 


Returns:
Data in the register. 






void SPI_SetTransferDelay(SPI_Type *base, const spi_delay_config_t *config)#

Set delay time for transfer. the delay uint is SPI clock time, maximum value is 0xF. 

Parameters:

base – SPI base pointer 
config – configuration for delay option spi_delay_config_t. 







void SPI_SetDummyData(SPI_Type *base, uint16_t dummyData)#

Set up the dummy data. This API can change the default data to be transferred when users set the tx buffer to NULL. 

Parameters:

base – SPI peripheral address. 
dummyData – Data to be transferred when tx buffer is NULL. 







status_t SPI_MasterTransferBlocking(SPI_Type *base, spi_transfer_t *xfer)#

Transfers a block of data using a polling method. 

Parameters:

base – SPI base pointer 
xfer – pointer to spi_xfer_config_t structure 


Return values:

kStatus_Success – Successfully start a transfer. 
kStatus_InvalidArgument – Input argument is invalid. 
kStatus_SPI_Timeout – The transfer timed out and was aborted. 







status_t SPI_MasterTransferCreateHandle(SPI_Type *base, spi_master_handle_t *handle, spi_master_callback_t callback, void *userData)#

Initializes the SPI master handle. 
This function initializes the SPI master handle which can be used for other SPI master transactional APIs. Usually, for a specified SPI instance, call this API once to get the initialized handle.

Parameters:

base – SPI peripheral base address. 
handle – SPI handle pointer. 
callback – Callback function. 
userData – User data. 







status_t SPI_MasterTransferNonBlocking(SPI_Type *base, spi_master_handle_t *handle, spi_transfer_t *xfer)#

Performs a non-blocking SPI interrupt transfer. 

Parameters:

base – SPI peripheral base address. 
handle – pointer to spi_master_handle_t structure which stores the transfer state 
xfer – pointer to spi_xfer_config_t structure 


Return values:

kStatus_Success – Successfully start a transfer. 
kStatus_InvalidArgument – Input argument is invalid. 
kStatus_SPI_Busy – SPI is not idle, is running another transfer. 







status_t SPI_MasterTransferGetCount(SPI_Type *base, spi_master_handle_t *handle, size_t *count)#

Gets the master transfer count. 
This function gets the master transfer count.

Parameters:

base – SPI peripheral base address. 
handle – Pointer to the spi_master_handle_t structure which stores the transfer state. 
count – The number of bytes transferred by using the non-blocking transaction. 


Returns:
status of status_t. 






void SPI_MasterTransferAbort(SPI_Type *base, spi_master_handle_t *handle)#

SPI master aborts a transfer using an interrupt. 
This function aborts a transfer using an interrupt.

Parameters:

base – SPI peripheral base address. 
handle – Pointer to the spi_master_handle_t structure which stores the transfer state. 







void SPI_MasterTransferHandleIRQ(SPI_Type *base, spi_master_handle_t *handle)#

Interrupts the handler for the SPI. 

Parameters:

base – SPI peripheral base address. 
handle – pointer to spi_master_handle_t structure which stores the transfer state. 







status_t SPI_SlaveTransferCreateHandle(SPI_Type *base, spi_slave_handle_t *handle, spi_slave_callback_t callback, void *userData)#

Initializes the SPI slave handle. 
This function initializes the SPI slave handle which can be used for other SPI slave transactional APIs. Usually, for a specified SPI instance, call this API once to get the initialized handle.

Parameters:

base – SPI peripheral base address. 
handle – SPI handle pointer. 
callback – Callback function. 
userData – User data. 







status_t SPI_SlaveTransferNonBlocking(SPI_Type *base, spi_slave_handle_t *handle, spi_transfer_t *xfer)#

Performs a non-blocking SPI slave interrupt transfer. 

Note
The API returns immediately after the transfer initialization is finished.


Parameters:

base – SPI peripheral base address. 
handle – pointer to spi_master_handle_t structure which stores the transfer state 
xfer – pointer to spi_xfer_config_t structure 


Return values:

kStatus_Success – Successfully start a transfer. 
kStatus_InvalidArgument – Input argument is invalid. 
kStatus_SPI_Busy – SPI is not idle, is running another transfer. 







static inline status_t SPI_SlaveTransferGetCount(SPI_Type *base, spi_slave_handle_t *handle, size_t *count)#

Gets the slave transfer count. 
This function gets the slave transfer count.

Parameters:

base – SPI peripheral base address. 
handle – Pointer to the spi_master_handle_t structure which stores the transfer state. 
count – The number of bytes transferred by using the non-blocking transaction. 


Returns:
status of status_t. 






static inline void SPI_SlaveTransferAbort(SPI_Type *base, spi_slave_handle_t *handle)#

SPI slave aborts a transfer using an interrupt. 
This function aborts a transfer using an interrupt.

Parameters:

base – SPI peripheral base address. 
handle – Pointer to the spi_slave_handle_t structure which stores the transfer state. 







void SPI_SlaveTransferHandleIRQ(SPI_Type *base, spi_slave_handle_t *handle)#

Interrupts a handler for the SPI slave. 

Parameters:

base – SPI peripheral base address. 
handle – pointer to spi_slave_handle_t structure which stores the transfer state 







void SPI_DriverIRQHandler(uint32_t instance)#

Common IRQ handler entry for SPI, dispatches to the registered ISR. 

Parameters:

instance – SPI peripheral instance number. 







FSL_SPI_DRIVER_VERSION#

SPI driver version. 




enum _spi_xfer_option#

SPI transfer option. 
Values:


enumerator kSPI_EndOfFrame#

Add delay at the end of each frame(the last clk edge). 




enumerator kSPI_EndOfTransfer#

Re-assert the CS signal after transfer finishes to deselect slave. 




enumerator kSPI_ReceiveIgnore#

Ignore the receive data. 






enum _spi_shift_direction#

SPI data shifter direction options. 
Values:


enumerator kSPI_MsbFirst#

Data transfers start with most significant bit. 




enumerator kSPI_LsbFirst#

Data transfers start with least significant bit. 






enum _spi_clock_polarity#

SPI clock polarity configuration. 
Values:


enumerator kSPI_ClockPolarityActiveHigh#

Active-high SPI clock (idles low). 




enumerator kSPI_ClockPolarityActiveLow#

Active-low SPI clock (idles high). 






enum _spi_clock_phase#

SPI clock phase configuration. 
Values:


enumerator kSPI_ClockPhaseFirstEdge#

First edge on SCK occurs at the middle of the first cycle of a data transfer. 




enumerator kSPI_ClockPhaseSecondEdge#

First edge on SCK occurs at the start of the first cycle of a data transfer. 






enum _spi_ssel#

Slave select. 
Values:


enumerator kSPI_Ssel0Assert#

Slave select 0 




enumerator kSPI_SselDeAssertAll#







enum _spi_spol#

ssel polarity 
Values:


enumerator kSPI_Spol0ActiveHigh#





enumerator kSPI_Spol1ActiveHigh#





enumerator kSPI_Spol2ActiveHigh#





enumerator kSPI_Spol3ActiveHigh#





enumerator kSPI_SpolActiveAllHigh#





enumerator kSPI_SpolActiveAllLow#







enum _spi_data_width#

Transfer data width. 
Values:


enumerator kSPI_Data4Bits#

4 bits data width 




enumerator kSPI_Data5Bits#

5 bits data width 




enumerator kSPI_Data6Bits#

6 bits data width 




enumerator kSPI_Data7Bits#

7 bits data width 




enumerator kSPI_Data8Bits#

8 bits data width 




enumerator kSPI_Data9Bits#

9 bits data width 




enumerator kSPI_Data10Bits#

10 bits data width 




enumerator kSPI_Data11Bits#

11 bits data width 




enumerator kSPI_Data12Bits#

12 bits data width 




enumerator kSPI_Data13Bits#

13 bits data width 




enumerator kSPI_Data14Bits#

14 bits data width 




enumerator kSPI_Data15Bits#

15 bits data width 




enumerator kSPI_Data16Bits#

16 bits data width 







SPI transfer status. 
Values:


enumerator kStatus_SPI_Busy#

SPI bus is busy 




enumerator kStatus_SPI_Idle#

SPI is idle 




enumerator kStatus_SPI_Error#

SPI error 




enumerator kStatus_SPI_BaudrateNotSupport#

Baudrate is not support in current clock source 




enumerator kStatus_SPI_Timeout#

SPI Timeout polling status flags. 






enum _spi_interrupt_enable#

SPI interrupt sources. 
Values:


enumerator kSPI_RxReadyInterruptEnable#

Rx ready interrupt 




enumerator kSPI_TxReadyInterruptEnable#

Tx ready interrupt 




enumerator kSPI_RxOverrunInterruptEnable#

Rx overrun interrupt 




enumerator kSPI_TxUnderrunInterruptEnable#

Tx underrun interrupt 




enumerator kSPI_SlaveSelectAssertInterruptEnable#

Slave select assert interrupt 




enumerator kSPI_SlaveSelectDeassertInterruptEnable#

Slave select deassert interrupt 




enumerator kSPI_AllInterruptEnable#







enum _spi_status_flags#

SPI status flags. 
Values:


enumerator kSPI_RxReadyFlag#

Receive ready flag. 




enumerator kSPI_TxReadyFlag#

Transmit ready flag. 




enumerator kSPI_RxOverrunFlag#

Receive overrun flag. 




enumerator kSPI_TxUnderrunFlag#

Transmit underrun flag. 




enumerator kSPI_SlaveSelectAssertFlag#

Slave select assert flag. 




enumerator kSPI_SlaveSelectDeassertFlag#

slave select deassert flag. 




enumerator kSPI_StallFlag#

Stall flag. 




enumerator kSPI_EndTransferFlag#

End transfer bit. 




enumerator kSPI_MasterIdleFlag#

Master in idle status flag. 






typedef enum _spi_shift_direction spi_shift_direction_t#

SPI data shifter direction options. 




typedef enum _spi_clock_polarity spi_clock_polarity_t#

SPI clock polarity configuration. 




typedef enum _spi_clock_phase spi_clock_phase_t#

SPI clock phase configuration. 




typedef enum _spi_ssel spi_ssel_t#

Slave select. 




typedef enum _spi_spol spi_spol_t#

ssel polarity 




typedef enum _spi_data_width spi_data_width_t#

Transfer data width. 




typedef struct _spi_delay_config spi_delay_config_t#

SPI delay time configure structure. 




typedef struct _spi_master_config spi_master_config_t#

SPI master user configure structure. 




typedef struct _spi_slave_config spi_slave_config_t#

SPI slave user configure structure. 




typedef struct _spi_transfer spi_transfer_t#

SPI transfer structure. 




typedef struct _spi_master_handle spi_master_handle_t#

Master handle type. 




typedef spi_master_handle_t spi_slave_handle_t#

Slave handle type. 




typedef void (*spi_master_callback_t)(SPI_Type *base, spi_master_handle_t *handle, status_t status, void *userData)#

SPI master callback for finished transmit. 




typedef void (*spi_slave_callback_t)(SPI_Type *base, spi_slave_handle_t *handle, status_t status, void *userData)#

SPI slave callback for finished transmit. 




volatile uint16_t s_dummyData[]#





uint32_t SPI_GetInstance(SPI_Type *base)#

Returns instance number for SPI peripheral base address. 




SPI_DUMMYDATA#

SPI dummy transfer data, the data is sent while txBuff is NULL. 




FSL_SDK_ENABLE_SPI_DRIVER_TRANSACTIONAL_APIS#





SPI_RETRY_TIMES#

Retry times for waiting flag. 




struct _spi_delay_config#


#include <fsl_spi.h>
SPI delay time configure structure. 

Public Members


uint8_t preDelay#

Delay between SSEL assertion and the beginning of transfer. 




uint8_t postDelay#

Delay between the end of transfer and SSEL deassertion. 




uint8_t frameDelay#

Delay between frame to frame. 




uint8_t transferDelay#

Delay between transfer to transfer. 







struct _spi_master_config#


#include <fsl_spi.h>
SPI master user configure structure. 

Public Members


bool enableLoopback#

Enable loopback for test purpose 




bool enableMaster#

Enable SPI at initialization time 




uint32_t baudRate_Bps#

Baud Rate for SPI in Hz 




spi_clock_polarity_t clockPolarity#

Clock polarity 




spi_clock_phase_t clockPhase#

Clock phase 




spi_shift_direction_t direction#

MSB or LSB 




uint8_t dataWidth#

Width of the data 




spi_ssel_t sselNumber#

Slave select number 




spi_spol_t sselPolarity#

Configure active CS polarity 




spi_delay_config_t delayConfig#

Configure for delay time. 







struct _spi_slave_config#


#include <fsl_spi.h>
SPI slave user configure structure. 

Public Members


bool enableSlave#

Enable SPI at initialization time 




spi_clock_polarity_t clockPolarity#

Clock polarity 




spi_clock_phase_t clockPhase#

Clock phase 




spi_shift_direction_t direction#

MSB or LSB 




uint8_t dataWidth#

Width of the data 




spi_spol_t sselPolarity#

Configure active CS polarity 







struct _spi_transfer#


#include <fsl_spi.h>
SPI transfer structure. 

Public Members


const uint8_t *txData#

Send buffer 




uint8_t *rxData#

Receive buffer 




size_t dataSize#

Transfer bytes 




uint32_t configFlags#

Additional option to control transfer _spi_xfer_option. 







struct _spi_master_handle#


#include <fsl_spi.h>
SPI transfer handle structure. 

Public Members


const uint8_t *volatile txData#

Transfer buffer 




uint8_t *volatile rxData#

Receive buffer 




volatile size_t txRemainingBytes#

Number of data to be transmitted [in bytes] 




volatile size_t rxRemainingBytes#

Number of data to be received [in bytes] 




size_t totalByteCount#

A number of transfer bytes 




volatile uint32_t state#

SPI internal state 




spi_master_callback_t callback#

SPI callback 




void *userData#

Callback parameter 




uint8_t dataWidth#

Width of the data [Valid values: 1 to 16] 




uint32_t lastCommand#

Last command for transfer. 







SWM: Switch Matrix Module#


enum _swm_port_pin_type_t#

SWM port_pin number. 
Values:


enumerator kSWM_PortPin_P0_0#

port_pin number P0_0. 




enumerator kSWM_PortPin_P0_1#

port_pin number P0_1. 




enumerator kSWM_PortPin_P0_2#

port_pin number P0_2. 




enumerator kSWM_PortPin_P0_3#

port_pin number P0_3. 




enumerator kSWM_PortPin_P0_4#

port_pin number P0_4. 




enumerator kSWM_PortPin_P0_5#

port_pin number P0_5. 




enumerator kSWM_PortPin_P0_6#

port_pin number P0_6. 




enumerator kSWM_PortPin_P0_7#

port_pin number P0_7. 




enumerator kSWM_PortPin_P0_8#

port_pin number P0_8. 




enumerator kSWM_PortPin_P0_9#

port_pin number P0_9. 




enumerator kSWM_PortPin_P0_10#

port_pin number P0_10. 




enumerator kSWM_PortPin_P0_11#

port_pin number P0_11. 




enumerator kSWM_PortPin_P0_12#

port_pin number P0_12. 




enumerator kSWM_PortPin_P0_13#

port_pin number P0_13. 




enumerator kSWM_PortPin_P0_14#

port_pin number P0_14. 




enumerator kSWM_PortPin_P0_15#

port_pin number P0_15. 




enumerator kSWM_PortPin_P0_16#

port_pin number P0_16. 




enumerator kSWM_PortPin_P0_17#

port_pin number P0_17. 




enumerator kSWM_PortPin_P0_18#

port_pin number P0_18. 




enumerator kSWM_PortPin_P0_19#

port_pin number P0_19. 




enumerator kSWM_PortPin_P0_20#

port_pin number P0_20. 




enumerator kSWM_PortPin_P0_21#

port_pin number P0_21. 




enumerator kSWM_PortPin_P0_22#

port_pin number P0_22. 




enumerator kSWM_PortPin_P0_23#

port_pin number P0_23. 




enumerator kSWM_PortPin_P0_24#

port_pin number P0_24. 




enumerator kSWM_PortPin_P0_25#

port_pin number P0_25. 




enumerator kSWM_PortPin_P0_26#

port_pin number P0_26. 




enumerator kSWM_PortPin_P0_27#

port_pin number P0_27. 




enumerator kSWM_PortPin_P0_28#

port_pin number P0_28. 




enumerator kSWM_PortPin_P0_29#

port_pin number P0_29. 




enumerator kSWM_PortPin_P0_30#

port_pin number P0_30. 




enumerator kSWM_PortPin_P0_31#

port_pin number P0_31. 




enumerator kSWM_PortPin_P1_0#

port_pin number P1_0. 




enumerator kSWM_PortPin_P1_1#

port_pin number P1_1. 




enumerator kSWM_PortPin_P1_2#

port_pin number P1_2. 




enumerator kSWM_PortPin_P1_3#

port_pin number P1_3. 




enumerator kSWM_PortPin_P1_4#

port_pin number P1_4. 




enumerator kSWM_PortPin_P1_5#

port_pin number P1_5. 




enumerator kSWM_PortPin_P1_6#

port_pin number P1_6. 




enumerator kSWM_PortPin_P1_7#

port_pin number P1_7. 




enumerator kSWM_PortPin_P1_8#

port_pin number P1_8. 




enumerator kSWM_PortPin_P1_9#

port_pin number P1_9. 




enumerator kSWM_PortPin_P1_10#

port_pin number P1_10. 




enumerator kSWM_PortPin_P1_11#

port_pin number P1_11. 




enumerator kSWM_PortPin_P1_12#

port_pin number P1_12. 




enumerator kSWM_PortPin_P1_13#

port_pin number P1_13. 




enumerator kSWM_PortPin_P1_14#

port_pin number P1_14. 




enumerator kSWM_PortPin_P1_15#

port_pin number P1_15. 




enumerator kSWM_PortPin_P1_16#

port_pin number P1_16. 




enumerator kSWM_PortPin_P1_17#

port_pin number P1_17. 




enumerator kSWM_PortPin_P1_18#

port_pin number P1_18. 




enumerator kSWM_PortPin_P1_19#

port_pin number P1_19. 




enumerator kSWM_PortPin_P1_20#

port_pin number P1_20. 




enumerator kSWM_PortPin_P1_21#

port_pin number P1_21. 




enumerator kSWM_PortPin_Reset#

port_pin reset number. 






enum _swm_select_movable_t#

SWM movable selection. 
Values:


enumerator kSWM_USART0_TXD#

Movable function as USART0_TXD. 




enumerator kSWM_USART0_RXD#

Movable function as USART0_RXD. 




enumerator kSWM_USART0_RTS#

Movable function as USART0_RTS. 




enumerator kSWM_USART0_CTS#

Movable function as USART0_CTS. 




enumerator kSWM_USART0_SCLK#

Movable function as USART0_SCLK. 




enumerator kSWM_USART1_TXD#

Movable function as USART1_TXD. 




enumerator kSWM_USART1_RXD#

Movable function as USART1_RXD. 




enumerator kSWM_USART1_RTS#

Movable function as USART1_RTS. 




enumerator kSWM_USART1_CTS#

Movable function as USART1_CTS. 




enumerator kSWM_USART1_SCLK#

Movable function as USART1_SCLK. 




enumerator kSWM_USART2_TXD#

Movable function as USART2_TXD. 




enumerator kSWM_USART2_RXD#

Movable function as USART2_RXD. 




enumerator kSWM_USART2_RTS#

Movable function as USART2_RTS. 




enumerator kSWM_USART2_CTS#

Movable function as USART2_CTS. 




enumerator kSWM_USART2_SCLK#

Movable function as USART2_SCLK. 




enumerator kSWM_SPI0_SCK#

Movable function as SPI0_SCK. 




enumerator kSWM_SPI0_MOSI#

Movable function as SPI0_MOSI. 




enumerator kSWM_SPI0_MISO#

Movable function as SPI0_MISO. 




enumerator kSWM_SPI0_SSEL0#

Movable function as SPI0_SSEL0. 




enumerator kSWM_SPI0_SSEL1#

Movable function as SPI0_SSEL1. 




enumerator kSWM_SPI0_SSEL2#

Movable function as SPI0_SSEL2. 




enumerator kSWM_SPI0_SSEL3#

Movable function as SPI0_SSEL3. 




enumerator kSWM_SPI1_SCK#

Movable function as SPI1_SCK. 




enumerator kSWM_SPI1_MOSI#

Movable function as SPI1_MOSI. 




enumerator kSWM_SPI1_MISO#

Movable function as SPI1_MISO. 




enumerator kSWM_SPI1_SSEL0#

Movable function as SPI1_SSEL0. 




enumerator kSWM_SPI1_SSEL1#

Movable function as SPI1_SSEL1. 




enumerator kSWM_I2C0_SDA#

Movable function as I2C0_SDA. 




enumerator kSWM_I2C0_SCL#

Movable function as I2C0_SCL. 




enumerator kSWM_I3C0_SDA#

Movable function as I3C0_SDA. 




enumerator kSWM_I3C0_SCL#

Movable function as I3C0_SCL. 




enumerator kSWM_I3C0_PUR#

Movable function as I3C0_PUR. 




enumerator kSWM_ACMP_O#

Movable function as COMP0_OUT. 




enumerator kSWM_CLKOUT#

Movable function as CLKOUT. 




enumerator kSWM_GPIO_INT_BMAT#

Movable function as GPIO_INT_BMAT. 




enumerator kSWM_MOVABLE_NUM_FUNCS#

Movable function number. 






enum _swm_select_fixed_pin_t#

SWM fixed pin selection. 
Values:


enumerator kSWM_ACMP_INPUT1#

Fixed-pin function as ACMP_INPUT1. 




enumerator kSWM_ACMP_INPUT2#

Fixed-pin function as ACMP_INPUT2. 




enumerator kSWM_ACMP_INPUT3#

Fixed-pin function as ACMP_INPUT3. 




enumerator kSWM_ACMP_INPUT4#

Fixed-pin function as ACMP_INPUT4. 




enumerator kSWM_ACMP_INPUT5#

Fixed-pin function as ACMP_INPUT5. 




enumerator kSWM_SWCLK#

Fixed-pin function as SWCLK. 




enumerator kSWM_SWDIO#

Fixed-pin function as SWDIO. 




enumerator kSWM_RESETN#

Fixed-pin function as RESETN. 




enumerator kSWM_CLKIN#

Fixed-pin function as CLKIN. 




enumerator kSWM_CMPVREF#

Fixed-pin function as CMPVREF. 




enumerator kSWM_XTALIN#

Fixed-pin function as XTALIN. 




enumerator kSWM_XTALOUT#

Fixed-pin function as XTALOUT. 




enumerator kSWM_ADC_CHN0#

Fixed-pin function as ADC_CHN0. 




enumerator kSWM_ADC_CHN1#

Fixed-pin function as ADC_CHN1. 




enumerator kSWM_ADC_CHN2#

Fixed-pin function as ADC_CHN2. 




enumerator kSWM_ADC_CHN3#

Fixed-pin function as ADC_CHN3. 




enumerator kSWM_ADC_CHN4#

Fixed-pin function as ADC_CHN4. 




enumerator kSWM_ADC_CHN5#

Fixed-pin function as ADC_CHN5. 




enumerator kSWM_ADC_CHN6#

Fixed-pin function as ADC_CHN6. 




enumerator kSWM_ADC_CHN7#

Fixed-pin function as ADC_CHN7. 




enumerator kSWM_ADC_CHN8#

Fixed-pin function as ADC_CHN8. 




enumerator kSWM_ADC_CHN9#

Fixed-pin function as ADC_CHN9. 




enumerator kSWM_ADC_CHN10#

Fixed-pin function as ADC_CHN10. 




enumerator kSWM_ADC_CHN11#

Fixed-pin function as ADC_CHN11. 




enumerator kSWM_FIXEDPIN_NUM_FUNCS#

Fixed-pin function number. 






enum _swm_flextimer_pin_func_t#

SWM flextimer pin function. 
Values:


enumerator kSWM_FTM0_EXTCLK#

Flextimer function as FTM0_EXTCLK. 




enumerator kSWM_FTM0_CH0#

Flextimer function as FTM0_CH0. 




enumerator kSWM_FTM0_CH1#

Flextimer function as FTM0_CH1. 




enumerator kSWM_FTM0_CH2#

Flextimer function as FTM0_CH2. 




enumerator kSWM_FTM0_CH3#

Flextimer function as FTM0_CH3. 




enumerator kSWM_FTM0_CH4#

Flextimer function as FTM0_CH4. 




enumerator kSWM_FTM0_CH5#

Flextimer function as FTM0_CH5. 




enumerator kSWM_FTM0_FAULT0#

Flextimer function as FTM0_FAULT0. 




enumerator kSWM_FTM0_FAULT1#

Flextimer function as FTM0_FAULT1. 




enumerator kSWM_FTM0_FAULT2#

Flextimer function as FTM0_FAULT2. 




enumerator kSWM_FTM0_FAULT3#

Flextimer function as FTM0_FAULT3. 




enumerator kSWM_FTM1_EXTCLK#

Flextimer function as FTM1_EXTCLK. 




enumerator kSWM_FTM1_CH0#

Flextimer function as FTM1_CH0. 




enumerator kSWM_FTM1_CH1#

Flextimer function as FTM1_CH1. 




enumerator kSWM_FTM1_CH2#

Flextimer function as FTM1_CH2. 




enumerator kSWM_FTM1_CH3#

Flextimer function as FTM1_CH3. 




enumerator kSWM_FTM1_QD_PHA#

Flextimer function as FTM1_QD_PHA. 




enumerator kSWM_FTM1_QD_PHB#

Flextimer function as FTM1_QD_PHB. 




enumerator kSWM_FTM_NUM_FUNCS#

Flextimer function function number. 






enum _swm_select_flextimer_pin_sel_t#

SWM flextimer pin selection. 
Values:


enumerator kSWM_FTM_Selection0#

Flextimer pin selection0. 




enumerator kSWM_FTM_Selection1#

Flextimer pin selection1. 




enumerator kSWM_FTM_Selection2#

Flextimer pin selection2. 




enumerator kSWM_FTM_Selection3#

Flextimer pin selection3, which is not connected by default on LPC86x. 






typedef enum _swm_port_pin_type_t swm_port_pin_type_t#

SWM port_pin number. 




typedef enum _swm_select_movable_t swm_select_movable_t#

SWM movable selection. 




typedef enum _swm_select_fixed_pin_t swm_select_fixed_pin_t#

SWM fixed pin selection. 




typedef enum _swm_flextimer_pin_func_t swm_flextimer_pin_func_t#

SWM flextimer pin function. 




typedef enum _swm_select_flextimer_pin_sel_t swm_flextimer_pin_sel_t#

SWM flextimer pin selection. 




FSL_SWM_DRIVER_VERSION#

LPC SWM driver version. 




void SWM_SetMovablePinSelect(SWM_Type *base, swm_select_movable_t func, swm_port_pin_type_t swm_port_pin)#

Assignment of digital peripheral functions to pins. 
This function will selects a pin (designated by its GPIO port and bit numbers) to a function.

Parameters:

base – SWM peripheral base address. 
func – any function name that is movable. 
swm_port_pin – any pin which has a GPIO port number and bit number. 







void SWM_SetFixedPinSelect(SWM_Type *base, swm_select_fixed_pin_t func, bool enable)#

Enable the fixed-pin function. 
This function will enables a fixed-pin function in PINENABLE0 or PINENABLE1.

Parameters:

base – SWM peripheral base address. 
func – any function name that is fixed pin. 
enable – enable or disable. 







void SWM_SetFlextimerPinSelect(SWM_Type *base, swm_flextimer_pin_func_t func, swm_flextimer_pin_sel_t selection)#

Enable the flextimer function. 
This function will enables a flextimer function in FTM_PINASSIGN0 or FTM_PINASSIGN1.

Parameters:

base – SWM peripheral base address. 
func – any function name that is flextimer. 
selection – flextimer pin selection. 







SYSCON: System Configuration#


enum _syscon_connection_t#

SYSCON connections type. 
Values:


enumerator kSYSCON_GpioPort0Pin0ToPintsel#

Pin Interrupt. 




enumerator kSYSCON_GpioPort0Pin1ToPintsel#





enumerator kSYSCON_GpioPort0Pin2ToPintsel#





enumerator kSYSCON_GpioPort0Pin3ToPintsel#





enumerator kSYSCON_GpioPort0Pin4ToPintsel#





enumerator kSYSCON_GpioPort0Pin5ToPintsel#





enumerator kSYSCON_GpioPort0Pin6ToPintsel#





enumerator kSYSCON_GpioPort0Pin7ToPintsel#





enumerator kSYSCON_GpioPort0Pin8ToPintsel#





enumerator kSYSCON_GpioPort0Pin9ToPintsel#





enumerator kSYSCON_GpioPort0Pin10ToPintsel#





enumerator kSYSCON_GpioPort0Pin11ToPintsel#





enumerator kSYSCON_GpioPort0Pin12ToPintsel#





enumerator kSYSCON_GpioPort0Pin13ToPintsel#





enumerator kSYSCON_GpioPort0Pin14ToPintsel#





enumerator kSYSCON_GpioPort0Pin15ToPintsel#





enumerator kSYSCON_GpioPort0Pin16ToPintsel#





enumerator kSYSCON_GpioPort0Pin17ToPintsel#





enumerator kSYSCON_GpioPort0Pin18ToPintsel#





enumerator kSYSCON_GpioPort0Pin19ToPintsel#





enumerator kSYSCON_GpioPort0Pin20ToPintsel#





enumerator kSYSCON_GpioPort0Pin21ToPintsel#





enumerator kSYSCON_GpioPort0Pin22ToPintsel#





enumerator kSYSCON_GpioPort0Pin23ToPintsel#





enumerator kSYSCON_GpioPort0Pin24ToPintsel#





enumerator kSYSCON_GpioPort0Pin25ToPintsel#





enumerator kSYSCON_GpioPort0Pin26ToPintsel#





enumerator kSYSCON_GpioPort0Pin27ToPintsel#





enumerator kSYSCON_GpioPort0Pin28ToPintsel#





enumerator kSYSCON_GpioPort0Pin29ToPintsel#





enumerator kSYSCON_GpioPort0Pin30ToPintsel#





enumerator kSYSCON_GpioPort0Pin31ToPintsel#





enumerator kSYSCON_GpioPort1Pin0ToPintsel#





enumerator kSYSCON_GpioPort1Pin1ToPintsel#





enumerator kSYSCON_GpioPort1Pin2ToPintsel#





enumerator kSYSCON_GpioPort1Pin3ToPintsel#





enumerator kSYSCON_GpioPort1Pin4ToPintsel#





enumerator kSYSCON_GpioPort1Pin5ToPintsel#





enumerator kSYSCON_GpioPort1Pin6ToPintsel#





enumerator kSYSCON_GpioPort1Pin7ToPintsel#





enumerator kSYSCON_GpioPort1Pin8ToPintsel#





enumerator kSYSCON_GpioPort1Pin9ToPintsel#





enumerator kSYSCON_GpioPort1Pin10ToPintsel#





enumerator kSYSCON_GpioPort1Pin11ToPintsel#





enumerator kSYSCON_GpioPort1Pin12ToPintsel#





enumerator kSYSCON_GpioPort1Pin13ToPintsel#





enumerator kSYSCON_GpioPort1Pin14ToPintsel#





enumerator kSYSCON_GpioPort1Pin15ToPintsel#





enumerator kSYSCON_GpioPort1Pin16ToPintsel#





enumerator kSYSCON_GpioPort1Pin17ToPintsel#





enumerator kSYSCON_GpioPort1Pin18ToPintsel#





enumerator kSYSCON_GpioPort1Pin19ToPintsel#





enumerator kSYSCON_GpioPort1Pin20ToPintsel#





enumerator kSYSCON_GpioPort1Pin21ToPintsel#





enumerator kSYSCON_GpioPort1Pin22ToPintsel#





enumerator kSYSCON_GpioPort1Pin23ToPintsel#





enumerator kSYSCON_GpioPort1Pin24ToPintsel#





enumerator kSYSCON_GpioPort1Pin25ToPintsel#





enumerator kSYSCON_GpioPort1Pin26ToPintsel#





enumerator kSYSCON_GpioPort1Pin27ToPintsel#





enumerator kSYSCON_GpioPort1Pin28ToPintsel#





enumerator kSYSCON_GpioPort1Pin29ToPintsel#





enumerator kSYSCON_GpioPort1Pin30ToPintsel#





enumerator kSYSCON_GpioPort1Pin31ToPintsel#







typedef enum _syscon_connection_t syscon_connection_t#

SYSCON connections type. 




PINTSEL_ID#

Periphinmux IDs. 




SYSCON_SHIFT#





FSL_SYSON_DRIVER_VERSION#

Group syscon driver version for SDK. 




void SYSCON_AttachSignal(SYSCON_Type *base, uint16_t index, syscon_connection_t connection)#

Attaches a signal. 
This function gates the SYSCON clock.

Parameters:

base – Base address of the SYSCON peripheral. 
index – Destination peripheral to attach the signal to. 
connection – Selects connection.


Return values:
None. – 






USART: Universal Asynchronous Receiver/Transmitter Driver#


USART Driver#


uint32_t USART_GetInstance(USART_Type *base)#

Returns instance number for USART peripheral base address. 




status_t USART_Init(USART_Type *base, const usart_config_t *config, uint32_t srcClock_Hz)#

Initializes a USART instance with user configuration structure and peripheral clock. 
This function configures the USART module with the user-defined settings. The user can configure the configuration structure and also get the default configuration by using the USART_GetDefaultConfig() function. Example below shows how to use this API to configure USART. 
usart_config_t usartConfig;
usartConfig.baudRate_Bps = 115200U;
usartConfig.parityMode = kUSART_ParityDisabled;
usartConfig.stopBitCount = kUSART_OneStopBit;
USART_Init(USART1, &usartConfig, 20000000U);




Parameters:

base – USART peripheral base address. 
config – Pointer to user-defined configuration structure. 
srcClock_Hz – USART clock source frequency in HZ. 


Return values:

kStatus_USART_BaudrateNotSupport – Baudrate is not support in current clock source. 
kStatus_InvalidArgument – USART base address is not valid 
kStatus_Success – Status USART initialize succeed 







void USART_Deinit(USART_Type *base)#

Deinitializes a USART instance. 
This function waits for TX complete, disables the USART clock.

Parameters:

base – USART peripheral base address. 







void USART_GetDefaultConfig(usart_config_t *config)#

Gets the default configuration structure. 
This function initializes the USART configuration structure to a default value. The default values are: usartConfig->baudRate_Bps = 9600U; usartConfig->parityMode = kUSART_ParityDisabled; usartConfig->stopBitCount = kUSART_OneStopBit; usartConfig->bitCountPerChar = kUSART_8BitsPerChar; usartConfig->loopback = false; usartConfig->enableTx = false; usartConfig->enableRx = false; … 

Parameters:

config – Pointer to configuration structure. 







status_t USART_SetBaudRate(USART_Type *base, uint32_t baudrate_Bps, uint32_t srcClock_Hz)#

Sets the USART instance baud rate. 
This function configures the USART module baud rate. This function is used to update the USART module baud rate after the USART module is initialized by the USART_Init. 
USART_SetBaudRate(USART1, 115200U, 20000000U);




Parameters:

base – USART peripheral base address. 
baudrate_Bps – USART baudrate to be set. 
srcClock_Hz – USART clock source frequency in HZ. 


Return values:

kStatus_USART_BaudrateNotSupport – Baudrate is not support in current clock source. 
kStatus_Success – Set baudrate succeed. 
kStatus_InvalidArgument – One or more arguments are invalid. 







static inline uint32_t USART_GetStatusFlags(USART_Type *base)#

Get USART status flags. 
This function get all USART status flags, the flags are returned as the logical OR value of the enumerators _usart_flags. To check a specific status, compare the return value with enumerators in _usart_flags. For example, to check whether the RX is ready: 
if (kUSART_RxReady & USART_GetStatusFlags(USART1))
{
    ...
}




Parameters:

base – USART peripheral base address. 


Returns:
USART status flags which are ORed by the enumerators in the _usart_flags. 






static inline void USART_ClearStatusFlags(USART_Type *base, uint32_t mask)#

Clear USART status flags. 
This function clear supported USART status flags For example: 
USART_ClearStatusFlags(USART1, kUSART_HardwareOverrunFlag)




Parameters:

base – USART peripheral base address. 
mask – status flags to be cleared. 







static inline void USART_EnableInterrupts(USART_Type *base, uint32_t mask)#

Enables USART interrupts according to the provided mask. 
This function enables the USART interrupts according to the provided mask. The mask is a logical OR of enumeration members. See _usart_interrupt_enable. For example, to enable TX ready interrupt and RX ready interrupt: 
USART_EnableInterrupts(USART1, kUSART_RxReadyInterruptEnable | kUSART_TxReadyInterruptEnable);




Parameters:

base – USART peripheral base address. 
mask – The interrupts to enable. Logical OR of _usart_interrupt_enable. 







static inline void USART_DisableInterrupts(USART_Type *base, uint32_t mask)#

Disables USART interrupts according to a provided mask. 
This function disables the USART interrupts according to a provided mask. The mask is a logical OR of enumeration members. See _usart_interrupt_enable. This example shows how to disable the TX ready interrupt and RX ready interrupt: 
USART_DisableInterrupts(USART1, kUSART_TxReadyInterruptEnable | kUSART_RxReadyInterruptEnable);




Parameters:

base – USART peripheral base address. 
mask – The interrupts to disable. Logical OR of _usart_interrupt_enable. 







static inline void USART_SetRxIdleTimeout(USART_Type *base, uint8_t rxIdleTimeout)#

Config the USART instance rx idle timeout. 
This function configures the number idle character of USART rx idle. For 115200,8n1, 1 character timing is 86.81uS = 1/ (115200/(1start+8data+0parity+1stop)) 
USART_SetRxIdleTimeout(USART1, 1);




Parameters:

base – USART peripheral base address. 
rxIdleTimeout – The configuration of UART rx idle . 







static inline uint32_t USART_GetEnabledInterrupts(USART_Type *base)#

Returns enabled USART interrupts. 
This function returns the enabled USART interrupts.

Parameters:

base – USART peripheral base address. 







static inline void USART_EnableContinuousSCLK(USART_Type *base, bool enable)#

Continuous Clock generation. By default, SCLK is only output while data is being transmitted in synchronous mode. Enable this funciton, SCLK will run continuously in synchronous mode, allowing characters to be received on Un_RxD independently from transmission on Un_TXD). 

Parameters:

base – USART peripheral base address. 
enable – Enable Continuous Clock generation mode or not, true for enable and false for disable. 







static inline void USART_EnableAutoClearSCLK(USART_Type *base, bool enable)#

Enable Continuous Clock generation bit auto clear. While enable this cuntion, the Continuous Clock bit is automatically cleared when a complete character has been received. This bit is cleared at the same time. 

Parameters:

base – USART peripheral base address. 
enable – Enable auto clear or not, true for enable and false for disable. 







static inline void USART_EnableCTS(USART_Type *base, bool enable)#

Enable CTS. This function will determine whether CTS is used for flow control. 

Parameters:

base – USART peripheral base address. 
enable – Enable CTS or not, true for enable and false for disable. 







static inline void USART_EnableTx(USART_Type *base, bool enable)#

Enable the USART transmit. 
This function will enable or disable the USART transmit.

Parameters:

base – USART peripheral base address. 
enable – true for enable and false for disable. 







static inline void USART_EnableRx(USART_Type *base, bool enable)#

Enable the USART receive. 
This function will enable or disable the USART receive. Note: if the transmit is enabled, the receive will not be disabled. 

Parameters:

base – USART peripheral base address. 
enable – true for enable and false for disable. 







static inline void USART_WriteByte(USART_Type *base, uint8_t data)#

Writes to the TXDAT register. 
This function will writes data to the TXDAT automatly.The upper layer must ensure that TXDATA has space for data to write before calling this function.

Parameters:

base – USART peripheral base address. 
data – The byte to write. 







static inline uint8_t USART_ReadByte(USART_Type *base)#

Reads the RXDAT directly. 
This function reads data from the RXDAT automatly. The upper layer must ensure that the RXDAT is not empty before calling this function.

Parameters:

base – USART peripheral base address. 


Returns:
The byte read from USART data register. 






status_t USART_WriteBlocking(USART_Type *base, const uint8_t *data, size_t length)#

Writes to the TX register using a blocking method. 
This function polls the TX register, waits for the TX register to be empty.

Parameters:

base – USART peripheral base address. 
data – Start address of the data to write. 
length – Size of the data to write. 


Return values:

kStatus_USART_Timeout – Transmission timed out and was aborted. 
kStatus_Success – Successfully wrote all data. 







status_t USART_ReadBlocking(USART_Type *base, uint8_t *data, size_t length)#

Read RX data register using a blocking method. 
This function polls the RX register, waits for the RX register to be full.

Parameters:

base – USART peripheral base address. 
data – Start address of the buffer to store the received data. 
length – Size of the buffer. 


Return values:

kStatus_USART_FramingError – Receiver overrun happened while receiving data. 
kStatus_USART_ParityError – Noise error happened while receiving data. 
kStatus_USART_NoiseError – Framing error happened while receiving data. 
kStatus_USART_RxError – Overflow or underflow happened. 
kStatus_USART_Timeout – Transmission timed out and was aborted. 
kStatus_Success – Successfully received all data. 







status_t USART_TransferCreateHandle(USART_Type *base, usart_handle_t *handle, usart_transfer_callback_t callback, void *userData)#

Initializes the USART handle. 
This function initializes the USART handle which can be used for other USART transactional APIs. Usually, for a specified USART instance, call this API once to get the initialized handle.

Parameters:

base – USART peripheral base address. 
handle – USART handle pointer. 
callback – The callback function. 
userData – The parameter of the callback function. 







status_t USART_TransferSendNonBlocking(USART_Type *base, usart_handle_t *handle, usart_transfer_t *xfer)#

Transmits a buffer of data using the interrupt method. 
This function sends data using an interrupt method. This is a non-blocking function, which returns directly without waiting for all data to be written to the TX register. When all data is written to the TX register in the IRQ handler, the USART driver calls the callback function and passes the kStatus_USART_TxIdle as status parameter.

Note
The kStatus_USART_TxIdle is passed to the upper layer when all data is written to the TX register. However it does not ensure that all data are sent out. Before disabling the TX, check the kUSART_TransmissionCompleteFlag to ensure that the TX is finished.


Parameters:

base – USART peripheral base address. 
handle – USART handle pointer. 
xfer – USART transfer structure. See usart_transfer_t. 


Return values:

kStatus_Success – Successfully start the data transmission. 
kStatus_USART_TxBusy – Previous transmission still not finished, data not all written to TX register yet. 
kStatus_InvalidArgument – Invalid argument. 







void USART_TransferStartRingBuffer(USART_Type *base, usart_handle_t *handle, uint8_t *ringBuffer, size_t ringBufferSize)#

Sets up the RX ring buffer. 
This function sets up the RX ring buffer to a specific USART handle.
When the RX ring buffer is used, data received are stored into the ring buffer even when the user doesn’t call the USART_TransferReceiveNonBlocking() API. If there is already data received in the ring buffer, the user can get the received data from the ring buffer directly.

Note
When using the RX ring buffer, one byte is reserved for internal use. In other words, if ringBufferSize is 32, then only 31 bytes are used for saving data.


Parameters:

base – USART peripheral base address. 
handle – USART handle pointer. 
ringBuffer – Start address of the ring buffer for background receiving. Pass NULL to disable the ring buffer. 
ringBufferSize – size of the ring buffer. 







void USART_TransferStopRingBuffer(USART_Type *base, usart_handle_t *handle)#

Aborts the background transfer and uninstalls the ring buffer. 
This function aborts the background transfer and uninstalls the ring buffer.

Parameters:

base – USART peripheral base address. 
handle – USART handle pointer. 







size_t USART_TransferGetRxRingBufferLength(usart_handle_t *handle)#

Get the length of received data in RX ring buffer. 

Parameters:

handle – USART handle pointer. 


Returns:
Length of received data in RX ring buffer. 






void USART_TransferAbortSend(USART_Type *base, usart_handle_t *handle)#

Aborts the interrupt-driven data transmit. 
This function aborts the interrupt driven data sending. The user can get the remainBtyes to find out how many bytes are still not sent out.

Parameters:

base – USART peripheral base address. 
handle – USART handle pointer. 







status_t USART_TransferGetSendCount(USART_Type *base, usart_handle_t *handle, uint32_t *count)#

Get the number of bytes that have been written to USART TX register. 
This function gets the number of bytes that have been written to USART TX register by interrupt method.

Parameters:

base – USART peripheral base address. 
handle – USART handle pointer. 
count – Send bytes count. 


Return values:

kStatus_NoTransferInProgress – No send in progress. 
kStatus_InvalidArgument – Parameter is invalid. 
kStatus_Success – Get successfully through the parameter count; 







status_t USART_TransferReceiveNonBlocking(USART_Type *base, usart_handle_t *handle, usart_transfer_t *xfer, size_t *receivedBytes)#

Receives a buffer of data using an interrupt method. 
This function receives data using an interrupt method. This is a non-blocking function, which returns without waiting for all data to be received. If the RX ring buffer is used and not empty, the data in the ring buffer is copied and the parameter receivedBytes shows how many bytes are copied from the ring buffer. After copying, if the data in the ring buffer is not enough to read, the receive request is saved by the USART driver. When the new data arrives, the receive request is serviced first. When all data is received, the USART driver notifies the upper layer through a callback function and passes the status parameter kStatus_USART_RxIdle. For example, the upper layer needs 10 bytes but there are only 5 bytes in the ring buffer. The 5 bytes are copied to the xfer->data and this function returns with the parameter receivedBytes set to 5. For the left 5 bytes, newly arrived data is saved from the xfer->data[5]. When 5 bytes are received, the USART driver notifies the upper layer. If the RX ring buffer is not enabled, this function enables the RX and RX interrupt to receive data to the xfer->data. When all data is received, the upper layer is notified.

Parameters:

base – USART peripheral base address. 
handle – USART handle pointer. 
xfer – USART transfer structure, see usart_transfer_t. 
receivedBytes – Bytes received from the ring buffer directly. 


Return values:

kStatus_Success – Successfully queue the transfer into transmit queue. 
kStatus_USART_RxBusy – Previous receive request is not finished. 
kStatus_InvalidArgument – Invalid argument. 







void USART_TransferAbortReceive(USART_Type *base, usart_handle_t *handle)#

Aborts the interrupt-driven data receiving. 
This function aborts the interrupt-driven data receiving. The user can get the remainBytes to find out how many bytes not received yet.

Parameters:

base – USART peripheral base address. 
handle – USART handle pointer. 







status_t USART_TransferGetReceiveCount(USART_Type *base, usart_handle_t *handle, uint32_t *count)#

Get the number of bytes that have been received. 
This function gets the number of bytes that have been received.

Parameters:

base – USART peripheral base address. 
handle – USART handle pointer. 
count – Receive bytes count. 


Return values:

kStatus_NoTransferInProgress – No receive in progress. 
kStatus_InvalidArgument – Parameter is invalid. 
kStatus_Success – Get successfully through the parameter count; 







void USART_TransferHandleIRQ(USART_Type *base, usart_handle_t *handle)#

USART IRQ handle function. 
This function handles the USART transmit and receive IRQ request.

Parameters:

base – USART peripheral base address. 
handle – USART handle pointer. 







void USART_DriverIRQHandler(uint32_t instance)#

Common IRQ handler entry for USART, dispatches to the registered ISR. 

Parameters:

instance – USART peripheral instance number. 







FSL_USART_DRIVER_VERSION#

USART driver version. 





Error codes for the USART driver. 
Values:


enumerator kStatus_USART_TxBusy#

Transmitter is busy. 




enumerator kStatus_USART_RxBusy#

Receiver is busy. 




enumerator kStatus_USART_TxIdle#

USART transmitter is idle. 




enumerator kStatus_USART_RxIdle#

USART receiver is idle. 




enumerator kStatus_USART_TxError#

Error happens on tx. 




enumerator kStatus_USART_RxError#

Error happens on rx. 




enumerator kStatus_USART_RxRingBufferOverrun#

Error happens on rx ring buffer 




enumerator kStatus_USART_NoiseError#

USART noise error. 




enumerator kStatus_USART_FramingError#

USART framing error. 




enumerator kStatus_USART_ParityError#

USART parity error. 




enumerator kStatus_USART_HardwareOverrun#

USART hardware over flow. 




enumerator kStatus_USART_BaudrateNotSupport#

Baudrate is not support in current clock source 




enumerator kStatus_USART_Timeout#

USART times out. 




enumerator kStatus_USART_RxIdleTimeout#

USART receive idle times out. 






enum _usart_parity_mode#

USART parity mode. 
Values:


enumerator kUSART_ParityDisabled#

Parity disabled 




enumerator kUSART_ParityEven#

Parity enabled, type even, bit setting: PARITYSEL = 10 




enumerator kUSART_ParityOdd#

Parity enabled, type odd, bit setting: PARITYSEL = 11 






enum _usart_sync_mode#

USART synchronous mode. 
Values:


enumerator kUSART_SyncModeDisabled#

Asynchronous mode. 




enumerator kUSART_SyncModeSlave#

Synchronous slave mode. 




enumerator kUSART_SyncModeMaster#

Synchronous master mode. 






enum _usart_stop_bit_count#

USART stop bit count. 
Values:


enumerator kUSART_OneStopBit#

One stop bit 




enumerator kUSART_TwoStopBit#

Two stop bits 






enum _usart_data_len#

USART data size. 
Values:


enumerator kUSART_7BitsPerChar#

Seven bit mode 




enumerator kUSART_8BitsPerChar#

Eight bit mode 






enum _usart_clock_polarity#

USART clock polarity configuration, used in sync mode. 
Values:


enumerator kUSART_RxSampleOnFallingEdge#

Un_RXD is sampled on the falling edge of SCLK. 




enumerator kUSART_RxSampleOnRisingEdge#

Un_RXD is sampled on the rising edge of SCLK. 






enum _usart_interrupt_enable#

USART interrupt configuration structure, default settings all disabled. 
Values:


enumerator kUSART_RxReadyInterruptEnable#

Receive ready interrupt. 




enumerator kUSART_TxReadyInterruptEnable#

Transmit ready interrupt. 




enumerator kUSART_TxIdleInterruptEnable#

Transmit idle interrupt. 




enumerator kUSART_DeltaCtsInterruptEnable#

Cts pin change interrupt. 




enumerator kUSART_TxDisableInterruptEnable#

Transmit disable interrupt. 




enumerator kUSART_HardwareOverRunInterruptEnable#

hardware ove run interrupt. 




enumerator kUSART_RxBreakInterruptEnable#

Receive break interrupt. 




enumerator kUSART_RxStartInterruptEnable#

Receive ready interrupt. 




enumerator kUSART_FramErrorInterruptEnable#

Receive start interrupt. 




enumerator kUSART_ParityErrorInterruptEnable#

Receive frame error interrupt. 




enumerator kUSART_RxNoiseInterruptEnable#

Receive noise error interrupt. 




enumerator kUSART_RxIdleTimeoutInterruptEnable#

Receive idle timeout interrupt. 




enumerator kUSART_AutoBaudErrorInterruptEnable#

Receive auto baud error interrupt. 




enumerator kUSART_AllInterruptEnable#

All interrupt. 






enum _usart_flags#

USART status flags. 
This provides constants for the USART status flags for use in the USART functions. 
Values:


enumerator kUSART_RxReady#

Receive ready flag. 




enumerator kUSART_RxIdleFlag#

Receive IDLE flag. 




enumerator kUSART_TxReady#

Transmit ready flag. 




enumerator kUSART_TxIdleFlag#

Transmit idle flag. 




enumerator kUSART_CtsState#

Cts pin status. 




enumerator kUSART_DeltaCtsFlag#

Cts pin change flag. 




enumerator kUSART_TxDisableFlag#

Transmit disable flag. 




enumerator kUSART_HardwareOverrunFlag#

Hardware over run flag. 




enumerator kUSART_RxBreakFlag#

Receive break flag. 




enumerator kUSART_RxStartFlag#

receive start flag. 




enumerator kUSART_FramErrorFlag#

Frame error flag. 




enumerator kUSART_ParityErrorFlag#

Parity error flag. 




enumerator kUSART_RxNoiseFlag#

Receive noise flag. 




enumerator kUSART_AutoBaudErrorFlag#

Auto baud error flag. 




enumerator kUSART_RxIdleTimeoutFlag#

Receive idle timeout flag. 






typedef enum _usart_parity_mode usart_parity_mode_t#

USART parity mode. 




typedef enum _usart_sync_mode usart_sync_mode_t#

USART synchronous mode. 




typedef enum _usart_stop_bit_count usart_stop_bit_count_t#

USART stop bit count. 




typedef enum _usart_data_len usart_data_len_t#

USART data size. 




typedef enum _usart_clock_polarity usart_clock_polarity_t#

USART clock polarity configuration, used in sync mode. 




typedef struct _usart_config usart_config_t#

USART configuration structure. 




typedef struct _usart_transfer usart_transfer_t#

USART transfer structure. 




typedef struct _usart_handle usart_handle_t#





typedef void (*usart_transfer_callback_t)(USART_Type *base, usart_handle_t *handle, status_t status, void *userData)#

USART transfer callback function. 




FSL_SDK_ENABLE_USART_DRIVER_TRANSACTIONAL_APIS#

Macro gate for enable transaction API. 1 for enable, 0 for disable. 




FSL_SDK_USART_DRIVER_ENABLE_BAUDRATE_AUTO_GENERATE#

USART baud rate auto generate switch gate. 1 for enable, 0 for disable. 




UART_RETRY_TIMES#

Retry times for waiting flag. 
Defining to zero means to keep waiting for the flag until it is assert/deassert. 




struct _usart_config#


#include <fsl_usart.h>
USART configuration structure. 

Public Members


uint32_t baudRate_Bps#

USART baud rate 




bool enableRx#

USART receive enable. 




bool enableTx#

USART transmit enable. 




bool loopback#

Enable peripheral loopback 




bool enableContinuousSCLK#

USART continuous Clock generation enable in synchronous master mode. 




bool enableHardwareFlowControl#

Enable hardware control RTS/CTS 




usart_parity_mode_t parityMode#

Parity mode, disabled (default), even, odd 




usart_stop_bit_count_t stopBitCount#

Number of stop bits, 1 stop bit (default) or 2 stop bits 




usart_data_len_t bitCountPerChar#

Data length - 7 bit, 8 bit 




usart_sync_mode_t syncMode#

Transfer mode - asynchronous, synchronous master, synchronous slave. 




usart_clock_polarity_t clockPolarity#

Selects the clock polarity and sampling edge in sync mode. 




uint8_t rxIdleTimeout#

Receive idle bytes. Value [0,7]. Set the value to n then the idle byte count will be the (n)th power of 2. 







struct _usart_transfer#


#include <fsl_usart.h>
USART transfer structure. 

Public Members


size_t dataSize#

The byte count to be transfer. 







struct _usart_handle#


#include <fsl_usart.h>
USART handle structure. 

Public Members


const uint8_t *volatile txData#

Address of remaining data to send. 




volatile size_t txDataSize#

Size of the remaining data to send. 




size_t txDataSizeAll#

Size of the data to send out. 




uint8_t *volatile rxData#

Address of remaining data to receive. 




volatile size_t rxDataSize#

Size of the remaining data to receive. 




size_t rxDataSizeAll#

Size of the data to receive. 




uint8_t *rxRingBuffer#

Start address of the receiver ring buffer. 




size_t rxRingBufferSize#

Size of the ring buffer. 




volatile uint16_t rxRingBufferHead#

Index for the driver to store received data into ring buffer. 




volatile uint16_t rxRingBufferTail#

Index for the user to get data from the ring buffer. 




usart_transfer_callback_t callback#

Callback function. 




void *userData#

USART callback function parameter. 




volatile uint8_t txState#

TX transfer state. 




volatile uint8_t rxState#

RX transfer state 







union __unnamed11__#


Public Members


uint8_t *data#

The buffer of data to be transfer. 




uint8_t *rxData#

The buffer to receive data. 




const uint8_t *txData#

The buffer of data to be sent. 







WKT: Self-wake-up Timer#


void WKT_Init(WKT_Type *base, const wkt_config_t *config)#

Ungates the WKT clock and configures the peripheral for basic operation. 

Note
This API should be called at the beginning of the application using the WKT driver.


Parameters:

base – WKT peripheral base address 
config – Pointer to user’s WKT config structure. 







void WKT_Deinit(WKT_Type *base)#

Gate the WKT clock. 

Parameters:

base – WKT peripheral base address 







static inline void WKT_GetDefaultConfig(wkt_config_t *config)#

Initializes the WKT configuration structure. 
This function initializes the WKT configuration structure to default values. The default values are as follows. 
config->clockSource = kWKT_DividedFROClockSource;




See also
wkt_config_t



Parameters:

config – Pointer to the WKT configuration structure. 







static inline uint32_t WKT_GetCounterValue(WKT_Type *base)#

Read actual WKT counter value. 

Parameters:

base – WKT peripheral base address 







static inline uint32_t WKT_GetStatusFlags(WKT_Type *base)#

Gets the WKT status flags. 

Parameters:

base – WKT peripheral base address


Returns:
The status flags. This is the logical OR of members of the enumeration wkt_status_flags_t






static inline void WKT_ClearStatusFlags(WKT_Type *base, uint32_t mask)#

Clears the WKT status flags. 

Parameters:

base – WKT peripheral base address 
mask – The status flags to clear. This is a logical OR of members of the enumeration wkt_status_flags_t







static inline void WKT_StartTimer(WKT_Type *base, uint32_t count)#

Starts the timer counting. 
After calling this function, timer loads a count value, counts down to 0, then stops.

Note
User can call the utility macros provided in fsl_common.h to convert to ticks Do not write to Counter register while the counting is in progress


Parameters:

base – WKT peripheral base address. 
count – The value to be loaded into the WKT Count register 







static inline void WKT_StopTimer(WKT_Type *base)#

Stops the timer counting. 
This function Clears the counter and stops the timer from counting.

Parameters:

base – WKT peripheral base address 







FSL_WKT_DRIVER_VERSION#

Version 2.0.2 




enum _wkt_clock_source#

Describes WKT clock source. 
Values:


enumerator kWKT_DividedFROClockSource#

WKT clock sourced from the divided FRO clock 




enumerator kWKT_LowPowerClockSource#

WKT clock sourced from the Low power clock Use this clock, LPOSCEN bit of DPDCTRL register must be enabled 




enumerator kWKT_ExternalClockSource#

WKT clock sourced from the Low power clock Use this clock, WAKECLKPAD_DISABLE bit of DPDCTRL register must be enabled 






enum _wkt_status_flags#

List of WKT flags. 
Values:


enumerator kWKT_AlarmFlag#

Alarm flag 






typedef enum _wkt_clock_source wkt_clock_source_t#

Describes WKT clock source. 




typedef struct _wkt_config wkt_config_t#

Describes WKT configuration structure. 




typedef enum _wkt_status_flags wkt_status_flags_t#

List of WKT flags. 




struct _wkt_config#


#include <fsl_wkt.h>
Describes WKT configuration structure. 

Public Members


wkt_clock_source_t clockSource#

External or internal clock source select 







WWDT: Windowed Watchdog Timer Driver#


void WWDT_GetDefaultConfig(wwdt_config_t *config)#

Initializes WWDT configure structure. 
This function initializes the WWDT configure structure to default value. The default value are: 
config->enableWwdt = true;
config->enableWatchdogReset = false;
config->enableWatchdogProtect = false;
config->enableLockOscillator = false;
config->windowValue = 0xFFFFFFU;
config->timeoutValue = 0xFFFFFFU;
config->warningValue = 0;




See also
wwdt_config_t



Parameters:

config – Pointer to WWDT config structure. 







void WWDT_Init(WWDT_Type *base, const wwdt_config_t *config)#

Initializes the WWDT. 
This function initializes the WWDT. When called, the WWDT runs according to the configuration.
Example: 
wwdt_config_t config;
WWDT_GetDefaultConfig(&config);
config.timeoutValue = 0x7ffU;
WWDT_Init(wwdt_base,&config);




Parameters:

base – WWDT peripheral base address 
config – The configuration of WWDT 







void WWDT_Deinit(WWDT_Type *base)#

Shuts down the WWDT. 
This function shuts down the WWDT.

Parameters:

base – WWDT peripheral base address 







static inline void WWDT_Enable(WWDT_Type *base)#

Enables the WWDT module. 
This function write value into WWDT_MOD register to enable the WWDT, it is a write-once bit; once this bit is set to one and a watchdog feed is performed, the watchdog timer will run permanently.

Parameters:

base – WWDT peripheral base address 







static inline void WWDT_Disable(WWDT_Type *base)#

Disables the WWDT module. 


Deprecated:
Do not use this function. It will be deleted in next release version, for once the bit field of WDEN written with a 1, it can not be re-written with a 0.



This function write value into WWDT_MOD register to disable the WWDT.

Parameters:

base – WWDT peripheral base address 







static inline uint32_t WWDT_GetStatusFlags(WWDT_Type *base)#

Gets all WWDT status flags. 
This function gets all status flags.
Example for getting Timeout Flag: 
uint32_t status;
status = WWDT_GetStatusFlags(wwdt_base) & kWWDT_TimeoutFlag;


 

Parameters:

base – WWDT peripheral base address 


Returns:
The status flags. This is the logical OR of members of the enumeration _wwdt_status_flags_t






void WWDT_ClearStatusFlags(WWDT_Type *base, uint32_t mask)#

Clear WWDT flag. 
This function clears WWDT status flag.
Example for clearing warning flag: 
WWDT_ClearStatusFlags(wwdt_base, kWWDT_WarningFlag);


 

Parameters:

base – WWDT peripheral base address 
mask – The status flags to clear. This is a logical OR of members of the enumeration _wwdt_status_flags_t







static inline void WWDT_SetWarningValue(WWDT_Type *base, uint32_t warningValue)#

Set the WWDT warning value. 
The WDWARNINT register determines the watchdog timer counter value that will generate a watchdog interrupt. When the watchdog timer counter is no longer greater than the value defined by WARNINT, an interrupt will be generated after the subsequent WDCLK.

Parameters:

base – WWDT peripheral base address 
warningValue – WWDT warning value. 







static inline void WWDT_SetTimeoutValue(WWDT_Type *base, uint32_t timeoutCount)#

Set the WWDT timeout value. 
This function sets the timeout value. Every time a feed sequence occurs the value in the TC register is loaded into the Watchdog timer. Writing a value below 0xFF will cause 0xFF to be loaded into the TC register. Thus the minimum time-out interval is TWDCLK*256*4. If enableWatchdogProtect flag is true in wwdt_config_t config structure, any attempt to change the timeout value before the watchdog counter is below the warning and window values will cause a watchdog reset and set the WDTOF flag.

Parameters:

base – WWDT peripheral base address 
timeoutCount – WWDT timeout value, count of WWDT clock tick. 







static inline void WWDT_SetWindowValue(WWDT_Type *base, uint32_t windowValue)#

Sets the WWDT window value. 
The WINDOW register determines the highest TV value allowed when a watchdog feed is performed. If a feed sequence occurs when timer value is greater than the value in WINDOW, a watchdog event will occur. To disable windowing, set windowValue to 0xFFFFFF (maximum possible timer value) so windowing is not in effect.

Parameters:

base – WWDT peripheral base address 
windowValue – WWDT window value. 







void WWDT_Refresh(WWDT_Type *base)#

Refreshes the WWDT timer. 
This function feeds the WWDT. This function should be called before WWDT timer is in timeout. Otherwise, a reset is asserted.

Parameters:

base – WWDT peripheral base address 







FSL_WWDT_DRIVER_VERSION#

Defines WWDT driver version. 




WWDT_FIRST_WORD_OF_REFRESH#

First word of refresh sequence 




WWDT_SECOND_WORD_OF_REFRESH#

Second word of refresh sequence 




enum _wwdt_status_flags_t#

WWDT status flags. 
This structure contains the WWDT status flags for use in the WWDT functions. 
Values:


enumerator kWWDT_TimeoutFlag#

Time-out flag, set when the timer times out 




enumerator kWWDT_WarningFlag#

Warning interrupt flag, set when timer is below the value WDWARNINT 






typedef struct _wwdt_config wwdt_config_t#

Describes WWDT configuration structure. 




struct _wwdt_config#


#include <fsl_wwdt.h>
Describes WWDT configuration structure. 

Public Members


bool enableWwdt#

Enables or disables WWDT 




bool enableWatchdogReset#

true: Watchdog timeout will cause a chip reset false: Watchdog timeout will not cause a chip reset 




bool enableWatchdogProtect#

true: Enable watchdog protect i.e timeout value can only be changed after counter is below warning & window values false: Disable watchdog protect; timeout value can be changed at any time 




uint32_t windowValue#

Window value, set this to 0xFFFFFF if windowing is not in effect 




uint32_t timeoutValue#

Timeout value 




uint32_t warningValue#

Watchdog time counter value that will generate a warning interrupt. Set this to 0 for no warning 




uint32_t clockFreq_Hz#

Watchdog clock source frequency.