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Macros
#define	RTE_I2C4 1

#define	RTE_I2C4_DMA_EN 0

#define	RTE_I2C5 1

#define	RTE_I2C5_DMA_EN 0

#define	RTE_SPI3 0

#define	RTE_SPI3_DMA_EN 0

#define	RTE_SPI5 1

#define	RTE_SPI5_DMA_EN 0

#define	RTE_USART0 1

#define	RTE_USART0_DMA_EN 0

#define	USART_RX_BUFFER_LEN 64

#define	USART0_RX_BUFFER_ENABLE 1

#define	RTE_I2C4_Master_DMA_BASE DMA0

#define	RTE_I2C4_Master_DMA_CH 9

#define	RTE_I2C5_Master_DMA_BASE DMA0

#define	RTE_I2C5_Master_DMA_CH 11

#define	RTE_SPI0_SSEL_NUM kSPI_Ssel0

#define	RTE_SPI0_DMA_TX_CH 1

#define	RTE_SPI0_DMA_TX_DMA_BASE DMA0

#define	RTE_SPI0_DMA_RX_CH 0

#define	RTE_SPI0_DMA_RX_DMA_BASE DMA0

#define	RTE_SPI1_SSEL_NUM kSPI_Ssel0

#define	RTE_SPI1_DMA_TX_CH 3

#define	RTE_SPI1_DMA_TX_DMA_BASE DMA0

#define	RTE_SPI1_DMA_RX_CH 2

#define	RTE_SPI1_DMA_RX_DMA_BASE DMA0

#define	RTE_SPI2_SSEL_NUM kSPI_Ssel0

#define	RTE_SPI2_DMA_TX_CH 5

#define	RTE_SPI2_DMA_TX_DMA_BASE DMA0

#define	RTE_SPI2_DMA_RX_CH 4

#define	RTE_SPI2_DMA_RX_DMA_BASE DMA0

#define	RTE_SPI3_SSEL_NUM kSPI_Ssel2

#define	RTE_SPI3_DMA_TX_CH 7

#define	RTE_SPI3_DMA_TX_DMA_BASE DMA0

#define	RTE_SPI3_DMA_RX_CH 6

#define	RTE_SPI3_DMA_RX_DMA_BASE DMA0

#define	RTE_SPI4_SSEL_NUM kSPI_Ssel0

#define	RTE_SPI4_DMA_TX_CH 9

#define	RTE_SPI4_DMA_TX_DMA_BASE DMA0

#define	RTE_SPI4_DMA_RX_CH 8

#define	RTE_SPI4_DMA_RX_DMA_BASE DMA0

#define	RTE_SPI5_SSEL_NUM kSPI_Ssel2

#define	RTE_SPI5_DMA_TX_CH 11

#define	RTE_SPI5_DMA_TX_DMA_BASE DMA0

#define	RTE_SPI5_DMA_RX_CH 10

#define	RTE_SPI5_DMA_RX_DMA_BASE DMA0

#define	RTE_SPI6_SSEL_NUM kSPI_Ssel0

#define	RTE_SPI6_DMA_TX_CH 13

#define	RTE_SPI6_DMA_TX_DMA_BASE DMA0

#define	RTE_SPI6_DMA_RX_CH 12

#define	RTE_SPI6_DMA_RX_DMA_BASE DMA0

#define	RTE_SPI7_SSEL_NUM kSPI_Ssel0

#define	RTE_SPI7_DMA_TX_CH 15

#define	RTE_SPI7_DMA_TX_DMA_BASE DMA0

#define	RTE_SPI7_DMA_RX_CH 14

#define	RTE_SPI7_DMA_RX_DMA_BASE DMA0

#define	RTE_USART0_DMA_TX_CH 1

#define	RTE_USART0_DMA_TX_DMA_BASE DMA0

#define	RTE_USART0_DMA_RX_CH 0

#define	RTE_USART0_DMA_RX_DMA_BASE DMA0

Macro Definition Documentation

◆ RTE_I2C4

#define RTE_I2C4 1

Definition at line 38 of file RTE_Device.h.

◆ RTE_I2C4_DMA_EN

#define RTE_I2C4_DMA_EN 0

Definition at line 39 of file RTE_Device.h.

◆ RTE_I2C4_Master_DMA_BASE

#define RTE_I2C4_Master_DMA_BASE DMA0

Definition at line 56 of file RTE_Device.h.

◆ RTE_I2C4_Master_DMA_CH

#define RTE_I2C4_Master_DMA_CH 9

Definition at line 57 of file RTE_Device.h.

◆ RTE_I2C5

#define RTE_I2C5 1

Definition at line 40 of file RTE_Device.h.

◆ RTE_I2C5_DMA_EN

#define RTE_I2C5_DMA_EN 0

Definition at line 41 of file RTE_Device.h.

◆ RTE_I2C5_Master_DMA_BASE

#define RTE_I2C5_Master_DMA_BASE DMA0

Definition at line 59 of file RTE_Device.h.

◆ RTE_I2C5_Master_DMA_CH

#define RTE_I2C5_Master_DMA_CH 11

Definition at line 60 of file RTE_Device.h.

◆ RTE_SPI0_DMA_RX_CH

#define RTE_SPI0_DMA_RX_CH 0

Definition at line 66 of file RTE_Device.h.

◆ RTE_SPI0_DMA_RX_DMA_BASE

#define RTE_SPI0_DMA_RX_DMA_BASE DMA0

Definition at line 67 of file RTE_Device.h.

◆ RTE_SPI0_DMA_TX_CH

#define RTE_SPI0_DMA_TX_CH 1

Definition at line 64 of file RTE_Device.h.

◆ RTE_SPI0_DMA_TX_DMA_BASE

#define RTE_SPI0_DMA_TX_DMA_BASE DMA0

Definition at line 65 of file RTE_Device.h.

◆ RTE_SPI0_SSEL_NUM

#define RTE_SPI0_SSEL_NUM kSPI_Ssel0

Definition at line 63 of file RTE_Device.h.

◆ RTE_SPI1_DMA_RX_CH

#define RTE_SPI1_DMA_RX_CH 2

Definition at line 72 of file RTE_Device.h.

◆ RTE_SPI1_DMA_RX_DMA_BASE

#define RTE_SPI1_DMA_RX_DMA_BASE DMA0

Definition at line 73 of file RTE_Device.h.

◆ RTE_SPI1_DMA_TX_CH

#define RTE_SPI1_DMA_TX_CH 3

Definition at line 70 of file RTE_Device.h.

◆ RTE_SPI1_DMA_TX_DMA_BASE

#define RTE_SPI1_DMA_TX_DMA_BASE DMA0

Definition at line 71 of file RTE_Device.h.

◆ RTE_SPI1_SSEL_NUM

#define RTE_SPI1_SSEL_NUM kSPI_Ssel0

Definition at line 69 of file RTE_Device.h.

◆ RTE_SPI2_DMA_RX_CH

#define RTE_SPI2_DMA_RX_CH 4

Definition at line 78 of file RTE_Device.h.

◆ RTE_SPI2_DMA_RX_DMA_BASE

#define RTE_SPI2_DMA_RX_DMA_BASE DMA0

Definition at line 79 of file RTE_Device.h.

◆ RTE_SPI2_DMA_TX_CH

#define RTE_SPI2_DMA_TX_CH 5

Definition at line 76 of file RTE_Device.h.

◆ RTE_SPI2_DMA_TX_DMA_BASE

#define RTE_SPI2_DMA_TX_DMA_BASE DMA0

Definition at line 77 of file RTE_Device.h.

◆ RTE_SPI2_SSEL_NUM

#define RTE_SPI2_SSEL_NUM kSPI_Ssel0

Definition at line 75 of file RTE_Device.h.

◆ RTE_SPI3

#define RTE_SPI3 0

Definition at line 43 of file RTE_Device.h.

◆ RTE_SPI3_DMA_EN

#define RTE_SPI3_DMA_EN 0

Definition at line 44 of file RTE_Device.h.

◆ RTE_SPI3_DMA_RX_CH

#define RTE_SPI3_DMA_RX_CH 6

Definition at line 84 of file RTE_Device.h.

◆ RTE_SPI3_DMA_RX_DMA_BASE

#define RTE_SPI3_DMA_RX_DMA_BASE DMA0

Definition at line 85 of file RTE_Device.h.

◆ RTE_SPI3_DMA_TX_CH

#define RTE_SPI3_DMA_TX_CH 7

Definition at line 82 of file RTE_Device.h.

◆ RTE_SPI3_DMA_TX_DMA_BASE

#define RTE_SPI3_DMA_TX_DMA_BASE DMA0

Definition at line 83 of file RTE_Device.h.

◆ RTE_SPI3_SSEL_NUM

#define RTE_SPI3_SSEL_NUM kSPI_Ssel2

Definition at line 81 of file RTE_Device.h.

◆ RTE_SPI4_DMA_RX_CH

#define RTE_SPI4_DMA_RX_CH 8

Definition at line 90 of file RTE_Device.h.

◆ RTE_SPI4_DMA_RX_DMA_BASE

#define RTE_SPI4_DMA_RX_DMA_BASE DMA0

Definition at line 91 of file RTE_Device.h.

◆ RTE_SPI4_DMA_TX_CH

#define RTE_SPI4_DMA_TX_CH 9

Definition at line 88 of file RTE_Device.h.

◆ RTE_SPI4_DMA_TX_DMA_BASE

#define RTE_SPI4_DMA_TX_DMA_BASE DMA0

Definition at line 89 of file RTE_Device.h.

◆ RTE_SPI4_SSEL_NUM

#define RTE_SPI4_SSEL_NUM kSPI_Ssel0

Definition at line 87 of file RTE_Device.h.

◆ RTE_SPI5

#define RTE_SPI5 1

Definition at line 45 of file RTE_Device.h.

◆ RTE_SPI5_DMA_EN

#define RTE_SPI5_DMA_EN 0

Definition at line 46 of file RTE_Device.h.

◆ RTE_SPI5_DMA_RX_CH

#define RTE_SPI5_DMA_RX_CH 10

Definition at line 96 of file RTE_Device.h.

◆ RTE_SPI5_DMA_RX_DMA_BASE

#define RTE_SPI5_DMA_RX_DMA_BASE DMA0

Definition at line 97 of file RTE_Device.h.

◆ RTE_SPI5_DMA_TX_CH

#define RTE_SPI5_DMA_TX_CH 11

Definition at line 94 of file RTE_Device.h.

◆ RTE_SPI5_DMA_TX_DMA_BASE

#define RTE_SPI5_DMA_TX_DMA_BASE DMA0

Definition at line 95 of file RTE_Device.h.

◆ RTE_SPI5_SSEL_NUM

#define RTE_SPI5_SSEL_NUM kSPI_Ssel2

Definition at line 93 of file RTE_Device.h.

◆ RTE_SPI6_DMA_RX_CH

#define RTE_SPI6_DMA_RX_CH 12

Definition at line 102 of file RTE_Device.h.

◆ RTE_SPI6_DMA_RX_DMA_BASE

#define RTE_SPI6_DMA_RX_DMA_BASE DMA0

Definition at line 103 of file RTE_Device.h.

◆ RTE_SPI6_DMA_TX_CH

#define RTE_SPI6_DMA_TX_CH 13

Definition at line 100 of file RTE_Device.h.

◆ RTE_SPI6_DMA_TX_DMA_BASE

#define RTE_SPI6_DMA_TX_DMA_BASE DMA0

Definition at line 101 of file RTE_Device.h.

◆ RTE_SPI6_SSEL_NUM

#define RTE_SPI6_SSEL_NUM kSPI_Ssel0

Definition at line 99 of file RTE_Device.h.

◆ RTE_SPI7_DMA_RX_CH

#define RTE_SPI7_DMA_RX_CH 14

Definition at line 108 of file RTE_Device.h.

◆ RTE_SPI7_DMA_RX_DMA_BASE

#define RTE_SPI7_DMA_RX_DMA_BASE DMA0

Definition at line 109 of file RTE_Device.h.

◆ RTE_SPI7_DMA_TX_CH

#define RTE_SPI7_DMA_TX_CH 15

Definition at line 106 of file RTE_Device.h.

◆ RTE_SPI7_DMA_TX_DMA_BASE

#define RTE_SPI7_DMA_TX_DMA_BASE DMA0

Definition at line 107 of file RTE_Device.h.

◆ RTE_SPI7_SSEL_NUM

#define RTE_SPI7_SSEL_NUM kSPI_Ssel0

Definition at line 105 of file RTE_Device.h.

◆ RTE_USART0

#define RTE_USART0 1

Definition at line 48 of file RTE_Device.h.

◆ RTE_USART0_DMA_EN

#define RTE_USART0_DMA_EN 0

Definition at line 49 of file RTE_Device.h.

◆ RTE_USART0_DMA_RX_CH

#define RTE_USART0_DMA_RX_CH 0

Definition at line 114 of file RTE_Device.h.

◆ RTE_USART0_DMA_RX_DMA_BASE

#define RTE_USART0_DMA_RX_DMA_BASE DMA0

Definition at line 115 of file RTE_Device.h.

◆ RTE_USART0_DMA_TX_CH

#define RTE_USART0_DMA_TX_CH 1

Definition at line 112 of file RTE_Device.h.

◆ RTE_USART0_DMA_TX_DMA_BASE

#define RTE_USART0_DMA_TX_DMA_BASE DMA0

Definition at line 113 of file RTE_Device.h.

◆ USART0_RX_BUFFER_ENABLE

#define USART0_RX_BUFFER_ENABLE 1

Definition at line 53 of file RTE_Device.h.

◆ USART_RX_BUFFER_LEN

#define USART_RX_BUFFER_LEN 64

Definition at line 52 of file RTE_Device.h.

Macros