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Macros
#define	FXLC95000_HDR_SIZE 4
	Size of fixed header bytes in sensor commands. More...

#define	FXLC95000_SAMPLE_OFFSET 16
	Time stamp and XYZ Data Register Offset. More...

#define	FXLC95000_BUILD_ID_OFFSET 12
	Offset of 2-Byte ISF1.1_95k_Build_ID in Device Info Response. More...

#define	FXLC95000_BUILD_ID_SIZE 2
	The FXLC95000 Size of ISF1.1_95k_Build_ID. More...

#define	FXLC95000_BUILD_ID 0x36C2
	The FXLC95000 BCD encoded ISF1.1_95k_Build_ID. More...

#define	FXLC95000_RESERVED_ID 0xFFFF
	The FXLC95000 Reserved filed bytes. More...

#define	FXLC95000_PART_NUMBER_OFFSET 14
	Offset of 2-Byte SA95000 Part Number in Device Info Response. More...

#define	FXLC95000_PART_NUMBER_SIZE 2
	The FXLC95000 Size of Part Number. More...

#define	FXLC95000_PART_NUMBER 0x5000
	The FXLC95000 2-byte packed BCD encoded Part Number (BCD for Last 4 characters). More...

#define	FXLC95000_I2C_ADDRESS 0x4C
	The FXLC95000 I2C Slave Address. More...

#define	FXLC95000_SET_ODR_CMD_HDR 0x02, 0x02, 0x03, 0x04
	The FXLC95000 Set Report Rate Command Header Bytes. More...

#define	FXLC95000_SET_RESOLUTION_CMD_HDR 0x02, 0x02, 0x07, 0x01
	The FXLC95000 Set Resolution Command Header Bytes. More...

#define	FXLC95000_SET_RANGE_CMD_HDR 0x02, 0x02, 0x08, 0x01
	The FXLC95000 Set Range Command Header Bytes. More...

#define	FXLC95000_SST_ODR_PAYLOAD(x) (x & 0xFF000000) >> 24, (x & 0xFF0000) >> 16, (x & 0xFF00) >> 8, (x & 0xFF)
	The FXLC95000 Set Report Rate Payload Bytes. More...

#define	FXLC95000_ACCEL_RANGE_2G 0x40
	The FXLC95000 FS Range 2G. More...

#define	FXLC95000_ACCEL_RANGE_4G 0x80
	The FXLC95000 FS Range 4G. More...

#define	FXLC95000_ACCEL_RANGE_8G 0xC0
	The FXLC95000 FS Range 8G. More...

#define	FXLC95000_ACCEL_RESOLUTION_10_BIT 0x0C
	The FXLC95000 Resoultion 10-Bit. More...

#define	FXLC95000_ACCEL_RESOLUTION_12_BIT 0x08
	The FXLC95000 Resoultion 12-Bit. More...

#define	FXLC95000_ACCEL_RESOLUTION_14_BIT 0x04
	The FXLC95000 Resoultion 14-Bit. More...

#define	FXLC95000_ACCEL_RESOLUTION_16_BIT 0x00
	The FXLC95000 Resoultion 16-Bit. More...

Macro Definition Documentation

◆ FXLC95000_ACCEL_RANGE_2G

#define FXLC95000_ACCEL_RANGE_2G 0x40

The FXLC95000 FS Range 2G.

Definition at line 54 of file fxlc95000.h.

◆ FXLC95000_ACCEL_RANGE_4G

#define FXLC95000_ACCEL_RANGE_4G 0x80

The FXLC95000 FS Range 4G.

Definition at line 57 of file fxlc95000.h.

◆ FXLC95000_ACCEL_RANGE_8G

#define FXLC95000_ACCEL_RANGE_8G 0xC0

The FXLC95000 FS Range 8G.

Definition at line 60 of file fxlc95000.h.

◆ FXLC95000_ACCEL_RESOLUTION_10_BIT

#define FXLC95000_ACCEL_RESOLUTION_10_BIT 0x0C

The FXLC95000 Resoultion 10-Bit.

Definition at line 63 of file fxlc95000.h.

◆ FXLC95000_ACCEL_RESOLUTION_12_BIT

#define FXLC95000_ACCEL_RESOLUTION_12_BIT 0x08

The FXLC95000 Resoultion 12-Bit.

Definition at line 66 of file fxlc95000.h.

◆ FXLC95000_ACCEL_RESOLUTION_14_BIT

#define FXLC95000_ACCEL_RESOLUTION_14_BIT 0x04

The FXLC95000 Resoultion 14-Bit.

Definition at line 69 of file fxlc95000.h.

◆ FXLC95000_ACCEL_RESOLUTION_16_BIT

#define FXLC95000_ACCEL_RESOLUTION_16_BIT 0x00

The FXLC95000 Resoultion 16-Bit.

Definition at line 72 of file fxlc95000.h.

◆ FXLC95000_BUILD_ID

#define FXLC95000_BUILD_ID 0x36C2

The FXLC95000 BCD encoded ISF1.1_95k_Build_ID.

Definition at line 24 of file fxlc95000.h.

Referenced by fxlc95000_enSensor(), and main().

◆ FXLC95000_BUILD_ID_OFFSET

#define FXLC95000_BUILD_ID_OFFSET 12

Offset of 2-Byte ISF1.1_95k_Build_ID in Device Info Response.

Definition at line 18 of file fxlc95000.h.

◆ FXLC95000_BUILD_ID_SIZE

#define FXLC95000_BUILD_ID_SIZE 2

The FXLC95000 Size of ISF1.1_95k_Build_ID.

Definition at line 21 of file fxlc95000.h.

◆ FXLC95000_HDR_SIZE

#define FXLC95000_HDR_SIZE 4

Size of fixed header bytes in sensor commands.

Definition at line 12 of file fxlc95000.h.

◆ FXLC95000_I2C_ADDRESS

#define FXLC95000_I2C_ADDRESS 0x4C

The FXLC95000 I2C Slave Address.

Definition at line 39 of file fxlc95000.h.

◆ FXLC95000_PART_NUMBER

#define FXLC95000_PART_NUMBER 0x5000

The FXLC95000 2-byte packed BCD encoded Part Number (BCD for Last 4 characters).

Definition at line 36 of file fxlc95000.h.

◆ FXLC95000_PART_NUMBER_OFFSET

#define FXLC95000_PART_NUMBER_OFFSET 14

Offset of 2-Byte SA95000 Part Number in Device Info Response.

Definition at line 30 of file fxlc95000.h.

◆ FXLC95000_PART_NUMBER_SIZE

#define FXLC95000_PART_NUMBER_SIZE 2

The FXLC95000 Size of Part Number.

Definition at line 33 of file fxlc95000.h.

◆ FXLC95000_RESERVED_ID

#define FXLC95000_RESERVED_ID 0xFFFF

The FXLC95000 Reserved filed bytes.

Definition at line 27 of file fxlc95000.h.

◆ FXLC95000_SAMPLE_OFFSET

#define FXLC95000_SAMPLE_OFFSET 16

Time stamp and XYZ Data Register Offset.

Definition at line 15 of file fxlc95000.h.

◆ FXLC95000_SET_ODR_CMD_HDR

#define FXLC95000_SET_ODR_CMD_HDR 0x02, 0x02, 0x03, 0x04

The FXLC95000 Set Report Rate Command Header Bytes.

Definition at line 42 of file fxlc95000.h.

◆ FXLC95000_SET_RANGE_CMD_HDR

#define FXLC95000_SET_RANGE_CMD_HDR 0x02, 0x02, 0x08, 0x01

The FXLC95000 Set Range Command Header Bytes.

Definition at line 48 of file fxlc95000.h.

◆ FXLC95000_SET_RESOLUTION_CMD_HDR

#define FXLC95000_SET_RESOLUTION_CMD_HDR 0x02, 0x02, 0x07, 0x01

The FXLC95000 Set Resolution Command Header Bytes.

Definition at line 45 of file fxlc95000.h.

◆ FXLC95000_SST_ODR_PAYLOAD

#define FXLC95000_SST_ODR_PAYLOAD ( x ) (x & 0xFF000000) >> 24, (x & 0xFF0000) >> 16, (x & 0xFF00) >> 8, (x & 0xFF)

The FXLC95000 Set Report Rate Payload Bytes.

Definition at line 51 of file fxlc95000.h.

Macros