Overview

Data Structures
struct	i3c_master_config_t
	Structure with settings to initialize the I3C master module. More...

struct	i3c_master_transfer_t
	Non-blocking transfer descriptor structure. More...

struct	i3c_master_handle_t
	Driver handle for master non-blocking APIs. More...

Typedefs
typedef void(*	i3c_master_transfer_callback_t )(I3C_Type base, i3c_master_handle_t handle, status_t completionStatus, void *userData)
	Master completion callback function pointer type. More...

typedef void(*	i3c_master_transfer_callback_t )(I3C_Type base, i3c_master_handle_t handle, status_t completionStatus, void *userData)
	Master completion callback function pointer type. More...

Enumerations
enum	_i3c_master_flags { kI3C_MasterBetweenFlag = I3C_MSTATUS_BETWEEN_MASK, kI3C_MasterNackDetectFlag = I3C_MSTATUS_NACKED_MASK, kI3C_MasterSlaveStartFlag = I3C_MSTATUS_SLVSTART_MASK, kI3C_MasterControlDoneFlag = I3C_MSTATUS_MCTRLDONE_MASK, kI3C_MasterCompleteFlag = I3C_MSTATUS_COMPLETE_MASK, kI3C_MasterRxReadyFlag = I3C_MSTATUS_RXPEND_MASK, kI3C_MasterTxReadyFlag = I3C_MSTATUS_TXNOTFULL_MASK, kI3C_MasterArbitrationWonFlag = I3C_MSTATUS_IBIWON_MASK, kI3C_MasterErrorFlag = I3C_MSTATUS_ERRWARN_MASK, kI3C_MasterSlave2MasterFlag = I3C_MSTATUS_NOWMASTER_MASK, kI3C_MasterBetweenFlag = I3C_MSTATUS_BETWEEN_MASK, kI3C_MasterNackDetectFlag = I3C_MSTATUS_NACKED_MASK, kI3C_MasterSlaveStartFlag = I3C_MSTATUS_SLVSTART_MASK, kI3C_MasterControlDoneFlag = I3C_MSTATUS_MCTRLDONE_MASK, kI3C_MasterCompleteFlag = I3C_MSTATUS_COMPLETE_MASK, kI3C_MasterRxReadyFlag = I3C_MSTATUS_RXPEND_MASK, kI3C_MasterTxReadyFlag = I3C_MSTATUS_TXNOTFULL_MASK, kI3C_MasterArbitrationWonFlag = I3C_MSTATUS_IBIWON_MASK, kI3C_MasterErrorFlag = I3C_MSTATUS_ERRWARN_MASK, kI3C_MasterSlave2MasterFlag = I3C_MSTATUS_NOWMASTER_MASK }
	I3C master peripheral flags. More...

enum	_i3c_master_error_flags { kI3C_MasterErrorNackFlag = I3C_MERRWARN_NACK_MASK, kI3C_MasterErrorWriteAbortFlag = I3C_MERRWARN_WRABT_MASK, kI3C_MasterErrorTermFlag = I3C_MERRWARN_TERM_MASK, kI3C_MasterErrorParityFlag = I3C_MERRWARN_HPAR_MASK, kI3C_MasterErrorCrcFlag = I3C_MERRWARN_HCRC_MASK, kI3C_MasterErrorReadFlag = I3C_MERRWARN_OREAD_MASK, kI3C_MasterErrorWriteFlag = I3C_MERRWARN_OWRITE_MASK, kI3C_MasterErrorMsgFlag = I3C_MERRWARN_MSGERR_MASK, kI3C_MasterErrorInvalidReqFlag = I3C_MERRWARN_INVREQ_MASK, kI3C_MasterErrorTimeoutFlag = I3C_MERRWARN_TIMEOUT_MASK, kI3C_MasterErrorNackFlag = I3C_MERRWARN_NACK_MASK, kI3C_MasterErrorWriteAbortFlag = I3C_MERRWARN_WRABT_MASK, kI3C_MasterErrorTermFlag = I3C_MERRWARN_TERM_MASK, kI3C_MasterErrorParityFlag = I3C_MERRWARN_HPAR_MASK, kI3C_MasterErrorCrcFlag = I3C_MERRWARN_HCRC_MASK, kI3C_MasterErrorReadFlag = I3C_MERRWARN_OREAD_MASK, kI3C_MasterErrorWriteFlag = I3C_MERRWARN_OWRITE_MASK, kI3C_MasterErrorMsgFlag = I3C_MERRWARN_MSGERR_MASK, kI3C_MasterErrorInvalidReqFlag = I3C_MERRWARN_INVREQ_MASK, kI3C_MasterErrorTimeoutFlag = I3C_MERRWARN_TIMEOUT_MASK }
	I3C master error flags to indicate the causes. More...

enum	i3c_master_state_t { kI3C_MasterStateIdle = 0U, kI3C_MasterStateSlvReq = 1U, kI3C_MasterStateMsgSdr = 2U, kI3C_MasterStateNormAct = 3U, kI3C_MasterStateDdr = 4U, kI3C_MasterStateDaa = 5U, kI3C_MasterStateIbiAck = 6U, kI3C_MasterStateIbiRcv = 7U, kI3C_MasterStateIdle = 0U, kI3C_MasterStateSlvReq = 1U, kI3C_MasterStateMsgSdr = 2U, kI3C_MasterStateNormAct = 3U, kI3C_MasterStateDdr = 4U, kI3C_MasterStateDaa = 5U, kI3C_MasterStateIbiAck = 6U, kI3C_MasterStateIbiRcv = 7U }
	I3C working master state. More...

enum	i3c_master_enable_t { kI3C_MasterOff = 0U, kI3C_MasterOn = 1U, kI3C_MasterCapable = 2U, kI3C_MasterOff = 0U, kI3C_MasterOn = 1U, kI3C_MasterCapable = 2U }
	I3C master enable configuration. More...

enum	i3c_master_hkeep_t { kI3C_MasterHighKeeperNone = 0U, kI3C_MasterHighKeeperWiredIn = 1U, kI3C_MasterPassiveSDA = 2U, kI3C_MasterPassiveSDASCL = 3U, kI3C_MasterHighKeeperNone = 0U, kI3C_MasterHighKeeperWiredIn = 1U, kI3C_MasterPassiveSDA = 2U, kI3C_MasterPassiveSDASCL = 3U }
	I3C high keeper configuration. More...

enum	i3c_bus_request_t { kI3C_RequestNone = 0U, kI3C_RequestEmitStartAddr = 1U, kI3C_RequestEmitStop = 2U, kI3C_RequestIbiAckNack = 3U, kI3C_RequestProcessDAA = 4U, kI3C_RequestForceExit = 6U, kI3C_RequestAutoIbi = 7U, kI3C_RequestNone = 0U, kI3C_RequestEmitStartAddr = 1U, kI3C_RequestEmitStop = 2U, kI3C_RequestIbiAckNack = 3U, kI3C_RequestProcessDAA = 4U, kI3C_RequestForceExit = 6U, kI3C_RequestAutoIbi = 7U }
	Emits the requested operation when doing in pieces vs. More...

enum	i3c_bus_type_t { kI3C_TypeI3CSdr = 0U, kI3C_TypeI2C = 1U, kI3C_TypeI3CDDR = 2U, kI3C_TypeI3CSdr = 0U, kI3C_TypeI2C = 1U, kI3C_TypeI3CDDR = 2U }
	Bus type with EmitStartAddr. More...

enum	i3c_ibi_response_t { kI3C_IbiRespAck = 0U, kI3C_IbiRespNack = 1U, kI3C_IbiRespAckMandatory = 2U, kI3C_IbiRespManual = 3U, kI3C_IbiRespAck = 0U, kI3C_IbiRespNack = 1U, kI3C_IbiRespAckMandatory = 2U, kI3C_IbiRespManual = 3U }
	IBI response. More...

enum	i3c_direction_t { kI3C_Write = 0U, kI3C_Read = 1U, kI3C_Write = 0U, kI3C_Read = 1U }
	Direction of master and slave transfers. More...

enum	i3c_tx_trigger_level_t { kI3C_TxTriggerOnEmpty = 0U, kI3C_TxTriggerUntilOneQuarterOrLess = 1U, kI3C_TxTriggerUntilOneHalfOrLess = 2U, kI3C_TxTriggerUntilOneLessThanFull = 3U, kI3C_TxTriggerOnEmpty = 0U, kI3C_TxTriggerUntilOneQuarterOrLess = 1U, kI3C_TxTriggerUntilOneHalfOrLess = 2U, kI3C_TxTriggerUntilOneLessThanFull = 3U }
	Watermark of TX int/dma trigger level. More...

enum	i3c_rx_trigger_level_t { kI3C_RxTriggerOnNotEmpty = 0U, kI3C_RxTriggerUntilOneQuarterOrMore = 1U, kI3C_RxTriggerUntilOneHalfOrMore = 2U, kI3C_RxTriggerUntilThreeQuarterOrMore = 3U, kI3C_RxTriggerOnNotEmpty = 0U, kI3C_RxTriggerUntilOneQuarterOrMore = 1U, kI3C_RxTriggerUntilOneHalfOrMore = 2U, kI3C_RxTriggerUntilThreeQuarterOrMore = 3U }
	Watermark of RX int/dma trigger level. More...

enum	_i3c_master_transfer_flags { kI3C_TransferDefaultFlag = 0x00U, kI3C_TransferNoStartFlag = 0x01U, kI3C_TransferRepeatedStartFlag = 0x02U, kI3C_TransferNoStopFlag = 0x04U, kI3C_TransferDefaultFlag = 0x00U, kI3C_TransferNoStartFlag = 0x01U, kI3C_TransferRepeatedStartFlag = 0x02U, kI3C_TransferNoStopFlag = 0x04U }
	Transfer option flags. More...

enum	_i3c_master_flags { kI3C_MasterBetweenFlag = I3C_MSTATUS_BETWEEN_MASK, kI3C_MasterNackDetectFlag = I3C_MSTATUS_NACKED_MASK, kI3C_MasterSlaveStartFlag = I3C_MSTATUS_SLVSTART_MASK, kI3C_MasterControlDoneFlag = I3C_MSTATUS_MCTRLDONE_MASK, kI3C_MasterCompleteFlag = I3C_MSTATUS_COMPLETE_MASK, kI3C_MasterRxReadyFlag = I3C_MSTATUS_RXPEND_MASK, kI3C_MasterTxReadyFlag = I3C_MSTATUS_TXNOTFULL_MASK, kI3C_MasterArbitrationWonFlag = I3C_MSTATUS_IBIWON_MASK, kI3C_MasterErrorFlag = I3C_MSTATUS_ERRWARN_MASK, kI3C_MasterSlave2MasterFlag = I3C_MSTATUS_NOWMASTER_MASK, kI3C_MasterBetweenFlag = I3C_MSTATUS_BETWEEN_MASK, kI3C_MasterNackDetectFlag = I3C_MSTATUS_NACKED_MASK, kI3C_MasterSlaveStartFlag = I3C_MSTATUS_SLVSTART_MASK, kI3C_MasterControlDoneFlag = I3C_MSTATUS_MCTRLDONE_MASK, kI3C_MasterCompleteFlag = I3C_MSTATUS_COMPLETE_MASK, kI3C_MasterRxReadyFlag = I3C_MSTATUS_RXPEND_MASK, kI3C_MasterTxReadyFlag = I3C_MSTATUS_TXNOTFULL_MASK, kI3C_MasterArbitrationWonFlag = I3C_MSTATUS_IBIWON_MASK, kI3C_MasterErrorFlag = I3C_MSTATUS_ERRWARN_MASK, kI3C_MasterSlave2MasterFlag = I3C_MSTATUS_NOWMASTER_MASK }
	I3C master peripheral flags. More...

enum	_i3c_master_error_flags { kI3C_MasterErrorNackFlag = I3C_MERRWARN_NACK_MASK, kI3C_MasterErrorWriteAbortFlag = I3C_MERRWARN_WRABT_MASK, kI3C_MasterErrorTermFlag = I3C_MERRWARN_TERM_MASK, kI3C_MasterErrorParityFlag = I3C_MERRWARN_HPAR_MASK, kI3C_MasterErrorCrcFlag = I3C_MERRWARN_HCRC_MASK, kI3C_MasterErrorReadFlag = I3C_MERRWARN_OREAD_MASK, kI3C_MasterErrorWriteFlag = I3C_MERRWARN_OWRITE_MASK, kI3C_MasterErrorMsgFlag = I3C_MERRWARN_MSGERR_MASK, kI3C_MasterErrorInvalidReqFlag = I3C_MERRWARN_INVREQ_MASK, kI3C_MasterErrorTimeoutFlag = I3C_MERRWARN_TIMEOUT_MASK, kI3C_MasterErrorNackFlag = I3C_MERRWARN_NACK_MASK, kI3C_MasterErrorWriteAbortFlag = I3C_MERRWARN_WRABT_MASK, kI3C_MasterErrorTermFlag = I3C_MERRWARN_TERM_MASK, kI3C_MasterErrorParityFlag = I3C_MERRWARN_HPAR_MASK, kI3C_MasterErrorCrcFlag = I3C_MERRWARN_HCRC_MASK, kI3C_MasterErrorReadFlag = I3C_MERRWARN_OREAD_MASK, kI3C_MasterErrorWriteFlag = I3C_MERRWARN_OWRITE_MASK, kI3C_MasterErrorMsgFlag = I3C_MERRWARN_MSGERR_MASK, kI3C_MasterErrorInvalidReqFlag = I3C_MERRWARN_INVREQ_MASK, kI3C_MasterErrorTimeoutFlag = I3C_MERRWARN_TIMEOUT_MASK }
	I3C master error flags to indicate the causes. More...

enum	i3c_master_state_t { kI3C_MasterStateIdle = 0U, kI3C_MasterStateSlvReq = 1U, kI3C_MasterStateMsgSdr = 2U, kI3C_MasterStateNormAct = 3U, kI3C_MasterStateDdr = 4U, kI3C_MasterStateDaa = 5U, kI3C_MasterStateIbiAck = 6U, kI3C_MasterStateIbiRcv = 7U, kI3C_MasterStateIdle = 0U, kI3C_MasterStateSlvReq = 1U, kI3C_MasterStateMsgSdr = 2U, kI3C_MasterStateNormAct = 3U, kI3C_MasterStateDdr = 4U, kI3C_MasterStateDaa = 5U, kI3C_MasterStateIbiAck = 6U, kI3C_MasterStateIbiRcv = 7U }
	I3C working master state. More...

enum	i3c_master_enable_t { kI3C_MasterOff = 0U, kI3C_MasterOn = 1U, kI3C_MasterCapable = 2U, kI3C_MasterOff = 0U, kI3C_MasterOn = 1U, kI3C_MasterCapable = 2U }
	I3C master enable configuration. More...

enum	i3c_master_hkeep_t { kI3C_MasterHighKeeperNone = 0U, kI3C_MasterHighKeeperWiredIn = 1U, kI3C_MasterPassiveSDA = 2U, kI3C_MasterPassiveSDASCL = 3U, kI3C_MasterHighKeeperNone = 0U, kI3C_MasterHighKeeperWiredIn = 1U, kI3C_MasterPassiveSDA = 2U, kI3C_MasterPassiveSDASCL = 3U }
	I3C high keeper configuration. More...

enum	i3c_bus_request_t { kI3C_RequestNone = 0U, kI3C_RequestEmitStartAddr = 1U, kI3C_RequestEmitStop = 2U, kI3C_RequestIbiAckNack = 3U, kI3C_RequestProcessDAA = 4U, kI3C_RequestForceExit = 6U, kI3C_RequestAutoIbi = 7U, kI3C_RequestNone = 0U, kI3C_RequestEmitStartAddr = 1U, kI3C_RequestEmitStop = 2U, kI3C_RequestIbiAckNack = 3U, kI3C_RequestProcessDAA = 4U, kI3C_RequestForceExit = 6U, kI3C_RequestAutoIbi = 7U }
	Emits the requested operation when doing in pieces vs. More...

enum	i3c_bus_type_t { kI3C_TypeI3CSdr = 0U, kI3C_TypeI2C = 1U, kI3C_TypeI3CDDR = 2U, kI3C_TypeI3CSdr = 0U, kI3C_TypeI2C = 1U, kI3C_TypeI3CDDR = 2U }
	Bus type with EmitStartAddr. More...

enum	i3c_ibi_response_t { kI3C_IbiRespAck = 0U, kI3C_IbiRespNack = 1U, kI3C_IbiRespAckMandatory = 2U, kI3C_IbiRespManual = 3U, kI3C_IbiRespAck = 0U, kI3C_IbiRespNack = 1U, kI3C_IbiRespAckMandatory = 2U, kI3C_IbiRespManual = 3U }
	IBI response. More...

enum	i3c_direction_t { kI3C_Write = 0U, kI3C_Read = 1U, kI3C_Write = 0U, kI3C_Read = 1U }
	Direction of master and slave transfers. More...

enum	i3c_tx_trigger_level_t { kI3C_TxTriggerOnEmpty = 0U, kI3C_TxTriggerUntilOneQuarterOrLess = 1U, kI3C_TxTriggerUntilOneHalfOrLess = 2U, kI3C_TxTriggerUntilOneLessThanFull = 3U, kI3C_TxTriggerOnEmpty = 0U, kI3C_TxTriggerUntilOneQuarterOrLess = 1U, kI3C_TxTriggerUntilOneHalfOrLess = 2U, kI3C_TxTriggerUntilOneLessThanFull = 3U }
	Watermark of TX int/dma trigger level. More...

enum	i3c_rx_trigger_level_t { kI3C_RxTriggerOnNotEmpty = 0U, kI3C_RxTriggerUntilOneQuarterOrMore = 1U, kI3C_RxTriggerUntilOneHalfOrMore = 2U, kI3C_RxTriggerUntilThreeQuarterOrMore = 3U, kI3C_RxTriggerOnNotEmpty = 0U, kI3C_RxTriggerUntilOneQuarterOrMore = 1U, kI3C_RxTriggerUntilOneHalfOrMore = 2U, kI3C_RxTriggerUntilThreeQuarterOrMore = 3U }
	Watermark of RX int/dma trigger level. More...

enum	_i3c_master_transfer_flags { kI3C_TransferDefaultFlag = 0x00U, kI3C_TransferNoStartFlag = 0x01U, kI3C_TransferRepeatedStartFlag = 0x02U, kI3C_TransferNoStopFlag = 0x04U, kI3C_TransferDefaultFlag = 0x00U, kI3C_TransferNoStartFlag = 0x01U, kI3C_TransferRepeatedStartFlag = 0x02U, kI3C_TransferNoStopFlag = 0x04U }
	Transfer option flags. More...

Initialization and deinitialization
void	I3C_MasterGetDefaultConfig (i3c_master_config_t *masterConfig)
	Provides a default configuration for the I3C master peripheral. More...

void	I3C_MasterInit (I3C_Type base, const i3c_master_config_t masterConfig, uint32_t sourceClock_Hz)
	Initializes the I3C master peripheral. More...

void	I3C_MasterDeinit (I3C_Type *base)
	Deinitializes the I3C master peripheral. More...

status_t	I3C_MasterCheckAndClearError (I3C_Type *base, uint32_t status)

status_t	I3C_CheckForBusyBus (I3C_Type *base)

static void	I3C_MasterEnable (I3C_Type *base, i3c_master_enable_t enable)
	Set I3C module master mode. More...

Status
static uint32_t	I3C_MasterGetStatusFlags (I3C_Type *base)
	Gets the I3C master status flags. More...

static void	I3C_MasterClearStatusFlags (I3C_Type *base, uint32_t statusMask)
	Clears the I3C master status flag state. More...

static uint32_t	I3C_MasterGetErrorStatusFlags (I3C_Type *base)
	Gets the I3C master error status flags. More...

static void	I3C_MasterClearErrorStatusFlags (I3C_Type *base, uint32_t statusMask)
	Clears the I3C master error status flag state. More...

static i3c_master_state_t	I3C_MasterGetState (I3C_Type *base)
	Gets the I3C master state. More...

Interrupts
static void	I3C_MasterEnableInterrupts (I3C_Type *base, uint32_t interruptMask)
	Enables the I3C master interrupt requests. More...

static void	I3C_MasterDisableInterrupts (I3C_Type *base, uint32_t interruptMask)
	Disables the I3C master interrupt requests. More...

static uint32_t	I3C_MasterGetEnabledInterrupts (I3C_Type *base)
	Returns the set of currently enabled I3C master interrupt requests. More...

static uint32_t	I3C_MasterGetPendingInterrupts (I3C_Type *base)
	Returns the set of pending I3C master interrupt requests. More...

DMA control
static void	I3C_MasterEnableDMA (I3C_Type *base, bool enableTx, bool enableRx, uint32_t width)
	Enables or disables I3C master DMA requests. More...

static uint32_t	I3C_MasterGetTxFifoAddress (I3C_Type *base, uint32_t width)
	Gets I3C master transmit data register address for DMA transfer. More...

static uint32_t	I3C_MasterGetRxFifoAddress (I3C_Type *base, uint32_t width)
	Gets I3C master receive data register address for DMA transfer. More...

FIFO control
static void	I3C_MasterSetWatermarks (I3C_Type *base, i3c_tx_trigger_level_t txLvl, i3c_rx_trigger_level_t rxLvl, bool flushTx, bool flushRx)
	Sets the watermarks for I3C master FIFOs. More...

static void	I3C_MasterGetFifoCounts (I3C_Type base, size_t rxCount, size_t *txCount)
	Gets the current number of bytes in the I3C master FIFOs. More...

Bus operations
void	I3C_MasterSetBaudRate (I3C_Type *base, uint32_t baudRate_Hz, uint32_t sourceClock_Hz)
	Sets the I3C bus frequency for master transactions. More...

static bool	I3C_MasterGetBusIdleState (I3C_Type *base)
	Returns whether the bus is idle. More...

status_t	I3C_MasterStart (I3C_Type *base, i3c_bus_type_t type, uint8_t address, i3c_direction_t dir, uint32_t rxSize)
	Sends a START signal and slave address on the I2C/I3C bus. More...

status_t	I3C_MasterRepeatedStart (I3C_Type *base, i3c_bus_type_t type, uint8_t address, i3c_direction_t dir, uint32_t rxSize)
	Sends a repeated START signal and slave address on the I2C/I3C bus. More...

status_t	I3C_MasterSend (I3C_Type base, const void txBuff, size_t txSize, uint32_t flags)
	Performs a polling send transfer on the I2C/I3C bus. More...

status_t	I3C_MasterReceive (I3C_Type base, void rxBuff, size_t rxSize, uint32_t flags)
	Performs a polling receive transfer on the I2C/I3C bus. More...

status_t	I3C_MasterStop (I3C_Type *base)
	Sends a STOP signal on the I2C/I3C bus. More...

status_t	I3C_MasterTransferBlocking (I3C_Type base, i3c_bus_type_t type, i3c_master_transfer_t transfer)
	Performs a master polling transfer on the I2C/I3C bus. More...

Non-blocking
void	I3C_MasterTransferCreateHandle (I3C_Type base, i3c_master_handle_t handle, i3c_master_transfer_callback_t callback, void *userData)
	Creates a new handle for the I3C master non-blocking APIs. More...

status_t	I3C_MasterTransferNonBlocking (I3C_Type base, i3c_master_handle_t handle, i3c_master_transfer_t *transfer)
	Performs a non-blocking transaction on the I2C/I3C bus. More...

status_t	I3C_MasterTransferGetCount (I3C_Type base, i3c_master_handle_t handle, size_t *count)
	Returns number of bytes transferred so far. More...

void	I3C_MasterTransferAbort (I3C_Type base, i3c_master_handle_t handle)
	Terminates a non-blocking I3C master transmission early. More...

IRQ handler
void	I3C_MasterTransferHandleIRQ (I3C_Type base, i3c_master_handle_t handle)
	Reusable routine to handle master interrupts. More...

Data Structure Documentation

struct i3c_master_config_t

This structure holds configuration settings for the I3C peripheral. To initialize this structure to reasonable defaults, call the I3C_MasterGetDefaultConfig() function and pass a pointer to your configuration structure instance.

The configuration structure can be made constant so it resides in flash.

Data Fields
i3c_master_enable_t	enableMaster
	Enable master mode. More...

bool	disableTimeout
	Whether to disable timeout to prevent the ERRWARN. More...

i3c_master_hkeep_t	hKeep
	High keeper mode setting. More...

bool	enableOpenDrainStop
	Whether to emit open-drain speed STOP. More...

bool	enableOpenDrainHigh
	Enable Open-Drain High to be 1 PPBAUD count for i3c messages, or 1 ODBAUD. More...

uint32_t	baudRate_Hz
	Desired baud rate in Hertz. More...

i3c_bus_type_t	busType
	bus type. More...

Field Documentation

i3c_master_enable_t i3c_master_config_t::enableMaster

bool i3c_master_config_t::disableTimeout

i3c_master_hkeep_t i3c_master_config_t::hKeep

bool i3c_master_config_t::enableOpenDrainStop

bool i3c_master_config_t::enableOpenDrainHigh

uint32_t i3c_master_config_t::baudRate_Hz

i3c_bus_type_t i3c_master_config_t::busType

struct _i3c_master_transfer

This structure is used to pass transaction parameters to the I3C_MasterTransferNonBlocking() API.

Data Fields
uint32_t	flags
	Bit mask of options for the transfer. More...

uint16_t	slaveAddress
	The 7-bit slave address. More...

i3c_direction_t	direction
	Either kI3C_Read or kI3C_Write. More...

uint32_t	subaddress
	Sub address. More...

size_t	subaddressSize
	Length of sub address to send in bytes. More...

void *	data
	Pointer to data to transfer. More...

size_t	dataSize
	Number of bytes to transfer. More...

Field Documentation

uint32_t i3c_master_transfer_t::flags

See enumeration _i3c_master_transfer_flags for available options. Set to 0 or kI3C_TransferDefaultFlag for normal transfers.

uint16_t i3c_master_transfer_t::slaveAddress

i3c_direction_t i3c_master_transfer_t::direction

uint32_t i3c_master_transfer_t::subaddress

Transferred MSB first.

size_t i3c_master_transfer_t::subaddressSize

Maximum size is 4 bytes.

void * i3c_master_transfer_t::data

size_t i3c_master_transfer_t::dataSize

struct _i3c_master_handle

Note: The contents of this structure are private and subject to change.

Data Fields
uint8_t	state
	Transfer state machine current state. More...

uint16_t	remainingBytes
	Remaining byte count in current state. More...

uint8_t *	buf
	Buffer pointer for current state. More...

i3c_master_transfer_t	transfer
	Copy of the current transfer info. More...

i3c_master_transfer_callback_t	completionCallback
	Callback function pointer. More...

void *	userData
	Application data passed to callback. More...

Field Documentation

uint8_t i3c_master_handle_t::state

uint16_t i3c_master_handle_t::remainingBytes

uint8_t * i3c_master_handle_t::buf

i3c_master_transfer_t i3c_master_handle_t::transfer

i3c_master_transfer_callback_t i3c_master_handle_t::completionCallback

void * i3c_master_handle_t::userData

Typedef Documentation

typedef void(* i3c_master_transfer_callback_t)(I3C_Type *base, i3c_master_handle_t *handle, status_t completionStatus, void *userData)

This callback is used only for the non-blocking master transfer API. Specify the callback you wish to use in the call to I3C_MasterTransferCreateHandle().

Parameters

base	The I3C peripheral base address.
completionStatus	Either #kStatus_Success or an error code describing how the transfer completed.
userData	Arbitrary pointer-sized value passed from the application.

typedef void(* i3c_master_transfer_callback_t)(I3C_Type *base, i3c_master_handle_t *handle, status_t completionStatus, void *userData)

This callback is used only for the non-blocking master transfer API. Specify the callback you wish to use in the call to I3C_MasterTransferCreateHandle().

Parameters

base	The I3C peripheral base address.
completionStatus	Either #kStatus_Success or an error code describing how the transfer completed.
userData	Arbitrary pointer-sized value passed from the application.

Enumeration Type Documentation

enum _i3c_master_flags

The following status register flags can be cleared:

All flags except kI3C_MasterBetweenFlag and kI3C_MasterNackDetectFlag can be enabled as interrupts.

Note: These enums are meant to be OR'd together to form a bit mask.

Enumerator
kI3C_MasterBetweenFlag	Between messages/DAAs flag.
kI3C_MasterNackDetectFlag	NACK detected flag.
kI3C_MasterSlaveStartFlag	Slave request start flag.
kI3C_MasterControlDoneFlag	Master request complete flag.
kI3C_MasterCompleteFlag	Transfer complete flag.
kI3C_MasterRxReadyFlag	Rx data ready in Rx buffer flag.
kI3C_MasterTxReadyFlag	Tx buffer ready for Tx data flag.
kI3C_MasterArbitrationWonFlag	Header address won arbitration flag.
kI3C_MasterErrorFlag	Error occurred flag.
kI3C_MasterSlave2MasterFlag	Switch from slave to master flag.
kI3C_MasterBetweenFlag	Between messages/DAAs flag.
kI3C_MasterNackDetectFlag	NACK detected flag.
kI3C_MasterSlaveStartFlag	Slave request start flag.
kI3C_MasterControlDoneFlag	Master request complete flag.
kI3C_MasterCompleteFlag	Transfer complete flag.
kI3C_MasterRxReadyFlag	Rx data ready in Rx buffer flag.
kI3C_MasterTxReadyFlag	Tx buffer ready for Tx data flag.
kI3C_MasterArbitrationWonFlag	Header address won arbitration flag.
kI3C_MasterErrorFlag	Error occurred flag.
kI3C_MasterSlave2MasterFlag	Switch from slave to master flag.

enum _i3c_master_error_flags

Note: These enums are meant to be OR'd together to form a bit mask.

Enumerator
kI3C_MasterErrorNackFlag	Slave NACKed the last address.
kI3C_MasterErrorWriteAbortFlag	Slave NACKed the write data.
kI3C_MasterErrorTermFlag	Master terminates slave read.
kI3C_MasterErrorParityFlag	Parity error from DDR read.
kI3C_MasterErrorCrcFlag	CRC error from DDR read.
kI3C_MasterErrorReadFlag	Read from MRDATAB register when FIFO empty.
kI3C_MasterErrorWriteFlag	Write to MWDATAB register when FIFO full.
kI3C_MasterErrorMsgFlag	Message SDR/DDR mismatch or read/write message in wrong state.
kI3C_MasterErrorInvalidReqFlag	Invalid use of request.
kI3C_MasterErrorTimeoutFlag	The module has stalled too long in a frame.
kI3C_MasterErrorNackFlag	Slave NACKed the last address.
kI3C_MasterErrorWriteAbortFlag	Slave NACKed the write data.
kI3C_MasterErrorTermFlag	Master terminates slave read.
kI3C_MasterErrorParityFlag	Parity error from DDR read.
kI3C_MasterErrorCrcFlag	CRC error from DDR read.
kI3C_MasterErrorReadFlag	Read from MRDATAB register when FIFO empty.
kI3C_MasterErrorWriteFlag	Write to MWDATAB register when FIFO full.
kI3C_MasterErrorMsgFlag	Message SDR/DDR mismatch or read/write message in wrong state.
kI3C_MasterErrorInvalidReqFlag	Invalid use of request.
kI3C_MasterErrorTimeoutFlag	The module has stalled too long in a frame.

enum i3c_master_state_t

Enumerator
kI3C_MasterStateIdle	Bus stopped.
kI3C_MasterStateSlvReq	Bus stopped but slave holding SDA low.
kI3C_MasterStateMsgSdr	In SDR Message mode from using MWMSG_SDR.
kI3C_MasterStateNormAct	In normal active SDR mode.
kI3C_MasterStateDdr	In DDR Message mode.
kI3C_MasterStateDaa	In ENTDAA mode.
kI3C_MasterStateIbiAck	Waiting on IBI ACK/NACK decision.
kI3C_MasterStateIbiRcv	receiving IBI.
kI3C_MasterStateIdle	Bus stopped.
kI3C_MasterStateSlvReq	Bus stopped but slave holding SDA low.
kI3C_MasterStateMsgSdr	In SDR Message mode from using MWMSG_SDR.
kI3C_MasterStateNormAct	In normal active SDR mode.
kI3C_MasterStateDdr	In DDR Message mode.
kI3C_MasterStateDaa	In ENTDAA mode.
kI3C_MasterStateIbiAck	Waiting on IBI ACK/NACK decision.
kI3C_MasterStateIbiRcv	receiving IBI.

enum i3c_master_enable_t

Enumerator
kI3C_MasterOff	Master off.
kI3C_MasterOn	Master on.
kI3C_MasterCapable	Master capable.
kI3C_MasterOff	Master off.
kI3C_MasterOn	Master on.
kI3C_MasterCapable	Master capable.

enum i3c_master_hkeep_t

Enumerator
kI3C_MasterHighKeeperNone	Use PUR to hold SCL high.
kI3C_MasterHighKeeperWiredIn	Use pin_HK controls.
kI3C_MasterPassiveSDA	Hi-Z for Bus Free and hold SDA.
kI3C_MasterPassiveSDASCL	Hi-Z both for Bus Free, and can Hi-Z SDA for hold.
kI3C_MasterHighKeeperNone	Use PUR to hold SCL high.
kI3C_MasterHighKeeperWiredIn	Use pin_HK controls.
kI3C_MasterPassiveSDA	Hi-Z for Bus Free and hold SDA.
kI3C_MasterPassiveSDASCL	Hi-Z both for Bus Free, and can Hi-Z SDA for hold.

enum i3c_bus_request_t

by message.

Enumerator
kI3C_RequestNone	No request.
kI3C_RequestEmitStartAddr	Request to emit start and address on bus.
kI3C_RequestEmitStop	Request to emit stop on bus.
kI3C_RequestIbiAckNack	Manual IBI ACK or NACK.
kI3C_RequestProcessDAA	Process DAA.
kI3C_RequestForceExit	Request to force exit.
kI3C_RequestAutoIbi	Hold in stopped state, but Auto-emit START,7E.
kI3C_RequestNone	No request.
kI3C_RequestEmitStartAddr	Request to emit start and address on bus.
kI3C_RequestEmitStop	Request to emit stop on bus.
kI3C_RequestIbiAckNack	Manual IBI ACK or NACK.
kI3C_RequestProcessDAA	Process DAA.
kI3C_RequestForceExit	Request to force exit.
kI3C_RequestAutoIbi	Hold in stopped state, but Auto-emit START,7E.

enum i3c_bus_type_t

Enumerator
kI3C_TypeI3CSdr	SDR mode of I3C.
kI3C_TypeI2C	Standard i2c protocol.
kI3C_TypeI3CDDR	HDR-DDR mode of I3C.
kI3C_TypeI3CSdr	SDR mode of I3C.
kI3C_TypeI2C	Standard i2c protocol.
kI3C_TypeI3CDDR	HDR-DDR mode of I3C.

enum i3c_ibi_response_t

Enumerator
kI3C_IbiRespAck	ACK with no mandatory byte.
kI3C_IbiRespNack	NACK.
kI3C_IbiRespAckMandatory	ACK with mandatory byte.
kI3C_IbiRespManual	Reserved.
kI3C_IbiRespAck	ACK with no mandatory byte.
kI3C_IbiRespNack	NACK.
kI3C_IbiRespAckMandatory	ACK with mandatory byte.
kI3C_IbiRespManual	Reserved.

enum i3c_direction_t

Enumerator
kI3C_Write	Master transmit.
kI3C_Read	Master receive.
kI3C_Write	Master transmit.
kI3C_Read	Master receive.

enum i3c_tx_trigger_level_t

Enumerator
kI3C_TxTriggerOnEmpty	Trigger on empty.
kI3C_TxTriggerUntilOneQuarterOrLess	Trigger on 1/4 full or less.
kI3C_TxTriggerUntilOneHalfOrLess	Trigger on 1/2 full or less.
kI3C_TxTriggerUntilOneLessThanFull	Trigger on 1 less than full or less.
kI3C_TxTriggerOnEmpty	Trigger on empty.
kI3C_TxTriggerUntilOneQuarterOrLess	Trigger on 1/4 full or less.
kI3C_TxTriggerUntilOneHalfOrLess	Trigger on 1/2 full or less.
kI3C_TxTriggerUntilOneLessThanFull	Trigger on 1 less than full or less.

enum i3c_rx_trigger_level_t

Enumerator
kI3C_RxTriggerOnNotEmpty	Trigger on not empty.
kI3C_RxTriggerUntilOneQuarterOrMore	Trigger on 1/4 full or more.
kI3C_RxTriggerUntilOneHalfOrMore	Trigger on 1/2 full or more.
kI3C_RxTriggerUntilThreeQuarterOrMore	Trigger on 3/4 full or more.
kI3C_RxTriggerOnNotEmpty	Trigger on not empty.
kI3C_RxTriggerUntilOneQuarterOrMore	Trigger on 1/4 full or more.
kI3C_RxTriggerUntilOneHalfOrMore	Trigger on 1/2 full or more.
kI3C_RxTriggerUntilThreeQuarterOrMore	Trigger on 3/4 full or more.

enum _i3c_master_transfer_flags

Note: These enumerations are intended to be OR'd together to form a bit mask of options for the _i3c_master_transfer::flags field.

Enumerator
kI3C_TransferDefaultFlag	Transfer starts with a start signal, stops with a stop signal.
kI3C_TransferNoStartFlag	Don't send a start condition, address, and sub address.
kI3C_TransferRepeatedStartFlag	Send a repeated start condition.
kI3C_TransferNoStopFlag	Don't send a stop condition.
kI3C_TransferDefaultFlag	Transfer starts with a start signal, stops with a stop signal.
kI3C_TransferNoStartFlag	Don't send a start condition, address, and sub address.
kI3C_TransferRepeatedStartFlag	Send a repeated start condition.
kI3C_TransferNoStopFlag	Don't send a stop condition.

enum _i3c_master_flags

The following status register flags can be cleared:

All flags except kI3C_MasterBetweenFlag and kI3C_MasterNackDetectFlag can be enabled as interrupts.

Note: These enums are meant to be OR'd together to form a bit mask.

Enumerator
kI3C_MasterBetweenFlag	Between messages/DAAs flag.
kI3C_MasterNackDetectFlag	NACK detected flag.
kI3C_MasterSlaveStartFlag	Slave request start flag.
kI3C_MasterControlDoneFlag	Master request complete flag.
kI3C_MasterCompleteFlag	Transfer complete flag.
kI3C_MasterRxReadyFlag	Rx data ready in Rx buffer flag.
kI3C_MasterTxReadyFlag	Tx buffer ready for Tx data flag.
kI3C_MasterArbitrationWonFlag	Header address won arbitration flag.
kI3C_MasterErrorFlag	Error occurred flag.
kI3C_MasterSlave2MasterFlag	Switch from slave to master flag.
kI3C_MasterBetweenFlag	Between messages/DAAs flag.
kI3C_MasterNackDetectFlag	NACK detected flag.
kI3C_MasterSlaveStartFlag	Slave request start flag.
kI3C_MasterControlDoneFlag	Master request complete flag.
kI3C_MasterCompleteFlag	Transfer complete flag.
kI3C_MasterRxReadyFlag	Rx data ready in Rx buffer flag.
kI3C_MasterTxReadyFlag	Tx buffer ready for Tx data flag.
kI3C_MasterArbitrationWonFlag	Header address won arbitration flag.
kI3C_MasterErrorFlag	Error occurred flag.
kI3C_MasterSlave2MasterFlag	Switch from slave to master flag.

enum _i3c_master_error_flags

Note: These enums are meant to be OR'd together to form a bit mask.

Enumerator
kI3C_MasterErrorNackFlag	Slave NACKed the last address.
kI3C_MasterErrorWriteAbortFlag	Slave NACKed the write data.
kI3C_MasterErrorTermFlag	Master terminates slave read.
kI3C_MasterErrorParityFlag	Parity error from DDR read.
kI3C_MasterErrorCrcFlag	CRC error from DDR read.
kI3C_MasterErrorReadFlag	Read from MRDATAB register when FIFO empty.
kI3C_MasterErrorWriteFlag	Write to MWDATAB register when FIFO full.
kI3C_MasterErrorMsgFlag	Message SDR/DDR mismatch or read/write message in wrong state.
kI3C_MasterErrorInvalidReqFlag	Invalid use of request.
kI3C_MasterErrorTimeoutFlag	The module has stalled too long in a frame.
kI3C_MasterErrorNackFlag	Slave NACKed the last address.
kI3C_MasterErrorWriteAbortFlag	Slave NACKed the write data.
kI3C_MasterErrorTermFlag	Master terminates slave read.
kI3C_MasterErrorParityFlag	Parity error from DDR read.
kI3C_MasterErrorCrcFlag	CRC error from DDR read.
kI3C_MasterErrorReadFlag	Read from MRDATAB register when FIFO empty.
kI3C_MasterErrorWriteFlag	Write to MWDATAB register when FIFO full.
kI3C_MasterErrorMsgFlag	Message SDR/DDR mismatch or read/write message in wrong state.
kI3C_MasterErrorInvalidReqFlag	Invalid use of request.
kI3C_MasterErrorTimeoutFlag	The module has stalled too long in a frame.

enum i3c_master_state_t

Enumerator
kI3C_MasterStateIdle	Bus stopped.
kI3C_MasterStateSlvReq	Bus stopped but slave holding SDA low.
kI3C_MasterStateMsgSdr	In SDR Message mode from using MWMSG_SDR.
kI3C_MasterStateNormAct	In normal active SDR mode.
kI3C_MasterStateDdr	In DDR Message mode.
kI3C_MasterStateDaa	In ENTDAA mode.
kI3C_MasterStateIbiAck	Waiting on IBI ACK/NACK decision.
kI3C_MasterStateIbiRcv	receiving IBI.
kI3C_MasterStateIdle	Bus stopped.
kI3C_MasterStateSlvReq	Bus stopped but slave holding SDA low.
kI3C_MasterStateMsgSdr	In SDR Message mode from using MWMSG_SDR.
kI3C_MasterStateNormAct	In normal active SDR mode.
kI3C_MasterStateDdr	In DDR Message mode.
kI3C_MasterStateDaa	In ENTDAA mode.
kI3C_MasterStateIbiAck	Waiting on IBI ACK/NACK decision.
kI3C_MasterStateIbiRcv	receiving IBI.

enum i3c_master_enable_t

Enumerator
kI3C_MasterOff	Master off.
kI3C_MasterOn	Master on.
kI3C_MasterCapable	Master capable.
kI3C_MasterOff	Master off.
kI3C_MasterOn	Master on.
kI3C_MasterCapable	Master capable.

enum i3c_master_hkeep_t

Enumerator
kI3C_MasterHighKeeperNone	Use PUR to hold SCL high.
kI3C_MasterHighKeeperWiredIn	Use pin_HK controls.
kI3C_MasterPassiveSDA	Hi-Z for Bus Free and hold SDA.
kI3C_MasterPassiveSDASCL	Hi-Z both for Bus Free, and can Hi-Z SDA for hold.
kI3C_MasterHighKeeperNone	Use PUR to hold SCL high.
kI3C_MasterHighKeeperWiredIn	Use pin_HK controls.
kI3C_MasterPassiveSDA	Hi-Z for Bus Free and hold SDA.
kI3C_MasterPassiveSDASCL	Hi-Z both for Bus Free, and can Hi-Z SDA for hold.

enum i3c_bus_request_t

by message.

Enumerator
kI3C_RequestNone	No request.
kI3C_RequestEmitStartAddr	Request to emit start and address on bus.
kI3C_RequestEmitStop	Request to emit stop on bus.
kI3C_RequestIbiAckNack	Manual IBI ACK or NACK.
kI3C_RequestProcessDAA	Process DAA.
kI3C_RequestForceExit	Request to force exit.
kI3C_RequestAutoIbi	Hold in stopped state, but Auto-emit START,7E.
kI3C_RequestNone	No request.
kI3C_RequestEmitStartAddr	Request to emit start and address on bus.
kI3C_RequestEmitStop	Request to emit stop on bus.
kI3C_RequestIbiAckNack	Manual IBI ACK or NACK.
kI3C_RequestProcessDAA	Process DAA.
kI3C_RequestForceExit	Request to force exit.
kI3C_RequestAutoIbi	Hold in stopped state, but Auto-emit START,7E.

enum i3c_bus_type_t

Enumerator
kI3C_TypeI3CSdr	SDR mode of I3C.
kI3C_TypeI2C	Standard i2c protocol.
kI3C_TypeI3CDDR	HDR-DDR mode of I3C.
kI3C_TypeI3CSdr	SDR mode of I3C.
kI3C_TypeI2C	Standard i2c protocol.
kI3C_TypeI3CDDR	HDR-DDR mode of I3C.

enum i3c_ibi_response_t

Enumerator
kI3C_IbiRespAck	ACK with no mandatory byte.
kI3C_IbiRespNack	NACK.
kI3C_IbiRespAckMandatory	ACK with mandatory byte.
kI3C_IbiRespManual	Reserved.
kI3C_IbiRespAck	ACK with no mandatory byte.
kI3C_IbiRespNack	NACK.
kI3C_IbiRespAckMandatory	ACK with mandatory byte.
kI3C_IbiRespManual	Reserved.

enum i3c_direction_t

Enumerator
kI3C_Write	Master transmit.
kI3C_Read	Master receive.
kI3C_Write	Master transmit.
kI3C_Read	Master receive.

enum i3c_tx_trigger_level_t

Enumerator
kI3C_TxTriggerOnEmpty	Trigger on empty.
kI3C_TxTriggerUntilOneQuarterOrLess	Trigger on 1/4 full or less.
kI3C_TxTriggerUntilOneHalfOrLess	Trigger on 1/2 full or less.
kI3C_TxTriggerUntilOneLessThanFull	Trigger on 1 less than full or less.
kI3C_TxTriggerOnEmpty	Trigger on empty.
kI3C_TxTriggerUntilOneQuarterOrLess	Trigger on 1/4 full or less.
kI3C_TxTriggerUntilOneHalfOrLess	Trigger on 1/2 full or less.
kI3C_TxTriggerUntilOneLessThanFull	Trigger on 1 less than full or less.

enum i3c_rx_trigger_level_t

Enumerator
kI3C_RxTriggerOnNotEmpty	Trigger on not empty.
kI3C_RxTriggerUntilOneQuarterOrMore	Trigger on 1/4 full or more.
kI3C_RxTriggerUntilOneHalfOrMore	Trigger on 1/2 full or more.
kI3C_RxTriggerUntilThreeQuarterOrMore	Trigger on 3/4 full or more.
kI3C_RxTriggerOnNotEmpty	Trigger on not empty.
kI3C_RxTriggerUntilOneQuarterOrMore	Trigger on 1/4 full or more.
kI3C_RxTriggerUntilOneHalfOrMore	Trigger on 1/2 full or more.
kI3C_RxTriggerUntilThreeQuarterOrMore	Trigger on 3/4 full or more.

enum _i3c_master_transfer_flags

Note: These enumerations are intended to be OR'd together to form a bit mask of options for the _i3c_master_transfer::flags field.

Enumerator
kI3C_TransferDefaultFlag	Transfer starts with a start signal, stops with a stop signal.
kI3C_TransferNoStartFlag	Don't send a start condition, address, and sub address.
kI3C_TransferRepeatedStartFlag	Send a repeated start condition.
kI3C_TransferNoStopFlag	Don't send a stop condition.
kI3C_TransferDefaultFlag	Transfer starts with a start signal, stops with a stop signal.
kI3C_TransferNoStartFlag	Don't send a start condition, address, and sub address.
kI3C_TransferRepeatedStartFlag	Send a repeated start condition.
kI3C_TransferNoStopFlag	Don't send a stop condition.

Function Documentation

void I3C_MasterGetDefaultConfig ( i3c_master_config_t * masterConfig )

This function provides the following default configuration for the I3C master peripheral:

*  masterConfig->enableMaster            = kI3C_MasterOn;
*  masterConfig->disableTimeout          = false;
*  masterConfig->hKeep                   = kI3C_MasterHighKeeperNone;
*  masterConfig->enableOpenDrainStop     = true;
*  masterConfig->enableOpenDrainHigh     = true;
*  masterConfig->baudRate_Hz             = 100000U;
*  masterConfig->busType                 = kI3C_TypeI2C;
* 

After calling this function, you can override any settings in order to customize the configuration, prior to initializing the master driver with I3C_MasterInit().

Parameters

[out] masterConfig User provided configuration structure for default values. Refer to i3c_master_config_t.

void I3C_MasterInit	(	I3C_Type *	base,
		const i3c_master_config_t *	masterConfig,
		uint32_t	sourceClock_Hz
	)

This function enables the peripheral clock and initializes the I3C master peripheral as described by the user provided configuration. A software reset is performed prior to configuration.

Parameters

base	The I3C peripheral base address.
masterConfig	User provided peripheral configuration. Use I3C_MasterGetDefaultConfig() to get a set of defaults that you can override.
sourceClock_Hz	Frequency in Hertz of the I3C functional clock. Used to calculate the baud rate divisors, filter widths, and timeout periods.

void I3C_MasterDeinit ( I3C_Type * base )

This function disables the I3C master peripheral and gates the clock. It also performs a software reset to restore the peripheral to reset conditions.

Parameters

base	The I3C peripheral base address.

static void I3C_MasterEnable	(	I3C_Type *	base,
		i3c_master_enable_t	enable
	)

inlinestatic

Parameters

base	The I3C peripheral base address.
enable	Enable master mode.

static uint32_t I3C_MasterGetStatusFlags ( I3C_Type * base )

inlinestatic

A bit mask with the state of all I3C master status flags is returned. For each flag, the corresponding bit in the return value is set if the flag is asserted.

Parameters

base	The I3C peripheral base address.

Returns

State of the status flags:

1: related status flag is set.
0: related status flag is not set.

See Also: _i3c_master_flags

static void I3C_MasterClearStatusFlags	(	I3C_Type *	base,
		uint32_t	statusMask
	)

inlinestatic

The following status register flags can be cleared:

Attempts to clear other flags has no effect.

Parameters

base	The I3C peripheral base address.
statusMask	A bitmask of status flags that are to be cleared. The mask is composed of _i3c_master_flags enumerators OR'd together. You may pass the result of a previous call to I3C_MasterGetStatusFlags().

See Also: _i3c_master_flags.

static uint32_t I3C_MasterGetErrorStatusFlags ( I3C_Type * base )

inlinestatic

A bit mask with the state of all I3C master error status flags is returned. For each flag, the corresponding bit in the return value is set if the flag is asserted.

Parameters

base	The I3C peripheral base address.

Returns

State of the error status flags:

1: related status flag is set.
0: related status flag is not set.

See Also: _i3c_master_error_flags

static void I3C_MasterClearErrorStatusFlags	(	I3C_Type *	base,
		uint32_t	statusMask
	)

inlinestatic

Parameters

base	The I3C peripheral base address.
statusMask	A bitmask of error status flags that are to be cleared. The mask is composed of _i3c_master_error_flags enumerators OR'd together. You may pass the result of a previous call to I3C_MasterGetStatusFlags().

See Also: _i3c_master_error_flags.

static i3c_master_state_t I3C_MasterGetState ( I3C_Type * base )

inlinestatic

Parameters

base	The I3C peripheral base address.

Returns: I3C master state.

static void I3C_MasterEnableInterrupts	(	I3C_Type *	base,
		uint32_t	interruptMask
	)

inlinestatic

All flags except kI3C_MasterBetweenFlag and kI3C_MasterNackDetectFlag can be enabled as interrupts.

Parameters

base	The I3C peripheral base address.
interruptMask	Bit mask of interrupts to enable. See _i3c_master_flags for the set of constants that should be OR'd together to form the bit mask.

static void I3C_MasterDisableInterrupts	(	I3C_Type *	base,
		uint32_t	interruptMask
	)

inlinestatic

All flags except kI3C_MasterBetweenFlag and kI3C_MasterNackDetectFlag can be enabled as interrupts.

Parameters

base	The I3C peripheral base address.
interruptMask	Bit mask of interrupts to disable. See _i3c_master_flags for the set of constants that should be OR'd together to form the bit mask.

static uint32_t I3C_MasterGetEnabledInterrupts ( I3C_Type * base )

inlinestatic

Parameters

base	The I3C peripheral base address.

Returns: A bitmask composed of _i3c_master_flags enumerators OR'd together to indicate the set of enabled interrupts.

static uint32_t I3C_MasterGetPendingInterrupts ( I3C_Type * base )

inlinestatic

Parameters

base	The I3C peripheral base address.

Returns: A bitmask composed of _i3c_master_flags enumerators OR'd together to indicate the set of pending interrupts.

static void I3C_MasterEnableDMA	(	I3C_Type *	base,
		bool	enableTx,
		bool	enableRx,
		uint32_t	width
	)

inlinestatic

Parameters

base	The I3C peripheral base address.
enableTx	Enable flag for transmit DMA request. Pass true for enable, false for disable.
enableRx	Enable flag for receive DMA request. Pass true for enable, false for disable.
width	DMA read/write unit in bytes.

static uint32_t I3C_MasterGetTxFifoAddress	(	I3C_Type *	base,
		uint32_t	width
	)

inlinestatic

Parameters

base	The I3C peripheral base address.
width	DMA read/write unit in bytes.

Returns: The I3C Master Transmit Data Register address.

static uint32_t I3C_MasterGetRxFifoAddress	(	I3C_Type *	base,
		uint32_t	width
	)

inlinestatic

Parameters

base	The I3C peripheral base address.
width	DMA read/write unit in bytes.

Returns: The I3C Master Receive Data Register address.

static void I3C_MasterSetWatermarks	(	I3C_Type *	base,
		i3c_tx_trigger_level_t	txLvl,
		i3c_rx_trigger_level_t	rxLvl,
		bool	flushTx,
		bool	flushRx
	)

inlinestatic

Parameters

base	The I3C peripheral base address.
txLvl	Transmit FIFO watermark level. The kI3C_MasterTxReadyFlag flag is set whenever the number of words in the transmit FIFO reaches txLvl.
rxLvl	Receive FIFO watermark level. The kI3C_MasterRxReadyFlag flag is set whenever the number of words in the receive FIFO reaches rxLvl.
flushTx	true if TX FIFO is to be cleared, otherwise TX FIFO remains unchanged.
flushRx	true if RX FIFO is to be cleared, otherwise RX FIFO remains unchanged.

static void I3C_MasterGetFifoCounts	(	I3C_Type *	base,
		size_t *	rxCount,
		size_t *	txCount
	)

inlinestatic

Parameters

	base	The I3C peripheral base address.
[out]	txCount	Pointer through which the current number of bytes in the transmit FIFO is returned. Pass NULL if this value is not required.
[out]	rxCount	Pointer through which the current number of bytes in the receive FIFO is returned. Pass NULL if this value is not required.

void I3C_MasterSetBaudRate	(	I3C_Type *	base,
		uint32_t	baudRate_Hz,
		uint32_t	sourceClock_Hz
	)

The I3C master is automatically disabled and re-enabled as necessary to configure the baud rate. Do not call this function during a transfer, or the transfer is aborted.

Parameters

base	The I3C peripheral base address.
baudRate_Hz	Requested bus frequency in Hertz.
sourceClock_Hz	I3C functional clock frequency in Hertz.

static bool I3C_MasterGetBusIdleState ( I3C_Type * base )

inlinestatic

Requires the master mode to be enabled.

Parameters

base	The I3C peripheral base address.

Return values

true	Bus is busy.
false	Bus is idle.

status_t I3C_MasterStart	(	I3C_Type *	base,
		i3c_bus_type_t	type,
		uint8_t	address,
		i3c_direction_t	dir,
		uint32_t	rxSize
	)

This function is used to initiate a new master mode transfer. First, the bus state is checked to ensure that another master is not occupying the bus. Then a START signal is transmitted, followed by the 7-bit address specified in the address parameter. Note that this function does not actually wait until the START and address are successfully sent on the bus before returning.

Parameters

base	The I3C peripheral base address.
type	The bus type to use in this transaction.
address	7-bit slave device address, in bits [6:0].
dir	Master transfer direction, either kI3C_Read or kI3C_Write. This parameter is used to set the R/w bit (bit 0) in the transmitted slave address.
rxSize	if dir is kI3C_Read, this assigns bytes to read. Otherwise set to 0.

Return values

#kStatus_Success	START signal and address were successfully enqueued in the transmit FIFO.
kStatus_I3C_Busy	Another master is currently utilizing the bus.

status_t I3C_MasterRepeatedStart	(	I3C_Type *	base,
		i3c_bus_type_t	type,
		uint8_t	address,
		i3c_direction_t	dir,
		uint32_t	rxSize
	)

This function is used to send a Repeated START signal when a transfer is already in progress. Like I3C_MasterStart(), it also sends the specified 7-bit address.

Note: This function exists primarily to maintain compatible APIs between I3C and I2C drivers, as well as to better document the intent of code that uses these APIs.

Parameters

base	The I3C peripheral base address.
type	The bus type to use in this transaction.
address	7-bit slave device address, in bits [6:0].
dir	Master transfer direction, either kI3C_Read or kI3C_Write. This parameter is used to set the R/w bit (bit 0) in the transmitted slave address.
rxSize	if dir is kI3C_Read, this assigns bytes to read. Otherwise set to 0.

Return values

#kStatus_Success Repeated START signal and address were successfully enqueued in the transmit FIFO.

status_t I3C_MasterSend	(	I3C_Type *	base,
		const void *	txBuff,
		size_t	txSize,
		uint32_t	flags
	)

Sends up to txSize number of bytes to the previously addressed slave device. The slave may reply with a NAK to any byte in order to terminate the transfer early. If this happens, this function returns kStatus_I3C_Nak.

Parameters

base	The I3C peripheral base address.
txBuff	The pointer to the data to be transferred.
txSize	The length in bytes of the data to be transferred.
flags	Bit mask of options for the transfer. See enumeration _i3c_master_transfer_flags for available options.

Return values

#kStatus_Success	Data was sent successfully.
kStatus_I3C_Busy	Another master is currently utilizing the bus.
kStatus_I3C_Nak	The slave device sent a NAK in response to a byte.
#kStatus_I3C_FifoError	FIFO under run or over run.
#kStatus_I3C_ArbitrationLost	Arbitration lost error.
#kStatus_I3C_PinLowTimeout	SCL or SDA were held low longer than the timeout.

status_t I3C_MasterReceive	(	I3C_Type *	base,
		void *	rxBuff,
		size_t	rxSize,
		uint32_t	flags
	)

Parameters

base	The I3C peripheral base address.
rxBuff	The pointer to the data to be transferred.
rxSize	The length in bytes of the data to be transferred.
flags	Bit mask of options for the transfer. See enumeration _i3c_master_transfer_flags for available options.

Return values

#kStatus_Success	Data was received successfully.
kStatus_I3C_Busy	Another master is currently utilizing the bus.
kStatus_I3C_Nak	The slave device sent a NAK in response to a byte.
#kStatus_I3C_FifoError	FIFO under run or overrun.
#kStatus_I3C_ArbitrationLost	Arbitration lost error.
#kStatus_I3C_PinLowTimeout	SCL or SDA were held low longer than the timeout.

status_t I3C_MasterStop ( I3C_Type * base )

This function does not return until the STOP signal is seen on the bus, or an error occurs.

Parameters

base	The I3C peripheral base address.

Return values

#kStatus_Success	The STOP signal was successfully sent on the bus and the transaction terminated.
kStatus_I3C_Busy	Another master is currently utilizing the bus.
kStatus_I3C_Nak	The slave device sent a NAK in response to a byte.
#kStatus_I3C_FifoError	FIFO under run or overrun.
#kStatus_I3C_ArbitrationLost	Arbitration lost error.
#kStatus_I3C_PinLowTimeout	SCL or SDA were held low longer than the timeout.

status_t I3C_MasterTransferBlocking	(	I3C_Type *	base,
		i3c_bus_type_t	type,
		i3c_master_transfer_t *	transfer
	)

Note: The API does not return until the transfer succeeds or fails due to error happens during transfer.

Parameters

base	The I3C peripheral base address.
type	The bus type to use in this transaction.
transfer	Pointer to the transfer structure.

Return values

#kStatus_Success	Data was received successfully.
kStatus_I3C_Busy	Another master is currently utilizing the bus.
kStatus_I3C_Nak	The slave device sent a NAK in response to a byte.
#kStatus_I3C_FifoError	FIFO under run or overrun.
#kStatus_I3C_ArbitrationLost	Arbitration lost error.
#kStatus_I3C_PinLowTimeout	SCL or SDA were held low longer than the timeout.

void I3C_MasterTransferCreateHandle	(	I3C_Type *	base,
		i3c_master_handle_t *	handle,
		i3c_master_transfer_callback_t	callback,
		void *	userData
	)

The creation of a handle is for use with the non-blocking APIs. Once a handle is created, there is not a corresponding destroy handle. If the user wants to terminate a transfer, the I3C_MasterTransferAbort() API shall be called.

Note: The function also enables the NVIC IRQ for the input I3C. Need to notice that on some SoCs the I3C IRQ is connected to INTMUX, in this case user needs to enable the associated INTMUX IRQ in application.

Parameters

	base	The I3C peripheral base address.
[out]	handle	Pointer to the I3C master driver handle.
	callback	User provided pointer to the asynchronous callback function.
	userData	User provided pointer to the application callback data.

status_t I3C_MasterTransferNonBlocking	(	I3C_Type *	base,
		i3c_master_handle_t *	handle,
		i3c_master_transfer_t *	transfer
	)

Parameters

base	The I3C peripheral base address.
handle	Pointer to the I3C master driver handle.
transfer	The pointer to the transfer descriptor.

Return values

#kStatus_Success	The transaction was started successfully.
kStatus_I3C_Busy	Either another master is currently utilizing the bus, or a non-blocking transaction is already in progress.

status_t I3C_MasterTransferGetCount	(	I3C_Type *	base,
		i3c_master_handle_t *	handle,
		size_t *	count
	)

Parameters

	base	The I3C peripheral base address.
	handle	Pointer to the I3C master driver handle.
[out]	count	Number of bytes transferred so far by the non-blocking transaction.

Return values

#kStatus_Success
#kStatus_NoTransferInProgress	There is not a non-blocking transaction currently in progress.

void I3C_MasterTransferAbort	(	I3C_Type *	base,
		i3c_master_handle_t *	handle
	)

Note: It is not safe to call this function from an IRQ handler that has a higher priority than the I3C peripheral's IRQ priority.

Parameters

base	The I3C peripheral base address.
handle	Pointer to the I3C master driver handle.

Return values

#kStatus_Success	A transaction was successfully aborted.
kStatus_I3C_Idle	There is not a non-blocking transaction currently in progress.

void I3C_MasterTransferHandleIRQ	(	I3C_Type *	base,
		i3c_master_handle_t *	handle
	)

Note: This function does not need to be called unless you are reimplementing the nonblocking API's interrupt handler routines to add special functionality.

Parameters

base	The I3C peripheral base address.
handle	Pointer to the I3C master driver handle.

Overview

Data Structures

Typedefs

Enumerations

Initialization and deinitialization

Status

Interrupts

DMA control

FIFO control

Bus operations

Non-blocking

IRQ handler

Data Structure Documentation

Data Fields

Field Documentation

Data Fields

Field Documentation

Data Fields

Field Documentation

Typedef Documentation

Enumeration Type Documentation

Function Documentation