Overview

The MCUXpresso SDK provides APIs for MCUXpresso SDK devices' clock operation.

Files
file	fsl_clock.h

Data Structures
struct	clock_arm_pll_config_t
	PLL configuration for ARM. More...

struct	clock_usb_pll_config_t
	PLL configuration for USB. More...

struct	clock_sys_pll_config_t
	PLL configuration for System. More...

struct	clock_sys_pll1_config_t
	PLL configure for Sys Pll1. More...

struct	clock_video_pll_config_t
	PLL configuration for AUDIO and VIDEO. More...

struct	clock_enet_pll_config_t
	PLL configuration for ENET. More...

Macros
#define	FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL 0
	Configure whether driver controls clock. More...

#define	CCSR_OFFSET 0x0C
	CCM registers offset.

#define	PLL_ARM_OFFSET 0x00
	CCM Analog registers offset.

#define	CCM_ANALOG_TUPLE(reg, shift) (((reg & 0xFFFU) << 16U) \| (shift))
	CCM ANALOG tuple macros to map corresponding registers and bit fields.

#define	SYS_PLL2_FREQ (528000000U)
	SYS_PLL_FREQ frequency in Hz.

#define	CLKPN_FREQ 0U
	clock1PN frequency.

#define	LPADC_CLOCKS
	Clock gate name array for ADC. More...

#define	ADC_ETC_CLOCKS
	Clock gate name array for ADC. More...

#define	AOI_CLOCKS
	Clock gate name array for AOI. More...

#define	DCDC_CLOCKS
	Clock gate name array for DCDC. More...

#define	DCDC_CLOCKS
	Clock gate name array for DCDC. More...

#define	SRC_CLOCKS
	Clock gate name array for SRC. More...

#define	GPC_CLOCKS
	Clock gate name array for GPC. More...

#define	SSARC_CLOCKS
	Clock gate name array for SSARC. More...

#define	WDOG_CLOCKS
	Clock gate name array for WDOG. More...

#define	EWM_CLOCKS
	Clock gate name array for EWM. More...

#define	SEMA_CLOCKS
	Clock gate name array for Sema. More...

#define	MU_CLOCKS
	Clock gate name array for MU. More...

#define	EDMA_CLOCKS
	Clock gate name array for EDMA. More...

#define	FLEXRAM_CLOCKS
	Clock gate name array for FLEXRAM. More...

#define	LMEM_CLOCKS
	Clock gate name array for LMEM. More...

#define	FLEXSPI_CLOCKS
	Clock gate name array for FLEXSPI. More...

#define	RDC_CLOCKS
	Clock gate name array for RDC. More...

#define	SEMC_CLOCKS
	Clock ip name array for SEMC. More...

#define	XECC_CLOCKS
	Clock ip name array for XECC. More...

#define	IEE_CLOCKS
	Clock ip name array for IEE. More...

#define	KEYMANAGER_CLOCKS
	Clock ip name array for KEY_MANAGER. More...

#define	OCOTP_CLOCKS
	Clock ip name array for OCOTP. More...

#define	CAAM_CLOCKS
	Clock ip name array for CAAM. More...

#define	XBAR_CLOCKS
	Clock ip name array for XBAR. More...

#define	IOMUXC_CLOCKS
	Clock ip name array for IOMUXC. More...

#define	GPIO_CLOCKS
	Clock ip name array for GPIO. More...

#define	KPP_CLOCKS
	Clock ip name array for KPP. More...

#define	FLEXIO_CLOCKS
	Clock ip name array for FLEXIO. More...

#define	DAC_CLOCKS
	Clock ip name array for DAC. More...

#define	CMP_CLOCKS
	Clock ip name array for CMP. More...

#define	PIT_CLOCKS
	Clock ip name array for PIT. More...

#define	GPT_CLOCKS
	Clock ip name array for GPT. More...

#define	TMR_CLOCKS
	Clock ip name array for QTIMER. More...

#define	ENC_CLOCKS
	Clock ip name array for ENC. More...

#define	PWM_CLOCKS
	Clock ip name array for PWM. More...

#define	FLEXCAN_CLOCKS
	Clock ip name array for FLEXCAN. More...

#define	LPUART_CLOCKS
	Clock ip name array for LPUART. More...

#define	LPI2C_CLOCKS
	Clock ip name array for LPI2C. More...

#define	LPSPI_CLOCKS
	Clock ip name array for LPSPI. More...

#define	ENET_CLOCKS
	Clock ip name array for ENET. More...

#define	ENET1G_CLOCKS
	Clock ip name array for ENET_1G. More...

#define	ENETQOS_CLOCKS
	Clock ip name array for ENET_QOS. More...

#define	USB_CLOCKS
	Clock ip name array for USB. More...

#define	SDIO_CLOCKS
	Clock ip name array for SDIO. More...

#define	USDHC_CLOCKS
	Clock ip name array for USDHC. More...

#define	ASRC_CLOCKS
	Clock ip name array for ASRC. More...

#define	MQS_CLOCKS
	Clock ip name array for MQS. More...

#define	PDM_CLOCKS
	Clock ip name array for PDM. More...

#define	SPDIF_CLOCKS
	Clock ip name array for SPDIF. More...

#define	SAI_CLOCKS
	Clock ip name array for SAI. More...

#define	PXP_CLOCKS
	Clock ip name array for PXP. More...

#define	GPU2D_CLOCKS
	Clock ip name array for GPU2d. More...

#define	LCDIF_CLOCKS
	Clock ip name array for LCDIF. More...

#define	LCDIFV2_CLOCKS
	Clock ip name array for LCDIFV2. More...

#define	MIPI_DSI_HOST_CLOCKS
	Clock ip name array for MIPI_DSI. More...

#define	MIPI_CSI2RX_CLOCKS
	Clock ip name array for MIPI_CSI. More...

#define	CSI_CLOCKS
	Clock ip name array for CSI. More...

#define	DCIC_MIPI_CLOCKS
	Clock ip name array for DCIC_MIPI. More...

#define	DCIC_LCD_CLOCKS
	Clock ip name array for DCIC_LCD. More...

#define	DMAMUX_CLOCKS
	Clock ip name array for DMAMUX_CLOCKS. More...

#define	XBARA_CLOCKS
	Clock ip name array for XBARA. More...

#define	XBARB_CLOCKS
	Clock ip name array for XBARB. More...

#define	kCLOCK_CoreSysClk kCLOCK_CpuClk
	For compatible with other platforms without CCM. More...

#define	CLOCK_GetCoreSysClkFreq CLOCK_GetCpuClkFreq
	For compatible with other platforms without CCM. More...

Enumerations
enum	clock_osc_t { kCLOCK_RcOsc = 0U, kCLOCK_XtalOsc = 1U }
	OSC 24M sorce select. More...

enum	clock_gate_value_t { kCLOCK_Off = (int)~CCM_LPCG_DIRECT_ON_MASK, kCLOCK_On = CCM_LPCG_DIRECT_ON_MASK }
	Clock gate value. More...

enum	clock_mode_t { kCLOCK_ModeRun = 0U, kCLOCK_ModeWait = 1U, kCLOCK_ModeStop = 2U }
	System clock mode. More...

enum	clock_usb_src_t { kCLOCK_Usb480M = 0, kCLOCK_UsbSrcUnused = (int)0xFFFFFFFFU }
	USB clock source definition. More...

enum	clock_usb_phy_src_t { kCLOCK_Usbphy480M = 0 }
	Source of the USB HS PHY. More...

enum	_clock_pll_clk_src { kCLOCK_PllClkSrc24M = 0U, kCLOCK_PllSrcClkPN = 1U }
	PLL clock source, bypass cloco source also. More...

enum	clock_pll_post_div_t { kCLOCK_PllPostDiv2 = 0U, kCLOCK_PllPostDiv4 = 1U, kCLOCK_PllPostDiv8 = 2U, kCLOCK_PllPostDiv1 = 3U }

enum	clock_pll_t
	PLL name.

enum	clock_pfd_t { kCLOCK_Pfd0 = 0U, kCLOCK_Pfd1 = 1U, kCLOCK_Pfd2 = 2U, kCLOCK_Pfd3 = 3U }
	PLL PFD name. More...

Functions
static void	CLOCK_SetRootClockMux (clock_root_t root, uint8_t src)
	Set CCM Root Clock MUX node to certain value. More...

static uint32_t	CLOCK_GetRootClockMux (clock_root_t root)
	Get CCM Root Clock MUX value. More...

static clock_name_t	CLOCK_GetRootClockSource (clock_root_t root, uint32_t src)
	Get CCM Root Clock Source. More...

static void	CLOCK_SetRootClockDiv (clock_root_t root, uint8_t div)
	Set CCM Root Clock DIV certain value. More...

static uint32_t	CLOCK_GetRootClockDiv (clock_root_t root)
	Get CCM DIV node value. More...

static void	CLOCK_PowerOffRootClock (clock_root_t root)
	Power Off Root Clock. More...

static void	CLOCK_PowerOnRootClock (clock_root_t root)
	Power On Root Clock. More...

static void	CLOCK_SetRootClockMFx (clock_root_t root, uint32_t mfn, uint32_t mfd)
	Set MFN and MFD Root Clock. More...

static void	CLOCK_SetRootClock (clock_root_t root, const clock_root_config_t *config)
	Configure Root Clock. More...

static void	CLOCK_ControlGate (clock_ip_name_t name, clock_gate_value_t value)
	Control the clock gate for specific IP. More...

static void	CLOCK_EnableClock (clock_ip_name_t name)
	Enable the clock for specific IP. More...

static void	CLOCK_DisableClock (clock_ip_name_t name)
	Disable the clock for specific IP. More...

void	CLOCK_SetGroupConfig (clock_group_t group, const clock_group_config_t *config)
	Set the clock group configuration. More...

static void	CLOCK_SetMode (clock_mode_t mode)
	Setting the low power mode that system will enter on next assertion of dsm_request signal. More...

static uint32_t	CLOCK_GetOscFreq (void)
	Gets the OSC clock frequency. More...

uint32_t	CLOCK_GetAhbFreq (void)
	Gets the AHB clock frequency. More...

uint32_t	CLOCK_GetSemcFreq (void)
	Gets the SEMC clock frequency. More...

uint32_t	CLOCK_GetIpgFreq (void)
	Gets the IPG clock frequency. More...

uint32_t	CLOCK_GetPerClkFreq (void)
	Gets the PER clock frequency. More...

uint32_t	CLOCK_GetFreq (clock_name_t name)
	Gets the clock frequency for a specific clock name. More...

static uint32_t	CLOCK_GetRootClockFreq (clock_root_t root)
	Gets the clock frequency for a specific root clock name. More...

static uint32_t	CLOCK_GetM7Freq (void)
	Get the CCM CPU/core/system frequency. More...

static uint32_t	CLOCK_GetM4Freq (void)
	Get the CCM CPU/core/system frequency. More...

bool	CLOCK_EnableUsbhs0Clock (clock_usb_src_t src, uint32_t freq)
	Enable USB HS clock. More...

bool	CLOCK_EnableUsbhs1Clock (clock_usb_src_t src, uint32_t freq)
	Enable USB HS clock. More...

void	CLOCK_DisableUsbhs1PhyPllClock (void)
	Disable USB HS PHY PLL clock. More...

Variables
volatile uint32_t	g_xtalFreq
	External XTAL (24M OSC/SYSOSC) clock frequency. More...

volatile uint32_t	g_rtcXtalFreq
	External RTC XTAL (32K OSC) clock frequency. More...

Driver version
#define	FSL_CLOCK_DRIVER_VERSION (MAKE_VERSION(2, 1, 1))
	CLOCK driver version 2.1.1. More...

#define	SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY (1000000000UL)

#define	CCM_ANALOG_PLL_BYPASS_SHIFT (16U)

#define	CCM_ANALOG_PLL_BYPASS_CLK_SRC_MASK (0xC000U)

#define	CCM_ANALOG_PLL_BYPASS_CLK_SRC_SHIFT (14U)

OSC operations
void	CLOCK_InitExternalClk (bool bypassXtalOsc)
	Initialize the external 24MHz clock. More...

void	CLOCK_DeinitExternalClk (void)
	Deinitialize the external 24MHz clock. More...

void	CLOCK_SwitchOsc (clock_osc_t osc)
	Switch the OSC. More...

static uint32_t	CLOCK_GetRtcFreq (void)
	Gets the RTC clock frequency. More...

static void	CLOCK_SetXtalFreq (uint32_t freq)
	Set the XTAL (24M OSC) frequency based on board setting. More...

static void	CLOCK_SetRtcXtalFreq (uint32_t freq)
	Set the RTC XTAL (32K OSC) frequency based on board setting. More...

void	CLOCK_InitRcOsc24M (void)
	Initialize the RC oscillator 24MHz clock.

void	CLOCK_DeinitRcOsc24M (void)
	Power down the RCOSC 24M clock.

Data Structure Documentation

struct clock_arm_pll_config_t

The output clock frequency is:

Fout=Fin*loopDivider /(2 * postDivider).

Fin is always 24MHz.

Data Fields
clock_pll_post_div_t	postDivider
	Post divider. More...

uint32_t	loopDivider
	PLL loop divider. More...

Field Documentation

clock_pll_post_div_t clock_arm_pll_config_t::postDivider

uint32_t clock_arm_pll_config_t::loopDivider

Valid range: 104-208.

struct clock_usb_pll_config_t

Data Fields
uint8_t	loopDivider
	PLL loop divider. More...

uint8_t	src
	Pll clock source, reference _clock_pll_clk_src.

Field Documentation

uint8_t clock_usb_pll_config_t::loopDivider

0 - Fout=Fref*20; 1 - Fout=Fref*22

struct clock_sys_pll_config_t

Data Fields
uint8_t	loopDivider
	PLL loop divider. More...

uint32_t	mfn
	30 bit mfn of fractional loop divider. More...

uint32_t	mfi
	30 bit of fractional loop divider

uint16_t	ss_stop
	Stop value to get frequency change. More...

uint8_t	ss_enable
	Enable spread spectrum modulation.

uint16_t	ss_step
	Step value to get frequency change step. More...

Field Documentation

uint8_t clock_sys_pll_config_t::loopDivider

Intended to be 1 (528M). 0 - Fout=Fref*20; 1 - Fout=Fref*22

uint32_t clock_sys_pll_config_t::mfn

uint16_t clock_sys_pll_config_t::ss_stop

uint16_t clock_sys_pll_config_t::ss_step

struct clock_sys_pll1_config_t

Data Fields
bool	pllDiv2En
	Enable Sys Pll1 divide-by-2 clock or not. More...

bool	pllDiv5En
	Enable Sys Pll1 divide-by-5 clock or not. More...

Field Documentation

bool clock_sys_pll1_config_t::pllDiv2En

bool clock_sys_pll1_config_t::pllDiv5En

struct clock_video_pll_config_t

Data Fields
uint8_t	loopDivider
	PLL loop divider. More...

uint8_t	postDivider
	Divider after the PLL, should only be 1, 2, 4, 8, 16, 32. More...

uint32_t	numerator
	30 bit numerator of fractional loop divider. More...

uint32_t	denominator
	30 bit denominator of fractional loop divider

Field Documentation

uint8_t clock_video_pll_config_t::loopDivider

Valid range for DIV_SELECT divider value: 27~54.

uint8_t clock_video_pll_config_t::postDivider

uint32_t clock_video_pll_config_t::numerator

struct clock_enet_pll_config_t

Data Fields
bool	enableClkOutput
	Power on and enable PLL clock output for ENET0 (ref_enetpll0). More...

bool	enableClkOutput25M
	Power on and enable PLL clock output for ENET2 (ref_enetpll2). More...

uint8_t	loopDivider
	Controls the frequency of the ENET0 reference clock. More...

uint8_t	src
	Pll clock source, reference _clock_pll_clk_src.

bool	enableClkOutput1
	Power on and enable PLL clock output for ENET1 (ref_enetpll1). More...

uint8_t	loopDivider1
	Controls the frequency of the ENET1 reference clock. More...

Field Documentation

bool clock_enet_pll_config_t::enableClkOutput

bool clock_enet_pll_config_t::enableClkOutput25M

uint8_t clock_enet_pll_config_t::loopDivider

b00 25MHz b01 50MHz b10 100MHz (not 50% duty cycle) b11 125MHz

bool clock_enet_pll_config_t::enableClkOutput1

uint8_t clock_enet_pll_config_t::loopDivider1

b00 25MHz b01 50MHz b10 100MHz (not 50% duty cycle) b11 125MHz

Macro Definition Documentation

#define FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL 0

When set to 0, peripheral drivers will enable clock in initialize function and disable clock in de-initialize function. When set to 1, peripheral driver will not control the clock, application could control the clock out of the driver.

Note: All drivers share this feature switcher. If it is set to 1, application should handle clock enable and disable for all drivers.

#define FSL_CLOCK_DRIVER_VERSION (MAKE_VERSION(2, 1, 1))

#define LPADC_CLOCKS

Value:

{                                              \
        kCLOCK_IpInvalid, kCLOCK_Lpadc1, kCLOCK_Lpadc2 \
    }

#define ADC_ETC_CLOCKS

Value:

{                                              \
        kCLOCK_Adc_Etc \
    }

#define AOI_CLOCKS

Value:

{                                              \
        kCLOCK_IpInvalid, kCLOCK_Aoi1, kCLOCK_Aoi2 \
    }

#define DCDC_CLOCKS

Value:

{              \
        kCLOCK_Dcdc \
    }

Clock ip name array for DCDC.

#define DCDC_CLOCKS

Value:

{               \
        kCLOCK_Dcdc \
    }

Clock ip name array for DCDC.

#define SRC_CLOCKS

Value:

{              \
        kCLOCK_Src \
    }

#define GPC_CLOCKS

Value:

{              \
        kCLOCK_Gpc \
    }

#define SSARC_CLOCKS

Value:

{              \
        kCLOCK_Ssarc \
    }

#define WDOG_CLOCKS

Value:

{              \
        kCLOCK_IpInvalid, kCLOCK_Wdog1, kCLOCK_Wdog2, kCLOCK_Wdog3, kCLOCK_Wdog4\
    }

#define EWM_CLOCKS

Value:

{              \
        kCLOCK_Ewm0 \
    }

#define SEMA_CLOCKS

Value:

{              \
        kCLOCK_Sema \
    }

#define MU_CLOCKS

Value:

{              \
        kCLOCK_Mu_A, kCLOCK_Mu_B \
    }

#define EDMA_CLOCKS

Value:

{              \
        kCLOCK_Edma, kCLOCK_Edma_Lpsr \
    }

#define FLEXRAM_CLOCKS

Value:

{              \
        kCLOCK_Flexram \
    }

#define LMEM_CLOCKS

Value:

{              \
        kCLOCK_Lmem \
    }

#define FLEXSPI_CLOCKS

Value:

{              \
        kCLOCK_IpInvalid, kCLOCK_Flexspi1, kCLOCK_Flexspi2 \
    }

#define RDC_CLOCKS

Value:

{              \
        kCLOCK_Rdc, kCLOCK_M7_Xrdc, kCLOCK_M4_Xrdc \
    }

#define SEMC_CLOCKS

Value:

{               \
        kCLOCK_Semc \
    }

#define XECC_CLOCKS

Value:

{               \
        kCLOCK_Xecc \
    }

#define IEE_CLOCKS

Value:

{               \
        kCLOCK_Iee \
    }

#define KEYMANAGER_CLOCKS

Value:

{               \
        kCLOCK_Key_Manager \
    }

#define OCOTP_CLOCKS

Value:

{               \
        kCLOCK_Ocotp \
    }

#define CAAM_CLOCKS

Value:

{               \
        kCLOCK_Caam\
    }

#define XBAR_CLOCKS

Value:

{               \
        kCLOCK_IpInvalid, kCLOCK_Xbar1, kCLOCK_Xbar2, kCLOCK_Xbar3 \
    }

#define IOMUXC_CLOCKS

Value:

{               \
        kCLOCK_Iomuxc, kCLOCK_Iomuxc_Lpsr \
    }

#define GPIO_CLOCKS

Value:

{               \
        kCLOCK_IpInvalid, kCLOCK_Gpio, kCLOCK_Gpio, kCLOCK_Gpio, kCLOCK_Gpio,  \
        kCLOCK_Gpio, kCLOCK_Gpio, kCLOCK_Gpio, kCLOCK_Gpio, \
        kCLOCK_Gpio, kCLOCK_Gpio, kCLOCK_Gpio, kCLOCK_Gpio, kCLOCK_Gpio, \
    }

#define KPP_CLOCKS

Value:

{               \
        kCLOCK_Kpp \
    }

#define FLEXIO_CLOCKS

Value:

{                                                                    \
        kCLOCK_IpInvalid, kCLOCK_Flexio1, kCLOCK_Flexio2 \
    }

#define DAC_CLOCKS

Value:

{               \
        kCLOCK_Dac \
    }

#define CMP_CLOCKS

Value:

{                                                                            \
        kCLOCK_IpInvalid, kCLOCK_Acmp1, kCLOCK_Acmp2, kCLOCK_Acmp3, kCLOCK_Acmp4 \
    }

#define PIT_CLOCKS

Value:

{              \
        kCLOCK_IpInvalid, kCLOCK_Pit1, kCLOCK_Pit2 \
    }

#define GPT_CLOCKS

Value:

{                                              \
        kCLOCK_IpInvalid, kCLOCK_Gpt1, kCLOCK_Gpt2, kCLOCK_Gpt3, kCLOCK_Gpt4, \
        kCLOCK_Gpt5, kCLOCK_Gpt6 \
    }

#define TMR_CLOCKS

Value:

{                                                                                    \
        kCLOCK_IpInvalid, kCLOCK_Qtimer1, kCLOCK_Qtimer2, kCLOCK_Qtimer3, kCLOCK_Qtimer4 \
    }

#define ENC_CLOCKS

Value:

{                                                                        \
        kCLOCK_IpInvalid, kCLOCK_Enc1, kCLOCK_Enc2, kCLOCK_Enc3, kCLOCK_Enc4 \
    }

#define PWM_CLOCKS

Value:

{                                                                             \
        {kCLOCK_IpInvalid, kCLOCK_IpInvalid, kCLOCK_IpInvalid, kCLOCK_IpInvalid}, \
            {kCLOCK_Pwm1, kCLOCK_Pwm1, kCLOCK_Pwm1, kCLOCK_Pwm1},                 \
            {kCLOCK_Pwm2, kCLOCK_Pwm2, kCLOCK_Pwm2, kCLOCK_Pwm2},                 \
            {kCLOCK_Pwm3, kCLOCK_Pwm3, kCLOCK_Pwm3, kCLOCK_Pwm3},                 \
        {                                                                         \
            kCLOCK_Pwm4, kCLOCK_Pwm4, kCLOCK_Pwm4, kCLOCK_Pwm4                    \
        }                                                                         \
    }

#define FLEXCAN_CLOCKS

Value:

{                                                           \
        kCLOCK_IpInvalid, kCLOCK_Can1, kCLOCK_Can2, kCLOCK_Can3 \
    }

#define LPUART_CLOCKS

Value:

{                                    \
        kCLOCK_IpInvalid, kCLOCK_Lpuart1, kCLOCK_Lpuart2, kCLOCK_Lpuart3, \
        kCLOCK_Lpuart4, kCLOCK_Lpuart5, kCLOCK_Lpuart6, kCLOCK_Lpuart7, \
        kCLOCK_Lpuart8, kCLOCK_Lpuart9, kCLOCK_Lpuart10, kCLOCK_Lpuart11, \
        kCLOCK_Lpuart12 \
    }

#define LPI2C_CLOCKS

Value:

{                                                                                \
        kCLOCK_IpInvalid, kCLOCK_Lpi2c1, kCLOCK_Lpi2c2, kCLOCK_Lpi2c3, kCLOCK_Lpi2c4, \
        kCLOCK_Lpi2c5, kCLOCK_Lpi2c6 \
    }

#define LPSPI_CLOCKS

Value:

{                                                                                 \
        kCLOCK_IpInvalid, kCLOCK_Lpspi1, kCLOCK_Lpspi2, kCLOCK_Lpspi3, kCLOCK_Lpspi4, \
        kCLOCK_Lpspi5, kCLOCK_Lpspi6 \
    }

#define ENET_CLOCKS

Value:

{                                               \
        kCLOCK_Enet \
    }

#define ENET1G_CLOCKS

Value:

{                                               \
        kCLOCK_Enet_1g \
    }

#define ENETQOS_CLOCKS

Value:

{                                               \
        kCLOCK_Enet_Qos \
    }

#define USB_CLOCKS

Value:

{                                               \
        kCLOCK_Usb \
    }

#define SDIO_CLOCKS

Value:

{                                               \
        kCLOCK_Sdio \
    }

#define USDHC_CLOCKS

Value:

{                                                  \
        kCLOCK_IpInvalid, kCLOCK_Usdhc1, kCLOCK_Usdhc2 \
    }

#define ASRC_CLOCKS

Value:

{                                               \
        kCLOCK_Asrc \
    }

#define MQS_CLOCKS

Value:

{              \
        kCLOCK_Mqs \
    }

#define PDM_CLOCKS

Value:

{              \
        kCLOCK_Pdm \
    }

#define SPDIF_CLOCKS

Value:

{                \
        kCLOCK_Spdif \
    }

#define SAI_CLOCKS

Value:

{                                                           \
        kCLOCK_IpInvalid, kCLOCK_Sai1, kCLOCK_Sai2, kCLOCK_Sai3, kCLOCK_Sai4 \
    }

#define PXP_CLOCKS

Value:

{              \
        kCLOCK_Pxp \
    }

#define GPU2D_CLOCKS

Value:

{              \
        kCLOCK_Gpu2d \
    }

#define LCDIF_CLOCKS

Value:

{                \
        kCLOCK_Lcdif   \
    }

#define LCDIFV2_CLOCKS

Value:

{                       \
        kCLOCK_Lcdifv2 \
    }

#define MIPI_DSI_HOST_CLOCKS

Value:

{                       \
        kCLOCK_Mipi_Dsi \
    }

#define MIPI_CSI2RX_CLOCKS

Value:

{                       \
        kCLOCK_Mipi_Csi \
    }

#define CSI_CLOCKS

Value:

{              \
        kCLOCK_Csi \
    }

#define DCIC_MIPI_CLOCKS

Value:

{              \
        kCLOCK_Dcic_Mipi \
    }

#define DCIC_LCD_CLOCKS

Value:

{              \
        kCLOCK_Dcic_Lcd \
    }

#define DMAMUX_CLOCKS

Value:

{                 \
        kCLOCK_Edma, kCLOCK_Edma_Lpsr    \
    }

#define XBARA_CLOCKS

Value:

{                \
        kCLOCK_Xbar1 \
    }

#define XBARB_CLOCKS

Value:

{                                                                  \
        kCLOCK_IpInvalid, kCLOCK_IpInvalid, kCLOCK_Xbar2, kCLOCK_Xbar3 \
    }

#define kCLOCK_CoreSysClk kCLOCK_CpuClk

#define CLOCK_GetCoreSysClkFreq CLOCK_GetCpuClkFreq

Enumeration Type Documentation

enum clock_osc_t

Enumerator
kCLOCK_RcOsc	On chip OSC.
kCLOCK_XtalOsc	24M Xtal OSC

enum clock_gate_value_t

Enumerator
kCLOCK_Off	Clock is off.
kCLOCK_On	Clock is on.

enum clock_mode_t

Enumerator
kCLOCK_ModeRun	Remain in run mode.
kCLOCK_ModeWait	Transfer to wait mode.
kCLOCK_ModeStop	Transfer to stop mode.

enum clock_usb_src_t

Enumerator
kCLOCK_Usb480M	Use 480M.
kCLOCK_UsbSrcUnused	Used when the function does not care the clock source.

enum clock_usb_phy_src_t

Enumerator
kCLOCK_Usbphy480M	Use 480M.

enum _clock_pll_clk_src

Enumerator
kCLOCK_PllClkSrc24M	Pll clock source 24M.
kCLOCK_PllSrcClkPN	Pll clock source CLK1_P and CLK1_N.

enum clock_pll_post_div_t

Enumerator
kCLOCK_PllPostDiv2	Divide by 2.
kCLOCK_PllPostDiv4	Divide by 4.
kCLOCK_PllPostDiv8	Divide by 8.
kCLOCK_PllPostDiv1	Divide by 1.

enum clock_pfd_t

Enumerator
kCLOCK_Pfd0	PLL PFD0.
kCLOCK_Pfd1	PLL PFD1.
kCLOCK_Pfd2	PLL PFD2.
kCLOCK_Pfd3	PLL PFD3.

Function Documentation

static void CLOCK_SetRootClockMux	(	clock_root_t	root,
		uint8_t	src
	)

inlinestatic

Parameters

root	Which root clock node to set, see clock_root_t.
src	Clock mux value to set, different mux has different value range.

static uint32_t CLOCK_GetRootClockMux ( clock_root_t root )

inlinestatic

Parameters

mux	Which mux node to get, see clock_mux_t.

Returns: Clock mux value.

static clock_name_t CLOCK_GetRootClockSource	(	clock_root_t	root,
		uint32_t	src
	)

inlinestatic

Parameters

root	Which root clock node to get, see clock_root_t.
src	Clock mux value to get

Returns: Clock source

static void CLOCK_SetRootClockDiv	(	clock_root_t	root,
		uint8_t	div
	)

inlinestatic

Parameters

root	Which root clock to set, see clock_root_t.
div	Clock div value to set, different divider has different value range.

static uint32_t CLOCK_GetRootClockDiv ( clock_root_t root )

inlinestatic

Parameters

root	Which root clock node to get, see clock_root_t.

static void CLOCK_PowerOffRootClock ( clock_root_t root )

inlinestatic

Parameters

root	Which root clock node to set, see clock_root_t.

static void CLOCK_PowerOnRootClock ( clock_root_t root )

inlinestatic

Parameters

root	Which root clock node to set, see clock_root_t.

static void CLOCK_SetRootClockMFx	(	clock_root_t	root,
		uint32_t	mfn,
		uint32_t	mfd
	)

inlinestatic

Parameters

root	Which root clock node to set, see clock_root_t.
mfn	MFN value
mfd	MFD value

static void CLOCK_SetRootClock	(	clock_root_t	root,
		const clock_root_config_t *	config
	)

inlinestatic

Parameters

root	Which root clock node to set, see clock_root_t.
config	root clock config, see clock_root_config_t

static void CLOCK_ControlGate	(	clock_ip_name_t	name,
		clock_gate_value_t	value
	)

inlinestatic

Parameters

name	Which clock to enable, see clock_ip_name_t.
value	Clock gate value to set, see clock_gate_value_t.

static void CLOCK_EnableClock ( clock_ip_name_t name )

inlinestatic

Parameters

name	Which clock to enable, see clock_ip_name_t.

static void CLOCK_DisableClock ( clock_ip_name_t name )

inlinestatic

Parameters

name	Which clock to disable, see clock_ip_name_t.

void CLOCK_SetGroupConfig	(	clock_group_t	group,
		const clock_group_config_t *	config
	)

Parameters

group	Which group to configure, see clock_group_t.
config	Configuration to set.

static void CLOCK_SetMode ( clock_mode_t mode )

inlinestatic

Parameters

mode	Which mode to enter, see clock_mode_t.

static uint32_t CLOCK_GetOscFreq ( void )

inlinestatic

This function will return the external XTAL OSC frequency if it is selected as the source of OSC, otherwise internal 24MHz RC OSC frequency will be returned.

Parameters

osc	OSC type to get frequency.

Returns: Clock frequency; If the clock is invalid, returns 0.

uint32_t CLOCK_GetAhbFreq ( void )

Returns: The AHB clock frequency value in hertz.

uint32_t CLOCK_GetSemcFreq ( void )

Returns: The SEMC clock frequency value in hertz.

uint32_t CLOCK_GetIpgFreq ( void )

Returns: The IPG clock frequency value in hertz.

uint32_t CLOCK_GetPerClkFreq ( void )

Returns: The PER clock frequency value in hertz.

uint32_t CLOCK_GetFreq ( clock_name_t name )

This function checks the current clock configurations and then calculates the clock frequency for a specific clock name defined in clock_name_t.

Parameters

clockName Clock names defined in clock_name_t

Returns: Clock frequency value in hertz

static uint32_t CLOCK_GetRootClockFreq ( clock_root_t root )

inlinestatic

This function checks the current clock configurations and then calculates the clock frequency for a specific clock name defined in clock_root_t.

Parameters

clockName Clock names defined in clock_root_t

Returns: Clock frequency value in hertz

static uint32_t CLOCK_GetM7Freq ( void )

inlinestatic

Returns: Clock frequency; If the clock is invalid, returns 0.

static uint32_t CLOCK_GetM4Freq ( void )

inlinestatic

Returns: Clock frequency; If the clock is invalid, returns 0.

void CLOCK_InitExternalClk ( bool bypassXtalOsc )

This function supports two modes:

Use external crystal oscillator.
Bypass the external crystal oscillator, using input source clock directly.

After this function, please call CLOCK_SetXtal0Freq to inform clock driver the external clock frequency.

Parameters

bypassXtalOsc Pass in true to bypass the external crystal oscillator.

Note: This device does not support bypass external crystal oscillator, so the input parameter should always be false.

void CLOCK_DeinitExternalClk ( void )

This function disables the external 24MHz clock.

After this function, please call CLOCK_SetXtal0Freq to set external clock frequency to 0.

void CLOCK_SwitchOsc ( clock_osc_t osc )

This function switches the OSC source for SoC.

Parameters

osc	OSC source to switch to.

static uint32_t CLOCK_GetRtcFreq ( void )

inlinestatic

Returns: Clock frequency; If the clock is invalid, returns 0.

static void CLOCK_SetXtalFreq ( uint32_t freq )

inlinestatic

Parameters

freq	The XTAL input clock frequency in Hz.

static void CLOCK_SetRtcXtalFreq ( uint32_t freq )

inlinestatic

Parameters

freq	The RTC XTAL input clock frequency in Hz.

bool CLOCK_EnableUsbhs0Clock	(	clock_usb_src_t	src,
		uint32_t	freq
	)

This function only enables the access to USB HS prepheral, upper layer should first call the CLOCK_EnableUsbhs0PhyPllClock to enable the PHY clock to use USB HS.

Parameters

src	USB HS does not care about the clock source, here must be kCLOCK_UsbSrcUnused.
freq	USB HS does not care about the clock source, so this parameter is ignored.

Return values

true	The clock is set successfully.
false	The clock source is invalid to get proper USB HS clock.

bool CLOCK_EnableUsbhs1Clock	(	clock_usb_src_t	src,
		uint32_t	freq
	)

This function only enables the access to USB HS prepheral, upper layer should first call the CLOCK_EnableUsbhs0PhyPllClock to enable the PHY clock to use USB HS.

Parameters

src	USB HS does not care about the clock source, here must be kCLOCK_UsbSrcUnused.
freq	USB HS does not care about the clock source, so this parameter is ignored.

Return values

true	The clock is set successfully.
false	The clock source is invalid to get proper USB HS clock.

void CLOCK_DisableUsbhs1PhyPllClock ( void )

This function disables USB HS PHY PLL clock.

Variable Documentation

volatile uint32_t g_xtalFreq

The XTAL (24M OSC/SYSOSC) clock frequency in Hz, when the clock is setup, use the function CLOCK_SetXtalFreq to set the value in to clock driver. For example, if XTAL is 24MHz,

* CLOCK_InitExternalClk(false); // Setup the 24M OSC/SYSOSC
* CLOCK_SetXtalFreq(240000000); // Set the XTAL value to clock driver.
* 

volatile uint32_t g_rtcXtalFreq

The RTC XTAL (32K OSC) clock frequency in Hz, when the clock is setup, use the function CLOCK_SetRtcXtalFreq to set the value in to clock driver.

Overview

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Data Structures

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Functions

Variables

Driver version

OSC operations

Data Structure Documentation

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Field Documentation

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Data Fields

Field Documentation

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Field Documentation

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Field Documentation

Data Fields

Field Documentation

Macro Definition Documentation

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Variable Documentation