Overview

The MCUXpresso SDK provides APIs for MCUXpresso SDK devices' clock operation.

Files
file	fsl_clock.h

Data Structures
struct	pll_config_t
	PLL configuration structure. More...

struct	pll_setup_t
	PLL0 setup structure This structure can be used to pre-build a PLL setup configuration at run-time and quickly set the PLL to the configuration. More...

Macros
#define	FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL 0
	Configure whether driver controls clock. More...

#define	CLOCK_USR_CFG_PLL_CONFIG_CACHE_COUNT 2U
	User-defined the size of cache for CLOCK_PllGetConfig() function. More...

#define	ROM_CLOCKS
	Clock ip name array for ROM. More...

#define	SRAM_CLOCKS
	Clock ip name array for SRAM. More...

#define	FLASH_CLOCKS
	Clock ip name array for FLASH. More...

#define	FMC_CLOCKS
	Clock ip name array for FMC. More...

#define	INPUTMUX_CLOCKS
	Clock ip name array for INPUTMUX. More...

#define	IOCON_CLOCKS
	Clock ip name array for IOCON. More...

#define	GPIO_CLOCKS
	Clock ip name array for GPIO. More...

#define	PINT_CLOCKS
	Clock ip name array for PINT. More...

#define	GINT_CLOCKS
	Clock ip name array for GINT. More...

#define	DMA_CLOCKS
	Clock ip name array for DMA. More...

#define	CRC_CLOCKS
	Clock ip name array for CRC. More...

#define	WWDT_CLOCKS
	Clock ip name array for WWDT. More...

#define	RTC_CLOCKS
	Clock ip name array for RTC. More...

#define	MAILBOX_CLOCKS
	Clock ip name array for Mailbox. More...

#define	LPADC_CLOCKS
	Clock ip name array for LPADC. More...

#define	MRT_CLOCKS
	Clock ip name array for MRT. More...

#define	OSTIMER_CLOCKS
	Clock ip name array for OSTIMER. More...

#define	SCT_CLOCKS
	Clock ip name array for SCT0. More...

#define	SCTIPU_CLOCKS
	Clock ip name array for SCTIPU. More...

#define	UTICK_CLOCKS
	Clock ip name array for UTICK. More...

#define	FLEXCOMM_CLOCKS
	Clock ip name array for FLEXCOMM. More...

#define	LPUART_CLOCKS
	Clock ip name array for LPUART. More...

#define	BI2C_CLOCKS
	Clock ip name array for BI2C. More...

#define	LPSPI_CLOCKS
	Clock ip name array for LSPI. More...

#define	FLEXI2S_CLOCKS
	Clock ip name array for FLEXI2S. More...

#define	USBTYPC_CLOCKS
	Clock ip name array for USBTYPC. More...

#define	CTIMER_CLOCKS
	Clock ip name array for CTIMER. More...

#define	PVT_CLOCKS
	Clock ip name array for PVT.

#define	EZHA_CLOCKS
	Clock ip name array for EZHA.

#define	EZHB_CLOCKS
	Clock ip name array for EZHB.

#define	COMP_CLOCKS
	Clock ip name array for COMP.

#define	SDIO_CLOCKS
	Clock ip name array for SDIO. More...

#define	USB1CLK_CLOCKS
	Clock ip name array for USB1CLK. More...

#define	FREQME_CLOCKS
	Clock ip name array for FREQME. More...

#define	USBRAM_CLOCKS
	Clock ip name array for USBRAM. More...

#define	OTP_CLOCKS
	Clock ip name array for OTP. More...

#define	RNG_CLOCKS
	Clock ip name array for RNG. More...

#define	USBHMR0_CLOCKS
	Clock ip name array for USBHMR0. More...

#define	USBHSL0_CLOCKS
	Clock ip name array for USBHSL0. More...

#define	HASHCRYPT_CLOCKS
	Clock ip name array for HashCrypt. More...

#define	POWERQUAD_CLOCKS
	Clock ip name array for PowerQuad. More...

#define	PLULUT_CLOCKS
	Clock ip name array for PLULUT. More...

#define	PUF_CLOCKS
	Clock ip name array for PUF. More...

#define	CASPER_CLOCKS
	Clock ip name array for CASPER. More...

#define	ANALOGCTRL_CLOCKS
	Clock ip name array for ANALOGCTRL. More...

#define	HS_LSPI_CLOCKS
	Clock ip name array for HS_LSPI. More...

#define	GPIO_SEC_CLOCKS
	Clock ip name array for GPIO_SEC. More...

#define	GPIO_SEC_INT_CLOCKS
	Clock ip name array for GPIO_SEC_INT. More...

#define	USBD_CLOCKS
	Clock ip name array for USBD. More...

#define	USBH_CLOCKS
	Clock ip name array for USBH. More...

#define	CLK_GATE_REG_OFFSET_SHIFT 8U
	Clock gate name used for CLOCK_EnableClock/CLOCK_DisableClock. More...

#define	BUS_CLK kCLOCK_BusClk
	Peripherals clock source definition. More...

#define	CLK_ATTACH_ID(mux, sel, pos) (((mux << 0U) \| ((sel + 1) & 0xFU) << 8U) << (pos * 12U))
	Clock Mux Switches The encoding is as follows each connection identified is 32bits wide while 24bits are valuable starting from LSB upwards. More...

#define	PLL_CONFIGFLAG_USEINRATE (1 << 0)
	PLL configuration structure flags for 'flags' field These flags control how the PLL configuration function sets up the PLL setup structure. More...

#define	PLL_CONFIGFLAG_FORCENOFRACT (1 << 2)
	Force non-fractional output mode, PLL output will not use the fractional, automatic bandwidth, or SS hardware.

#define	PLL_SETUPFLAG_POWERUP (1 << 0)
	PLL setup structure flags for 'flags' field These flags control how the PLL setup function sets up the PLL. More...

#define	PLL_SETUPFLAG_WAITLOCK (1 << 1)
	Setup will wait for PLL lock, implies the PLL will be pwoered on.

#define	PLL_SETUPFLAG_ADGVOLT (1 << 2)
	Optimize system voltage for the new PLL rate.

#define	PLL_SETUPFLAG_USEFEEDBACKDIV2 (1 << 3)
	Use feedback divider by 2 in divider path.

Enumerations
enum	clock_ip_name_t
	Clock gate name used for CLOCK_EnableClock/CLOCK_DisableClock. More...

enum	clock_name_t { kCLOCK_CoreSysClk, kCLOCK_BusClk, kCLOCK_ClockOut, kCLOCK_FroHf, kCLOCK_Adc, kCLOCK_Usb0, kCLOCK_Usb1, kCLOCK_Pll1Out, kCLOCK_Mclk, kCLOCK_Sct, kCLOCK_SDio, kCLOCK_Fro12M, kCLOCK_ExtClk, kCLOCK_Pll0Out, kCLOCK_WdtClk, kCLOCK_FlexI2S, kCLOCK_Flexcomm0, kCLOCK_Flexcomm1, kCLOCK_Flexcomm2, kCLOCK_Flexcomm3, kCLOCK_Flexcomm4, kCLOCK_Flexcomm5, kCLOCK_Flexcomm6, kCLOCK_Flexcomm7, kCLOCK_HsLspi, kCLOCK_CTmier0, kCLOCK_CTmier1, kCLOCK_CTmier2, kCLOCK_CTmier3, kCLOCK_CTmier4, kCLOCK_Systick0, kCLOCK_Systick1 }
	Clock name used to get clock frequency. More...

enum	ss_progmodfm_t { kSS_MF_512 = (0 << 20), kSS_MF_384 = (1 << 20), kSS_MF_256 = (2 << 20), kSS_MF_128 = (3 << 20), kSS_MF_64 = (4 << 20), kSS_MF_32 = (5 << 20), kSS_MF_24 = (6 << 20), kSS_MF_16 = (7 << 20) }
	PLL Spread Spectrum (SS) Programmable modulation frequency See (MF) field in the PLL0SSCG1 register in the UM. More...

enum	ss_progmoddp_t { kSS_MR_K0 = (0 << 23), kSS_MR_K1 = (1 << 23), kSS_MR_K1_5 = (2 << 23), kSS_MR_K2 = (3 << 23), kSS_MR_K3 = (4 << 23), kSS_MR_K4 = (5 << 23), kSS_MR_K6 = (6 << 23), kSS_MR_K8 = (7 << 23) }
	PLL Spread Spectrum (SS) Programmable frequency modulation depth See (MR) field in the PLL0SSCG1 register in the UM. More...

enum	ss_modwvctrl_t { kSS_MC_NOC = (0 << 26), kSS_MC_RECC = (2 << 26), kSS_MC_MAXC = (3 << 26) }
	PLL Spread Spectrum (SS) Modulation waveform control See (MC) field in the PLL0SSCG1 register in the UM. More...

enum	pll_error_t { kStatus_PLL_Success = MAKE_STATUS(kStatusGroup_Generic, 0), kStatus_PLL_OutputTooLow = MAKE_STATUS(kStatusGroup_Generic, 1), kStatus_PLL_OutputTooHigh = MAKE_STATUS(kStatusGroup_Generic, 2), kStatus_PLL_InputTooLow = MAKE_STATUS(kStatusGroup_Generic, 3), kStatus_PLL_InputTooHigh = MAKE_STATUS(kStatusGroup_Generic, 4), kStatus_PLL_OutsideIntLimit = MAKE_STATUS(kStatusGroup_Generic, 5), kStatus_PLL_CCOTooLow = MAKE_STATUS(kStatusGroup_Generic, 6), kStatus_PLL_CCOTooHigh = MAKE_STATUS(kStatusGroup_Generic, 7) }
	PLL status definitions. More...

enum	clock_usbfs_src_t { kCLOCK_UsbfsSrcFro = (uint32_t)kCLOCK_FroHf, kCLOCK_UsbfsSrcPll0 = (uint32_t)kCLOCK_Pll0Out, kCLOCK_UsbfsSrcMainClock = (uint32_t)kCLOCK_CoreSysClk, kCLOCK_UsbfsSrcPll1 = (uint32_t)kCLOCK_Pll1Out, kCLOCK_UsbfsSrcNone }
	USB FS clock source definition. More...

enum	clock_usbhs_src_t { kCLOCK_UsbSrcUnused = 0xFFFFFFFFU }
	USBhs clock source definition. More...

enum	clock_usb_phy_src_t { kCLOCK_UsbPhySrcExt = 0U }
	Source of the USB HS PHY. More...

Functions
static void	CLOCK_EnableClock (clock_ip_name_t clk)
	Enable the clock for specific IP. More...

static void	CLOCK_DisableClock (clock_ip_name_t clk)
	Disable the clock for specific IP. More...

status_t	CLOCK_SetupFROClocking (uint32_t iFreq)
	Initialize the Core clock to given frequency (12, 48 or 96 MHz). Turns on FRO and uses default CCO, if freq is 12000000, then high speed output is off, else high speed output is enabled. More...

void	CLOCK_SetFLASHAccessCyclesForFreq (uint32_t iFreq)
	Set the flash wait states for the input freuqency. More...

status_t	CLOCK_SetupExtClocking (uint32_t iFreq)
	Initialize the external osc clock to given frequency. More...

status_t	CLOCK_SetupI2SMClkClocking (uint32_t iFreq)
	Initialize the I2S MCLK clock to given frequency. More...

void	CLOCK_AttachClk (clock_attach_id_t connection)
	Configure the clock selection muxes. More...

clock_attach_id_t	CLOCK_GetClockAttachId (clock_attach_id_t attachId)
	Get the actual clock attach id. This fuction uses the offset in input attach id, then it reads the actual source value in the register and combine the offset to obtain an actual attach id. More...

void	CLOCK_SetClkDiv (clock_div_name_t div_name, uint32_t divided_by_value, bool reset)
	Setup peripheral clock dividers. More...

void	CLOCK_SetRtc1khzClkDiv (uint32_t divided_by_value)
	Setup rtc 1khz clock divider. More...

void	CLOCK_SetRtc1hzClkDiv (uint32_t divided_by_value)
	Setup rtc 1hz clock divider. More...

uint32_t	CLOCK_SetFlexCommClock (uint32_t id, uint32_t freq)
	Set the flexcomm output frequency. More...

uint32_t	CLOCK_GetFlexCommInputClock (uint32_t id)
	Return Frequency of flexcomm input clock. More...

uint32_t	CLOCK_GetFreq (clock_name_t clockName)
	Return Frequency of selected clock. More...

uint32_t	CLOCK_GetFro12MFreq (void)
	Return Frequency of FRO 12MHz. More...

uint32_t	CLOCK_GetFro1MFreq (void)
	Return Frequency of FRO 1MHz. More...

uint32_t	CLOCK_GetClockOutClkFreq (void)
	Return Frequency of ClockOut. More...

uint32_t	CLOCK_GetAdcClkFreq (void)
	Return Frequency of Adc Clock. More...

uint32_t	CLOCK_GetUsb0ClkFreq (void)
	Return Frequency of Usb0 Clock. More...

uint32_t	CLOCK_GetUsb1ClkFreq (void)
	Return Frequency of Usb1 Clock. More...

uint32_t	CLOCK_GetMclkClkFreq (void)
	Return Frequency of MClk Clock. More...

uint32_t	CLOCK_GetSctClkFreq (void)
	Return Frequency of SCTimer Clock. More...

uint32_t	CLOCK_GetSdioClkFreq (void)
	Return Frequency of SDIO Clock. More...

uint32_t	CLOCK_GetExtClkFreq (void)
	Return Frequency of External Clock. More...

uint32_t	CLOCK_GetWdtClkFreq (void)
	Return Frequency of Watchdog. More...

uint32_t	CLOCK_GetFroHfFreq (void)
	Return Frequency of High-Freq output of FRO. More...

uint32_t	CLOCK_GetPll0OutFreq (void)
	Return Frequency of PLL. More...

uint32_t	CLOCK_GetPll1OutFreq (void)
	Return Frequency of USB PLL. More...

uint32_t	CLOCK_GetOsc32KFreq (void)
	Return Frequency of 32kHz osc. More...

uint32_t	CLOCK_GetCoreSysClkFreq (void)
	Return Frequency of Core System. More...

uint32_t	CLOCK_GetI2SMClkFreq (void)
	Return Frequency of I2S MCLK Clock. More...

uint32_t	CLOCK_GetCTimerClkFreq (uint32_t id)
	Return Frequency of CTimer functional Clock. More...

uint32_t	CLOCK_GetSystickClkFreq (uint32_t id)
	Return Frequency of SystickClock. More...

uint32_t	CLOCK_GetPLL0InClockRate (void)
	Return PLL0 input clock rate. More...

uint32_t	CLOCK_GetPLL1InClockRate (void)
	Return PLL1 input clock rate. More...

uint32_t	CLOCK_GetPLL0OutClockRate (bool recompute)
	Return PLL0 output clock rate. More...

uint32_t	CLOCK_GetPLL1OutClockRate (bool recompute)
	Return PLL1 output clock rate. More...

__STATIC_INLINE void	CLOCK_SetBypassPLL0 (bool bypass)
	Enables and disables PLL0 bypass mode. More...

__STATIC_INLINE void	CLOCK_SetBypassPLL1 (bool bypass)
	Enables and disables PLL1 bypass mode. More...

__STATIC_INLINE bool	CLOCK_IsPLL0Locked (void)
	Check if PLL is locked or not. More...

__STATIC_INLINE bool	CLOCK_IsPLL1Locked (void)
	Check if PLL1 is locked or not. More...

void	CLOCK_SetStoredPLL0ClockRate (uint32_t rate)
	Store the current PLL0 rate. More...

uint32_t	CLOCK_GetPLL0OutFromSetup (pll_setup_t *pSetup)
	Return PLL0 output clock rate from setup structure. More...

pll_error_t	CLOCK_SetupPLL0Data (pll_config_t pControl, pll_setup_t pSetup)
	Set PLL0 output based on the passed PLL setup data. More...

pll_error_t	CLOCK_SetupPLL0Prec (pll_setup_t *pSetup, uint32_t flagcfg)
	Set PLL output from PLL setup structure (precise frequency) More...

pll_error_t	CLOCK_SetPLL0Freq (const pll_setup_t *pSetup)
	Set PLL output from PLL setup structure (precise frequency) More...

pll_error_t	CLOCK_SetPLL1Freq (const pll_setup_t *pSetup)
	Set PLL output from PLL setup structure (precise frequency) More...

void	CLOCK_SetupPLL0Mult (uint32_t multiply_by, uint32_t input_freq)
	Set PLL0 output based on the multiplier and input frequency. More...

static void	CLOCK_DisableUsbDevicefs0Clock (clock_ip_name_t clk)
	Disable USB clock. More...

bool	CLOCK_EnableUsbfs0DeviceClock (clock_usbfs_src_t src, uint32_t freq)
	Enable USB Device FS clock. More...

bool	CLOCK_EnableUsbfs0HostClock (clock_usbfs_src_t src, uint32_t freq)
	Enable USB HOST FS clock. More...

bool	CLOCK_EnableUsbhs0PhyPllClock (clock_usb_phy_src_t src, uint32_t freq)
	Enable USB phy clock. More...

bool	CLOCK_EnableUsbhs0DeviceClock (clock_usbhs_src_t src, uint32_t freq)
	Enable USB Device HS clock. More...

bool	CLOCK_EnableUsbhs0HostClock (clock_usbhs_src_t src, uint32_t freq)
	Enable USB HOST HS clock. More...

void	SDK_DelayAtLeastUs (uint32_t delay_us)
	Use DWT to delay at least for some time. More...

Driver version
#define	FSL_CLOCK_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))
	CLOCK driver version 2.1.0. More...

Data Structure Documentation

struct pll_config_t

This structure can be used to configure the settings for a PLL setup structure. Fill in the desired configuration for the PLL and call the PLL setup function to fill in a PLL setup structure.

Data Fields
uint32_t	desiredRate
	Desired PLL rate in Hz.

uint32_t	inputRate
	PLL input clock in Hz, only used if PLL_CONFIGFLAG_USEINRATE flag is set.

uint32_t	flags
	PLL configuration flags, Or'ed value of PLL_CONFIGFLAG_* definitions.

ss_progmodfm_t	ss_mf
	SS Programmable modulation frequency, only applicable when not using PLL_CONFIGFLAG_FORCENOFRACT flag.

ss_progmoddp_t	ss_mr
	SS Programmable frequency modulation depth, only applicable when not using PLL_CONFIGFLAG_FORCENOFRACT flag.

ss_modwvctrl_t	ss_mc
	SS Modulation waveform control, only applicable when not using PLL_CONFIGFLAG_FORCENOFRACT flag.

bool	mfDither
	false for fixed modulation frequency or true for dithering, only applicable when not using PLL_CONFIGFLAG_FORCENOFRACT flag

struct pll_setup_t

It can be populated with the PLL setup function. If powering up or waiting for PLL lock, the PLL input clock source should be configured prior to PLL setup.

Data Fields
uint32_t	pllctrl
	PLL control register PLL0CTRL.

uint32_t	pllndec
	PLL NDEC register PLL0NDEC.

uint32_t	pllpdec
	PLL PDEC register PLL0PDEC.

uint32_t	pllmdec
	PLL MDEC registers PLL0PDEC.

uint32_t	pllsscg [2]
	PLL SSCTL registers PLL0SSCG.

uint32_t	pllRate
	Acutal PLL rate.

uint32_t	flags
	PLL setup flags, Or'ed value of PLL_SETUPFLAG_* definitions.

Macro Definition Documentation

#define FSL_CLOCK_DRIVER_VERSION (MAKE_VERSION(2, 1, 0))

#define FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL 0

When set to 0, peripheral drivers will enable clock in initialize function and disable clock in de-initialize function. When set to 1, peripheral driver will not control the clock, application could control the clock out of the driver.

Note: All drivers share this feature switcher. If it is set to 1, application should handle clock enable and disable for all drivers.

#define CLOCK_USR_CFG_PLL_CONFIG_CACHE_COUNT 2U

Once define this MACRO to be non-zero value, CLOCK_PllGetConfig() function would cache the recent calulation and accelerate the execution to get the right settings.

#define ROM_CLOCKS

Value:

{              \
        kCLOCK_Rom \
    }

#define SRAM_CLOCKS

Value:

{                                                          \
        kCLOCK_Sram1, kCLOCK_Sram2, kCLOCK_Sram3, kCLOCK_Sram4 \
    }

#define FLASH_CLOCKS

Value:

{                \
        kCLOCK_Flash \
    }

#define FMC_CLOCKS

Value:

{              \
        kCLOCK_Fmc \
    }

#define INPUTMUX_CLOCKS

Value:

{                                      \
        kCLOCK_InputMux0, kCLOCK_InputMux1 \
    }

#define IOCON_CLOCKS

Value:

{                \
        kCLOCK_Iocon \
    }

#define GPIO_CLOCKS

Value:

{                                                                                      \
        kCLOCK_Gpio0, kCLOCK_Gpio1, kCLOCK_Gpio2, kCLOCK_Gpio3, kCLOCK_Gpio4, kCLOCK_Gpio5 \
    }

#define PINT_CLOCKS

Value:

{               \
        kCLOCK_Pint \
    }

#define GINT_CLOCKS

Value:

{                            \
        kCLOCK_Gint, kCLOCK_Gint \
    }

#define DMA_CLOCKS

Value:

{                            \
        kCLOCK_Dma0, kCLOCK_Dma1 \
    }

#define CRC_CLOCKS

Value:

{              \
        kCLOCK_Crc \
    }

#define WWDT_CLOCKS

Value:

{               \
        kCLOCK_Wwdt \
    }

#define RTC_CLOCKS

Value:

{              \
        kCLOCK_Rtc \
    }

#define MAILBOX_CLOCKS

Value:

{                  \
        kCLOCK_Mailbox \
    }

#define LPADC_CLOCKS

Value:

{                \
        kCLOCK_Adc0  \
    }

#define MRT_CLOCKS

Value:

{              \
        kCLOCK_Mrt \
    }

#define OSTIMER_CLOCKS

Value:

{                   \
        kCLOCK_OsTimer0 \
    }

#define SCT_CLOCKS

Value:

{               \
        kCLOCK_Sct0 \
    }

#define SCTIPU_CLOCKS

Value:

{                 \
        kCLOCK_Sctipu \
    }

#define UTICK_CLOCKS

Value:

{                 \
        kCLOCK_Utick0 \
    }

#define FLEXCOMM_CLOCKS

Value:

{                                                                                                               \
        kCLOCK_FlexComm0, kCLOCK_FlexComm1, kCLOCK_FlexComm2, kCLOCK_FlexComm3, kCLOCK_FlexComm4, kCLOCK_FlexComm5, \
            kCLOCK_FlexComm6, kCLOCK_FlexComm7, kCLOCK_Hs_Lspi                                                      \
    }

#define LPUART_CLOCKS

Value:

{                                                                                                         \
        kCLOCK_MinUart0, kCLOCK_MinUart1, kCLOCK_MinUart2, kCLOCK_MinUart3, kCLOCK_MinUart4, kCLOCK_MinUart5, \
            kCLOCK_MinUart6, kCLOCK_MinUart7                                                                  \
    }

#define BI2C_CLOCKS

Value:

{                                                                                                                  \
        kCLOCK_BI2c0, kCLOCK_BI2c1, kCLOCK_BI2c2, kCLOCK_BI2c3, kCLOCK_BI2c4, kCLOCK_BI2c5, kCLOCK_BI2c6, kCLOCK_BI2c7 \
    }

#define LPSPI_CLOCKS

Value:

{                                                                                                                  \
        kCLOCK_LSpi0, kCLOCK_LSpi1, kCLOCK_LSpi2, kCLOCK_LSpi3, kCLOCK_LSpi4, kCLOCK_LSpi5, kCLOCK_LSpi6, kCLOCK_LSpi7 \
    }

#define FLEXI2S_CLOCKS

Value:

{                                                                                                         \
        kCLOCK_FlexI2s0, kCLOCK_FlexI2s1, kCLOCK_FlexI2s2, kCLOCK_FlexI2s3, kCLOCK_FlexI2s4, kCLOCK_FlexI2s5, \
            kCLOCK_FlexI2s6, kCLOCK_FlexI2s7                                                                  \
    }

#define USBTYPC_CLOCKS

Value:

{                  \
        kCLOCK_UsbTypc \
    }

#define CTIMER_CLOCKS

Value:

{                                                                             \
        kCLOCK_Timer0, kCLOCK_Timer1, kCLOCK_Timer2, kCLOCK_Timer3, kCLOCK_Timer4 \
    }

#define SDIO_CLOCKS

Value:

{               \
        kCLOCK_Sdio \
    }

#define USB1CLK_CLOCKS

Value:

{                  \
        kCLOCK_Usb1Clk \
    }

#define FREQME_CLOCKS

Value:

{                 \
        kCLOCK_Freqme \
    }

#define USBRAM_CLOCKS

Value:

{                  \
        kCLOCK_UsbRam1 \
    }

#define OTP_CLOCKS

Value:

{              \
        kCLOCK_Otp \
    }

#define RNG_CLOCKS

Value:

{              \
        kCLOCK_Rng \
    }

#define USBHMR0_CLOCKS

Value:

{                  \
        kCLOCK_Usbhmr0 \
    }

#define USBHSL0_CLOCKS

Value:

{                  \
        kCLOCK_Usbhsl0 \
    }

#define HASHCRYPT_CLOCKS

Value:

{                    \
        kCLOCK_HashCrypt \
    }

#define POWERQUAD_CLOCKS

Value:

{                    \
        kCLOCK_PowerQuad \
    }

#define PLULUT_CLOCKS

Value:

{                 \
        kCLOCK_PluLut \
    }

#define PUF_CLOCKS

Value:

{              \
        kCLOCK_Puf \
    }

#define CASPER_CLOCKS

Value:

{                 \
        kCLOCK_Casper \
    }

#define ANALOGCTRL_CLOCKS

Value:

{                     \
        kCLOCK_AnalogCtrl \
    }

#define HS_LSPI_CLOCKS

Value:

{                  \
        kCLOCK_Hs_Lspi \
    }

#define GPIO_SEC_CLOCKS

Value:

{                   \
        kCLOCK_Gpio_Sec \
    }

#define GPIO_SEC_INT_CLOCKS

Value:

{                       \
        kCLOCK_Gpio_Sec_Int \
    }

#define USBD_CLOCKS

Value:

{                                            \
        kCLOCK_Usbd0, kCLOCK_Usbh1, kCLOCK_Usbd1 \
    }

#define USBH_CLOCKS

Value:

{                \
        kCLOCK_Usbh1 \
    }

#define CLK_GATE_REG_OFFSET_SHIFT 8U

#define BUS_CLK kCLOCK_BusClk

#define CLK_ATTACH_ID	(	mux,
		sel,
		pos
	)	(((mux << 0U) \| ((sel + 1) & 0xFU) << 8U) << (pos * 12U))

[4 bits for choice, 0 means invalid choice] [8 bits mux ID]*

#define PLL_CONFIGFLAG_USEINRATE (1 << 0)

When the PLL_CONFIGFLAG_USEINRATE flag is selected, the 'InputRate' field in the configuration structure must be assigned with the expected PLL frequency. If the PLL_CONFIGFLAG_USEINRATE is not used, 'InputRate' is ignored in the configuration function and the driver will determine the PLL rate from the currently selected PLL source. This flag might be used to configure the PLL input clock more accurately when using the WDT oscillator or a more dyanmic CLKIN source.

When the PLL_CONFIGFLAG_FORCENOFRACT flag is selected, the PLL hardware for the automatic bandwidth selection, Spread Spectrum (SS) support, and fractional M-divider are not used.
Flag to use InputRate in PLL configuration structure for setup

#define PLL_SETUPFLAG_POWERUP (1 << 0)

Setup will power on the PLL after setup

Enumeration Type Documentation

enum clock_ip_name_t

enum clock_name_t

Enumerator
kCLOCK_CoreSysClk	Core/system clock (aka MAIN_CLK)
kCLOCK_BusClk	Bus clock (AHB clock)
kCLOCK_ClockOut	CLOCKOUT.
kCLOCK_FroHf	FRO48/96.
kCLOCK_Adc	ADC.
kCLOCK_Usb0	USB0.
kCLOCK_Usb1	USB1.
kCLOCK_Pll1Out	PLL1 Output.
kCLOCK_Mclk	MCLK.
kCLOCK_Sct	SCT.
kCLOCK_SDio	SDIO.
kCLOCK_Fro12M	FRO12M.
kCLOCK_ExtClk	External Clock.
kCLOCK_Pll0Out	PLL0 Output.
kCLOCK_WdtClk	Watchdog clock.
kCLOCK_FlexI2S	FlexI2S clock.
kCLOCK_Flexcomm0	Flexcomm0Clock.
kCLOCK_Flexcomm1	Flexcomm1Clock.
kCLOCK_Flexcomm2	Flexcomm2Clock.
kCLOCK_Flexcomm3	Flexcomm3Clock.
kCLOCK_Flexcomm4	Flexcomm4Clock.
kCLOCK_Flexcomm5	Flexcomm5Clock.
kCLOCK_Flexcomm6	Flexcomm6Clock.
kCLOCK_Flexcomm7	Flexcomm7Clock.
kCLOCK_HsLspi	HS LPSPI Clock.
kCLOCK_CTmier0	CTmier0Clock.
kCLOCK_CTmier1	CTmier1Clock.
kCLOCK_CTmier2	CTmier2Clock.
kCLOCK_CTmier3	CTmier3Clock.
kCLOCK_CTmier4	CTmier4Clock.
kCLOCK_Systick0	System Tick 0 Clock.
kCLOCK_Systick1	System Tick 1 Clock.

enum ss_progmodfm_t

Enumerator
kSS_MF_512	Nss = 512 (fm ? 3.9 - 7.8 kHz)
kSS_MF_384	Nss ?= 384 (fm ? 5.2 - 10.4 kHz)
kSS_MF_256	Nss = 256 (fm ? 7.8 - 15.6 kHz)
kSS_MF_128	Nss = 128 (fm ? 15.6 - 31.3 kHz)
kSS_MF_64	Nss = 64 (fm ? 32.3 - 64.5 kHz)
kSS_MF_32	Nss = 32 (fm ? 62.5- 125 kHz)
kSS_MF_24	Nss ?= 24 (fm ? 83.3- 166.6 kHz)
kSS_MF_16	Nss = 16 (fm ? 125- 250 kHz)

enum ss_progmoddp_t

Enumerator
kSS_MR_K0	k = 0 (no spread spectrum)
kSS_MR_K1	k = 1
kSS_MR_K1_5	k = 1.5
kSS_MR_K2	k = 2
kSS_MR_K3	k = 3
kSS_MR_K4	k = 4
kSS_MR_K6	k = 6
kSS_MR_K8	k = 8

enum ss_modwvctrl_t

Compensation for low pass filtering of the PLL to get a triangular modulation at the output of the PLL, giving a flat frequency spectrum.

Enumerator

kSS_MC_NOC

no compensation

kSS_MC_RECC

recommended setting

kSS_MC_MAXC

max.

compensation

enum pll_error_t

Enumerator
kStatus_PLL_Success	PLL operation was successful.
kStatus_PLL_OutputTooLow	PLL output rate request was too low.
kStatus_PLL_OutputTooHigh	PLL output rate request was too high.
kStatus_PLL_InputTooLow	PLL input rate is too low.
kStatus_PLL_InputTooHigh	PLL input rate is too high.
kStatus_PLL_OutsideIntLimit	Requested output rate isn't possible.
kStatus_PLL_CCOTooLow	Requested CCO rate isn't possible.
kStatus_PLL_CCOTooHigh	Requested CCO rate isn't possible.

enum clock_usbfs_src_t

Enumerator
kCLOCK_UsbfsSrcFro	Use FRO 96 MHz.
kCLOCK_UsbfsSrcPll0	Use PLL0 output.
kCLOCK_UsbfsSrcMainClock	Use Main clock.
kCLOCK_UsbfsSrcPll1	Use PLL1 clock.
kCLOCK_UsbfsSrcNone	this may be selected in order to reduce power when no output is needed.

enum clock_usbhs_src_t

Enumerator
kCLOCK_UsbSrcUnused	Used when the function does not care the clock source.

enum clock_usb_phy_src_t

Enumerator
kCLOCK_UsbPhySrcExt	Use external crystal.

Function Documentation

static void CLOCK_EnableClock ( clock_ip_name_t clk )

inlinestatic

Parameters

name	: Clock to be enabled.

Returns: Nothing

static void CLOCK_DisableClock ( clock_ip_name_t clk )

inlinestatic

Parameters

name	: Clock to be Disabled.

Returns: Nothing

status_t CLOCK_SetupFROClocking ( uint32_t iFreq )

Parameters

iFreq : Desired frequency (must be one of #CLK_FRO_12MHZ or #CLK_FRO_48MHZ or #CLK_FRO_96MHZ)

Returns: returns success or fail status.

void CLOCK_SetFLASHAccessCyclesForFreq ( uint32_t iFreq )

Parameters

iFreq : Input frequency

Returns: Nothing

status_t CLOCK_SetupExtClocking ( uint32_t iFreq )

Parameters

iFreq : Desired frequency (must be equal to exact rate in Hz)

Returns: returns success or fail status.

status_t CLOCK_SetupI2SMClkClocking ( uint32_t iFreq )

Parameters

iFreq : Desired frequency (must be equal to exact rate in Hz)

Returns: returns success or fail status.

void CLOCK_AttachClk ( clock_attach_id_t connection )

Parameters

connection : Clock to be configured.

Returns: Nothing

clock_attach_id_t CLOCK_GetClockAttachId ( clock_attach_id_t attachId )

Parameters

attachId : Clock attach id to get.

Returns: Clock source value.

void CLOCK_SetClkDiv	(	clock_div_name_t	div_name,
		uint32_t	divided_by_value,
		bool	reset
	)

Parameters

div_name	: Clock divider name
divided_by_value,:	Value to be divided
reset	: Whether to reset the divider counter.

Returns: Nothing

void CLOCK_SetRtc1khzClkDiv ( uint32_t divided_by_value )

Parameters

divided_by_value,: Value to be divided

Returns: Nothing

void CLOCK_SetRtc1hzClkDiv ( uint32_t divided_by_value )

Parameters

divided_by_value,: Value to be divided

Returns: Nothing

uint32_t CLOCK_SetFlexCommClock	(	uint32_t	id,
		uint32_t	freq
	)

Parameters

id	: flexcomm instance id freq : output frequency

Returns: 0 : the frequency range is out of range. 1 : switch successfully.

uint32_t CLOCK_GetFlexCommInputClock ( uint32_t id )

Parameters

id	: flexcomm instance id

Returns: Frequency value

uint32_t CLOCK_GetFreq ( clock_name_t clockName )

Returns: Frequency of selected clock

uint32_t CLOCK_GetFro12MFreq ( void )

Returns: Frequency of FRO 12MHz

uint32_t CLOCK_GetFro1MFreq ( void )

Returns: Frequency of FRO 1MHz

uint32_t CLOCK_GetClockOutClkFreq ( void )

Returns: Frequency of ClockOut

uint32_t CLOCK_GetAdcClkFreq ( void )

Returns: Frequency of Adc.

uint32_t CLOCK_GetUsb0ClkFreq ( void )

Returns: Frequency of Usb0 Clock.

uint32_t CLOCK_GetUsb1ClkFreq ( void )

Returns: Frequency of Usb1 Clock.

uint32_t CLOCK_GetMclkClkFreq ( void )

Returns: Frequency of MClk Clock.

uint32_t CLOCK_GetSctClkFreq ( void )

Returns: Frequency of SCTimer Clock.

uint32_t CLOCK_GetSdioClkFreq ( void )

Returns: Frequency of SDIO Clock.

uint32_t CLOCK_GetExtClkFreq ( void )

Returns: Frequency of External Clock. If no external clock is used returns 0.

uint32_t CLOCK_GetWdtClkFreq ( void )

Returns: Frequency of Watchdog

uint32_t CLOCK_GetFroHfFreq ( void )

Returns: Frequency of High-Freq output of FRO

uint32_t CLOCK_GetPll0OutFreq ( void )

Returns: Frequency of PLL

uint32_t CLOCK_GetPll1OutFreq ( void )

Returns: Frequency of PLL

uint32_t CLOCK_GetOsc32KFreq ( void )

Returns: Frequency of 32kHz osc

uint32_t CLOCK_GetCoreSysClkFreq ( void )

Returns: Frequency of Core System

uint32_t CLOCK_GetI2SMClkFreq ( void )

Returns: Frequency of I2S MCLK Clock

uint32_t CLOCK_GetCTimerClkFreq ( uint32_t id )

Returns: Frequency of CTimer functional Clock

uint32_t CLOCK_GetSystickClkFreq ( uint32_t id )

Returns: Frequency of Systick Clock

uint32_t CLOCK_GetPLL0InClockRate ( void )

Returns: PLL0 input clock rate

uint32_t CLOCK_GetPLL1InClockRate ( void )

Returns: PLL1 input clock rate

uint32_t CLOCK_GetPLL0OutClockRate ( bool recompute )

Parameters

recompute : Forces a PLL rate recomputation if true

Returns: PLL0 output clock rate

Note: The PLL rate is cached in the driver in a variable as the rate computation function can take some time to perform. It is recommended to use 'false' with the 'recompute' parameter.

uint32_t CLOCK_GetPLL1OutClockRate ( bool recompute )

Parameters

recompute : Forces a PLL rate recomputation if true

Returns: PLL1 output clock rate

Note: The PLL rate is cached in the driver in a variable as the rate computation function can take some time to perform. It is recommended to use 'false' with the 'recompute' parameter.

__STATIC_INLINE void CLOCK_SetBypassPLL0 ( bool bypass )

bypass : true to bypass PLL0 (PLL0 output = PLL0 input, false to disable bypass

Returns: PLL0 output clock rate

__STATIC_INLINE void CLOCK_SetBypassPLL1 ( bool bypass )

bypass : true to bypass PLL1 (PLL1 output = PLL1 input, false to disable bypass

Returns: PLL1 output clock rate

__STATIC_INLINE bool CLOCK_IsPLL0Locked ( void )

Returns: true if the PLL is locked, false if not locked

__STATIC_INLINE bool CLOCK_IsPLL1Locked ( void )

Returns: true if the PLL1 is locked, false if not locked

void CLOCK_SetStoredPLL0ClockRate ( uint32_t rate )

Parameters

rate,: Current rate of the PLL0

Returns: Nothing

uint32_t CLOCK_GetPLL0OutFromSetup ( pll_setup_t * pSetup )

Parameters

pSetup : Pointer to a PLL setup structure

Returns: System PLL output clock rate the setup structure will generate

pll_error_t CLOCK_SetupPLL0Data	(	pll_config_t *	pControl,
		pll_setup_t *	pSetup
	)

Parameters

pControl	: Pointer to populated PLL control structure to generate setup with
pSetup	: Pointer to PLL setup structure to be filled

Returns: PLL_ERROR_SUCCESS on success, or PLL setup error code

Note: Actual frequency for setup may vary from the desired frequency based on the accuracy of input clocks, rounding, non-fractional PLL mode, etc.

pll_error_t CLOCK_SetupPLL0Prec	(	pll_setup_t *	pSetup,
		uint32_t	flagcfg
	)

Parameters

pSetup	: Pointer to populated PLL setup structure
flagcfg	: Flag configuration for PLL config structure

Returns: PLL_ERROR_SUCCESS on success, or PLL setup error code

Note: This function will power off the PLL, setup the PLL with the new setup data, and then optionally powerup the PLL, wait for PLL lock, and adjust system voltages to the new PLL rate. The function will not alter any source clocks (ie, main systen clock) that may use the PLL, so these should be setup prior to and after exiting the function.

pll_error_t CLOCK_SetPLL0Freq ( const pll_setup_t * pSetup )

Parameters

pSetup : Pointer to populated PLL setup structure

Returns: kStatus_PLL_Success on success, or PLL setup error code

Note: This function will power off the PLL, setup the PLL with the new setup data, and then optionally powerup the PLL, wait for PLL lock, and adjust system voltages to the new PLL rate. The function will not alter any source clocks (ie, main systen clock) that may use the PLL, so these should be setup prior to and after exiting the function.

pll_error_t CLOCK_SetPLL1Freq ( const pll_setup_t * pSetup )

Parameters

pSetup : Pointer to populated PLL setup structure

Returns: kStatus_PLL_Success on success, or PLL setup error code

Note: This function will power off the PLL, setup the PLL with the new setup data, and then optionally powerup the PLL, wait for PLL lock, and adjust system voltages to the new PLL rate. The function will not alter any source clocks (ie, main systen clock) that may use the PLL, so these should be setup prior to and after exiting the function.

void CLOCK_SetupPLL0Mult	(	uint32_t	multiply_by,
		uint32_t	input_freq
	)

Parameters

multiply_by	: multiplier
input_freq	: Clock input frequency of the PLL

Returns: Nothing

Note: Unlike the Chip_Clock_SetupSystemPLLPrec() function, this function does not disable or enable PLL power, wait for PLL lock, or adjust system voltages. These must be done in the application. The function will not alter any source clocks (ie, main systen clock) that may use the PLL, so these should be setup prior to and after exiting the function.

static void CLOCK_DisableUsbDevicefs0Clock ( clock_ip_name_t clk )

inlinestatic

Disable USB clock.

bool CLOCK_EnableUsbfs0DeviceClock	(	clock_usbfs_src_t	src,
		uint32_t	freq
	)

Parameters

src	: clock source
freq,:	clock frequency Enable USB Device Full Speed clock.

bool CLOCK_EnableUsbfs0HostClock	(	clock_usbfs_src_t	src,
		uint32_t	freq
	)

Parameters

src	: clock source
freq,:	clock frequency Enable USB HOST Full Speed clock.

bool CLOCK_EnableUsbhs0PhyPllClock	(	clock_usb_phy_src_t	src,
		uint32_t	freq
	)

Enable USB phy clock.

bool CLOCK_EnableUsbhs0DeviceClock	(	clock_usbhs_src_t	src,
		uint32_t	freq
	)

Enable USB Device High Speed clock.

bool CLOCK_EnableUsbhs0HostClock	(	clock_usbhs_src_t	src,
		uint32_t	freq
	)

Enable USB HOST High Speed clock.

void SDK_DelayAtLeastUs ( uint32_t delay_us )

Please note that, this API will calculate the microsecond period with the maximum devices supported CPU frequency, so this API will only delay for at least the given microseconds, if precise delay count was needed, please implement a new timer count to achieve this function.

Parameters

delay_us Delay time in unit of microsecond.

Overview

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Data Structures

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Data Structure Documentation

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Data Fields

Macro Definition Documentation

Enumeration Type Documentation

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