MCUXpresso SDK API Reference Manual
Rev. 0
NXP Semiconductors
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The MCUXpresso SDK provides a peripheral driver for the Smart External DRAM Controller block of MCUXpresso SDK devices.
The SEMC Initialize is to initialize for common configure: gate the SEMC clock, configure IOMUX, and queue weight setting. The SEMC Deinitialize is to ungate the clock and disable SEMC module.
The interrupt and disable operation for SEMC.
This group is mainly provide NAND/NOR memory access API which is through IP bus/ IP command access. Since the AXI access is directly read/write is so easy, so the AXI read/write part is not provided in SEMC.
Data Structures | |
struct | semc_sdram_config_t |
SEMC SDRAM configuration structure. More... | |
struct | semc_nand_timing_config_t |
SEMC NAND device timing configuration structure. More... | |
struct | semc_nand_config_t |
SEMC NAND configuration structure. More... | |
struct | semc_nor_config_t |
SEMC NOR configuration structure. More... | |
struct | semc_sram_config_t |
SEMC SRAM configuration structure. More... | |
struct | semc_dbi_config_t |
SEMC DBI configuration structure. More... | |
struct | semc_queuea_weight_struct_t |
SEMC AXI queue a weight setting structure. More... | |
union | semc_queuea_weight_t |
SEMC AXI queue a weight setting union. More... | |
struct | semc_queueb_weight_struct_t |
SEMC AXI queue b weight setting structure. More... | |
union | semc_queueb_weight_t |
SEMC AXI queue b weight setting union. More... | |
struct | semc_axi_queueweight_t |
SEMC AXI queue weight setting. More... | |
struct | semc_config_t |
SEMC configuration structure. More... | |
Driver version | |
#define | FSL_SEMC_DRIVER_VERSION (MAKE_VERSION(2, 1, 0)) |
SEMC driver version 2.1.0. More... | |
SEMC Initialization and De-initialization | |
void | SEMC_GetDefaultConfig (semc_config_t *config) |
Gets the SEMC default basic configuration structure. More... | |
void | SEMC_Init (SEMC_Type *base, semc_config_t *configure) |
Initializes SEMC. More... | |
void | SEMC_Deinit (SEMC_Type *base) |
Deinitializes the SEMC module and gates the clock. More... | |
SEMC Configuration Operation For Each Memory Type | |
status_t | SEMC_ConfigureSDRAM (SEMC_Type *base, semc_sdram_cs_t cs, semc_sdram_config_t *config, uint32_t clkSrc_Hz) |
Configures SDRAM controller in SEMC. More... | |
status_t | SEMC_ConfigureNAND (SEMC_Type *base, semc_nand_config_t *config, uint32_t clkSrc_Hz) |
Configures NAND controller in SEMC. More... | |
status_t | SEMC_ConfigureNOR (SEMC_Type *base, semc_nor_config_t *config, uint32_t clkSrc_Hz) |
Configures NOR controller in SEMC. More... | |
status_t | SEMC_ConfigureSRAM (SEMC_Type *base, semc_sram_config_t *config, uint32_t clkSrc_Hz) |
Configures SRAM controller in SEMC. More... | |
status_t | SEMC_ConfigureDBI (SEMC_Type *base, semc_dbi_config_t *config, uint32_t clkSrc_Hz) |
Configures DBI controller in SEMC. More... | |
SEMC Interrupt Operation | |
static void | SEMC_EnableInterrupts (SEMC_Type *base, uint32_t mask) |
Enables the SEMC interrupt. More... | |
static void | SEMC_DisableInterrupts (SEMC_Type *base, uint32_t mask) |
Disables the SEMC interrupt. More... | |
static bool | SEMC_GetStatusFlag (SEMC_Type *base) |
Gets the SEMC status. More... | |
static void | SEMC_ClearStatusFlags (SEMC_Type *base, uint32_t mask) |
Clears the SEMC status flag state. More... | |
SEMC Memory Access Operation | |
static bool | SEMC_IsInIdle (SEMC_Type *base) |
Check if SEMC is in idle. More... | |
status_t | SEMC_SendIPCommand (SEMC_Type *base, semc_mem_type_t type, uint32_t address, uint32_t command, uint32_t write, uint32_t *read) |
SEMC IP command access. More... | |
static uint16_t | SEMC_BuildNandIPCommand (uint8_t userCommand, semc_ipcmd_nand_addrmode_t addrMode, semc_ipcmd_nand_cmdmode_t cmdMode) |
Build SEMC IP command for NAND. More... | |
static bool | SEMC_IsNandReady (SEMC_Type *base) |
Check if the NAND device is ready. More... | |
status_t | SEMC_IPCommandNandWrite (SEMC_Type *base, uint32_t address, uint8_t *data, uint32_t size_bytes) |
SEMC NAND device memory write through IP command. More... | |
status_t | SEMC_IPCommandNandRead (SEMC_Type *base, uint32_t address, uint8_t *data, uint32_t size_bytes) |
SEMC NAND device memory read through IP command. More... | |
status_t | SEMC_IPCommandNorWrite (SEMC_Type *base, uint32_t address, uint8_t *data, uint32_t size_bytes) |
SEMC NOR device memory write through IP command. More... | |
status_t | SEMC_IPCommandNorRead (SEMC_Type *base, uint32_t address, uint8_t *data, uint32_t size_bytes) |
SEMC NOR device memory read through IP command. More... | |
struct semc_sdram_config_t |
Data Fields | |
semc_iomux_pin | csxPinMux |
CS pin mux. More... | |
uint32_t | address |
The base address. More... | |
uint32_t | memsize_kbytes |
The memory size in unit of kbytes. More... | |
smec_port_size_t | portSize |
Port size. More... | |
sem_sdram_burst_len_t | burstLen |
Burst length. More... | |
semc_sdram_column_bit_num_t | columnAddrBitNum |
Column address bit number. More... | |
semc_caslatency_t | casLatency |
CAS latency. More... | |
uint8_t | tPrecharge2Act_Ns |
Precharge to active wait time in unit of nanosecond. More... | |
uint8_t | tAct2ReadWrite_Ns |
Act to read/write wait time in unit of nanosecond. More... | |
uint8_t | tRefreshRecovery_Ns |
Refresh recovery time in unit of nanosecond. More... | |
uint8_t | tWriteRecovery_Ns |
write recovery time in unit of nanosecond. More... | |
uint8_t | tCkeOff_Ns |
CKE off minimum time in unit of nanosecond. More... | |
uint8_t | tAct2Prechage_Ns |
Active to precharge in unit of nanosecond. More... | |
uint8_t | tSelfRefRecovery_Ns |
Self refresh recovery time in unit of nanosecond. More... | |
uint8_t | tRefresh2Refresh_Ns |
Refresh to refresh wait time in unit of nanosecond. More... | |
uint8_t | tAct2Act_Ns |
Active to active wait time in unit of nanosecond. More... | |
uint32_t | tPrescalePeriod_Ns |
Prescaler timer period should not be larger than 256 * 16 * clock cycle. More... | |
uint32_t | tIdleTimeout_Ns |
Idle timeout in unit of prescale time period. More... | |
uint32_t | refreshPeriod_nsPerRow |
Refresh timer period like 64ms * 1000000/8192 . More... | |
uint32_t | refreshUrgThreshold |
Refresh urgent threshold. More... | |
uint8_t | refreshBurstLen |
Refresh burst length. More... | |
semc_iomux_pin semc_sdram_config_t::csxPinMux |
The kSEMC_MUXA8 is not valid in sdram pin mux setting.
uint32_t semc_sdram_config_t::address |
uint32_t semc_sdram_config_t::memsize_kbytes |
smec_port_size_t semc_sdram_config_t::portSize |
sem_sdram_burst_len_t semc_sdram_config_t::burstLen |
semc_sdram_column_bit_num_t semc_sdram_config_t::columnAddrBitNum |
semc_caslatency_t semc_sdram_config_t::casLatency |
uint8_t semc_sdram_config_t::tPrecharge2Act_Ns |
uint8_t semc_sdram_config_t::tAct2ReadWrite_Ns |
uint8_t semc_sdram_config_t::tRefreshRecovery_Ns |
uint8_t semc_sdram_config_t::tWriteRecovery_Ns |
uint8_t semc_sdram_config_t::tCkeOff_Ns |
uint8_t semc_sdram_config_t::tAct2Prechage_Ns |
uint8_t semc_sdram_config_t::tSelfRefRecovery_Ns |
uint8_t semc_sdram_config_t::tRefresh2Refresh_Ns |
uint8_t semc_sdram_config_t::tAct2Act_Ns |
uint32_t semc_sdram_config_t::tPrescalePeriod_Ns |
uint32_t semc_sdram_config_t::tIdleTimeout_Ns |
uint32_t semc_sdram_config_t::refreshPeriod_nsPerRow |
uint32_t semc_sdram_config_t::refreshUrgThreshold |
uint8_t semc_sdram_config_t::refreshBurstLen |
struct semc_nand_timing_config_t |
Data Fields | |
uint8_t | tCeSetup_Ns |
CE setup time: tCS. More... | |
uint8_t | tCeHold_Ns |
CE hold time: tCH. More... | |
uint8_t | tCeInterval_Ns |
CE interval time:tCEITV. More... | |
uint8_t | tWeLow_Ns |
WE low time: tWP. More... | |
uint8_t | tWeHigh_Ns |
WE high time: tWH. More... | |
uint8_t | tReLow_Ns |
RE low time: tRP. More... | |
uint8_t | tReHigh_Ns |
RE high time: tREH. More... | |
uint8_t | tTurnAround_Ns |
Turnaround time for async mode: tTA. More... | |
uint8_t | tWehigh2Relow_Ns |
WE# high to RE# wait time: tWHR. More... | |
uint8_t | tRehigh2Welow_Ns |
RE# high to WE# low wait time: tRHW. More... | |
uint8_t | tAle2WriteStart_Ns |
ALE to write start wait time: tADL. More... | |
uint8_t | tReady2Relow_Ns |
Ready to RE# low min wait time: tRR. More... | |
uint8_t | tWehigh2Busy_Ns |
WE# high to busy wait time: tWB. More... | |
uint8_t semc_nand_timing_config_t::tCeSetup_Ns |
uint8_t semc_nand_timing_config_t::tCeHold_Ns |
uint8_t semc_nand_timing_config_t::tCeInterval_Ns |
uint8_t semc_nand_timing_config_t::tWeLow_Ns |
uint8_t semc_nand_timing_config_t::tWeHigh_Ns |
uint8_t semc_nand_timing_config_t::tReLow_Ns |
uint8_t semc_nand_timing_config_t::tReHigh_Ns |
uint8_t semc_nand_timing_config_t::tTurnAround_Ns |
uint8_t semc_nand_timing_config_t::tWehigh2Relow_Ns |
uint8_t semc_nand_timing_config_t::tRehigh2Welow_Ns |
uint8_t semc_nand_timing_config_t::tAle2WriteStart_Ns |
uint8_t semc_nand_timing_config_t::tReady2Relow_Ns |
uint8_t semc_nand_timing_config_t::tWehigh2Busy_Ns |
struct semc_nand_config_t |
Data Fields | |
semc_iomux_pin | cePinMux |
The CE pin mux setting. More... | |
uint32_t | axiAddress |
The base address for AXI nand. More... | |
uint32_t | axiMemsize_kbytes |
The memory size in unit of kbytes for AXI nand. More... | |
uint32_t | ipgAddress |
The base address for IPG nand . More... | |
uint32_t | ipgMemsize_kbytes |
The memory size in unit of kbytes for IPG nand. More... | |
semc_rdy_polarity_t | rdyactivePolarity |
Wait ready polarity. More... | |
bool | edoModeEnabled |
EDO mode enabled. More... | |
semc_nand_column_bit_num_t | columnAddrBitNum |
Column address bit number. More... | |
semc_nand_address_option_t | arrayAddrOption |
Address option. More... | |
sem_nand_burst_len_t | burstLen |
Burst length. More... | |
smec_port_size_t | portSize |
Port size. More... | |
semc_nand_timing_config_t * | timingConfig |
SEMC nand timing configuration. More... | |
semc_iomux_pin semc_nand_config_t::cePinMux |
The kSEMC_MUXRDY is not valid for CE pin setting.
uint32_t semc_nand_config_t::axiAddress |
uint32_t semc_nand_config_t::axiMemsize_kbytes |
uint32_t semc_nand_config_t::ipgAddress |
uint32_t semc_nand_config_t::ipgMemsize_kbytes |
semc_rdy_polarity_t semc_nand_config_t::rdyactivePolarity |
bool semc_nand_config_t::edoModeEnabled |
semc_nand_column_bit_num_t semc_nand_config_t::columnAddrBitNum |
semc_nand_address_option_t semc_nand_config_t::arrayAddrOption |
sem_nand_burst_len_t semc_nand_config_t::burstLen |
smec_port_size_t semc_nand_config_t::portSize |
semc_nand_timing_config_t* semc_nand_config_t::timingConfig |
struct semc_nor_config_t |
Data Fields | |
semc_iomux_pin | cePinMux |
The CE# pin mux setting. More... | |
semc_iomux_nora27_pin | addr27 |
The Addr bit 27 pin mux setting. More... | |
uint32_t | address |
The base address. More... | |
uint32_t | memsize_kbytes |
The memory size in unit of kbytes. More... | |
uint8_t | addrPortWidth |
The address port width. More... | |
semc_rdy_polarity_t | rdyactivePolarity |
Wait ready polarity. More... | |
semc_adv_polarity_t | advActivePolarity |
ADV# polarity. More... | |
semc_norsram_column_bit_num_t | columnAddrBitNum |
Column address bit number. More... | |
semc_addr_mode_t | addrMode |
Address mode. More... | |
sem_norsram_burst_len_t | burstLen |
Burst length. More... | |
smec_port_size_t | portSize |
Port size. More... | |
uint8_t | tCeSetup_Ns |
The CE setup time. More... | |
uint8_t | tCeHold_Ns |
The CE hold time. More... | |
uint8_t | tCeInterval_Ns |
CE interval minimum time. More... | |
uint8_t | tAddrSetup_Ns |
The address setup time. More... | |
uint8_t | tAddrHold_Ns |
The address hold time. More... | |
uint8_t | tWeLow_Ns |
WE low time for async mode. More... | |
uint8_t | tWeHigh_Ns |
WE high time for async mode. More... | |
uint8_t | tReLow_Ns |
RE low time for async mode. More... | |
uint8_t | tReHigh_Ns |
RE high time for async mode. More... | |
uint8_t | tTurnAround_Ns |
Turnaround time for async mode. More... | |
uint8_t | tAddr2WriteHold_Ns |
Address to write data hold time for async mode. More... | |
uint8_t | latencyCount |
Latency count for sync mode. More... | |
uint8_t | readCycle |
Read cycle time for sync mode. More... | |
semc_iomux_pin semc_nor_config_t::cePinMux |
semc_iomux_nora27_pin semc_nor_config_t::addr27 |
uint32_t semc_nor_config_t::address |
uint32_t semc_nor_config_t::memsize_kbytes |
uint8_t semc_nor_config_t::addrPortWidth |
semc_rdy_polarity_t semc_nor_config_t::rdyactivePolarity |
semc_adv_polarity_t semc_nor_config_t::advActivePolarity |
semc_norsram_column_bit_num_t semc_nor_config_t::columnAddrBitNum |
semc_addr_mode_t semc_nor_config_t::addrMode |
sem_norsram_burst_len_t semc_nor_config_t::burstLen |
smec_port_size_t semc_nor_config_t::portSize |
uint8_t semc_nor_config_t::tCeSetup_Ns |
uint8_t semc_nor_config_t::tCeHold_Ns |
uint8_t semc_nor_config_t::tCeInterval_Ns |
uint8_t semc_nor_config_t::tAddrSetup_Ns |
uint8_t semc_nor_config_t::tAddrHold_Ns |
uint8_t semc_nor_config_t::tWeLow_Ns |
uint8_t semc_nor_config_t::tWeHigh_Ns |
uint8_t semc_nor_config_t::tReLow_Ns |
uint8_t semc_nor_config_t::tReHigh_Ns |
uint8_t semc_nor_config_t::tTurnAround_Ns |
uint8_t semc_nor_config_t::tAddr2WriteHold_Ns |
uint8_t semc_nor_config_t::latencyCount |
uint8_t semc_nor_config_t::readCycle |
struct semc_sram_config_t |
Data Fields | |
semc_iomux_pin | cePinMux |
The CE# pin mux setting. More... | |
semc_iomux_nora27_pin | addr27 |
The Addr bit 27 pin mux setting. More... | |
uint32_t | address |
The base address. More... | |
uint32_t | memsize_kbytes |
The memory size in unit of kbytes. More... | |
uint8_t | addrPortWidth |
The address port width. More... | |
semc_adv_polarity_t | advActivePolarity |
ADV# polarity 1: active high, 0: active low. More... | |
semc_addr_mode_t | addrMode |
Address mode. More... | |
sem_norsram_burst_len_t | burstLen |
Burst length. More... | |
smec_port_size_t | portSize |
Port size. More... | |
uint8_t | tCeSetup_Ns |
The CE setup time. More... | |
uint8_t | tCeHold_Ns |
The CE hold time. More... | |
uint8_t | tCeInterval_Ns |
CE interval minimum time. More... | |
uint8_t | tAddrSetup_Ns |
The address setup time. More... | |
uint8_t | tAddrHold_Ns |
The address hold time. More... | |
uint8_t | tWeLow_Ns |
WE low time for async mode. More... | |
uint8_t | tWeHigh_Ns |
WE high time for async mode. More... | |
uint8_t | tReLow_Ns |
RE low time for async mode. More... | |
uint8_t | tReHigh_Ns |
RE high time for async mode. More... | |
uint8_t | tTurnAround_Ns |
Turnaround time for async mode. More... | |
uint8_t | tAddr2WriteHold_Ns |
Address to write data hold time for async mode. More... | |
uint8_t | tWriteSetup_Ns |
Write data setup time for sync mode. More... | |
uint8_t | tWriteHold_Ns |
Write hold time for sync mode. More... | |
uint8_t | latencyCount |
Latency count for sync mode. More... | |
uint8_t | readCycle |
Read cycle time for sync mode. More... | |
semc_iomux_pin semc_sram_config_t::cePinMux |
semc_iomux_nora27_pin semc_sram_config_t::addr27 |
uint32_t semc_sram_config_t::address |
uint32_t semc_sram_config_t::memsize_kbytes |
uint8_t semc_sram_config_t::addrPortWidth |
semc_adv_polarity_t semc_sram_config_t::advActivePolarity |
semc_addr_mode_t semc_sram_config_t::addrMode |
sem_norsram_burst_len_t semc_sram_config_t::burstLen |
smec_port_size_t semc_sram_config_t::portSize |
uint8_t semc_sram_config_t::tCeSetup_Ns |
uint8_t semc_sram_config_t::tCeHold_Ns |
uint8_t semc_sram_config_t::tCeInterval_Ns |
uint8_t semc_sram_config_t::tAddrSetup_Ns |
uint8_t semc_sram_config_t::tAddrHold_Ns |
uint8_t semc_sram_config_t::tWeLow_Ns |
uint8_t semc_sram_config_t::tWeHigh_Ns |
uint8_t semc_sram_config_t::tReLow_Ns |
uint8_t semc_sram_config_t::tReHigh_Ns |
uint8_t semc_sram_config_t::tTurnAround_Ns |
uint8_t semc_sram_config_t::tAddr2WriteHold_Ns |
uint8_t semc_sram_config_t::tWriteSetup_Ns |
uint8_t semc_sram_config_t::tWriteHold_Ns |
uint8_t semc_sram_config_t::latencyCount |
uint8_t semc_sram_config_t::readCycle |
struct semc_dbi_config_t |
Data Fields | |
semc_iomux_pin | csxPinMux |
The CE# pin mux. More... | |
uint32_t | address |
The base address. More... | |
uint32_t | memsize_kbytes |
The memory size in unit of 4kbytes. More... | |
semc_dbi_column_bit_num_t | columnAddrBitNum |
Column address bit number. More... | |
sem_dbi_burst_len_t | burstLen |
Burst length. More... | |
smec_port_size_t | portSize |
Port size. More... | |
uint8_t | tCsxSetup_Ns |
The CSX setup time. More... | |
uint8_t | tCsxHold_Ns |
The CSX hold time. More... | |
uint8_t | tWexLow_Ns |
WEX low time. More... | |
uint8_t | tWexHigh_Ns |
WEX high time. More... | |
uint8_t | tRdxLow_Ns |
RDX low time. More... | |
uint8_t | tRdxHigh_Ns |
RDX high time. More... | |
uint8_t | tCsxInterval_Ns |
Write data setup time. More... | |
semc_iomux_pin semc_dbi_config_t::csxPinMux |
uint32_t semc_dbi_config_t::address |
uint32_t semc_dbi_config_t::memsize_kbytes |
semc_dbi_column_bit_num_t semc_dbi_config_t::columnAddrBitNum |
sem_dbi_burst_len_t semc_dbi_config_t::burstLen |
smec_port_size_t semc_dbi_config_t::portSize |
uint8_t semc_dbi_config_t::tCsxSetup_Ns |
uint8_t semc_dbi_config_t::tCsxHold_Ns |
uint8_t semc_dbi_config_t::tWexLow_Ns |
uint8_t semc_dbi_config_t::tWexHigh_Ns |
uint8_t semc_dbi_config_t::tRdxLow_Ns |
uint8_t semc_dbi_config_t::tRdxHigh_Ns |
uint8_t semc_dbi_config_t::tCsxInterval_Ns |
struct semc_queuea_weight_struct_t |
Data Fields | |
uint32_t | qos: 4 |
weight of qos for queue 0 . More... | |
uint32_t | aging: 4 |
weight of aging for queue 0. More... | |
uint32_t | slaveHitSwith: 8 |
weight of read/write switch for queue 0. More... | |
uint32_t | slaveHitNoswitch: 8 |
weight of read/write no switch for queue 0 . More... | |
uint32_t semc_queuea_weight_struct_t::qos |
uint32_t semc_queuea_weight_struct_t::aging |
uint32_t semc_queuea_weight_struct_t::slaveHitSwith |
uint32_t semc_queuea_weight_struct_t::slaveHitNoswitch |
union semc_queuea_weight_t |
Data Fields | |
semc_queuea_weight_struct_t | queueaConfig |
Structure configuration for queueA. More... | |
uint32_t | queueaValue |
Configuration value for queueA which could directly write to the reg. More... | |
semc_queuea_weight_struct_t semc_queuea_weight_t::queueaConfig |
uint32_t semc_queuea_weight_t::queueaValue |
struct semc_queueb_weight_struct_t |
Data Fields | |
uint32_t | qos: 4 |
weight of qos for queue 1. More... | |
uint32_t | aging: 4 |
weight of aging for queue 1. More... | |
uint32_t | slaveHitSwith: 8 |
weight of read/write switch for queue 1. More... | |
uint32_t | weightPagehit: 8 |
weight of page hit for queue 1 only . More... | |
uint32_t | bankRotation: 8 |
weight of bank rotation for queue 1 only . More... | |
uint32_t semc_queueb_weight_struct_t::qos |
uint32_t semc_queueb_weight_struct_t::aging |
uint32_t semc_queueb_weight_struct_t::slaveHitSwith |
uint32_t semc_queueb_weight_struct_t::weightPagehit |
uint32_t semc_queueb_weight_struct_t::bankRotation |
union semc_queueb_weight_t |
Data Fields | |
semc_queueb_weight_struct_t | queuebConfig |
Structure configuration for queueB. More... | |
uint32_t | queuebValue |
Configuration value for queueB which could directly write to the reg. More... | |
semc_queueb_weight_struct_t semc_queueb_weight_t::queuebConfig |
uint32_t semc_queueb_weight_t::queuebValue |
struct semc_axi_queueweight_t |
Data Fields | |
semc_queuea_weight_t | queueaWeight |
Weight settings for queue a. More... | |
semc_queueb_weight_t | queuebWeight |
Weight settings for queue b. More... | |
semc_queuea_weight_t semc_axi_queueweight_t::queueaWeight |
semc_queueb_weight_t semc_axi_queueweight_t::queuebWeight |
struct semc_config_t |
busTimeoutCycles: when busTimeoutCycles is zero, the bus timeout cycle is 255*1024. otherwise the bus timeout cycles is busTimeoutCycles*1024. cmdTimeoutCycles: is used for command execution timeout cycles. it's similar to the busTimeoutCycles.
Data Fields | |
semc_dqs_mode_t | dqsMode |
Dummy read strobe mode: use enum in "semc_dqs_mode_t". More... | |
uint8_t | cmdTimeoutCycles |
Command execution timeout cycles. More... | |
uint8_t | busTimeoutCycles |
Bus timeout cycles. More... | |
semc_axi_queueweight_t | queueWeight |
AXI queue weight. More... | |
semc_dqs_mode_t semc_config_t::dqsMode |
uint8_t semc_config_t::cmdTimeoutCycles |
uint8_t semc_config_t::busTimeoutCycles |
semc_axi_queueweight_t semc_config_t::queueWeight |
#define FSL_SEMC_DRIVER_VERSION (MAKE_VERSION(2, 1, 0)) |
anonymous enum |
enum semc_mem_type_t |
enum semc_sdram_cs_t |
enum semc_refresh_time_t |
enum semc_caslatency_t |
enum sem_nand_burst_len_t |
enum sem_dbi_burst_len_t |
enum semc_iomux_pin |
enum smec_port_size_t |
enum semc_addr_mode_t |
enum semc_dqs_mode_t |
enum semc_adv_polarity_t |
enum semc_rdy_polarity_t |
enum semc_ipcmd_nor_dbi_t |
enum semc_ipcmd_sram_t |
enum semc_ipcmd_sdram_t |
void SEMC_GetDefaultConfig | ( | semc_config_t * | config | ) |
The purpose of this API is to get the default SEMC configure structure for SEMC_Init(). User may use the initialized structure unchanged in SEMC_Init(), or modify some fields of the structure before calling SEMC_Init(). Example:
config | The SEMC configuration structure pointer. |
void SEMC_Init | ( | SEMC_Type * | base, |
semc_config_t * | configure | ||
) |
This function ungates the SEMC clock and initializes SEMC. This function must be called before calling any other SEMC driver functions.
base | SEMC peripheral base address. |
configure | The SEMC configuration structure pointer. |
void SEMC_Deinit | ( | SEMC_Type * | base | ) |
This function gates the SEMC clock. As a result, the SEMC module doesn't work after calling this function, for some IDE, calling this API may cause the next downloading operation failed. so, please call this API cautiously. Additional, users can using "#define FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL (1)" to disable the clock control operation in drivers.
base | SEMC peripheral base address. |
status_t SEMC_ConfigureSDRAM | ( | SEMC_Type * | base, |
semc_sdram_cs_t | cs, | ||
semc_sdram_config_t * | config, | ||
uint32_t | clkSrc_Hz | ||
) |
base | SEMC peripheral base address. |
cs | The chip selection. |
config | The sdram configuration. |
clkSrc_Hz | The SEMC clock frequency. |
status_t SEMC_ConfigureNAND | ( | SEMC_Type * | base, |
semc_nand_config_t * | config, | ||
uint32_t | clkSrc_Hz | ||
) |
base | SEMC peripheral base address. |
config | The nand configuration. |
clkSrc_Hz | The SEMC clock frequency. |
status_t SEMC_ConfigureNOR | ( | SEMC_Type * | base, |
semc_nor_config_t * | config, | ||
uint32_t | clkSrc_Hz | ||
) |
base | SEMC peripheral base address. |
config | The nor configuration. |
clkSrc_Hz | The SEMC clock frequency. |
status_t SEMC_ConfigureSRAM | ( | SEMC_Type * | base, |
semc_sram_config_t * | config, | ||
uint32_t | clkSrc_Hz | ||
) |
base | SEMC peripheral base address. |
config | The sram configuration. |
clkSrc_Hz | The SEMC clock frequency. |
status_t SEMC_ConfigureDBI | ( | SEMC_Type * | base, |
semc_dbi_config_t * | config, | ||
uint32_t | clkSrc_Hz | ||
) |
base | SEMC peripheral base address. |
config | The dbi configuration. |
clkSrc_Hz | The SEMC clock frequency. |
|
inlinestatic |
This function enables the SEMC interrupts according to the provided mask. The mask is a logical OR of enumeration members. See semc_interrupt_enable_t. For example, to enable the IP command done and error interrupt, do the following.
base | SEMC peripheral base address. |
mask | SEMC interrupts to enable. This is a logical OR of the enumeration :: semc_interrupt_enable_t. |
|
inlinestatic |
This function disables the SEMC interrupts according to the provided mask. The mask is a logical OR of enumeration members. See semc_interrupt_enable_t. For example, to disable the IP command done and error interrupt, do the following.
base | SEMC peripheral base address. |
mask | SEMC interrupts to disable. This is a logical OR of the enumeration :: semc_interrupt_enable_t. |
|
inlinestatic |
This function gets the SEMC interrupts event status. User can use the a logical OR of enumeration member as a mask. See semc_interrupt_enable_t.
base | SEMC peripheral base address. |
|
inlinestatic |
The following status register flags can be cleared SEMC interrupt status.
base | SEMC base pointer |
mask | The status flag mask, a logical OR of enumeration member semc_interrupt_enable_t. |
|
inlinestatic |
base | SEMC peripheral base address. |
status_t SEMC_SendIPCommand | ( | SEMC_Type * | base, |
semc_mem_type_t | type, | ||
uint32_t | address, | ||
uint32_t | command, | ||
uint32_t | write, | ||
uint32_t * | read | ||
) |
base | SEMC peripheral base address. |
type | SEMC memory type. refer to "semc_mem_type_t" |
address | SEMC device address. |
command | SEMC IP command. For NAND device, we should use the SEMC_BuildNandIPCommand to get the right nand command. For NOR/DBI device, take refer to "semc_ipcmd_nor_dbi_t". For SRAM device, take refer to "semc_ipcmd_sram_t". For SDRAM device, take refer to "semc_ipcmd_sdram_t". |
write | Data for write access. |
read | Data pointer for read data out. |
|
inlinestatic |
This function build SEMC NAND IP command. The command is build of user command code, SEMC address mode and SEMC command mode.
userCommand | NAND device normal command. |
addrMode | NAND address mode. Refer to "semc_ipcmd_nand_addrmode_t". |
cmdMode | NAND command mode. Refer to "semc_ipcmd_nand_cmdmode_t". |
|
inlinestatic |
base | SEMC peripheral base address. |
status_t SEMC_IPCommandNandWrite | ( | SEMC_Type * | base, |
uint32_t | address, | ||
uint8_t * | data, | ||
uint32_t | size_bytes | ||
) |
base | SEMC peripheral base address. |
address | SEMC NAND device address. |
data | Data for write access. |
size_bytes | Data length. |
status_t SEMC_IPCommandNandRead | ( | SEMC_Type * | base, |
uint32_t | address, | ||
uint8_t * | data, | ||
uint32_t | size_bytes | ||
) |
base | SEMC peripheral base address. |
address | SEMC NAND device address. |
data | Data pointer for data read out. |
size_bytes | Data length. |
status_t SEMC_IPCommandNorWrite | ( | SEMC_Type * | base, |
uint32_t | address, | ||
uint8_t * | data, | ||
uint32_t | size_bytes | ||
) |
base | SEMC peripheral base address. |
address | SEMC NOR device address. |
data | Data for write access. |
size_bytes | Data length. |
status_t SEMC_IPCommandNorRead | ( | SEMC_Type * | base, |
uint32_t | address, | ||
uint8_t * | data, | ||
uint32_t | size_bytes | ||
) |
base | SEMC peripheral base address. |
address | SEMC NOR device address. |
data | Data pointer for data read out. |
size_bytes | Data length. |