GPC: General Power Controller Driver

Overview

The MCUXpresso SDK provides a peripheral driver for the General Power Controller (GPC) module of MCUXpresso SDK devices.

API functions are provided to configure the system about working in dedicated power mode. There are mainly about enabling the power for memory, enabling the wakeup sources for STOP modes, and power up/down operations for various peripherals.

Functions
void	GPC_EnableIRQ (GPC_Type *base, uint32_t irqId)
	Enable the IRQ. More...
void	GPC_DisableIRQ (GPC_Type *base, uint32_t irqId)
	Disable the IRQ. More...
bool	GPC_GetIRQStatusFlag (GPC_Type *base, uint32_t irqId)
	Get the IRQ/Event flag. More...
static void	GPC_RequestPdram0PowerDown (GPC_Type *base, bool enable)
	FLEXRAM PDRAM0 Power Gate Enable. More...
static void	GPC_RequestMEGAPowerOn (GPC_Type *base, bool enable)
	Requests the MEGA power switch sequence. More...

Driver version
#define	FSL_GPC_DRIVER_VERSION   (MAKE_VERSION(2, 1, 1))
	GPC driver version 2.1.1. More...

Macro Definition Documentation

#define FSL_GPC_DRIVER_VERSION   (MAKE_VERSION(2, 1, 1))

Function Documentation

void GPC_EnableIRQ	(	GPC_Type *	base,
		uint32_t	irqId
	)

Parameters

base	GPC peripheral base address.
irqId	ID number of IRQ to be enabled, available range is 32-159. 0-31 is available in some platforms.

void GPC_DisableIRQ	(	GPC_Type *	base,
		uint32_t	irqId
	)

Parameters

base	GPC peripheral base address.
irqId	ID number of IRQ to be disabled, available range is 32-159. 0-31 is available in some platforms.

bool GPC_GetIRQStatusFlag	(	GPC_Type *	base,
		uint32_t	irqId
	)

Parameters

base	GPC peripheral base address.
irqId	ID number of IRQ to be enabled, available range is 32-159. 0-31 is available in some platforms.

Returns

Indicated IRQ/Event is asserted or not.

static void GPC_RequestPdram0PowerDown ( GPC_Type *  base, bool  enable  )

inlinestatic

This function configures the FLEXRAM PDRAM0 if it will keep power when cpu core is power down. When the PDRAM0 Power is 1, PDRAM0 will be power down once when CPU core is power down. When the PDRAM0 Power is 0, PDRAM0 will keep power on even if CPU core is power down. When CPU core is re-power up, the default setting is 1.

Parameters

base	GPC peripheral base address.
enable	Enable the request or not.

static void GPC_RequestMEGAPowerOn ( GPC_Type *  base, bool  enable  )

inlinestatic

Parameters

base	GPC peripheral base address.
enable	Enable the power on sequence, or the power down sequence.