The MCUXpresso SDK provides driver for the Memory-Mapped Divide and Square Root (MMDVSQ) module of MCUXpresso SDK devices.
ARM processor cores in the Cortex-M family implementing the ARMv6-M instruction set architecture do not include hardware support for integer division operations. However, in certain deeply-embedded application spaces, hardware support for this class of arithmetic operations along with an unsigned square root function is important to maximize the system performance and minimize the device power dissipation. Accordingly, the MMDVSQ module is included to serve as a memory-mapped co-processor located in a special address space within the system memory map accessible only to the processor core. The MMDVSQ module supports execution of the integer division operations defined in the ARMv7-M instruction set architecture plus an unsigned integer square root operation. The supported integer division operations include 32/32 signed (SDIV) and unsigned (UDIV) calculations.
Function groups
MMDVSQ functional Operation
This group implements the MMDVSQ functional API.
MMDVSQ status Operation
This group implements the MMDVSQ status API.
Typical use case and example
Example: Refer to the driver examples codes located at <SDK_ROOT>/boards/<BOARD>/driver_examples/mmdvsq
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int32_t | MMDVSQ_GetDivideRemainder (MMDVSQ_Type *base, int32_t dividend, int32_t divisor, bool isUnsigned) |
| Performs the MMDVSQ division operation and returns the remainder. More...
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int32_t | MMDVSQ_GetDivideQuotient (MMDVSQ_Type *base, int32_t dividend, int32_t divisor, bool isUnsigned) |
| Performs the MMDVSQ division operation and returns the quotient. More...
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uint16_t | MMDVSQ_Sqrt (MMDVSQ_Type *base, uint32_t radicand) |
| Performs the MMDVSQ square root operation. More...
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#define FSL_MMSVSQ_DRIVER_VERSION (MAKE_VERSION(2, 0, 2)) |
Enumerator |
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kMMDVSQ_IdleSquareRoot |
MMDVSQ is idle; the last calculation was a square root.
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kMMDVSQ_IdleDivide |
MMDVSQ is idle; the last calculation was division.
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kMMDVSQ_BusySquareRoot |
MMDVSQ is busy processing a square root calculation.
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kMMDVSQ_BusyDivide |
MMDVSQ is busy processing a division calculation.
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Enumerator |
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kMMDVSQ_EnableFastStart |
Division operation is initiated by a write to the DSOR register.
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kMMDVSQ_DisableFastStart |
Division operation is initiated by a write to CSR[SRT] = 1; normal start instead fast start.
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int32_t MMDVSQ_GetDivideRemainder |
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MMDVSQ_Type * |
base, |
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int32_t |
dividend, |
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int32_t |
divisor, |
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bool |
isUnsigned |
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) |
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- Parameters
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base | MMDVSQ peripheral address |
dividend | Dividend value |
divisor | Divisor value |
isUnsigned | Mode of unsigned divide
- true unsigned divide
- false signed divide
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int32_t MMDVSQ_GetDivideQuotient |
( |
MMDVSQ_Type * |
base, |
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int32_t |
dividend, |
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int32_t |
divisor, |
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bool |
isUnsigned |
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) |
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- Parameters
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base | MMDVSQ peripheral address |
dividend | Dividend value |
divisor | Divisor value |
isUnsigned | Mode of unsigned divide
- true unsigned divide
- false signed divide
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uint16_t MMDVSQ_Sqrt |
( |
MMDVSQ_Type * |
base, |
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uint32_t |
radicand |
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) |
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This function performs the MMDVSQ square root operation and returns the square root result of a given radicand value.
- Parameters
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base | MMDVSQ peripheral address |
radicand | Radicand value |
This function checks the current MMDVSQ execution status of the combined CSR[BUSY, DIV, SQRT] indicators.
- Parameters
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base | MMDVSQ peripheral address |
- Returns
- Current MMDVSQ execution status
This function sets the MMDVSQ division fast start. The MMDVSQ supports two mechanisms for initiating a division operation. The default mechanism is a “fast start” where a write to the DSOR register begins the division. Alternatively, the start mechanism can begin after a write to the CSR register with CSR[SRT] set.
- Parameters
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base | MMDVSQ peripheral address |
mode | Mode of Divide-Fast-Start
- kMmdvsqDivideFastStart = 0
- kMmdvsqDivideNormalStart = 1
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static void MMDVSQ_SetDivideByZeroConfig |
( |
MMDVSQ_Type * |
base, |
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bool |
isDivByZero |
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) |
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inlinestatic |
This function configures the MMDVSQ response to divide-by-zero calculations. If both CSR[DZ] and CSR[DZE] are set, then a subsequent read of the RES register is error-terminated to signal the processor of the attempted divide-by-zero. Otherwise, the register contents are returned.
- Parameters
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base | MMDVSQ peripheral address |
isDivByZero | Mode of Divide-By-Zero
- kMmdvsqDivideByZeroDis = 0
- kMmdvsqDivideByZeroEn = 1
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