MCUXpresso SDK API Reference Manual  Rev. 0
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OCOTP: On Chip One-Time Programmable controller.

Overview

The MCUXpresso SDK provides a peripheral driver for the OCOTP module of MCUXpresso SDK devices.

This section contains information describing the requirements for the on-chip eFuse OTP controller along with details about the block functionality and implementation.

OCOTP function group

The OCOTP driver support operaing API to allow read and write the fuse map.

Initialization and de-initialization

The funciton OCOTP_Init() is to initialize the OCOTP with peripheral base address and source clock frequency.

The function OCOTP_Deinit() is to de-initialize the OCOTP controller with peripheral base address.

Read and Write operation

The function OCOTP_ReloadShadowRegister() is to reload the value from the fuse map. this API should be called firstly before reading the register.

The OCOTP_ReadFuseShadowRegister() is to read the value from a given address, if operation is success, a known value will be return, othwise, a value of 0xBADABADA will be returned.

The function OCOTP_WriteFuseShadowRegister() will write a specific value to a known address. please check the return status o make sure whether the access to register is success.

OCOTP example

This example shows how to get the controller version using API. Due to the eFuse is One-Time programmable, example will only print the information of OCOTP controller version. If more operations are needed, please using the API to implement the write and read operation.

Refer to the driver examples codes located at <SDK_ROOT>/boards/<BOARD>/driver_examples/ocotp

Data Structures

struct  ocotp_timing_t
 OCOTP timing structure. More...
 

Enumerations

enum  _ocotp_status {
  kStatus_OCOTP_AccessError = MAKE_STATUS(kStatusGroup_SDK_OCOTP, 0),
  kStatus_OCOTP_CrcFail = MAKE_STATUS(kStatusGroup_SDK_OCOTP, 1)
}
 Error codes for the OCOTP driver. More...
 

Functions

void OCOTP_Init (OCOTP_Type *base, uint32_t srcClock_Hz)
 Initializes OCOTP controller. More...
 
void OCOTP_Deinit (OCOTP_Type *base)
 De-initializes OCOTP controller. More...
 
static bool OCOTP_CheckBusyStatus (OCOTP_Type *base)
 Checking the BUSY bit in CTRL register. More...
 
static bool OCOTP_CheckErrorStatus (OCOTP_Type *base)
 Checking the ERROR bit in CTRL register. More...
 
static void OCOTP_ClearErrorStatus (OCOTP_Type *base)
 Clear the error bit if this bit is set. More...
 
void OCOTP_ReloadShadowRegister (OCOTP_Type *base)
 Reload the shadow register. More...
 
uint32_t OCOTP_ReadFuseShadowRegister (OCOTP_Type *base, uint32_t address)
 Read the fuse shadow register with the fuse addess. More...
 
status_t OCOTP_WriteFuseShadowRegister (OCOTP_Type *base, uint32_t address, uint32_t data)
 Write the fuse shadow register with the fuse addess and data. More...
 
static uint32_t OCOTP_GetVersion (OCOTP_Type *base)
 Get the OCOTP controller version from the register. More...
 

Driver version

#define FSL_OCOTP_DRIVER_VERSION   (MAKE_VERSION(2, 0, 1))
 OCOTP driver version 2.0.1.
 

Data Structure Documentation

struct ocotp_timing_t

Note that, these value are used for calcalating the read/write timings. And the values should statisfy below rules:

Tsp_rd=(WAIT+1)/ipg_clk_freq should be >= 150ns; Tsp_pgm=(RELAX+1)/ipg_clk_freq should be >= 100ns; Trd = ((STROBE_READ+1)- 2*(RELAX_READ+1)) /ipg_clk_freq, The Trd is required to be larger than 40 ns. Tpgm = ((STROBE_PROG+1)- 2*(RELAX_PROG+1)) /ipg_clk_freq; The Tpgm should be configured within the range of 9000 ns < Tpgm < 11000 ns;

Data Fields

uint32_t wait
 Wait time value to fill in the TIMING register. More...
 
uint32_t relax
 Relax time value to fill in the TIMING register. More...
 
uint32_t strobe_prog
 Storbe program time value to fill in the TIMING register. More...
 
uint32_t strobe_read
 Storbe read time value to fill in the TIMING register. More...
 

Field Documentation

uint32_t ocotp_timing_t::wait
uint32_t ocotp_timing_t::relax
uint32_t ocotp_timing_t::strobe_prog
uint32_t ocotp_timing_t::strobe_read

Enumeration Type Documentation

Enumerator
kStatus_OCOTP_AccessError 

eFuse and shadow register access error.

kStatus_OCOTP_CrcFail 

CRC check failed.

Function Documentation

void OCOTP_Init ( OCOTP_Type *  base,
uint32_t  srcClock_Hz 
)
Parameters
baseOCOTP peripheral base address.
srcClock_Hzsource clock frequency in unit of Hz.
void OCOTP_Deinit ( OCOTP_Type *  base)
Return values
kStatus_Successupon successful execution, error status otherwise.
static bool OCOTP_CheckBusyStatus ( OCOTP_Type *  base)
inlinestatic

Checking this BUSY bit will help confirm if the OCOTP controller is ready for access.

Parameters
baseOCOTP peripheral base address.
Return values
truefor bit set and false for cleared.
static bool OCOTP_CheckErrorStatus ( OCOTP_Type *  base)
inlinestatic
Parameters
baseOCOTP peripheral base address.
Return values
truefor bit set and false for cleared.
static void OCOTP_ClearErrorStatus ( OCOTP_Type *  base)
inlinestatic
Parameters
baseOCOTP peripheral base address.
void OCOTP_ReloadShadowRegister ( OCOTP_Type *  base)

This function will help reload the shadow register without reseting the OCOTP module. Please make sure the OCOTP has been initialized before calling this API.

Parameters
baseOCOTP peripheral base addess.
uint32_t OCOTP_ReadFuseShadowRegister ( OCOTP_Type *  base,
uint32_t  address 
)
Parameters
baseOCOTP peripheral base address.
addressthe fuse address to be read from.
status_t OCOTP_WriteFuseShadowRegister ( OCOTP_Type *  base,
uint32_t  address,
uint32_t  data 
)

Please make sure the wrtie address is not locked while calling this API.

Parameters
baseOCOTP peripheral base address.
addressthe fuse address to be written.
datathe value will be writen to fuse address.
Return values
writestatus, kStatus_Success for success and kStatus_Fail for failed.
static uint32_t OCOTP_GetVersion ( OCOTP_Type *  base)
inlinestatic
Parameters
baseOCOTP peripheral base address.
Return values
returnthe version value.