The MCUXpresso SDK provides a driver for the FLEXRAM module of MCUXpresso SDK devices.
The FLEXRAM module intergrates the ITCM, DTCM, and OCRAM controllers, and supports parameterized RAM array and RAM array portioning.
This example code shows how to allocate RAM using the FLEXRAM driver.
Refer to the driver examples codes located at <SDK_ROOT>/boards/<BOARD>/driver_examples/flexram.
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enum | {
kFLEXRAM_Read = 0U,
kFLEXRAM_Write = 1U
} |
| Flexram write/read selection. More...
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enum | {
kFLEXRAM_OCRAMAccessError = FLEXRAM_INT_STATUS_OCRAM_ERR_STATUS_MASK,
kFLEXRAM_DTCMAccessError = FLEXRAM_INT_STATUS_DTCM_ERR_STATUS_MASK,
kFLEXRAM_ITCMAccessError = FLEXRAM_INT_STATUS_ITCM_ERR_STATUS_MASK,
kFLEXRAM_OCRAMMagicAddrMatch = FLEXRAM_INT_STATUS_OCRAM_MAM_STATUS_MASK,
kFLEXRAM_DTCMMagicAddrMatch = FLEXRAM_INT_STATUS_DTCM_MAM_STATUS_MASK,
kFLEXRAM_ITCMMagicAddrMatch = FLEXRAM_INT_STATUS_ITCM_MAM_STATUS_MASK,
kFLEXRAM_InterruptStatusAll
} |
| Interrupt status flag mask. More...
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enum | flexram_tcm_access_mode_t {
kFLEXRAM_TCMAccessFastMode = 0U,
kFLEXRAM_TCMAccessWaitMode = 1U
} |
| FLEXRAM TCM access mode. More...
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enum | {
kFLEXRAM_TCMSize32KB = 32 * 1024U,
kFLEXRAM_TCMSize64KB = 64 * 1024U,
kFLEXRAM_TCMSize128KB = 128 * 1024U,
kFLEXRAM_TCMSize256KB = 256 * 1024U,
kFLEXRAM_TCMSize512KB = 512 * 1024U
} |
| FLEXRAM TCM support size. More...
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#define FSL_FLEXRAM_DRIVER_VERSION (MAKE_VERSION(2U, 0U, 7U)) |
Enumerator |
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kFLEXRAM_Read |
read
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kFLEXRAM_Write |
write
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Enumerator |
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kFLEXRAM_OCRAMAccessError |
OCRAM accesses unallocated address.
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kFLEXRAM_DTCMAccessError |
DTCM accesses unallocated address.
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kFLEXRAM_ITCMAccessError |
ITCM accesses unallocated address.
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kFLEXRAM_OCRAMMagicAddrMatch |
OCRAM magic address match.
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kFLEXRAM_DTCMMagicAddrMatch |
DTCM magic address match.
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kFLEXRAM_ITCMMagicAddrMatch |
ITCM magic address match.
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kFLEXRAM_InterruptStatusAll |
all the interrupt status mask
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Fast access mode expected to be finished in 1-cycle; Wait access mode expected to be finished in 2-cycle. Wait access mode is a feature of the flexram and it should be used when the CPU clock is too fast to finish TCM access in 1-cycle. Normally, fast mode is the default mode, the efficiency of the TCM access will better.
Enumerator |
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kFLEXRAM_TCMAccessFastMode |
fast access mode
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kFLEXRAM_TCMAccessWaitMode |
wait access mode
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Enumerator |
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kFLEXRAM_TCMSize32KB |
TCM total size be 32KB.
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kFLEXRAM_TCMSize64KB |
TCM total size be 64KB.
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kFLEXRAM_TCMSize128KB |
TCM total size be 128KB.
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kFLEXRAM_TCMSize256KB |
TCM total size be 256KB.
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kFLEXRAM_TCMSize512KB |
TCM total size be 512KB.
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void FLEXRAM_Init |
( |
FLEXRAM_Type * |
base | ) |
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- Parameters
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base | FLEXRAM base address. |
static uint32_t FLEXRAM_GetInterruptStatus |
( |
FLEXRAM_Type * |
base | ) |
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inlinestatic |
- Parameters
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base | FLEXRAM base address. |
static void FLEXRAM_ClearInterruptStatus |
( |
FLEXRAM_Type * |
base, |
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uint32_t |
status |
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) |
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inlinestatic |
- Parameters
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base | FLEXRAM base address. |
status | Status to be cleared. |
static void FLEXRAM_EnableInterruptStatus |
( |
FLEXRAM_Type * |
base, |
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uint32_t |
status |
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) |
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inlinestatic |
- Parameters
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base | FLEXRAM base address. |
status | Status to be enabled. |
static void FLEXRAM_DisableInterruptStatus |
( |
FLEXRAM_Type * |
base, |
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uint32_t |
status |
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) |
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inlinestatic |
- Parameters
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base | FLEXRAM base address. |
status | Status to be disabled. |
static void FLEXRAM_EnableInterruptSignal |
( |
FLEXRAM_Type * |
base, |
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uint32_t |
status |
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) |
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inlinestatic |
- Parameters
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base | FLEXRAM base address. |
status | Status interrupt to be enabled. |
static void FLEXRAM_DisableInterruptSignal |
( |
FLEXRAM_Type * |
base, |
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uint32_t |
status |
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) |
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inlinestatic |
- Parameters
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base | FLEXRAM base address. |
status | Status interrupt to be disabled. |
- Parameters
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base | FLEXRAM base address. |
mode | Access mode. |
- Parameters
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base | FLEXRAM base address. |
mode | Access mode. |
static void FLEXRAM_EnableForceRamClockOn |
( |
FLEXRAM_Type * |
base, |
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bool |
enable |
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) |
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inlinestatic |
- Parameters
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base | FLEXRAM base address. |
enable | Enable or disable clock force on. |
static void FLEXRAM_SetOCRAMMagicAddr |
( |
FLEXRAM_Type * |
base, |
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uint16_t |
magicAddr, |
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uint32_t |
rwSel |
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) |
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inlinestatic |
When read/write access hit magic address, it will generate interrupt.
- Parameters
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base | FLEXRAM base address. |
magicAddr | Magic address, the actual address bits [18:3] is corresponding to the register field [16:1]. |
rwSel | Read/write selection. 0 for read access while 1 for write access. |
static void FLEXRAM_SetDTCMMagicAddr |
( |
FLEXRAM_Type * |
base, |
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uint16_t |
magicAddr, |
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uint32_t |
rwSel |
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) |
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inlinestatic |
When read/write access hits magic address, it will generate interrupt.
- Parameters
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base | FLEXRAM base address. |
magicAddr | Magic address, the actual address bits [18:3] is corresponding to the register field [16:1]. |
rwSel | Read/write selection. 0 for read access while 1 write access. |
static void FLEXRAM_SetITCMMagicAddr |
( |
FLEXRAM_Type * |
base, |
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uint16_t |
magicAddr, |
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uint32_t |
rwSel |
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) |
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inlinestatic |
When read/write access hits magic address, it will generate interrupt.
- Parameters
-
base | FLEXRAM base address. |
magicAddr | Magic address, the actual address bits [18:3] is corresponding to the register field [16:1]. |
rwSel | Read/write selection. 0 for read access while 1 for write access. |