MCUXpresso SDK API Reference Manual  Rev. 0
NXP Semiconductors
 All Data Structures Functions Variables Typedefs Enumerations Enumerator Groups Pages
Clock Driver

Read Guidance

The clock module is used to help software to configure the MCU OCCS and relevant field in SIM module, to provide proper clock to MCU core and its peripherals.

Driver Overview

 Driver Change Log
 Current CLOCK driver version is 2.0.0.
 

Data Structures

struct  clock_protection_config_t
 Clock register protection configuration. More...
 
struct  clock_output_config_t
 Clock output configuration. More...
 
struct  clock_config_t
 mcu clock configuration structure. More...
 

Macros

#define FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL   0
 Configure whether driver controls clock. More...
 
#define SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY   (100000000UL)
 Definition for delay API in clock driver, users can redefine it. More...
 
#define GPIO_CLOCKS
 Clock ip name array for GPIO. More...
 
#define TMR_CLOCKS
 Clock ip name array for quad timer. More...
 
#define LPI2C_CLOCKS
 Clock ip name array for LPI2C. More...
 
#define QSPI_CLOCKS
 Clock ip name array for queued SPI. More...
 
#define QSCI_CLOCKS
 Clock ip name array for queued SCI. More...
 
#define DAC_CLOCKS
 Clock ip name array for DAC. More...
 
#define PIT_CLOCKS
 Clock ip name array for PIT. More...
 
#define QDC_CLOCKS
 Clock ip name array for QDC. More...
 
#define CRC_CLOCKS
 Clock ip name array for CRC. More...
 
#define CADC_CLOCKS
 Clock ip name array for cyclic ADC. More...
 
#define CMP_CLOCKS
 Clock ip name array for CMP. More...
 
#define PWM_CLOCKS
 Clock ip name array for PWM. More...
 
#define ROM_CLOCKS
 Clock ip name array for ROM. More...
 
#define OPAMP_CLOCKS
 Clock ip name array for OPAMP. More...
 
#define DSASS_CLOCKS
 Clock ip name array for DSASS. More...
 
#define EDMA_CLOCKS
 Clock ip name array for EDMA. More...
 
#define EWM_CLOCKS
 Clock ip name array for EWM. More...
 
#define XBARA_CLOCKS
 Clock ip name array for XBARA. More...
 

Enumerations

enum  clock_ip_name_t {
  kCLOCK_GPIOF = 1U,
  kCLOCK_GPIOE = 2U,
  kCLOCK_GPIOD = 3U,
  kCLOCK_GPIOC = 4U,
  kCLOCK_GPIOB = 5U,
  kCLOCK_GPIOA = 6U,
  kCLOCK_TA3 = 12U,
  kCLOCK_TA2 = 13U,
  kCLOCK_TA1 = 14U,
  kCLOCK_TA0 = 15U,
  kCLOCK_LPI2C0 = 21U,
  kCLOCK_LPI2C1 = 22U,
  kCLOCK_QSPI0 = 25U,
  kCLOCK_QSCI1 = 27U,
  kCLOCK_QSCI0 = 28U,
  kCLOCK_DAC = 29U,
  kCLOCK_PIT1 = 34U,
  kCLOCK_PIT0 = 35U,
  kCLOCK_QDC = 36U,
  kCLOCK_CRC = 37U,
  kCLOCK_CYCADC = 39U,
  kCLOCK_CMPD = 41U,
  kCLOCK_CMPC = 42U,
  kCLOCK_CMPB = 43U,
  kCLOCK_CMPA = 44U,
  kCLOCK_PWMACH3 = 52U,
  kCLOCK_PWMACH2 = 53U,
  kCLOCK_PWMACH1 = 54U,
  kCLOCK_PWMACH0 = 55U,
  kCLOCK_ROM = 57U,
  kCLOCK_OPAMPB = 58U,
  kCLOCK_OPAMPA = 59U,
  kCLOCK_DSASS = 60U,
  kCLOCK_NOGATE = 61U ,
  kCLOCK_NUM = 62U
}
 List of IP clock name. More...
 
enum  clock_name_t {
  kCLOCK_Mstr2xClk = 0,
  kCLOCK_SysClk = 1,
  kCLOCK_BusClk = 2,
  kCLOCK_Bus2xClk = 3,
  kCLOCK_FlashClk = 4,
  kCLOCK_FastIrcClk = 10,
  kCLOCK_SlowIrcClk = 11,
  kCLOCK_CrystalOscClk = 12,
  kCLOCK_ExtClk = 20,
  kCLOCK_MstrOscClk = 21,
  kCLOCK_PllDiv2Clk = 22
}
 List of system-level clock name. More...
 
enum  clock_crystal_osc_mode_t {
  kCLOCK_CrystalOscModeFSP = 0,
  kCLOCK_CrystalOscModeLCP = 1
}
 Crystal oscillator mode. More...
 
enum  clock_ext_clk_src_t {
  kCLOCK_ExtClkSrcCrystalOsc = 0,
  kCLOCK_ExtClkSrcClkin = 1
}
 List of external clock source. More...
 
enum  clock_ext_clkin_sel_t {
  kCLOCK_SelClkIn0 = 0,
  kCLOCK_SelClkIn1 = 1
}
 List of clock-in source. More...
 
enum  clock_mstr_osc_clk_src_t {
  kCLOCK_MstrOscClkSrcFirc = 0U,
  kCLOCK_MstrOscClkSrcExt = 1U,
  kCLOCK_MstrOscClkSrcSirc = 2U
}
 List of master oscillator source. More...
 
enum  clock_mstr_2x_clk_src_t {
  kCLOCK_Mstr2xClkSrcMstrOsc = 0U,
  kCLOCK_Mstr2xClkSrcPllDiv2 = 1U
}
 List of master 2x clock source. More...
 
enum  clock_output_clk_src_t {
  kCLOCK_OutputClkSrc_Sys = 0U,
  kCLOCK_OutputClkSrc_Mstr2x = 1U,
  kCLOCK_OutputClkSrc_BusDiv2 = 2U,
  kCLOCK_OutputClkSrc_MstrOSC = 3U,
  kCLOCK_OutputClkSrc_Firc = 4U,
  kCLOCK_OutputClkSrc_Sirc = 5U
}
 List of output clock source. More...
 
enum  clock_output_clk_div_t {
  kCLOCK_OutputDiv1 = 0U,
  kCLOCK_OutputDiv2 = 1U,
  kCLOCK_OutputDiv4 = 2U,
  kCLOCK_OutputDiv8 = 3U,
  kCLOCK_OutputDiv16 = 4U,
  kCLOCK_OutputDiv32 = 5U,
  kCLOCK_OutputDiv64 = 6U,
  kCLOCK_OutputDiv128 = 7U
}
 List of output clock divider. More...
 
enum  clock_protection_t {
  kCLOCK_Protection_Off = 0U,
  kCLOCK_Protection_On = 1U,
  kCLOCK_Protection_OffLock = 2U,
  kCLOCK_Protection_OnLock = 3U
}
 List of clock register protection mode. More...
 
enum  clock_ip_clk_src_t {
  kCLOCK_IPClkSrc_BusClk = 0U,
  kCLOCK_IPClkSrc_Bus2xClk = 1U
}
 List of specific IP's clock source. More...
 
enum  clock_firc_sel_t {
  kCLOCK_FircSel_8M = 0,
  kCLOCK_FircSel_2M = 1
}
 Fast IRC selection. More...
 
enum  clock_mode_t {
  kCLOCK_Mode_Normal = 0,
  kCLOCK_Mode_Fast = 1
}
 MCU working mode selection. More...
 
enum  clock_postscale_t {
  kCLOCK_PostscaleDiv1 = 0,
  kCLOCK_PostscaleDiv2 = 1,
  kCLOCK_PostscaleDiv4 = 2,
  kCLOCK_PostscaleDiv8 = 3,
  kCLOCK_PostscaleDiv16 = 4,
  kCLOCK_PostscaleDiv32 = 5,
  kCLOCK_PostscaleDiv64 = 6,
  kCLOCK_PostscaleDiv128 = 7,
  kCLOCK_PostscaleDiv256 = 8
}
 Mstr 2x clock postscale divider. More...
 
enum  clock_pll_monitor_type_t {
  kCLOCK_PllMonitorUnLockCoarse,
  kCLOCK_PllMonitorUnLockFine,
  kCLOCK_PllMonitorLostofReferClk,
  kCLOCK_PllMonitorAll
}
 PLL monitor type structure. More...
 
enum  pit_count_clock_source_t {
  kPIT_CountClockSource0 = 0U,
  kPIT_CountClockSource1 = 1U,
  kPIT_CountClockSource2 = 2U,
  kPIT_CountClockSource3 = 3U,
  kPIT_CountBusClk = kPIT_CountClockSource0,
  kPIT_CountCrystalOscClk = kPIT_CountClockSource1,
  kPIT_CountFircClk = kPIT_CountClockSource2,
  kPIT_CountSircClk = kPIT_CountClockSource3
}
 Describes PIT clock source. More...
 
enum  ewm_lpo_clock_source_t {
  kEWM_LpoClockSource0 = 0U,
  kEWM_LpoClockSource1 = 1U,
  kEWM_LpoClockSource2 = 2U,
  kEWM_LpoClockSource3 = 3U,
  kEWM_Lpo8MHz2MHzIRCClock = kEWM_LpoClockSource0,
  kEWM_LpoCrystalClock = kEWM_LpoClockSource1,
  kEWM_LpoBusClock = kEWM_LpoClockSource2,
  kEWM_Lpo200KHzIRCClock = kEWM_LpoClockSource3
}
 Describes EWM clock source. More...
 

Functions

static void CLOCK_EnableClock (clock_ip_name_t eIpClkName)
 Enable IPs clock. More...
 
static void CLOCK_DisableClock (clock_ip_name_t eIpClkName)
 Disable IPs clock. More...
 
static void CLOCK_EnableClockInStopMode (clock_ip_name_t eIpClkName)
 Enable IPs clock in STOP mode. More...
 
static void CLOCK_DisableClockInStopMode (clock_ip_name_t eIpClkName)
 Disable IPs clock in STOP mode. More...
 
static void CLOCK_ConfigQsciClockSrc (clock_ip_name_t eQsciClkName, clock_ip_clk_src_t eClkSrc)
 Configure QSCI clock source. More...
 
static void CLOCK_ConfigQtimerClockSrc (clock_ip_clk_src_t eClkSrc)
 Configure Qtimer clock source. More...
 
static void CLOCK_ConfigPWMClockSrc (clock_ip_clk_src_t eClkSrc)
 Configure PWM clock source. More...
 
static void CLOCK_ConfigI2cClockSrc (clock_ip_name_t eLpi2cClkName, clock_ip_clk_src_t eClkSrc)
 Configure LPI2C clock source. More...
 
static void CLOCK_ConfigQDCClockSrc (clock_ip_clk_src_t eClkSrc)
 Configure QDC clock source. More...
 
static void CLOCK_SetSlowIrcTrim (uint16_t u16Trim)
 Set trim value to 200K slow internal RC oscillator. More...
 
static void CLOCK_SetFastIrc8MTrim (uint16_t u16Trim)
 Set trim value to fast internal RC 8M oscillator. More...
 
static void CLOCK_SetFastIrc2MTrim (uint16_t u16Trim)
 Set trim value to fast internal RC 2M oscillator. More...
 
static bool CLOCK_GetCrystalOscFailureStatus (void)
 Get crystal oscillator failure status. More...
 
static void CLOCK_SetPllLossofRefererntTripPoint (uint8_t u8Trip)
 Set PLL loss of reference trip point. More...
 
static void CLOCK_ClearPLLMonitorFlag (clock_pll_monitor_type_t eType)
 Clear PLL monitor flag. More...
 
static void CLOCK_EnableFircOutput (bool bEnable)
 Enable/Disable FIRC output. More...
 
uint32_t CLOCK_GetFreq (clock_name_t eClkName)
 Get system-level clock frequency. More...
 
uint32_t CLOCK_GetIpClkSrcFreq (clock_ip_name_t eIpClkName)
 Get IP clock frequency. More...
 
void CLOCK_SetClkin0Freq (uint32_t u32Freq)
 Set Clock IN 0 frequency. More...
 
void CLOCK_SetClkin1Freq (uint32_t u32Freq)
 Set Clock IN 1 frequency. More...
 
void CLOCK_SetXtalFreq (uint32_t u32Freq)
 Set crystal oscillator frequency. More...
 
void CLOCK_SetProtectionConfig (clock_protection_config_t *psConfig)
 Config clock register access protection mode. More...
 
void CLOCK_SetOutputClockConfig (clock_output_config_t *psConfig)
 Config output clock. More...
 
void CLOCK_SetClkConfig (clock_config_t *psConfig)
 Config mcu operation clock. More...
 
void CLOCK_SetClockMode (clock_mode_t eClkMode)
 Set clock mode, normal or fast mode. More...
 
uint32_t CLOCK_EvaluateExtClkFreq (void)
 Evaluate external clock frequency and return its frequency in Hz. More...
 
void CLOCK_EnablePLLMonitorInterrupt (clock_pll_monitor_type_t eType, bool bEnable)
 Enable/Disable PLL monitor interrupt. More...
 

Driver version

#define FSL_CLOCK_DRIVER_VERSION   (MAKE_VERSION(2, 0, 0))
 CLOCK driver version 2.0.0. More...
 

Data Structure Documentation

struct clock_protection_config_t

Data Fields

clock_protection_t eFrqEP
 FRQEP bit field in OCCS PROT register, protect COD & ZSRC. More...
 
clock_protection_t eOscEP
 OSCEP bit field in OCCS PROT register, protect OSCTL1, OSCTL2, OSCTL3, OSCTL4, PRECS. More...
 
clock_protection_t ePllEP
 PLLEP bit field in OCCS PROT register, protect PLLDP, LOCIE, LORTP, PLLDB bitfield. More...
 

Field Documentation

clock_protection_t clock_protection_config_t::eFrqEP
clock_protection_t clock_protection_config_t::eOscEP
clock_protection_t clock_protection_config_t::ePllEP
struct clock_output_config_t

Data Fields

bool bClkOut0En
 Clock output 0 enable, CLKDIS0 bit field in SIM CLKOUT register.
 
bool bClkOut1En
 Clock output 1 enable, CLKDIS1 bit field in SIM CLKOUT register.
 
clock_output_clk_src_t eClkOut0Src
 Clock output 0 clock source, CLKOSEL0 bit field in SIM CLKOUT register.
 
clock_output_clk_src_t eClkOut1Src
 Clock output 1 clock source, CLKOSEL1 bit field in SIM CLKOUT register.
 
clock_output_clk_div_t eClkDiv
 Clock output divider, CLKODIV bit field in SIM CLKOUT register ,it apply to clkout0 & clkout1.
 
struct clock_config_t

This is the key configuration structure of clock driver, which define the system clock behavior. The function CLOCK_SetClkConfig deploy this configuration structure onto SOC.

Data Fields

bool bCrystalOscEnable
 Crystal oscillator enable, COPD bit field in OCCS OSCTL2 register.
 
bool bFircEnable
 Fast internal RC oscillator enable, ROPD bit field in OCCS OSCTL1 register.
 
bool bSircEnable
 Slow internal RC oscillator enable, ROPD200K bit field in OCCS OSCTL2 register.
 
bool bPllEnable
 PLL enable, PLLPD bit field in OCCS CTRL register.
 
bool bCrystalOscMonitorEnable
 Crystal oscillator monitor enable, MON_ENABLE bit field in OCCS OSCTL2 register.
 
clock_firc_sel_t eFircSel
 Fast IRC mode selection, 8M or 2M, ROSB bit field in OCCS OSCTL1 register.
 
clock_crystal_osc_mode_t eCrystalOscMode
 Crystal oscillator mode, COHL bit field in OCCS OSCTL1 register.
 
clock_ext_clk_src_t eExtClkSrc
 External clock source, EXT_SEL bit field in OCCS OSCTL1 register.
 
clock_ext_clkin_sel_t eClkInSel
 Clock IN selection(0 or 1), CLKINSEL bit field in SIM MISC0 register.
 
clock_mstr_osc_clk_src_t eMstrOscClkSrc
 Master oscillator selection, PRECS bit field in OCCS CTRL register. More...
 
clock_mstr_2x_clk_src_t eMstr2xClkSrc
 Master 2x clock selection, ZSRC bit field in OCCS CTRL register.
 
clock_postscale_t eMstr2xClkPostScale
 Master 2x clock post scale, COD bit field in OCCS DIVBY register.
 
uint32_t u32PllClkFreq
 Required PLL output frequency before divide 2.
 

Field Documentation

clock_mstr_osc_clk_src_t clock_config_t::eMstrOscClkSrc

When selected kCLOCK_MstrOscClkSrcExt, make sure corresponding pins(crystal osc or clkin pin) has been configured.

Macro Definition Documentation

#define FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL   0

When set to 0, peripheral drivers will enable clock in initialize function and disable clock in de-initialize function. When set to 1, peripheral driver will not control the clock, application could control the clock out of the driver.

Note
All drivers share this feature switcher. If it is set to 1, application should handle clock enable and disable for all drivers.
#define FSL_CLOCK_DRIVER_VERSION   (MAKE_VERSION(2, 0, 0))
#define SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY   (100000000UL)
#define GPIO_CLOCKS
Value:
{ \
}
GPIOB clock.
Definition: fsl_clock.h:77
GPIOC clock.
Definition: fsl_clock.h:76
GPIOF clock.
Definition: fsl_clock.h:73
GPIOD clock.
Definition: fsl_clock.h:75
GPIOE clock.
Definition: fsl_clock.h:74
GPIOA clock.
Definition: fsl_clock.h:78
#define TMR_CLOCKS
Value:
{ \
}
Timer A3 clock.
Definition: fsl_clock.h:79
Timer A1 clock.
Definition: fsl_clock.h:81
Timer A2 clock.
Definition: fsl_clock.h:80
Timer A0 clock.
Definition: fsl_clock.h:82
#define LPI2C_CLOCKS
Value:
{ \
}
LPI2C0 clock.
Definition: fsl_clock.h:85
LPI2C1 clock.
Definition: fsl_clock.h:86
#define QSPI_CLOCKS
Value:
{ \
}
QSPI0 clock.
Definition: fsl_clock.h:87
#define QSCI_CLOCKS
Value:
{ \
}
QSCI1 clock.
Definition: fsl_clock.h:88
QSCI0 clock.
Definition: fsl_clock.h:89
#define DAC_CLOCKS
Value:
{ \
}
DAC clock.
Definition: fsl_clock.h:90
#define PIT_CLOCKS
Value:
{ \
}
PIT 0 clock.
Definition: fsl_clock.h:94
PIT 1 clock.
Definition: fsl_clock.h:93
#define QDC_CLOCKS
Value:
{ \
}
QDC clock.
Definition: fsl_clock.h:95
#define CRC_CLOCKS
Value:
{ \
}
CRC clock.
Definition: fsl_clock.h:96
#define CADC_CLOCKS
Value:
{ \
}
Cyclic ADC clock.
Definition: fsl_clock.h:97
#define CMP_CLOCKS
Value:
{ \
}
Comparator C clock.
Definition: fsl_clock.h:99
Comparator D clock.
Definition: fsl_clock.h:98
Comparator A clock.
Definition: fsl_clock.h:101
Comparator B clock.
Definition: fsl_clock.h:100
#define PWM_CLOCKS
Value:
{ \
}
Enhanced Flexible PWM A1 clock.
Definition: fsl_clock.h:106
Enhanced Flexible PWM A0 clock.
Definition: fsl_clock.h:107
Enhanced Flexible PWM A2 clock.
Definition: fsl_clock.h:105
Enhanced Flexible PWM A3 clock.
Definition: fsl_clock.h:104
#define ROM_CLOCKS
Value:
{ \
}
ROM clock.
Definition: fsl_clock.h:108
#define OPAMP_CLOCKS
Value:
{ \
}
Operational amplifier A clock.
Definition: fsl_clock.h:110
Operational amplifier B clock.
Definition: fsl_clock.h:109
#define DSASS_CLOCKS
Value:
{ \
}
DSASS clock.
Definition: fsl_clock.h:111
#define EDMA_CLOCKS
Value:
{ \
kCLOCK_EDMA \
}
#define EWM_CLOCKS
Value:
{ \
kCLOCK_EWM \
}
#define XBARA_CLOCKS
Value:
{ \
kCLOCK_XBARA \
}

Enumeration Type Documentation

Enumerator
kCLOCK_GPIOF 

GPIOF clock.

kCLOCK_GPIOE 

GPIOE clock.

kCLOCK_GPIOD 

GPIOD clock.

kCLOCK_GPIOC 

GPIOC clock.

kCLOCK_GPIOB 

GPIOB clock.

kCLOCK_GPIOA 

GPIOA clock.

kCLOCK_TA3 

Timer A3 clock.

kCLOCK_TA2 

Timer A2 clock.

kCLOCK_TA1 

Timer A1 clock.

kCLOCK_TA0 

Timer A0 clock.

kCLOCK_LPI2C0 

LPI2C0 clock.

kCLOCK_LPI2C1 

LPI2C1 clock.

kCLOCK_QSPI0 

QSPI0 clock.

kCLOCK_QSCI1 

QSCI1 clock.

kCLOCK_QSCI0 

QSCI0 clock.

kCLOCK_DAC 

DAC clock.

kCLOCK_PIT1 

PIT 1 clock.

kCLOCK_PIT0 

PIT 0 clock.

kCLOCK_QDC 

QDC clock.

kCLOCK_CRC 

CRC clock.

kCLOCK_CYCADC 

Cyclic ADC clock.

kCLOCK_CMPD 

Comparator D clock.

kCLOCK_CMPC 

Comparator C clock.

kCLOCK_CMPB 

Comparator B clock.

kCLOCK_CMPA 

Comparator A clock.

kCLOCK_PWMACH3 

Enhanced Flexible PWM A3 clock.

kCLOCK_PWMACH2 

Enhanced Flexible PWM A2 clock.

kCLOCK_PWMACH1 

Enhanced Flexible PWM A1 clock.

kCLOCK_PWMACH0 

Enhanced Flexible PWM A0 clock.

kCLOCK_ROM 

ROM clock.

kCLOCK_OPAMPB 

Operational amplifier B clock.

kCLOCK_OPAMPA 

Operational amplifier A clock.

kCLOCK_DSASS 

DSASS clock.

kCLOCK_NOGATE 

Peripheral without clock gate control.

kCLOCK_NUM 

Total IP clock number.

Enumerator
kCLOCK_Mstr2xClk 

Master 2x clock which feed to core and peripheral.

kCLOCK_SysClk 

MCU system/core clock.

kCLOCK_BusClk 

Bus clock.

kCLOCK_Bus2xClk 

Bus 2x clock.

kCLOCK_FlashClk 

Flash clock.

kCLOCK_FastIrcClk 

Fast internal RC oscillator, 8M/2M.

kCLOCK_SlowIrcClk 

Slow internal RC oscillator, 200K.

kCLOCK_CrystalOscClk 

Crystal oscillator.

kCLOCK_ExtClk 

The selected external clock, it could be crystal oscillator, clkin0, clkin1.

kCLOCK_MstrOscClk 

The selected master oscillator clock.

kCLOCK_PllDiv2Clk 

PLL output divide 2.

Enumerator
kCLOCK_CrystalOscModeFSP 

Full swing pierce, high power mode.

kCLOCK_CrystalOscModeLCP 

Loop controlled pierce, low power mode.

Enumerator
kCLOCK_ExtClkSrcCrystalOsc 

External clock source is crystal oscillator.

kCLOCK_ExtClkSrcClkin 

External clock source is clock in.

Enumerator
kCLOCK_SelClkIn0 

Clock in 0 is selected as CLKIN.

kCLOCK_SelClkIn1 

Clock in 1 is selected as CLKIN.

Enumerator
kCLOCK_MstrOscClkSrcFirc 

8M/2M, fast internal RC oscillator

kCLOCK_MstrOscClkSrcExt 

External clock.

kCLOCK_MstrOscClkSrcSirc 

200K, slow internal RC oscillator

Enumerator
kCLOCK_Mstr2xClkSrcMstrOsc 

Master oscillator clock.

kCLOCK_Mstr2xClkSrcPllDiv2 

PLL output divide 2.

Enumerator
kCLOCK_OutputClkSrc_Sys 

MCU system/core clock.

kCLOCK_OutputClkSrc_Mstr2x 

Master 2x clock.

kCLOCK_OutputClkSrc_BusDiv2 

Bus clock div 2.

kCLOCK_OutputClkSrc_MstrOSC 

Master oscillator clock.

kCLOCK_OutputClkSrc_Firc 

Fast IRC clock, 8M/2M.

kCLOCK_OutputClkSrc_Sirc 

Slow IRC clock, 200K.

Enumerator
kCLOCK_OutputDiv1 

output clock = selectedClock/1U

kCLOCK_OutputDiv2 

output clock = selectedClock/2U

kCLOCK_OutputDiv4 

output clock = selectedClock/4U

kCLOCK_OutputDiv8 

output clock = selectedClock/8U

kCLOCK_OutputDiv16 

output clock = selectedClock/16U

kCLOCK_OutputDiv32 

output clock = selectedClock/32U

kCLOCK_OutputDiv64 

output clock = selectedClock/64U

kCLOCK_OutputDiv128 

output clock = selectedClock/128U

Enumerator
kCLOCK_Protection_Off 

No protection, and could be changed any time.

kCLOCK_Protection_On 

Protected, and could be changed any time.

kCLOCK_Protection_OffLock 

No protection and get locked until chip reset.

kCLOCK_Protection_OnLock 

Protected and get locked until chip reset.

Enumerator
kCLOCK_IPClkSrc_BusClk 

Bus clock.

kCLOCK_IPClkSrc_Bus2xClk 

Bus 2x clock.

Enumerator
kCLOCK_FircSel_8M 

FIRC normal mode, output 8M.

kCLOCK_FircSel_2M 

FIRC standby mode, output 2M.

Enumerator
kCLOCK_Mode_Normal 

Normal mode, core:bus clock rate = 1:1.

kCLOCK_Mode_Fast 

Fast mode, core:bus clock rate = 2:1.

Enumerator
kCLOCK_PostscaleDiv1 

Mast 2X clock = clkSrc / 1.

kCLOCK_PostscaleDiv2 

Mast 2X clock = clkSrc / 2.

kCLOCK_PostscaleDiv4 

Mast 2X clock = clkSrc / 4.

kCLOCK_PostscaleDiv8 

Mast 2X clock = clkSrc / 8.

kCLOCK_PostscaleDiv16 

Mast 2X clock = clkSrc / 16.

kCLOCK_PostscaleDiv32 

Mast 2X clock = clkSrc / 32.

kCLOCK_PostscaleDiv64 

Mast 2X clock = clkSrc / 64.

kCLOCK_PostscaleDiv128 

Mast 2X clock = clkSrc / 128.

kCLOCK_PostscaleDiv256 

Mast 2X clock = clkSrc / 256.

Enumerator
kCLOCK_PllMonitorUnLockCoarse 

PLL coarse unlock, due to loss of reference clock, power unstable...etc.

kCLOCK_PllMonitorUnLockFine 

PLL fine unlock, due to loss of reference clock, power unstable...etc.

kCLOCK_PllMonitorLostofReferClk 

PLL lost reference clock.

kCLOCK_PllMonitorAll 

All PLL monitor type.

Enumerator
kPIT_CountClockSource0 

PIT count clock sourced from IP bus clock.

kPIT_CountClockSource1 

PIT count clock sourced from alternate clock 1.

kPIT_CountClockSource2 

PIT count clock sourced from alternate clock 2.

kPIT_CountClockSource3 

PIT count clock sourced from alternate clock 3.

kPIT_CountBusClk 

PIT count clock sourced from bus clock.

kPIT_CountCrystalOscClk 

PIT count clock sourced from crystal clock.

kPIT_CountFircClk 

PIT count clock sourced from fast IRC(8M/2M) clock.

kPIT_CountSircClk 

PIT count clock sourced from slow IRC(200KHz) clock.

Enumerator
kEWM_LpoClockSource0 

EWM clock sourced from lpo_clk[0].

kEWM_LpoClockSource1 

EWM clock sourced from lpo_clk[1].

kEWM_LpoClockSource2 

EWM clock sourced from lpo_clk[2].

kEWM_LpoClockSource3 

EWM clock sourced from lpo_clk[3].

kEWM_Lpo8MHz2MHzIRCClock 

EWM clock sourced from 8MHz/2MHz IRC clock.

kEWM_LpoCrystalClock 

EWM clock sourced from crystal clock.

kEWM_LpoBusClock 

EWM clock sourced from IPS Bus clock.

kEWM_Lpo200KHzIRCClock 

EWM clock sourced from 200KHz IRC clock.

Function Documentation

static void CLOCK_EnableClock ( clock_ip_name_t  eIpClkName)
inlinestatic
Parameters
eIpClkNameIP clock name.
static void CLOCK_DisableClock ( clock_ip_name_t  eIpClkName)
inlinestatic
Parameters
eIpClkNameIP clock name.
static void CLOCK_EnableClockInStopMode ( clock_ip_name_t  eIpClkName)
inlinestatic
Parameters
eIpClkNameIP clock name.
static void CLOCK_DisableClockInStopMode ( clock_ip_name_t  eIpClkName)
inlinestatic
Parameters
eIpClkNameIP clock name.
static void CLOCK_ConfigQsciClockSrc ( clock_ip_name_t  eQsciClkName,
clock_ip_clk_src_t  eClkSrc 
)
inlinestatic

QSCI clock could be bus or bus_2x clock. Default is bus clock.

Parameters
eQsciClkNameIP(only QSCI is valid) clock name.
eClkSrcClock source.
static void CLOCK_ConfigQtimerClockSrc ( clock_ip_clk_src_t  eClkSrc)
inlinestatic

Qtimer clock could be bus or bus_2x clock. Default is bus clock.

Parameters
eClkSrcClock source.
static void CLOCK_ConfigPWMClockSrc ( clock_ip_clk_src_t  eClkSrc)
inlinestatic

PWM clock could be bus or bus_2x clock. Default is bus clock.

Parameters
eClkSrcClock source.
static void CLOCK_ConfigI2cClockSrc ( clock_ip_name_t  eLpi2cClkName,
clock_ip_clk_src_t  eClkSrc 
)
inlinestatic

LPI2C clock could be bus or bus_2x clock. Default is bus clock.

Parameters
eLpi2cClkNameIP(only LPI2C is valid) clock name.
eClkSrcClock source.
static void CLOCK_ConfigQDCClockSrc ( clock_ip_clk_src_t  eClkSrc)
inlinestatic

QDC clock could be bus or bus_2x clock. Default is bus clock.

Parameters
eClkSrcClock source.
static void CLOCK_SetSlowIrcTrim ( uint16_t  u16Trim)
inlinestatic

The factory trim value is loaded during reset. User may call this function to fine tune the 200K IRC oscillator.

Parameters
u16TrimSlow internal RC oscillator trim value.
static void CLOCK_SetFastIrc8MTrim ( uint16_t  u16Trim)
inlinestatic

The factory trim value is loaded during reset. User may call this function to fine tune the FIRC 8M oscillator.

Parameters
u16TrimFast internal 8M RC oscillator trim value.
static void CLOCK_SetFastIrc2MTrim ( uint16_t  u16Trim)
inlinestatic

The factory trim value is loaded during reset. User may call this function to fine tune the FIRC 2M oscillator.

Parameters
u16TrimFast internal 2M RC oscillator trim value.
static bool CLOCK_GetCrystalOscFailureStatus ( void  )
inlinestatic

This function should be called only when crystal osc is on and its monitor(MON_ENABLE in OSCTL2 register) is enabled.

Returns
Crystal oscillator status. true: Crystal oscillator frequency is below 680KHz(typical). false: No clock failure or crystal oscillator is off.
static void CLOCK_SetPllLossofRefererntTripPoint ( uint8_t  u8Trip)
inlinestatic

The trip point default value is 2.

Parameters
u8TripTrip point for loss of reference.
static void CLOCK_ClearPLLMonitorFlag ( clock_pll_monitor_type_t  eType)
inlinestatic
Parameters
eTypePLL monitor type.
static void CLOCK_EnableFircOutput ( bool  bEnable)
inlinestatic

Note: It is not allowed to disable FIRC output when FIRC is selected as master osc clock source. Note: Disable FIRC output doesn't turn off FIRC, FIRC still works but its output is cut off. Note: For the case FIRC is powered on and output disabled, enable FIRC output doesn't require startup time.

Parameters
bEnableEnable or disable output.
uint32_t CLOCK_GetFreq ( clock_name_t  eClkName)
Parameters
eClkNameSystem-level clock name.
Returns
The required clock's frequency in Hz.
uint32_t CLOCK_GetIpClkSrcFreq ( clock_ip_name_t  eIpClkName)
Parameters
eIpClkNameIP clock name.
Returns
The required IP clock's frequency in Hz.
void CLOCK_SetClkin0Freq ( uint32_t  u32Freq)

It is a must to call this function in advance if system is operated by clkin0.

Parameters
u32FreqClock IN 0 frequency in Hz.
void CLOCK_SetClkin1Freq ( uint32_t  u32Freq)

It is a must to call this function in advance if system is operated by clkin1.

Parameters
u32FreqClock IN 1 frequency in Hz.
void CLOCK_SetXtalFreq ( uint32_t  u32Freq)

It is a must to call this function in advance if system is operated by crystal oscillator.

Parameters
u32FreqCrystal oscillator frequency in Hz.
void CLOCK_SetProtectionConfig ( clock_protection_config_t psConfig)
Parameters
psConfigPointer for protection configuration.
void CLOCK_SetOutputClockConfig ( clock_output_config_t psConfig)
Parameters
psConfigPointer for clock output configuration.
void CLOCK_SetClkConfig ( clock_config_t psConfig)

It is recommended to set the multilink debug shift freq to 100KHz or lower when debug the 2M FIRC setting, otherwise the multilink may can't connect to device. Below is a valid FIRC 2M clock setting demo, clock path: FIRC(2M)->MSTR OSC->DIV1->MSTR 2X .bCrystalOscEnable = false; .bFircEnable = true; .bSircEnable = false; .bPllEnable = false; .eFircSel = kCLOCK_FircSel_2M; .eMstrOscClkSrc = kCLOCK_MstrOscClkSrcFirc; .eMstr2xClkSrc = kCLOCK_SysClkSrcMstrOsc; .eMstr2xClkPostScale = kCLOCK_PostscaleDiv1;

If set the SIRC(200KHz) as Mstr2x clock, the debugger can't connect to the device. So be careful to set the SIRC clock configuration, because it's difficult to debug. Below is a valid SIRC 200K clock setting demo, clock path: SIRC->MSTR OSC->DIV1->MSTR 2X .bCrystalOscEnable = false; .bFircEnable = false; .bSircEnable = true; .bPllEnable = false; .eMstrOscClkSrc = kCLOCK_MstrOscClkSrcSirc; .eMstr2xClkSrc = kCLOCK_SysClkSrcMstrOsc; .eMstr2xClkPostScale = kCLOCK_PostscaleDiv1;

Parameters
psConfigPointer for clock configuration.
void CLOCK_SetClockMode ( clock_mode_t  eClkMode)

Note: This function will do software reset if setting mode differs current mode, otherwise it does nothing.

Parameters
eClkModeSetting clock mode.
uint32_t CLOCK_EvaluateExtClkFreq ( void  )

This function should be called only when internal FIRC is on and 8M is selected. The evaluated result accuracy depends on:

  1. FIRC accuracy, now it is +/-1%.
  2. Truncation error, because the external clock and FIRC is not synchronised.
  3. External clock frequency, low accuracy for lower external clock frequency.
  4. MCU mstr 2x clock.

For example, for namely 8M external clock, evaluated result may be range in 8M+/-5%.

Returns
Evaluated external frequency in Hz.
void CLOCK_EnablePLLMonitorInterrupt ( clock_pll_monitor_type_t  eType,
bool  bEnable 
)

This function should be called only when PLL is on and its reference clock is external clock. This function is for safety purpose when external clock is lost due to HW failure. The normal flow to call this function:

  1. Call CLOCK_SetClkConfig to enable PLL and external clock to feed the PLL.
  2. Call CLOCK_ClearPLLMonitorFlag.
  3. Call CLOCK_SetPllLossofRefererntTripPoint (optional, setting value is for kCLOCK_PllMonitorLostofReferClk type).
  4. Call this function.
  5. Enable OCCS interrupt with highest priority 3.
  6. When OCCS interrupt occurs, recover clock from the disaster in OCCS_DriveISRHandler function. Such kind of clock recovery is application dependent, and a demo OCCS_DriveISRHandler has been shown in fsl_clock.c
Parameters
eTypePLL monitor type.
bEnableEnable or disable.