Overview

Data Structures
struct	enet_qos_rx_bd_struct_t
	Defines the receive descriptor structure has the read-format and write-back format structure. More...

struct	enet_qos_tx_bd_struct_t
	Defines the transmit descriptor structure has the read-format and write-back format structure. More...

struct	enet_qos_ptp_time_t
	Defines the ENET PTP time stamp structure. More...

struct	enet_qos_frame_info_t
	Defines the frame info structure. More...

struct	enet_qos_tx_dirty_ring_t
	Defines the ENET transmit dirty addresses ring/queue structure. More...

struct	enet_qos_ptp_config_t
	Defines the ENET PTP configuration structure. More...

struct	enet_qos_est_gate_op_t
	Defines the EST gate operation structure. More...

struct	enet_qos_est_gcl_t
	Defines the EST gate control list structure. More...

struct	enet_qos_rxp_config_t
	Defines the ENET_QOS Rx parser configuration structure. More...

struct	enet_qos_buffer_config_t
	Defines the buffer descriptor configure structure. More...

struct	enet_qos_cbs_config_t
	Defines the CBS configuration for queue. More...

struct	enet_qos_queue_tx_config_t
	Defines the queue configuration structure. More...

struct	enet_qos_queue_rx_config_t
	Defines the queue configuration structure. More...

struct	enet_qos_multiqueue_config_t
	Defines the configuration when multi-queue is used. More...

struct	enet_qos_config_t
	Defines the basic configuration structure for the ENET device. More...

struct	enet_qos_tx_bd_ring_t
	Defines the ENET transmit buffer descriptor ring/queue structure. More...

struct	enet_qos_rx_bd_ring_t
	Defines the ENET receive buffer descriptor ring/queue structure. More...

struct	enet_qos_handle_t
	Defines the ENET handler structure. More...

Typedefs
typedef void(*	enet_qos_callback_t )(ENET_QOS_Type base, enet_qos_handle_t handle, enet_qos_event_t event, uint8_t channel, void *userData)
	ENET callback function. More...

Enumerations
enum	{ kStatus_ENET_QOS_RxFrameError, kStatus_ENET_QOS_RxFrameFail = MAKE_STATUS(kStatusGroup_ENET_QOS, 1U), kStatus_ENET_QOS_RxFrameEmpty = MAKE_STATUS(kStatusGroup_ENET_QOS, 2U), kStatus_ENET_QOS_TxFrameBusy, kStatus_ENET_QOS_TxFrameFail = MAKE_STATUS(kStatusGroup_ENET_QOS, 4U), kStatus_ENET_QOS_TxFrameOverLen = MAKE_STATUS(kStatusGroup_ENET_QOS, 5U), kStatus_ENET_QOS_Est_SwListBusy, kStatus_ENET_QOS_Est_SwListWriteAbort = MAKE_STATUS(kStatusGroup_ENET_QOS, 7U), kStatus_ENET_QOS_Est_InvalidParameter, kStatus_ENET_QOS_Est_BtrError = MAKE_STATUS(kStatusGroup_ENET_QOS, 9U), kStatus_ENET_QOS_TrgtBusy = MAKE_STATUS(kStatusGroup_ENET_QOS, 10U), kStatus_ENET_QOS_Timeout = MAKE_STATUS(kStatusGroup_ENET_QOS, 11U), kStatus_ENET_QOS_PpsBusy = MAKE_STATUS(kStatusGroup_ENET_QOS, 12U) }
	Defines the status return codes for transaction. More...

enum	enet_qos_mii_mode_t { kENET_QOS_MiiMode = 0U, kENET_QOS_RgmiiMode = 1U, kENET_QOS_RmiiMode = 4U }
	Defines the MII/RGMII mode for data interface between the MAC and the PHY. More...

enum	enet_qos_mii_speed_t { kENET_QOS_MiiSpeed10M, kENET_QOS_MiiSpeed100M, kENET_QOS_MiiSpeed1000M, kENET_QOS_MiiSpeed2500M }
	Defines the 10/100/1000 Mbps speed for the MII data interface. More...

enum	enet_qos_mii_duplex_t { kENET_QOS_MiiHalfDuplex = 0U, kENET_QOS_MiiFullDuplex }
	Defines the half or full duplex for the MII data interface. More...

enum	enet_qos_mii_normal_opcode { kENET_QOS_MiiWriteFrame, kENET_QOS_MiiReadFrame }
	Define the MII opcode for normal MDIO_CLAUSES_22 Frame. More...

enum	enet_qos_dma_burstlen { kENET_QOS_BurstLen1 = 0x00001U, kENET_QOS_BurstLen2 = 0x00002U, kENET_QOS_BurstLen4 = 0x00004U, kENET_QOS_BurstLen8 = 0x00008U, kENET_QOS_BurstLen16 = 0x00010U, kENET_QOS_BurstLen32 = 0x00020U, kENET_QOS_BurstLen64 = 0x10008U, kENET_QOS_BurstLen128 = 0x10010U, kENET_QOS_BurstLen256 = 0x10020U }
	Define the DMA maximum transmit burst length. More...

enum	enet_qos_desc_flag { kENET_QOS_MiddleFlag = 0, kENET_QOS_LastFlagOnly, kENET_QOS_FirstFlagOnly, kENET_QOS_FirstLastFlag }
	Define the flag for the descriptor. More...

enum	enet_qos_systime_op { kENET_QOS_SystimeAdd = 0U, kENET_QOS_SystimeSubtract = 1U }
	Define the system time adjust operation control. More...

enum	enet_qos_ts_rollover_type { kENET_QOS_BinaryRollover = 0, kENET_QOS_DigitalRollover = 1 }
	Define the system time rollover control. More...

enum	enet_qos_special_config_t { kENET_QOS_DescDoubleBuffer = 0x0001U, kENET_QOS_StoreAndForward = 0x0002U, kENET_QOS_PromiscuousEnable = 0x0004U, kENET_QOS_FlowControlEnable = 0x0008U, kENET_QOS_BroadCastRxDisable = 0x0010U, kENET_QOS_MulticastAllEnable = 0x0020U, kENET_QOS_8023AS2KPacket = 0x0040U, kENET_QOS_HashMulticastEnable = 0x0080U }
	Defines some special configuration for ENET. More...

enum	enet_qos_dma_interrupt_enable_t { kENET_QOS_DmaTx = ENET_QOS_DMA_CHX_INT_EN_TIE_MASK, kENET_QOS_DmaTxStop = ENET_QOS_DMA_CHX_INT_EN_TXSE_MASK, kENET_QOS_DmaTxBuffUnavail = ENET_QOS_DMA_CHX_INT_EN_TBUE_MASK, kENET_QOS_DmaRx = ENET_QOS_DMA_CHX_INT_EN_RIE_MASK, kENET_QOS_DmaRxBuffUnavail = ENET_QOS_DMA_CHX_INT_EN_RBUE_MASK, kENET_QOS_DmaRxStop = ENET_QOS_DMA_CHX_INT_EN_RSE_MASK, kENET_QOS_DmaRxWatchdogTimeout = ENET_QOS_DMA_CHX_INT_EN_RWTE_MASK, kENET_QOS_DmaEarlyTx = ENET_QOS_DMA_CHX_INT_EN_ETIE_MASK, kENET_QOS_DmaEarlyRx = ENET_QOS_DMA_CHX_INT_EN_ERIE_MASK, kENET_QOS_DmaBusErr = ENET_QOS_DMA_CHX_INT_EN_FBEE_MASK }
	List of DMA interrupts supported by the ENET interrupt. More...

enum	enet_qos_mac_interrupt_enable_t
	List of mac interrupts supported by the ENET interrupt. More...

enum	enet_qos_event_t { kENET_QOS_RxIntEvent, kENET_QOS_TxIntEvent, kENET_QOS_WakeUpIntEvent, kENET_QOS_TimeStampIntEvent }
	Defines the common interrupt event for callback use. More...

enum	enet_qos_queue_mode_t { kENET_QOS_AVB_Mode = 1U, kENET_QOS_DCB_Mode = 2U }
	Define the MTL mode for multiple queues/rings. More...

enum	enet_qos_mtl_multiqueue_txsche { kENET_QOS_txWeightRR = 0U, kENET_QOS_txWeightFQ = 1U, kENET_QOS_txDefictWeightRR = 2U, kENET_QOS_txStrPrio = 3U }
	Define the MTL tx scheduling algorithm for multiple queues/rings. More...

enum	enet_qos_mtl_multiqueue_rxsche { kENET_QOS_rxStrPrio = 0U, kENET_QOS_rxWeightStrPrio }
	Define the MTL rx scheduling algorithm for multiple queues/rings. More...

enum	enet_qos_mtl_rxqueuemap_t { kENET_QOS_StaticDirctMap = 0x100U, kENET_QOS_DynamicMap }
	Define the MTL rx queue and DMA channel mapping. More...

enum	enet_qos_rx_queue_route_t
	Defines the package type for receive queue routing. More...

enum	enet_qos_ptp_event_type_t { kENET_QOS_PtpEventMsgType = 3U, kENET_QOS_PtpSrcPortIdLen = 10U, kENET_QOS_PtpEventPort = 319U, kENET_QOS_PtpGnrlPort = 320U }
	Defines the ENET PTP message related constant. More...

enum	enet_qos_ptp_pps_instance_t { kENET_QOS_PtpPpsIstance0 = 0U, kENET_QOS_PtpPpsIstance1, kENET_QOS_PtpPpsIstance2, kENET_QOS_PtpPpsIstance3 }
	Defines the PPS instance numbers. More...

enum	enet_qos_ptp_pps_trgt_mode_t { kENET_QOS_PtpPpsTrgtModeOnlyInt = 0U, kENET_QOS_PtpPpsTrgtModeIntSt = 2, kENET_QOS_PtpPpsTrgtModeOnlySt = 3 }
	Defines the Target Time register mode. More...

enum	enet_qos_ptp_pps_cmd_t { kENET_QOS_PtpPpsCmdNC = 0U, kENET_QOS_PtpPpsCmdSSP = 1U, kENET_QOS_PtpPpsCmdSPT = 2U, kENET_QOS_PtpPpsCmdCS = 3U, kENET_QOS_PtpPpsCmdSPTAT = 4U, kENET_QOS_PtpPpsCmdSPTI = 5U, kENET_QOS_PtpPpsCmdCSPT = 6U }
	Defines commands for ppscmd register. More...

enum	enet_qos_ets_list_length_t { kENET_QOS_Ets_List_64 = 7U, kENET_QOS_Ets_List_128 = 8U, kENET_QOS_Ets_List_256 = 9U, kENET_QOS_Ets_List_512 = 10U, kENET_QOS_Ets_List_1024 = 11U }
	Defines the enmueration of ETS list length. More...

enum	enet_qos_ets_gccr_addr_t { kENET_QOS_Ets_btr_low = 0U, kENET_QOS_Ets_btr_high = 1U, kENET_QOS_Ets_ctr_low = 2U, kENET_QOS_Ets_ctr_high = 3U, kENET_QOS_Ets_ter = 4U, kENET_QOS_Ets_llr = 5U }
	Defines the enmueration of ETS gate control address. More...

enum	enet_qos_rxp_dma_chn_t { kENET_QOS_Rxp_DMAChn0 = 1U, kENET_QOS_Rxp_DMAChn1 = 2U, kENET_QOS_Rxp_DMAChn2 = 4U, kENET_QOS_Rxp_DMAChn3 = 8U, kENET_QOS_Rxp_DMAChn4 = 16U }
	Defines the enmueration of DMA channel used for rx parser entry. More...

Driver version
#define	FSL_ENET_QOS_DRIVER_VERSION (MAKE_VERSION(2, 3, 0))
	Defines the driver version. More...

Control and status region bit masks of the receive buffer descriptor.
#define	ENET_QOS_RXDESCRIP_RD_BUFF1VALID_MASK (1UL << 24U)
	Defines for read format. More...

#define	ENET_QOS_RXDESCRIP_RD_BUFF2VALID_MASK (1UL << 25U)
	Buffer2 address valid. More...

#define	ENET_QOS_RXDESCRIP_RD_IOC_MASK (1UL << 30U)
	Interrupt enable on complete. More...

#define	ENET_QOS_RXDESCRIP_RD_OWN_MASK (1UL << 31U)
	Own bit. More...

#define	ENET_QOS_RXDESCRIP_WR_ERR_MASK ((1UL << 3U) \| (1UL << 7U))
	Defines for write back format. More...

#define	ENET_QOS_RXDESCRIP_WR_PYLOAD_MASK (0x7UL)

#define	ENET_QOS_RXDESCRIP_WR_PTPMSGTYPE_MASK (0xF00UL)

#define	ENET_QOS_RXDESCRIP_WR_PTPTYPE_MASK (1UL << 12U)

#define	ENET_QOS_RXDESCRIP_WR_PTPVERSION_MASK (1UL << 13U)

#define	ENET_QOS_RXDESCRIP_WR_PTPTSA_MASK (1UL << 14U)

#define	ENET_QOS_RXDESCRIP_WR_PACKETLEN_MASK (0x7FFFUL)

#define	ENET_QOS_RXDESCRIP_WR_ERRSUM_MASK (1UL << 15U)

#define	ENET_QOS_RXDESCRIP_WR_TYPE_MASK (0x30000UL)

#define	ENET_QOS_RXDESCRIP_WR_DE_MASK (1UL << 19U)

#define	ENET_QOS_RXDESCRIP_WR_RE_MASK (1UL << 20U)

#define	ENET_QOS_RXDESCRIP_WR_OE_MASK (1UL << 21U)

#define	ENET_QOS_RXDESCRIP_WR_RS0V_MASK (1UL << 25U)

#define	ENET_QOS_RXDESCRIP_WR_RS1V_MASK (1UL << 26U)

#define	ENET_QOS_RXDESCRIP_WR_RS2V_MASK (1UL << 27U)

#define	ENET_QOS_RXDESCRIP_WR_LD_MASK (1UL << 28U)

#define	ENET_QOS_RXDESCRIP_WR_FD_MASK (1UL << 29U)

#define	ENET_QOS_RXDESCRIP_WR_CTXT_MASK (1UL << 30U)

#define	ENET_QOS_RXDESCRIP_WR_OWN_MASK (1UL << 31U)

Control and status bit masks of the transmit buffer descriptor.
#define	ENET_QOS_TXDESCRIP_RD_BL1_MASK (0x3fffUL)
	Defines for read format. More...

#define	ENET_QOS_TXDESCRIP_RD_BL2_MASK (ENET_QOS_TXDESCRIP_RD_BL1_MASK << 16U)

#define	ENET_QOS_TXDESCRIP_RD_BL1(n) ((uint32_t)(n)&ENET_QOS_TXDESCRIP_RD_BL1_MASK)

#define	ENET_QOS_TXDESCRIP_RD_BL2(n) (((uint32_t)(n)&ENET_QOS_TXDESCRIP_RD_BL1_MASK) << 16)

#define	ENET_QOS_TXDESCRIP_RD_TTSE_MASK (1UL << 30UL)

#define	ENET_QOS_TXDESCRIP_RD_IOC_MASK (1UL << 31UL)

#define	ENET_QOS_TXDESCRIP_RD_FL_MASK (0x7FFFUL)

#define	ENET_QOS_TXDESCRIP_RD_FL(n) ((uint32_t)(n)&ENET_QOS_TXDESCRIP_RD_FL_MASK)

#define	ENET_QOS_TXDESCRIP_RD_CIC(n) (((uint32_t)(n)&0x3U) << 16U)

#define	ENET_QOS_TXDESCRIP_RD_TSE_MASK (1UL << 18U)

#define	ENET_QOS_TXDESCRIP_RD_SLOT(n) (((uint32_t)(n)&0x0fU) << 19U)

#define	ENET_QOS_TXDESCRIP_RD_SAIC(n) (((uint32_t)(n)&0x07U) << 23U)

#define	ENET_QOS_TXDESCRIP_RD_CPC(n) (((uint32_t)(n)&0x03U) << 26U)

#define	ENET_QOS_TXDESCRIP_RD_LDFD(n) (((uint32_t)(n)&0x03U) << 28U)

#define	ENET_QOS_TXDESCRIP_RD_LD_MASK (1UL << 28U)

#define	ENET_QOS_TXDESCRIP_RD_FD_MASK (1UL << 29U)

#define	ENET_QOS_TXDESCRIP_RD_CTXT_MASK (1UL << 30U)

#define	ENET_QOS_TXDESCRIP_RD_OWN_MASK (1UL << 31U)

#define	ENET_QOS_TXDESCRIP_WB_TTSS_MASK (1UL << 17U)
	Defines for write back format. More...

Bit mask for interrupt enable type.
#define	ENET_QOS_ABNORM_INT_MASK

#define	ENET_QOS_NORM_INT_MASK

Defines some Ethernet parameters.
#define	ENET_QOS_RING_NUM_MAX (5U)
	The Maximum number of tx/rx descriptor rings. More...

#define	ENET_QOS_FRAME_MAX_FRAMELEN (1518U)
	Default maximum Ethernet frame size. More...

#define	ENET_QOS_FCS_LEN (4U)
	Ethernet FCS length. More...

#define	ENET_QOS_ADDR_ALIGNMENT (0x3U)
	Recommended Ethernet buffer alignment. More...

#define	ENET_QOS_BUFF_ALIGNMENT (8U)
	Receive buffer alignment shall be 4bytes-aligned. More...

#define	ENET_QOS_MTL_RXFIFOSIZE (8192U)
	The rx fifo size. More...

#define	ENET_QOS_MTL_TXFIFOSIZE (8192U)
	The tx fifo size. More...

#define	ENET_QOS_MACINT_ENUM_OFFSET (16U)
	The offest for mac interrupt in enum type. More...

#define	ENET_QOS_RXP_ENTRY_COUNT (256U)
	RXP table entry count, implied by FRPES in MAC_HW_FEATURE3.

#define	ENET_QOS_RXP_BUFFER_SIZE (256U)
	RXP Buffer size, implied by FRPBS in MAC_HW_FEATURE3.

#define	ENET_QOS_EST_WID (24U)
	Width of the time interval in Gate Control List.

#define	ENET_QOS_EST_DEP (512U)
	Maxmimum depth of Gate Control List.

Initialization and De-initialization
void	ENET_QOS_GetDefaultConfig (enet_qos_config_t *config)
	Gets the ENET default configuration structure. More...

status_t	ENET_QOS_Up (ENET_QOS_Type base, const enet_qos_config_t config, uint8_t *macAddr, uint8_t macCount, uint32_t refclkSrc_Hz)
	Initializes the ENET module. More...

status_t	ENET_QOS_Init (ENET_QOS_Type base, const enet_qos_config_t config, uint8_t *macAddr, uint8_t macCount, uint32_t refclkSrc_Hz)
	Initializes the ENET module. More...

void	ENET_QOS_Down (ENET_QOS_Type *base)
	brief Stops the ENET module. More...

void	ENET_QOS_Deinit (ENET_QOS_Type *base)
	Deinitializes the ENET module. More...

uint32_t	ENET_QOS_GetInstance (ENET_QOS_Type *base)
	Get the ENET instance from peripheral base address. More...

status_t	ENET_QOS_DescriptorInit (ENET_QOS_Type base, enet_qos_config_t config, enet_qos_buffer_config_t *bufferConfig)
	Initialize for all ENET descriptors. More...

void	ENET_QOS_StartRxTx (ENET_QOS_Type *base, uint8_t txRingNum, uint8_t rxRingNum)
	Starts the ENET rx/tx. More...

MII interface operation
static void	ENET_QOS_SetMII (ENET_QOS_Type *base, enet_qos_mii_speed_t speed, enet_qos_mii_duplex_t duplex)
	Sets the ENET MII speed and duplex. More...

void	ENET_QOS_SetSMI (ENET_QOS_Type *base, uint32_t csrClock_Hz)
	Sets the ENET SMI(serial management interface)- MII management interface. More...

static bool	ENET_QOS_IsSMIBusy (ENET_QOS_Type *base)
	Checks if the SMI is busy. More...

static uint16_t	ENET_QOS_ReadSMIData (ENET_QOS_Type *base)
	Reads data from the PHY register through SMI interface. More...

void	ENET_QOS_StartSMIRead (ENET_QOS_Type *base, uint32_t phyAddr, uint32_t phyReg)
	Starts an SMI read command. More...

void	ENET_QOS_StartSMIWrite (ENET_QOS_Type *base, uint32_t phyAddr, uint32_t phyReg, uint32_t data)
	Starts a SMI write command. More...

Other basic operation
static void	ENET_QOS_SetMacAddr (ENET_QOS_Type base, uint8_t macAddr, uint8_t index)
	Sets the ENET module Mac address. More...

void	ENET_QOS_GetMacAddr (ENET_QOS_Type base, uint8_t macAddr, uint8_t index)
	Gets the ENET module Mac address. More...

void	ENET_QOS_AddMulticastGroup (ENET_QOS_Type base, uint8_t address)
	Adds the ENET_QOS device to a multicast group. More...

void	ENET_QOS_LeaveMulticastGroup (ENET_QOS_Type base, uint8_t address)
	brief Moves the ENET_QOS device from a multicast group. More...

static void	ENET_QOS_AcceptAllMulticast (ENET_QOS_Type *base)
	Enable ENET device to accept all multicast frames. More...

static void	ENET_QOS_RejectAllMulticast (ENET_QOS_Type *base)
	ENET device reject to accept all multicast frames. More...

void	ENET_QOS_EnterPowerDown (ENET_QOS_Type base, uint32_t wakeFilter)
	Set the MAC to enter into power down mode. More...

static void	ENET_QOS_ExitPowerDown (ENET_QOS_Type *base)
	Set the MAC to exit power down mode. More...

status_t	ENET_QOS_EnableRxParser (ENET_QOS_Type *base, bool enable)
	Enable/Disable Rx parser,please notice that for enable/disable Rx Parser, should better disable Receive first. More...

Interrupts.
void	ENET_QOS_EnableInterrupts (ENET_QOS_Type *base, uint32_t mask)
	Enables the ENET DMA and MAC interrupts. More...

void	ENET_QOS_DisableInterrupts (ENET_QOS_Type *base, uint32_t mask)
	Disables the ENET DMA and MAC interrupts. More...

static uint32_t	ENET_QOS_GetDmaInterruptStatus (ENET_QOS_Type *base, uint8_t channel)
	Gets the ENET DMA interrupt status flag. More...

static void	ENET_QOS_ClearDmaInterruptStatus (ENET_QOS_Type *base, uint8_t channel, uint32_t mask)
	Clear the ENET DMA interrupt status flag. More...

static uint32_t	ENET_QOS_GetMacInterruptStatus (ENET_QOS_Type *base)
	Gets the ENET MAC interrupt status flag. More...

void	ENET_QOS_ClearMacInterruptStatus (ENET_QOS_Type *base, uint32_t mask)
	Clears the ENET mac interrupt events status flag. More...

Functional operation.
static bool	ENET_QOS_IsTxDescriptorDmaOwn (enet_qos_tx_bd_struct_t *txDesc)
	Get the tx descriptor DMA Own flag. More...

void	ENET_QOS_SetupTxDescriptor (enet_qos_tx_bd_struct_t txDesc, void buffer1, uint32_t bytes1, void *buffer2, uint32_t bytes2, uint32_t framelen, bool intEnable, bool tsEnable, enet_qos_desc_flag flag, uint8_t slotNum)
	Setup a given tx descriptor. More...

static void	ENET_QOS_UpdateTxDescriptorTail (ENET_QOS_Type *base, uint8_t channel, uint32_t txDescTailAddrAlign)
	Update the tx descriptor tail pointer. More...

static void	ENET_QOS_UpdateRxDescriptorTail (ENET_QOS_Type *base, uint8_t channel, uint32_t rxDescTailAddrAlign)
	Update the rx descriptor tail pointer. More...

static uint32_t	ENET_QOS_GetRxDescriptor (enet_qos_rx_bd_struct_t *rxDesc)
	Gets the context in the ENET rx descriptor. More...

void	ENET_QOS_UpdateRxDescriptor (enet_qos_rx_bd_struct_t rxDesc, void buffer1, void *buffer2, bool intEnable, bool doubleBuffEnable)
	Updates the buffers and the own status for a given rx descriptor. More...

status_t	ENET_QOS_ConfigureRxParser (ENET_QOS_Type base, enet_qos_rxp_config_t rxpConfig, uint16_t entryCount)
	Configure flexible rx parser. More...

status_t	ENET_QOS_ReadRxParser (ENET_QOS_Type base, enet_qos_rxp_config_t rxpConfig, uint16_t entryIndex)
	Read flexible rx parser configuration at specified index. More...

status_t	ENET_QOS_EstProgramGcl (ENET_QOS_Type base, enet_qos_est_gcl_t gcl, uint32_t ptpClk_Hz)
	Program Gate Control List. More...

status_t	ENET_QOS_EstReadGcl (ENET_QOS_Type base, enet_qos_est_gcl_t gcl, uint32_t listLen, bool hwList)
	Read Gate Control List. More...

static void	ENET_QOS_FpeEnable (ENET_QOS_Type *base)
	Enable Frame Preemption. More...

static void	ENET_QOS_FpeDisable (ENET_QOS_Type *base)
	Disable Frame Preemption. More...

static void	ENET_QOS_FpeConfigPreemptable (ENET_QOS_Type *base, uint8_t queueMask)
	Configure preemptable transmit queues. More...

void	ENET_QOS_AVBConfigure (ENET_QOS_Type base, const enet_qos_cbs_config_t config, uint8_t queueIndex)
	Sets the ENET AVB feature. More...

Transactional operation
void	ENET_QOS_CreateHandler (ENET_QOS_Type base, enet_qos_handle_t handle, enet_qos_config_t config, enet_qos_buffer_config_t bufferConfig, enet_qos_callback_t callback, void *userData)
	Create ENET Handler. More...

status_t	ENET_QOS_GetRxFrameSize (ENET_QOS_Type base, enet_qos_handle_t handle, uint32_t *length, uint8_t channel)
	Gets the size of the read frame. More...

status_t	ENET_QOS_ReadFrame (ENET_QOS_Type base, enet_qos_handle_t handle, uint8_t data, uint32_t length, uint8_t channel, enet_qos_ptp_time_t ts)
	Reads a frame from the ENET device. More...

status_t	ENET_QOS_SendFrame (ENET_QOS_Type base, enet_qos_handle_t handle, uint8_t data, uint32_t length, uint8_t channel, bool isNeedTs, void context)
	Transmits an ENET frame. More...

void	ENET_QOS_ReclaimTxDescriptor (ENET_QOS_Type base, enet_qos_handle_t handle, uint8_t channel)
	Reclaim tx descriptors. More...

void	ENET_QOS_CommonIRQHandler (ENET_QOS_Type base, enet_qos_handle_t handle)
	The ENET IRQ handler. More...

void	ENET_QOS_SetISRHandler (ENET_QOS_Type *base, enet_qos_isr_t ISRHandler)
	Set the second level IRQ handler, allow user to overwrite the default second level weak IRQ handler. More...

ENET Enhanced function operation
status_t	ENET_QOS_Ptp1588CorrectTimerInCoarse (ENET_QOS_Type *base, enet_qos_systime_op operation, uint32_t second, uint32_t nanosecond)
	Correct the ENET PTP 1588 timer in coarse method. More...

status_t	ENET_QOS_Ptp1588CorrectTimerInFine (ENET_QOS_Type *base, uint32_t addend)
	Correct the ENET PTP 1588 timer in fine method. More...

static uint32_t	ENET_QOS_Ptp1588GetAddend (ENET_QOS_Type *base)
	Get the ENET Time stamp current addend value. More...

void	ENET_QOS_Ptp1588GetTimerNoIRQDisable (ENET_QOS_Type base, uint64_t second, uint32_t *nanosecond)
	Gets the current ENET time from the PTP 1588 timer without IRQ disable. More...

static status_t	ENET_Ptp1588PpsControl (ENET_QOS_Type *base, enet_qos_ptp_pps_instance_t instance, enet_qos_ptp_pps_trgt_mode_t trgtMode, enet_qos_ptp_pps_cmd_t cmd)
	Sets the ENET PTP 1588 PPS control. More...

status_t	ENET_QOS_Ptp1588PpsSetTrgtTime (ENET_QOS_Type *base, enet_qos_ptp_pps_instance_t instance, uint32_t seconds, uint32_t nanoseconds)
	Sets the ENET OQS PTP 1588 PPS target time registers. More...

static void	ENET_QOS_Ptp1588PpsSetWidth (ENET_QOS_Type *base, enet_qos_ptp_pps_instance_t instance, uint32_t width)
	Sets the ENET OQS PTP 1588 PPS output signal interval. More...

static void	ENET_QOS_Ptp1588PpsSetInterval (ENET_QOS_Type *base, enet_qos_ptp_pps_instance_t instance, uint32_t interval)
	Sets the ENET OQS PTP 1588 PPS output signal width. More...

void	ENET_QOS_Ptp1588GetTimer (ENET_QOS_Type base, uint64_t second, uint32_t *nanosecond)
	Gets the current ENET time from the PTP 1588 timer. More...

void	ENET_QOS_GetTxFrame (enet_qos_handle_t handle, enet_qos_frame_info_t txFrame, uint8_t channel)
	Gets the time stamp of the transmit frame. More...

Data Structure Documentation

struct enet_qos_rx_bd_struct_t

They both has the same size with different region definition. so we define the read-format region as the recive descriptor structure Use the read-format region mask bits in the descriptor initialization Use the write-back format region mask bits in the receive data process.

Data Fields
__IO uint32_t	buff1Addr
	Buffer 1 address.

__IO uint32_t	reserved
	Reserved.

__IO uint32_t	buff2Addr
	Buffer 2 or next descriptor address.

__IO uint32_t	control
	Buffer 1/2 byte counts and control.

struct enet_qos_tx_bd_struct_t

They both has the same size with different region definition. so we define the read-format region as the transmit descriptor structure Use the read-format region mask bits in the descriptor initialization Use the write-back format region mask bits in the transmit data process.

Data Fields
__IO uint32_t	buff1Addr
	Buffer 1 address.

__IO uint32_t	buff2Addr
	Buffer 2 address.

__IO uint32_t	buffLen
	Buffer 1/2 byte counts.

__IO uint32_t	controlStat
	TDES control and status word.

struct enet_qos_ptp_time_t

Data Fields
uint64_t	second
	Second. More...

uint32_t	nanosecond
	Nanosecond. More...

Field Documentation

uint64_t enet_qos_ptp_time_t::second

uint32_t enet_qos_ptp_time_t::nanosecond

struct enet_qos_frame_info_t

Data Fields
void *	context
	User specified data, could be buffer address for free.

bool	isTsAvail
	Flag indicates timestamp available status.

enet_qos_ptp_time_t	timeStamp
	Timestamp of frame.

struct enet_qos_tx_dirty_ring_t

Data Fields
enet_qos_frame_info_t *	txDirtyBase
	Dirty buffer descriptor base address pointer. More...

uint16_t	txGenIdx
	tx generate index. More...

uint16_t	txConsumIdx
	tx consume index. More...

uint16_t	txRingLen
	tx ring length. More...

bool	isFull
	tx ring is full flag, add this parameter to avoid waste one element. More...

Field Documentation

enet_qos_frame_info_t* enet_qos_tx_dirty_ring_t::txDirtyBase

uint16_t enet_qos_tx_dirty_ring_t::txGenIdx

uint16_t enet_qos_tx_dirty_ring_t::txConsumIdx

uint16_t enet_qos_tx_dirty_ring_t::txRingLen

bool enet_qos_tx_dirty_ring_t::isFull

struct enet_qos_ptp_config_t

Data Fields
bool	fineUpdateEnable
	Use the fine update. More...

uint32_t	defaultAddend
	Default addend value when fine update is enable, could be 2^32 / (refClk_Hz / ENET_QOS_MICRSECS_ONESECOND / ENET_QOS_SYSTIME_REQUIRED_CLK_MHZ). More...

bool	ptp1588V2Enable
	The desired system time frequency. More...

enet_qos_ts_rollover_type	tsRollover
	1588 time nanosecond rollover. More...

Field Documentation

bool enet_qos_ptp_config_t::fineUpdateEnable

uint32_t enet_qos_ptp_config_t::defaultAddend

bool enet_qos_ptp_config_t::ptp1588V2Enable

Must be lower than reference clock. (Only used with fine correction method). ptp 1588 version 2 is used.

enet_qos_ts_rollover_type enet_qos_ptp_config_t::tsRollover

struct enet_qos_est_gate_op_t

struct enet_qos_est_gcl_t

Data Fields
bool	enable
	Enable or disable EST.

uint64_t	cycleTime
	Base Time 32 bits seconds 32 bits nanoseconds.

uint32_t	extTime
	Cycle Time 32 bits seconds 32 bits nanoseconds.

uint32_t	numEntries
	Time Extension 32 bits seconds 32 bits nanoseconds.

enet_qos_est_gate_op_t *	opList
	Number of entries.

struct enet_qos_rxp_config_t

Data Fields
uint32_t	matchEnable
	4-byte match data used for comparing with incoming packet

uint8_t	acceptFrame: 1
	When matchEnable is set to 1, the matchData is used for comparing.

uint8_t	rejectFrame: 1
	When acceptFrame = 1 and data is matched, the frame will be sent to DMA channel.

uint8_t	inverseMatch: 1
	When rejectFrame = 1 and data is matched, the frame will be dropped.

uint8_t	nextControl: 1
	Inverse match.

uint8_t	reserved: 4
	Next instruction indexing control.

uint8_t	frameOffset
	Reserved control fields.

uint8_t	okIndex
	Frame offset in the packet data to be compared for match, in terms of 4 bytes. More...

uint8_t	dmaChannel
	Memory Index to be used next. More...

uint32_t	reserved2
	The DMA channel enet_qos_rxp_dma_chn_t used for receiving the frame when frame match and acceptFrame = 1.

Field Documentation

uint8_t enet_qos_rxp_config_t::okIndex

uint8_t enet_qos_rxp_config_t::dmaChannel

struct enet_qos_buffer_config_t

Notes:

The receive and transmit descriptor start address pointer and tail pointer must be word-aligned.
The recommended minimum tx/rx ring length is 4.
The tx/rx descriptor tail address shall be the address pointer to the address just after the end of the last last descriptor. because only the descriptors between the start address and the tail address will be used by DMA.
The descriptor address is the start address of all used contiguous memory. for example, the rxDescStartAddrAlign is the start address of rxRingLen contiguous descriptor memories for rx descriptor ring 0.
The "*rxBufferstartAddr" is the first element of rxRingLen (2*rxRingLen for double buffers) rx buffers. It means the *rxBufferStartAddr is the rx buffer for the first descriptor the *rxBufferStartAddr + 1 is the rx buffer for the second descriptor or the rx buffer for the second buffer in the first descriptor. so please make sure the rxBufferStartAddr is the address of a rxRingLen or 2*rxRingLen array.

Data Fields
uint8_t	rxRingLen
	The length of receive buffer descriptor ring. More...

uint8_t	txRingLen
	The length of transmit buffer descriptor ring. More...

enet_qos_tx_bd_struct_t *	txDescStartAddrAlign
	Aligned transmit descriptor start address. More...

enet_qos_tx_bd_struct_t *	txDescTailAddrAlign
	Aligned transmit descriptor tail address. More...

enet_qos_frame_info_t *	txDirtyStartAddr
	Start address of the dirty tx frame information. More...

enet_qos_rx_bd_struct_t *	rxDescStartAddrAlign
	Aligned receive descriptor start address. More...

enet_qos_rx_bd_struct_t *	rxDescTailAddrAlign
	Aligned receive descriptor tail address. More...

uint32_t *	rxBufferStartAddr
	Start address of the rx buffers. More...

uint32_t	rxBuffSizeAlign
	Aligned receive data buffer size. More...

bool	rxBuffNeedMaintain
	Whether receive data buffer need cache maintain. More...

Field Documentation

uint8_t enet_qos_buffer_config_t::rxRingLen

uint8_t enet_qos_buffer_config_t::txRingLen

enet_qos_tx_bd_struct_t* enet_qos_buffer_config_t::txDescStartAddrAlign

enet_qos_tx_bd_struct_t* enet_qos_buffer_config_t::txDescTailAddrAlign

enet_qos_frame_info_t* enet_qos_buffer_config_t::txDirtyStartAddr

enet_qos_rx_bd_struct_t* enet_qos_buffer_config_t::rxDescStartAddrAlign

enet_qos_rx_bd_struct_t* enet_qos_buffer_config_t::rxDescTailAddrAlign

uint32_t* enet_qos_buffer_config_t::rxBufferStartAddr

uint32_t enet_qos_buffer_config_t::rxBuffSizeAlign

bool enet_qos_buffer_config_t::rxBuffNeedMaintain

struct enet_qos_cbs_config_t

Data Fields
uint16_t	sendSlope
	Send slope configuration. More...

uint16_t	idleSlope
	Idle slope configuration. More...

uint32_t	highCredit
	High credit. More...

uint32_t	lowCredit
	Low credit. More...

Field Documentation

uint16_t enet_qos_cbs_config_t::sendSlope

uint16_t enet_qos_cbs_config_t::idleSlope

uint32_t enet_qos_cbs_config_t::highCredit

uint32_t enet_qos_cbs_config_t::lowCredit

struct enet_qos_queue_tx_config_t

Data Fields
enet_qos_queue_mode_t	mode
	tx queue mode configuration. More...

uint32_t	weight
	Refer to the MTL TxQ Quantum Weight register. More...

uint32_t	priority
	Refer to Transmit Queue Priority Mapping register. More...

enet_qos_cbs_config_t *	cbsConfig
	CBS configuration if queue use AVB mode. More...

Field Documentation

enet_qos_queue_mode_t enet_qos_queue_tx_config_t::mode

uint32_t enet_qos_queue_tx_config_t::weight

uint32_t enet_qos_queue_tx_config_t::priority

enet_qos_cbs_config_t* enet_qos_queue_tx_config_t::cbsConfig

struct enet_qos_queue_rx_config_t

Data Fields
enet_qos_queue_mode_t	mode
	rx queue mode configuration. More...

uint8_t	mapChannel
	tx queue map dma channel. More...

uint32_t	priority
	Rx queue priority. More...

enet_qos_rx_queue_route_t	packetRoute
	Receive packet routing. More...

Field Documentation

enet_qos_queue_mode_t enet_qos_queue_rx_config_t::mode

uint8_t enet_qos_queue_rx_config_t::mapChannel

uint32_t enet_qos_queue_rx_config_t::priority

enet_qos_rx_queue_route_t enet_qos_queue_rx_config_t::packetRoute

struct enet_qos_multiqueue_config_t

Data Fields
enet_qos_dma_burstlen	burstLen
	Burst len for the multi-queue. More...

uint8_t	txQueueUse
	Used Tx queue count. More...

enet_qos_mtl_multiqueue_txsche	mtltxSche
	Transmit schedule for multi-queue. More...

enet_qos_queue_tx_config_t	txQueueConfig [ENET_QOS_RING_NUM_MAX]
	Tx Queue configuration. More...

uint8_t	rxQueueUse
	Used Rx queue count. More...

enet_qos_mtl_multiqueue_rxsche	mtlrxSche
	Receive schedule for multi-queue. More...

enet_qos_queue_rx_config_t	rxQueueConfig [ENET_QOS_RING_NUM_MAX]
	Rx Queue configuration. More...

Field Documentation

enet_qos_dma_burstlen enet_qos_multiqueue_config_t::burstLen

uint8_t enet_qos_multiqueue_config_t::txQueueUse

enet_qos_mtl_multiqueue_txsche enet_qos_multiqueue_config_t::mtltxSche

enet_qos_queue_tx_config_t enet_qos_multiqueue_config_t::txQueueConfig[ENET_QOS_RING_NUM_MAX]

uint8_t enet_qos_multiqueue_config_t::rxQueueUse

enet_qos_mtl_multiqueue_rxsche enet_qos_multiqueue_config_t::mtlrxSche

enet_qos_queue_rx_config_t enet_qos_multiqueue_config_t::rxQueueConfig[ENET_QOS_RING_NUM_MAX]

struct enet_qos_config_t

Note:

Default the signal queue is used so the "*multiqueueCfg" is set default with NULL. Set the pointer with a valid configuration pointer if the multiple queues are required. If multiple queue is enabled, please make sure the buffer configuration for all are prepared also.

Data Fields
uint16_t	specialControl
	The logic or of enet_qos_special_config_t.

enet_qos_multiqueue_config_t *	multiqueueCfg
	Use multi-queue. More...

enet_qos_mii_mode_t	miiMode
	MII mode. More...

enet_qos_mii_speed_t	miiSpeed
	MII Speed. More...

enet_qos_mii_duplex_t	miiDuplex
	MII duplex. More...

uint16_t	pauseDuration
	Used in the tx flow control frame, only valid when kENET_QOS_FlowControlEnable is set. More...

enet_qos_ptp_config_t *	ptpConfig
	PTP 1588 feature configuration.

uint32_t	csrClock_Hz
	CSR clock frequency in HZ. More...

Field Documentation

enet_qos_multiqueue_config_t* enet_qos_config_t::multiqueueCfg

enet_qos_mii_mode_t enet_qos_config_t::miiMode

enet_qos_mii_speed_t enet_qos_config_t::miiSpeed

enet_qos_mii_duplex_t enet_qos_config_t::miiDuplex

uint16_t enet_qos_config_t::pauseDuration

uint32_t enet_qos_config_t::csrClock_Hz

struct enet_qos_tx_bd_ring_t

Data Fields
enet_qos_tx_bd_struct_t *	txBdBase
	Buffer descriptor base address pointer. More...

uint16_t	txGenIdx
	tx generate index. More...

uint16_t	txConsumIdx
	tx consume index. More...

volatile uint16_t	txDescUsed
	tx descriptor used number. More...

uint16_t	txRingLen
	tx ring length. More...

Field Documentation

enet_qos_tx_bd_struct_t* enet_qos_tx_bd_ring_t::txBdBase

uint16_t enet_qos_tx_bd_ring_t::txGenIdx

uint16_t enet_qos_tx_bd_ring_t::txConsumIdx

volatile uint16_t enet_qos_tx_bd_ring_t::txDescUsed

uint16_t enet_qos_tx_bd_ring_t::txRingLen

struct enet_qos_rx_bd_ring_t

Data Fields
enet_qos_rx_bd_struct_t *	rxBdBase
	Buffer descriptor base address pointer. More...

uint16_t	rxGenIdx
	The current available receive buffer descriptor pointer. More...

uint16_t	rxRingLen
	Receive ring length. More...

uint32_t	rxBuffSizeAlign
	Receive buffer size. More...

Field Documentation

enet_qos_rx_bd_struct_t* enet_qos_rx_bd_ring_t::rxBdBase

uint16_t enet_qos_rx_bd_ring_t::rxGenIdx

uint16_t enet_qos_rx_bd_ring_t::rxRingLen

uint32_t enet_qos_rx_bd_ring_t::rxBuffSizeAlign

struct _enet_qos_handle

Data Fields
uint8_t	txQueueUse
	Used tx queue count. More...

uint8_t	rxQueueUse
	Used rx queue count. More...

bool	doubleBuffEnable
	The double buffer is used in the descriptor. More...

bool	rxintEnable
	Rx interrupt enabled. More...

bool	rxMaintainEnable [ENET_QOS_RING_NUM_MAX]
	Rx buffer cache maintain enabled. More...

enet_qos_rx_bd_ring_t	rxBdRing [ENET_QOS_RING_NUM_MAX]
	Receive buffer descriptor. More...

enet_qos_tx_bd_ring_t	txBdRing [ENET_QOS_RING_NUM_MAX]
	Transmit buffer descriptor. More...

enet_qos_tx_dirty_ring_t	txDirtyRing [ENET_QOS_RING_NUM_MAX]
	Transmit dirty buffers addresses. More...

uint32_t *	rxBufferStartAddr [ENET_QOS_RING_NUM_MAX]
	Rx buffer start address for reInitialize. More...

enet_qos_callback_t	callback
	Callback function. More...

void *	userData
	Callback function parameter. More...

uint8_t	multicastCount [64]
	Multicast collisions counter.

Field Documentation

uint8_t enet_qos_handle_t::txQueueUse

uint8_t enet_qos_handle_t::rxQueueUse

bool enet_qos_handle_t::doubleBuffEnable

bool enet_qos_handle_t::rxintEnable

bool enet_qos_handle_t::rxMaintainEnable[ENET_QOS_RING_NUM_MAX]

enet_qos_rx_bd_ring_t enet_qos_handle_t::rxBdRing[ENET_QOS_RING_NUM_MAX]

enet_qos_tx_bd_ring_t enet_qos_handle_t::txBdRing[ENET_QOS_RING_NUM_MAX]

enet_qos_tx_dirty_ring_t enet_qos_handle_t::txDirtyRing[ENET_QOS_RING_NUM_MAX]

uint32_t* enet_qos_handle_t::rxBufferStartAddr[ENET_QOS_RING_NUM_MAX]

enet_qos_callback_t enet_qos_handle_t::callback

void* enet_qos_handle_t::userData

Macro Definition Documentation

#define FSL_ENET_QOS_DRIVER_VERSION (MAKE_VERSION(2, 3, 0))

#define ENET_QOS_RXDESCRIP_RD_BUFF1VALID_MASK (1UL << 24U)

Buffer1 address valid.

#define ENET_QOS_RXDESCRIP_RD_BUFF2VALID_MASK (1UL << 25U)

#define ENET_QOS_RXDESCRIP_RD_IOC_MASK (1UL << 30U)

#define ENET_QOS_RXDESCRIP_RD_OWN_MASK (1UL << 31U)

#define ENET_QOS_RXDESCRIP_WR_ERR_MASK ((1UL << 3U) | (1UL << 7U))

#define ENET_QOS_TXDESCRIP_RD_BL1_MASK (0x3fffUL)

#define ENET_QOS_TXDESCRIP_WB_TTSS_MASK (1UL << 17U)

#define ENET_QOS_RING_NUM_MAX (5U)

#define ENET_QOS_FRAME_MAX_FRAMELEN (1518U)

#define ENET_QOS_FCS_LEN (4U)

#define ENET_QOS_ADDR_ALIGNMENT (0x3U)

#define ENET_QOS_BUFF_ALIGNMENT (8U)

#define ENET_QOS_MTL_RXFIFOSIZE (8192U)

#define ENET_QOS_MTL_TXFIFOSIZE (8192U)

#define ENET_QOS_MACINT_ENUM_OFFSET (16U)

Typedef Documentation

typedef void(* enet_qos_callback_t)(ENET_QOS_Type *base, enet_qos_handle_t *handle, enet_qos_event_t event, uint8_t channel, void *userData)

Enumeration Type Documentation

anonymous enum

Enumerator
kStatus_ENET_QOS_RxFrameError	A frame received but data error happen.
kStatus_ENET_QOS_RxFrameFail	Failed to receive a frame.
kStatus_ENET_QOS_RxFrameEmpty	No frame arrive.
kStatus_ENET_QOS_TxFrameBusy	Transmit descriptors are under process.
kStatus_ENET_QOS_TxFrameFail	Transmit frame fail.
kStatus_ENET_QOS_TxFrameOverLen	Transmit oversize.
kStatus_ENET_QOS_Est_SwListBusy	SW Gcl List not yet processed by HW.
kStatus_ENET_QOS_Est_SwListWriteAbort	SW Gcl List write aborted .
kStatus_ENET_QOS_Est_InvalidParameter	Invalid parameter in Gcl List .
kStatus_ENET_QOS_Est_BtrError	Base Time Error when loading list.
kStatus_ENET_QOS_TrgtBusy	Target time register busy.
kStatus_ENET_QOS_Timeout	Target time register busy.
kStatus_ENET_QOS_PpsBusy	Pps command busy.

enum enet_qos_mii_mode_t

Enumerator
kENET_QOS_MiiMode	MII mode for data interface.
kENET_QOS_RgmiiMode	RGMII mode for data interface.
kENET_QOS_RmiiMode	RMII mode for data interface.

enum enet_qos_mii_speed_t

Enumerator
kENET_QOS_MiiSpeed10M	Speed 10 Mbps.
kENET_QOS_MiiSpeed100M	Speed 100 Mbps.
kENET_QOS_MiiSpeed1000M	Speed 1000 Mbps.
kENET_QOS_MiiSpeed2500M	Speed 2500 Mbps.

enum enet_qos_mii_duplex_t

Enumerator
kENET_QOS_MiiHalfDuplex	Half duplex mode.
kENET_QOS_MiiFullDuplex	Full duplex mode.

enum enet_qos_mii_normal_opcode

Enumerator
kENET_QOS_MiiWriteFrame	Write frame operation for a valid MII management frame.
kENET_QOS_MiiReadFrame	Read frame operation for a valid MII management frame.

enum enet_qos_dma_burstlen

Enumerator
kENET_QOS_BurstLen1	DMA burst length 1.
kENET_QOS_BurstLen2	DMA burst length 2.
kENET_QOS_BurstLen4	DMA burst length 4.
kENET_QOS_BurstLen8	DMA burst length 8.
kENET_QOS_BurstLen16	DMA burst length 16.
kENET_QOS_BurstLen32	DMA burst length 32.
kENET_QOS_BurstLen64	DMA burst length 64. eight times enabled.
kENET_QOS_BurstLen128	DMA burst length 128. eight times enabled.
kENET_QOS_BurstLen256	DMA burst length 256. eight times enabled.

enum enet_qos_desc_flag

Enumerator
kENET_QOS_MiddleFlag	It's a middle descriptor of the frame.
kENET_QOS_LastFlagOnly	It's the last descriptor of the frame.
kENET_QOS_FirstFlagOnly	It's the first descriptor of the frame.
kENET_QOS_FirstLastFlag	It's the first and last descriptor of the frame.

enum enet_qos_systime_op

Enumerator
kENET_QOS_SystimeAdd	System time add to.
kENET_QOS_SystimeSubtract	System time subtract.

enum enet_qos_ts_rollover_type

Enumerator
kENET_QOS_BinaryRollover	System time binary rollover.
kENET_QOS_DigitalRollover	System time digital rollover.

enum enet_qos_special_config_t

These control flags are provided for special user requirements. Normally, these is no need to set this control flags for ENET initialization. But if you have some special requirements, set the flags to specialControl in the enet_qos_config_t.

Note: "kENET_QOS_StoreAndForward" is recommended to be set.

Enumerator
kENET_QOS_DescDoubleBuffer	The double buffer is used in the tx/rx descriptor.
kENET_QOS_StoreAndForward	The rx/tx store and forward enable.
kENET_QOS_PromiscuousEnable	The promiscuous enabled.
kENET_QOS_FlowControlEnable	The flow control enabled.
kENET_QOS_BroadCastRxDisable	The broadcast disabled.
kENET_QOS_MulticastAllEnable	All multicast are passed.
kENET_QOS_8023AS2KPacket	8023as support for 2K packets.
kENET_QOS_HashMulticastEnable	The multicast packets are filtered through hash table.

enum enet_qos_dma_interrupt_enable_t

This enumeration uses one-bot encoding to allow a logical OR of multiple members.

Enumerator
kENET_QOS_DmaTx	Tx interrupt.
kENET_QOS_DmaTxStop	Tx stop interrupt.
kENET_QOS_DmaTxBuffUnavail	Tx buffer unavailable.
kENET_QOS_DmaRx	Rx interrupt.
kENET_QOS_DmaRxBuffUnavail	Rx buffer unavailable.
kENET_QOS_DmaRxStop	Rx stop.
kENET_QOS_DmaRxWatchdogTimeout	Rx watchdog timeout.
kENET_QOS_DmaEarlyTx	Early transmit.
kENET_QOS_DmaEarlyRx	Early receive.
kENET_QOS_DmaBusErr	Fatal bus error.

enum enet_qos_mac_interrupt_enable_t

This enumeration uses one-bot encoding to allow a logical OR of multiple members.

enum enet_qos_event_t

Enumerator
kENET_QOS_RxIntEvent	Receive interrupt event.
kENET_QOS_TxIntEvent	Transmit interrupt event.
kENET_QOS_WakeUpIntEvent	Wake up interrupt event.
kENET_QOS_TimeStampIntEvent	Time stamp interrupt event.

enum enet_qos_queue_mode_t

Enumerator
kENET_QOS_AVB_Mode	Enable queue in AVB mode.
kENET_QOS_DCB_Mode	Enable queue in DCB mode.

enum enet_qos_mtl_multiqueue_txsche

Enumerator
kENET_QOS_txWeightRR	Tx weight round-robin.
kENET_QOS_txWeightFQ	Tx weight fair queuing.
kENET_QOS_txDefictWeightRR	Tx deficit weighted round-robin.
kENET_QOS_txStrPrio	Tx strict priority.

enum enet_qos_mtl_multiqueue_rxsche

Enumerator
kENET_QOS_rxStrPrio	Rx strict priority, Queue 0 has the lowest priority.
kENET_QOS_rxWeightStrPrio	Weighted Strict Priority.

enum enet_qos_mtl_rxqueuemap_t

Enumerator
kENET_QOS_StaticDirctMap	The received fame in rx Qn(n = 0,1) directly map to dma channel n.
kENET_QOS_DynamicMap	The received frame in rx Qn(n = 0,1) map to the dma channel m(m = 0,1) related with the same Mac.

enum enet_qos_rx_queue_route_t

enum enet_qos_ptp_event_type_t

Enumerator
kENET_QOS_PtpEventMsgType	PTP event message type.
kENET_QOS_PtpSrcPortIdLen	PTP message sequence id length.
kENET_QOS_PtpEventPort	PTP event port number.
kENET_QOS_PtpGnrlPort	PTP general port number.

enum enet_qos_ptp_pps_instance_t

Enumerator
kENET_QOS_PtpPpsIstance0	PPS instance 0.
kENET_QOS_PtpPpsIstance1	PPS instance 1.
kENET_QOS_PtpPpsIstance2	PPS instance 2.
kENET_QOS_PtpPpsIstance3	PPS instance 3.

enum enet_qos_ptp_pps_trgt_mode_t

Enumerator
kENET_QOS_PtpPpsTrgtModeOnlyInt	Only interrupts.
kENET_QOS_PtpPpsTrgtModeIntSt	Both interrupt and output signal.
kENET_QOS_PtpPpsTrgtModeOnlySt	Only output signal.

enum enet_qos_ptp_pps_cmd_t

Enumerator
kENET_QOS_PtpPpsCmdNC	No Command.
kENET_QOS_PtpPpsCmdSSP	Start Single Pulse.
kENET_QOS_PtpPpsCmdSPT	Start Pulse Train.
kENET_QOS_PtpPpsCmdCS	Cancel Start.
kENET_QOS_PtpPpsCmdSPTAT	Stop Pulse Train At Time.
kENET_QOS_PtpPpsCmdSPTI	Stop Pulse Train Immediately.
kENET_QOS_PtpPpsCmdCSPT	Cancel Stop Pulse Train.

enum enet_qos_ets_list_length_t

Enumerator
kENET_QOS_Ets_List_64	List length of 64.
kENET_QOS_Ets_List_128	List length of 128.
kENET_QOS_Ets_List_256	List length of 256.
kENET_QOS_Ets_List_512	List length of 512.
kENET_QOS_Ets_List_1024	List length of 1024.

enum enet_qos_ets_gccr_addr_t

Enumerator
kENET_QOS_Ets_btr_low	BTR Low.
kENET_QOS_Ets_btr_high	BTR High.
kENET_QOS_Ets_ctr_low	CTR Low.
kENET_QOS_Ets_ctr_high	CTR High.
kENET_QOS_Ets_ter	TER.
kENET_QOS_Ets_llr	LLR.

enum enet_qos_rxp_dma_chn_t

Enumerator
kENET_QOS_Rxp_DMAChn0	DMA Channel 0 used for RXP entry match.
kENET_QOS_Rxp_DMAChn1	DMA Channel 1 used for RXP entry match.
kENET_QOS_Rxp_DMAChn2	DMA Channel 2 used for RXP entry match.
kENET_QOS_Rxp_DMAChn3	DMA Channel 3 used for RXP entry match.
kENET_QOS_Rxp_DMAChn4	DMA Channel 4 used for RXP entry match.

Function Documentation

void ENET_QOS_GetDefaultConfig ( enet_qos_config_t * config )

The purpose of this API is to get the default ENET configure structure for ENET_QOS_Init(). User may use the initialized structure unchanged in ENET_QOS_Init(), or modify some fields of the structure before calling ENET_QOS_Init(). Example:

enet_qos_config_t config;

ENET_QOS_GetDefaultConfig(&config);

Parameters

config The ENET mac controller configuration structure pointer.

status_t ENET_QOS_Up	(	ENET_QOS_Type *	base,
		const enet_qos_config_t *	config,
		uint8_t *	macAddr,
		uint8_t	macCount,
		uint32_t	refclkSrc_Hz
	)

This function initializes it with the ENET basic configuration.

Parameters

base	ENET peripheral base address.
config	ENET mac configuration structure pointer. The "enet_qos_config_t" type mac configuration return from ENET_QOS_GetDefaultConfig can be used directly. It is also possible to verify the Mac configuration using other methods.
macAddr	Pointer to ENET mac address array of Ethernet device. This MAC address should be provided.
macCount	Count of macAddr in the ENET mac address array
refclkSrc_Hz	ENET input reference clock.

status_t ENET_QOS_Init	(	ENET_QOS_Type *	base,
		const enet_qos_config_t *	config,
		uint8_t *	macAddr,
		uint8_t	macCount,
		uint32_t	refclkSrc_Hz
	)

This function ungates the module clock and initializes it with the ENET basic configuration.

Parameters

base	ENET peripheral base address.
config	ENET mac configuration structure pointer. The "enet_qos_config_t" type mac configuration return from ENET_QOS_GetDefaultConfig can be used directly. It is also possible to verify the Mac configuration using other methods.
macAddr	Pointer to ENET mac address array of Ethernet device. This MAC address should be provided.
macCount	Count of macAddr in the ENET mac address array
refclkSrc_Hz	ENET input reference clock.

void ENET_QOS_Down ( ENET_QOS_Type * base )

This function disables the ENET module.

param base ENET peripheral base address.

void ENET_QOS_Deinit ( ENET_QOS_Type * base )

This function gates the module clock and disables the ENET module.

Parameters

base	ENET peripheral base address.

uint32_t ENET_QOS_GetInstance ( ENET_QOS_Type * base )

Parameters

base	ENET peripheral base address.

Returns: ENET instance.

status_t ENET_QOS_DescriptorInit	(	ENET_QOS_Type *	base,
		enet_qos_config_t *	config,
		enet_qos_buffer_config_t *	bufferConfig
	)

Note: This function is do all tx/rx descriptors initialization. Because this API read all interrupt registers first and then set the interrupt flag for all descriptors, if the interrupt register is set. so the descriptor initialization should be called after ENET_QOS_Init(), ENET_QOS_EnableInterrupts() and ENET_QOS_CreateHandle()(if transactional APIs are used).

Parameters

base	ENET peripheral base address.
config	The configuration for ENET.
bufferConfig	All buffers configuration.

void ENET_QOS_StartRxTx	(	ENET_QOS_Type *	base,
		uint8_t	txRingNum,
		uint8_t	rxRingNum
	)

This function enable the tx/rx and starts the rx/tx DMA. This shall be set after ENET initialization and before starting to receive the data.

Parameters

base	ENET peripheral base address.
rxRingNum	The number of the used rx rings. It shall not be larger than the ENET_QOS_RING_NUM_MAX(2). If the ringNum is set with 1, the ring 0 will be used.
txRingNum	The number of the used tx rings. It shall not be larger than the ENET_QOS_RING_NUM_MAX(2). If the ringNum is set with 1, the ring 0 will be used.

Note: This must be called after all the ENET initialization. And should be called when the ENET receive/transmit is required.

static void ENET_QOS_SetMII	(	ENET_QOS_Type *	base,
		enet_qos_mii_speed_t	speed,
		enet_qos_mii_duplex_t	duplex
	)

inlinestatic

This API is provided to dynamically change the speed and duplex for MAC.

Parameters

base	ENET peripheral base address.
speed	The speed of the RMII mode.
duplex	The duplex of the RMII mode.

void ENET_QOS_SetSMI	(	ENET_QOS_Type *	base,
		uint32_t	csrClock_Hz
	)

Parameters

base	ENET peripheral base address.
csrClock_Hz	CSR clock frequency in HZ

static bool ENET_QOS_IsSMIBusy ( ENET_QOS_Type * base )

inlinestatic

Parameters

base	ENET peripheral base address.

Returns: The status of MII Busy status.

static uint16_t ENET_QOS_ReadSMIData ( ENET_QOS_Type * base )

inlinestatic

Parameters

base	ENET peripheral base address.

Returns: The data read from PHY

void ENET_QOS_StartSMIRead	(	ENET_QOS_Type *	base,
		uint32_t	phyAddr,
		uint32_t	phyReg
	)

support both MDIO IEEE802.3 Clause 22 and clause 45.

Parameters

base	ENET peripheral base address.
phyAddr	The PHY address.
phyReg	The PHY register.

void ENET_QOS_StartSMIWrite	(	ENET_QOS_Type *	base,
		uint32_t	phyAddr,
		uint32_t	phyReg,
		uint32_t	data
	)

support both MDIO IEEE802.3 Clause 22 and clause 45.

Parameters

base	ENET peripheral base address.
phyAddr	The PHY address.
phyReg	The PHY register.
data	The data written to PHY.

static void ENET_QOS_SetMacAddr	(	ENET_QOS_Type *	base,
		uint8_t *	macAddr,
		uint8_t	index
	)

inlinestatic

Parameters

base	ENET peripheral base address.
macAddr	The six-byte Mac address pointer. The pointer is allocated by application and input into the API.
index	Configure macAddr to MAC_ADDRESS[index] register.

void ENET_QOS_GetMacAddr	(	ENET_QOS_Type *	base,
		uint8_t *	macAddr,
		uint8_t	index
	)

Parameters

base	ENET peripheral base address.
macAddr	The six-byte Mac address pointer. The pointer is allocated by application and input into the API.
index	Get macAddr from MAC_ADDRESS[index] register.

void ENET_QOS_AddMulticastGroup	(	ENET_QOS_Type *	base,
		uint8_t *	address
	)

Parameters

base	ENET_QOS peripheral base address.
address	The six-byte multicast group address which is provided by application.

void ENET_QOS_LeaveMulticastGroup	(	ENET_QOS_Type *	base,
		uint8_t *	address
	)

param base ENET_QOS peripheral base address. param address The six-byte multicast group address which is provided by application.

static void ENET_QOS_AcceptAllMulticast ( ENET_QOS_Type * base )

inlinestatic

Parameters

base	ENET peripheral base address.

static void ENET_QOS_RejectAllMulticast ( ENET_QOS_Type * base )

inlinestatic

Parameters

base	ENET peripheral base address.

void ENET_QOS_EnterPowerDown	(	ENET_QOS_Type *	base,
		uint32_t *	wakeFilter
	)

the remote power wake up frame and magic frame can wake up the ENET from the power down mode.

Parameters

base	ENET peripheral base address.
wakeFilter	The wakeFilter provided to configure the wake up frame filter. Set the wakeFilter to NULL is not required. But if you have the filter requirement, please make sure the wakeFilter pointer shall be eight continuous 32-bits configuration.

static void ENET_QOS_ExitPowerDown ( ENET_QOS_Type * base )

inlinestatic

Exit from the power down mode and recover to normal work mode.

Parameters

base	ENET peripheral base address.

status_t ENET_QOS_EnableRxParser	(	ENET_QOS_Type *	base,
		bool	enable
	)

Parameters

base	ENET_QOS peripheral base address.
enable	Enable/Disable Rx parser function

Return values

kStatus_Success	Configure rx parser success.
kStatus_ENET_QOS_Timeout	Poll status flag timeout.

void ENET_QOS_EnableInterrupts	(	ENET_QOS_Type *	base,
		uint32_t	mask
	)

This function enables the ENET interrupt according to the provided mask. The mask is a logical OR of enet_qos_dma_interrupt_enable_t and enet_qos_mac_interrupt_enable_t. For example, to enable the dma and mac interrupt, do the following.

* ENET_QOS_EnableInterrupts(ENET, kENET_QOS_DmaRx | kENET_QOS_DmaTx | kENET_QOS_MacPmt);

*

Parameters

base	ENET peripheral base address.
mask	ENET interrupts to enable. This is a logical OR of both enumeration :: enet_qos_dma_interrupt_enable_t and enet_qos_mac_interrupt_enable_t.

void ENET_QOS_DisableInterrupts	(	ENET_QOS_Type *	base,
		uint32_t	mask
	)

This function disables the ENET interrupt according to the provided mask. The mask is a logical OR of enet_qos_dma_interrupt_enable_t and enet_qos_mac_interrupt_enable_t. For example, to disable the dma and mac interrupt, do the following.

* ENET_QOS_DisableInterrupts(ENET, kENET_QOS_DmaRx | kENET_QOS_DmaTx | kENET_QOS_MacPmt);

*

Parameters

base	ENET peripheral base address.
mask	ENET interrupts to disables. This is a logical OR of both enumeration :: enet_qos_dma_interrupt_enable_t and enet_qos_mac_interrupt_enable_t.

static uint32_t ENET_QOS_GetDmaInterruptStatus	(	ENET_QOS_Type *	base,
		uint8_t	channel
	)

inlinestatic

Parameters

base	ENET peripheral base address.
channel	The DMA Channel. Shall not be larger than ENET_QOS_RING_NUM_MAX.

Returns: The event status of the interrupt source. This is the logical OR of members of the enumeration :: enet_qos_dma_interrupt_enable_t.

static void ENET_QOS_ClearDmaInterruptStatus	(	ENET_QOS_Type *	base,
		uint8_t	channel,
		uint32_t	mask
	)

inlinestatic

Parameters

base	ENET peripheral base address.
channel	The DMA Channel. Shall not be larger than ENET_QOS_RING_NUM_MAX.
mask	The interrupt status to be cleared. This is the logical OR of members of the enumeration :: enet_qos_dma_interrupt_enable_t.

static uint32_t ENET_QOS_GetMacInterruptStatus ( ENET_QOS_Type * base )

inlinestatic

Parameters

base	ENET peripheral base address.

Returns: The event status of the interrupt source. Use the enum in enet_qos_mac_interrupt_enable_t and right shift ENET_QOS_MACINT_ENUM_OFFSET to mask the returned value to get the exact interrupt status.

void ENET_QOS_ClearMacInterruptStatus	(	ENET_QOS_Type *	base,
		uint32_t	mask
	)

This function clears enabled ENET interrupts according to the provided mask. The mask is a logical OR of enumeration members. See the enet_qos_mac_interrupt_enable_t. For example, to clear the TX frame interrupt and RX frame interrupt, do the following.

* ENET_QOS_ClearMacInterruptStatus(ENET, kENET_QOS_MacPmt);

*

Parameters

base	ENET peripheral base address.
mask	ENET interrupt source to be cleared. This is the logical OR of members of the enumeration :: enet_qos_mac_interrupt_enable_t.

static bool ENET_QOS_IsTxDescriptorDmaOwn ( enet_qos_tx_bd_struct_t * txDesc )

inlinestatic

Parameters

txDesc The given tx descriptor.

Return values

True	the dma own tx descriptor, false application own tx descriptor.

void ENET_QOS_SetupTxDescriptor	(	enet_qos_tx_bd_struct_t *	txDesc,
		void *	buffer1,
		uint32_t	bytes1,
		void *	buffer2,
		uint32_t	bytes2,
		uint32_t	framelen,
		bool	intEnable,
		bool	tsEnable,
		enet_qos_desc_flag	flag,
		uint8_t	slotNum
	)

This function is a low level functional API to setup or prepare a given tx descriptor.

Parameters

txDesc	The given tx descriptor.
buffer1	The first buffer address in the descriptor.
bytes1	The bytes in the fist buffer.
buffer2	The second buffer address in the descriptor.
bytes2	The bytes in the second buffer.
framelen	The length of the frame to be transmitted.
intEnable	Interrupt enable flag.
tsEnable	The timestamp enable.
flag	The flag of this tx descriptor, enet_qos_desc_flag .
slotNum	The slot num used for AV only.

Note: This must be called after all the ENET initialization. And should be called when the ENET receive/transmit is required. Transmit buffers are 'zero-copy' buffers, so the buffer must remain in memory until the packet has been fully transmitted. The buffers should be free or requeued in the transmit interrupt irq handler.

static void ENET_QOS_UpdateTxDescriptorTail	(	ENET_QOS_Type *	base,
		uint8_t	channel,
		uint32_t	txDescTailAddrAlign
	)

inlinestatic

This function is a low level functional API to update the the tx descriptor tail. This is called after you setup a new tx descriptor to update the tail pointer to make the new descriptor accessible by DMA.

Parameters

base	ENET peripheral base address.
channel	The tx DMA channel.
txDescTailAddrAlign	The new tx tail pointer address.

static void ENET_QOS_UpdateRxDescriptorTail	(	ENET_QOS_Type *	base,
		uint8_t	channel,
		uint32_t	rxDescTailAddrAlign
	)

inlinestatic

This function is a low level functional API to update the the rx descriptor tail. This is called after you setup a new rx descriptor to update the tail pointer to make the new descriptor accessible by DMA and to anouse the rx poll command for DMA.

Parameters

base	ENET peripheral base address.
channel	The rx DMA channel.
rxDescTailAddrAlign	The new rx tail pointer address.

static uint32_t ENET_QOS_GetRxDescriptor ( enet_qos_rx_bd_struct_t * rxDesc )

inlinestatic

This function is a low level functional API to get the the status flag from a given rx descriptor.

Parameters

rxDesc The given rx descriptor.

Return values

The	RDES3 regions for write-back format rx buffer descriptor.

Note: This must be called after all the ENET initialization. And should be called when the ENET receive/transmit is required.

void ENET_QOS_UpdateRxDescriptor	(	enet_qos_rx_bd_struct_t *	rxDesc,
		void *	buffer1,
		void *	buffer2,
		bool	intEnable,
		bool	doubleBuffEnable
	)

This function is a low level functional API to Updates the buffers and the own status for a given rx descriptor.

Parameters

rxDesc	The given rx descriptor.
buffer1	The first buffer address in the descriptor.
buffer2	The second buffer address in the descriptor.
intEnable	Interrupt enable flag.
doubleBuffEnable	The double buffer enable flag.

Note: This must be called after all the ENET initialization. And should be called when the ENET receive/transmit is required.

status_t ENET_QOS_ConfigureRxParser	(	ENET_QOS_Type *	base,
		enet_qos_rxp_config_t *	rxpConfig,
		uint16_t	entryCount
	)

This function is used to configure the flexible rx parser table.

Parameters

base	ENET peripheral base address..
rxpConfig	The rx parser configuration pointer.
entryCount	The rx parser entry count.

Return values

kStatus_Success	Configure rx parser success.
kStatus_ENET_QOS_Timeout	Poll status flag timeout.

status_t ENET_QOS_ReadRxParser	(	ENET_QOS_Type *	base,
		enet_qos_rxp_config_t *	rxpConfig,
		uint16_t	entryIndex
	)

This function is used to read flexible rx parser configuration at specified index.

Parameters

base	ENET peripheral base address..
rxpConfig	The rx parser configuration pointer.
entryIndex	The rx parser entry index to read, start from 0.

Return values

kStatus_Success	Configure rx parser success.
kStatus_ENET_QOS_Timeout	Poll status flag timeout.

status_t ENET_QOS_EstProgramGcl	(	ENET_QOS_Type *	base,
		enet_qos_est_gcl_t *	gcl,
		uint32_t	ptpClk_Hz
	)

This function is used to program the Enhanced Scheduled Transmisson. (IEEE802.1Qbv)

Parameters

base	ENET peripheral base address..
gcl	Pointer to the Gate Control List structure.
ptpClk_Hz	frequency of the PTP clock.

status_t ENET_QOS_EstReadGcl	(	ENET_QOS_Type *	base,
		enet_qos_est_gcl_t *	gcl,
		uint32_t	listLen,
		bool	hwList
	)

This function is used to read the Enhanced Scheduled Transmisson list. (IEEE802.1Qbv)

Parameters

base	ENET peripheral base address..
gcl	Pointer to the Gate Control List structure.
listLen	length of the provided opList array in gcl structure.
hwList	Boolean if True read HW list, false read SW list.

static void ENET_QOS_FpeEnable ( ENET_QOS_Type * base )

inlinestatic

This function is used to enable frame preemption. (IEEE802.1Qbu)

Parameters

base	ENET peripheral base address..

static void ENET_QOS_FpeDisable ( ENET_QOS_Type * base )

inlinestatic

This function is used to disable frame preemption. (IEEE802.1Qbu)

Parameters

base	ENET peripheral base address..

static void ENET_QOS_FpeConfigPreemptable	(	ENET_QOS_Type *	base,
		uint8_t	queueMask
	)

inlinestatic

This function is used to configure the preemptable queues. (IEEE802.1Qbu)

Parameters

base	ENET peripheral base address..
queueMask	bitmask representing queues to set in preemptable mode. The N-th bit represents the queue N.

void ENET_QOS_AVBConfigure	(	ENET_QOS_Type *	base,
		const enet_qos_cbs_config_t *	config,
		uint8_t	queueIndex
	)

ENET_QOS AVB feature configuration, set transmit bandwidth. This API is called when the AVB feature is required.

Parameters

base	ENET_QOS peripheral base address.
config	The ENET_QOS AVB feature configuration structure.
queueIndex	ENET_QOS queue index.

void ENET_QOS_CreateHandler	(	ENET_QOS_Type *	base,
		enet_qos_handle_t *	handle,
		enet_qos_config_t *	config,
		enet_qos_buffer_config_t *	bufferConfig,
		enet_qos_callback_t	callback,
		void *	userData
	)

This is a transactional API and it's provided to store all data which are needed during the whole transactional process. This API should not be used when you use functional APIs to do data tx/rx. This is function will store many data/flag for transactional use, so all configure API such as ENET_QOS_Init(), ENET_QOS_DescriptorInit(), ENET_QOS_EnableInterrupts() etc.

Note

as our transactional transmit API use the zero-copy transmit buffer. so there are two thing we emphasize here:

tx buffer free/requeue for application should be done in the tx interrupt handler. Please set callback: kENET_QOS_TxIntEvent with tx buffer free/requeue process APIs.
the tx interrupt is forced to open.

Parameters

base	ENET peripheral base address.
handle	ENET handler.
config	ENET configuration.
bufferConfig	ENET buffer configuration.
callback	The callback function.
userData	The application data.

status_t ENET_QOS_GetRxFrameSize	(	ENET_QOS_Type *	base,
		enet_qos_handle_t *	handle,
		uint32_t *	length,
		uint8_t	channel
	)

This function gets a received frame size from the ENET buffer descriptors.

Note: The FCS of the frame is automatically removed by MAC and the size is the length without the FCS. After calling ENET_QOS_GetRxFrameSize, ENET_QOS_ReadFrame() should be called to update the receive buffers If the result is not "kStatus_ENET_QOS_RxFrameEmpty".

Parameters

base	ENET peripheral base address.
handle	The ENET handler structure. This is the same handler pointer used in the ENET_QOS_Init.
length	The length of the valid frame received.
channel	The DMAC channel for the rx.

Return values

kStatus_ENET_QOS_RxFrameEmpty	No frame received. Should not call ENET_QOS_ReadFrame to read frame.
kStatus_ENET_QOS_RxFrameError	Data error happens. ENET_QOS_ReadFrame should be called with NULL data and NULL length to update the receive buffers.
kStatus_Success	Receive a frame Successfully then the ENET_QOS_ReadFrame should be called with the right data buffer and the captured data length input.

status_t ENET_QOS_ReadFrame	(	ENET_QOS_Type *	base,
		enet_qos_handle_t *	handle,
		uint8_t *	data,
		uint32_t	length,
		uint8_t	channel,
		enet_qos_ptp_time_t *	ts
	)

This function reads a frame from the ENET DMA descriptors. The ENET_QOS_GetRxFrameSize should be used to get the size of the prepared data buffer. For example use rx dma channel 0:

*       uint32_t length;
*       enet_qos_handle_t g_handle;
*       status = ENET_QOS_GetRxFrameSize(&g_handle, &length, 0);
*       if (length != 0)
*       {
*           uint8_t *data = memory allocate interface;
*           if (!data)
*           {
*               ENET_QOS_ReadFrame(ENET, &g_handle, NULL, 0, 0);
*           }
*           else
*           {
*              status = ENET_QOS_ReadFrame(ENET, &g_handle, data, length, 0);
*           }
*       }
*       else if (status == kStatus_ENET_QOS_RxFrameError)
*       {
*           ENET_QOS_ReadFrame(ENET, &g_handle, NULL, 0, 0);
*       }
* 

Parameters

base	ENET peripheral base address.
handle	The ENET handler structure. This is the same handler pointer used in the ENET_QOS_Init.
data	The data buffer provided by user to store the frame which memory size should be at least "length".
length	The size of the data buffer which is still the length of the received frame.
channel	The rx DMA channel. shall not be larger than 2.
ts	Pointer to the structure enet_qos_ptp_time_t to save frame timestamp.

Returns: The execute status, successful or failure.

status_t ENET_QOS_SendFrame	(	ENET_QOS_Type *	base,
		enet_qos_handle_t *	handle,
		uint8_t *	data,
		uint32_t	length,
		uint8_t	channel,
		bool	isNeedTs,
		void *	context
	)

Note: The CRC is automatically appended to the data. Input the data to send without the CRC.

Parameters

base	ENET peripheral base address.
handle	The ENET handler pointer. This is the same handler pointer used in the ENET_QOS_Init.
data	The data buffer provided by user to be send.
length	The length of the data to be send.
channel	Channel to send the frame, same with queue index.
isNeedTs	True to enable timestamp save for the frame
context	pointer to user context to be kept in the tx dirty frame information.

Return values

kStatus_Success	Send frame succeed.
kStatus_ENET_QOS_TxFrameBusy	Transmit buffer descriptor is busy under transmission. The transmit busy happens when the data send rate is over the MAC capacity. The waiting mechanism is recommended to be added after each call return with kStatus_ENET_QOS_TxFrameBusy.

void ENET_QOS_ReclaimTxDescriptor	(	ENET_QOS_Type *	base,
		enet_qos_handle_t *	handle,
		uint8_t	channel
	)

This function is used to update the tx descriptor status and store the tx timestamp when the 1588 feature is enabled. This is called by the transmit interrupt IRQ handler after the complete of a frame transmission.

Parameters

base	ENET peripheral base address.
handle	The ENET handler pointer. This is the same handler pointer used in the ENET_QOS_Init.
channel	The tx DMA channel.

void ENET_QOS_CommonIRQHandler	(	ENET_QOS_Type *	base,
		enet_qos_handle_t *	handle
	)

Parameters

base	ENET peripheral base address.
handle	The ENET handler pointer.

void ENET_QOS_SetISRHandler	(	ENET_QOS_Type *	base,
		enet_qos_isr_t	ISRHandler
	)

Parameters

base	ENET peripheral base address.
ISRHandler	The handler to install.

status_t ENET_QOS_Ptp1588CorrectTimerInCoarse	(	ENET_QOS_Type *	base,
		enet_qos_systime_op	operation,
		uint32_t	second,
		uint32_t	nanosecond
	)

Parameters

base	ENET peripheral base address.
operation	The system time operation, refer to "enet_qos_systime_op"
second	The correction second.
nanosecond	The correction nanosecond.

status_t ENET_QOS_Ptp1588CorrectTimerInFine	(	ENET_QOS_Type *	base,
		uint32_t	addend
	)

Parameters

base	ENET peripheral base address.
addend	The addend value to be set in the fine method

Note: Should take refer to the chapter "System time correction" and see the description for the "fine correction method".

static uint32_t ENET_QOS_Ptp1588GetAddend ( ENET_QOS_Type * base )

inlinestatic

Parameters

base	ENET peripheral base address.

Returns: The addend value.

void ENET_QOS_Ptp1588GetTimerNoIRQDisable	(	ENET_QOS_Type *	base,
		uint64_t *	second,
		uint32_t *	nanosecond
	)

Parameters

base	ENET peripheral base address.
second	The PTP 1588 system timer second.
nanosecond	The PTP 1588 system timer nanosecond. For the unit of the nanosecond is 1ns. so the nanosecond is the real nanosecond.

static status_t ENET_Ptp1588PpsControl	(	ENET_QOS_Type *	base,
		enet_qos_ptp_pps_instance_t	instance,
		enet_qos_ptp_pps_trgt_mode_t	trgtMode,
		enet_qos_ptp_pps_cmd_t	cmd
	)

inlinestatic

All channels operate in flexible PPS output mode.

Parameters

base	ENET peripheral base address.
instance	The ENET QOS PTP PPS instance.
trgtMode	The target time register mode.
cmd	The target flexible PPS output control command.

status_t ENET_QOS_Ptp1588PpsSetTrgtTime	(	ENET_QOS_Type *	base,
		enet_qos_ptp_pps_instance_t	instance,
		uint32_t	seconds,
		uint32_t	nanoseconds
	)

Parameters

base	ENET QOS peripheral base address.
instance	The ENET QOS PTP PPS instance.
seconds	The target seconds.
nanoseconds	The target nanoseconds.

static void ENET_QOS_Ptp1588PpsSetWidth	(	ENET_QOS_Type *	base,
		enet_qos_ptp_pps_instance_t	instance,
		uint32_t	width
	)

inlinestatic

param base ENET QOS peripheral base address. param instance The ENET QOS PTP PPS instance. param width Signal Width. It is stored in terms of number of units of sub-second increment value. The width value must be lesser than interval value.

static void ENET_QOS_Ptp1588PpsSetInterval	(	ENET_QOS_Type *	base,
		enet_qos_ptp_pps_instance_t	instance,
		uint32_t	interval
	)

inlinestatic

param base ENET QOS peripheral base address. param instance The ENET QOS PTP PPS instance. param interval Signal Interval. It is stored in terms of number of units of sub-second increment value.

void ENET_QOS_Ptp1588GetTimer	(	ENET_QOS_Type *	base,
		uint64_t *	second,
		uint32_t *	nanosecond
	)

Parameters

base	ENET peripheral base address.
second	The PTP 1588 system timer second.
nanosecond	The PTP 1588 system timer nanosecond. For the unit of the nanosecond is 1ns.so the nanosecond is the real nanosecond.

void ENET_QOS_GetTxFrame	(	enet_qos_handle_t *	handle,
		enet_qos_frame_info_t *	txFrame,
		uint8_t	channel
	)

This function is used for PTP stack to get the timestamp captured by the ENET driver.

Parameters

handle	The ENET handler pointer.This is the same state pointer used in ENET_QOS_Init.
txFrame	Input parameter, pointer to enet_qos_frame_info_t for saving read out frame information.
channel	Channel for searching the tx frame.

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Control and status region bit masks of the receive buffer descriptor.

Control and status bit masks of the transmit buffer descriptor.

Bit mask for interrupt enable type.

Defines some Ethernet parameters.

Initialization and De-initialization

MII interface operation

Other basic operation

Interrupts.

Functional operation.

Transactional operation

ENET Enhanced function operation

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