Overview

The MCUXpresso SDK provides a driver for the General Purpose Timer Module (GPT) of MCUXpresso SDK devices.

Function groups

The GPT driver supports the generation of one-shot pulse/edge, PWM signals, and input capture modes.

Initialization and deinitialization

The function GPT_Init() initializes the GPT with specified configurations. The function GPT_GetDefaultConfig() gets the default configurations. The initialization function configures the GPT for the requested parameters.

The function GPT_Deinit() disables the GPT counter and turns off the module clock.

Input capture operations

The function GPT_SetupInputCapture() sets up a GPT channel for the input capture. The user can specify the capture edge and a filter value to be used when processing the input signal.

The function GPT_TriggerInputCapture() can be used to trigger the capture by software.

One-shot operations

The function GPT_SetupOneshotPulse() sets up a GPT channel for one-shot pulse generation on the output pin.

The function GPT_SetupOneshotEdge() sets up a GPT channel for one-shot edge toggle on the output pin.

PWM Operations

The function GPT_SetupPwm() sets up GPT channels for the PWM output. The function sets up the PWM signal properties for 1 of 6 channels. Each channel has its own period, duty cycle and polarity specified. However, the same counter is applied to all channels requesting the PWM output. The signal duty cycle is provided as a percentage of the PWM period. Its value should be between 0 and 100 0=inactive signal (0% duty cycle) and 100=always active signal (100% duty cycle).

The function GPT_UpdatePwmDutycycle() updates the PWM signal duty cycle of a particular GPT channel. The update will take effect on the end of PWM period. If it's called again before last update doesn't take effect, error will be returned.

The function GPT_PausePwm() pauses the PWM signal on particular GPT channel. This can be used to disable the PWM output when making changes to the PWM signal. Pause will also take effect on the end of PWM period, so check the return value to see if it's set correctly.

Typical use case

PWM output

Output a PWM signal on two GPT channels with different duty cycles. Periodically update the PWM signal duty cycle. Refer to the driver examples codes located at <SDK_ROOT>/boards/<BOARD>/driver_examples/gpt

Data Structures
struct	gpt_config_t
	GPT configuration structure. More...

Enumerations
enum	gpt_chnl_t { kGPT_Chnl_0 = 0U, kGPT_Chnl_1, kGPT_Chnl_2, kGPT_Chnl_3, kGPT_Chnl_4, kGPT_Chnl_5 }
	List of GPT channels. More...

enum	gpt_chnl_pol_t { kGPT_ChnlPol_Low = 0U, kGPT_ChnlPol_High }
	GPT channel polarity. More...

enum	gpt_pwm_mode_t { kGPT_EdgeAlignedPwm = 0U, kGPT_CenterAlignedPwm }
	GPT PWM operation modes. More...

enum	gpt_input_capture_edge_t { kGPT_RisingEdge = 0U, kGPT_FallingEdge }
	GPT input capture edge. More...

enum	gpt_input_capture_filter_t { kGPT_InputCapFilter_None = 0U, kGPT_InputCapFilter_2Cycles, kGPT_InputCapFilter_3Cycles, kGPT_InputCapFilter_4Cycles, kGPT_InputCapFilter_5Cycles, kGPT_InputCapFilter_6Cycles, kGPT_InputCapFilter_7Cycles }
	GPT input capture edge. More...

enum	gpt_clock_source_t { kGPT_SystemClock = 0U, kGPT_ExternalClock }
	GPT clock source selection. More...

enum	gpt_clock_div_t { kGPT_ClkDiv_Divide_1 = 0U, kGPT_ClkDiv_Divide_2, kGPT_ClkDiv_Divide_4, kGPT_ClkDiv_Divide_8, kGPT_ClkDiv_Divide_16, kGPT_ClkDiv_Divide_32, kGPT_ClkDiv_Divide_64, kGPT_ClkDiv_Divide_128, kGPT_ClkDiv_Divide_256, kGPT_ClkDiv_Divide_512, kGPT_ClkDiv_Divide_1024, kGPT_ClkDiv_Divide_2048, kGPT_ClkDiv_Divide_4096, kGPT_ClkDiv_Divide_8192, kGPT_ClkDiv_Divide_16384, kGPT_ClkDiv_Divide_32768 }
	GPT clock divider factor selection for the clock source. More...

enum	gpt_interrupt_enable_t { kGPT_Chnl0InterruptEnable = (1U << 0), kGPT_Chnl1InterruptEnable = (1U << 1), kGPT_Chnl2InterruptEnable = (1U << 2), kGPT_Chnl3InterruptEnable = (1U << 3), kGPT_Chnl4InterruptEnable = (1U << 4), kGPT_Chnl5InterruptEnable = (1U << 5), kGPT_Chnl0ErrInterruptEnable = (1U << 8), kGPT_Chnl1ErrInterruptEnable = (1U << 9), kGPT_Chnl2ErrInterruptEnable = (1U << 10), kGPT_Chnl3ErrInterruptEnable = (1U << 11), kGPT_Chnl4ErrInterruptEnable = (1U << 12), kGPT_Chnl5ErrInterruptEnable = (1U << 13), kGPT_TimeOverflowInterruptEnable = (1U << 16), kGPT_Dma0OverflowInterruptEnable = (1U << 24), kGPT_Dma1OverflowInterruptEnable = (1U << 25), kGPT_AllInterruptsEnable = 0x3013F3FUL }
	List of GPT interrupts. More...

enum	gpt_status_flags_t { kGPT_Chnl0Flag = (1U << 0), kGPT_Chnl1Flag = (1U << 1), kGPT_Chnl2Flag = (1U << 2), kGPT_Chnl3Flag = (1U << 3), kGPT_Chnl4Flag = (1U << 4), kGPT_Chnl5Flag = (1U << 5), kGPT_Chnl0ErrFlag = (1U << 8), kGPT_Chnl1ErrFlag = (1U << 9), kGPT_Chnl2ErrFlag = (1U << 10), kGPT_Chnl3ErrFlag = (1U << 11), kGPT_Chnl4ErrFlag = (1U << 12), kGPT_Chnl5ErrFlag = (1U << 13), kGPT_TimeOverflowFlag = (1U << 16), kGPT_Dma0OverflowFlag = (1U << 24), kGPT_Dma1OverflowFlag = (1U << 25), kGPT_AllFlags = 0x3013F3FUL }
	List of GPT flags. More...

enum	gpt_cnt_update_mode_t { kGPT_CntUpdateMode_Normal = 0U, kGPT_CntUpdateMode_Fast = 1U, kGPT_CntUpdateMode_Off = 3U }
	GPT counter update mode. More...

enum	gpt_input_capture_div_t { kGPT_SampClkDiv_Divide_1 = 0U, kGPT_SampClkDiv_Divide_2, kGPT_SampClkDiv_Divide_4, kGPT_SampClkDiv_Divide_8, kGPT_SampClkDiv_Divide_16, kGPT_SampClkDiv_Divide_32, kGPT_SampClkDiv_Divide_64, kGPT_SampClkDiv_Divide_128 }
	GPT sample clock divider factor selection. More...

Driver version
#define	FSL_GPT_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
	GPT driver version 2.0.0. More...

Initialization and deinitialization
status_t	GPT_Init (GPT_Type base, const gpt_config_t config)
	Ungates the GPT clock and configures the peripheral for basic operation. More...

void	GPT_Deinit (GPT_Type *base)
	Gates the GPT clock. More...

void	GPT_GetDefaultConfig (gpt_config_t *config)
	Fills in the GPT configuration structure with the default settings. More...

Channel mode operations
void	GPT_SetupInputCapture (GPT_Type *base, gpt_chnl_t chnlNumber, gpt_input_capture_edge_t captureMode)
	Enables capturing an input signal on the channel using the function parameters. More...

void	GPT_TriggerInputCapture (GPT_Type *base, gpt_chnl_t chnlNumber)
	Trigger input capturing by software. More...

uint32_t	GPT_GetCapturedValue (GPT_Type *base, gpt_chnl_t chnlNumber)
	Get captured value. More...

void	GPT_SetupOneshotPulse (GPT_Type *base, gpt_chnl_t chnlNumber, gpt_chnl_pol_t pol, uint32_t delayTicks, uint32_t dutyTicks)
	Configures one-shot pulse on the channel. More...

void	GPT_SetupOneshotEdge (GPT_Type *base, gpt_chnl_t chnlNumber, gpt_chnl_pol_t pol, uint32_t delayTicks)
	Configures one-shot edge on the channel. More...

status_t	GPT_SetupPwm (GPT_Type *base, gpt_chnl_t chnlNumber, gpt_chnl_pol_t pol, uint32_t dutyPercent, gpt_pwm_mode_t mode, uint32_t pwmFreq_Hz, uint32_t srcClock_Hz)
	Configures the PWM signal parameters. More...

status_t	GPT_SetupPwmMode (GPT_Type *base, gpt_chnl_t chnlNumber, gpt_chnl_pol_t pol, uint32_t periodTicks, uint32_t dutyTicks, gpt_pwm_mode_t mode)
	Configures the PWM mode parameters. More...

status_t	GPT_UpdatePwmDutycycle (GPT_Type *base, gpt_chnl_t chnlNumber, uint8_t dutyPercent)
	Updates the duty cycle of an active PWM signal. More...

status_t	GPT_PausePwm (GPT_Type *base, gpt_chnl_t chnlNumber)
	Pause the PWM signal. More...

Interrupt Interface
void	GPT_EnableInterrupts (GPT_Type *base, uint32_t mask)
	Enables the selected GPT interrupts. More...

void	GPT_DisableInterrupts (GPT_Type *base, uint32_t mask)
	Disables the selected GPT interrupts. More...

uint32_t	GPT_GetEnabledInterrupts (GPT_Type *base)
	Gets the enabled GPT interrupts. More...

Status Interface
uint32_t	GPT_GetStatusFlags (GPT_Type *base)
	Gets the GPT status flags. More...

void	GPT_ClearStatusFlags (GPT_Type *base, uint32_t mask)
	Clears the GPT status flags. More...

Read and write the timer period
void	GPT_SetTimerPeriod (GPT_Type *base, uint32_t ticks)
	Sets the timer period in units of ticks for the GPT instance. More...

uint32_t	GPT_GetCurrentTimerCount (GPT_Type *base)
	Reads the current timer counting value. More...

Timer Start and Stop
void	GPT_StartTimer (GPT_Type *base)
	Starts the GPT counter. More...

void	GPT_StopTimer (GPT_Type *base)
	Stops the GPT counter. More...

void	GPT_ResetTimer (GPT_Type *base)
	Performs a GPT counter reset. More...

Data Structure Documentation

struct gpt_config_t

This structure holds the configuration settings for the GPT peripheral. To initialize this structure to reasonable defaults, call the GPT_GetDefaultConfig() function and pass a pointer to the configuration structure instance.

The configuration structure can be made constant so as to reside in flash.

Data Fields
gpt_clock_source_t	src
	GPT clock source selection. More...

gpt_clock_div_t	div
	GPT clock divider value for counter. More...

uint8_t	prescale
	GPT clock prescale value for counter, divided by (prescale + 1)

gpt_cnt_update_mode_t	cntUpdateMode
	Counter value update mode. More...

bool	stopCntInDebug
	true: In debug mode, stop the counters. More...

uint32_t	cntUppVal
	If counter reaches this value, the counter will overflow to 0. More...

gpt_input_capture_div_t	icDiv
	Input capture sample clock divider. More...

gpt_input_capture_filter_t	icFilter
	Input capture filter cycles in sampling ticks. More...

Field Documentation

gpt_clock_source_t gpt_config_t::src

gpt_clock_div_t gpt_config_t::div

gpt_cnt_update_mode_t gpt_config_t::cntUpdateMode

bool gpt_config_t::stopCntInDebug

false: In debug mode, counters are not affected.

uint32_t gpt_config_t::cntUppVal

gpt_input_capture_div_t gpt_config_t::icDiv

gpt_input_capture_filter_t gpt_config_t::icFilter

Macro Definition Documentation

#define FSL_GPT_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))

Enumeration Type Documentation

enum gpt_chnl_t

Note: Actual number of available channels is SoC dependent

Enumerator
kGPT_Chnl_0	GPT channel number 0.
kGPT_Chnl_1	GPT channel number 1.
kGPT_Chnl_2	GPT channel number 2.
kGPT_Chnl_3	GPT channel number 3.
kGPT_Chnl_4	GPT channel number 4.
kGPT_Chnl_5	GPT channel number 5.

enum gpt_chnl_pol_t

Enumerator
kGPT_ChnlPol_Low	Output state reset to 0.
kGPT_ChnlPol_High	Output state reset to 1.

enum gpt_pwm_mode_t

Enumerator
kGPT_EdgeAlignedPwm	Edge-aligned PWM.
kGPT_CenterAlignedPwm	Center-aligned PWM.

enum gpt_input_capture_edge_t

Enumerator
kGPT_RisingEdge	Capture on rising edge only.
kGPT_FallingEdge	Capture on falling edge only.

enum gpt_input_capture_filter_t

Enumerator
kGPT_InputCapFilter_None	No filter.
kGPT_InputCapFilter_2Cycles	Filter 2 consecutive cycles.
kGPT_InputCapFilter_3Cycles	Filter 3 consecutive cycles.
kGPT_InputCapFilter_4Cycles	Filter 4 consecutive cycles.
kGPT_InputCapFilter_5Cycles	Filter 5 consecutive cycles.
kGPT_InputCapFilter_6Cycles	Filter 6 consecutive cycles.
kGPT_InputCapFilter_7Cycles	Filter 7 consecutive cycles.

enum gpt_clock_source_t

Enumerator
kGPT_SystemClock	System clock from PMU selected.
kGPT_ExternalClock	External clock from pad.

enum gpt_clock_div_t

Enumerator
kGPT_ClkDiv_Divide_1	Divide by 1.
kGPT_ClkDiv_Divide_2	Divide by 2.
kGPT_ClkDiv_Divide_4	Divide by 4.
kGPT_ClkDiv_Divide_8	Divide by 8.
kGPT_ClkDiv_Divide_16	Divide by 16.
kGPT_ClkDiv_Divide_32	Divide by 32.
kGPT_ClkDiv_Divide_64	Divide by 64.
kGPT_ClkDiv_Divide_128	Divide by 128.
kGPT_ClkDiv_Divide_256	Divide by 256.
kGPT_ClkDiv_Divide_512	Divide by 512.
kGPT_ClkDiv_Divide_1024	Divide by 1024.
kGPT_ClkDiv_Divide_2048	Divide by 2048.
kGPT_ClkDiv_Divide_4096	Divide by 4096.
kGPT_ClkDiv_Divide_8192	Divide by 8192.
kGPT_ClkDiv_Divide_16384	Divide by 16384.
kGPT_ClkDiv_Divide_32768	Divide by 32768.

enum gpt_interrupt_enable_t

Enumerator
kGPT_Chnl0InterruptEnable	Channel 0 interrupt.
kGPT_Chnl1InterruptEnable	Channel 1 interrupt.
kGPT_Chnl2InterruptEnable	Channel 2 interrupt.
kGPT_Chnl3InterruptEnable	Channel 3 interrupt.
kGPT_Chnl4InterruptEnable	Channel 4 interrupt.
kGPT_Chnl5InterruptEnable	Channel 5 interrupt.
kGPT_Chnl0ErrInterruptEnable	Channel 0 error interrupt.
kGPT_Chnl1ErrInterruptEnable	Channel 1 error interrupt.
kGPT_Chnl2ErrInterruptEnable	Channel 2 error interrupt.
kGPT_Chnl3ErrInterruptEnable	Channel 3 error interrupt.
kGPT_Chnl4ErrInterruptEnable	Channel 4 error interrupt.
kGPT_Chnl5ErrInterruptEnable	Channel 5 error interrupt.
kGPT_TimeOverflowInterruptEnable	Time overflow interrupt.
kGPT_Dma0OverflowInterruptEnable	DMA0 overflow interrupt.
kGPT_Dma1OverflowInterruptEnable	DMA1 overflow interrupt.
kGPT_AllInterruptsEnable	All interrupts.

enum gpt_status_flags_t

Enumerator
kGPT_Chnl0Flag	Channel 0 flag.
kGPT_Chnl1Flag	Channel 1 flag.
kGPT_Chnl2Flag	Channel 2 flag.
kGPT_Chnl3Flag	Channel 3 flag.
kGPT_Chnl4Flag	Channel 4 flag.
kGPT_Chnl5Flag	Channel 5 flag.
kGPT_Chnl0ErrFlag	Channel 0 error flag.
kGPT_Chnl1ErrFlag	Channel 1 error flag.
kGPT_Chnl2ErrFlag	Channel 2 error flag.
kGPT_Chnl3ErrFlag	Channel 3 error flag.
kGPT_Chnl4ErrFlag	Channel 4 error flag.
kGPT_Chnl5ErrFlag	Channel 5 error flag.
kGPT_TimeOverflowFlag	Time overflow flag.
kGPT_Dma0OverflowFlag	DMA0 overflow flag.
kGPT_Dma1OverflowFlag	DMA1 overflow flag.
kGPT_AllFlags	All flags.

enum gpt_cnt_update_mode_t

Enumerator

kGPT_CntUpdateMode_Normal

Used in any ratio between counter clock and APB clock.

Every 3-4 counter ticks are updated to CNT_VAL

kGPT_CntUpdateMode_Fast

Used when counter clock is at least 5 times slower than APB clock.

Every counter tick is updated to CNT_VAL

kGPT_CntUpdateMode_Off

Do not update to CNT_VAL.

enum gpt_input_capture_div_t

Enumerator
kGPT_SampClkDiv_Divide_1	Divide by 1.
kGPT_SampClkDiv_Divide_2	Divide by 2.
kGPT_SampClkDiv_Divide_4	Divide by 4.
kGPT_SampClkDiv_Divide_8	Divide by 8.
kGPT_SampClkDiv_Divide_16	Divide by 16.
kGPT_SampClkDiv_Divide_32	Divide by 32.
kGPT_SampClkDiv_Divide_64	Divide by 64.
kGPT_SampClkDiv_Divide_128	Divide by 128.

Function Documentation

status_t GPT_Init	(	GPT_Type *	base,
		const gpt_config_t *	config
	)

Note: This API should be called at the beginning of the application which is using the GPT driver. If the GPT instance has only TPM features, please use the TPM driver.

Parameters

base	GPT peripheral base address
config	Pointer to the user configuration structure.

Returns: kStatus_Success indicates success; Else indicates failure.

void GPT_Deinit ( GPT_Type * base )

Parameters

base	GPT peripheral base address

void GPT_GetDefaultConfig ( gpt_config_t * config )

The default values are:

*   config->src = kGPT_SystemClock;
*   config->div = kGPT_ClkDiv_Divide_1;
*   config->prescale = 0U;
*   config->cntUpdateMode = kGPT_CntUpdateMode_Normal;
*   config->stopCntInDebug = true;
*   config->cntUppVal = 0xFFFFFFFFU;
*   config->icDiv = kGPT_SampClkDiv_Divide_1;
*   config->icFilter = kGPT_InputCapFilter_None;
* 

Parameters

config Pointer to the user configuration structure.

void GPT_SetupInputCapture	(	GPT_Type *	base,
		gpt_chnl_t	chnlNumber,
		gpt_input_capture_edge_t	captureMode
	)

When the edge specified in the captureMode argument occurs on the channel, the GPT counter is captured into the CMR0 register. The user has to read the CMR0 register separately to get this value.

Parameters

base	GPT peripheral base address
chnlNumber	The channel number
captureMode	Specifies which edge to capture

void GPT_TriggerInputCapture	(	GPT_Type *	base,
		gpt_chnl_t	chnlNumber
	)

Edge and filter is ignored.

Parameters

base	GPT peripheral base address
chnlNumber	The channel number

uint32_t GPT_GetCapturedValue	(	GPT_Type *	base,
		gpt_chnl_t	chnlNumber
	)

Parameters

base	GPT peripheral base address
chnlNumber	The channel number

Returns: The captured counter value.

void GPT_SetupOneshotPulse	(	GPT_Type *	base,
		gpt_chnl_t	chnlNumber,
		gpt_chnl_pol_t	pol,
		uint32_t	delayTicks,
		uint32_t	dutyTicks
	)

Parameters

base	GPT peripheral base address
chnlNumber	The channel number
pol	Channel output polarity reset value.
delayTicks	Delay width before triggering the pulse, the uint of this value is timer ticks.
dutyTicks	Pulse width, the uint of this value is timer ticks.

void GPT_SetupOneshotEdge	(	GPT_Type *	base,
		gpt_chnl_t	chnlNumber,
		gpt_chnl_pol_t	pol,
		uint32_t	delayTicks
	)

Parameters

base	GPT peripheral base address
chnlNumber	The channel number
pol	Channel output polarity reset value.
delayTicks	Delay width before changing the edge, the uint of this value is timer ticks.

status_t GPT_SetupPwm	(	GPT_Type *	base,
		gpt_chnl_t	chnlNumber,
		gpt_chnl_pol_t	pol,
		uint32_t	dutyPercent,
		gpt_pwm_mode_t	mode,
		uint32_t	pwmFreq_Hz,
		uint32_t	srcClock_Hz
	)

Call this function to configure the PWM signal period, mode, duty cycle, and edge. Use this function to configure all GPT channels that are used to output a PWM signal.

Parameters

base	GPT peripheral base address
chnlNumber	The channel number.
pol	PWM output polarity reset value.
dutyPercent	PWM pulse width, value should be between 0 to 100
mode	PWM operation mode, options available in enumeration gpt_pwm_mode_t
pwmFreq_Hz	PWM signal frequency in Hz
srcClock_Hz	GPT counter clock in Hz

Returns: kStatus_Success if the PWM setup was successful kStatus_Error on failure

status_t GPT_SetupPwmMode	(	GPT_Type *	base,
		gpt_chnl_t	chnlNumber,
		gpt_chnl_pol_t	pol,
		uint32_t	periodTicks,
		uint32_t	dutyTicks,
		gpt_pwm_mode_t	mode
	)

Call this function to configure the PWM signal mode, duty cycle in ticks, and edge. Use this function to configure all GPT channels that are used to output a PWM signal. Please note that: This API is similar with GPT_SetupPwm() API, but will not set the timer period, and this API will set channel match value in timer ticks, not period percent.

Parameters

base	GPT peripheral base address
chnlNumber	The channel number.
pol	PWM output polarity reset value.
periodTicks	PWM period width, the uint of this value is timer ticks.
dutyTicks	PWM pulse width, the uint of this value is timer ticks.
mode	PWM operation mode, options available in enumeration gpt_pwm_mode_t

Returns: kStatus_Success if the PWM setup was successful kStatus_Error on failure

status_t GPT_UpdatePwmDutycycle	(	GPT_Type *	base,
		gpt_chnl_t	chnlNumber,
		uint8_t	dutyPercent
	)

Parameters

base	GPT peripheral base address
chnlNumber	The channel number.
dutyPercent	New PWM pulse width; The value should be between 0 to 100 0=inactive signal(0% duty cycle)... 100=active signal (100% duty cycle)

Returns: kStatus_Success if the PWM update was successful kStatus_Error on failure

status_t GPT_PausePwm	(	GPT_Type *	base,
		gpt_chnl_t	chnlNumber
	)

Parameters

base	GPT peripheral base address
chnlNumber	The channel number.

Returns: kStatus_Success if the PWM update was successful kStatus_Error on failure

void GPT_EnableInterrupts	(	GPT_Type *	base,
		uint32_t	mask
	)

Parameters

base	GPT peripheral base address
mask	The interrupts to enable. This is a logical OR of members of the enumeration gpt_interrupt_enable_t

void GPT_DisableInterrupts	(	GPT_Type *	base,
		uint32_t	mask
	)

Parameters

base	GPT peripheral base address
mask	The interrupts to enable. This is a logical OR of members of the enumeration gpt_interrupt_enable_t

uint32_t GPT_GetEnabledInterrupts ( GPT_Type * base )

Parameters

base	GPT peripheral base address

Returns: The enabled interrupts. This is the logical OR of members of the enumeration gpt_interrupt_enable_t

uint32_t GPT_GetStatusFlags ( GPT_Type * base )

Parameters

base	GPT peripheral base address

Returns: The status flags. This is the logical OR of members of the enumeration gpt_status_flags_t

void GPT_ClearStatusFlags	(	GPT_Type *	base,
		uint32_t	mask
	)

Parameters

base	GPT peripheral base address
mask	The status flags to clear. This is a logical OR of members of the enumeration gpt_status_flags_t

void GPT_SetTimerPeriod	(	GPT_Type *	base,
		uint32_t	ticks
	)

Timers counts from 0 until it equals the count value set here. The count value is written to the CNT_UPP_VAL register. The period update take effects during the next counter-reach-upper event. To guarantee an immediate update, use GPT_ResetTimer() after setting the period.

Note: Call the utility macros provided in the fsl_common.h to convert usec or msec to ticks.

Parameters

base	GPT peripheral base address
ticks	A timer period in units of ticks, which should be equal or greater than 1.

uint32_t GPT_GetCurrentTimerCount ( GPT_Type * base )

This function returns the real-time timer counting value in a range from 0 to a timer period.

Note: Call the utility macros provided in the fsl_common.h to convert ticks to usec or msec.

Parameters

base	GPT peripheral base address

Returns: The current counter value in ticks

void GPT_StartTimer ( GPT_Type * base )

Parameters

base	GPT peripheral base address

void GPT_StopTimer ( GPT_Type * base )

Parameters

base	GPT peripheral base address

void GPT_ResetTimer ( GPT_Type * base )

Parameters

base	GPT peripheral base address

Overview

Function groups

Initialization and deinitialization

Input capture operations

One-shot operations

PWM Operations

Typical use case

PWM output

Data Structures

Enumerations

Driver version

Initialization and deinitialization

Channel mode operations

Interrupt Interface

Status Interface

Read and write the timer period

Timer Start and Stop

Data Structure Documentation

Data Fields

Field Documentation

Macro Definition Documentation

Enumeration Type Documentation

Function Documentation