Reset Driver

Overview

Reset driver supports peripheral reset and system reset.

Macros
#define	ADC_RSTS

Enumerations
enum	SYSCON_RSTn_t {   kROM_RST_SHIFT_RSTn = (0 | (1U)),   kSRAM_CTRL1_RST_SHIFT_RSTn = (0 | (3U)),   kSRAM_CTRL2_RST_SHIFT_RSTn = (0 | (4U)),   kSRAM_CTRL3_RST_SHIFT_RSTn = (0 | (5U)),   kSRAM_CTRL4_RST_SHIFT_RSTn = (0 | (6U)),   kFLASH_RST_SHIFT_RSTn = (0 | (7U)),   kFMC_RST_SHIFT_RSTn = (0 | (8U)),   kFLEXSPI_RST_SHIFT_RSTn = (0 | (10U)),   kMUX_RST_SHIFT_RSTn = (0 | (11U)),   kIOCON_RST_SHIFT_RSTn = (0 | (13U)),   kGPIO0_RST_SHIFT_RSTn = (0 | (14U)),   kGPIO1_RST_SHIFT_RSTn = (0 | (15U)),   kGPIO2_RST_SHIFT_RSTn = (0 | (16U)),   kGPIO3_RST_SHIFT_RSTn = (0 | (17U)),   kPINT_RST_SHIFT_RSTn = (0 | (18U)),   kGINT_RST_SHIFT_RSTn = (0 | (19U)),   kDMA0_RST_SHIFT_RSTn = (0 | (20U)),   kCRC_RST_SHIFT_RSTn = (0 | (21U)),   kWWDT_RST_SHIFT_RSTn = (0 | (22U)),   kRTC_RST_SHIFT_RSTn = (0 | (23U)),   kMAILBOX_RST_SHIFT_RSTn = (0 | (26U)),   kADC0_RST_SHIFT_RSTn = (0 | (27U)),   kADC1_RST_SHIFT_RSTn = (0 | (28U)),   kDAC0_RST_SHIFT_RSTn = (0 | (29U)),   kMRT_RST_SHIFT_RSTn = (0x10000 | (0U)),   kOSTIMER_RST_SHIFT_RSTn = (0x10000 | (1U)),   kSCT_RST_SHIFT_RSTn = (0x10000 | (2U)),   kMCAN_RST_SHIFT_RSTn = (0x10000 | (7U)),   kUTICK_RST_SHIFT_RSTn = (0x10000 | (10U)),   kFC0_RST_SHIFT_RSTn = (0x10000 | (11U)),   kFC1_RST_SHIFT_RSTn = (0x10000 | (12U)),   kFC2_RST_SHIFT_RSTn = (0x10000 | (13U)),   kFC3_RST_SHIFT_RSTn = (0x10000 | (14U)),   kFC4_RST_SHIFT_RSTn = (0x10000 | (15U)),   kFC5_RST_SHIFT_RSTn = (0x10000 | (16U)),   kFC6_RST_SHIFT_RSTn = (0x10000 | (17U)),   kFC7_RST_SHIFT_RSTn = (0x10000 | (18U)),   kDMIC_RST_SHIFT_RSTn = (0x10000 | (19U)),   kCTIMER2_RST_SHIFT_RSTn = (0x10000 | (22U)),   kUSB0_DEV_RST_SHIFT_RSTn = (0x10000 | (25U)),   kCTIMER0_RST_SHIFT_RSTn = (0x10000 | (26U)),   kCTIMER1_RST_SHIFT_RSTn = (0x10000 | (27U)),   kDMA1_RST_SHIFT_RSTn = (0x20000 | (1U)),   kCMP_RST_SHIFT_RSTn = (0x20000 | (2U)),   kFREQME_RST_SHIFT_RSTn = (0x20000 | (8U)),   kCDOG_RST_SHIFT_RSTn = (0x20000 | (11U)),   kRNG_RST_SHIFT_RSTn = (0x20000 | (13U)),   kSYSCTL_RST_SHIFT_RSTn = (0x20000 | (15U)),   kUSB0HMR_RST_SHIFT_RSTn = (0x20000 | (16U)),   kUSB0HSL_RST_SHIFT_RSTn = (0x20000 | (17U)),   kCSS_RST_SHIFT_RSTn = (0x20000 | (18U)),   kPOWERQUAD_RST_SHIFT_RSTn = (0x20000 | (19U)),   kCTIMER3_RST_SHIFT_RSTn = (0x20000 | (21U)),   kCTIMER4_RST_SHIFT_RSTn = (0x20000 | (22U)),   kPUF_RST_SHIFT_RSTn = (0x20000 | (23U)),   kPKC_RST_SHIFT_RSTn = (0x20000 | (24U)),   kANACTRL_RST_SHIFT_RSTn = (0x20000 | (27U)),   kHSLSPI_RST_SHIFT_RSTn = (0x20000 | (28U)),   kGPIOSEC_RST_SHIFT_RSTn = (0x20000 | (29U)),   kGPIOSECINT_RST_SHIFT_RSTn = (0x20000 | (30U)),   kI3C0_RST_SHIFT_RSTn = (0x30000 | (0U)),   kENC0_RST_SHIFT_RSTn = (0x30000 | (3U)),   kENC1_RST_SHIFT_RSTn = (0x30000 | (4U)),   kPWM0_RST_SHIFT_RSTn = (0x30000 | (5U)),   kPWM1_RST_SHIFT_RSTn = (0x30000 | (6U)),   kAOI0_RST_SHIFT_RSTn = (0x30000 | (7U)),   kAOI1_RST_SHIFT_RSTn = (0x30000 | (8U)),   kFTM0_RST_SHIFT_RSTn = (0x30000 | (9U)),   kDAC1_RST_SHIFT_RSTn = (0x30000 | (10U)),   kDAC2_RST_SHIFT_RSTn = (0x30000 | (11U)),   kOPAMP0_RST_SHIFT_RSTn = (0x30000 | (12U)),   kOPAMP1_RST_SHIFT_RSTn = (0x30000 | (13U)),   kOPAMP2_RST_SHIFT_RSTn = (0x30000 | (14U)),   kHSCMP0_RST_SHIFT_RSTn = (0x30000 | (15U)),   kHSCMP1_RST_SHIFT_RSTn = (0x30000 | (16U)),   kHSCMP2_RST_SHIFT_RSTn = (0x30000 | (17U)),   kVREF_RST_SHIFT_RSTn = (0x30000 | (18U)) }
	Enumeration for peripheral reset control bits. More...

Functions
void	RESET_SetPeripheralReset (reset_ip_name_t peripheral)
	Assert reset to peripheral. More...
void	RESET_ClearPeripheralReset (reset_ip_name_t peripheral)
	Clear reset to peripheral. More...
void	RESET_PeripheralReset (reset_ip_name_t peripheral)
	Reset peripheral module. More...

Driver version
#define	FSL_RESET_DRIVER_VERSION   (MAKE_VERSION(2, 0, 0))
	reset driver version 2.0.0. More...

Macro Definition Documentation

#define FSL_RESET_DRIVER_VERSION   (MAKE_VERSION(2, 0, 0))

#define ADC_RSTS

Value:

{                                              \
        kADC0_RST_SHIFT_RSTn, kADC1_RST_SHIFT_RSTn \
    } /* Reset bits for ADC peripheral */

Array initializers with peripheral reset bits

Enumeration Type Documentation

enum SYSCON_RSTn_t

Defines the enumeration for peripheral reset control bits in PRESETCTRL/ASYNCPRESETCTRL registers

Enumerator
kROM_RST_SHIFT_RSTn	ROM reset control .
kSRAM_CTRL1_RST_SHIFT_RSTn	SRAM Controller 1 reset control .
kSRAM_CTRL2_RST_SHIFT_RSTn	SRAM Controller 2 reset control .
kSRAM_CTRL3_RST_SHIFT_RSTn	SRAM Controller 3 reset control .
kSRAM_CTRL4_RST_SHIFT_RSTn	SRAM Controller 4 reset control .
kFLASH_RST_SHIFT_RSTn	FLASH reset control .
kFMC_RST_SHIFT_RSTn	FMC reset control .
kFLEXSPI_RST_SHIFT_RSTn	FLEXSPI reset control .
kMUX_RST_SHIFT_RSTn	MUX reset control .
kIOCON_RST_SHIFT_RSTn	IOCON reset control .
kGPIO0_RST_SHIFT_RSTn	GPIO0 reset control .
kGPIO1_RST_SHIFT_RSTn	GPIO1 reset control .
kGPIO2_RST_SHIFT_RSTn	GPIO2 reset control .
kGPIO3_RST_SHIFT_RSTn	GPIO3 reset control .
kPINT_RST_SHIFT_RSTn	PINT reset control .
kGINT_RST_SHIFT_RSTn	GINT reset control .
kDMA0_RST_SHIFT_RSTn	DMA0 reset control .
kCRC_RST_SHIFT_RSTn	CRC reset control .
kWWDT_RST_SHIFT_RSTn	WWDT reset control .
kRTC_RST_SHIFT_RSTn	RTC reset control .
kMAILBOX_RST_SHIFT_RSTn	MAILBOX reset control .
kADC0_RST_SHIFT_RSTn	ADC0 reset control .
kADC1_RST_SHIFT_RSTn	ADC1 reset control .
kDAC0_RST_SHIFT_RSTn	DAC0 reset control .
kMRT_RST_SHIFT_RSTn	MRT reset control .
kOSTIMER_RST_SHIFT_RSTn	OSTIMER reset control .
kSCT_RST_SHIFT_RSTn	SCT reset control .
kMCAN_RST_SHIFT_RSTn	MCAN reset control .
kUTICK_RST_SHIFT_RSTn	UTICK reset control .
kFC0_RST_SHIFT_RSTn	FC0 reset control .
kFC1_RST_SHIFT_RSTn	FC1 reset control .
kFC2_RST_SHIFT_RSTn	FC2 reset control .
kFC3_RST_SHIFT_RSTn	FC3 reset control .
kFC4_RST_SHIFT_RSTn	FC4 reset control .
kFC5_RST_SHIFT_RSTn	FC5 reset control .
kFC6_RST_SHIFT_RSTn	FC6 reset control .
kFC7_RST_SHIFT_RSTn	FC7 reset control .
kDMIC_RST_SHIFT_RSTn	DMIC reset control .
kCTIMER2_RST_SHIFT_RSTn	TIMER2 reset control .
kUSB0_DEV_RST_SHIFT_RSTn	USB0_DEV reset control .
kCTIMER0_RST_SHIFT_RSTn	TIMER0 reset control .
kCTIMER1_RST_SHIFT_RSTn	TIMER1 reset control .
kDMA1_RST_SHIFT_RSTn	DMA1 reset control .
kCMP_RST_SHIFT_RSTn	CMP reset control .
kFREQME_RST_SHIFT_RSTn	FREQME reset control .
kCDOG_RST_SHIFT_RSTn	Code Watchdog reset control
kRNG_RST_SHIFT_RSTn	RNG reset control .
kSYSCTL_RST_SHIFT_RSTn	SYSCTL reset control .
kUSB0HMR_RST_SHIFT_RSTn	USB0HMR reset control
kUSB0HSL_RST_SHIFT_RSTn	USB0HSL reset control
kCSS_RST_SHIFT_RSTn	CSS reset control .
kPOWERQUAD_RST_SHIFT_RSTn	PowerQuad reset control .
kCTIMER3_RST_SHIFT_RSTn	TIMER3 reset control .
kCTIMER4_RST_SHIFT_RSTn	TIMER4 reset control .
kPUF_RST_SHIFT_RSTn	PUF reset control
kPKC_RST_SHIFT_RSTn	PKC reset control .
kANACTRL_RST_SHIFT_RSTn	ANACTRL reset control .
kHSLSPI_RST_SHIFT_RSTn	HS LSPI reset control
kGPIOSEC_RST_SHIFT_RSTn	GPIO_SEC reset control .
kGPIOSECINT_RST_SHIFT_RSTn	GPIO secure int reset control .
kI3C0_RST_SHIFT_RSTn	I3C0 reset control .
kENC0_RST_SHIFT_RSTn	ENC0 reset control .
kENC1_RST_SHIFT_RSTn	ENC1 reset control .
kPWM0_RST_SHIFT_RSTn	PWM0 reset control .
kPWM1_RST_SHIFT_RSTn	PWM1 reset control .
kAOI0_RST_SHIFT_RSTn	AOI0 reset control .
kAOI1_RST_SHIFT_RSTn	AOI1 reset control .
kFTM0_RST_SHIFT_RSTn	FTM0 reset control .
kDAC1_RST_SHIFT_RSTn	DAC1 reset control .
kDAC2_RST_SHIFT_RSTn	DAC2 reset control .
kOPAMP0_RST_SHIFT_RSTn	OPAMP0 reset control .
kOPAMP1_RST_SHIFT_RSTn	OPAMP1 reset control .
kOPAMP2_RST_SHIFT_RSTn	OPAMP2 reset control .
kHSCMP0_RST_SHIFT_RSTn	HSCMP0 reset control .
kHSCMP1_RST_SHIFT_RSTn	HSCMP1 reset control .
kHSCMP2_RST_SHIFT_RSTn	HSCMP2 reset control .
kVREF_RST_SHIFT_RSTn	VREF reset control .

Function Documentation

void RESET_SetPeripheralReset

(

reset_ip_name_t

peripheral

)

Asserts reset signal to specified peripheral module.

Parameters

peripheral

Assert reset to this peripheral. The enum argument contains encoding of reset register and reset bit position in the reset register.

void RESET_ClearPeripheralReset

(

reset_ip_name_t

peripheral

)

Clears reset signal to specified peripheral module, allows it to operate.

Parameters

peripheral

Clear reset to this peripheral. The enum argument contains encoding of reset register and reset bit position in the reset register.

void RESET_PeripheralReset

(

reset_ip_name_t

peripheral

)

Reset peripheral module.

Parameters

peripheral

Peripheral to reset. The enum argument contains encoding of reset register and reset bit position in the reset register.