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MCUXpresso SDK API Reference Manual
Rev. 0
NXP Semiconductors
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The MCUXpresso SDK provides a driver for the Input multiplexing (INPUTMUX).
It configures the inputs to the pin interrupt block, DMA trigger, and frequency measure function. Once configured, the clock is not needed for the inputmux.
INPUTMUX_AttachSignal function configures the specified input
Refer to the driver examples codes located at <SDK_ROOT>/boards/<BOARD>/driver_examples/inputmux
Files | |
file | fsl_inputmux.h |
file | fsl_inputmux_connections.h |
Functions | |
void | INPUTMUX_Init (INPUTMUX_Type *base) |
Initialize INPUTMUX peripheral. More... | |
void | INPUTMUX_AttachSignal (INPUTMUX_Type *base, uint32_t index, inputmux_connection_t connection) |
Attaches a signal. More... | |
void | INPUTMUX_EnableSignal (INPUTMUX_Type *base, inputmux_signal_t signal, bool enable) |
Enable/disable a signal. More... | |
void | INPUTMUX_Deinit (INPUTMUX_Type *base) |
Deinitialize INPUTMUX peripheral. More... | |
Input multiplexing connections | |
enum | inputmux_connection_t { kINPUTMUX_SctGpioInAToSct0 = 0U + (SCT0_INMUX0 << PMUX_SHIFT) , kINPUTMUX_TmprOutToSct0 = 58U + (SCT0_INMUX0 << PMUX_SHIFT) , kINPUTMUX_TmprOutToTimer0Captsel = 48U + (TIMER0CAPTSEL0 << PMUX_SHIFT) , kINPUTMUX_TmprOutToTimer0Trigger = 48U + (TIMER0TRIGIN << PMUX_SHIFT) , kINPUTMUX_TmprOutToTimer1Captsel = 48U + (TIMER1CAPTSEL0 << PMUX_SHIFT) , kINPUTMUX_TmprOutToTimer1Trigger = 48U + (TIMER1TRIGIN << PMUX_SHIFT) , kINPUTMUX_TmprOutToTimer2Captsel = 48U + (TIMER2CAPTSEL0 << PMUX_SHIFT) , kINPUTMUX_TmprOutToTimer2Trigger = 48U + (TIMER2TRIGIN << PMUX_SHIFT) , kINPUTMUX_GpioPort1Pin31ToPintsel = 63U + (PINTSEL0 << PMUX_SHIFT) , kINPUTMUX_TmprOutToDma0 = 52U + (DMA0_ITRIG_INMUX0 << PMUX_SHIFT) , kINPUTMUX_TmprOutTrigoutToTriginChannels = 52U + (DMA0_OTRIG_INMUX0 << PMUX_SHIFT) , kINPUTMUX_Aoi1Out2ToFreqmeasRef = 9u + (FREQMEAS_REF_REG << PMUX_SHIFT) , kINPUTMUX_Aoi1Out2ToFreqmeasTarget = 9u + (FREQMEAS_TARGET_REG << PMUX_SHIFT) , kINPUTMUX_TmprOutToTimer3Captsel = 48U + (TIMER3CAPTSEL0 << PMUX_SHIFT) , kINPUTMUX_TmprOutToTimer3Trigger = 48U + (TIMER3TRIGIN << PMUX_SHIFT) , kINPUTMUX_TmprOutToTimer4Captsel = 48U + (TIMER4CAPTSEL0 << PMUX_SHIFT) , kINPUTMUX_GpioPort0Pin31ToPintSecsel = 31U + (PINTSECSEL0 << PMUX_SHIFT) , kINPUTMUX_TmprOutToDma1 = 24U + (DMA1_ITRIG_INMUX0 << PMUX_SHIFT) , kINPUTMUX_Dma1I3c0TxTrigoutToTriginChannels = 13U + (DMA1_OTRIG_INMUX0 << PMUX_SHIFT) , kINPUTMUX_Dma0Trigout2ToHscmp0Trigger = 37U + (HSCMP0_TRIGIN << PMUX_SHIFT) , kINPUTMUX_Dma0Trigout2ToAdc0Trigger = 52U + (ADC0_TRIG0 << PMUX_SHIFT) , kINPUTMUX_Dma0Trigout2ToAdc1Trigger = 52U + (ADC1_TRIG0 << PMUX_SHIFT) , kINPUTMUX_Dma0Trigout2ToDac0Trigger = 28U + (DAC0_TRIGIN << PMUX_SHIFT) , kINPUTMUX_Dma0Trigout2ToDac1Trigger = 28U + (DAC1_TRIGIN << PMUX_SHIFT) , kINPUTMUX_Dma0Trigout2ToDac2Trigger = 28U + (DAC2_TRIGIN << PMUX_SHIFT) , kINPUTMUX_Dma0Trigout2ToEnc0Trigger = 54U + (ENC0TRIG << PMUX_SHIFT) , kINPUTMUX_Dma0Trigout2ToEnc0Home = 54U + (ENC0HOME << PMUX_SHIFT) , kINPUTMUX_Dma0Trigout2ToEnc0Index = 54U + (ENC0INDEX << PMUX_SHIFT) , kINPUTMUX_Dma0Trigout2ToEnc0Phaseb = 54U + (ENC0PHASEB << PMUX_SHIFT) , kINPUTMUX_Dma0Trigout2ToEnc0Phasea = 54U + (ENC0PHASEA << PMUX_SHIFT) , kINPUTMUX_Dma0Trigout2ToEnc1Trigger = 54U + (ENC1TRIG << PMUX_SHIFT) , kINPUTMUX_Dma0Trigout2ToEnc1Home = 54U + (ENC1HOME << PMUX_SHIFT) , kINPUTMUX_Dma0Trigout2ToEnc1Index = 54U + (ENC1INDEX << PMUX_SHIFT) , kINPUTMUX_Dma0Trigout2ToEnc1Phaseb = 54U + (ENC1PHASEB << PMUX_SHIFT) , kINPUTMUX_Dma0Trigout2ToEnc1Phasea = 54U + (ENC1PHASEA << PMUX_SHIFT) , kINPUTMUX_Dma0Trigout2ToPwm0ExtSyncTrigger = 54U + (PWM0_EXTSYNC0 << PMUX_SHIFT) , kINPUTMUX_Dma0Trigout2ToPwm0ExtATrigger = 54U + (PWM0_EXTA0 << PMUX_SHIFT) , kINPUTMUX_Dma0Trigout2ToPwm0ExtForceTrigger = 54U + (PWM0_EXTFORCETRIG << PMUX_SHIFT) , kINPUTMUX_Dma0Trigout2ToPwm0FaultTrigger = 54U + (PWM0_FAULT0 << PMUX_SHIFT) , kINPUTMUX_Dma0Trigout2ToPwm0ExtClkTrigger = 54U + (PWM0_EXTCLKTRIG << PMUX_SHIFT) , kINPUTMUX_Dma0Trigout2ToPwm1ExtSyncTrigger = 54U + (PWM1_EXTSYNC0 << PMUX_SHIFT) , kINPUTMUX_Dma0Trigout2ToPwm1ExtATrigger = 54U + (PWM1_EXTA0 << PMUX_SHIFT) , kINPUTMUX_Dma0Trigout2ToPwm1ExtForceTrigger = 54U + (PWM1_EXTFORCETRIG << PMUX_SHIFT) , kINPUTMUX_Dma0Trigout2ToPwm1FaultTrigger = 54U + (PWM1_FAULT0 << PMUX_SHIFT) , kINPUTMUX_Dma0Trigout2ToPwm1ExtClkTrigger = 54U + (PWM1_EXTCLKTRIG << PMUX_SHIFT) , kINPUTMUX_Dma1Trigout2ToAoi0InTrigger = 60U + (AOI0_IN0 << PMUX_SHIFT) , kINPUTMUX_Dma1Trigout2ToAoi1InTrigger = 60U + (AOI1_IN0 << PMUX_SHIFT) , kINPUTMUX_TmprOutToAoiExtTrigger = 24U + (AOI_EXT_TRIG0 << PMUX_SHIFT) , kINPUTMUX_Dma0Trigout2ToHscmp1Trigger = 37U + (HSCMP1_TRIGIN << PMUX_SHIFT) } |
INPUTMUX connections type. More... | |
enum | inputmux_signal_t { kINPUTMUX_FlexSpiRxToDmac0Ch0RequestEna = 0U + (DMA0_REQ_EN0_ID << ENA_SHIFT) , kINPUTMUX_Aoi0Out3ToDmac0Ch31RequestEna = 31U + (DMA0_REQ_EN0_ID << ENA_SHIFT) , kINPUTMUX_TmprOutToDmac0Ch52RequestEna = 20U + (DMA0_REQ_EN1_ID << ENA_SHIFT) , kINPUTMUX_I3c0TxToDmac1Ch13RequestEna = 13U + (DMA1_REQ_EN_ID << ENA_SHIFT) , kINPUTMUX_Dmac0InputTriggerAoi0Out3Ena = 31U + (DMA0_ITRIG_EN0_ID << ENA_SHIFT) , kINPUTMUX_Dmac0InputTriggerTmprOutEna = 20U + (DMA0_ITRIG_EN1_ID << ENA_SHIFT) } |
INPUTMUX signal enable/disable type. More... | |
#define | SCT0_INMUX0 0x00U |
Periphinmux IDs. | |
#define | TIMER0CAPTSEL0 0x20U |
#define | TIMER0TRIGIN 0x30U |
#define | TIMER1CAPTSEL0 0x40U |
#define | TIMER1TRIGIN 0x50U |
#define | TIMER2CAPTSEL0 0x60U |
#define | TIMER2TRIGIN 0x70U |
#define | PINTSEL_PMUX_ID 0xC0U |
#define | PINTSEL0 0xC0U |
#define | DMA0_ITRIG_INMUX0 0xE0U |
#define | DMA0_OTRIG_INMUX0 0x160U |
#define | FREQMEAS_REF_REG 0x180U |
#define | FREQMEAS_TARGET_REG 0x184U |
#define | TIMER3CAPTSEL0 0x1A0U |
#define | TIMER3TRIGIN 0x1B0U |
#define | TIMER4CAPTSEL0 0x1C0U |
#define | TIMER4TRIGIN 0x1D0U |
#define | PINTSECSEL0 0x1E0U |
#define | DMA1_ITRIG_INMUX0 0x200U |
#define | DMA1_OTRIG_INMUX0 0x240U |
#define | HSCMP0_TRIGIN 0x260U |
#define | ADC0_TRIG0 0x280U |
#define | ADC1_TRIG0 0x2C0U |
#define | DAC0_TRIGIN 0x300U |
#define | DAC1_TRIGIN 0x320U |
#define | DAC2_TRIGIN 0x340U |
#define | ENC0TRIG 0x360U |
#define | ENC0HOME 0x364U |
#define | ENC0INDEX 0x368U |
#define | ENC0PHASEB 0x36CU |
#define | ENC0PHASEA 0x370U |
#define | ENC1TRIG 0x380U |
#define | ENC1HOME 0x384U |
#define | ENC1INDEX 0x388U |
#define | ENC1PHASEB 0x38CU |
#define | ENC1PHASEA 0x390U |
#define | PWM0_EXTSYNC0 0x3A0U |
#define | PWM0_EXTA0 0x3B0U |
#define | PWM0_EXTFORCETRIG 0x3C0U |
#define | PWM0_FAULT0 0x3C4U |
#define | PWM1_EXTSYNC0 0x3E0U |
#define | PWM1_EXTA0 0x3F0U |
#define | PWM1_EXTFORCETRIG 0x400U |
#define | PWM1_FAULT0 0x404U |
#define | PWM0_EXTCLKTRIG 0x420U |
#define | PWM1_EXTCLKTRIG 0x424U |
#define | AOI0_IN0 0x440U |
#define | AOI1_IN0 0x480U |
#define | AOI_EXT_TRIG0 0x4C0U |
#define | HSCMP1_TRIGIN 0x4E0U |
#define | HSCMP2_TRIGIN 0x500U |
#define | DMA0_ITRIG_INMUX_32 0x520U |
#define | DMA0_REQ_EN0_ID 0x740U |
#define | DMA0_REQ_EN1_ID 0x744U |
#define | DMA1_REQ_EN_ID 0x760U |
#define | DMA0_ITRIG_EN0_ID 0x780U |
#define | DMA0_ITRIG_EN1_ID 0x784U |
#define | DMA1_ITRIG_EN_ID 0x7A0U |
#define | ENA_SHIFT 8U |
#define | PMUX_SHIFT 20U |
Driver version | |
#define | FSL_INPUTMUX_DRIVER_VERSION (MAKE_VERSION(2, 0, 4)) |
Group interrupt driver version for SDK. | |
enum inputmux_signal_t |
void INPUTMUX_Init | ( | INPUTMUX_Type * | base | ) |
This function enables the INPUTMUX clock.
base | Base address of the INPUTMUX peripheral. |
None. |
void INPUTMUX_AttachSignal | ( | INPUTMUX_Type * | base, |
uint32_t | index, | ||
inputmux_connection_t | connection | ||
) |
This function gates the INPUTPMUX clock.
base | Base address of the INPUTMUX peripheral. |
index | Destination peripheral to attach the signal to. |
connection | Selects connection. |
None. |
void INPUTMUX_EnableSignal | ( | INPUTMUX_Type * | base, |
inputmux_signal_t | signal, | ||
bool | enable | ||
) |
This function gates the INPUTPMUX clock.
base | Base address of the INPUTMUX peripheral. |
signal | Enable signal register id and bit offset. |
enable | Selects enable or disable. |
None. |
void INPUTMUX_Deinit | ( | INPUTMUX_Type * | base | ) |
This function disables the INPUTMUX clock.
base | Base address of the INPUTMUX peripheral. |
None. |