Overview

The MCUXpresso SDK provides a peripheral clock driver for the SYSCON module of MCUXpresso SDK devices.

Function description

Clock driver provides these functions:

Functions to initialize the Core clock to given frequency
Functions to configure the clock selection muxes.
Functions to setup peripheral clock dividers
Functions to set the flash wait states for the input freuqency
Functions to get the frequency of the selected clock
Functions to set PLL frequency

SYSCON Clock frequency functions

SYSCON clock module provides clocks, such as MCLKCLK, ADCCLK, DMICCLK, MCGFLLCLK, FXCOMCLK,WDTOSC, RTCOSC, USBCLK and SYSPLL. The functions CLOCK_EnableClock() and CLOCK_DisableClock() enables and disables the various clocks. CLOCK_SetupFROClocking() initializes the FRO to 12MHz, 48 MHz or 96 MHz frequency. CLOCK_SetupPLLData(), CLOCK_SetupSystemPLLPrec(), and CLOCK_SetPLLFreq() functions are used to setup the PLL. The SYSCON clock driver provides functions to get the frequency of these clocks, such as CLOCK_GetFreq(), CLOCK_GetFro12MFreq(), CLOCK_GetExtClkFreq(), CLOCK_GetWdtOscFreq(), CLOCK_GetFroHfFreq(), CLOCK_GetPllOutFreq(), CLOCK_GetOsc32KFreq() , CLOCK_GetCoreSysClkFreq(), CLOCK_GetI2SMClkFreq(),CLOCK_GetFlexCommClkFreq and CLOCK_GetAsyncApbClkFreq.

SYSCON clock Selection Muxes

The SYSCON clock driver provides the function to configure the clock selected. The function CLOCK_AttachClk() is implemented for this. The function selects the clock source for a particular peripheral like MAINCLK, DMIC, FLEXCOMM, USB, ADC and PLL.

SYSCON clock dividers

The SYSCON clock module provides the function to setup the peripheral clock dividers. The function CLOCK_SetClkDiv() configures the CLKDIV registers for various periperals like USB, DMIC, I2S, SYSTICK, AHB, ADC and also for CLKOUT and TRACE functions.

SYSCON flash wait states

The SYSCON clock driver provides the function CLOCK_SetFLASHAccessCyclesForFreq() that configures FLASHCFG register with a selected FLASHTIM value.

Typical use case

POWER_DisablePD(kPDRUNCFG_PD_FRO_EN); 
CLOCK_AttachClk(
    kFRO12M_to_MAIN_CLK);          
POWER_SetVoltageForFreq(48000000); 
CLOCK_SetFLASHAccessCyclesForFreq(48000000); 
CLOCK_SetupFROClocking(48000000);            
CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK);        

Files
file	fsl_clock.h

Data Structures
struct	pll_config_t
	PLL configuration structure. More...

struct	pll_setup_t
	PLL setup structure This structure can be used to pre-build a PLL setup configuration at run-time and quickly set the PLL to the configuration. More...

struct	usb_pll_setup_t
	PLL setup structure This structure can be used to pre-build a USB PLL setup configuration at run-time and quickly set the usb PLL to the configuration. More...

Macros
#define	FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL 0
	Configure whether driver controls clock. More...

#define	CLOCK_USR_CFG_PLL_CONFIG_CACHE_COUNT 2U
	User-defined the size of cache for CLOCK_PllGetConfig() function. More...

#define	CLOCK_FROHF_SETTING_API_ROM_ADDRESS (0x03007933U)
	FROHF clock setting API address in ROM. More...

#define	CLOCK_SetupFROClocking (((void ()(uint32_t))(CLOCK_FROHF_SETTING_API_ROM_ADDRESS)))

#define	ADC_CLOCKS
	Clock ip name array for ADC. More...

#define	ROM_CLOCKS
	Clock ip name array for ROM. More...

#define	SRAM_CLOCKS
	Clock ip name array for SRAM. More...

#define	FLASH_CLOCKS
	Clock ip name array for FLASH. More...

#define	FMC_CLOCKS
	Clock ip name array for FMC. More...

#define	EEPROM_CLOCKS
	Clock ip name array for EEPROM. More...

#define	SPIFI_CLOCKS
	Clock ip name array for SPIFI. More...

#define	INPUTMUX_CLOCKS
	Clock ip name array for INPUTMUX. More...

#define	IOCON_CLOCKS
	Clock ip name array for IOCON. More...

#define	GPIO_CLOCKS
	Clock ip name array for GPIO. More...

#define	PINT_CLOCKS
	Clock ip name array for PINT. More...

#define	GINT_CLOCKS
	Clock ip name array for GINT. More...

#define	DMA_CLOCKS
	Clock ip name array for DMA. More...

#define	CRC_CLOCKS
	Clock ip name array for CRC. More...

#define	WWDT_CLOCKS
	Clock ip name array for WWDT. More...

#define	RTC_CLOCKS
	Clock ip name array for RTC. More...

#define	ADC0_CLOCKS
	Clock ip name array for ADC0. More...

#define	MRT_CLOCKS
	Clock ip name array for MRT. More...

#define	RIT_CLOCKS
	Clock ip name array for RIT. More...

#define	SCT_CLOCKS
	Clock ip name array for SCT0. More...

#define	MCAN_CLOCKS
	Clock ip name array for MCAN. More...

#define	UTICK_CLOCKS
	Clock ip name array for UTICK. More...

#define	FLEXCOMM_CLOCKS
	Clock ip name array for FLEXCOMM. More...

#define	LPUART_CLOCKS
	Clock ip name array for LPUART. More...

#define	BI2C_CLOCKS
	Clock ip name array for BI2C. More...

#define	LPSI_CLOCKS
	Clock ip name array for LSPI. More...

#define	FLEXI2S_CLOCKS
	Clock ip name array for FLEXI2S. More...

#define	DMIC_CLOCKS
	Clock ip name array for DMIC. More...

#define	CTIMER_CLOCKS
	Clock ip name array for CT32B. More...

#define	LCD_CLOCKS
	Clock ip name array for LCD. More...

#define	SDIO_CLOCKS
	Clock ip name array for SDIO. More...

#define	USBRAM_CLOCKS
	Clock ip name array for USBRAM. More...

#define	EMC_CLOCKS
	Clock ip name array for EMC. More...

#define	ETH_CLOCKS
	Clock ip name array for ETH. More...

#define	AES_CLOCKS
	Clock ip name array for AES. More...

#define	OTP_CLOCKS
	Clock ip name array for OTP. More...

#define	RNG_CLOCKS
	Clock ip name array for RNG. More...

#define	USBHMR0_CLOCKS
	Clock ip name array for USBHMR0. More...

#define	USBHSL0_CLOCKS
	Clock ip name array for USBHSL0. More...

#define	SHA0_CLOCKS
	Clock ip name array for SHA0. More...

#define	SMARTCARD_CLOCKS
	Clock ip name array for SMARTCARD. More...

#define	USBD_CLOCKS
	Clock ip name array for USBD. More...

#define	USBH_CLOCKS
	Clock ip name array for USBH. More...

#define	CLK_GATE_REG_OFFSET_SHIFT 8U
	Clock gate name used for CLOCK_EnableClock/CLOCK_DisableClock. More...

#define	MUX_A(m, choice) (((m) << 0) \| ((choice + 1) << 8))
	Clock Mux Switches The encoding is as follows each connection identified is 64bits wide starting from LSB upwards. More...

#define	PLL_CONFIGFLAG_USEINRATE (1 << 0)
	PLL configuration structure flags for 'flags' field These flags control how the PLL configuration function sets up the PLL setup structure. More...

#define	PLL_CONFIGFLAG_FORCENOFRACT
	Force non-fractional output mode, PLL output will not use the fractional, automatic bandwidth, or SS \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ hardware.

#define	PLL_SETUPFLAG_POWERUP (1 << 0)
	PLL setup structure flags for 'flags' field These flags control how the PLL setup function sets up the PLL. More...

#define	PLL_SETUPFLAG_WAITLOCK (1 << 1)
	Setup will wait for PLL lock, implies the PLL will be pwoered on.

#define	PLL_SETUPFLAG_ADGVOLT (1 << 2)
	Optimize system voltage for the new PLL rate.

Enumerations
enum	clock_ip_name_t
	Clock gate name used for CLOCK_EnableClock/CLOCK_DisableClock. More...

enum	clock_name_t { kCLOCK_CoreSysClk, kCLOCK_BusClk, kCLOCK_ClockOut, kCLOCK_FroHf, kCLOCK_SpiFi, kCLOCK_Adc, kCLOCK_Usb0, kCLOCK_Usb1, kCLOCK_UsbPll, kCLOCK_Mclk, kCLOCK_Sct, kCLOCK_SDio, kCLOCK_EMC, kCLOCK_LCD, kCLOCK_MCAN0, kCLOCK_MCAN1, kCLOCK_Fro12M, kCLOCK_ExtClk, kCLOCK_PllOut, kCLOCK_UsbClk, kClock_WdtOsc, kCLOCK_Frg, kCLOCK_Dmic, kCLOCK_AsyncApbClk, kCLOCK_FlexI2S, kCLOCK_Flexcomm0, kCLOCK_Flexcomm1, kCLOCK_Flexcomm2, kCLOCK_Flexcomm3, kCLOCK_Flexcomm4, kCLOCK_Flexcomm5, kCLOCK_Flexcomm6, kCLOCK_Flexcomm7, kCLOCK_Flexcomm8, kCLOCK_Flexcomm9, kCLOCK_Flexcomm10 }
	Clock name used to get clock frequency. More...

enum	async_clock_src_t { kCLOCK_AsyncMainClk = 0, kCLOCK_AsyncFro12Mhz }

enum	pll_error_t { kStatus_PLL_Success = MAKE_STATUS(kStatusGroup_Generic, 0), kStatus_PLL_OutputTooLow = MAKE_STATUS(kStatusGroup_Generic, 1), kStatus_PLL_OutputTooHigh = MAKE_STATUS(kStatusGroup_Generic, 2), kStatus_PLL_InputTooLow = MAKE_STATUS(kStatusGroup_Generic, 3), kStatus_PLL_InputTooHigh = MAKE_STATUS(kStatusGroup_Generic, 4), kStatus_PLL_OutsideIntLimit = MAKE_STATUS(kStatusGroup_Generic, 5), kStatus_PLL_CCOTooLow = MAKE_STATUS(kStatusGroup_Generic, 6), kStatus_PLL_CCOTooHigh = MAKE_STATUS(kStatusGroup_Generic, 7) }
	PLL status definitions. More...

enum	clock_usb_src_t { kCLOCK_UsbSrcFro = (uint32_t)kCLOCK_FroHf, kCLOCK_UsbSrcSystemPll = (uint32_t)kCLOCK_PllOut, kCLOCK_UsbSrcMainClock = (uint32_t)kCLOCK_CoreSysClk, kCLOCK_UsbSrcUsbPll = (uint32_t)kCLOCK_UsbPll, kCLOCK_UsbSrcNone = SYSCON_USB0CLKSEL_SEL(7) }
	USB clock source definition. More...

enum	usb_pll_psel
	USB PDEL Divider. More...

Functions
void	CLOCK_AttachClk (clock_attach_id_t connection)
	Configure the clock selection muxes. More...

void	CLOCK_SetClkDiv (clock_div_name_t div_name, uint32_t divided_by_value, bool reset)
	Setup peripheral clock dividers. More...

uint32_t	CLOCK_GetFreq (clock_name_t clockName)
	Return Frequency of selected clock. More...

uint32_t	CLOCK_GetFro12MFreq (void)
	Return Frequency of FRO 12MHz. More...

uint32_t	CLOCK_GetClockOutClkFreq (void)
	Return Frequency of ClockOut. More...

uint32_t	CLOCK_GetSpifiClkFreq (void)
	Return Frequency of Spifi Clock. More...

uint32_t	CLOCK_GetAdcClkFreq (void)
	Return Frequency of Adc Clock. More...

uint32_t	CLOCK_GetUsb0ClkFreq (void)
	Return Frequency of Usb0 Clock. More...

uint32_t	CLOCK_GetUsb1ClkFreq (void)
	Return Frequency of Usb1 Clock. More...

uint32_t	CLOCK_GetMclkClkFreq (void)
	Return Frequency of MClk Clock. More...

uint32_t	CLOCK_GetSctClkFreq (void)
	Return Frequency of SCTimer Clock. More...

uint32_t	CLOCK_GetSdioClkFreq (void)
	Return Frequency of SDIO Clock. More...

uint32_t	CLOCK_GetLcdClkFreq (void)
	Return Frequency of LCD Clock. More...

uint32_t	CLOCK_GetLcdClkIn (void)
	Return Frequency of LCD CLKIN Clock. More...

uint32_t	CLOCK_GetExtClkFreq (void)
	Return Frequency of External Clock. More...

uint32_t	CLOCK_GetWdtOscFreq (void)
	Return Frequency of Watchdog Oscillator. More...

uint32_t	CLOCK_GetFroHfFreq (void)
	Return Frequency of High-Freq output of FRO. More...

uint32_t	CLOCK_GetFrgClkFreq (void)
	Return Frequency of frg. More...

uint32_t	CLOCK_GetDmicClkFreq (void)
	Return Frequency of dmic. More...

uint32_t	CLOCK_GetPllOutFreq (void)
	Return Frequency of PLL. More...

uint32_t	CLOCK_GetUsbPllOutFreq (void)
	Return Frequency of USB PLL. More...

uint32_t	CLOCK_GetAudioPllOutFreq (void)
	Return Frequency of AUDIO PLL. More...

uint32_t	CLOCK_GetOsc32KFreq (void)
	Return Frequency of 32kHz osc. More...

uint32_t	CLOCK_GetCoreSysClkFreq (void)
	Return Frequency of Core System. More...

uint32_t	CLOCK_GetI2SMClkFreq (void)
	Return Frequency of I2S MCLK Clock. More...

uint32_t	CLOCK_GetFlexCommClkFreq (uint32_t id)
	Return Frequency of Flexcomm functional Clock. More...

__STATIC_INLINE async_clock_src_t	CLOCK_GetAsyncApbClkSrc (void)
	Return Asynchronous APB Clock source. More...

uint32_t	CLOCK_GetAsyncApbClkFreq (void)
	Return Frequency of Asynchronous APB Clock. More...

uint32_t	CLOCK_GetAudioPLLInClockRate (void)
	Return Audio PLL input clock rate. More...

uint32_t	CLOCK_GetSystemPLLInClockRate (void)
	Return System PLL input clock rate. More...

uint32_t	CLOCK_GetSystemPLLOutClockRate (bool recompute)
	Return System PLL output clock rate. More...

uint32_t	CLOCK_GetAudioPLLOutClockRate (bool recompute)
	Return System AUDIO PLL output clock rate. More...

uint32_t	CLOCK_GetUSbPLLOutClockRate (bool recompute)
	Return System USB PLL output clock rate. More...

__STATIC_INLINE void	CLOCK_SetBypassPLL (bool bypass)
	Enables and disables PLL bypass mode. More...

__STATIC_INLINE bool	CLOCK_IsSystemPLLLocked (void)
	Check if PLL is locked or not. More...

__STATIC_INLINE bool	CLOCK_IsUsbPLLLocked (void)
	Check if USB PLL is locked or not. More...

__STATIC_INLINE bool	CLOCK_IsAudioPLLLocked (void)
	Check if AUDIO PLL is locked or not. More...

__STATIC_INLINE void	CLOCK_Enable_SysOsc (bool enable)
	Enables and disables SYS OSC. More...

void	CLOCK_SetStoredPLLClockRate (uint32_t rate)
	Store the current PLL rate. More...

void	CLOCK_SetStoredAudioPLLClockRate (uint32_t rate)
	Store the current AUDIO PLL rate. More...

uint32_t	CLOCK_GetSystemPLLOutFromSetup (pll_setup_t *pSetup)
	Return System PLL output clock rate from setup structure. More...

uint32_t	CLOCK_GetAudioPLLOutFromSetup (pll_setup_t *pSetup)
	Return System AUDIO PLL output clock rate from setup structure. More...

uint32_t	CLOCK_GetAudioPLLOutFromFractSetup (pll_setup_t *pSetup)
	Return System AUDIO PLL output clock rate from audio fractioanl setup structure. More...

uint32_t	CLOCK_GetUsbPLLOutFromSetup (const usb_pll_setup_t *pSetup)
	Return System USB PLL output clock rate from setup structure. More...

pll_error_t	CLOCK_SetupPLLData (pll_config_t pControl, pll_setup_t pSetup)
	Set PLL output based on the passed PLL setup data. More...

pll_error_t	CLOCK_SetupAudioPLLData (pll_config_t pControl, pll_setup_t pSetup)
	Set AUDIO PLL output based on the passed AUDIO PLL setup data. More...

pll_error_t	CLOCK_SetupSystemPLLPrec (pll_setup_t *pSetup, uint32_t flagcfg)
	Set PLL output from PLL setup structure (precise frequency) More...

pll_error_t	CLOCK_SetupAudioPLLPrec (pll_setup_t *pSetup, uint32_t flagcfg)
	Set AUDIO PLL output from AUDIOPLL setup structure (precise frequency) More...

pll_error_t	CLOCK_SetupAudioPLLPrecFract (pll_setup_t *pSetup, uint32_t flagcfg)
	Set AUDIO PLL output from AUDIOPLL setup structure using the Audio Fractional divider register(precise frequency) More...

pll_error_t	CLOCK_SetPLLFreq (const pll_setup_t *pSetup)
	Set PLL output from PLL setup structure (precise frequency) More...

pll_error_t	CLOCK_SetAudioPLLFreq (const pll_setup_t *pSetup)
	Set Audio PLL output from Audio PLL setup structure (precise frequency) More...

pll_error_t	CLOCK_SetUsbPLLFreq (const usb_pll_setup_t *pSetup)
	Set USB PLL output from USB PLL setup structure (precise frequency) More...

void	CLOCK_SetupSystemPLLMult (uint32_t multiply_by, uint32_t input_freq)
	Set PLL output based on the multiplier and input frequency. More...

static void	CLOCK_DisableUsbDevicefs0Clock (clock_ip_name_t clk)
	Disable USB clock. More...

bool	CLOCK_EnableUsbfs0DeviceClock (clock_usb_src_t src, uint32_t freq)
	Enable USB Device FS clock. More...

bool	CLOCK_EnableUsbfs0HostClock (clock_usb_src_t src, uint32_t freq)
	Enable USB HOST FS clock. More...

bool	CLOCK_EnableUsbhs0DeviceClock (clock_usb_src_t src, uint32_t freq)
	Enable USB Device HS clock. More...

bool	CLOCK_EnableUsbhs0HostClock (clock_usb_src_t src, uint32_t freq)
	Enable USB HOST HS clock. More...

Driver version
#define	FSL_CLOCK_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
	CLOCK driver version 2.0.0. More...

Data Structure Documentation

struct pll_config_t

This structure can be used to configure the settings for a PLL setup structure. Fill in the desired configuration for the PLL and call the PLL setup function to fill in a PLL setup structure.

Data Fields
uint32_t	desiredRate
	Desired PLL rate in Hz.

uint32_t	inputRate
	PLL input clock in Hz, only used if PLL_CONFIGFLAG_USEINRATE flag is set.

uint32_t	flags
	PLL configuration flags, Or'ed value of PLL_CONFIGFLAG_* definitions.

struct pll_setup_t

It can be populated with the PLL setup function. If powering up or waiting for PLL lock, the PLL input clock source should be configured prior to PLL setup.

Data Fields
uint32_t	pllctrl
	PLL control register SYSPLLCTRL.

uint32_t	pllndec
	PLL NDEC register SYSPLLNDEC.

uint32_t	pllpdec
	PLL PDEC register SYSPLLPDEC.

uint32_t	pllmdec
	PLL MDEC registers SYSPLLPDEC.

uint32_t	pllRate
	Acutal PLL rate.

uint32_t	audpllfrac
	only aduio PLL has this function

uint32_t	flags
	PLL setup flags, Or'ed value of PLL_SETUPFLAG_* definitions.

struct usb_pll_setup_t

It can be populated with the USB PLL setup function. If powering up or waiting for USB PLL lock, the PLL input clock source should be configured prior to USB PLL setup.

Data Fields
uint8_t	msel
	USB PLL control register msel:1U-256U.

uint8_t	psel
	USB PLL control register psel:only support inter 1U 2U 4U 8U.

uint8_t	nsel
	USB PLL control register nsel:only suppoet inter 1U 2U 3U 4U.

bool	direct
	USB PLL CCO output control.

bool	bypass
	USB PLL inout clock bypass control.

bool	fbsel
	USB PLL ineter mode and non-integer mode control.

uint32_t	inputRate
	USB PLL input rate.

Macro Definition Documentation

#define FSL_CLOCK_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))

#define FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL 0

When set to 0, peripheral drivers will enable clock in initialize function and disable clock in de-initialize function. When set to 1, peripheral driver will not control the clock, application could contol the clock out of the driver.

Note: All drivers share this feature switcher. If it is set to 1, application should handle clock enable and disable for all drivers.

#define CLOCK_USR_CFG_PLL_CONFIG_CACHE_COUNT 2U

Once define this MACRO to be non-zero value, CLOCK_PllGetConfig() function would cache the recent calulation and accelerate the execution to get the right settings.

#define CLOCK_FROHF_SETTING_API_ROM_ADDRESS (0x03007933U)

#define CLOCK_SetupFROClocking (*((void (*)(uint32_t))(CLOCK_FROHF_SETTING_API_ROM_ADDRESS)))

Initialize the Core clock to given frequency (12, 48 or 96 MHz), this API is implememnt in ROM code. Turns on FRO and uses default CCO, if freq is 12000000, then high speed output is off, else high speed output is enabled. Usage: CLOCK_SetupFROClocking(frequency), (frequency must be one of 12, 48 or 96 MHz) Note: Need to make sure ROM and OTP has power(PDRUNCFG0[17,29]= 0U) before calling this API since this API is implemented in ROM code and the FROHF TRIM value is stored in OTP

#define ADC_CLOCKS

Value:

{              \
        kCLOCK_Adc0 \
    }

#define ROM_CLOCKS

Value:

{              \
        kCLOCK_Rom \
    }

#define SRAM_CLOCKS

Value:

{               \
        kCLOCK_Sram1, kCLOCK_Sram2, kCLOCK_Sram3 \
    }

#define FLASH_CLOCKS

Value:

{                \
        kCLOCK_Flash \
    }

#define FMC_CLOCKS

Value:

{              \
        kCLOCK_Fmc \
    }

#define EEPROM_CLOCKS

Value:

{                  \
        kCLOCK_Eeprom  \
    }

#define SPIFI_CLOCKS

Value:

{                 \
        kCLOCK_Spifi  \
    }

#define INPUTMUX_CLOCKS

Value:

{                        \
        kCLOCK_InputMux      \
    }

#define IOCON_CLOCKS

Value:

{                        \
        kCLOCK_Iocon         \
    }

#define GPIO_CLOCKS

Value:

{                        \
        kCLOCK_Gpio0,kCLOCK_Gpio1, kCLOCK_Gpio2, kCLOCK_Gpio3, kCLOCK_Gpio4, kCLOCK_Gpio5     \
    }

#define PINT_CLOCKS

Value:

{                        \
        kCLOCK_Pint          \
    }

#define GINT_CLOCKS

Value:

{                        \
        kCLOCK_Gint, kCLOCK_Gint          \
    }

#define DMA_CLOCKS

Value:

{                       \
        kCLOCK_Dma          \
    }

#define CRC_CLOCKS

Value:

{                       \
        kCLOCK_Crc          \
    }

#define WWDT_CLOCKS

Value:

{                        \
        kCLOCK_Wwdt          \
    }

#define RTC_CLOCKS

Value:

{                       \
        kCLOCK_Rtc          \
    }

#define ADC0_CLOCKS

Value:

{                        \
        kCLOCK_Adc0          \
    }

#define MRT_CLOCKS

Value:

{                        \
        kCLOCK_Mrt           \
    }

#define RIT_CLOCKS

Value:

{                        \
        kCLOCK_Rit           \
    }

#define SCT_CLOCKS

Value:

{                        \
        kCLOCK_Sct0          \
    }

#define MCAN_CLOCKS

Value:

{                        \
        kCLOCK_Mcan0, kCLOCK_Mcan1          \
    }

#define UTICK_CLOCKS

Value:

{                        \
        kCLOCK_Utick         \
    }

#define FLEXCOMM_CLOCKS

Value:

{                                                                          \
        kCLOCK_FlexComm0, kCLOCK_FlexComm1, kCLOCK_FlexComm2, kCLOCK_FlexComm3, \
                    kCLOCK_FlexComm4, kCLOCK_FlexComm5, kCLOCK_FlexComm6, kCLOCK_FlexComm7, \
                                        kCLOCK_FlexComm8, kCLOCK_FlexComm9, kCLOCK_FlexComm10 \
    }

#define LPUART_CLOCKS

Value:

{                                                                                                         \
        kCLOCK_MinUart0, kCLOCK_MinUart1, kCLOCK_MinUart2, kCLOCK_MinUart3, kCLOCK_MinUart4, kCLOCK_MinUart5, \
            kCLOCK_MinUart6, kCLOCK_MinUart7, kCLOCK_MinUart8,kCLOCK_MinUart9     \
    }

#define BI2C_CLOCKS

Value:

{                                                                                                                   \
        kCLOCK_BI2c0, kCLOCK_BI2c1, kCLOCK_BI2c2, kCLOCK_BI2c3, kCLOCK_BI2c4, kCLOCK_BI2c5, kCLOCK_BI2c6, kCLOCK_BI2c7, \
        kCLOCK_BI2c8, kCLOCK_BI2c9  \
    }

#define LPSI_CLOCKS

Value:

{                                                                                                                   \
        kCLOCK_LSpi0, kCLOCK_LSpi1, kCLOCK_LSpi2, kCLOCK_LSpi3, kCLOCK_LSpi4, kCLOCK_LSpi5, kCLOCK_LSpi6, kCLOCK_LSpi7, \
        kCLOCK_LSpi8, kCLOCK_LSpi9  \
    }

#define FLEXI2S_CLOCKS

Value:

{                                                                                                         \
        kCLOCK_FlexI2s0, kCLOCK_FlexI2s1, kCLOCK_FlexI2s2, kCLOCK_FlexI2s3, kCLOCK_FlexI2s4, kCLOCK_FlexI2s5, \
            kCLOCK_FlexI2s6, kCLOCK_FlexI2s7, kCLOCK_FlexI2s8, kCLOCK_FlexI2s9                                                                  \
    }

#define DMIC_CLOCKS

Value:

{               \
        kCLOCK_DMic \
    }

#define CTIMER_CLOCKS

Value:

{                                                                               \
        kCLOCK_Ct32b0, kCLOCK_Ct32b1, kCLOCK_Ct32b2, kCLOCK_Ct32b3, kCLOCK_Ct32b4   \
    }

#define LCD_CLOCKS

Value:

{               \
        kCLOCK_Lcd  \
    }

#define SDIO_CLOCKS

Value:

{                \
        kCLOCK_Sdio  \
    }

#define USBRAM_CLOCKS

Value:

{                    \
        kCLOCK_UsbRam1   \
    }

#define EMC_CLOCKS

Value:

{                    \
        kCLOCK_Emc       \
    }

#define ETH_CLOCKS

Value:

{                    \
        kCLOCK_Eth       \
    }

#define AES_CLOCKS

Value:

{                    \
        kCLOCK_Aes       \
    }

#define OTP_CLOCKS

Value:

{                    \
        kCLOCK_Otp       \
    }

#define RNG_CLOCKS

Value:

{                    \
        kCLOCK_Rng       \
    }

#define USBHMR0_CLOCKS

Value:

{                        \
        kCLOCK_Usbhmr0       \
    }

#define USBHSL0_CLOCKS

Value:

{                        \
        kCLOCK_Usbhsl0       \
    }

#define SHA0_CLOCKS

Value:

{                     \
        kCLOCK_Sha0       \
    }

#define SMARTCARD_CLOCKS

Value:

{                     \
        kCLOCK_SmartCard0, kCLOCK_SmartCard1 \
    }

#define USBD_CLOCKS

Value:

{                \
        kCLOCK_Usbd0, kCLOCK_Usbh1, kCLOCK_Usbd1 \
    }

#define USBH_CLOCKS

Value:

{                \
        kCLOCK_Usbh1 \
    }

#define CLK_GATE_REG_OFFSET_SHIFT 8U

#define MUX_A	(	m,
		choice
	)	(((m) << 0) \| ((choice + 1) << 8))

[4 bits for choice, where 1 is A, 2 is B, 3 is C and 4 is D, 0 means end of descriptor] [8 bits mux ID]*

#define PLL_CONFIGFLAG_USEINRATE (1 << 0)

When the PLL_CONFIGFLAG_USEINRATE flag is selected, the 'InputRate' field in the configuration structure must be assigned with the expected PLL frequency. If the PLL_CONFIGFLAG_USEINRATE is not used, 'InputRate' is ignored in the configuration function and the driver will determine the PLL rate from the currently selected PLL source. This flag might be used to configure the PLL input clock more accurately when using the WDT oscillator or a more dyanmic CLKIN source.

When the PLL_CONFIGFLAG_FORCENOFRACT flag is selected, the PLL hardware for the automatic bandwidth selection, Spread Spectrum (SS) support, and fractional M-divider are not used.
Flag to use InputRate in PLL configuration structure for setup

#define PLL_SETUPFLAG_POWERUP (1 << 0)

Setup will power on the PLL after setup

Enumeration Type Documentation

enum clock_ip_name_t

enum clock_name_t

Enumerator
kCLOCK_CoreSysClk	Core/system clock (aka MAIN_CLK)
kCLOCK_BusClk	Bus clock (AHB clock)
kCLOCK_ClockOut	CLOCKOUT.
kCLOCK_FroHf	FRO48/96.
kCLOCK_SpiFi	SPIFI.
kCLOCK_Adc	ADC.
kCLOCK_Usb0	USB0.
kCLOCK_Usb1	USB1.
kCLOCK_UsbPll	USB1 PLL.
kCLOCK_Mclk	MCLK.
kCLOCK_Sct	SCT.
kCLOCK_SDio	SDIO.
kCLOCK_EMC	EMC.
kCLOCK_LCD	LCD.
kCLOCK_MCAN0	MCAN0.
kCLOCK_MCAN1	MCAN1.
kCLOCK_Fro12M	FRO12M.
kCLOCK_ExtClk	External Clock.
kCLOCK_PllOut	PLL Output.
kCLOCK_UsbClk	USB input.
kClock_WdtOsc	Watchdog Oscillator.
kCLOCK_Frg	Frg Clock.
kCLOCK_Dmic	Digital Mic clock.
kCLOCK_AsyncApbClk	Async APB clock.
kCLOCK_FlexI2S	FlexI2S clock.
kCLOCK_Flexcomm0	Flexcomm0Clock.
kCLOCK_Flexcomm1	Flexcomm1Clock.
kCLOCK_Flexcomm2	Flexcomm2Clock.
kCLOCK_Flexcomm3	Flexcomm3Clock.
kCLOCK_Flexcomm4	Flexcomm4Clock.
kCLOCK_Flexcomm5	Flexcomm5Clock.
kCLOCK_Flexcomm6	Flexcomm6Clock.
kCLOCK_Flexcomm7	Flexcomm7Clock.
kCLOCK_Flexcomm8	Flexcomm8Clock.
kCLOCK_Flexcomm9	Flexcomm9Clock.
kCLOCK_Flexcomm10	Flexcomm10Clock.

enum async_clock_src_t

Clock source selections for the asynchronous APB clock

Enumerator
kCLOCK_AsyncMainClk	Main System clock.
kCLOCK_AsyncFro12Mhz	12MHz FRO

enum pll_error_t

Enumerator
kStatus_PLL_Success	PLL operation was successful.
kStatus_PLL_OutputTooLow	PLL output rate request was too low.
kStatus_PLL_OutputTooHigh	PLL output rate request was too high.
kStatus_PLL_InputTooLow	PLL input rate is too low.
kStatus_PLL_InputTooHigh	PLL input rate is too high.
kStatus_PLL_OutsideIntLimit	Requested output rate isn't possible.
kStatus_PLL_CCOTooLow	Requested CCO rate isn't possible.
kStatus_PLL_CCOTooHigh	Requested CCO rate isn't possible.

enum clock_usb_src_t

Enumerator
kCLOCK_UsbSrcFro	Use FRO 96 or 48 MHz.
kCLOCK_UsbSrcSystemPll	Use System PLL output.
kCLOCK_UsbSrcMainClock	Use Main clock.
kCLOCK_UsbSrcUsbPll	Use USB PLL clock.
kCLOCK_UsbSrcNone	Use None, this may be selected in order to reduce power when no output is needed.

enum usb_pll_psel

Function Documentation

void CLOCK_AttachClk ( clock_attach_id_t connection )

Parameters

connection : Clock to be configured.

Returns: Nothing

void CLOCK_SetClkDiv	(	clock_div_name_t	div_name,
		uint32_t	divided_by_value,
		bool	reset
	)

Parameters

div_name	: Clock divider name
divided_by_value,:	Value to be divided
reset	: Whether to reset the divider counter.

Returns: Nothing

uint32_t CLOCK_GetFreq ( clock_name_t clockName )

Returns: Frequency of selected clock

uint32_t CLOCK_GetFro12MFreq ( void )

Returns: Frequency of FRO 12MHz

uint32_t CLOCK_GetClockOutClkFreq ( void )

Returns: Frequency of ClockOut

uint32_t CLOCK_GetSpifiClkFreq ( void )

Returns: Frequency of Spifi.

uint32_t CLOCK_GetAdcClkFreq ( void )

Returns: Frequency of Adc Clock.

uint32_t CLOCK_GetUsb0ClkFreq ( void )

Returns: Frequency of Usb0 Clock.

uint32_t CLOCK_GetUsb1ClkFreq ( void )

Returns: Frequency of Usb1 Clock.

uint32_t CLOCK_GetMclkClkFreq ( void )

Returns: Frequency of MClk Clock.

uint32_t CLOCK_GetSctClkFreq ( void )

Returns: Frequency of SCTimer Clock.

uint32_t CLOCK_GetSdioClkFreq ( void )

Returns: Frequency of SDIO Clock.

uint32_t CLOCK_GetLcdClkFreq ( void )

Returns: Frequency of LCD Clock.

uint32_t CLOCK_GetLcdClkIn ( void )

Returns: Frequency of LCD CLKIN Clock.

uint32_t CLOCK_GetExtClkFreq ( void )

Returns: Frequency of External Clock. If no external clock is used returns 0.

uint32_t CLOCK_GetWdtOscFreq ( void )

Returns: Frequency of Watchdog Oscillator

uint32_t CLOCK_GetFroHfFreq ( void )

Returns: Frequency of High-Freq output of FRO

uint32_t CLOCK_GetFrgClkFreq ( void )

Returns: Frequency of FRG

uint32_t CLOCK_GetDmicClkFreq ( void )

Returns: Frequency of DMIC

uint32_t CLOCK_GetPllOutFreq ( void )

Returns: Frequency of PLL

uint32_t CLOCK_GetUsbPllOutFreq ( void )

Returns: Frequency of PLL

uint32_t CLOCK_GetAudioPllOutFreq ( void )

Returns: Frequency of PLL

uint32_t CLOCK_GetOsc32KFreq ( void )

Returns: Frequency of 32kHz osc

uint32_t CLOCK_GetCoreSysClkFreq ( void )

Returns: Frequency of Core System

uint32_t CLOCK_GetI2SMClkFreq ( void )

Returns: Frequency of I2S MCLK Clock

uint32_t CLOCK_GetFlexCommClkFreq ( uint32_t id )

Returns: Frequency of Flexcomm functional Clock

__STATIC_INLINE async_clock_src_t CLOCK_GetAsyncApbClkSrc ( void )

Returns: Asynchronous APB CLock source

uint32_t CLOCK_GetAsyncApbClkFreq ( void )

Returns: Frequency of Asynchronous APB Clock Clock

uint32_t CLOCK_GetAudioPLLInClockRate ( void )

Returns: Audio PLL input clock rate

uint32_t CLOCK_GetSystemPLLInClockRate ( void )

Returns: System PLL input clock rate

uint32_t CLOCK_GetSystemPLLOutClockRate ( bool recompute )

Parameters

recompute : Forces a PLL rate recomputation if true

Returns: System PLL output clock rate

Note: The PLL rate is cached in the driver in a variable as the rate computation function can take some time to perform. It is recommended to use 'false' with the 'recompute' parameter.

uint32_t CLOCK_GetAudioPLLOutClockRate ( bool recompute )

Parameters

recompute : Forces a AUDIO PLL rate recomputation if true

Returns: System AUDIO PLL output clock rate

Note: The AUDIO PLL rate is cached in the driver in a variable as the rate computation function can take some time to perform. It is recommended to use 'false' with the 'recompute' parameter.

uint32_t CLOCK_GetUSbPLLOutClockRate ( bool recompute )

Parameters

recompute : Forces a USB PLL rate recomputation if true

Returns: System USB PLL output clock rate

Note: The USB PLL rate is cached in the driver in a variable as the rate computation function can take some time to perform. It is recommended to use 'false' with the 'recompute' parameter.

__STATIC_INLINE void CLOCK_SetBypassPLL ( bool bypass )

bypass : true to bypass PLL (PLL output = PLL input, false to disable bypass

Returns: System PLL output clock rate

__STATIC_INLINE bool CLOCK_IsSystemPLLLocked ( void )

Returns: true if the PLL is locked, false if not locked

__STATIC_INLINE bool CLOCK_IsUsbPLLLocked ( void )

Returns: true if the USB PLL is locked, false if not locked

__STATIC_INLINE bool CLOCK_IsAudioPLLLocked ( void )

Returns: true if the AUDIO PLL is locked, false if not locked

__STATIC_INLINE void CLOCK_Enable_SysOsc ( bool enable )

enable : true to enable SYS OSC, false to disable SYS OSC

void CLOCK_SetStoredPLLClockRate ( uint32_t rate )

Parameters

rate,: Current rate of the PLL

Returns: Nothing

void CLOCK_SetStoredAudioPLLClockRate ( uint32_t rate )

Parameters

rate,: Current rate of the PLL

Returns: Nothing

uint32_t CLOCK_GetSystemPLLOutFromSetup ( pll_setup_t * pSetup )

Parameters

pSetup : Pointer to a PLL setup structure

Returns: System PLL output clock rate the setup structure will generate

uint32_t CLOCK_GetAudioPLLOutFromSetup ( pll_setup_t * pSetup )

Parameters

pSetup : Pointer to a PLL setup structure

Returns: System PLL output clock rate the setup structure will generate

uint32_t CLOCK_GetAudioPLLOutFromFractSetup ( pll_setup_t * pSetup )

Parameters

pSetup : Pointer to a PLL setup structure

Returns: System PLL output clock rate the setup structure will generate

uint32_t CLOCK_GetUsbPLLOutFromSetup ( const usb_pll_setup_t * pSetup )

Parameters

pSetup : Pointer to a PLL setup structure

Returns: System PLL output clock rate the setup structure will generate

pll_error_t CLOCK_SetupPLLData	(	pll_config_t *	pControl,
		pll_setup_t *	pSetup
	)

Parameters

pControl	: Pointer to populated PLL control structure to generate setup with
pSetup	: Pointer to PLL setup structure to be filled

Returns: PLL_ERROR_SUCCESS on success, or PLL setup error code

Note: Actual frequency for setup may vary from the desired frequency based on the accuracy of input clocks, rounding, non-fractional PLL mode, etc.

pll_error_t CLOCK_SetupAudioPLLData	(	pll_config_t *	pControl,
		pll_setup_t *	pSetup
	)

Parameters

pControl	: Pointer to populated PLL control structure to generate setup with
pSetup	: Pointer to PLL setup structure to be filled

Returns: PLL_ERROR_SUCCESS on success, or PLL setup error code

Note: Actual frequency for setup may vary from the desired frequency based on the accuracy of input clocks, rounding, non-fractional PLL mode, etc.

pll_error_t CLOCK_SetupSystemPLLPrec	(	pll_setup_t *	pSetup,
		uint32_t	flagcfg
	)

Parameters

pSetup	: Pointer to populated PLL setup structure
flagcfg	: Flag configuration for PLL config structure

Returns: PLL_ERROR_SUCCESS on success, or PLL setup error code

Note: This function will power off the PLL, setup the PLL with the new setup data, and then optionally powerup the PLL, wait for PLL lock, and adjust system voltages to the new PLL rate. The function will not alter any source clocks (ie, main systen clock) that may use the PLL, so these should be setup prior to and after exiting the function.

pll_error_t CLOCK_SetupAudioPLLPrec	(	pll_setup_t *	pSetup,
		uint32_t	flagcfg
	)

Parameters

pSetup	: Pointer to populated PLL setup structure
flagcfg	: Flag configuration for PLL config structure

Returns: PLL_ERROR_SUCCESS on success, or PLL setup error code

Note: This function will power off the PLL, setup the PLL with the new setup data, and then optionally powerup the AUDIO PLL, wait for PLL lock, and adjust system voltages to the new AUDIOPLL rate. The function will not alter any source clocks (ie, main systen clock) that may use the AUDIO PLL, so these should be setup prior to and after exiting the function.

pll_error_t CLOCK_SetupAudioPLLPrecFract	(	pll_setup_t *	pSetup,
		uint32_t	flagcfg
	)

Parameters

pSetup	: Pointer to populated PLL setup structure
flagcfg	: Flag configuration for PLL config structure

Returns: PLL_ERROR_SUCCESS on success, or PLL setup error code

Note: This function will power off the PLL, setup the PLL with the new setup data, and then optionally powerup the AUDIO PLL, wait for PLL lock, and adjust system voltages to the new AUDIOPLL rate. The function will not alter any source clocks (ie, main systen clock) that may use the AUDIO PLL, so these should be setup prior to and after exiting the function.

pll_error_t CLOCK_SetPLLFreq ( const pll_setup_t * pSetup )

Parameters

pSetup : Pointer to populated PLL setup structure

Returns: kStatus_PLL_Success on success, or PLL setup error code

Note: This function will power off the PLL, setup the PLL with the new setup data, and then optionally powerup the PLL, wait for PLL lock, and adjust system voltages to the new PLL rate. The function will not alter any source clocks (ie, main systen clock) that may use the PLL, so these should be setup prior to and after exiting the function.

pll_error_t CLOCK_SetAudioPLLFreq ( const pll_setup_t * pSetup )

Parameters

pSetup : Pointer to populated PLL setup structure

Returns: kStatus_PLL_Success on success, or Audio PLL setup error code

Note: This function will power off the PLL, setup the Audio PLL with the new setup data, and then optionally powerup the PLL, wait for Audio PLL lock, and adjust system voltages to the new PLL rate. The function will not alter any source clocks (ie, main systen clock) that may use the Audio PLL, so these should be setup prior to and after exiting the function.

pll_error_t CLOCK_SetUsbPLLFreq ( const usb_pll_setup_t * pSetup )

Parameters

pSetup : Pointer to populated USB PLL setup structure

Returns: kStatus_PLL_Success on success, or USB PLL setup error code

Note: This function will power off the USB PLL, setup the PLL with the new setup data, and then optionally powerup the USB PLL, wait for USB PLL lock, and adjust system voltages to the new USB PLL rate. The function will not alter any source clocks (ie, usb pll clock) that may use the USB PLL, so these should be setup prior to and after exiting the function.

void CLOCK_SetupSystemPLLMult	(	uint32_t	multiply_by,
		uint32_t	input_freq
	)

Parameters

multiply_by	: multiplier
input_freq	: Clock input frequency of the PLL

Returns: Nothing

Note: Unlike the Chip_Clock_SetupSystemPLLPrec() function, this function does not disable or enable PLL power, wait for PLL lock, or adjust system voltages. These must be done in the application. The function will not alter any source clocks (ie, main systen clock) that may use the PLL, so these should be setup prior to and after exiting the function.

static void CLOCK_DisableUsbDevicefs0Clock ( clock_ip_name_t clk )

inlinestatic

Disable USB clock.

bool CLOCK_EnableUsbfs0DeviceClock	(	clock_usb_src_t	src,
		uint32_t	freq
	)

Parameters

src	: clock source
freq,:	clock frequency Enable USB Device Full Speed clock.

bool CLOCK_EnableUsbfs0HostClock	(	clock_usb_src_t	src,
		uint32_t	freq
	)

Parameters

src	: clock source
freq,:	clock frequency Enable USB HOST Full Speed clock.

bool CLOCK_EnableUsbhs0DeviceClock	(	clock_usb_src_t	src,
		uint32_t	freq
	)

Parameters

src	: clock source
freq,:	clock frequency Enable USB Device High Speed clock.

bool CLOCK_EnableUsbhs0HostClock	(	clock_usb_src_t	src,
		uint32_t	freq
	)

Parameters

src	: clock source
freq,:	clock frequency Enable USB HOST High Speed clock.

Overview

Function description

SYSCON Clock frequency functions

SYSCON clock Selection Muxes

SYSCON clock dividers

SYSCON flash wait states

Typical use case

Files

Data Structures

Macros

Enumerations

Functions

Driver version

Data Structure Documentation

Data Fields

Data Fields

Data Fields

Macro Definition Documentation

Enumeration Type Documentation

Function Documentation