MCUXpresso SDK API Reference Manual  Rev 2.13.0
NXP Semiconductors
 All Data Structures Functions Variables Typedefs Enumerations Enumerator Groups Pages
FLEXRAM: on-chip RAM manager

Overview

The MCUXpresso SDK provides a driver for the FLEXRAM module of MCUXpresso SDK devices.

The FLEXRAM module intergrates the ITCM, DTCM, and OCRAM controllers, and supports parameterized RAM array and RAM array portioning.

This example code shows how to allocate RAM using the FLEXRAM driver.

Refer to the driver examples codes located at <SDK_ROOT>/boards/<BOARD>/driver_examples/flexram.

Macros

#define FLEXRAM_ECC_ERROR_DETAILED_INFO   0U /* Define to zero means get raw ECC error information, which needs parse it by user. */
 Get ECC error detailed information. More...
 

Enumerations

enum  {
  kFLEXRAM_Read = 0U,
  kFLEXRAM_Write = 1U
}
 Flexram write/read selection. More...
 
enum  {
  kFLEXRAM_OCRAMAccessError = FLEXRAM_INT_STATUS_OCRAM_ERR_STATUS_MASK,
  kFLEXRAM_DTCMAccessError = FLEXRAM_INT_STATUS_DTCM_ERR_STATUS_MASK,
  kFLEXRAM_ITCMAccessError = FLEXRAM_INT_STATUS_ITCM_ERR_STATUS_MASK,
  kFLEXRAM_OCRAMMagicAddrMatch = FLEXRAM_INT_STATUS_OCRAM_MAM_STATUS_MASK,
  kFLEXRAM_DTCMMagicAddrMatch = FLEXRAM_INT_STATUS_DTCM_MAM_STATUS_MASK,
  kFLEXRAM_ITCMMagicAddrMatch = FLEXRAM_INT_STATUS_ITCM_MAM_STATUS_MASK
}
 Interrupt status flag mask. More...
 
enum  flexram_tcm_access_mode_t {
  kFLEXRAM_TCMAccessFastMode = 0U,
  kFLEXRAM_TCMAccessWaitMode = 1U
}
 FLEXRAM TCM access mode. More...
 
enum  {
  kFLEXRAM_TCMSize32KB = 32 * 1024U,
  kFLEXRAM_TCMSize64KB = 64 * 1024U,
  kFLEXRAM_TCMSize128KB = 128 * 1024U,
  kFLEXRAM_TCMSize256KB = 256 * 1024U,
  kFLEXRAM_TCMSize512KB = 512 * 1024U
}
 FLEXRAM TCM support size. More...
 

Functions

static void FLEXRAM_SetTCMReadAccessMode (FLEXRAM_Type *base, flexram_tcm_access_mode_t mode)
 FLEXRAM module sets TCM read access mode. More...
 
static void FLEXRAM_SetTCMWriteAccessMode (FLEXRAM_Type *base, flexram_tcm_access_mode_t mode)
 FLEXRAM module set TCM write access mode. More...
 
static void FLEXRAM_EnableForceRamClockOn (FLEXRAM_Type *base, bool enable)
 FLEXRAM module force ram clock on. More...
 
static void FLEXRAM_SetOCRAMMagicAddr (FLEXRAM_Type *base, uint16_t magicAddr, uint32_t rwSel)
 FLEXRAM OCRAM magic addr configuration. More...
 
static void FLEXRAM_SetDTCMMagicAddr (FLEXRAM_Type *base, uint16_t magicAddr, uint32_t rwSel)
 FLEXRAM DTCM magic addr configuration. More...
 
static void FLEXRAM_SetITCMMagicAddr (FLEXRAM_Type *base, uint16_t magicAddr, uint32_t rwSel)
 FLEXRAM ITCM magic addr configuration. More...
 

Driver version

#define FSL_FLEXRAM_DRIVER_VERSION   (MAKE_VERSION(2U, 2U, 0U))
 Driver version. More...
 

Initialization and de-initialization

void FLEXRAM_Init (FLEXRAM_Type *base)
 FLEXRAM module initialization function. More...
 
void FLEXRAM_Deinit (FLEXRAM_Type *base)
 De-initializes the FLEXRAM.
 

Status

static uint32_t FLEXRAM_GetInterruptStatus (FLEXRAM_Type *base)
 FLEXRAM module gets interrupt status. More...
 
static void FLEXRAM_ClearInterruptStatus (FLEXRAM_Type *base, uint32_t status)
 FLEXRAM module clears interrupt status. More...
 
static void FLEXRAM_EnableInterruptStatus (FLEXRAM_Type *base, uint32_t status)
 FLEXRAM module enables interrupt status. More...
 
static void FLEXRAM_DisableInterruptStatus (FLEXRAM_Type *base, uint32_t status)
 FLEXRAM module disable interrupt status. More...
 

Interrupts

static void FLEXRAM_EnableInterruptSignal (FLEXRAM_Type *base, uint32_t status)
 FLEXRAM module enables interrupt. More...
 
static void FLEXRAM_DisableInterruptSignal (FLEXRAM_Type *base, uint32_t status)
 FLEXRAM module disables interrupt. More...
 

Macro Definition Documentation

#define FSL_FLEXRAM_DRIVER_VERSION   (MAKE_VERSION(2U, 2U, 0U))
#define FLEXRAM_ECC_ERROR_DETAILED_INFO   0U /* Define to zero means get raw ECC error information, which needs parse it by user. */

Enumeration Type Documentation

anonymous enum
Enumerator
kFLEXRAM_Read 

read

kFLEXRAM_Write 

write

anonymous enum
Enumerator
kFLEXRAM_OCRAMAccessError 

OCRAM accesses unallocated address.

kFLEXRAM_DTCMAccessError 

DTCM accesses unallocated address.

kFLEXRAM_ITCMAccessError 

ITCM accesses unallocated address.

kFLEXRAM_OCRAMMagicAddrMatch 

OCRAM magic address match.

kFLEXRAM_DTCMMagicAddrMatch 

DTCM magic address match.

kFLEXRAM_ITCMMagicAddrMatch 

ITCM magic address match.

Fast access mode expected to be finished in 1-cycle; Wait access mode expected to be finished in 2-cycle. Wait access mode is a feature of the flexram and it should be used when the CPU clock is too fast to finish TCM access in 1-cycle. Normally, fast mode is the default mode, the efficiency of the TCM access will better.

Enumerator
kFLEXRAM_TCMAccessFastMode 

fast access mode

kFLEXRAM_TCMAccessWaitMode 

wait access mode

anonymous enum
Enumerator
kFLEXRAM_TCMSize32KB 

TCM total size be 32KB.

kFLEXRAM_TCMSize64KB 

TCM total size be 64KB.

kFLEXRAM_TCMSize128KB 

TCM total size be 128KB.

kFLEXRAM_TCMSize256KB 

TCM total size be 256KB.

kFLEXRAM_TCMSize512KB 

TCM total size be 512KB.

Function Documentation

void FLEXRAM_Init ( FLEXRAM_Type *  base)
Parameters
baseFLEXRAM base address.
static uint32_t FLEXRAM_GetInterruptStatus ( FLEXRAM_Type *  base)
inlinestatic
Parameters
baseFLEXRAM base address.
static void FLEXRAM_ClearInterruptStatus ( FLEXRAM_Type *  base,
uint32_t  status 
)
inlinestatic
Parameters
baseFLEXRAM base address.
statusStatus to be cleared.
static void FLEXRAM_EnableInterruptStatus ( FLEXRAM_Type *  base,
uint32_t  status 
)
inlinestatic
Parameters
baseFLEXRAM base address.
statusStatus to be enabled.
static void FLEXRAM_DisableInterruptStatus ( FLEXRAM_Type *  base,
uint32_t  status 
)
inlinestatic
Parameters
baseFLEXRAM base address.
statusStatus to be disabled.
static void FLEXRAM_EnableInterruptSignal ( FLEXRAM_Type *  base,
uint32_t  status 
)
inlinestatic
Parameters
baseFLEXRAM base address.
statusStatus interrupt to be enabled.
static void FLEXRAM_DisableInterruptSignal ( FLEXRAM_Type *  base,
uint32_t  status 
)
inlinestatic
Parameters
baseFLEXRAM base address.
statusStatus interrupt to be disabled.
static void FLEXRAM_SetTCMReadAccessMode ( FLEXRAM_Type *  base,
flexram_tcm_access_mode_t  mode 
)
inlinestatic
Parameters
baseFLEXRAM base address.
modeAccess mode.
static void FLEXRAM_SetTCMWriteAccessMode ( FLEXRAM_Type *  base,
flexram_tcm_access_mode_t  mode 
)
inlinestatic
Parameters
baseFLEXRAM base address.
modeAccess mode.
static void FLEXRAM_EnableForceRamClockOn ( FLEXRAM_Type *  base,
bool  enable 
)
inlinestatic
Parameters
baseFLEXRAM base address.
enableEnable or disable clock force on.
static void FLEXRAM_SetOCRAMMagicAddr ( FLEXRAM_Type *  base,
uint16_t  magicAddr,
uint32_t  rwSel 
)
inlinestatic

When read/write access hit magic address, it will generate interrupt.

Parameters
baseFLEXRAM base address.
magicAddrMagic address, the actual address bits [18:3] is corresponding to the register field [16:1].
rwSelRead/write selection. 0 for read access while 1 for write access.
static void FLEXRAM_SetDTCMMagicAddr ( FLEXRAM_Type *  base,
uint16_t  magicAddr,
uint32_t  rwSel 
)
inlinestatic

When read/write access hits magic address, it will generate interrupt.

Parameters
baseFLEXRAM base address.
magicAddrMagic address, the actual address bits [18:3] is corresponding to the register field [16:1].
rwSelRead/write selection. 0 for read access while 1 write access.
static void FLEXRAM_SetITCMMagicAddr ( FLEXRAM_Type *  base,
uint16_t  magicAddr,
uint32_t  rwSel 
)
inlinestatic

When read/write access hits magic address, it will generate interrupt.

Parameters
baseFLEXRAM base address.
magicAddrMagic address, the actual address bits [18:3] is corresponding to the register field [16:1].
rwSelRead/write selection. 0 for read access while 1 for write access.