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MCUXpresso SDK API Reference Manual
Rev 2.13.0
NXP Semiconductors
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Reset driver supports peripheral reset and system reset.
Macros | |
#define | FLASH_RSTS_N |
Enumerations | |
enum | SYSCON_RSTn_t { kFLASH_RST_N_SHIFT_RSTn = 0 | 4U, kI2C0_RST_N_SHIFT_RSTn = 0 | 5U, kGPIO0_RST_N_SHIFT_RSTn = 0 | 6U, kSWM_RST_N_SHIFT_RSTn = 0 | 7U, kWKT_RST_N_SHIFT_RSTn = 0 | 9U, kMRT_RST_N_SHIFT_RSTn = 0 | 10U, kSPI0_RST_N_SHIFT_RSTn = 0 | 11U, kCRC_RST_SHIFT_RSTn = 0 | 13U, kUART0_RST_N_SHIFT_RSTn = 0 | 14U, kUART1_RST_N_SHIFT_RSTn = 0 | 15U, kIOCON_RST_N_SHIFT_RSTn = 0 | 18U, kACMP_RST_N_SHIFT_RSTn = 0 | 19U, kI2C1_RST_N_SHIFT_RSTn = 0 | 21U, kADC_RST_N_SHIFT_RSTn = 0 | 24U, kCTIMER0_RST_N_SHIFT_RSTn = 0 | 25U, kDAC0_RST_N_SHIFT_RSTn = 0 | 27U, kGPIOINT_RST_N_SHIFT_RSTn = 0 | 28U, kCAPT_RST_N_SHIFT_RSTn = 65536 | 0U, kFRG0_RST_N_SHIFT_RSTn = 65536 | 3U, kPLU_RST_N_SHIFT_RSTn = 65536 | 5U } |
Enumeration for peripheral reset control bits. More... | |
Functions | |
void | RESET_PeripheralReset (reset_ip_name_t peripheral) |
Reset peripheral module. More... | |
Driver version | |
#define | FSL_RESET_DRIVER_VERSION (MAKE_VERSION(2, 0, 1)) |
reset driver version 2.0.1. More... | |
#define FSL_RESET_DRIVER_VERSION (MAKE_VERSION(2, 0, 1)) |
#define FLASH_RSTS_N |
Array initializers with peripheral reset bits
enum SYSCON_RSTn_t |
Defines the enumeration for peripheral reset control bits in PRESETCTRL/ASYNCPRESETCTRL registers
void RESET_PeripheralReset | ( | reset_ip_name_t | peripheral | ) |
Reset peripheral module.
peripheral | Peripheral to reset. The enum argument contains encoding of reset register and reset bit position in the reset register. |