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MCUXpresso SDK API Reference Manual
Rev 2.16.000
NXP Semiconductors
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The MCUXpresso SDK provides APIs for MCUXpresso SDK devices' clock operation.
The clock driver supports:
Files | |
file | fsl_clock.h |
Data Structures | |
struct | clock_frg_clk_config_t |
PLL configuration for FRG. More... | |
struct | clock_avpll_config_t |
AVPLL configuration. More... | |
Macros | |
#define | FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL 0 |
Configure whether driver controls clock. More... | |
#define | GPIO_CLOCKS |
Clock ip name array for GPIO. More... | |
#define | CACHE64_CLOCKS |
Clock ip name array for CACHE64. More... | |
#define | FLEXSPI_CLOCKS |
Clock ip name array for FLEXSPI. More... | |
#define | FLEXCOMM_CLOCKS |
Clock ip name array for FLEXCOMM. More... | |
#define | USART_CLOCKS |
Clock ip name array for LPUART. More... | |
#define | I2C_CLOCKS |
Clock ip name array for I2C. More... | |
#define | SPI_CLOCKS |
Clock ip name array for SPI. More... | |
#define | ACOMP_CLOCKS |
Clock ip name array for ACOMP. More... | |
#define | ADC_CLOCKS |
Clock ip name array for ADC. More... | |
#define | DAC_CLOCKS |
Clock ip name array for DAC. More... | |
#define | LCDIC_CLOCKS |
Clock ip name array for LCDIC. More... | |
#define | DMA_CLOCKS |
Clock ip name array for DMA. More... | |
#define | DMIC_CLOCKS |
Clock ip name array for DMIC. More... | |
#define | ENET_CLOCKS |
Clock ip name array for ENET. More... | |
#define | ENET_EXTRA_CLOCKS |
Extra clock ip name array for ENET. More... | |
#define | POWERQUAD_CLOCKS |
Clock ip name array for Powerquad. | |
#define | OSTIMER_CLOCKS |
Clock ip name array for OSTimer. | |
#define | CTIMER_CLOCKS |
Clock ip name array for CT32B. More... | |
#define | UTICK_CLOCKS |
Clock ip name array for UTICK. More... | |
#define | MRT_CLOCKS |
Clock ip name array for MRT. More... | |
#define | SCT_CLOCKS |
Clock ip name array for SCT. More... | |
#define | RTC_CLOCKS |
Clock ip name array for RTC. More... | |
#define | WWDT_CLOCKS |
Clock ip name array for WWDT. More... | |
#define | TRNG_CLOCKS |
Clock ip name array for TRNG. More... | |
#define | USIM_CLOCKS |
Clock ip name array for USIM. More... | |
#define | CLK_GATE_REG_OFFSET_SHIFT 8U |
Clock gate name used for CLOCK_EnableClock/CLOCK_DisableClock. More... | |
Functions | |
uint32_t | CLOCK_GetT3PllMciIrcClkFreq (void) |
Return Frequency of t3pll_mci_48_60m_irc. More... | |
uint32_t | CLOCK_GetT3PllMci213mClkFreq (void) |
Return Frequency of t3pll_mci_213p3m. More... | |
uint32_t | CLOCK_GetT3PllMci256mClkFreq (void) |
Return Frequency of t3pll_mci_256m. More... | |
uint32_t | CLOCK_GetT3PllMciFlexspiClkFreq (void) |
Return Frequency of t3pll_mci_flexspi_clk. More... | |
uint32_t | CLOCK_GetTcpuMciClkFreq (void) |
Return Frequency of tcpu_mci_clk. More... | |
uint32_t | CLOCK_GetTcpuMciFlexspiClkFreq (void) |
Return Frequency of tcpu_mci_flexspi_clk. More... | |
uint32_t | CLOCK_GetTddrMciFlexspiClkFreq (void) |
Return Frequency of tddr_mci_flexspi_clk. More... | |
uint32_t | CLOCK_GetTddrMciEnetClkFreq (void) |
Return Frequency of tddr_mci_enet_clk. More... | |
void | CLOCK_EnableClock (clock_ip_name_t clk) |
Enable the clock for specific IP. More... | |
void | CLOCK_DisableClock (clock_ip_name_t clk) |
Disable the clock for specific IP. More... | |
void | CLOCK_AttachClk (clock_attach_id_t connection) |
Configure the clock selection muxes. More... | |
void | CLOCK_SetClkDiv (clock_div_name_t name, uint32_t divider) |
Setup clock dividers. More... | |
uint32_t | CLOCK_GetFreq (clock_name_t clockName) |
Return Frequency of selected clock. More... | |
uint32_t | CLOCK_GetFRGClock (uint32_t id) |
Return Input frequency for the Fractional baud rate generator. More... | |
void | CLOCK_SetFRGClock (const clock_frg_clk_config_t *config) |
Set output of the Fractional baud rate generator. More... | |
uint32_t | CLOCK_GetFFroFreq (void) |
Return Frequency of FFRO. More... | |
uint32_t | CLOCK_GetSFroFreq (void) |
Return Frequency of SFRO. More... | |
uint32_t | CLOCK_GetAvPllCh1Freq (void) |
Return Frequency of AUDIO PLL (AVPLL CH1) More... | |
uint32_t | CLOCK_GetAvPllCh2Freq (void) |
Return Frequency of AVPLL CH2. More... | |
uint32_t | CLOCK_GetMainClkFreq (void) |
Return Frequency of main clk. More... | |
uint32_t | CLOCK_GetCoreSysClkFreq (void) |
Return Frequency of core/bus clk. More... | |
uint32_t | CLOCK_GetSystickClkFreq (void) |
Return Frequency of systick clk. More... | |
static uint32_t | CLOCK_GetSysOscFreq (void) |
Return Frequency of sys osc Clock. More... | |
static uint32_t | CLOCK_GetMclkInClkFreq (void) |
Return Frequency of MCLK Input Clock. More... | |
static uint32_t | CLOCK_GetLpOscFreq (void) |
Return Frequency of LPOSC. More... | |
static uint32_t | CLOCK_GetClk32KFreq (void) |
Return Frequency of CLK_32K. More... | |
void | CLOCK_EnableXtal32K (bool enable) |
Enables and disables 32KHz XTAL. More... | |
void | CLOCK_EnableRtc32K (bool enable) |
Enables and disables RTC 32KHz. More... | |
static void | CLOCK_SetClkinFreq (uint32_t freq) |
Set the CLKIN (CLKIN pin) frequency based on GPIO4 input. More... | |
static void | CLOCK_SetMclkinFreq (uint32_t freq) |
Set the MCLK in (mclk_in) clock frequency based on board setting. More... | |
uint32_t | CLOCK_GetDmicClkFreq (void) |
Return Frequency of DMIC clk. More... | |
uint32_t | CLOCK_GetLcdClkFreq (void) |
Return Frequency of LCD clk. More... | |
uint32_t | CLOCK_GetWdtClkFreq (void) |
Return Frequency of WDT clk. More... | |
uint32_t | CLOCK_GetMclkClkFreq (void) |
Return Frequency of mclk. More... | |
uint32_t | CLOCK_GetSctClkFreq (void) |
Return Frequency of sct. More... | |
uint32_t | CLOCK_GetFlexCommClkFreq (uint32_t id) |
Return Frequency of Flexcomm functional Clock. More... | |
uint32_t | CLOCK_GetCTimerClkFreq (uint32_t id) |
Return Frequency of CTimer Clock. More... | |
uint32_t | CLOCK_GetUtickClkFreq (void) |
Return Frequency of Utick Clock. More... | |
uint32_t | CLOCK_GetFlexspiClkFreq (void) |
Return Frequency of Flexspi Clock. More... | |
uint32_t | CLOCK_GetUsimClkFreq (void) |
Return Frequency of USIM Clock. More... | |
uint32_t | CLOCK_GetGauClkFreq (void) |
Return Frequency of GAU Clock. More... | |
uint32_t | CLOCK_GetOSTimerClkFreq (void) |
Return Frequency of OSTimer Clock. More... | |
uint32_t | CLOCK_InitTcpuRefClk (uint32_t targetHz, clock_tcpu_flexspi_div_t div) |
Initialize TCPU FVCO to target frequency. More... | |
void | CLOCK_DeinitTcpuRefClk (void) |
Deinit the TCPU reference clock. | |
void | CLOCK_InitTddrRefClk (clock_tddr_flexspi_div_t div) |
Initialize the TDDR reference clock. More... | |
void | CLOCK_DeinitTddrRefClk (void) |
Deinit the TDDR reference clock. | |
void | CLOCK_InitT3RefClk (clock_t3_mci_irc_config_t cnfg) |
Initialize the T3 reference clock. More... | |
void | CLOCK_DeinitT3RefClk (void) |
Deinit the T3 reference clock. More... | |
void | CLOCK_InitAvPll (const clock_avpll_config_t *cnfg) |
Initialize the AVPLL. More... | |
void | CLOCK_DeinitAvPll (void) |
Deinit the AVPLL. More... | |
void | CLOCK_ConfigAvPllCh (clock_avpll_ch_freq_t ch1Freq, clock_avpll_ch_freq_t ch2Freq, bool enableCali) |
Update the AVPLL channel configuration. More... | |
void | CLOCK_EnableAvPllCh (bool enableCh1, bool enableCh2, bool enableCali) |
Enable the AVPLL channel. More... | |
void | CLOCK_DisableAvPllCh (bool disableCh1, bool disableCh2) |
Disable the AVPLL. More... | |
void | CLOCK_EnableUsbhsPhyClock (void) |
Enable USB HS PHY PLL clock. More... | |
void | CLOCK_DisableUsbhsPhyClock (void) |
Disable USB HS PHY PLL clock. More... | |
Variables | |
volatile uint32_t | g_clkinFreq |
External CLK_IN pin clock frequency (clkin) clock frequency. More... | |
volatile uint32_t | g_mclkinFreq |
External MCLK IN clock frequency. More... | |
Driver version | |
#define | FSL_CLOCK_DRIVER_VERSION (MAKE_VERSION(2, 3, 0)) |
CLOCK driver version 2.3.0. More... | |
struct clock_frg_clk_config_t |
Public Types | |
enum | { kCLOCK_FrgMainClk = 0, kCLOCK_FrgPllDiv, kCLOCK_FrgSFro, kCLOCK_FrgFFro } |
Data Fields | |
uint8_t | num |
FRG clock. | |
uint8_t | divider |
Denominator of the fractional divider. More... | |
uint8_t | mult |
Numerator of the fractional divider. More... | |
anonymous enum |
uint8_t clock_frg_clk_config_t::divider |
uint8_t clock_frg_clk_config_t::mult |
struct clock_avpll_config_t |
Data Fields | |
clock_avpll_ch_freq_t | ch1Freq |
AVPLL channel 1 frequency configuration. | |
clock_avpll_ch_freq_t | ch2Freq |
AVPLL channel 2 frequency configuration. | |
bool | enableCali |
Enable calibration. | |
#define FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL 0 |
When set to 0, peripheral drivers will enable clock in initialize function and disable clock in de-initialize function. When set to 1, peripheral driver will not control the clock, application could control the clock out of the driver.
#define FSL_CLOCK_DRIVER_VERSION (MAKE_VERSION(2, 3, 0)) |
#define GPIO_CLOCKS |
#define CACHE64_CLOCKS |
#define FLEXSPI_CLOCKS |
#define FLEXCOMM_CLOCKS |
#define USART_CLOCKS |
#define I2C_CLOCKS |
#define SPI_CLOCKS |
#define ACOMP_CLOCKS |
#define ADC_CLOCKS |
#define DAC_CLOCKS |
#define LCDIC_CLOCKS |
#define DMA_CLOCKS |
#define DMIC_CLOCKS |
#define ENET_CLOCKS |
#define ENET_EXTRA_CLOCKS |
#define CTIMER_CLOCKS |
#define UTICK_CLOCKS |
#define MRT_CLOCKS |
#define SCT_CLOCKS |
#define RTC_CLOCKS |
#define WWDT_CLOCKS |
#define TRNG_CLOCKS |
#define USIM_CLOCKS |
#define CLK_GATE_REG_OFFSET_SHIFT 8U |
enum clock_name_t |
uint32_t CLOCK_GetT3PllMciIrcClkFreq | ( | void | ) |
uint32_t CLOCK_GetT3PllMci213mClkFreq | ( | void | ) |
uint32_t CLOCK_GetT3PllMci256mClkFreq | ( | void | ) |
uint32_t CLOCK_GetT3PllMciFlexspiClkFreq | ( | void | ) |
uint32_t CLOCK_GetTcpuMciClkFreq | ( | void | ) |
uint32_t CLOCK_GetTcpuMciFlexspiClkFreq | ( | void | ) |
uint32_t CLOCK_GetTddrMciFlexspiClkFreq | ( | void | ) |
uint32_t CLOCK_GetTddrMciEnetClkFreq | ( | void | ) |
void CLOCK_EnableClock | ( | clock_ip_name_t | clk | ) |
clk | Which clock to enable, see clock_ip_name_t. |
void CLOCK_DisableClock | ( | clock_ip_name_t | clk | ) |
clk | Which clock to disable, see clock_ip_name_t. |
void CLOCK_AttachClk | ( | clock_attach_id_t | connection | ) |
connection | : Clock to be configured. |
void CLOCK_SetClkDiv | ( | clock_div_name_t | name, |
uint32_t | divider | ||
) |
name | : Clock divider name |
divider | : Value to be divided. |
uint32_t CLOCK_GetFreq | ( | clock_name_t | clockName | ) |
uint32_t CLOCK_GetFRGClock | ( | uint32_t | id | ) |
void CLOCK_SetFRGClock | ( | const clock_frg_clk_config_t * | config | ) |
config | : Configuration to set to FRGn clock. |
uint32_t CLOCK_GetFFroFreq | ( | void | ) |
uint32_t CLOCK_GetSFroFreq | ( | void | ) |
uint32_t CLOCK_GetAvPllCh1Freq | ( | void | ) |
uint32_t CLOCK_GetAvPllCh2Freq | ( | void | ) |
uint32_t CLOCK_GetMainClkFreq | ( | void | ) |
uint32_t CLOCK_GetCoreSysClkFreq | ( | void | ) |
uint32_t CLOCK_GetSystickClkFreq | ( | void | ) |
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inlinestatic |
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inlinestatic |
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inlinestatic |
void CLOCK_EnableXtal32K | ( | bool | enable | ) |
enable | : true to enable 32k XTAL clock, false to disable clock |
void CLOCK_EnableRtc32K | ( | bool | enable | ) |
enable | : true to enable 32k RTC clock, false to disable clock |
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inlinestatic |
freq | : The CLK_IN pin input clock frequency in Hz. |
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inlinestatic |
freq | : The MCLK input clock frequency in Hz. |
uint32_t CLOCK_GetDmicClkFreq | ( | void | ) |
uint32_t CLOCK_GetLcdClkFreq | ( | void | ) |
uint32_t CLOCK_GetWdtClkFreq | ( | void | ) |
uint32_t CLOCK_GetMclkClkFreq | ( | void | ) |
uint32_t CLOCK_GetSctClkFreq | ( | void | ) |
uint32_t CLOCK_GetFlexCommClkFreq | ( | uint32_t | id | ) |
id | : flexcomm index to get frequency. |
uint32_t CLOCK_GetCTimerClkFreq | ( | uint32_t | id | ) |
id | : ctimer index to get frequency. |
uint32_t CLOCK_GetUtickClkFreq | ( | void | ) |
uint32_t CLOCK_GetFlexspiClkFreq | ( | void | ) |
uint32_t CLOCK_GetUsimClkFreq | ( | void | ) |
uint32_t CLOCK_GetGauClkFreq | ( | void | ) |
uint32_t CLOCK_GetOSTimerClkFreq | ( | void | ) |
uint32_t CLOCK_InitTcpuRefClk | ( | uint32_t | targetHz, |
clock_tcpu_flexspi_div_t | div | ||
) |
For 40MHz XTAL, FVCO ranges from 3000MHz to 3840MHz. For 38.4MHz XTAL, FVCO ranges from 2995.2MHz to 3840MHz
targetHz | : Target FVCO frequency in Hz. |
div | : Divider for tcpu_mci_flexspi_clk. |
void CLOCK_InitTddrRefClk | ( | clock_tddr_flexspi_div_t | div | ) |
div | : Divider for tddr_mci_flexspi_clk. |
void CLOCK_InitT3RefClk | ( | clock_t3_mci_irc_config_t | cnfg | ) |
cnfg | : t3pll_mci_48_60m_irc clock configuration |
void CLOCK_DeinitT3RefClk | ( | void | ) |
void CLOCK_InitAvPll | ( | const clock_avpll_config_t * | cnfg | ) |
Both channel 1 and 2 are enabled.
cnfg | : AVPLL clock configuration |
void CLOCK_DeinitAvPll | ( | void | ) |
All channels are disabled.
void CLOCK_ConfigAvPllCh | ( | clock_avpll_ch_freq_t | ch1Freq, |
clock_avpll_ch_freq_t | ch2Freq, | ||
bool | enableCali | ||
) |
Enable/Disable state keeps unchanged.
ch1Freq | : Channel 1 frequency to set. |
ch2Freq | : Channel 2 frequency to set. |
enableCali | : Enable AVPLL calibration. |
void CLOCK_EnableAvPllCh | ( | bool | enableCh1, |
bool | enableCh2, | ||
bool | enableCali | ||
) |
enableCh1 | : Enable AVPLL channel1, channel unchanged on false. |
enableCh2 | : Enable AVPLL channel2, channel unchanged on false. |
enableCali | : Enable AVPLL calibration. |
void CLOCK_DisableAvPllCh | ( | bool | disableCh1, |
bool | disableCh2 | ||
) |
disableCh1 | : Disable AVPLL channel1, channel unchanged on false. |
disableCh2 | : Disable AVPLL channel2, channel unchanged on false. |
void CLOCK_EnableUsbhsPhyClock | ( | void | ) |
This function enables USB HS PHY PLL clock.
void CLOCK_DisableUsbhsPhyClock | ( | void | ) |
This function disables USB HS PHY PLL clock.
volatile uint32_t g_clkinFreq |
The CLK_IN pin (clkin) clock frequency in Hz, when the clock is setup, use the function CLOCK_SetClkinFreq to set the value in to clock driver. For example, if CLK_IN is 16MHz,
volatile uint32_t g_mclkinFreq |
The MCLK in (mclk_in) PIN clock frequency in Hz, when the clock is setup, use the function CLOCK_SetMclkInFreq to set the value in to clock driver. For example, if mclk_In is 16MHz,