Overview

The MCUXpresso SDK provides APIs for MCUXpresso SDK devices' clock operation.

The clock driver supports:

Clock generator configuration
Clock mux and divider configuration
Getting clock frequency

Files
file	fsl_clock.h

Data Structures
struct	firc_trim_config_t
	firc trim configuration. More...

struct	sirc_trim_config_t
	sirc trim configuration. More...

Macros
#define	FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL 0U
	Configure whether driver controls clock. More...

#define	CLK_GATE_REG_OFFSET(value) (((uint32_t)(value)) >> 16U)
	Clock gate name used for CLOCK_EnableClock/CLOCK_DisableClock. More...

#define	AOI_CLOCKS
	Clock ip name array for AOI. More...

#define	CRC_CLOCKS
	Clock ip name array for CRC. More...

#define	CTIMER_CLOCKS
	Clock ip name array for CTIMER. More...

#define	DMA_CLOCKS
	Clock ip name array for DMA. More...

#define	EDMA_CLOCKS
	Clock gate name array for EDMA. More...

#define	ERM_CLOCKS
	Clock ip name array for ERM. More...

#define	EIM_CLOCKS
	Clock ip name array for EIM. More...

#define	FREQME_CLOCKS
	Clock ip name array for FREQME. More...

#define	GPIO_CLOCKS
	Clock ip name array for GPIO. More...

#define	I3C_CLOCKS
	Clock ip name array for I3C.

#define	INPUTMUX_CLOCKS
	Clock ip name array for INPUTMUX. More...

#define	LPCMP_CLOCKS
	Clock ip name array for GPIO. More...

#define	LPADC_CLOCKS
	Clock ip name array for LPADC. More...

#define	LPUART_CLOCKS
	Clock ip name array for LPUART. More...

#define	LPI2C_CLOCKS
	Clock ip name array for LPI2C. More...

#define	LPSPI_CLOCKS
	Clock ip name array for LSPI. More...

#define	MTR_CLOCKS
	Clock ip name array for MTR. More...

#define	OSTIMER_CLOCKS
	Clock ip name array for OSTIMER. More...

#define	PWM_CLOCKS
	Clock ip name array for PWM. More...

#define	QDC_CLOCKS
	Clock ip name array for QDC. More...

#define	UTICK_CLOCKS
	Clock ip name array for UTICK. More...

#define	WWDT_CLOCKS
	Clock ip name array for WWDT. More...

#define	BUS_CLK kCLOCK_BusClk
	Peripherals clock source definition. More...

#define	CLK_ATTACH_REG_OFFSET(value) (((uint32_t)(value)) >> 16U)
	Clock Mux Switches The encoding is as follows each connection identified is 32bits wide while 24bits are valuable starting from LSB upwards. More...

Enumerations
enum	clock_ip_name_t { kCLOCK_GateINPUTMUX0 = (0x00000U \| (0U)), kCLOCK_InputMux = (0x00000U \| (0U)), kCLOCK_GateI3C0 = (0x00000U \| (1U)), kCLOCK_GateCTIMER0 = (0x00000U \| (2U)), kCLOCK_GateCTIMER1 = (0x00000U \| (3U)), kCLOCK_GateCTIMER2 = (0x00000U \| (4U)), kCLOCK_GateFREQME = (0x00000U \| (5U)), kCLOCK_GateUTICK0 = (0x00000U \| (6U)), kCLOCK_GateWWDT0 = (0x00000U \| (7U)), kCLOCK_GateDMA = (0x00000U \| (8U)), kCLOCK_GateAOI0 = (0x00000U \| (9U)), kCLOCK_GateCRC = (0x00000U \| (10U)), kCLOCK_Crc0 = (0x00000U \| (10U)), kCLOCK_GateEIM = (0x00000U \| (11U)), kCLOCK_GateERM = (0x00000U \| (12U)), kCLOCK_GateLPI2C0 = (0x00000U \| (16U)), kCLOCK_GateLPSPI0 = (0x00000U \| (17U)), kCLOCK_GateLPSPI1 = (0x00000U \| (18U)), kCLOCK_GateLPUART0 = (0x00000U \| (19U)), kCLOCK_GateLPUART1 = (0x00000U \| (20U)), kCLOCK_GateLPUART2 = (0x00000U \| (21U)), kCLOCK_GateUSB0 = (0x00000U \| (22U)), kCLOCK_GateQDC0 = (0x00000U \| (23U)), kCLOCK_GateFLEXPWM0 = (0x00000U \| (24U)), kCLOCK_GateOSTIMER0 = (0x00000U \| (25U)), kCLOCK_GateADC0 = (0x00000U \| (26U)), kCLOCK_GateCMP0 = (0x00000U \| (27U)), kCLOCK_GateCMP1 = (0x00000U \| (28U)), kCLOCK_GatePORT0 = (0x00000U \| (29U)), kCLOCK_GatePORT1 = (0x00000U \| (30U)), kCLOCK_GatePORT2 = (0x00000U \| (31U)), kCLOCK_GatePORT3 = ((0x10U << 16U) \| (0U)), kCLOCK_GateATX0 = ((0x10U << 16U) \| (1U)), kCLOCK_GateMTR = ((0x10U << 16U) \| (2U)), kCLOCK_GateTCU = ((0x10U << 16U) \| (3U)), kCLOCK_GateEZRAMC_RAMA = ((0x10U << 16U) \| (4U)), kCLOCK_GateGPIO0 = ((0x10U << 16U) \| (5U)), kCLOCK_GateGPIO1 = ((0x10U << 16U) \| (6U)), kCLOCK_GateGPIO2 = ((0x10U << 16U) \| (7U)), kCLOCK_GateGPIO3 = ((0x10U << 16U) \| (8U)), kCLOCK_GateROMCP = ((0x10U << 16U) \| (9U)), kCLOCK_GatePWMSM0 = ((REG_PWM0SUBCTL << 16U) \| (0U)), kCLOCK_GatePWMSM1 = ((REG_PWM0SUBCTL << 16U) \| (1U)), kCLOCK_GatePWMSM2 = ((REG_PWM0SUBCTL << 16U) \| (2U)), kCLOCK_GateNotAvail = (0xFFFFFFFFU) }
	Clock gate name used for CLOCK_EnableClock/CLOCK_DisableClock. More...

enum	clock_name_t { kCLOCK_MainClk, kCLOCK_CoreSysClk, kCLOCK_SYSTEM_CLK, kCLOCK_BusClk, kCLOCK_ExtClk, kCLOCK_FroHf, kCLOCK_FroHfDiv, kCLOCK_Clk48M, kCLOCK_Fro12M, kCLOCK_Clk1M, kCLOCK_Fro16K, kCLOCK_Clk16K0, kCLOCK_Clk16K1, kCLOCK_SLOW_CLK }
	Clock name used to get clock frequency. More...

enum	clock_select_name_t { kCLOCK_SelI3C0_FCLK = (0x0A0U), kCLOCK_SelCTIMER0 = (0x0A8U), kCLOCK_SelCTIMER1 = (0x0B0U), kCLOCK_SelCTIMER2 = (0x0B8U), kCLOCK_SelLPI2C0 = (0x0C8U), kCLOCK_SelLPSPI0 = (0x0D0U), kCLOCK_SelLPSPI1 = (0x0D8U), kCLOCK_SelLPUART0 = (0x0E0U), kCLOCK_SelLPUART1 = (0x0E8U), kCLOCK_SelLPUART2 = (0x0F0U), kCLOCK_SelUSB0 = (0x0F8U), kCLOCK_SelLPTMR0 = (0x100U), kCLOCK_SelOSTIMER0 = (0x108U), kCLOCK_SelADC0 = (0x110U), kCLOCK_SelCMP0_RR = (0x120U), kCLOCK_SelCMP1_RR = (0x130U), kCLOCK_SelTRACE = (0x138U), kCLOCK_SelCLKOUT = (0x140U), kCLOCK_SelSYSTICK = (0x148U), kCLOCK_SelSCGSCS = (0x200U), kCLOCK_SelMax = (0x200U) }
	Clock name used to get clock frequency. More...

enum	clock_attach_id_t { kCLK_IN_to_MAIN_CLK = CLK_ATTACH_MUX(kCLOCK_SelSCGSCS, 1U), kFRO12M_to_MAIN_CLK = CLK_ATTACH_MUX(kCLOCK_SelSCGSCS, 2U), kFRO_HF_to_MAIN_CLK = CLK_ATTACH_MUX(kCLOCK_SelSCGSCS, 3U), kCLK_16K_to_MAIN_CLK = CLK_ATTACH_MUX(kCLOCK_SelSCGSCS, 4U), kNONE_to_MAIN_CLK = CLK_ATTACH_MUX(kCLOCK_SelSCGSCS, 7U), kFRO12M_to_I3C0FCLK = CLK_ATTACH_MUX(kCLOCK_SelI3C0_FCLK, 0U), kFRO_HF_DIV_to_I3C0FCLK = CLK_ATTACH_MUX(kCLOCK_SelI3C0_FCLK, 2U), kCLK_IN_to_I3C0FCLK = CLK_ATTACH_MUX(kCLOCK_SelI3C0_FCLK, 3U), kCLK_1M_to_I3C0FCLK = CLK_ATTACH_MUX(kCLOCK_SelI3C0_FCLK, 5U), kNONE_to_I3C0FCLK = CLK_ATTACH_MUX(kCLOCK_SelI3C0_FCLK, 7U), kFRO12M_to_CTIMER0 = CLK_ATTACH_MUX(kCLOCK_SelCTIMER0, 0U), kFRO_HF_to_CTIMER0 = CLK_ATTACH_MUX(kCLOCK_SelCTIMER0, 1U), kCLK_IN_to_CTIMER0 = CLK_ATTACH_MUX(kCLOCK_SelCTIMER0, 3U), kCLK_16K_to_CTIMER0 = CLK_ATTACH_MUX(kCLOCK_SelCTIMER0, 4U), kCLK_1M_to_CTIMER0 = CLK_ATTACH_MUX(kCLOCK_SelCTIMER0, 5U), kNONE_to_CTIMER0 = CLK_ATTACH_MUX(kCLOCK_SelCTIMER0, 7U), kFRO12M_to_CTIMER1 = CLK_ATTACH_MUX(kCLOCK_SelCTIMER1, 0U), kFRO_HF_to_CTIMER1 = CLK_ATTACH_MUX(kCLOCK_SelCTIMER1, 1U), kCLK_IN_to_CTIMER1 = CLK_ATTACH_MUX(kCLOCK_SelCTIMER1, 3U), kCLK_16K_to_CTIMER1 = CLK_ATTACH_MUX(kCLOCK_SelCTIMER1, 4U), kCLK_1M_to_CTIMER1 = CLK_ATTACH_MUX(kCLOCK_SelCTIMER1, 5U), kNONE_to_CTIMER1 = CLK_ATTACH_MUX(kCLOCK_SelCTIMER1, 7U), kFRO12M_to_CTIMER2 = CLK_ATTACH_MUX(kCLOCK_SelCTIMER2, 0U), kFRO_HF_to_CTIMER2 = CLK_ATTACH_MUX(kCLOCK_SelCTIMER2, 1U), kCLK_IN_to_CTIMER2 = CLK_ATTACH_MUX(kCLOCK_SelCTIMER2, 3U), kCLK_16K_to_CTIMER2 = CLK_ATTACH_MUX(kCLOCK_SelCTIMER2, 4U), kCLK_1M_to_CTIMER2 = CLK_ATTACH_MUX(kCLOCK_SelCTIMER2, 5U), kNONE_to_CTIMER2 = CLK_ATTACH_MUX(kCLOCK_SelCTIMER2, 7U), kFRO12M_to_LPI2C0 = CLK_ATTACH_MUX(kCLOCK_SelLPI2C0, 0U), kFRO_HF_DIV_to_LPI2C0 = CLK_ATTACH_MUX(kCLOCK_SelLPI2C0, 2U), kCLK_IN_to_LPI2C0 = CLK_ATTACH_MUX(kCLOCK_SelLPI2C0, 3U), kCLK_1M_to_LPI2C0 = CLK_ATTACH_MUX(kCLOCK_SelLPI2C0, 5U), kNONE_to_LPI2C0 = CLK_ATTACH_MUX(kCLOCK_SelLPI2C0, 7U), kFRO12M_to_LPSPI0 = CLK_ATTACH_MUX(kCLOCK_SelLPSPI0, 0U), kFRO_HF_DIV_to_LPSPI0 = CLK_ATTACH_MUX(kCLOCK_SelLPSPI0, 2U), kCLK_IN_to_LPSPI0 = CLK_ATTACH_MUX(kCLOCK_SelLPSPI0, 3U), kCLK_1M_to_LPSPI0 = CLK_ATTACH_MUX(kCLOCK_SelLPSPI0, 5U), kNONE_to_LPSPI0 = CLK_ATTACH_MUX(kCLOCK_SelLPSPI0, 7U), kFRO12M_to_LPSPI1 = CLK_ATTACH_MUX(kCLOCK_SelLPSPI1, 0U), kFRO_HF_DIV_to_LPSPI1 = CLK_ATTACH_MUX(kCLOCK_SelLPSPI1, 2U), kCLK_IN_to_LPSPI1 = CLK_ATTACH_MUX(kCLOCK_SelLPSPI1, 3U), kCLK_1M_to_LPSPI1 = CLK_ATTACH_MUX(kCLOCK_SelLPSPI1, 5U), kNONE_to_LPSPI1 = CLK_ATTACH_MUX(kCLOCK_SelLPSPI1, 7U), kFRO12M_to_LPUART0 = CLK_ATTACH_MUX(kCLOCK_SelLPUART0, 0U), kFRO_HF_DIV_to_LPUART0 = CLK_ATTACH_MUX(kCLOCK_SelLPUART0, 2U), kCLK_IN_to_LPUART0 = CLK_ATTACH_MUX(kCLOCK_SelLPUART0, 3U), kCLK_16K_to_LPUART0 = CLK_ATTACH_MUX(kCLOCK_SelLPUART0, 4U), kCLK_1M_to_LPUART0 = CLK_ATTACH_MUX(kCLOCK_SelLPUART0, 5U), kNONE_to_LPUART0 = CLK_ATTACH_MUX(kCLOCK_SelLPUART0, 7U), kFRO12M_to_LPUART1 = CLK_ATTACH_MUX(kCLOCK_SelLPUART1, 0U), kFRO_HF_DIV_to_LPUART1 = CLK_ATTACH_MUX(kCLOCK_SelLPUART1, 2U), kCLK_IN_to_LPUART1 = CLK_ATTACH_MUX(kCLOCK_SelLPUART1, 3U), kCLK_16K_to_LPUART1 = CLK_ATTACH_MUX(kCLOCK_SelLPUART1, 4U), kCLK_1M_to_LPUART1 = CLK_ATTACH_MUX(kCLOCK_SelLPUART1, 5U), kNONE_to_LPUART1 = CLK_ATTACH_MUX(kCLOCK_SelLPUART1, 7U), kFRO12M_to_LPUART2 = CLK_ATTACH_MUX(kCLOCK_SelLPUART2, 0U), kFRO_HF_DIV_to_LPUART2 = CLK_ATTACH_MUX(kCLOCK_SelLPUART2, 2U), kCLK_IN_to_LPUART2 = CLK_ATTACH_MUX(kCLOCK_SelLPUART2, 3U), kCLK_16K_to_LPUART2 = CLK_ATTACH_MUX(kCLOCK_SelLPUART2, 4U), kCLK_1M_to_LPUART2 = CLK_ATTACH_MUX(kCLOCK_SelLPUART2, 5U), kNONE_to_LPUART2 = CLK_ATTACH_MUX(kCLOCK_SelLPUART2, 7U), kCLK_48M_to_USB0 = CLK_ATTACH_MUX(kCLOCK_SelUSB0, 1U), kCLK_IN_to_USB0 = CLK_ATTACH_MUX(kCLOCK_SelUSB0, 2U), kNONE_to_USB0 = CLK_ATTACH_MUX(kCLOCK_SelUSB0, 3U), kFRO12M_to_LPTMR0 = CLK_ATTACH_MUX(kCLOCK_SelLPTMR0, 0U), kFRO_HF_DIV_to_LPTMR0 = CLK_ATTACH_MUX(kCLOCK_SelLPTMR0, 2U), kCLK_IN_to_LPTMR0 = CLK_ATTACH_MUX(kCLOCK_SelLPTMR0, 3U), kCLK_1M_to_LPTMR0 = CLK_ATTACH_MUX(kCLOCK_SelLPTMR0, 5U), kNONE_to_LPTMR0 = CLK_ATTACH_MUX(kCLOCK_SelLPTMR0, 7U), kCLK_16K_to_OSTIMER = CLK_ATTACH_MUX(kCLOCK_SelOSTIMER0, 0U), kCLK_1M_to_OSTIMER = CLK_ATTACH_MUX(kCLOCK_SelOSTIMER0, 2U), kNONE_to_OSTIMER = CLK_ATTACH_MUX(kCLOCK_SelOSTIMER0, 3U), kFRO12M_to_ADC0 = CLK_ATTACH_MUX(kCLOCK_SelADC0, 0U), kFRO_HF_to_ADC0 = CLK_ATTACH_MUX(kCLOCK_SelADC0, 1U), kCLK_IN_to_ADC0 = CLK_ATTACH_MUX(kCLOCK_SelADC0, 3U), kCLK_1M_to_ADC0 = CLK_ATTACH_MUX(kCLOCK_SelADC0, 5U), kNONE_to_ADC0 = CLK_ATTACH_MUX(kCLOCK_SelADC0, 7U), kFRO12M_to_CMP0 = CLK_ATTACH_MUX(kCLOCK_SelCMP0_RR, 0U), kFRO_HF_DIV_to_CMP0 = CLK_ATTACH_MUX(kCLOCK_SelCMP0_RR, 2U), kCLK_IN_to_CMP0 = CLK_ATTACH_MUX(kCLOCK_SelCMP0_RR, 3U), kCLK_1M_to_CMP0 = CLK_ATTACH_MUX(kCLOCK_SelCMP0_RR, 5U), kNONE_to_CMP0 = CLK_ATTACH_MUX(kCLOCK_SelCMP0_RR, 7U), kFRO12M_to_CMP1 = CLK_ATTACH_MUX(kCLOCK_SelCMP1_RR, 0U), kFRO_HF_DIV_to_CMP1 = CLK_ATTACH_MUX(kCLOCK_SelCMP1_RR, 2U), kCLK_IN_to_CMP1 = CLK_ATTACH_MUX(kCLOCK_SelCMP1_RR, 3U), kCLK_1M_to_CMP1 = CLK_ATTACH_MUX(kCLOCK_SelCMP1_RR, 5U), kNONE_to_CMP1 = CLK_ATTACH_MUX(kCLOCK_SelCMP1_RR, 7U), kCPU_CLK_to_TRACE = CLK_ATTACH_MUX(kCLOCK_SelTRACE, 0U), kCLK_1M_to_TRACE = CLK_ATTACH_MUX(kCLOCK_SelTRACE, 1U), kCLK_16K_to_TRACE = CLK_ATTACH_MUX(kCLOCK_SelTRACE, 2U), kNONE_to_TRACE = CLK_ATTACH_MUX(kCLOCK_SelTRACE, 3U), kFRO12M_to_CLKOUT = CLK_ATTACH_MUX(kCLOCK_SelCLKOUT, 0U), kFRO_HF_DIV_to_CLKOUT = CLK_ATTACH_MUX(kCLOCK_SelCLKOUT, 1U), kCLK_IN_to_CLKOUT = CLK_ATTACH_MUX(kCLOCK_SelCLKOUT, 2U), kCLK_16K_to_CLKOUT = CLK_ATTACH_MUX(kCLOCK_SelCLKOUT, 3U), kSLOW_CLK_to_CLKOUT = CLK_ATTACH_MUX(kCLOCK_SelCLKOUT, 6U), kNONE_to_CLKOUT = CLK_ATTACH_MUX(kCLOCK_SelCLKOUT, 7U), kCPU_CLK_to_SYSTICK = CLK_ATTACH_MUX(kCLOCK_SelSYSTICK, 0U), kCLK_1M_to_SYSTICK = CLK_ATTACH_MUX(kCLOCK_SelSYSTICK, 1U), kCLK_16K_to_SYSTICK = CLK_ATTACH_MUX(kCLOCK_SelSYSTICK, 2U), kNONE_to_SYSTICK = CLK_ATTACH_MUX(kCLOCK_SelSYSTICK, 3U), kNONE_to_NONE = (0xFFFFFFFFU) }
	The enumerator of clock attach Id. More...

enum	clock_div_name_t { kCLOCK_DivI3C0_FCLK = (0x0A4U), kCLOCK_DivCTIMER0 = (0x0ACU), kCLOCK_DivCTIMER1 = (0x0B4U), kCLOCK_DivCTIMER2 = (0x0BCU), kCLOCK_DivWWDT0 = (0x0C4U), kCLOCK_DivLPI2C0 = (0x0CCU), kCLOCK_DivLPSPI0 = (0x0D4U), kCLOCK_DivLPSPI1 = (0x0DCU), kCLOCK_DivLPUART0 = (0x0E4U), kCLOCK_DivLPUART1 = (0x0ECU), kCLOCK_DivLPUART2 = (0x0F4U), kCLOCK_DivLPTMR0 = (0x104U), kCLOCK_DivADC0 = (0x114U), kCLOCK_DivCMP0_FUNC = (0x11CU), kCLOCK_DivCMP0_RR = (0x124U), kCLOCK_DivCMP1_FUNC = (0x12CU), kCLOCK_DivCMP1_RR = (0x134U), kCLOCK_DivTRACE = (0x13CU), kCLOCK_DivCLKOUT = (0x144U), kCLOCK_DivSYSTICK = (0x14CU), kCLOCK_DivFRO_HF_DIV = (0x154U), kCLOCK_DivSLOWCLK = (0x378U), kCLOCK_DivAHBCLK = (0x380U), kCLOCK_DivMax = (0x380U) }
	Clock dividers. More...

enum	firc_trim_mode_t { kSCG_FircTrimNonUpdate = SCG_FIRCCSR_FIRCTREN_MASK, kSCG_FircTrimUpdate = SCG_FIRCCSR_FIRCTREN_MASK \| SCG_FIRCCSR_FIRCTRUP_MASK }
	firc trim mode. More...

enum	firc_trim_src_t { kSCG_FircTrimSrcUsb0 = 0U, kSCG_FircTrimSrcSysOsc = 2U }
	firc trim source. More...

enum	sirc_trim_mode_t { kSCG_SircTrimNonUpdate = SCG_SIRCCSR_SIRCTREN_MASK, kSCG_SircTrimUpdate = SCG_SIRCCSR_SIRCTREN_MASK \| SCG_SIRCCSR_SIRCTRUP_MASK }
	sirc trim mode. More...

enum	sirc_trim_src_t { kNoTrimSrc = 0, kSCG_SircTrimSrcSysOsc = 2U }
	sirc trim source. More...

enum	scg_sosc_monitor_mode_t { kSCG_SysOscMonitorDisable = 0U, kSCG_SysOscMonitorInt = SCG_SOSCCSR_SOSCCM_MASK, kSCG_SysOscMonitorReset }
	SCG system OSC monitor mode. More...

enum	clke_16k_t { kCLKE_16K_SYSTEM = VBAT_FROCLKE_CLKE(1U), kCLKE_16K_COREMAIN = VBAT_FROCLKE_CLKE(2U) }
	firc trim source. More...

Functions
static void	CLOCK_EnableClock (clock_ip_name_t clk)
	Enable the clock for specific IP. More...

static void	CLOCK_DisableClock (clock_ip_name_t clk)
	Disable the clock for specific IP. More...

void	CLOCK_AttachClk (clock_attach_id_t connection)
	Configure the clock selection muxes. More...

clock_attach_id_t	CLOCK_GetClockAttachId (clock_attach_id_t connection)
	Get the actual clock attach id. This fuction uses the offset in input attach id, then it reads the actual source value in the register and combine the offset to obtain an actual attach id. More...

void	CLOCK_SetClockSelect (clock_select_name_t sel_name, uint32_t value)
	Set the clock select value. This fuction set the peripheral clock select value. More...

uint32_t	CLOCK_GetClockSelect (clock_select_name_t sel_name)
	Get the clock select value. This fuction get the peripheral clock select value. More...

void	CLOCK_SetClockDiv (clock_div_name_t div_name, uint32_t value)
	Setup peripheral clock dividers. More...

uint32_t	CLOCK_GetClockDiv (clock_div_name_t div_name)
	Get peripheral clock dividers. More...

void	CLOCK_HaltClockDiv (clock_div_name_t div_name)
	Halt peripheral clock dividers. More...

status_t	CLOCK_SetupFROHFClocking (uint32_t iFreq)
	Initialize the FROHF to given frequency (48,64,96,192). This function turns on FIRC and select the given frequency as the source of fro_hf. More...

status_t	CLOCK_SetupFRO12MClocking (void)
	Initialize the FRO12M. This function turns on FRO12M. More...

status_t	CLOCK_SetupFRO16KClocking (uint8_t clk_16k_enable_mask)
	Initialize the FRO16K. This function turns on FRO16K. More...

status_t	CLOCK_SetupExtClocking (uint32_t iFreq)
	Initialize the external osc clock to given frequency. More...

status_t	CLOCK_SetupExtRefClocking (uint32_t iFreq)
	Initialize the external reference clock to given frequency. More...

uint32_t	CLOCK_GetFreq (clock_name_t clockName)
	Return Frequency of selected clock. More...

uint32_t	CLOCK_GetCoreSysClkFreq (void)
	Return Frequency of core. More...

uint32_t	CLOCK_GetI3CFClkFreq (void)
	Return Frequency of I3C FCLK. More...

uint32_t	CLOCK_GetCTimerClkFreq (uint32_t id)
	Return Frequency of CTimer functional Clock. More...

uint32_t	CLOCK_GetLpi2cClkFreq (void)
	Return Frequency of LPI2C0 functional Clock. More...

uint32_t	CLOCK_GetLpspiClkFreq (uint32_t id)
	Return Frequency of LPSPI functional Clock. More...

uint32_t	CLOCK_GetLpuartClkFreq (uint32_t id)
	Return Frequency of LPUART functional Clock. More...

uint32_t	CLOCK_GetLptmrClkFreq (void)
	Return Frequency of LPTMR functional Clock. More...

uint32_t	CLOCK_GetOstimerClkFreq (void)
	Return Frequency of OSTIMER. More...

uint32_t	CLOCK_GetAdcClkFreq (void)
	Return Frequency of Adc Clock. More...

uint32_t	CLOCK_GetCmpFClkFreq (uint32_t id)
	Return Frequency of CMP Function Clock. More...

uint32_t	CLOCK_GetCmpRRClkFreq (uint32_t id)
	Return Frequency of CMP Round Robin Clock. More...

uint32_t	CLOCK_GetTraceClkFreq (void)
	Return Frequency of Trace Clock. More...

uint32_t	CLOCK_GetClkoutClkFreq (void)
	Return Frequency of CLKOUT Clock. More...

uint32_t	CLOCK_GetSystickClkFreq (void)
	Return Frequency of Systick Clock. More...

uint32_t	CLOCK_GetWwdtClkFreq (void)
	brief Return Frequency of Systick Clock return Frequency of Systick.

status_t	CLOCK_FROHFTrimConfig (firc_trim_config_t config)
	Setup FROHF trim. More...

status_t	CLOCK_FRO12MTrimConfig (sirc_trim_config_t config)
	Setup FRO 12M trim. More...

void	CLOCK_SetSysOscMonitorMode (scg_sosc_monitor_mode_t mode)
	Sets the system OSC monitor mode. More...

bool	CLOCK_EnableUsbfsClock (void)
	brief Enable USB FS clock. More...

Driver version
#define	FSL_CLOCK_DRIVER_VERSION (MAKE_VERSION(1, 0, 0))
	CLOCK driver version 1.0.0. More...

Data Structure Documentation

struct firc_trim_config_t

Data Fields
firc_trim_mode_t	trimMode
	Trim mode. More...

firc_trim_src_t	trimSrc
	Trim source. More...

uint16_t	trimDiv
	Divider of SOSC. More...

uint8_t	trimCoar
	Trim coarse value; Irrelevant if trimMode is kSCG_TrimUpdate. More...

uint8_t	trimFine
	Trim fine value; Irrelevant if trimMode is kSCG_TrimUpdate. More...

Field Documentation

firc_trim_mode_t firc_trim_config_t::trimMode

firc_trim_src_t firc_trim_config_t::trimSrc

uint16_t firc_trim_config_t::trimDiv

uint8_t firc_trim_config_t::trimCoar

uint8_t firc_trim_config_t::trimFine

struct sirc_trim_config_t

Data Fields
sirc_trim_mode_t	trimMode
	Trim mode. More...

sirc_trim_src_t	trimSrc
	Trim source. More...

uint16_t	trimDiv
	Divider of SOSC. More...

uint8_t	cltrim
	Trim coarse value; Irrelevant if trimMode is kSCG_TrimUpdate. More...

uint8_t	ccotrim
	Trim fine value; Irrelevant if trimMode is kSCG_TrimUpdate. More...

Field Documentation

sirc_trim_mode_t sirc_trim_config_t::trimMode

sirc_trim_src_t sirc_trim_config_t::trimSrc

uint16_t sirc_trim_config_t::trimDiv

uint8_t sirc_trim_config_t::cltrim

uint8_t sirc_trim_config_t::ccotrim

Macro Definition Documentation

#define FSL_CLOCK_DRIVER_VERSION (MAKE_VERSION(1, 0, 0))

#define FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL 0U

When set to 0, peripheral drivers will enable clock in initialize function and disable clock in de-initialize function. When set to 1, peripheral driver will not control the clock, application could control the clock out of the driver.

Note: All drivers share this feature switcher. If it is set to 1, application should handle clock enable and disable for all drivers.

#define CLK_GATE_REG_OFFSET ( value ) (((uint32_t)(value)) >> 16U)

#define AOI_CLOCKS

Value:

{                   \
        kCLOCK_GateAOI0 \
    }

#define CRC_CLOCKS

Value:

{                  \
        kCLOCK_GateCRC \
    }

#define CTIMER_CLOCKS

Value:

{                                                              \
        kCLOCK_GateCTIMER0, kCLOCK_GateCTIMER1, kCLOCK_GateCTIMER2 \
    }

#define DMA_CLOCKS

Value:

{                  \
        kCLOCK_GateDMA \
    }

#define EDMA_CLOCKS

Value:

{                  \
        kCLOCK_GateDMA \
    }

#define ERM_CLOCKS

Value:

{                  \
        kCLOCK_GateERM \
    }

#define EIM_CLOCKS

Value:

{                  \
        kCLOCK_GateEIM \
    }

#define FREQME_CLOCKS

Value:

{                     \
        kCLOCK_GateFREQME \
    }

#define GPIO_CLOCKS

Value:

{                                                                          \
        kCLOCK_GateGPIO0, kCLOCK_GateGPIO1, kCLOCK_GateGPIO2, kCLOCK_GateGPIO3 \
    }

#define INPUTMUX_CLOCKS

Value:

{                        \
        kCLOCK_GateINPUTMUX0 \
    }

#define LPCMP_CLOCKS

Value:

{                                    \
        kCLOCK_GateCMP0, kCLOCK_GateCMP1 \
    }

#define LPADC_CLOCKS

Value:

{                   \
        kCLOCK_GateADC0 \
    }

#define LPUART_CLOCKS

Value:

{                                                              \
        kCLOCK_GateLPUART0, kCLOCK_GateLPUART1, kCLOCK_GateLPUART2 \
    }

#define LPI2C_CLOCKS

Value:

{                     \
        kCLOCK_GateLPI2C0 \
    }

#define LPSPI_CLOCKS

Value:

{                                        \
        kCLOCK_GateLPSPI0, kCLOCK_GateLPSPI1 \
    }

#define MTR_CLOCKS

Value:

{                  \
        kCLOCK_GateMTR \
    }

#define OSTIMER_CLOCKS

Value:

{                       \
        kCLOCK_GateOSTIMER0 \
    }

#define PWM_CLOCKS

Value:

{                                                               \
        {                                                           \
            kCLOCK_GatePWMSM0, kCLOCK_GatePWMSM1, kCLOCK_GatePWMSM2 \
        }                                                           \
    }

#define QDC_CLOCKS

Value:

{                   \
        kCLOCK_GateQDC0 \
    }

#define UTICK_CLOCKS

Value:

{                     \
        kCLOCK_GateUTICK0 \
    }

#define WWDT_CLOCKS

Value:

{                    \
        kCLOCK_GateWWDT0 \
    }

#define BUS_CLK kCLOCK_BusClk

#define CLK_ATTACH_REG_OFFSET ( value ) (((uint32_t)(value)) >> 16U)

[4 bits for choice, 0 means invalid choice] [8 bits mux ID]*

Enumeration Type Documentation

enum clock_ip_name_t

Enumerator
kCLOCK_GateINPUTMUX0	Clock gate name: INPUTMUX0.
kCLOCK_InputMux	Clock gate name: INPUTMUX0.
kCLOCK_GateI3C0	Clock gate name: I3C0.
kCLOCK_GateCTIMER0	Clock gate name: CTIMER0.
kCLOCK_GateCTIMER1	Clock gate name: CTIMER1.
kCLOCK_GateCTIMER2	Clock gate name: CTIMER2.
kCLOCK_GateFREQME	Clock gate name: FREQME.
kCLOCK_GateUTICK0	Clock gate name: UTICK0.
kCLOCK_GateWWDT0	Clock gate name: WWDT0.
kCLOCK_GateDMA	Clock gate name: DMA.
kCLOCK_GateAOI0	Clock gate name: AOI0.
kCLOCK_GateCRC	Clock gate name: CRC.
kCLOCK_Crc0	Clock gate name: CRC.
kCLOCK_GateEIM	Clock gate name: EIM.
kCLOCK_GateERM	Clock gate name: ERM.
kCLOCK_GateLPI2C0	Clock gate name: LPI2C0.
kCLOCK_GateLPSPI0	Clock gate name: LPSPI0.
kCLOCK_GateLPSPI1	Clock gate name: LPSPI1.
kCLOCK_GateLPUART0	Clock gate name: LPUART0.
kCLOCK_GateLPUART1	Clock gate name: LPUART1.
kCLOCK_GateLPUART2	Clock gate name: LPUART2.
kCLOCK_GateUSB0	Clock gate name: USB0.
kCLOCK_GateQDC0	Clock gate name: QDC0.
kCLOCK_GateFLEXPWM0	Clock gate name: FLEXPWM0.
kCLOCK_GateOSTIMER0	Clock gate name: OSTIMER0.
kCLOCK_GateADC0	Clock gate name: ADC0.
kCLOCK_GateCMP0	Clock gate name: CMP0.
kCLOCK_GateCMP1	Clock gate name: CMP1.
kCLOCK_GatePORT0	Clock gate name: PORT0.
kCLOCK_GatePORT1	Clock gate name: PORT1.
kCLOCK_GatePORT2	Clock gate name: PORT2.
kCLOCK_GatePORT3	Clock gate name: PORT3.
kCLOCK_GateATX0	Clock gate name: ATX0.
kCLOCK_GateMTR	Clock gate name: MTR.
kCLOCK_GateTCU	Clock gate name: TCU.
kCLOCK_GateEZRAMC_RAMA	Clock gate name: EZRAMC_RAMA.
kCLOCK_GateGPIO0	Clock gate name: GPIO0.
kCLOCK_GateGPIO1	Clock gate name: GPIO1.
kCLOCK_GateGPIO2	Clock gate name: GPIO2.
kCLOCK_GateGPIO3	Clock gate name: GPIO3.
kCLOCK_GateROMCP	Clock gate name: ROMCP.
kCLOCK_GatePWMSM0	Clock gate name: FlexPWM SM0.
kCLOCK_GatePWMSM1	Clock gate name: FlexPWM SM1.
kCLOCK_GatePWMSM2	Clock gate name: FlexPWM SM2.
kCLOCK_GateNotAvail	Clock gate name: None

enum clock_name_t

Enumerator
kCLOCK_MainClk	MAIN_CLK.
kCLOCK_CoreSysClk	Core/system clock(CPU_CLK)
kCLOCK_SYSTEM_CLK	AHB clock.
kCLOCK_BusClk	Bus clock (AHB clock)
kCLOCK_ExtClk	External Clock.
kCLOCK_FroHf	FRO192.
kCLOCK_FroHfDiv	Divided by FRO192.
kCLOCK_Clk48M	CLK48M.
kCLOCK_Fro12M	FRO12M.
kCLOCK_Clk1M	CLK1M.
kCLOCK_Fro16K	FRO16K.
kCLOCK_Clk16K0	CLK16K[0].
kCLOCK_Clk16K1	CLK16K[1].
kCLOCK_SLOW_CLK	SYSTEM_CLK divided by 4.

enum clock_select_name_t

Enumerator
kCLOCK_SelI3C0_FCLK	I3C0_FCLK clock selection.
kCLOCK_SelCTIMER0	CTIMER0 clock selection.
kCLOCK_SelCTIMER1	CTIMER1 clock selection.
kCLOCK_SelCTIMER2	CTIMER2 clock selection.
kCLOCK_SelLPI2C0	LPI2C0 clock selection.
kCLOCK_SelLPSPI0	LPSPI0 clock selection.
kCLOCK_SelLPSPI1	LPSPI1 clock selection.
kCLOCK_SelLPUART0	LPUART0 clock selection.
kCLOCK_SelLPUART1	LPUART1 clock selection.
kCLOCK_SelLPUART2	LPUART2 clock selection.
kCLOCK_SelUSB0	USB0 clock selection.
kCLOCK_SelLPTMR0	LPTMR0 clock selection.
kCLOCK_SelOSTIMER0	OSTIMER0 clock selection.
kCLOCK_SelADC0	ADC0 clock selection.
kCLOCK_SelCMP0_RR	CMP0_RR clock selection.
kCLOCK_SelCMP1_RR	CMP1_RR clock selection.
kCLOCK_SelTRACE	TRACE clock selection.
kCLOCK_SelCLKOUT	CLKOUT clock selection.
kCLOCK_SelSYSTICK	SYSTICK clock selection.
kCLOCK_SelSCGSCS	SCG SCS clock selection.
kCLOCK_SelMax	MAX clock selection.

enum clock_attach_id_t

Enumerator
kCLK_IN_to_MAIN_CLK	Attach clk_in to MAIN_CLK.
kFRO12M_to_MAIN_CLK	Attach FRO_12M to MAIN_CLK.
kFRO_HF_to_MAIN_CLK	Attach FRO_HF to MAIN_CLK.
kCLK_16K_to_MAIN_CLK	Attach CLK_16K[1] to MAIN_CLK.
kNONE_to_MAIN_CLK	Attach NONE to MAIN_CLK.
kFRO12M_to_I3C0FCLK	Attach FRO12M to I3C0FCLK.
kFRO_HF_DIV_to_I3C0FCLK	Attach FRO_HF_DIV to I3C0FCLK.
kCLK_IN_to_I3C0FCLK	Attach CLK_IN to I3C0FCLK.
kCLK_1M_to_I3C0FCLK	Attach CLK_1M to I3C0FCLK.
kNONE_to_I3C0FCLK	Attach NONE to I3C0FCLK.
kFRO12M_to_CTIMER0	Attach FRO12M to CTIMER0.
kFRO_HF_to_CTIMER0	Attach FRO_HF to CTIMER0.
kCLK_IN_to_CTIMER0	Attach CLK_IN to CTIMER0.
kCLK_16K_to_CTIMER0	Attach CLK_16K to CTIMER0.
kCLK_1M_to_CTIMER0	Attach CLK_1M to CTIMER0.
kNONE_to_CTIMER0	Attach NONE to CTIMER0.
kFRO12M_to_CTIMER1	Attach FRO12M to CTIMER1.
kFRO_HF_to_CTIMER1	Attach FRO_HF to CTIMER1.
kCLK_IN_to_CTIMER1	Attach CLK_IN to CTIMER1.
kCLK_16K_to_CTIMER1	Attach CLK_16K to CTIMER1.
kCLK_1M_to_CTIMER1	Attach CLK_1M to CTIMER1.
kNONE_to_CTIMER1	Attach NONE to CTIMER1.
kFRO12M_to_CTIMER2	Attach FRO12M to CTIMER2.
kFRO_HF_to_CTIMER2	Attach FRO_HF to CTIMER2.
kCLK_IN_to_CTIMER2	Attach CLK_IN to CTIMER2.
kCLK_16K_to_CTIMER2	Attach CLK_16K to CTIMER2.
kCLK_1M_to_CTIMER2	Attach CLK_1M to CTIMER2.
kNONE_to_CTIMER2	Attach NONE to CTIMER2.
kFRO12M_to_LPI2C0	Attach FRO12M to LPI2C0.
kFRO_HF_DIV_to_LPI2C0	Attach FRO_HF_DIV to LPI2C0.
kCLK_IN_to_LPI2C0	Attach CLK_IN to LPI2C0.
kCLK_1M_to_LPI2C0	Attach CLK_1M to LPI2C0.
kNONE_to_LPI2C0	Attach NONE to LPI2C0.
kFRO12M_to_LPSPI0	Attach FRO12M to LPSPI0.
kFRO_HF_DIV_to_LPSPI0	Attach FRO_HF_DIV to LPSPI0.
kCLK_IN_to_LPSPI0	Attach CLK_IN to LPSPI0.
kCLK_1M_to_LPSPI0	Attach CLK_1M to LPSPI0.
kNONE_to_LPSPI0	Attach NONE to LPSPI0.
kFRO12M_to_LPSPI1	Attach FRO12M to LPSPI1.
kFRO_HF_DIV_to_LPSPI1	Attach FRO_HF_DIV to LPSPI1.
kCLK_IN_to_LPSPI1	Attach CLK_IN to LPSPI1.
kCLK_1M_to_LPSPI1	Attach CLK_1M to LPSPI1.
kNONE_to_LPSPI1	Attach NONE to LPSPI1.
kFRO12M_to_LPUART0	Attach FRO12M to LPUART0.
kFRO_HF_DIV_to_LPUART0	Attach FRO_HF_DIV to LPUART0.
kCLK_IN_to_LPUART0	Attach CLK_IN to LPUART0.
kCLK_16K_to_LPUART0	Attach CLK_16K to LPUART0.
kCLK_1M_to_LPUART0	Attach CLK_1M to LPUART0.
kNONE_to_LPUART0	Attach NONE to LPUART0.
kFRO12M_to_LPUART1	Attach FRO12M to LPUART1.
kFRO_HF_DIV_to_LPUART1	Attach FRO_HF_DIV to LPUART1.
kCLK_IN_to_LPUART1	Attach CLK_IN to LPUART1.
kCLK_16K_to_LPUART1	Attach CLK_16K to LPUART1.
kCLK_1M_to_LPUART1	Attach CLK_1M to LPUART1.
kNONE_to_LPUART1	Attach NONE to LPUART1.
kFRO12M_to_LPUART2	Attach FRO12M to LPUART2.
kFRO_HF_DIV_to_LPUART2	Attach FRO_HF_DIV to LPUART2.
kCLK_IN_to_LPUART2	Attach CLK_IN to LPUART2.
kCLK_16K_to_LPUART2	Attach CLK_16K to LPUART2.
kCLK_1M_to_LPUART2	Attach CLK_1M to LPUART2.
kNONE_to_LPUART2	Attach NONE to LPUART2.
kCLK_48M_to_USB0	Attach FRO12M to USB0.
kCLK_IN_to_USB0	Attach CLK_IN to USB0.
kNONE_to_USB0	Attach NONE to USB0.
kFRO12M_to_LPTMR0	Attach FRO12M to LPTMR0.
kFRO_HF_DIV_to_LPTMR0	Attach FRO_HF_DIV to LPTMR0.
kCLK_IN_to_LPTMR0	Attach CLK_IN to LPTMR0.
kCLK_1M_to_LPTMR0	Attach CLK_1M to LPTMR0.
kNONE_to_LPTMR0	Attach NONE to LPTMR0.
kCLK_16K_to_OSTIMER	Attach FRO16K to OSTIMER0.
kCLK_1M_to_OSTIMER	Attach CLK_1M to OSTIMER0.
kNONE_to_OSTIMER	Attach NONE to OSTIMER0.
kFRO12M_to_ADC0	Attach FRO12M to ADC0.
kFRO_HF_to_ADC0	Attach FRO_HF to ADC0.
kCLK_IN_to_ADC0	Attach CLK_IN to ADC0.
kCLK_1M_to_ADC0	Attach CLK_1M to ADC0.
kNONE_to_ADC0	Attach NONE to ADC0.
kFRO12M_to_CMP0	Attach FRO12M to CMP0.
kFRO_HF_DIV_to_CMP0	Attach FRO_HF_DIV to CMP0.
kCLK_IN_to_CMP0	Attach CLK_IN to CMP0.
kCLK_1M_to_CMP0	Attach CLK_1M to CMP0.
kNONE_to_CMP0	Attach NONE to CMP0.
kFRO12M_to_CMP1	Attach FRO12M to CMP1.
kFRO_HF_DIV_to_CMP1	Attach FRO_HF_DIV to CMP1.
kCLK_IN_to_CMP1	Attach CLK_IN to CMP1.
kCLK_1M_to_CMP1	Attach CLK_1M to CMP1.
kNONE_to_CMP1	Attach NONE to CMP1.
kCPU_CLK_to_TRACE	Attach CPU_CLK to TRACE.
kCLK_1M_to_TRACE	Attach CLK_1M to TRACE.
kCLK_16K_to_TRACE	Attach CLK_16K to TRACE.
kNONE_to_TRACE	Attach NONE to TRACE.
kFRO12M_to_CLKOUT	Attach FRO12M to CLKOUT.
kFRO_HF_DIV_to_CLKOUT	Attach FRO_HF_DIV to CLKOUT.
kCLK_IN_to_CLKOUT	Attach CLK_IN to CLKOUT.
kCLK_16K_to_CLKOUT	Attach CLK_16K to CLKOUT.
kSLOW_CLK_to_CLKOUT	Attach SLOW_CLK to CLKOUT.
kNONE_to_CLKOUT	Attach NONE to CLKOUT.
kCPU_CLK_to_SYSTICK	Attach CPU_CLK to SYSTICK.
kCLK_1M_to_SYSTICK	Attach CLK_1M to SYSTICK.
kCLK_16K_to_SYSTICK	Attach CLK_16K to SYSTICK.
kNONE_to_SYSTICK	Attach NONE to SYSTICK.
kNONE_to_NONE	Attach NONE to NONE.

enum clock_div_name_t

Enumerator
kCLOCK_DivI3C0_FCLK	I3C0_FCLK clock divider.
kCLOCK_DivCTIMER0	CTIMER0 clock divider.
kCLOCK_DivCTIMER1	CTIMER1 clock divider.
kCLOCK_DivCTIMER2	CTIMER2 clock divider.
kCLOCK_DivWWDT0	WWDT0 clock divider.
kCLOCK_DivLPI2C0	LPI2C0 clock divider.
kCLOCK_DivLPSPI0	LPSPI0 clock divider.
kCLOCK_DivLPSPI1	LPSPI1 clock divider.
kCLOCK_DivLPUART0	LPUART0 clock divider.
kCLOCK_DivLPUART1	LPUART1 clock divider.
kCLOCK_DivLPUART2	LPUART2 clock divider.
kCLOCK_DivLPTMR0	LPTMR0 clock divider.
kCLOCK_DivADC0	ADC0 clock divider.
kCLOCK_DivCMP0_FUNC	CMP0_FUNC clock divider.
kCLOCK_DivCMP0_RR	CMP0_RR clock divider.
kCLOCK_DivCMP1_FUNC	CMP1_FUNC clock divider.
kCLOCK_DivCMP1_RR	CMP1_RR clock divider.
kCLOCK_DivTRACE	TRACE clock divider.
kCLOCK_DivCLKOUT	CLKOUT clock divider.
kCLOCK_DivSYSTICK	SYSTICK clock divider.
kCLOCK_DivFRO_HF_DIV	FRO_HF_DIV clock divider.
kCLOCK_DivSLOWCLK	SLOWCLK clock divider.
kCLOCK_DivAHBCLK	System clock divider.
kCLOCK_DivMax	MAX clock divider.

enum firc_trim_mode_t

Enumerator

kSCG_FircTrimNonUpdate

Trim enable but not enable trim value update.

In this mode, the trim value is fixed to the initialized value which is defined by trimCoar and trimFine in configure structure firc_trim_config_t.

kSCG_FircTrimUpdate

Trim enable and trim value update enable.

In this mode, the trim value is auto update.

enum firc_trim_src_t

Enumerator
kSCG_FircTrimSrcUsb0	USB0 start of frame (1kHz).
kSCG_FircTrimSrcSysOsc	System OSC.

enum sirc_trim_mode_t

Enumerator

kSCG_SircTrimNonUpdate

Trim enable but not enable trim value update.

In this mode, the trim value is fixed to the initialized value which is defined by trimCoar and trimFine in configure structure sirc_trim_config_t.

kSCG_SircTrimUpdate

Trim enable and trim value update enable.

In this mode, the trim value is auto update.

enum sirc_trim_src_t

Enumerator
kNoTrimSrc	No external tirm source.
kSCG_SircTrimSrcSysOsc	System OSC.

enum scg_sosc_monitor_mode_t

Enumerator
kSCG_SysOscMonitorDisable	Monitor disabled.
kSCG_SysOscMonitorInt	Interrupt when the SOSC error is detected.
kSCG_SysOscMonitorReset	Reset when the SOSC error is detected.

enum clke_16k_t

Enumerator
kCLKE_16K_SYSTEM	To VSYS domain.
kCLKE_16K_COREMAIN	To VDD_CORE domain.

Function Documentation

static void CLOCK_EnableClock ( clock_ip_name_t clk )

inlinestatic

Parameters

clk	: Clock to be enabled.

Returns: Nothing

static void CLOCK_DisableClock ( clock_ip_name_t clk )

inlinestatic

Parameters

clk	: Clock to be Disabled.

Returns: Nothing

void CLOCK_AttachClk ( clock_attach_id_t connection )

Parameters

connection : Clock to be configured.

Returns: Nothing

clock_attach_id_t CLOCK_GetClockAttachId ( clock_attach_id_t connection )

Parameters

connection : Clock attach id to get.

Returns: Clock source value.

void CLOCK_SetClockSelect	(	clock_select_name_t	sel_name,
		uint32_t	value
	)

Parameters

sel_name	: Clock select.
value	: value to be set.

uint32_t CLOCK_GetClockSelect ( clock_select_name_t sel_name )

Parameters

sel_name : Clock select.

Returns: Clock source value.

void CLOCK_SetClockDiv	(	clock_div_name_t	div_name,
		uint32_t	value
	)

Parameters

div_name	: Clock divider name
value	: Value to be divided

Returns: Nothing

uint32_t CLOCK_GetClockDiv ( clock_div_name_t div_name )

Parameters

div_name : Clock divider name

Returns: peripheral clock dividers

void CLOCK_HaltClockDiv ( clock_div_name_t div_name )

Parameters

div_name : Clock divider name

Returns: Nothing

status_t CLOCK_SetupFROHFClocking ( uint32_t iFreq )

Parameters

iFreq : Desired frequency.

Returns: returns success or fail status.

status_t CLOCK_SetupFRO12MClocking ( void )

Returns: returns success or fail status.

status_t CLOCK_SetupFRO16KClocking ( uint8_t clk_16k_enable_mask )

Parameters

clk_16k_enable_mask,: 0-3 0b00: disable both clk_16k0 and clk_16k1 0b01: only enable clk_16k0 0b10: only enable clk_16k1 0b11: enable both clk_16k0 and clk_16k1

Returns: returns success or fail status.

status_t CLOCK_SetupExtClocking ( uint32_t iFreq )

Parameters

iFreq : Desired frequency (must be equal to exact rate in Hz)

Returns: returns success or fail status.

status_t CLOCK_SetupExtRefClocking ( uint32_t iFreq )

Parameters

iFreq : Desired frequency (must be equal to exact rate in Hz)

Returns: returns success or fail status.

uint32_t CLOCK_GetFreq ( clock_name_t clockName )

Returns: Frequency of selected clock

uint32_t CLOCK_GetCoreSysClkFreq ( void )

Returns: Frequency of the core

uint32_t CLOCK_GetI3CFClkFreq ( void )

Returns: Frequency of I3C FCLK.

uint32_t CLOCK_GetCTimerClkFreq ( uint32_t id )

Returns: Frequency of CTimer functional Clock

uint32_t CLOCK_GetLpi2cClkFreq ( void )

Returns: Frequency of LPI2C0 functional Clock

uint32_t CLOCK_GetLpspiClkFreq ( uint32_t id )

Returns: Frequency of LPSPI functional Clock

uint32_t CLOCK_GetLpuartClkFreq ( uint32_t id )

Returns: Frequency of LPUART functional Clock

uint32_t CLOCK_GetLptmrClkFreq ( void )

Returns: Frequency of LPTMR functional Clock

uint32_t CLOCK_GetOstimerClkFreq ( void )

Returns: Frequency of OSTIMER Clock

uint32_t CLOCK_GetAdcClkFreq ( void )

Returns: Frequency of Adc.

uint32_t CLOCK_GetCmpFClkFreq ( uint32_t id )

Returns: Frequency of CMP Function.

uint32_t CLOCK_GetCmpRRClkFreq ( uint32_t id )

Returns: Frequency of CMP Round Robin.

uint32_t CLOCK_GetTraceClkFreq ( void )

Returns: Frequency of Trace.

uint32_t CLOCK_GetClkoutClkFreq ( void )

Returns: Frequency of CLKOUT.

uint32_t CLOCK_GetSystickClkFreq ( void )

Returns: Frequency of Systick.

status_t CLOCK_FROHFTrimConfig ( firc_trim_config_t config )

Parameters

config : FROHF trim value

Returns: returns success or fail status.

status_t CLOCK_FRO12MTrimConfig ( sirc_trim_config_t config )

Parameters

config : FRO 12M trim value

Returns: returns success or fail status.

void CLOCK_SetSysOscMonitorMode ( scg_sosc_monitor_mode_t mode )

This function sets the system OSC monitor mode. The mode can be disabled, it can generate an interrupt when the error is disabled, or reset when the error is detected.

Parameters

mode	Monitor mode to set.

bool CLOCK_EnableUsbfsClock ( void )

Enable USB Full Speed clock.

Overview

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Data Structures

Macros

Enumerations

Functions

Driver version

Data Structure Documentation

Data Fields

Field Documentation

Data Fields

Field Documentation

Macro Definition Documentation

Enumeration Type Documentation

Function Documentation