Reset driver supports peripheral reset and system reset.
|
enum | SYSCON_RSTn_t {
kINPUTMUX0_RST_SHIFT_RSTn = (0U | (0U)),
kI3C0_RST_SHIFT_RSTn = (0U | (1U)),
kCTIMER0_RST_SHIFT_RSTn = (0U | (2U)),
kCTIMER1_RST_SHIFT_RSTn = (0U | (3U)),
kCTIMER2_RST_SHIFT_RSTn = (0U | (4U)),
kFREQME_RST_SHIFT_RSTn = (0U | (5U)),
kUTICK0_RST_SHIFT_RSTn = (0U | (6U)),
kDMA_RST_SHIFT_RSTn = (0U | (8U)),
kAOI0_RST_SHIFT_RSTn = (0U | (9U)),
kCRC_RST_SHIFT_RSTn = (0U | (10U)),
kEIM_RST_SHIFT_RSTn = (0U | (11U)),
kERM_RST_SHIFT_RSTn = (0U | (12U)),
kLPI2C0_RST_SHIFT_RSTn = (0U | (16U)),
kLPSPI0_RST_SHIFT_RSTn = (0U | (17U)),
kLPSPI1_RST_SHIFT_RSTn = (0U | (18U)),
kLPUART0_RST_SHIFT_RSTn = (0U | (19U)),
kLPUART1_RST_SHIFT_RSTn = (0U | (20U)),
kLPUART2_RST_SHIFT_RSTn = (0U | (21U)),
kUSB0_RST_SHIFT_RSTn = (0U | (22U)),
kQDC0_RST_SHIFT_RSTn = (0U | (23U)),
kFLEXPWM0_RST_SHIFT_RSTn = (0U | (24U)),
kOSTIMER0_RST_SHIFT_RSTn = (0U | (25U)),
kADC0_RST_SHIFT_RSTn = (0U | (26U)),
kCMP1_RST_SHIFT_RSTn = (0U | (28U)),
kPORT0_RST_SHIFT_RSTn = (0U | (29U)),
kPORT1_RST_SHIFT_RSTn = (0U | (30U)),
kPORT2_RST_SHIFT_RSTn = (0U | (31U)),
kPORT3_RST_SHIFT_RSTn = ((1U << 8U) | (0U)),
kATX0_RST_SHIFT_RSTn = ((1U << 8U) | (1U)),
kGPIO0_RST_SHIFT_RSTn = ((1U << 8U) | (5U)),
kGPIO1_RST_SHIFT_RSTn = ((1U << 8U) | (6U)),
kGPIO2_RST_SHIFT_RSTn = ((1U << 8U) | (7U)),
kGPIO3_RST_SHIFT_RSTn = ((1U << 8U) | (8U)),
NotAvail_RSTn = (0xFFFFU)
} |
| Enumeration for peripheral reset control bits. More...
|
|
Value:
}
AOI0 reset control.
Definition: fsl_reset.h:47
Array initializers with peripheral reset bits
Defines the enumeration for peripheral reset control bits in PRESETCTRL/ASYNCPRESETCTRL registers
Enumerator |
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kINPUTMUX0_RST_SHIFT_RSTn |
INPUTMUX0 reset control.
|
kI3C0_RST_SHIFT_RSTn |
I3C0 reset control.
|
kCTIMER0_RST_SHIFT_RSTn |
CTIMER0 reset control.
|
kCTIMER1_RST_SHIFT_RSTn |
CTIMER1 reset control.
|
kCTIMER2_RST_SHIFT_RSTn |
CTIMER2 reset control.
|
kFREQME_RST_SHIFT_RSTn |
FREQME reset control.
|
kUTICK0_RST_SHIFT_RSTn |
UTICK0 reset control.
|
kDMA_RST_SHIFT_RSTn |
DMA reset control.
|
kAOI0_RST_SHIFT_RSTn |
AOI0 reset control.
|
kCRC_RST_SHIFT_RSTn |
CRC reset control.
|
kEIM_RST_SHIFT_RSTn |
EIM reset control.
|
kERM_RST_SHIFT_RSTn |
ERM reset control.
|
kLPI2C0_RST_SHIFT_RSTn |
LPI2C0 reset control.
|
kLPSPI0_RST_SHIFT_RSTn |
LPSPI0 reset control.
|
kLPSPI1_RST_SHIFT_RSTn |
LPSPI1 reset control.
|
kLPUART0_RST_SHIFT_RSTn |
LPUART0 reset control.
|
kLPUART1_RST_SHIFT_RSTn |
LPUART1 reset control.
|
kLPUART2_RST_SHIFT_RSTn |
LPUART2 reset control.
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kUSB0_RST_SHIFT_RSTn |
USB0 reset control.
|
kQDC0_RST_SHIFT_RSTn |
QDC0 reset control.
|
kFLEXPWM0_RST_SHIFT_RSTn |
FLEXPWM0 reset control.
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kOSTIMER0_RST_SHIFT_RSTn |
OSTIMER0 reset control.
|
kADC0_RST_SHIFT_RSTn |
ADC0 reset control.
|
kCMP1_RST_SHIFT_RSTn |
CMP1 reset control.
|
kPORT0_RST_SHIFT_RSTn |
PORT0 reset control.
|
kPORT1_RST_SHIFT_RSTn |
PORT1 reset control.
|
kPORT2_RST_SHIFT_RSTn |
PORT2 reset control.
|
kPORT3_RST_SHIFT_RSTn |
PORT3 reset control.
|
kATX0_RST_SHIFT_RSTn |
ATX0 reset control.
|
kGPIO0_RST_SHIFT_RSTn |
GPIO0 reset control.
|
kGPIO1_RST_SHIFT_RSTn |
GPIO1 reset control.
|
kGPIO2_RST_SHIFT_RSTn |
GPIO2 reset control.
|
kGPIO3_RST_SHIFT_RSTn |
GPIO3 reset control.
|
NotAvail_RSTn |
No reset control.
|
Asserts reset signal to specified peripheral module.
- Parameters
-
peripheral | Assert reset to this peripheral. The enum argument contains encoding of reset register and reset bit position in the reset register. |
Clears reset signal to specified peripheral module, allows it to operate.
- Parameters
-
peripheral | Clear reset to this peripheral. The enum argument contains encoding of reset register and reset bit position in the reset register. |
Reset peripheral module.
- Parameters
-
peripheral | Peripheral to reset. The enum argument contains encoding of reset register and reset bit position in the reset register. |
Release peripheral module.
- Parameters
-
peripheral | Peripheral to release. The enum argument contains encoding of reset register and reset bit position in the reset register. |