PORT Driver

Overview

This driver configures the PORT, including function mux, filter, pull up or down, and so on.

Macros
#define	FSL_PORT_FILTER_SELECT_BITMASK   (0x3U)
	The IOFLT Filter selection bit mask . More...

Typedefs
typedef enum _port_module_t	port_module_t
	Module or peripheral for port pin selection.
typedef enum _port_type_t	port_type_t
	Port type.
typedef enum _port_pin_index_t	port_pin_index_t
	Pin number, Notice this index enum has been deprecated and it will be removed in the next release. More...
typedef enum _port_pin_select_t	port_pin_select_t
	Pin selection.
typedef enum _port_filter_pin_t	port_filter_pin_t
	The PORT pins for input glitch filter configure.
typedef enum _port_filter_select_t	port_filter_select_t
	The Filter selection for input pins.
typedef enum _port_highdrive_pin_t	port_highdrive_pin_t
	Port pin for high driver enable/disable control. More...

Enumerations
enum	_port_module_t {   kPORT_NMI = SIM_SOPT_NMIE_MASK,   kPORT_RESET = SIM_SOPT_RSTPE_MASK,   kPORT_SWDE = SIM_SOPT_SWDE_MASK,   kPORT_RTC = SIM_PINSEL_RTCPS_MASK,   kPORT_I2C0 = SIM_PINSEL_I2C0PS_MASK,   kPORT_SPI0 = SIM_PINSEL_SPI0PS_MASK,   kPORT_UART0 = SIM_PINSEL_UART0PS_MASK,   kPORT_FTM0CH0 = SIM_PINSEL_FTM0PS0_MASK,   kPORT_FTM0CH1 = SIM_PINSEL_FTM0PS1_MASK,   kPORT_FTM1CH0 = SIM_PINSEL_FTM1PS0_MASK,   kPORT_FTM1CH1 = SIM_PINSEL_FTM1PS1_MASK,   kPORT_FTM2CH0 = SIM_PINSEL_FTM2PS0_MASK,   kPORT_FTM2CH1 = SIM_PINSEL_FTM2PS1_MASK,   kPORT_FTM2CH2 = SIM_PINSEL_FTM2PS2_MASK,   kPORT_FTM2CH3 = SIM_PINSEL_FTM2PS3_MASK }
	Module or peripheral for port pin selection. More...
enum	_port_type_t {   kPORT_PTA = 0U,   kPORT_PTB = 1U,   kPORT_PTC = 2U,   kPORT_PTD = 3U,   kPORT_PTE = 4U,   kPORT_PTF = 5U,   kPORT_PTG = 6U,   kPORT_PTH = 7U }
	Port type. More...
enum	_port_pin_index_t {   kPORT_PinIdx0 = 0U,   kPORT_PinIdx1 = 1U,   kPORT_PinIdx2 = 2U,   kPORT_PinIdx3 = 3U,   kPORT_PinIdx4 = 4U,   kPORT_PinIdx5 = 5U,   kPORT_PinIdx6 = 6U,   kPORT_PinIdx7 = 7U }
	Pin number, Notice this index enum has been deprecated and it will be removed in the next release. More...
enum	_port_pin_select_t {   kPORT_NMI_OTHERS = 0U,   kPORT_NMI_NMIE = 1U,   kPORT_RST_OTHERS = 0U,   kPORT_RST_RSTPE = 1U,   kPORT_SWDE_OTHERS = 0U,   kPORT_SWDE_SWDE = 1U,   kPORT_RTCO_PTC4 = 0U,   kPORT_RTCO_PTC5 = 1U,   kPORT_I2C0_SCLPTA3_SDAPTA2 = 0U,   kPORT_I2C0_SCLPTB7_SDAPTB6 = 1U,   kPORT_SPI0_SCKPTB2_MOSIPTB3_MISOPTB4_PCSPTB5 = 0U,   kPORT_SPI0_SCKPTE0_MOSIPTE1_MISOPTE2_PCSPTE3,   kPORT_UART0_RXPTB0_TXPTB1 = 0U,   kPORT_UART0_RXPTA2_TXPTA3 = 1U,   kPORT_FTM0_CH0_PTA0 = 0U,   kPORT_FTM0_CH0_PTB2 = 1U,   kPORT_FTM0_CH1_PTA1 = 0U,   kPORT_FTM0_CH1_PTB3 = 1U,   kPORT_FTM1_CH0_PTC4 = 0U,   kPORT_FTM1_CH0_PTH2 = 1U,   kPORT_FTM1_CH1_PTC5 = 0U,   kPORT_FTM1_CH1_PTE7 = 1U,   kPORT_FTM2_CH0_PTC0 = 0U,   kPORT_FTM2_CH0_PTH0 = 1U,   kPORT_FTM2_CH1_PTC1 = 0U,   kPORT_FTM2_CH1_PTH1 = 1U,   kPORT_FTM2_CH2_PTC2 = 0U,   kPORT_FTM2_CH2_PTD0 = 1U,   kPORT_FTM2_CH3_PTC3 = 0U,   kPORT_FTM2_CH3_PTD1 = 1U }
	Pin selection. More...
enum	_port_filter_pin_t {   kPORT_FilterPTA = PORT_IOFLT_FLTA_SHIFT,   kPORT_FilterPTB = PORT_IOFLT_FLTB_SHIFT,   kPORT_FilterPTC = PORT_IOFLT_FLTC_SHIFT,   kPORT_FilterPTD = PORT_IOFLT_FLTD_SHIFT,   kPORT_FilterPTE = PORT_IOFLT_FLTE_SHIFT,   kPORT_FilterPTF = PORT_IOFLT_FLTF_SHIFT,   kPORT_FilterPTG = PORT_IOFLT_FLTG_SHIFT,   kPORT_FilterPTH = PORT_IOFLT_FLTH_SHIFT,   kPORT_FilterRST = PORT_IOFLT_FLTRST_SHIFT,   kPORT_FilterKBI0 = PORT_IOFLT_FLTKBI0_SHIFT,   kPORT_FilterKBI1 = PORT_IOFLT_FLTKBI1_SHIFT,   kPORT_FilterNMI = PORT_IOFLT_FLTNMI_SHIFT }
	The PORT pins for input glitch filter configure. More...
enum	_port_filter_select_t {   kPORT_BUSCLK_OR_NOFILTER = 0U,   kPORT_FILTERDIV1 = 1U,   kPORT_FILTERDIV2 = 2U,   kPORT_FILTERDIV3 = 3U }
	The Filter selection for input pins. More...
enum	_port_highdrive_pin_t {   kPORT_HighDrive_PTB4 = PORT_HDRVE_PTB4_MASK,   kPORT_HighDrive_PTB5 = PORT_HDRVE_PTB5_MASK,   kPORT_HighDrive_PTD0 = PORT_HDRVE_PTD0_MASK,   kPORT_HighDrive_PTD1 = PORT_HDRVE_PTD1_MASK,   kPORT_HighDrive_PTE0 = PORT_HDRVE_PTE0_MASK,   kPORT_HighDrive_PTE1 = PORT_HDRVE_PTE1_MASK,   kPORT_HighDrive_PTH0 = PORT_HDRVE_PTH0_MASK,   kPORT_HighDrive_PTH1 = PORT_HDRVE_PTH1_MASK }
	Port pin for high driver enable/disable control. More...

Driver version
#define	FSL_PORT_DRIVER_VERSION   (MAKE_VERSION(2, 0, 2))
	Version 2.0.2. More...

Configuration
void	PORT_SetPinSelect (port_module_t module, port_pin_select_t pin)
	Selects pin for modules. More...
static void	PORT_SetFilterSelect (PORT_Type *base, port_filter_pin_t port, port_filter_select_t filter)
	Selects the glitch filter for input pins. More...
static void	PORT_SetFilterDIV1WidthThreshold (PORT_Type *base, uint8_t threshold)
	Sets the width threshold for glitch filter division set 1. More...
static void	PORT_SetFilterDIV2WidthThreshold (PORT_Type *base, uint8_t threshold)
	Sets the width threshold for glitch filter division set 2. More...
static void	PORT_SetFilterDIV3WidthThreshold (PORT_Type *base, uint8_t threshold)
	Sets the width threshold for glitch filter division set 3. More...
void	PORT_SetPinPullUpEnable (PORT_Type *base, port_type_t port, uint8_t num, bool enable)
	Enables or disables the port pull up. More...
static void	PORT_SetHighDriveEnable (PORT_Type *base, port_highdrive_pin_t pin, bool enable)
	Set High drive for port pins. More...

Macro Definition Documentation

#define FSL_PORT_DRIVER_VERSION   (MAKE_VERSION(2, 0, 2))

#define FSL_PORT_FILTER_SELECT_BITMASK   (0x3U)

Typedef Documentation

typedef enum _port_pin_index_t port_pin_index_t

typedef enum _port_highdrive_pin_t port_highdrive_pin_t

Enumeration Type Documentation

enum _port_module_t

Enumerator
kPORT_NMI	NMI port pin select.
kPORT_RESET	RESET pin select.
kPORT_SWDE	Single wire debug port pin.
kPORT_RTC	RTCO port pin select.
kPORT_I2C0	I2C0 Port pin select.
kPORT_SPI0	SPI0 port pin select.
kPORT_UART0	UART0 port pin select.
kPORT_FTM0CH0	FTM0_CH0 port pin select.
kPORT_FTM0CH1	FTM0_CH1 port pin select.
kPORT_FTM1CH0	FTM1_CH0 port pin select.
kPORT_FTM1CH1	FTM1_CH1 port pin select.
kPORT_FTM2CH0	FTM2_CH0 port pin select.
kPORT_FTM2CH1	FTM2_CH1 port pin select.
kPORT_FTM2CH2	FTM2_CH2 port pin select.
kPORT_FTM2CH3	FTM2_CH3 port pin select.

enum _port_type_t

Enumerator
kPORT_PTA	PORT PTA.
kPORT_PTB	PORT PTB.
kPORT_PTC	PORT PTC.
kPORT_PTD	PORT PTD.
kPORT_PTE	PORT PTE.
kPORT_PTF	PORT PTF.
kPORT_PTG	PORT PTG.
kPORT_PTH	PORT PTH.

enum _port_pin_index_t

Enumerator
kPORT_PinIdx0	PORT PIN index 0.
kPORT_PinIdx1	PORT PIN index 1.
kPORT_PinIdx2	PORT PIN index 2.
kPORT_PinIdx3	PORT PIN index 3.
kPORT_PinIdx4	PORT PIN index 4.
kPORT_PinIdx5	PORT PIN index 5.
kPORT_PinIdx6	PORT PIN index 6.
kPORT_PinIdx7	PORT PIN index 7.

enum _port_pin_select_t

Enumerator
kPORT_NMI_OTHERS	PTB4/FTM2_CH4 etc function as PTB4/FTM2_CH4 etc.
kPORT_NMI_NMIE	PTB4/FTM2_CH4 etc function as NMI.
kPORT_RST_OTHERS	PTA5/IRQ etc function as PTA5/IRQ etc.
kPORT_RST_RSTPE	PTA5/IRQ etc function as REST.
kPORT_SWDE_OTHERS	PTA4/ACMP0 etc function as PTA4/ACMP0 etc.
kPORT_SWDE_SWDE	PTA4/ACMP0 etc function as SWD.
kPORT_RTCO_PTC4	RTCO is mapped to PTC4.
kPORT_RTCO_PTC5	RTCO is mapped to PTC5.
kPORT_I2C0_SCLPTA3_SDAPTA2	I2C0_SCL and I2C0_SDA are mapped on PTA3 and PTA2, respectively.
kPORT_I2C0_SCLPTB7_SDAPTB6	I2C0_SCL and I2C0_SDA are mapped on PTB7 and PTB6, respectively.
kPORT_SPI0_SCKPTB2_MOSIPTB3_MISOPTB4_PCSPTB5	SPI0_SCK/MOSI/MISO/PCS0 are mapped on PTB2/PTB3/PTB4/PTB5.
kPORT_SPI0_SCKPTE0_MOSIPTE1_MISOPTE2_PCSPTE3	SPI0_SCK/MOSI/MISO/PCS0 are mapped on PTE0/PTE1/PTE2/PTE3.
kPORT_UART0_RXPTB0_TXPTB1	UART0_RX and UART0_TX are mapped on PTB0 and PTB1.
kPORT_UART0_RXPTA2_TXPTA3	UART0_RX and UART0_TX are mapped on PTA2 and PTA3.
kPORT_FTM0_CH0_PTA0	FTM0_CH0 channels are mapped on PTA0.
kPORT_FTM0_CH0_PTB2	FTM0_CH0 channels are mapped on PTB2.
kPORT_FTM0_CH1_PTA1	FTM0_CH1 channels are mapped on PTA1.
kPORT_FTM0_CH1_PTB3	FTM0_CH1 channels are mapped on PTB3.
kPORT_FTM1_CH0_PTC4	FTM1_CH0 channels are mapped on PTC4.
kPORT_FTM1_CH0_PTH2	FTM1_CH0 channels are mapped on PTH2.
kPORT_FTM1_CH1_PTC5	FTM1_CH1 channels are mapped on PTC5.
kPORT_FTM1_CH1_PTE7	FTM1_CH1 channels are mapped on PTE7.
kPORT_FTM2_CH0_PTC0	FTM2_CH0 channels are mapped on PTC0.
kPORT_FTM2_CH0_PTH0	FTM2_CH0 channels are mapped on PTH0.
kPORT_FTM2_CH1_PTC1	FTM2_CH1 channels are mapped on PTC1.
kPORT_FTM2_CH1_PTH1	FTM2_CH1 channels are mapped on PTH1.
kPORT_FTM2_CH2_PTC2	FTM2_CH2 channels are mapped on PTC2.
kPORT_FTM2_CH2_PTD0	FTM2_CH2 channels are mapped on PTD0.
kPORT_FTM2_CH3_PTC3	FTM2_CH3 channels are mapped on PTC3.
kPORT_FTM2_CH3_PTD1	FTM2_CH3 channels are mapped on PTD1.

enum _port_filter_pin_t

Enumerator
kPORT_FilterPTA	Filter for input from PTA.
kPORT_FilterPTB	Filter for input from PTB.
kPORT_FilterPTC	Filter for input from PTC.
kPORT_FilterPTD	Filter for input from PTD.
kPORT_FilterPTE	Filter for input from PTE.
kPORT_FilterPTF	Filter for input from PTF.
kPORT_FilterPTG	Filter for input from PTG.
kPORT_FilterPTH	Filter for input from PTH.
kPORT_FilterRST	Filter for input from RESET/IRQ.
kPORT_FilterKBI0	Filter for input from KBI0.
kPORT_FilterKBI1	Filter for input from KBI1.
kPORT_FilterNMI	Filter for input from NMI.

enum _port_filter_select_t

Enumerator
kPORT_BUSCLK_OR_NOFILTER	Filter section BUSCLK for PTA~PTH, No filter for REST/KBI0/KBI1/NMI.
kPORT_FILTERDIV1	Filter Division Set 1.
kPORT_FILTERDIV2	Filter Division Set 2.
kPORT_FILTERDIV3	Filter Division Set 3.

enum _port_highdrive_pin_t

Enumerator
kPORT_HighDrive_PTB4	PTB4.
kPORT_HighDrive_PTB5	PTB5.
kPORT_HighDrive_PTD0	PTD0.
kPORT_HighDrive_PTD1	PTD1.
kPORT_HighDrive_PTE0	PTE0.
kPORT_HighDrive_PTE1	PTE1.
kPORT_HighDrive_PTH0	PTH0.
kPORT_HighDrive_PTH1	PTH1.

Function Documentation

void PORT_SetPinSelect	(	port_module_t	module,
		port_pin_select_t	pin
	)

This API is used to select the port pin for the module with multiple port pin selection. For example the FTM Channel 0 can be mapped to ether PTA0 or PTB2. Select FTM channel 0 map to PTA0 port pin as:

* PORT_SetPinSelect(kPORT_FTM0CH0, kPORT_FTM0_CH0_PTA0);
* 

Note

This API doesn't support to select specified ALT for a given port pin. The ALT feature is automatically selected by hardware according to the ALT priority: Low --—> high: Alt1, Alt2, … when peripheral modules has been enabled.

If you want to select a specified ALT for a given port pin, please add two more steps after calling PORT_SetPinSelect:

1. Enable module or the port control in the module for the ALT you want to select. For I2C ALT feature:all port enable is controlled by the module enable, so set IICEN in I2CX_C1 to enable the port pins for I2C feature. For KBI ALT feature:each port pin is controlled independently by each bit in KBIx_PE. set related bit in this register to enable the KBI feature in the port pin.
2. Make sure there is no module enabled with higher priority than the ALT module feature you want to select.

Parameters

module	Modules for pin selection. For NMI/RST module are write-once attribute after reset.
pin	Port pin selection for modules.

static void PORT_SetFilterSelect ( PORT_Type *  base, port_filter_pin_t  port, port_filter_select_t  filter  )

inlinestatic

Parameters

base	PORT peripheral base pointer.
port	PORT pin, see "port_filter_pin_t".
filter	Filter select, see "port_filter_select_t".

static void PORT_SetFilterDIV1WidthThreshold ( PORT_Type *  base, uint8_t  threshold  )

inlinestatic

`

Parameters

base	PORT peripheral base pointer.
threshold	PORT glitch filter width threshold, take refer to reference manual for detail information. 0 - LPOCLK 1 - LPOCLK/2 2 - LPOCLK/4 3 - LPOCLK/8 4 - LPOCLK/16 5 - LPOCLK/32 6 - LPOCLK/64 7 - LPOCLK/128

static void PORT_SetFilterDIV2WidthThreshold ( PORT_Type *  base, uint8_t  threshold  )

inlinestatic

`

Parameters

base	PORT peripheral base pointer.
threshold	PORT glitch filter width threshold, take refer to reference manual for detail information. 0 - BUSCLK/32 1 - BUSCLK/64 2 - BUSCLK/128 3 - BUSCLK/256 4 - BUSCLK/512 5 - BUSCLK/1024 6 - BUSCLK/2048 7 - BUSCLK/4096

static void PORT_SetFilterDIV3WidthThreshold ( PORT_Type *  base, uint8_t  threshold  )

inlinestatic

`

Parameters

base	PORT peripheral base pointer.
threshold	PORT glitch filter width threshold, take refer to reference manual for detail information. 0 - BUSCLK/2 1 - BUSCLK/4 2 - BUSCLK/8 3 - BUSCLK/16

void PORT_SetPinPullUpEnable	(	PORT_Type *	base,
		port_type_t	port,
		uint8_t	num,
		bool	enable
	)

Parameters

base	PORT peripheral base pointer.
port	PORT type, such as PTA/PTB/PTC etc, see "port_type_t".
num	PORT Pin number, such as 0, 1, 2.... There are seven pins not exists in this device: PTG: PTG4, PTG5, PTG6, PTG7. PTH: PTH3, PTH4, PTH5. so, when set PTG, and PTH, please don't set the pins mentioned above. Please take refer to the reference manual.
enable	Enable or disable the pull up feature switch.

static void PORT_SetHighDriveEnable ( PORT_Type *  base, port_highdrive_pin_t  pin, bool  enable  )

inlinestatic

Parameters

base	PORT peripheral base pointer.
pin	PORT pin support high drive.
enable	Enable or disable the high driver feature switch.