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MCUXpresso SDK API Reference Manual
Rev. 0
NXP Semiconductors
|
MMC card Extended CSD register (unit: byte). More...
#include <fsl_sdmmc_spec.h>
Data Fields | |
uint8_t | partitionAttribute |
< secure removal type[16] More... | |
uint8_t | userWP |
< max enhance area size [159-157] More... | |
uint8_t | bootPartitionWP |
boot write protect register[173] | |
uint8_t | bootWPStatus |
boot write protect status register[174] | |
uint8_t | highDensityEraseGroupDefinition |
High-density erase group definition [175]. | |
uint8_t | bootDataBusConditions |
Boot bus conditions [177]. | |
uint8_t | bootConfigProtect |
Boot config protection [178]. | |
uint8_t | partitionConfig |
Boot configuration [179]. | |
uint8_t | eraseMemoryContent |
Erased memory content [181]. | |
uint8_t | dataBusWidth |
Data bus width mode [183]. | |
uint8_t | highSpeedTiming |
High-speed interface timing [185]. | |
uint8_t | powerClass |
Power class [187]. | |
uint8_t | commandSetRevision |
Command set revision [189]. | |
uint8_t | commandSet |
Command set [191]. | |
uint8_t | extendecCsdVersion |
Extended CSD revision [192]. | |
uint8_t | csdStructureVersion |
CSD structure version [194]. | |
uint8_t | cardType |
Card Type [196]. | |
uint8_t | ioDriverStrength |
IO driver strength [197]. | |
uint8_t | powerClass52MHz195V |
< out of interrupt busy timing [198] More... | |
uint8_t | powerClass26MHz195V |
Power Class for 26MHz @ 1.95V [201]. | |
uint8_t | powerClass52MHz360V |
Power Class for 52MHz @ 3.6V [202]. | |
uint8_t | powerClass26MHz360V |
Power Class for 26MHz @ 3.6V [203]. | |
uint8_t | minimumReadPerformance4Bit26MHz |
Minimum Read Performance for 4bit at 26MHz [205]. | |
uint8_t | minimumWritePerformance4Bit26MHz |
Minimum Write Performance for 4bit at 26MHz [206]. | |
uint8_t | minimumReadPerformance8Bit26MHz4Bit52MHz |
Minimum read Performance for 8bit at 26MHz/4bit @52MHz [207]. | |
uint8_t | minimumWritePerformance8Bit26MHz4Bit52MHz |
Minimum Write Performance for 8bit at 26MHz/4bit @52MHz [208]. | |
uint8_t | minimumReadPerformance8Bit52MHz |
Minimum Read Performance for 8bit at 52MHz [209]. | |
uint8_t | minimumWritePerformance8Bit52MHz |
Minimum Write Performance for 8bit at 52MHz [210]. | |
uint32_t | sectorCount |
Sector Count [215:212]. | |
uint8_t | sleepAwakeTimeout |
< sleep notification timeout [216] More... | |
uint8_t | sleepCurrentVCCQ |
< Production state awareness timeout [218] More... | |
uint8_t | sleepCurrentVCC |
Sleep current (VCC) [220]. | |
uint8_t | highCapacityWriteProtectGroupSize |
High-capacity write protect group size [221]. | |
uint8_t | reliableWriteSectorCount |
Reliable write sector count [222]. | |
uint8_t | highCapacityEraseTimeout |
High-capacity erase timeout [223]. | |
uint8_t | highCapacityEraseUnitSize |
High-capacity erase unit size [224]. | |
uint8_t | accessSize |
Access size [225]. | |
uint8_t | minReadPerformance8bitAt52MHZDDR |
< secure trim multiplier[229] More... | |
uint8_t | minWritePerformance8bitAt52MHZDDR |
Minimum write performance for 8bit at DDR 52MHZ[235]. | |
uint8_t | powerClass200MHZVCCQ130VVCC360V |
power class for 200MHZ, at VCCQ= 1.3V,VCC=3.6V[236] | |
uint8_t | powerClass200MHZVCCQ195VVCC360V |
power class for 200MHZ, at VCCQ= 1.95V,VCC=3.6V[237] | |
uint8_t | powerClass52MHZDDR195V |
power class for 52MHZ,DDR at Vcc 1.95V[238] | |
uint8_t | powerClass52MHZDDR360V |
power class for 52MHZ,DDR at Vcc 3.6V[239] | |
uint32_t | cacheSize |
< 1st initialization time after partitioning[241] More... | |
uint8_t | powerClass200MHZDDR360V |
power class for 200MHZ, DDR at VCC=2.6V[253] | |
uint8_t | extPartitionSupport |
< fw VERSION [261-254] More... | |
uint8_t | supportedCommandSet |
< large unit size[495] More... | |
uint8_t mmc_extended_csd_t::partitionAttribute |
< product state awareness enablement[17]
< max preload data size[21-18]
< pre-load data size[25-22]
< FFU status [26]
< mode operation code[29]
< mode config [30]
< control to turn on/off cache[33]
< power off notification[34]
< packed cmd fail index [35]
< packed cmd status[36]
< context configuration[51-37]
< extended partitions attribut[53-52]
< exception events status[55-54]
< exception events control[57-56]
< number of group to be released[58]
< class 6 command control[59]
< 1st initiallization after disabling sector size emu[60]
< sector size[61]
< sector size emulation[62]
< native sector size[63]
< period wakeup [131]
< package case temperature is controlled[132]
< production state awareness[133]
< enhanced user data start addr [139-136]
< enhanced user data area size[142-140]
< general purpose partition size[154-143] partition attribute [156]
uint8_t mmc_extended_csd_t::userWP |
< HPI management [161]
< write reliability parameter register[166]
< write reliability setting register[167]
< RPMB size multi [168]
< FW configuration[169] user write protect register[171]
uint8_t mmc_extended_csd_t::powerClass52MHz195V |
< partition switch timing [199] Power Class for 52MHz @ 1.95V [200]
uint8_t mmc_extended_csd_t::sleepAwakeTimeout |
Sleep/awake timeout [217]
uint8_t mmc_extended_csd_t::sleepCurrentVCCQ |
Sleep current (VCCQ) [219]
uint8_t mmc_extended_csd_t::minReadPerformance8bitAt52MHZDDR |
< secure erase multiplier[230]
< secure feature support[231]
< trim multiplier[232] Minimum read performance for 8bit at DDR 52MHZ[234]
uint32_t mmc_extended_csd_t::cacheSize |
< correct prg sectors number[245-242]
< background operations status[246]
< power off notification timeout[247]
< generic CMD6 timeout[248] cache size[252-249]
uint8_t mmc_extended_csd_t::extPartitionSupport |
< device version[263-262]
< optimal trim size[264]
< optimal write size[265]
< optimal read size[266]
< pre EOL information[267]
< device life time estimation typeA[268]
< device life time estimation typeB[269]
< number of FW sectors correctly programmed[305-302]
< FFU argument[490-487]
< operation code timeout[491]
< support mode [493] extended partition attribute support[494]
uint8_t mmc_extended_csd_t::supportedCommandSet |
< context management capability[496]
< tag resource size[497]
< tag unit size[498]
< max packed write cmd[500]
< max packed read cmd[501]
< HPI feature[503] Supported Command Sets [504]