Overview

The MCUXpresso SDK provides APIs for MCUXpresso SDK devices' clock operation.

The clock driver supports:

Clock generator (PLL, FLL, and so on) configuration
Clock mux and divider configuration
Getting clock frequency

The MCUXpresso SDK provides APIs for MCUXpresso SDK devices' clock operation.

Modules
	System Clock Generator (SCG)

Files
file	fsl_clock.h

Data Structures
struct	scg_sys_clk_config_t
	SCG system clock configuration. More...

struct	scg_sosc_config_t
	SCG system OSC configuration. More...

struct	scg_rosc_config_t
	SCG ROSC configuration. More...

struct	scg_sirc_config_t
	SCG slow IRC clock configuration. More...

struct	scg_firc_trim_config_t
	SCG fast IRC clock trim configuration. More...

struct	scg_firc_config_t
	SCG fast IRC clock configuration. More...

struct	fro192m_rf_clk_config_t
	FRO192M RF clock configuration. More...

Macros
#define	FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL 0
	Configure whether driver controls clock. More...

#define	EDMA_CLOCKS
	Clock ip name array for EDMA. More...

#define	SYSPM_CLOCKS
	Clock ip name array for SYSPM. More...

#define	SFA_CLOCKS
	Clock ip name array for SFA. More...

#define	CRC_CLOCKS
	Clock ip name array for CRC. More...

#define	TPM_CLOCKS
	Clock ip name array for TPM. More...

#define	LPI2C_CLOCKS
	Clock ip name array for LPI2C. More...

#define	I3C_CLOCKS
	Clock ip name array for I3C. More...

#define	LPSPI_CLOCKS
	Clock ip name array for LPSPI. More...

#define	LPUART_CLOCKS
	Clock ip name array for LPUART. More...

#define	PORT_CLOCKS
	Clock ip name array for PORT. More...

#define	LPADC_CLOCKS
	Clock ip name array for LPADC. More...

#define	LPCMP_CLOCKS
	Clock ip name array for LPCMP. More...

#define	VREF_CLOCKS
	Clock ip name array for VREF. More...

#define	GPIO_CLOCKS
	Clock ip name array for GPIO. More...

#define	LPIT_CLOCKS
	Clock ip name array for LPIT. More...

#define	RF_CLOCKS
	Clock ip name array for RF. More...

#define	WDOG_CLOCKS
	Clock ip name array for WDOG. More...

#define	FLEXCAN_CLOCKS
	Clock ip name array for FLEXCAN. More...

#define	FLEXIO_CLOCKS
	Clock ip name array for FLEXIO. More...

#define	TSTMR_CLOCKS
	Clock ip name array for TSTMR. More...

#define	EWM_CLOCKS
	Clock ip name array for EWM. More...

#define	SEMA42_CLOCKS
	Clock ip name array for SEMA42. More...

#define	MAKE_MRCC_REGADDR(base, offset) ((base) + (offset))
	"IP Connector name difinition used for clock gate, clock source and clock divider setting. More...

Enumerations
enum	clock_name_t { kCLOCK_CoreSysClk, kCLOCK_SlowClk, kCLOCK_PlatClk, kCLOCK_SysClk, kCLOCK_BusClk, kCLOCK_ScgSysOscClk, kCLOCK_ScgSircClk, kCLOCK_ScgFircClk, kCLOCK_RtcOscClk }
	Clock name used to get clock frequency. More...

enum	clock_ip_control_t { kCLOCK_IpClkControl_fun0 = 0U, kCLOCK_IpClkControl_fun1 = 1U, kCLOCK_IpClkControl_fun2 = 2U, kCLOCK_IpClkControl_fun3 }
	Clock source for peripherals that support various clock selections. More...

enum	clock_ip_src_t { kCLOCK_IpSrcFro6M = 2U, kCLOCK_IpSrcFro192M = 3U, kCLOCK_IpSrcSoscClk = 4U, kCLOCK_IpSrc32kClk = 5U }
	Clock source for peripherals that support various clock selections. More...

enum	clock_ip_name_t { kCLOCK_NOGATE = 0U, kCLOCK_Ewm0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x4C), kCLOCK_Syspm0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x5C), kCLOCK_Wdog0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x68), kCLOCK_Wdog1 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x6C), kCLOCK_Sfa0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x74), kCLOCK_Crc0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x8C), kCLOCK_Secsubsys = MAKE_MRCC_REGADDR(MRCC_BASE, 0x90), kCLOCK_Lpit0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0xBC), kCLOCK_Tstmr0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0xC0), kCLOCK_Tpm0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0xC4), kCLOCK_Tpm1 = MAKE_MRCC_REGADDR(MRCC_BASE, 0xC8), kCLOCK_Lpi2c0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0xCC), kCLOCK_Lpi2c1 = MAKE_MRCC_REGADDR(MRCC_BASE, 0xD0), kCLOCK_I3c0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0xD4), kCLOCK_Lpspi0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0xD8), kCLOCK_Lpspi1 = MAKE_MRCC_REGADDR(MRCC_BASE, 0xDC), kCLOCK_Lpuart0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0xE0), kCLOCK_Lpuart1 = MAKE_MRCC_REGADDR(MRCC_BASE, 0xE4), kCLOCK_Flexio0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0xE8), kCLOCK_Can0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0xEC), kCLOCK_Sema0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0xFC), kCLOCK_Data_stream_2p4 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x104), kCLOCK_PortA = MAKE_MRCC_REGADDR(MRCC_BASE, 0x108), kCLOCK_PortB = MAKE_MRCC_REGADDR(MRCC_BASE, 0x10C), kCLOCK_PortC = MAKE_MRCC_REGADDR(MRCC_BASE, 0x110), kCLOCK_Lpadc0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x11C), kCLOCK_Lpcmp0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x120), kCLOCK_Lpcmp1 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x124), kCLOCK_Vref0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x128), kCLOCK_Mtr_master = MAKE_MRCC_REGADDR(MRCC_BASE, 0x134), kCLOCK_GpioA = MAKE_MRCC_REGADDR(MRCC_BASE, 0x404), kCLOCK_GpioB = MAKE_MRCC_REGADDR(MRCC_BASE, 0x408), kCLOCK_GpioC = MAKE_MRCC_REGADDR(MRCC_BASE, 0x40C), kCLOCK_Dma0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x410), kCLOCK_Pflexnvm = MAKE_MRCC_REGADDR(MRCC_BASE, 0x414), kCLOCK_Sram0 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x41C), kCLOCK_Sram1 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x420), kCLOCK_Sram2 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x424), kCLOCK_Sram3 = MAKE_MRCC_REGADDR(MRCC_BASE, 0x428), kCLOCK_Rf_2p4ghz_bist = MAKE_MRCC_REGADDR(MRCC_BASE, 0x42C) }
	Clock IP name. More...

enum	_scg_status { kStatus_SCG_Busy = MAKE_STATUS(kStatusGroup_SCG, 1), kStatus_SCG_InvalidSrc = MAKE_STATUS(kStatusGroup_SCG, 2) }
	SCG status return codes. More...

enum	scg_sys_clk_t { kSCG_SysClkSlow, kSCG_SysClkBus, kSCG_SysClkPlatform, kSCG_SysClkCore }
	SCG system clock type. More...

enum	scg_sys_clk_src_t { kSCG_SysClkSrcSysOsc = 1U, kSCG_SysClkSrcSirc = 2U, kSCG_SysClkSrcFirc = 3U, kSCG_SysClkSrcRosc = 4U }
	SCG system clock source. More...

enum	scg_sys_clk_div_t { kSCG_SysClkDivBy1 = 0U, kSCG_SysClkDivBy2 = 1U, kSCG_SysClkDivBy3 = 2U, kSCG_SysClkDivBy4 = 3U, kSCG_SysClkDivBy5 = 4U, kSCG_SysClkDivBy6 = 5U, kSCG_SysClkDivBy7 = 6U, kSCG_SysClkDivBy8 = 7U, kSCG_SysClkDivBy9 = 8U, kSCG_SysClkDivBy10 = 9U, kSCG_SysClkDivBy11 = 10U, kSCG_SysClkDivBy12 = 11U, kSCG_SysClkDivBy13 = 12U, kSCG_SysClkDivBy14 = 13U, kSCG_SysClkDivBy15 = 14U, kSCG_SysClkDivBy16 = 15U }
	SCG system clock divider value. More...

enum	clock_clkout_src_t { kClockClkoutSelScgSlow = 0U, kClockClkoutSelSosc = 1U, kClockClkoutSelSirc = 2U, kClockClkoutSelFirc = 3U, kClockClkoutSelScgRtcOsc = 4U }
	SCG clock out configuration (CLKOUTSEL). More...

enum	scg_sosc_monitor_mode_t { kSCG_SysOscMonitorDisable = 0U, kSCG_SysOscMonitorInt = SCG_SOSCCSR_SOSCCM_MASK, kSCG_SysOscMonitorReset }
	SCG system OSC monitor mode. More...

enum	{ kSCG_SoscDisable = 0, kSCG_SoscEnable = SCG_SOSCCSR_SOSCEN_MASK, kSCG_SoscEnableInSleep = SCG_SOSCCSR_SOSCSTEN_MASK }
	SOSC enable mode. More...

enum	scg_rosc_monitor_mode_t { kSCG_RoscMonitorDisable = 0U, kSCG_RoscMonitorInt = SCG_ROSCCSR_ROSCCM_MASK, kSCG_RoscMonitorReset }
	SCG ROSC monitor mode. More...

enum	scg_sirc_enable_mode_t { kSCG_SircDisableInSleep = 0, kSCG_SircEnableInSleep = SCG_SIRCCSR_SIRCSTEN_MASK }
	SIRC enable mode. More...

enum	scg_firc_trim_mode_t { kSCG_FircTrimNonUpdate = SCG_FIRCCSR_FIRCTREN_MASK, kSCG_FircTrimUpdate = SCG_FIRCCSR_FIRCTREN_MASK \| SCG_FIRCCSR_FIRCTRUP_MASK }
	SCG fast IRC trim mode. More...

enum	scg_firc_trim_src_t { kSCG_FircTrimSrcSysOsc = 2U, kSCG_FircTrimSrcRtcOsc = 3U }
	SCG fast IRC trim source. More...

enum	{ kSCG_FircDisable = 0, kSCG_FircEnable = SCG_FIRCCSR_FIRCEN_MASK, kSCG_FircEnableInSleep = SCG_FIRCCSR_FIRCSTEN_MASK }
	FIRC enable mode. More...

enum	scg_firc_range_t { kSCG_FircRange48M, kSCG_FircRange64M, kSCG_FircRange96M, kSCG_FircRange192M }
	SCG fast IRC clock frequency range. More...

enum	fro192m_rf_range_t { kFro192M_Range16M, kFro192M_Range24M, kFro192M_Range32M, kFro192M_Range48M, kFro192M_Range64M }
	FRO192M RF clock frequency range. More...

enum	fro192m_rf_clk_div_t { kFro192M_ClkDivBy1 = 0U, kFro192M_ClkDivBy2 = 1U, kFro192M_ClkDivBy4 = 2U, kFro192M_ClkDivBy8 = 3U }
	RF Flash APB and RF_CMC clock divide. More...

Functions
static void	CLOCK_EnableClock (clock_ip_name_t name)
	Enable the clock for specific IP. More...

static void	CLOCK_EnableClockLPMode (clock_ip_name_t name, clock_ip_control_t control)
	Enable the clock for specific IP in low power mode. More...

static void	CLOCK_DisableClock (clock_ip_name_t name)
	Disable the clock for specific IP. More...

static void	CLOCK_SetIpSrc (clock_ip_name_t name, clock_ip_src_t src)
	Set the clock source for specific IP module. More...

static void	CLOCK_SetIpSrcDiv (clock_ip_name_t name, uint8_t divValue)
	Set the clock source and divider for specific IP module. More...

uint32_t	CLOCK_GetFreq (clock_name_t clockName)
	Gets the clock frequency for a specific clock name. More...

uint32_t	CLOCK_GetCoreSysClkFreq (void)
	Get the core clock or system clock frequency. More...

uint32_t	CLOCK_GetPlatClkFreq (void)
	Get the platform clock frequency. More...

uint32_t	CLOCK_GetBusClkFreq (void)
	Get the bus clock frequency. More...

uint32_t	CLOCK_GetFlashClkFreq (void)
	Get the flash clock frequency. More...

uint32_t	CLOCK_GetIpFreq (clock_ip_name_t name)
	Gets the functional clock frequency for a specific IP module. More...

Variables
volatile uint32_t	g_xtal0Freq
	External XTAL0 (OSC0/SYSOSC) clock frequency. More...

volatile uint32_t	g_xtal32Freq
	External XTAL32/EXTAL32 clock frequency. More...

Driver version
#define	FSL_CLOCK_DRIVER_VERSION (MAKE_VERSION(1, 0, 0))
	CLOCK driver version 1.0.0. More...

MCU System Clock.
uint32_t	CLOCK_GetSysClkFreq (scg_sys_clk_t type)
	Gets the SCG system clock frequency. More...

static void	CLOCK_SetRunModeSysClkConfig (const scg_sys_clk_config_t *config)
	Sets the system clock configuration for RUN mode. More...

static void	CLOCK_GetCurSysClkConfig (scg_sys_clk_config_t *config)
	Gets the system clock configuration in the current power mode. More...

static void	CLOCK_SetClkOutSel (clock_clkout_src_t setting)
	Sets the clock out selection. More...

SCG System OSC Clock.
status_t	CLOCK_InitSysOsc (const scg_sosc_config_t *config)
	Initializes the SCG system OSC. More...

status_t	CLOCK_DeinitSysOsc (void)
	De-initializes the SCG system OSC. More...

uint32_t	CLOCK_GetSysOscFreq (void)
	Gets the SCG system OSC clock frequency (SYSOSC). More...

static bool	CLOCK_IsSysOscErr (void)
	Checks whether the system OSC clock error occurs. More...

static void	CLOCK_ClearSysOscErr (void)
	Clears the system OSC clock error.

static void	CLOCK_SetSysOscMonitorMode (scg_sosc_monitor_mode_t mode)
	Sets the system OSC monitor mode. More...

static bool	CLOCK_IsSysOscValid (void)
	Checks whether the system OSC clock is valid. More...

static void	CLOCK_UnlockSysOscControlStatusReg (void)
	Unlock the SOSCCSR control status register.

static void	CLOCK_LockSysOscControlStatusReg (void)
	Lock the SOSCCSR control status register.

SCG Slow IRC Clock.
status_t	CLOCK_InitSirc (const scg_sirc_config_t *config)
	Initializes the SCG slow IRC clock. More...

status_t	CLOCK_DeinitSirc (void)
	De-initializes the SCG slow IRC. More...

uint32_t	CLOCK_GetSircFreq (void)
	Gets the SCG SIRC clock frequency. More...

static bool	CLOCK_IsSircValid (void)
	Checks whether the SIRC clock is valid. More...

static void	CLOCK_UnlockSircControlStatusReg (void)
	Unlock the SIRCCSR control status register.

static void	CLOCK_LockSircControlStatusReg (void)
	Lock the SIRCCSR control status register.

SCG Fast IRC Clock.
status_t	CLOCK_InitFirc (const scg_firc_config_t *config)
	Initializes the SCG fast IRC clock. More...

status_t	CLOCK_DeinitFirc (void)
	De-initializes the SCG fast IRC. More...

uint32_t	CLOCK_GetFircFreq (void)
	Gets the SCG FIRC clock frequency. More...

static bool	CLOCK_IsFircErr (void)
	Checks whether the FIRC clock error occurs. More...

static void	CLOCK_ClearFircErr (void)
	Clears the FIRC clock error.

static bool	CLOCK_IsFircValid (void)
	Checks whether the FIRC clock is valid. More...

static void	CLOCK_UnlockFircControlStatusReg (void)
	Unlock the FIRCCSR control status register.

static void	CLOCK_LockFircControlStatusReg (void)
	Lock the FIRCCSR control status register.

status_t	CLOCK_InitRosc (const scg_rosc_config_t *config)
	brief Initializes the SCG ROSC. More...

status_t	CLOCK_DeinitRosc (void)
	brief De-initializes the SCG ROSC. More...

uint32_t	CLOCK_GetRtcOscFreq (void)
	Gets the SCG RTC OSC clock frequency. More...

status_t	CLOCK_InitRfFro192M (const fro192m_rf_clk_config_t *config)
	Initializes the FRO192M clock for the Radio Mode Controller. More...

uint32_t	CLOCK_GetRfFro192MFreq (void)
	Gets the FRO192M clock frequency. More...

static bool	CLOCK_IsRoscErr (void)
	Checks whether the ROSC clock error occurs. More...

static void	CLOCK_ClearRoscErr (void)
	Clears the ROSC clock error.

static void	CLOCK_SetRoscMonitorMode (scg_rosc_monitor_mode_t mode)
	Sets the ROSC monitor mode. More...

static bool	CLOCK_IsRoscValid (void)
	Checks whether the ROSC clock is valid. More...

static void	CLOCK_UnlockRoscControlStatusReg (void)
	Unlock the ROSCCSR control status register.

static void	CLOCK_LockRoscControlStatusReg (void)
	Lock the ROSCCSR control status register.

External clock frequency
static void	CLOCK_SetXtal0Freq (uint32_t freq)
	Sets the XTAL0 frequency based on board settings. More...

static void	CLOCK_SetXtal32Freq (uint32_t freq)
	Sets the XTAL32 frequency based on board settings. More...

Data Structure Documentation

struct scg_sys_clk_config_t

Data Fields
uint32_t	divSlow: 4
	Slow clock divider, see scg_sys_clk_div_t. More...

uint32_t	divBus: 4
	Bus clock divider, see scg_sys_clk_div_t. More...

uint32_t	__pad0__: 8
	Reserved. More...

uint32_t	divCore: 4
	Core clock divider, see scg_sys_clk_div_t. More...

uint32_t	__pad1__: 4
	Reserved. More...

uint32_t	src: 3
	System clock source, see scg_sys_clk_src_t. More...

uint32_t	__pad2__: 5
	reserved. More...

Field Documentation

uint32_t scg_sys_clk_config_t::divSlow

uint32_t scg_sys_clk_config_t::divBus

uint32_t scg_sys_clk_config_t::__pad0__

uint32_t scg_sys_clk_config_t::divCore

uint32_t scg_sys_clk_config_t::__pad1__

uint32_t scg_sys_clk_config_t::src

uint32_t scg_sys_clk_config_t::__pad2__

struct scg_sosc_config_t

Data Fields
uint32_t	freq
	System OSC frequency. More...

uint32_t	enableMode
	Enable mode, OR'ed value of _scg_sosc_enable_mode. More...

scg_sosc_monitor_mode_t	monitorMode
	Clock monitor mode selected. More...

Field Documentation

uint32_t scg_sosc_config_t::freq

uint32_t scg_sosc_config_t::enableMode

scg_sosc_monitor_mode_t scg_sosc_config_t::monitorMode

struct scg_rosc_config_t

Data Fields
scg_rosc_monitor_mode_t	monitorMode
	Clock monitor mode selected. More...

Field Documentation

scg_rosc_monitor_mode_t scg_rosc_config_t::monitorMode

struct scg_sirc_config_t

Data Fields
scg_sirc_enable_mode_t	enableMode
	Enable mode, OR'ed value of _scg_sirc_enable_mode. More...

Field Documentation

scg_sirc_enable_mode_t scg_sirc_config_t::enableMode

struct scg_firc_trim_config_t

Data Fields
scg_firc_trim_mode_t	trimMode
	FIRC trim mode. More...

scg_firc_trim_src_t	trimSrc
	Trim source. More...

uint16_t	trimDiv
	Divider of SOSC for FIRC. More...

uint8_t	trimCoar
	Trim coarse value; Irrelevant if trimMode is kSCG_FircTrimUpdate. More...

uint8_t	trimFine
	Trim fine value; Irrelevant if trimMode is kSCG_FircTrimUpdate. More...

Field Documentation

scg_firc_trim_mode_t scg_firc_trim_config_t::trimMode

scg_firc_trim_src_t scg_firc_trim_config_t::trimSrc

uint16_t scg_firc_trim_config_t::trimDiv

uint8_t scg_firc_trim_config_t::trimCoar

uint8_t scg_firc_trim_config_t::trimFine

struct scg_firc_config_t

Data Fields
uint32_t	enableMode
	Enable mode. More...

scg_firc_range_t	range
	Fast IRC frequency range. More...

const scg_firc_trim_config_t *	trimConfig
	Pointer to the FIRC trim configuration; set NULL to disable trim. More...

Field Documentation

uint32_t scg_firc_config_t::enableMode

scg_firc_range_t scg_firc_config_t::range

const scg_firc_trim_config_t* scg_firc_config_t::trimConfig

struct fro192m_rf_clk_config_t

Data Fields
fro192m_rf_range_t	range
	FRO192M RF clock frequency range. More...

fro192m_rf_clk_div_t	apb_rfcmc_div
	RF Flash APB and RF_CMC clock divide. More...

Field Documentation

fro192m_rf_range_t fro192m_rf_clk_config_t::range

fro192m_rf_clk_div_t fro192m_rf_clk_config_t::apb_rfcmc_div

Macro Definition Documentation

#define FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL 0

When set to 0, peripheral drivers will enable clock in initialize function and disable clock in de-initialize function. When set to 1, peripheral driver will not control the clock, application could control the clock out of the driver.

Note: All drivers share this feature switcher. If it is set to 1, application should handle clock enable and disable for all drivers.

#define FSL_CLOCK_DRIVER_VERSION (MAKE_VERSION(1, 0, 0))

#define EDMA_CLOCKS

Value:

{               \
        kCLOCK_Dma0 \
    }

#define SYSPM_CLOCKS

Value:

{                 \
        kCLOCK_Syspm0 \
    }

#define SFA_CLOCKS

Value:

{                              \
        kCLOCK_Sfa0, kCLOCK_NOGATE \
    }

#define CRC_CLOCKS

Value:

{               \
        kCLOCK_Crc0 \
    }

#define TPM_CLOCKS

Value:

{                                           \
        kCLOCK_Tpm0, kCLOCK_Tpm1, kCLOCK_NOGATE \
    }

#define LPI2C_CLOCKS

Value:

{                                \
        kCLOCK_Lpi2c0, kCLOCK_Lpi2c1 \
    }

#define I3C_CLOCKS

Value:

{               \
        kCLOCK_I3c0 \
    }

#define LPSPI_CLOCKS

Value:

{                                \
        kCLOCK_Lpspi0, kCLOCK_Lpspi1 \
    }

#define LPUART_CLOCKS

Value:

{                                  \
        kCLOCK_Lpuart0, kCLOCK_Lpuart1 \
    }

#define PORT_CLOCKS

Value:

{                                            \
        kCLOCK_PortA, kCLOCK_PortB, kCLOCK_PortC \
    }

#define LPADC_CLOCKS

Value:

{                 \
        kCLOCK_Lpadc0 \
    }

#define LPCMP_CLOCKS

Value:

{                                \
        kCLOCK_Lpcmp0, kCLOCK_Lpcmp1 \
    }

#define VREF_CLOCKS

Value:

{                \
        kCLOCK_Vref0 \
    }

#define GPIO_CLOCKS

Value:

{                                            \
        kCLOCK_GpioA, kCLOCK_GpioB, kCLOCK_GpioC \
    }

#define LPIT_CLOCKS

Value:

{                \
        kCLOCK_Lpit0 \
    }

#define RF_CLOCKS

Value:

{                         \
        kCLOCK_Rf_2p4ghz_bist \
    }

#define WDOG_CLOCKS

Value:

{                              \
        kCLOCK_Wdog0, kCLOCK_Wdog1 \
    }

#define FLEXCAN_CLOCKS

Value:

{                  \
        kCLOCK_Can0    \
    }

#define FLEXIO_CLOCKS

Value:

{                  \
        kCLOCK_Flexio0 \
    }

#define TSTMR_CLOCKS

Value:

{                 \
        kCLOCK_Tstmr0 \
    }

#define EWM_CLOCKS

Value:

{               \
        kCLOCK_Ewm0 \
    }

#define SEMA42_CLOCKS

Value:

{                 \
        kCLOCK_Sema0  \
    }

#define MAKE_MRCC_REGADDR	(	base,
		offset
	)	((base) + (offset))

It is defined as the corresponding register address.

Enumeration Type Documentation

enum clock_name_t

These clocks source would be generated from SCG module.

Enumerator
kCLOCK_CoreSysClk	Cortex M33 clock.
kCLOCK_SlowClk	SLOW_CLK with DIVSLOW.
kCLOCK_PlatClk	PLAT_CLK.
kCLOCK_SysClk	SYS_CLK.
kCLOCK_BusClk	BUS_CLK with DIVBUS.
kCLOCK_ScgSysOscClk	SCG system OSC clock.
kCLOCK_ScgSircClk	SCG SIRC clock.
kCLOCK_ScgFircClk	SCG FIRC clock.
kCLOCK_RtcOscClk	RTC OSC clock.

enum clock_ip_control_t

These options are for MRCC->XX[CC]

Enumerator
kCLOCK_IpClkControl_fun0	Peripheral clocks are disabled, module does not stall low power mode entry.
kCLOCK_IpClkControl_fun1	Peripheral clocks are enabled, module does not stall low power mode entry.
kCLOCK_IpClkControl_fun2	Peripherals clocks are enabled unless peripheral is idle, low power mode entry will stall until peripheral is idle.
kCLOCK_IpClkControl_fun3	Peripheral clocks are enabled unless in SLEEP mode (or lower), low power mode entry will stall until peripheral is idle Peripheral functional clocks that remain enabled in SLEEP mode are enabled and do not stall low power mode entry unless entering DEEPSLEEP mode (or lower)

enum clock_ip_src_t

These options are for MRCC->XX[MUX].

Enumerator
kCLOCK_IpSrcFro6M	FRO 6M clock.
kCLOCK_IpSrcFro192M	FRO 192M clock.
kCLOCK_IpSrcSoscClk	OSC RF clock.
kCLOCK_IpSrc32kClk	32k Clk clock.

enum clock_ip_name_t

Enumerator
kCLOCK_NOGATE	No clock gate for the IP in MRCC.
kCLOCK_Ewm0	Clock ewm0.
kCLOCK_Syspm0	Clock syspm0.
kCLOCK_Wdog0	Clock wdog0.
kCLOCK_Wdog1	Clock wdog1.
kCLOCK_Sfa0	Clock sfa0.
kCLOCK_Crc0	Clock crc0.
kCLOCK_Secsubsys	Clock secsubsys.
kCLOCK_Lpit0	Clock lpit0.
kCLOCK_Tstmr0	Clock tstmr0.
kCLOCK_Tpm0	Clock tpm0.
kCLOCK_Tpm1	Clock tpm1.
kCLOCK_Lpi2c0	Clock lpi2c0.
kCLOCK_Lpi2c1	Clock lpi2c1.
kCLOCK_I3c0	Clock i3c.
kCLOCK_Lpspi0	Clock lpspi0.
kCLOCK_Lpspi1	Clock lpspi1.
kCLOCK_Lpuart0	Clock lpuart0.
kCLOCK_Lpuart1	Clock lpuart1.
kCLOCK_Flexio0	Clock Flexio0.
kCLOCK_Can0	Clock Can0.
kCLOCK_Sema0	Clock Sema0.
kCLOCK_Data_stream_2p4	Clock data_stream_2p4.
kCLOCK_PortA	Clock portA.
kCLOCK_PortB	Clock portB.
kCLOCK_PortC	Clock portC.
kCLOCK_Lpadc0	Clock lpadc0.
kCLOCK_Lpcmp0	Clock lpcmp0.
kCLOCK_Lpcmp1	Clock lpcmp1.
kCLOCK_Vref0	Clock verf0.
kCLOCK_Mtr_master	Clock mtr_master.
kCLOCK_GpioA	Clock gpioA.
kCLOCK_GpioB	Clock gpioB.
kCLOCK_GpioC	Clock gpioC.
kCLOCK_Dma0	Clock dma0.
kCLOCK_Pflexnvm	Clock pflexnvm.
kCLOCK_Sram0	Clock Sram0.
kCLOCK_Sram1	Clock Sram1.
kCLOCK_Sram2	Clock Sram2.
kCLOCK_Sram3	Clock Sram3.
kCLOCK_Rf_2p4ghz_bist	Clock rf_2p4ghz_bist.

enum _scg_status

Enumerator
kStatus_SCG_Busy	Clock is busy.
kStatus_SCG_InvalidSrc	Invalid source.

enum scg_sys_clk_t

Enumerator
kSCG_SysClkSlow	System slow clock.
kSCG_SysClkBus	Bus clock.
kSCG_SysClkPlatform	Platform clock.
kSCG_SysClkCore	Core clock.

enum scg_sys_clk_src_t

Enumerator
kSCG_SysClkSrcSysOsc	System OSC.
kSCG_SysClkSrcSirc	Slow IRC.
kSCG_SysClkSrcFirc	Fast IRC.
kSCG_SysClkSrcRosc	RTC OSC.

enum scg_sys_clk_div_t

Enumerator
kSCG_SysClkDivBy1	Divided by 1.
kSCG_SysClkDivBy2	Divided by 2.
kSCG_SysClkDivBy3	Divided by 3.
kSCG_SysClkDivBy4	Divided by 4.
kSCG_SysClkDivBy5	Divided by 5.
kSCG_SysClkDivBy6	Divided by 6.
kSCG_SysClkDivBy7	Divided by 7.
kSCG_SysClkDivBy8	Divided by 8.
kSCG_SysClkDivBy9	Divided by 9.
kSCG_SysClkDivBy10	Divided by 10.
kSCG_SysClkDivBy11	Divided by 11.
kSCG_SysClkDivBy12	Divided by 12.
kSCG_SysClkDivBy13	Divided by 13.
kSCG_SysClkDivBy14	Divided by 14.
kSCG_SysClkDivBy15	Divided by 15.
kSCG_SysClkDivBy16	Divided by 16.

enum clock_clkout_src_t

Enumerator
kClockClkoutSelScgSlow	SCG Slow clock.
kClockClkoutSelSosc	System OSC.
kClockClkoutSelSirc	Slow IRC.
kClockClkoutSelFirc	Fast IRC.
kClockClkoutSelScgRtcOsc	SCG RTC OSC clock.

enum scg_sosc_monitor_mode_t

Enumerator
kSCG_SysOscMonitorDisable	Monitor disabled.
kSCG_SysOscMonitorInt	Interrupt when the SOSC error is detected.
kSCG_SysOscMonitorReset	Reset when the SOSC error is detected.

anonymous enum

Enumerator
kSCG_SoscDisable	Disable SOSC clock.
kSCG_SoscEnable	Enable SOSC clock.
kSCG_SoscEnableInSleep	Enable SOSC in sleep mode.

enum scg_rosc_monitor_mode_t

Enumerator
kSCG_RoscMonitorDisable	Monitor disabled.
kSCG_RoscMonitorInt	Interrupt when the RTC OSC error is detected.
kSCG_RoscMonitorReset	Reset when the RTC OSC error is detected.

enum scg_sirc_enable_mode_t

Enumerator
kSCG_SircDisableInSleep	Disable SIRC clock.
kSCG_SircEnableInSleep	Enable SIRC in sleep mode.

enum scg_firc_trim_mode_t

Enumerator

kSCG_FircTrimNonUpdate

FIRC trim enable but not enable trim value update.

In this mode, the trim value is fixed to the initialized value which is defined by trimCoar and trimFine in configure structure scg_firc_trim_config_t.

kSCG_FircTrimUpdate

FIRC trim enable and trim value update enable.

In this mode, the trim value is auto update.

enum scg_firc_trim_src_t

Enumerator
kSCG_FircTrimSrcSysOsc	System OSC.
kSCG_FircTrimSrcRtcOsc	RTC OSC (32.768 kHz).

anonymous enum

Enumerator
kSCG_FircDisable	Disable FIRC clock.
kSCG_FircEnable	Enable FIRC clock.
kSCG_FircEnableInSleep	Enable FIRC in sleep mode.

enum scg_firc_range_t

Enumerator
kSCG_FircRange48M	Fast IRC is trimmed to 48 MHz.
kSCG_FircRange64M	Fast IRC is trimmed to 64 MHz.
kSCG_FircRange96M	Fast IRC is trimmed to 96 MHz.
kSCG_FircRange192M	Fast IRC is trimmed to 192 MHz.

enum fro192m_rf_range_t

Enumerator
kFro192M_Range16M	FRO192M output frequenc 16 MHz.
kFro192M_Range24M	FRO192M output frequenc 24 MHz.
kFro192M_Range32M	FRO192M output frequenc 32 MHz.
kFro192M_Range48M	FRO192M output frequenc 48 MHz.
kFro192M_Range64M	FRO192M output frequenc 64 MHz.

enum fro192m_rf_clk_div_t

Enumerator
kFro192M_ClkDivBy1	Divided by 1.
kFro192M_ClkDivBy2	Divided by 2.
kFro192M_ClkDivBy4	Divided by 4.
kFro192M_ClkDivBy8	Divided by 8.

Function Documentation

static void CLOCK_EnableClock ( clock_ip_name_t name )

inlinestatic

Parameters

name	Which clock to enable, see clock_ip_name_t.

static void CLOCK_EnableClockLPMode	(	clock_ip_name_t	name,
		clock_ip_control_t	control
	)

inlinestatic

Parameters

name	Which clock to enable, see clock_ip_name_t.
control	Clock Config, see clock_ip_control_t.

static void CLOCK_DisableClock ( clock_ip_name_t name )

inlinestatic

Parameters

name	Which clock to disable, see clock_ip_name_t.

static void CLOCK_SetIpSrc	(	clock_ip_name_t	name,
		clock_ip_src_t	src
	)

inlinestatic

Set the clock source for specific IP, not all modules need to set the clock source, should only use this function for the modules need source setting.

Parameters

name	Which peripheral to check, see clock_ip_name_t.
src	Clock source to set.

static void CLOCK_SetIpSrcDiv	(	clock_ip_name_t	name,
		uint8_t	divValue
	)

inlinestatic

Set the clock source and divider for specific IP, not all modules need to set the clock source and divider, should only use this function for the modules need source and divider setting.

Divider output clock = Divider input clock / (divValue+1)]).

Parameters

name	Which peripheral to check, see clock_ip_name_t.
divValue	The divider value.

uint32_t CLOCK_GetFreq ( clock_name_t clockName )

This function checks the current clock configurations and then calculates the clock frequency for a specific clock name defined in clock_name_t.

Parameters

clockName Clock names defined in clock_name_t

Returns: Clock frequency value in hertz

uint32_t CLOCK_GetCoreSysClkFreq ( void )

Returns: Clock frequency in Hz.

uint32_t CLOCK_GetPlatClkFreq ( void )

Returns: Clock frequency in Hz.

uint32_t CLOCK_GetBusClkFreq ( void )

Returns: Clock frequency in Hz.

uint32_t CLOCK_GetFlashClkFreq ( void )

Returns: Clock frequency in Hz.

uint32_t CLOCK_GetIpFreq ( clock_ip_name_t name )

This function gets the IP module's functional clock frequency based on MRCC registers. It is only used for the IP modules which could select clock source by MRCC[PCS].

Parameters

name	Which peripheral to get, see clock_ip_name_t.

Returns: Clock frequency value in Hz

uint32_t CLOCK_GetSysClkFreq ( scg_sys_clk_t type )

This function gets the SCG system clock frequency. These clocks are used for core, platform, external, and bus clock domains.

Parameters

type	Which type of clock to get, core clock or slow clock.

Returns: Clock frequency.

static void CLOCK_SetRunModeSysClkConfig ( const scg_sys_clk_config_t * config )

inlinestatic

This function sets the system clock configuration for RUN mode.

Parameters

config Pointer to the configuration.

static void CLOCK_GetCurSysClkConfig ( scg_sys_clk_config_t * config )

inlinestatic

This function gets the system configuration in the current power mode.

Parameters

config Pointer to the configuration.

static void CLOCK_SetClkOutSel ( clock_clkout_src_t setting )

inlinestatic

This function sets the clock out selection (CLKOUTSEL).

Parameters

setting The selection to set.

status_t CLOCK_InitSysOsc ( const scg_sosc_config_t * config )

This function enables the SCG system OSC clock according to the configuration.

Parameters

config Pointer to the configuration structure.

Return values

kStatus_Success	System OSC is initialized.
kStatus_SCG_Busy	System OSC has been enabled and is used by the system clock.
kStatus_ReadOnly	System OSC control register is locked.

Note: This function can't detect whether the system OSC has been enabled and used by an IP.

status_t CLOCK_DeinitSysOsc ( void )

This function disables the SCG system OSC clock.

Return values

kStatus_Success	System OSC is deinitialized.
kStatus_SCG_Busy	System OSC is used by the system clock.
kStatus_ReadOnly	System OSC control register is locked.

Note: This function can't detect whether the system OSC is used by an IP.

uint32_t CLOCK_GetSysOscFreq ( void )

Returns: Clock frequency; If the clock is invalid, returns 0.

static bool CLOCK_IsSysOscErr ( void )

inlinestatic

Returns: True if the error occurs, false if not.

static void CLOCK_SetSysOscMonitorMode ( scg_sosc_monitor_mode_t mode )

inlinestatic

This function sets the system OSC monitor mode. The mode can be disabled, it can generate an interrupt when the error is disabled, or reset when the error is detected.

Parameters

mode	Monitor mode to set.

static bool CLOCK_IsSysOscValid ( void )

inlinestatic

Returns: True if clock is valid, false if not.

status_t CLOCK_InitSirc ( const scg_sirc_config_t * config )

This function enables the SCG slow IRC clock according to the configuration.

Parameters

config Pointer to the configuration structure.

Return values

kStatus_Success	SIRC is initialized.
kStatus_SCG_Busy	SIRC has been enabled and is used by system clock.
kStatus_ReadOnly	SIRC control register is locked.

Note: This function can't detect whether the system OSC has been enabled and used by an IP.

status_t CLOCK_DeinitSirc ( void )

This function disables the SCG slow IRC.

Return values

kStatus_Success	SIRC is deinitialized.
kStatus_SCG_Busy	SIRC is used by system clock.
kStatus_ReadOnly	SIRC control register is locked.

Note: This function can't detect whether the SIRC is used by an IP.

uint32_t CLOCK_GetSircFreq ( void )

Returns: Clock frequency; If the clock is invalid, returns 0.

static bool CLOCK_IsSircValid ( void )

inlinestatic

Returns: True if clock is valid, false if not.

status_t CLOCK_InitFirc ( const scg_firc_config_t * config )

This function enables the SCG fast IRC clock according to the configuration.

Parameters

config Pointer to the configuration structure.

Return values

kStatus_Success	FIRC is initialized.
kStatus_SCG_Busy	FIRC has been enabled and is used by the system clock.
kStatus_ReadOnly	FIRC control register is locked.

Note: This function can't detect whether the FIRC has been enabled and used by an IP.

status_t CLOCK_DeinitFirc ( void )

This function disables the SCG fast IRC.

Return values

kStatus_Success	FIRC is deinitialized.
kStatus_SCG_Busy	FIRC is used by the system clock.
kStatus_ReadOnly	FIRC control register is locked.

Note: This function can't detect whether the FIRC is used by an IP.

uint32_t CLOCK_GetFircFreq ( void )

Returns: Clock frequency; If the clock is invalid, returns 0.

static bool CLOCK_IsFircErr ( void )

inlinestatic

Returns: True if the error occurs, false if not.

static bool CLOCK_IsFircValid ( void )

inlinestatic

Returns: True if clock is valid, false if not.

status_t CLOCK_InitRosc ( const scg_rosc_config_t * config )

This function enables the SCG ROSC clock according to the configuration.

param config Pointer to the configuration structure. retval kStatus_Success ROSC is initialized. retval kStatus_SCG_Busy ROSC has been enabled and is used by the system clock. retval kStatus_ReadOnly ROSC control register is locked.

note This function can't detect whether the system OSC has been enabled and used by an IP.

status_t CLOCK_DeinitRosc ( void )

This function disables the SCG ROSC clock.

retval kStatus_Success System OSC is deinitialized. retval kStatus_SCG_Busy System OSC is used by the system clock. retval kStatus_ReadOnly System OSC control register is locked.

note This function can't detect whether the ROSC is used by an IP.

uint32_t CLOCK_GetRtcOscFreq ( void )

Returns: Clock frequency; If the clock is invalid, returns 0.

status_t CLOCK_InitRfFro192M ( const fro192m_rf_clk_config_t * config )

This function configure the RF FRO192M clock according to the configuration.

Parameters

config Pointer to the configuration structure.

Return values

kStatus_Success RF FRO192M is configured.

uint32_t CLOCK_GetRfFro192MFreq ( void )

Returns: Clock frequency; If the clock is invalid, returns 0.

static bool CLOCK_IsRoscErr ( void )

inlinestatic

Returns: True if the error occurs, false if not.

static void CLOCK_SetRoscMonitorMode ( scg_rosc_monitor_mode_t mode )

inlinestatic

This function sets the ROSC monitor mode. The mode can be disabled, it can generate an interrupt when the error is disabled, or reset when the error is detected.

Parameters

mode	Monitor mode to set.

static bool CLOCK_IsRoscValid ( void )

inlinestatic

Returns: True if clock is valid, false if not.

static void CLOCK_SetXtal0Freq ( uint32_t freq )

inlinestatic

Parameters

freq	The XTAL0/EXTAL0 input clock frequency in Hz.

static void CLOCK_SetXtal32Freq ( uint32_t freq )

inlinestatic

Parameters

freq	The XTAL32/EXTAL32 input clock frequency in Hz.

Variable Documentation

volatile uint32_t g_xtal0Freq

The XTAL0/EXTAL0 (OSC0/SYSOSC) clock frequency in Hz. When the clock is set up, use the function CLOCK_SetXtal0Freq to set the value in the clock driver. For example, if XTAL0 is 8 MHz:

* CLOCK_InitSysOsc(...);
* CLOCK_SetXtal0Freq(80000000);
* 

This is important for the multicore platforms where only one core needs to set up the OSC0/SYSOSC using CLOCK_InitSysOsc. All other cores need to call the CLOCK_SetXtal0Freq to get a valid clock frequency.

volatile uint32_t g_xtal32Freq

The XTAL32/EXTAL32 clock frequency in Hz. When the clock is set up, use the function CLOCK_SetXtal32Freq to set the value in the clock driver.

This is important for the multicore platforms where only one core needs to set up the clock. All other cores need to call the CLOCK_SetXtal32Freq to get a valid clock frequency.

Overview

Modules

Files

Data Structures

Macros

Enumerations

Functions

Variables

Driver version

MCU System Clock.

SCG System OSC Clock.

SCG Slow IRC Clock.

SCG Fast IRC Clock.

External clock frequency

Data Structure Documentation

Data Fields

Field Documentation

Data Fields

Field Documentation

Data Fields

Field Documentation

Data Fields

Field Documentation

Data Fields

Field Documentation

Data Fields

Field Documentation

Data Fields

Field Documentation

Macro Definition Documentation

Enumeration Type Documentation

Function Documentation

Variable Documentation