Overview

The MCUXpresso SDK provides Peripheral driver for the Memory Mapped Arithmetic Unit (MMAU) block of MCUXpresso SDK devices.

The Memory Mapped Arithmetic Unit (MMAU) provides acceleration to a set of math operations, including signed/unsigned multiplication and accumulation, division and root-square, and so on.

Function groups

MMAU Initialization

To initialize the MMAU driver, call the MMAU_EnableDMA(MMAU, true) and MMAU_EnableSupervisorOnly(MMAU, false) functions.

/* Enable interrupt */
MMAU_EnableInterrupts(MMAU, kMMAU_AccumOverflowInterruptEnable | kMMAU_DivideByZeroInterruptEnable);
MMAU_EnableDMA(MMAU, true); /* DMA enable, MMAU will generate dma request whenever MMAU is IDLE */
MMAU_EnableSupervisorOnly(MMAU, false); /* Access in both supervisor and user mode */

MMAU Interrupts

MMAU supports three interrupts: Accumulation Overflow (Q), Divide/Multiply Overflow (V) and Divide-by-Zero (DZ). These interrupts were definition at mmau_flag_t structure. The MMAU driver supports enable/disable the interrupts, get/clear the interrupt flags.

For example:

/* Enable Accumulation Overflow and Divide-by-Zero interrupts */
MMAU_EnableInterrupts(MMAU, kMMAU_AccumOverflowInterruptEnable | kMMAU_DivideByZeroInterruptEnable);
/* Disable  Divide/Multiply Overflow and Divide-by-Zero interrupts */
MMAU_DisableInterrupts(MMAU, kMMAU_AccumOverflowInterruptEnable | kMMAU_DivideByZeroInterruptEnable);
/* Get interrupt flags */
uint32_t flags = MMAU_GetInterruptFlags(MMAU);
/* Clear interrupt flags */
MMAU_ClearInterruptFlags(MMAU, kMMAU_OverflowInterruptFlag | kMMAU_DivideByZeroInterruptFlag);

MMAU Instruction flags

The MMAU driver provides four instruction flags: Accumulation Overflow (Q), Divide or Multiply Overflow (V), Divide-by-Zero (DZ) and Signed calculation result is negative (N). These flags were updated after each calculation. MMAU driver contains get and set functions to access instruction flags.

/* Get instruction flags */
uint32_t flags = MMAU_GetInstructionFlags(MMAU);
/* Set instruction flags */
MMAU_SetInstructionFlags(MMAU, kMMAU_OverflowInstructionFlag     |
                               kMMAU_DivideByZeroInstructionFlag |
                               kMMAU_NegativeInstructionFlag     |
                               kMMAU_AccumOverflowInstructionFlag);
/* Clear instruction flags */
MMAU_ClearInstructionFlags(MMAU, kMMAU_OverflowInstructionFlag     |
                                 kMMAU_DivideByZeroInstructionFlag |
                                 kMMAU_NegativeInstructionFlag     |
                                 kMMAU_AccumOverflowInstructionFlag);

MMAU Operators

The MMAU driver supports multiply, divide and square root functions. Each kind of function supports Unsigned Integer, Signed Integer (except square root) and Fractional Number as operator.

Typical use case and example

This example demonstrates the SIN calculation.

int main(void)
{
    frac32_t result;
    BOARD_InitHardware();
    PRINTF("\r\nMMAU example : start\n");
    result = sine((frac32_t)0x7FFFFFFF);
    PRINTF("\n\t Sin(pi)      = 0x%X in frac32 format\n", result);
    result = sine((frac32_t)0x66666666);
    PRINTF("\n\t Sin(0.8*pi)  = 0x%X in frac32 format\n", result);
    result = sine((frac32_t)0x4CCCCCCD);
    PRINTF("\n\t Sin(0.6*pi)  = 0x%X in frac32 format\n", result);
    result = sine((frac32_t)0x33333333);
    PRINTF("\n\t Sin(0.4*pi)  = 0x%X in frac32 format\n", result);
    result = sine((frac32_t)0x19999999);
    PRINTF("\n\t Sin(0.2*pi)  = 0x%X in frac32 format\n", result);
    result = sine(0);
    PRINTF("\n\t Sin(0)       = 0x%X in frac32 format\n", result);
    result = sine((frac32_t)0x99999999);
    PRINTF("\n\t Sin(-0.2*pi) = 0x%X in frac32 format\n", result);
    result = sine((frac32_t)0xB3333333);
    PRINTF("\n\t Sin(-0.4*pi) = 0x%X in frac32 format\n", result);
    result = sine((frac32_t)0xCCCCCCCD);
    PRINTF("\n\t Sin(-0.6*pi) = 0x%X in frac32 format\n", result);
    result = sine((frac32_t)0xE6666666);
    PRINTF("\n\t Sin(-0.8*pi) = 0x%X in frac32 format\n", result);
    result = sine((frac32_t)(0x80000000));
    PRINTF("\n\t Sin(-pi)     = 0x%X in frac32 format\n\r", result);
    PRINTF("\r\nMMAU example : end\n");
    while(1)
    {
    }
}

Enumerations
enum	mmau_interrupt_enable_t { kMMAU_AccumOverflowInterruptEnable = (MMAU_CSR_QIE_MASK), kMMAU_OverflowInterruptEnable = (MMAU_CSR_VIE_MASK), kMMAU_DivideByZeroInterruptEnable = (MMAU_CSR_DZIE_MASK) }
	MMAU interrupt configuration structure, default settings all disabled. More...

enum	mmau_interrupt_flag_t { kMMAU_AccumOverflowInterruptFlag = (MMAU_CSR_QIF_MASK), kMMAU_OverflowInterruptFlag = (MMAU_CSR_VIF_MASK), kMMAU_DivideByZeroInterruptFlag = (MMAU_CSR_DZIF_MASK) }
	MMAU interrupt and instruction flags. More...

enum	mmau_instruction_flag_t { kMMAU_AccumOverflowInstructionFlag = (MMAU_CSR_Q_MASK), kMMAU_OverflowInstructionFlag = (MMAU_CSR_V_MASK), kMMAU_DivideByZeroInstructionFlag = (MMAU_CSR_DZ_MASK), kMMAU_NegativeInstructionFlag = (MMAU_CSR_N_MASK) }
	MMAU interrupt and instruction flags. More...

Functions
static uint32_t	MMAU_GetHwRevCmd (MMAU_Type *base)
	Gets hardware revision level. More...

Driver version
#define	FSL_MMAU_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
	Version 2.0.0.

Registers decorated load/store addresses
#define	MMAU__X0 0xF0004000UL
	Accumulator register X0.

#define	MMAU__X1 0xF0004004UL
	Accumulator register X1.

#define	MMAU__X2 0xF0004008UL
	Accumulator register X2.

#define	MMAU__X3 0xF000400CUL
	Accumulator register X3.

#define	MMAU__A0 0xF0004010UL
	Accumulator register A0.

#define	MMAU__A1 0xF0004014UL
	Accumulator register A1.

#define	MMAU__A10 0xF0004010UL
	Accumulator register pair A10.

Unsigned integer instructions decorated load/store addresses
#define	MMAU__REGRW 0xF0004000UL
	Registers RW.

#define	MMAU__UMUL 0xF0004020UL
	A10=X2*X3.

#define	MMAU__UMULD 0xF0004040UL
	A10=X21*X3.

#define	MMAU__UMULDA 0xF0004060UL
	A10=A10*X3.

#define	MMAU__UMAC 0xF00040A0UL
	A10=X2*X3+A10.

#define	MMAU__UMACD 0xF00040C0UL
	A10=X21*X3+A10.

#define	MMAU__UMACDA 0xF00040E0UL
	A10=A10*X3+X21.

#define	MMAU__UDIV 0xF0004120UL
	X21/X3=A10.

#define	MMAU__UDIVD 0xF0004140UL
	A10=X2/X3.

#define	MMAU__UDIVDA 0xF0004160UL
	A10=X21/X3.

#define	MMAU__UDIVDD 0xF0004180UL
	A10=A10/X3.

#define	MMAU__UDIVDDA 0xF00041A0UL
	A10=A10/X32.

#define	MMAU__USQR 0xF0004220UL
	A10=SQR(X3)

#define	MMAU__USQRD 0xF0004240UL
	A10=SQR(X32)

#define	MMAU__USQRDA 0xF0004260UL
	A10=SQR(A10)

Signed fractional instructions decorated load/store addresses
#define	MMAU__QSQR 0xF00042A0UL
	A10=SQR(X3)

#define	MMAU__QSQRD 0xF00042C0UL
	A10=SQR(X32)

#define	MMAU__QSQRDA 0xF00042E0UL
	A10=SQR(A10)

#define	MMAU__QDIV 0xF0004320UL
	A10=X2/X3.

#define	MMAU__QDIVD 0xF0004340UL
	A10=X21/X3.

#define	MMAU__QDIVDA 0xF0004360UL
	A10=A10/X3.

#define	MMAU__QMUL 0xF0004420UL
	A10=X2*X3.

#define	MMAU__QMULD 0xF0004440UL
	A10=X21*X3.

#define	MMAU__QMULDA 0xF0004460UL
	A10=A10*X3.

#define	MMAU__QMAC 0xF00044A0UL
	A10=X2*X3+A10.

#define	MMAU__QMACD 0xF00044C0UL
	A10=X21*X3+A10.

#define	MMAU__QMACDA 0xF00044E0UL
	A10=A10*X3+X21.

Signed integer instructions decorated load/store addresses
#define	MMAU__SMUL 0xF0004620UL
	A10=X2*X3.

#define	MMAU__SMULD 0xF0004640UL
	A10=X21*X3.

#define	MMAU__SMULDA 0xF0004660UL
	A10=A10*X3.

#define	MMAU__SMAC 0xF00046A0UL
	A10=X2*X3+A10.

#define	MMAU__SMACD 0xF00046C0UL
	A10=X21*X3+A10.

#define	MMAU__SMACDA 0xF00046E0UL
	A10=A10*X3+X21.

#define	MMAU__SDIV 0xF0004720UL
	A10=X2/X3.

#define	MMAU__SDIVD 0xF0004740UL
	A10=X21/X3.

#define	MMAU__SDIVDA 0xF0004760UL
	A10=A10/X3.

#define	MMAU__SDIVDD 0xF0004780UL
	A10=X10/X32.

#define	MMAU__SDIVDDA 0xF00047A0UL
	A10=A10/X32.

Auxiliary decorated load/store addresses
#define	MMAU__SAT 0xF0004800UL
	Saturation.

Fractional Data Type
typedef short int	frac16_t
	Q0.15 fractional.

typedef long	frac24_t
	Q8.23 fractional.

typedef long	frac32_t
	Q0.31 fractional.

typedef long long	frac48_t
	Q16.47 fractional.

typedef long long	frac64_t
	Q0.63 fractional.

MMAU Configure
static void	MMAU_EnableDMA (MMAU_Type *base, bool enable)
	Enable DMA for MMAU module. More...

static void	MMAU_EnableSupervisorOnly (MMAU_Type *base, bool enable)
	Enable supervisor only for MMAU module. More...

void	MMAU_Reset (MMAU_Type *base)
	Set control/status register into reset state. More...

MMAU Interrupt
static void	MMAU_EnableInterrupts (MMAU_Type *base, uint32_t mask)
	Enable MMAU interrupts. More...

static void	MMAU_DisableInterrupts (MMAU_Type *base, uint32_t mask)
	Disable MMAU interrupts. More...

static uint32_t	MMAU_GetEnabledInterrupts (MMAU_Type *base)
	Gets enabled interrupts. More...

static uint32_t	MMAU_GetInterruptFlags (MMAU_Type *base)
	Get interrupt flags. More...

void	MMAU_ClearInterruptFlags (MMAU_Type *base, uint32_t mask)
	Clears interrupt flags. More...

MMAU Instruction flag
static uint32_t	MMAU_GetInstructionFlags (MMAU_Type *base)
	Gets the instruction flags. More...

void	MMAU_SetInstructionFlags (MMAU_Type *base, uint32_t mask)
	Sets the instruction flags. More...

void	MMAU_ClearInstructionFlags (MMAU_Type *base, uint32_t mask)
	Clears instruction flags. More...

Unsigned Integer Operands
static void	MMAU_ulda_d (register uint64_t dval)
	Load A10 accumulator register of the MMAU by 64-bit unsigned value. More...

static uint64_t	MMAU_d_umul_ll (register uint32_t lval1, register uint32_t lval2)
	Multiply two 32-bit unsigned values returning a 64-bit unsigned product. More...

static uint64_t	MMAU_d_umul_dl (register uint64_t dval, register uint32_t lval)
	Multiply 64-bit unsigned value with 32-bit unsigned value returning a 64-bit unsigned product. More...

static uint64_t	MMAU_d_umuls_dl (register uint64_t dval, register uint32_t lval)
	Saturating multiply 64-bit unsigned value with 32-bit unsigned value returning saturated 64-bit unsigned product. More...

static uint64_t	MMAU_d_umula_l (register uint32_t lval)
	Multiply 32-bit unsigned value with 64-bit unsigned value stored in the A10 register of the MMAU returning a 64-bit unsigned product. More...

static uint64_t	MMAU_d_umulas_l (register uint32_t lval)
	Saturating multiply 32-bit unsigned value with 64-bit unsigned value stored in the A10 register of the MMAU returning saturated 64-bit unsigned product. More...

static uint64_t	MMAU_d_umac_ll (register uint32_t lval1, register uint32_t lval2)
	Multiply two 32-bit unsigned values and add product with value stored in the A10 register of the MMAU returning a 64-bit unsigned A10 register value. More...

static uint64_t	MMAU_d_umacs_ll (register uint32_t lval1, register uint32_t lval2)
	Saturating multiply two 32-bit unsigned values and add product with value stored in the A10 register of the MMAU returning a 64-bit unsigned A10 register value. More...

static uint64_t	MMAU_d_umac_dl (register uint64_t dval, register uint32_t lval)
	Multiply 64-bit unsigned value with 32-bit unsigned value and add product with value stored in the A10 register of the MMAU returning a 64-bit unsigned A10 register value. More...

static uint64_t	MMAU_d_umacs_dl (register uint64_t dval, register uint32_t lval)
	Saturating multiply 64-bit unsigned value with 32-bit unsigned value and add product with value stored in the A10 register of the MMAU returning saturated 64-bit unsigned A10 register value. More...

static uint64_t	MMAU_d_umaca_dl (register uint64_t dval, register uint32_t lval)
	Multiply 32-bit unsigned value by value stored in the A10 register of the MMAU and add product with 64-bit unsigned value returning a 64-bit unsigned A10 register value. More...

static uint64_t	MMAU_d_umacas_dl (register uint64_t dval, register uint32_t lval)
	Saturating multiply 32-bit unsigned value by value stored in the A10 register of the MMAU and add product with 64-bit unsigned value returning a saturated 64-bit unsigned A10 register value. More...

static uint32_t	MMAU_l_udiv_ll (register uint32_t lnum, register uint32_t lden)
	Divide two 32-bit unsigned values returning a 32-bit unsigned quotient. More...

static uint64_t	MMAU_d_udiv_dl (register uint64_t dnum, register uint32_t lden)
	Divide 64-bit unsigned value by 32-bit unsigned value returning a 64-bit unsigned quotient. More...

static uint64_t	MMAU_d_udiv_dd (register uint64_t dnum, register uint64_t dden)
	Divide two 64-bit unsigned values returning a 64-bit unsigned quotient. More...

static uint64_t	MMAU_d_udiva_l (register uint32_t lden1)
	Divide 32-bit unsigned value stored in the A10 register of the MMAU by 32-bit unsigned value returning a 64-bit unsigned quotient. More...

static uint64_t	MMAU_d_udiva_d (register uint64_t dden1)
	Divide 64-bit unsigned value stored in the A10 register of the MMAU by 64-bit unsigned value returning a 64-bit unsigned quotient. More...

static uint32_t	MMAU_l_usqr_l (register uint32_t lrad)
	Compute and return a 32-bit unsigned square root of the 32-bit unsigned radicand. More...

static uint32_t	MMAU_l_usqr_d (register uint64_t drad)
	Compute and return a 32-bit unsigned square root of the 64-bit unsigned radicand. More...

static uint16_t	MMAU_s_usqr_l (register uint32_t lrad)
	Compute and return a 16-bit unsigned square root of the 32-bit unsigned radicand. More...

static uint32_t	MMAU_l_usqra (void)
	Compute and return a 32-bit unsigned square root of the radicand stored in the A10 register of the MMAU. More...

Signed Integer Operands
static void	MMAU_slda_d (register int64_t dval)
	Load A10 accumulator register of the MMAU by 64-bit integer value. More...

static int64_t	MMAU_d_smul_ll (register int32_t lval1, register int32_t lval2)
	Multiply two 32-bit integer values returning a 64-bit integer product. More...

static int64_t	MMAU_d_smul_dl (register int64_t dval, register int32_t lval)
	Multiply 64-bit integer value with 32-bit integer value returning a 64-bit integer product. More...

static int64_t	MMAU_d_smuls_dl (register int64_t dval, register int32_t lval)
	Saturating multiply 64-bit integer value with 32-bit integer value returning saturated 64-bit integer product. More...

static int64_t	MMAU_d_smula_l (register int32_t lval)
	Multiply 32-bit integer value with 64-bit integer value stored in the A10 register of the MMAU returning a 64-bit integer product. More...

static int64_t	MMAU_d_smulas_l (register int32_t lval)
	Saturating multiply 32-bit integer value with 64-bit integer value stored in the A10 register of the MMAU returning saturated 64-bit integer product. More...

static int64_t	MMAU_d_smac_ll (register int32_t lval1, register int32_t lval2)
	Multiply two 32-bit integer values and add product with value stored in the A10 register of the MMAU returning a 64-bit integer A10 register value. More...

static int64_t	MMAU_d_smacs_ll (register int32_t lval1, register int32_t lval2)
	Saturating multiply two 32-bit integer values and add product with value stored in the A10 register of the MMAU returning a 64-bit integer A10 register value. More...

static int64_t	MMAU_d_smac_dl (register int64_t dval, register int32_t lval)
	Multiply 64-bit integer value with 32-bit integer value and add product with value stored in the A10 register of the MMAU returning a 64-bit integer A10 register value. More...

static int64_t	MMAU_d_smacs_dl (register int64_t dval, register int32_t lval)
	Saturating multiply 64-bit integer value with 32-bit integer value and add product with value stored in the A10 register of the MMAU returning saturated 64-bit integer A10 register value. More...

static int64_t	MMAU_d_smaca_dl (register int64_t dval, register int32_t lval)
	Multiply 32-bit integer value by value stored in the A10 register of the MMAU and add product with 64-bit integer value returning a 64-bit integer A10 register value. More...

static int64_t	MMAU_d_smacas_dl (register int64_t dval, register int32_t lval)
	Saturating multiply 32-bit integer value by value stored in the A10 register of the MMAU and add product with 64-bit integer value returning a saturated 64-bit integer A10 register value. More...

static int32_t	MMAU_l_sdiv_ll (register int32_t lnum, register int32_t lden)
	Divide two 32-bit integer values returning a 32-bit integer quotient. More...

static int32_t	MMAU_l_sdivs_ll (register int32_t lnum, register int32_t lden)
	Divide two 32-bit integer values returning a 32-bit integer quotient. More...

static int64_t	MMAU_d_sdiv_dl (register int64_t dnum, register int32_t lden)
	Divide 64-bit integer value by 32-bit integer value returning a 64-bit integer quotient. More...

static int64_t	MMAU_d_sdivs_dl (register int64_t dnum, register int32_t lden)
	Divide 64-bit integer value by 32-bit integer value returning a 64-bit integer quotient. More...

static int64_t	MMAU_d_sdiv_dd (register int64_t dnum, register int64_t dden)
	Divide two 64-bit integer values returning a 64-bit integer quotient. More...

static int64_t	MMAU_d_sdivs_dd (register int64_t dnum, register int64_t dden)
	Divide two 64-bit integer values returning a 64-bit integer quotient. More...

static int64_t	MMAU_d_sdiva_l (register int32_t lden1)
	Divide 32-bit integer value stored in the A10 register of the MMAU by 32-bit integer value returning a 64-bit integer quotient. More...

static int64_t	MMAU_d_sdivas_l (register int32_t lden1)
	Divide 32-bit integer value stored in the A10 register of the MMAU by 32-bit integer value returning saturated 64-bit integer quotient. More...

static int64_t	MMAU_d_sdiva_d (register int64_t dden1)
	Divide 64-bit integer value stored in the A10 register of the MMAU by 64-bit integer value returning a 64-bit integer quotient. More...

static int64_t	MMAU_d_sdivas_d (register int64_t dden1)
	Divide 64-bit integer value stored in the A10 register of the MMAU by 64-bit integer value returning saturated 64-bit integer quotient. More...

Fractional Operands
static void	MMAU_lda_d (register frac64_t dval)
	Load A10 accumulator register of the MMAU by 64-bit fractional value. More...

static frac32_t	MMAU_l_mul_ll (register frac32_t lval1, register frac32_t lval2)
	Multiply two 32-bit fractional values returning a 32-bit fractional product. More...

static frac32_t	MMAU_l_muls_ll (register frac32_t lval1, register frac32_t lval2)
	Saturating multiply two 32-bit fractional values returning saturated 32-bit fractional product. More...

static frac64_t	MMAU_d_mul_ll (register frac32_t lval1, register frac32_t lval2)
	Multiply two 32-bit fractional values returning a 64-bit fractional product. More...

static frac64_t	MMAU_d_muls_ll (register frac32_t lval1, register frac32_t lval2)
	Saturating multiply two 32-bit fractional values returning saturated 64-bit fractional product. More...

static frac64_t	MMAU_d_mul_dl (register frac64_t dval, register frac32_t lval)
	Multiply 64-bit fractional value with 32-bit fractional value returning a 64-bit fractional product. More...

static frac64_t	MMAU_d_muls_dl (register frac64_t dval, register frac32_t lval)
	Saturating multiply 64-bit fractional value with 32-bit fractional value returning saturated 64-bit fractional product. More...

static frac64_t	MMAU_d_mula_l (register frac32_t lval)
	Multiply 32-bit fractional value with 64-bit fractional value stored in the A10 register of the MMAU returning a 64-bit fractional product. More...

static frac64_t	MMAU_d_mulas_l (register frac32_t lval)
	Saturating multiply 32-bit fractional value with 64-bit fractional value stored in the A10 register of the MMAU returning saturated 64-bit fractional product. More...

static frac32_t	MMAU_l_mul_dl (register frac64_t dval, register frac32_t lval)
	Multiply 64-bit fractional value with 32-bit fractional value returning a 32-bit fractional product. More...

static frac32_t	MMAU_l_muls_dl (register frac64_t dval, register frac32_t lval)
	Saturating multiply 64-bit fractional value with 32-bit fractional value returning saturated 32-bit fractional product. More...

static frac32_t	MMAU_l_mula_l (register frac32_t lval)
	Multiply 32-bit fractional value with 64-bit fractional value stored in the A10 register of the MMAU returning a 32-bit fractional product. More...

static frac32_t	MMAU_l_mulas_l (register frac32_t lval)
	Saturating multiply 32-bit fractional value with 64-bit fractional value stored in the A10 register of the MMAU returning saturated 32-bit fractional product. More...

static frac64_t	MMAU_d_mac_ll (register frac32_t lval1, register frac32_t lval2)
	Multiply two 32-bit fractional values and add product with value stored in the A10 register of the MMAU returning a 64-bit fractional A10 register value. More...

static frac64_t	MMAU_d_macs_ll (register frac32_t lval1, register frac32_t lval2)
	Saturating multiply two 32-bit fractional values and add product with value stored in the A10 register of the MMAU returning a 64-bit fractional A10 register value. More...

static frac64_t	MMAU_d_mac_dl (register frac64_t dval, register frac32_t lval)
	Multiply 64-bit fractional value with 32-bit fractional value and add product with value stored in the A10 register of the MMAU returning a 64-bit fractional A10 register value. More...

static frac64_t	MMAU_d_macs_dl (register frac64_t dval, register frac32_t lval)
	Saturating multiply 64-bit fractional value with 32-bit fractional value and add product with value stored in the A10 register of the MMAU returning saturated 64-bit fractional A10 register value. More...

static frac64_t	MMAU_d_maca_dl (register frac64_t dval, register frac32_t lval)
	Multiply 32-bit fractional value by value stored in the A10 register of the MMAU and add product with 64-bit fractional value returning a 64-bit fractional A10 register value. More...

static frac64_t	MMAU_d_macas_dl (register frac64_t dval, register frac32_t lval)
	Saturating multiply 32-bit fractional value by value stored in the A10 register of the MMAU and add product with 64-bit fractional value returning a saturated 64-bit fractional A10 register value. More...

static frac32_t	MMAU_l_mac_ll (register frac32_t lval1, register frac32_t lval2)
	Multiply two 32-bit fractional values and add product with value stored in the A10 register of the MMAU returning a 32-bit fractional A10 register value. More...

static frac32_t	MMAU_l_macs_ll (register frac32_t lval1, register frac32_t lval2)
	Saturating multiply two 32-bit fractional values and add product with value stored in the A10 register of the MMAU returning a 32-bit fractional A10 register value. More...

static frac32_t	MMAU_l_mac_dl (register frac64_t dval, register frac32_t lval)
	Multiply 64-bit fractional value with 32-bit fractional value and add product with value stored in the A10 register of the MMAU returning a 32-bit fractional A10 register value. More...

static frac32_t	MMAU_l_macs_dl (register frac64_t dval, register frac32_t lval)
	Saturating multiply 64-bit fractional value with 32-bit fractional value and add product with value stored in the A10 register of the MMAU returning saturated 32-bit fractional A10 register value. More...

static frac32_t	MMAU_l_maca_dl (register frac64_t dval, register frac32_t lval)
	Multiply 32-bit fractional value by value stored in the A10 register of the MMAU and add product with 64-bit fractional value returning a 32-bit fractional A10 register value. More...

static frac32_t	MMAU_l_macas_dl (register frac64_t dval, register frac32_t lval)
	Saturating multiply 32-bit fractional value by value stored in the A10 register of the MMAU and add product with 64-bit fractional value returning a saturated 32-bit fractional A10 register value. More...

static frac32_t	MMAU_l_div_ll (register frac32_t lnum, register frac32_t lden)
	Divide two 32-bit fractional values returning a 32-bit fractional quotient. More...

static frac32_t	MMAU_l_divs_ll (register frac32_t lnum, register frac32_t lden)
	Divide two 32-bit fractional values returning a 32-bit fractional quotient. More...

static frac32_t	MMAU_l_divas_l (register frac32_t lden)
	Divide 64-bit fractional value stored in the A10 register of the MMAU by 32-bit fractional value returning saturated 32-bit fractional quotient. More...

static frac64_t	MMAU_d_div_dl (register frac64_t dnum, register frac32_t lden)
	Divide 64-bit fractional value by 32-bit fractional value returning a 64-bit fractional quotient. More...

static frac64_t	MMAU_d_divs_dl (register frac64_t dnum, register frac32_t lden)
	Divide 64-bit fractional value by 32-bit fractional value returning a 64-bit fractional quotient. More...

static frac64_t	MMAU_d_diva_l (register frac32_t lden1)
	Divide 32-bit fractional value stored in the A10 register of the MMAU by 32-bit fractional value returning a 64-bit fractional quotient. More...

static frac64_t	MMAU_d_divas_l (register frac32_t lden1)
	Divide 32-bit fractional value stored in the A10 register of the MMAU by 32-bit fractional value returning saturated 64-bit fractional quotient. More...

static frac32_t	MMAU_l_diva_l (register frac32_t lden)
	Divide 64-bit fractional value stored in the A10 register of the MMAU by 32-bit fractional value returning a 32-bit fractional quotient. More...

static frac32_t	MMAU_l_sqr_l (register frac32_t lrad)
	Compute and return a 32-bit fractional square root of the 32-bit fractional radicand. More...

static frac32_t	MMAU_l_sqr_d (register frac64_t drad)
	Compute and return a 32-bit fractional square root of the 64-bit fractional radicand. More...

static frac32_t	MMAU_l_sqra (void)
	Compute and return a 32-bit fractional square root of the radicand stored in the A10 register of the MMAU. More...

Enumeration Type Documentation

enum mmau_interrupt_enable_t

This structure contains the settings for all of the MMAU interrupt configurations.

Enumerator
kMMAU_AccumOverflowInterruptEnable	Accumulation Overflow Enable.
kMMAU_OverflowInterruptEnable	Multiply or Divide overflow Enable.
kMMAU_DivideByZeroInterruptEnable	Divide by Zero Enable.

enum mmau_interrupt_flag_t

Enumerator
kMMAU_AccumOverflowInterruptFlag	Accumulation Overflow Interrupt Flag.
kMMAU_OverflowInterruptFlag	Multiply or Divide overflow Interrupt Flag.
kMMAU_DivideByZeroInterruptFlag	Divide by Zero Interrupt Flag.

enum mmau_instruction_flag_t

Enumerator
kMMAU_AccumOverflowInstructionFlag	Accumulation Overflow.
kMMAU_OverflowInstructionFlag	Multiply or Divide overflow.
kMMAU_DivideByZeroInstructionFlag	Divide by Zero.
kMMAU_NegativeInstructionFlag	Signed calculation result is negative.

Function Documentation

static void MMAU_EnableDMA	(	MMAU_Type *	base,
		bool	enable
	)

inlinestatic

Parameters

base	MMAU peripheral address.
enable	Mode of DMA access true Enable DMA access false Disable DMA access

static void MMAU_EnableSupervisorOnly	(	MMAU_Type *	base,
		bool	enable
	)

inlinestatic

Parameters

base	MMAU peripheral address.
enable	Mode of MMAU module can be access true MMAU registers can only be access in Supervisor Mode. false MMAU registers can be access in both User Mode or Supervisor Mode.

void MMAU_Reset ( MMAU_Type * base )

This function sets control/status register to a known state. This state is defined in Reference Manual, which is power on reset value. This function must execute in a Supervisor Mode

Parameters

base	MMAU peripheral address.

static void MMAU_EnableInterrupts	(	MMAU_Type *	base,
		uint32_t	mask
	)

inlinestatic

This function enables the interrupts related to the mask. Example:

MMAU_EnableInterrupts(MMAU, kMMAU_AccumOverflowInterruptEnable | kMMAU_DivideByZeroInterruptEnable);

Parameters

base	MMAU peripheral address.
mask	Mask of the interrupt enable to be written (kMMAU_AccumOverflowInterruptEnable\|kMMAU_OverflowInterruptEnable\|kMMAU_DivideByZeroInterruptEnable).

static void MMAU_DisableInterrupts	(	MMAU_Type *	base,
		uint32_t	mask
	)

inlinestatic

This function disables the interrupt related to the mask. Example:

MMAU_DisableInterrupts(MMAU, kMMAU_AccumOverflowInterruptEnable | kMMAU_DivideByZeroInterruptEnable);

Parameters

base	MMAU peripheral address.
mask	Mask of the interrupt enable to be written (kMMAU_AccumOverflowInterruptEnable\|kMMAU_OverflowInterruptEnable\|kMMAU_DivideByZeroInterruptEnable).

static uint32_t MMAU_GetEnabledInterrupts ( MMAU_Type * base )

inlinestatic

This function gets all interrupt values. Example:

uint32_t flags = 0;
...
flags = MMAU_GetEnabledInterrupts(MMAU);
if (flags & kMMAU_AccumOverflowInterruptEnable)
{
...
}

Parameters

base	MMAU peripheral address.

Returns: Combination of enabled interrupt

static uint32_t MMAU_GetInterruptFlags ( MMAU_Type * base )

inlinestatic

This function gets interrupt flags.

Parameters

base	MMAU peripheral address.

Returns: the mask of these interrupt flag bits.

void MMAU_ClearInterruptFlags	(	MMAU_Type *	base,
		uint32_t	mask
	)

This function clears the interrupt flags. Example, if you want to clear Overflow and DivideByZero interrupt flags:

MMAU_ClearInterruptFlags(MMAU, kMMAU_OverflowInterruptFlag|kMMAU_DivideByZeroInterruptFlag);

Parameters

base	MMAU peripheral address.
mask	Mask of the asserted interrupt flags (kMMAU_AccumOverflowInterruptFlag\|kMMAU_OverflowInterruptFlag\|kMMAU_DivideByZeroInterruptFlag).

static uint32_t MMAU_GetInstructionFlags ( MMAU_Type * base )

inlinestatic

This function gets the instruction flag. Instruction flags are updated by the MMAU after computation of each instruction. Example:

uint32_t flags;
...
flags = MMAU_GetInstructionFlags(MMAU);
if (flags & kMMAU_OverflowInstructionFlag)
{
 ...
}

Parameters

base	MMAU peripheral address.

Returns: Combination of all instruction flags.

void MMAU_SetInstructionFlags	(	MMAU_Type *	base,
		uint32_t	mask
	)

This function sets the instruction flags. Example:

MMAU_SetInstructionFlags(MMAU, kMMAU_AccumOverflowInstructionFlag | kMMAU_NegativeInstructionFlag);

MMAU_SetInstructionFlags(MMAU, kMMAU_OverflowInstructionFlag | kMMAU_DivideByZeroInstructionFlag);

Parameters

base	MMAU peripheral address.
mask	Mask of the instruction flags to be written

(kMMAU_AccumOverflowInstructionFlag|kMMAU_OverflowInstructionFlag|kMMAU_DivideByZeroInstructionFlag|kMMAU_NegativeInstructionFlag).

void MMAU_ClearInstructionFlags	(	MMAU_Type *	base,
		uint32_t	mask
	)

This function clears the instruction flags. Example, if you want to clear Overflow and DivideByZero instruction flags:

MMAU_ClearInstructionFlags(MMAU, kMMAU_OverflowInstructionFlag|kMMAU_DivideByZeroInstructionFlag);

Parameters

base	MMAU peripheral address.
mask	Mask of the asserted instruction flags

(kMMAU_AccumOverflowInstructionFlag|kMMAU_OverflowInstructionFlag|kMMAU_DivideByZeroInstructionFlag|kMMAU_NegativeInstructionFlag).

static uint32_t MMAU_GetHwRevCmd ( MMAU_Type * base )

inlinestatic

This function gets the hardware revision level of the MMAU. It returns HDR field of the control/status register.

Parameters

base	MMAU peripheral address.

Returns: uint32_t hardware revision level.

static void MMAU_ulda_d ( register uint64_t dval )

inlinestatic

The ulda_d function loads A10 accumulator register of the MMAU by 64-bit unsigned value.

Parameters

dval	uint64_t unsigned load value.

static uint64_t MMAU_d_umul_ll	(	register uint32_t	lval1,
		register uint32_t	lval2
	)

inlinestatic

The MMAU_d_umul_ll function multiplies two 32-bit unsigned values returning a 64-bit unsigned product.

Parameters

lval1	uint32_t unsigned value.
lval2	uint32_t unsigned value.

Returns: uint64_t unsigned value after multiply.

Note: Product is stored in A10 register of the MMAU for next computation.

static uint64_t MMAU_d_umul_dl	(	register uint64_t	dval,
		register uint32_t	lval
	)

inlinestatic

The MMAU_d_umul_dl function multiplies 64-bit unsigned value with 32-bit unsigned value returning a 64-bit unsigned product.

Parameters

dval	uint64_t unsigned value.
lval	uint32_t unsigned value.

Returns: uint64_t unsigned value after multiply.

Note: Product is stored in A10 register of the MMAU for next computation.

static uint64_t MMAU_d_umuls_dl	(	register uint64_t	dval,
		register uint32_t	lval
	)

inlinestatic

The MMAU_d_umuls_dl function multiplies 64-bit unsigned value with 32-bit unsigned value returning saturated 64-bit unsigned product.

Parameters

dval	uint64_t unsigned value.
lval	uint32_t unsigned value.

Returns: uint64_t unsigned value after multiply.

Note: Saturated product is stored in A10 register of the MMAU for next computation.

static uint64_t MMAU_d_umula_l ( register uint32_t lval )

inlinestatic

The MMAU_d_umula_l function multiplies 32-bit unsigned value with 64-bit unsigned value stored in the A10 register of the MMAU returning a 64-bit unsigned product.

Parameters

lval	uint32_t unsigned value.

Returns: uint64_t unsigned value after multiply.

Note: Product is stored in A10 register of the MMAU for next computation.

static uint64_t MMAU_d_umulas_l ( register uint32_t lval )

inlinestatic

The MMAU_d_umulas_l function multiplies 32-bit unsigned value with 64-bit unsigned value stored in the A10 register of the MMAU returning saturated 64-bit unsigned product.

Parameters

lval	uint32_t unsigned value.

Returns: uint64_t unsigned value after multiply.

Note: Saturated product is stored in A10 register of the MMAU for next computation.

static uint64_t MMAU_d_umac_ll	(	register uint32_t	lval1,
		register uint32_t	lval2
	)

inlinestatic

The MMAU_d_umac_ll function multiplies two 32-bit unsigned values and add product with value stored in the A10 register of the MMAU returning a 64-bit unsigned A10 register value.

Parameters

lval1	uint32_t unsigned value.
lval2	uint32_t unsigned value.

Returns: uint64_t unsigned value after multiply.

Note: Product is stored in A10 register of the MMAU for next computation.

static uint64_t MMAU_d_umacs_ll	(	register uint32_t	lval1,
		register uint32_t	lval2
	)

inlinestatic

The MMAU_d_umacs_ll function multiplies two 32-bit unsigned values and add product with value stored in the A10 register of the MMAU returning saturated 64-bit unsigned A10 register value.

Parameters

lval1	uint32_t unsigned value.
lval2	uint32_t unsigned value.

Returns: uint64_t unsigned value after multiply.

Note: Saturated product is stored in A10 register of the MMAU for next computation.

static uint64_t MMAU_d_umac_dl	(	register uint64_t	dval,
		register uint32_t	lval
	)

inlinestatic

The MMAU_d_umac_dl function multiplies 64-bit unsigned value with 32-bit unsigned value and add product with value stored in the A10 register of the MMAU returning a 64-bit unsigned A10 register value.

Parameters

dval	uint64_t unsigned value.
lval	uint32_t unsigned value.

Returns: uint64_t unsigned value after multiply.

Note: Product is stored in A10 register of the MMAU for next computation.

static uint64_t MMAU_d_umacs_dl	(	register uint64_t	dval,
		register uint32_t	lval
	)

inlinestatic

The MMAU_d_umacs_dl function multiplies 64-bit unsigned value with 32-bit unsigned value and add product with value stored in the A10 register of the MMAU returning saturated 64-bit unsigned A10 register value.

Parameters

dval	uint64_t unsigned value.
lval	uint32_t unsigned value.

Returns: uint64_t unsigned value after multiply.

Note: Saturated product is stored in A10 register of the MMAU for next computation.

static uint64_t MMAU_d_umaca_dl	(	register uint64_t	dval,
		register uint32_t	lval
	)

inlinestatic

The MMAU_d_umaca_dl function multiplies 32-bit unsigned value by value stored in the A10 register of the MMAU and add product with 64-bit unsigned value returning a 64-bit unsigned A10 register value.

Parameters

dval	uint64_t unsigned value.
lval	uint32_t unsigned value.

Returns: uint64_t unsigned value after multiply.

Note: Product is stored in A10 register of the MMAU for next computation.

static uint64_t MMAU_d_umacas_dl	(	register uint64_t	dval,
		register uint32_t	lval
	)

inlinestatic

The MMAU_d_umacas_dl function multiplies 32-bit unsigned value by value stored in the A10 register of the MMAU and add product with 64-bit unsigned value returning saturated 64-bit unsigned A10 register value.

Parameters

dval	uint64_t unsigned value.
lval	uint32_t unsigned value.

Returns: uint64_t unsigned value after multiply.

Note: Saturated product is stored in A10 register of the MMAU for next computation.

static uint32_t MMAU_l_udiv_ll	(	register uint32_t	lnum,
		register uint32_t	lden
	)

inlinestatic

The MMAU_l_udiv_ll function divides two 32-bit unsigned values returning a 32-bit unsigned quotient.

Parameters

lnum	uint32_t unsigned divisor value.
lden	uint32_t unsigned dividend value.

Returns: uint32_t unsigned quotient value.

Note: Quotient is stored in A0 register of the MMAU for next computation.

static uint64_t MMAU_d_udiv_dl	(	register uint64_t	dnum,
		register uint32_t	lden
	)

inlinestatic

The MMAU_d_udiv_dl function divides 64-bit unsigned value by 32-bit unsigned value returning a 64-bit unsigned quotient.

Parameters

dnum	uint64_t unsigned divisor value.
lden	uint32_t unsigned dividend value.

Returns: uint64_t unsigned quotient value.

Note: Quotient is stored in A10 register of the MMAU for next computation.

static uint64_t MMAU_d_udiv_dd	(	register uint64_t	dnum,
		register uint64_t	dden
	)

inlinestatic

The MMAU_d_udiv_dd function divides two 64-bit unsigned values returning a 64-bit unsigned quotient.

Parameters

dnum	uint64_t unsigned divisor value.
dden	uint64_t unsigned dividend value.

Returns: uint64_t unsigned quotient value.

Note: Quotient is stored in A10 register of the MMAU for next computation.

static uint64_t MMAU_d_udiva_l ( register uint32_t lden1 )

inlinestatic

The MMAU_d_udiva_l function divides 64-bit unsigned value stored in the A10 register of the MMAU by 32-bit unsigned value returning a 64-bit unsigned quotient.

Parameters

lden1 uint32_t unsigned dividend value.

Returns: uint64_t unsigned quotient value.

Note: Quotient is stored in A10 register of the MMAU for next computation.

static uint64_t MMAU_d_udiva_d ( register uint64_t dden1 )

inlinestatic

The MMAU_d_udiva_d function divides 64-bit unsigned value stored in the A10 register of the MMAU by 64-bit unsigned value returning a 64-bit unsigned quotient.

Parameters

dden1 uint64_t unsigned dividend value.

Returns: uint64_t unsigned quotient value.

Note: Quotient is stored in A10 register of the MMAU for next computation.

static uint32_t MMAU_l_usqr_l ( register uint32_t lrad )

inlinestatic

The MMAU_l_usqr_l function computes and returns a 32-bit unsigned square root of the 32-bit unsigned radicand.

Parameters

lrad	uint32_t unsigned radicand.

Returns: uint32_t unsigned square root.

Note: Quotient is stored in A0 register of the MMAU for next computation.

static uint32_t MMAU_l_usqr_d ( register uint64_t drad )

inlinestatic

The MMAU_l_usqr_d function computes and returns a 32-bit unsigned square root of the 64-bit unsigned radicand.

Parameters

drad	uint64_t unsigned radicand.

Returns: uint32_t unsigned square root.

Note: Quotient is stored in A0 register of the MMAU for next computation.

static uint16_t MMAU_s_usqr_l ( register uint32_t lrad )

inlinestatic

The MMAU_s_usqr_l function computes and returns a 16-bit unsigned square root of the 32-bit unsigned radicand.

Parameters

lrad	uint32 unsigned radicand.

Returns: uint16 unsigned square root.

Note: Square root is stored in A0 register of the MMAU for next computation.

static uint32_t MMAU_l_usqra ( void )

inlinestatic

The MMAU_l_usqra function computes and returns a 32-bit unsigned square root of the radicand stored in the A10 register of the MMAU.

Returns: uint32_t unsigned square root.

Note: Quotient is stored in A0 register of the MMAU for next computation.

static void MMAU_slda_d ( register int64_t dval )

inlinestatic

The MMAU_slda_d function loads A10 accumulator register of the MMAU by 64-bit integer value.

Parameters

dval	int64_t integer value.

static int64_t MMAU_d_smul_ll	(	register int32_t	lval1,
		register int32_t	lval2
	)

inlinestatic

The MMAU_d_smul_ll function multiplies two 32-bit integer values returning a 64-bit integer product.

Parameters

lval1	int32_t integer value.
lval2	int32_t integer value.

Returns: int64_t integer value after multiply.

Note: Product is stored in A10 register of the MMAU for next computation.

static int64_t MMAU_d_smul_dl	(	register int64_t	dval,
		register int32_t	lval
	)

inlinestatic

The MMAU_d_smul_dl function multiplies 64-bit integer value with 32-bit integer value returning a 64-bit integer product.

Parameters

dval	int64_t integer value.
lval	int32_t integer value.

Returns: int64_t integer value after multiply.

Note: Product is stored in A10 register of the MMAU for next computation.

static int64_t MMAU_d_smuls_dl	(	register int64_t	dval,
		register int32_t	lval
	)

inlinestatic

The MMAU_d_smuls_dl function multiplies 64-bit integer value with 32-bit integer value returning saturated 64-bit integer product.

Parameters

dval	int64_t integer value.
lval	int32_t integer value.

Returns: int64_t integer value after multiply.

Note: Saturated product is stored in A10 register of the MMAU for next computation.

static int64_t MMAU_d_smula_l ( register int32_t lval )

inlinestatic

The MMAU_d_smula_l function multiplies 32-bit integer value with 64-bit integer value stored in the A10 register of the MMAU returning a 64-bit integer product.

Parameters

lval	int32_t integer value.

Returns: int64_t integer value after multiply.

Note: Product is stored in A10 register of the MMAU for next computation.

static int64_t MMAU_d_smulas_l ( register int32_t lval )

inlinestatic

The MMAU_d_smulas_l function multiplies 32-bit integer value with 64-bit integer value stored in the A10 register of the MMAU returning saturated 64-bit integer product.

Parameters

lval	int32_t integer value.

Returns: int64_t integer value after multiply.

Note: Saturated product is stored in A10 register of the MMAU for next computation.

static int64_t MMAU_d_smac_ll	(	register int32_t	lval1,
		register int32_t	lval2
	)

inlinestatic

The MMAU_d_smac_ll function multiplies two 32-bit integer values and add product with value stored in the A10 register of the MMAU returning a 64-bit integer A10 register value.

Parameters

lval1	int32_t integer value.
lval2	int32_t integer value.

Returns: int64_t integer value after multiply.

Note: Product is stored in A10 register of the MMAU for next computation.

static int64_t MMAU_d_smacs_ll	(	register int32_t	lval1,
		register int32_t	lval2
	)

inlinestatic

The MMAU_d_smacs_ll function multiplies two 32-bit integer values and add product with value stored in the A10 register of the MMAU returning saturated 64-bit integer A10 register value.

Parameters

lval1	int32_t integer value.
lval2	int32_t integer value.

Returns: int64_t integer value after multiply.

Note: Saturated product is stored in A10 register of the MMAU for next computation.

static int64_t MMAU_d_smac_dl	(	register int64_t	dval,
		register int32_t	lval
	)

inlinestatic

The MMAU_d_smac_dl function multiplies 64-bit integer value with 32-bit integer value and add product with value stored in the A10 register of the MMAU returning a 64-bit integer A10 register value.

Parameters

dval	int64_t integer value.
lval	int32_t integer value.

Returns: int64_t integer value after multiply.

Note: Product is stored in A10 register of the MMAU for next computation.

static int64_t MMAU_d_smacs_dl	(	register int64_t	dval,
		register int32_t	lval
	)

inlinestatic

The MMAU_d_smacs_dl function multiplies 64-bit integer value with 32-bit integer value and add product with value stored in the A10 register of the MMAU returning saturated 64-bit integer A10 register value.

Parameters

dval	int64_t integer value.
lval	int32_t integer value.

Returns: int64_t integer value after multiply.

Note: Saturated product is stored in A10 register of the MMAU for next computation. If saturation occurs, the instruction sets the accumulation overflow (Q) and multiply or divide overflow (V) flags to 1 in the CSR. Otherwise, it clears the Q and V flags.

static int64_t MMAU_d_smaca_dl	(	register int64_t	dval,
		register int32_t	lval
	)

inlinestatic

The MMAU_d_smaca_dl function multiplies 32-bit integer value by value stored in the A10 register of the MMAU and add product with 64-bit integer value returning a 64-bit integer A10 register value.

Parameters

dval	int64_t integer value.
lval	int32_t integer value.

Returns: int64_t integer value after multiply.

Note: Product is stored in A10 register of the MMAU for next computation.

static int64_t MMAU_d_smacas_dl	(	register int64_t	dval,
		register int32_t	lval
	)

inlinestatic

The MMAU_d_smacas_dl function multiplies 32-bit integer value by value stored in the A10 register of the MMAU and add product with 64-bit integer value returning saturated 64-bit integer A10 register value.

Parameters

dval	int64_t integer value.
lval	int32_t integer value.

Returns: int64_t integer value after multiply.

Note: Saturated product is stored in A10 register of the MMAU for next computation. If saturation occurs, the instruction sets the accumulation overflow (Q) and multiply or divide overflow (V) flags to 1 in the CSR. Otherwise, it clears the Q and V flags.

static int32_t MMAU_l_sdiv_ll	(	register int32_t	lnum,
		register int32_t	lden
	)

inlinestatic

The MMAU_l_sdiv_ll function divides two 32-bit integer values returning a 32-bit integer quotient.

Parameters

lnum	int32_t integer divisor value.
lden	int32_t integer dividend value.

Returns: int32_t integer quotient value.

Note: Quotient is stored in A0 register of the MMAU for next computation.

static int32_t MMAU_l_sdivs_ll	(	register int32_t	lnum,
		register int32_t	lden
	)

inlinestatic

The MMAU_l_sdivs_ll function divides two 32-bit integer values returning a 32-bit integer quotient.

Parameters

lnum	int32_t integer divisor value.
lden	int32_t integer dividend value.

Returns: int32_t integer quotient value.

Note: Saturated quotient is stored in A0 register of the MMAU for next computation.

static int64_t MMAU_d_sdiv_dl	(	register int64_t	dnum,
		register int32_t	lden
	)

inlinestatic

The MMAU_d_sdiv_dl function divides 64-bit integer value by 32-bit integer value returning a 64-bit integer quotient.

Parameters

dnum	int64_t integer divisor value.
lden	int32_t integer dividend value.

Returns: int64_t integer quotient value.

Note: Quotient is stored in A10 register of the MMAU for next computation.

static int64_t MMAU_d_sdivs_dl	(	register int64_t	dnum,
		register int32_t	lden
	)

inlinestatic

The MMAU_d_sdivs_dl function divides 64-bit integer value by 32-bit integer value returning a 64-bit integer quotient.

Parameters

dnum	int64_t integer divisor value.
lden	int32_t integer dividend value.

Returns: int64_t integer quotient value.

Note: Saturated quotient is stored in A10 register of the MMAU for next computation.

static int64_t MMAU_d_sdiv_dd	(	register int64_t	dnum,
		register int64_t	dden
	)

inlinestatic

The MMAU_d_sdiv_dd function divides two 64-bit integer values returning a 64-bit integer quotient.

Parameters

dnum	int64_t integer divisor value.
dden	int64_t integer dividend value.

Returns: int64_t integer quotient value.

Note: Quotient is stored in A10 register of the MMAU for next computation.

static int64_t MMAU_d_sdivs_dd	(	register int64_t	dnum,
		register int64_t	dden
	)

inlinestatic

The MMAU_d_sdivs_dd function divides two 64-bit integer values returning a 64-bit integer quotient.

Parameters

dnum	int64_t integer divisor value.
dden	int64_t integer dividend value.

Returns: int64_t integer quotient value.

Note: Saturated quotient is stored in A10 register of the MMAU for next computation.

static int64_t MMAU_d_sdiva_l ( register int32_t lden1 )

inlinestatic

The MMAU_d_sdiva_l function divides 32-bit integer value stored in the A10 register of the MMAU by 32-bit integer value returning a 64-bit integer quotient.

Parameters

lden1 int32_t integer dividend value.

Returns: int64_t integer quotient value.

Note: Quotient is stored in A10 register of the MMAU for next computation.

static int64_t MMAU_d_sdivas_l ( register int32_t lden1 )

inlinestatic

The MMAU_d_sdivas_l function divides 32-bit integer value stored in the A10 register of the MMAU by 32-bit integer value returning a saturated 64-bit integer quotient.

Parameters

lden1 int32_t integer dividend value.

Returns: int64_t integer quotient value.

Note: Saturated quotient is stored in A10 register of the MMAU for next computation.

static int64_t MMAU_d_sdiva_d ( register int64_t dden1 )

inlinestatic

The MMAU_d_sdiva_d function divides 64-bit integer value stored in the A10 register of the MMAU by 64-bit integer value returning a 64-bit integer quotient.

Parameters

dden1 int64_t integer dividend value.

Returns: int64_t integer quotient value.

Note: Quotient is stored in A10 register of the MMAU for next computation.

static int64_t MMAU_d_sdivas_d ( register int64_t dden1 )

inlinestatic

The MMAU_d_sdivas_d function divides 64-bit integer value stored in the A10 register of the MMAU by 64-bit integer value returning a saturated 64-bit integer quotient.

Parameters

dden1 int64_t integer dividend value.

Returns: int64_t integer quotient value.

Note: Saturated quotient is stored in A10 register of the MMAU for next computation.

static void MMAU_lda_d ( register frac64_t dval )

inlinestatic

The MMAU_lda_d function loads A10 accumulator register of the MMAU by 64-bit fractional value.

Parameters

dval	frac64_t fractional value.

static frac32_t MMAU_l_mul_ll	(	register frac32_t	lval1,
		register frac32_t	lval2
	)

inlinestatic

The MMAU_l_mul_ll function multiplies two 32-bit fractional values returning a 32-bit fractional product.

Parameters

lval1	frac32_t fractional value.
lval2	frac32_t fractional value.

Returns: frac32_t fractional value after multiply.

Note: Product is stored in A10 register of the MMAU for next computation.

static frac32_t MMAU_l_muls_ll	(	register frac32_t	lval1,
		register frac32_t	lval2
	)

inlinestatic

The MMAU_l_muls_ll function multiplies two 32-bit fractional values returning saturated 32-bit fractional product.

Parameters

lval1	frac32_t fractional value.
lval2	frac32_t fractional value.

Returns: frac32_t fractional value after multiply.

Note: Saturated product is stored in A10 register of the MMAU for next computation.

static frac64_t MMAU_d_mul_ll	(	register frac32_t	lval1,
		register frac32_t	lval2
	)

inlinestatic

The MMAU_d_mul_ll function multiplies two 32-bit fractional values returning a 64-bit fractional product.

Parameters

lval1	frac32_t fractional value.
lval2	frac32_t fractional value.

Returns: frac64_t fractional value after multiply.

Note: Product is stored in A10 register of the MMAU for next computation.

static frac64_t MMAU_d_muls_ll	(	register frac32_t	lval1,
		register frac32_t	lval2
	)

inlinestatic

The MMAU_d_muls_ll function multiplies two 32-bit fractional values returning saturated 64-bit fractional product.

Parameters

lval1	frac32_t fractional value.
lval2	frac32_t fractional value.

Returns: frac64_t fractional value after multiply.

Note: Saturated product is stored in A10 register of the MMAU for next computation. If saturation occurs, the instruction sets the accumulation overflow (Q) and multiply or divide overflow (V) flags to 1 in the CSR. Otherwise, it clears the Q and V flags.

static frac64_t MMAU_d_mul_dl	(	register frac64_t	dval,
		register frac32_t	lval
	)

inlinestatic

The MMAU_d_mul_dl function multiplies 64-bit fractional value with 32-bit fractional value returning a 64-bit fractional product.

Parameters

dval	frac64_t fractional value.
lval	frac32_t fractional value.

Returns: frac64_t fractional value after multiply.

Note: Product is stored in A10 register of the MMAU for next computation.

static frac64_t MMAU_d_muls_dl	(	register frac64_t	dval,
		register frac32_t	lval
	)

inlinestatic

The MMAU_d_muls_dl function multiplies 64-bit fractional value with 32-bit fractional value returning saturated 64-bit fractional product.

Parameters

dval	frac64_t fractional value.
lval	frac32_t fractional value.

Returns: frac64_t fractional value after multiply.

Note: Saturated product is stored in A10 register of the MMAU for next computation. If saturation occurs, the instruction sets the accumulation overflow (Q) and multiply or divide overflow (V) flags to 1 in the CSR. Otherwise, it clears the Q and V flags.

static frac64_t MMAU_d_mula_l ( register frac32_t lval )

inlinestatic

The MMAU_d_mula_l function multiplies 32-bit fractional value with 64-bit fractional value stored in the A10 register of the MMAU returning a 64-bit fractional product.

Parameters

lval	frac32_t fractional value.

Returns: frac64_t fractional value after multiply.

Note: Product is stored in A10 register of the MMAU for next computation.

static frac64_t MMAU_d_mulas_l ( register frac32_t lval )

inlinestatic

The MMAU_d_mulas_l function multiplies 32-bit fractional value with 64-bit fractional value stored in the A10 register of the MMAU returning saturated 64-bit fractional product.

Parameters

lval	frac32_t fractional value.

Returns: frac64_t fractional value after multiply.

Note: Saturated product is stored in A10 register of the MMAU for next computation. If saturation occurs, the instruction sets the accumulation overflow (Q) and multiply or divide overflow (V) flags to 1 in the CSR. Otherwise, it clears the Q and V flags.

static frac32_t MMAU_l_mul_dl	(	register frac64_t	dval,
		register frac32_t	lval
	)

inlinestatic

The MMAU_l_mul_dl function multiplies 64-bit fractional value with 32-bit fractional value returning a 32-bit fractional product.

Parameters

dval	frac64_t fractional value.
lval	frac32_t fractional value.

Returns: frac32_t fractional value after multiply.

Note: Product is stored in A10 register of the MMAU for next computation.

static frac32_t MMAU_l_muls_dl	(	register frac64_t	dval,
		register frac32_t	lval
	)

inlinestatic

The MMAU_l_muls_dl function multiplies 64-bit fractional value with 32-bit fractional value returning saturated 32-bit fractional product.

Parameters

dval	frac64_t fractional value.
lval	frac32_t fractional value.

Returns: frac32_t fractional value after multiply.

Note: Saturated product is stored in A10 register of the MMAU for next computation.

static frac32_t MMAU_l_mula_l ( register frac32_t lval )

inlinestatic

The MMAU_l_mula_l function multiplies 32-bit fractional value with 64-bit fractional value stored in the A10 register of the MMAU returning a 32-bit fractional product.

Parameters

lval	frac32_t fractional value.

Returns: frac32_t fractional value after multiply.

Note: Product is stored in A10 register of the MMAU for next computation.

static frac32_t MMAU_l_mulas_l ( register frac32_t lval )

inlinestatic

The MMAU_l_mulas_l function multiplies 32-bit fractional value with 64-bit fractional value stored in the A10 register of the MMAU returning saturated 32-bit fractional product.

Parameters

lval	frac32_t fractional value.

Returns: frac32_t fractional value after multiply.

Note: Saturated product is stored in A10 register of the MMAU for next computation.

static frac64_t MMAU_d_mac_ll	(	register frac32_t	lval1,
		register frac32_t	lval2
	)

inlinestatic

The MMAU_d_mac_ll function multiplies two 32-bit fractional values and add product with value stored in the A10 register of the MMAU returning a 64-bit fractional A10 register value.

Parameters

lval1	frac32_t fractional value.
lval2	frac32_t fractional value.

Returns: frac64_t fractional value after multiply.

Note: Product is stored in A10 register of the MMAU for next computation.

static frac64_t MMAU_d_macs_ll	(	register frac32_t	lval1,
		register frac32_t	lval2
	)

inlinestatic

The MMAU_d_macs_ll function multiplies two 32-bit fractional values and add product with value stored in the A10 register of the MMAU returning saturated 64-bit fractional A10 register value.

Parameters

lval1	frac32_t fractional value.
lval2	frac32_t fractional value.

Returns: frac64_t fractional value after multiply.

Note: Saturated product is stored in A10 register of the MMAU for next computation. If saturation occurs, the instruction sets the accumulation overflow (Q) and multiply or divide overflow (V) flags to 1 in the CSR. Otherwise, it clears the Q and V flags.

static frac64_t MMAU_d_mac_dl	(	register frac64_t	dval,
		register frac32_t	lval
	)

inlinestatic

The MMAU_d_mac_dl function multiplies 64-bit fractional value with 32-bit fractional value and add product with value stored in the A10 register of the MMAU returning a 64-bit fractional A10 register value.

Parameters

dval	frac64_t fractional value.
lval	frac32_t fractional value.

Returns: frac64_t fractional value after multiply.

Note: Product is stored in A10 register of the MMAU for next computation.

static frac64_t MMAU_d_macs_dl	(	register frac64_t	dval,
		register frac32_t	lval
	)

inlinestatic

The MMAU_d_macs_dl function multiplies 64-bit fractional value with 32-bit fractional value and add product with value stored in the A10 register of the MMAU returning saturated 64-bit fractional A10 register value.

Parameters

dval	frac64_t fractional value.
lval	frac32_t fractional value.

Returns: frac64_t fractional value after multiply.

Note: Saturated product is stored in A10 register of the MMAU for next computation. If saturation occurs, the instruction sets the accumulation overflow (Q) and multiply or divide overflow (V) flags to 1 in the CSR. Otherwise, it clears the Q and V flags.

static frac64_t MMAU_d_maca_dl	(	register frac64_t	dval,
		register frac32_t	lval
	)

inlinestatic

The MMAU_d_maca_dl function multiplies 32-bit fractional value by value stored in the A10 register of the MMAU and add product with 64-bit fractional value returning a 64-bit fractional A10 register value.

Parameters

dval	frac64_t fractional value.
lval	frac32_t fractional value.

Returns: frac64_t fractional value after multiply.

Note: Product is stored in A10 register of the MMAU for next computation.

static frac64_t MMAU_d_macas_dl	(	register frac64_t	dval,
		register frac32_t	lval
	)

inlinestatic

The MMAU_d_macas_dl function multiplies 32-bit fractional value by value stored in the A10 register of the MMAU and add product with 64-bit fractional value returning saturated 64-bit fractional A10 register value.

Parameters

dval	frac64_t fractional value.
lval	frac32_t fractional value.

Returns: frac64_t fractional value after multiply.

Note: Saturated product is stored in A10 register of the MMAU for next computation. If saturation occurs, the instruction sets the accumulation overflow (Q) and multiply or divide overflow (V) flags to 1 in the CSR. Otherwise, it clears the Q and V flags.

static frac32_t MMAU_l_mac_ll	(	register frac32_t	lval1,
		register frac32_t	lval2
	)

inlinestatic

The MMAU_l_mac_ll function multiplies two 32-bit fractional values and add product with value stored in the A10 register of the MMAU returning a 32-bit fractional A1 register value.

Parameters

lval1	frac32_t fractional value.
lval2	frac32_t fractional value.

Returns: frac32_t fractional value after multiply.

Note: Product is stored in A10 register of the MMAU for next computation.

static frac32_t MMAU_l_macs_ll	(	register frac32_t	lval1,
		register frac32_t	lval2
	)

inlinestatic

The MMAU_l_macs_ll function multiplies two 32-bit fractional values and add product with value stored in the A10 register of the MMAU returning saturated 32-bit fractional A1 register value.

Parameters

lval1	frac32_t fractional value.
lval2	frac32_t fractional value.

Returns: frac32_t fractional value after multiply.

Note: Saturated product is stored in A10 register of the MMAU for next computation.

static frac32_t MMAU_l_mac_dl	(	register frac64_t	dval,
		register frac32_t	lval
	)

inlinestatic

The MMAU_l_mac_dl function multiplies 64-bit fractional value with 32-bit fractional value and add product with value stored in the A10 register of the MMAU returning a 32-bit fractional A1 register value.

Parameters

dval	frac64_t fractional value.
lval	frac32_t fractional value.

Returns: frac32_t fractional value after multiply.

Note: Product is stored in A10 register of the MMAU for next computation.

static frac32_t MMAU_l_macs_dl	(	register frac64_t	dval,
		register frac32_t	lval
	)

inlinestatic

The MMAU_l_macs_dl function multiplies 64-bit fractional value with 32-bit fractional value and add product with value stored in the A10 register of the MMAU returning saturated 32-bit fractional A1 register value.

Parameters

dval	frac64_t fractional value.
lval	frac32_t fractional value.

Returns: frac32_t fractional value after multiply.

Note: Saturated product is stored in A10 register of the MMAU for next computation.

static frac32_t MMAU_l_maca_dl	(	register frac64_t	dval,
		register frac32_t	lval
	)

inlinestatic

The MMAU_l_maca_dl function multiplies 32-bit fractional value by value stored in the A10 register of the MMAU and add product with 64-bit fractional value returning a 32-bit fractional A1 register value.

Parameters

dval	frac64_t fractional value.
lval	frac32_t fractional value.

Returns: frac32_t fractional value after multiply.

Note: Product is stored in A10 register of the MMAU for next computation.

static frac32_t MMAU_l_macas_dl	(	register frac64_t	dval,
		register frac32_t	lval
	)

inlinestatic

The MMAU_l_macas_dl function multiplies 32-bit fractional value by value stored in the A10 register of the MMAU and add product with 64-bit fractional value returning saturated 32-bit fractional A1 register value.

Parameters

dval	frac64_t fractional value.
lval	frac32_t fractional value.

Returns: frac32_t fractional value after multiply.

Note: Saturated product is stored in A10 register of the MMAU for next computation.

static frac32_t MMAU_l_div_ll	(	register frac32_t	lnum,
		register frac32_t	lden
	)

inlinestatic

The MMAU_l_div_ll function divides two 32-bit fractional values returning a 32-bit fractional quotient.

Parameters

lnum	frac32_t fractional divisor value.
lden	frac32_t fractional dividend value.

Returns: frac32_t fractional quotient value.

Note: Quotient is stored in A1 register of the MMAU for next computation.

static frac32_t MMAU_l_divs_ll	(	register frac32_t	lnum,
		register frac32_t	lden
	)

inlinestatic

The MMAU_l_divs_ll function divides two 32-bit fractional values returning a 32-bit fractional quotient.

Parameters

lnum	frac32_t fractional divisor value.
lden	frac32_t fractional dividend value.

Returns: frac32_t fractional quotient value.

Note: Saturated quotient is stored in A1 register of the MMAU for next computation. If saturation occurs, the instruction sets the accumulation overflow (Q) and multiply or divide overflow (V) flags to 1 in the CSR. Otherwise, it clears the Q and V flags.

static frac32_t MMAU_l_divas_l ( register frac32_t lden )

inlinestatic

The MMAU_l_divas_l function divides 64-bit fractional value stored in the A10 register of the MMAU by 32-bit fractional value returning a saturated 32-bit fractional quotient.

Parameters

lden	frac32_t fractional dividend value.

Returns: frac32_t fractional quotient value.

Note: Saturated quotient is stored in A1 register of the MMAU for next computation.

static frac64_t MMAU_d_div_dl	(	register frac64_t	dnum,
		register frac32_t	lden
	)

inlinestatic

The MMAU_d_div_dl function divides 64-bit fractional value by 32-bit fractional value returning a 64-bit fractional quotient.

Parameters

dnum	frac64_t fractional divisor value.
lden	frac32_t fractional dividend value.

Returns: frac64_t fractional quotient value.

Note: Quotient is stored in A10 register of the MMAU for next computation.

static frac64_t MMAU_d_divs_dl	(	register frac64_t	dnum,
		register frac32_t	lden
	)

inlinestatic

The MMAU_d_divs_dl function divides 64-bit fractional value by 32-bit fractional value returning a 64-bit fractional quotient.

Parameters

dnum	frac64_t fractional divisor value.
lden	frac32_t fractional dividend value.

Returns: frac64_t fractional quotient value.

Note: Saturated quotient is stored in A10 register of the MMAU for next computation. If saturation occurs, the instruction sets the accumulation overflow (Q) and multiply or divide overflow (V) flags to 1 in the CSR. Otherwise, it clears the Q and V flags.

static frac64_t MMAU_d_diva_l ( register frac32_t lden1 )

inlinestatic

The MMAU_d_diva_l function divides 32-bit fractional value stored in the A10 register of the MMAU by 32-bit fractional value returning a 64-bit fractional quotient.

Parameters

lden1 frac32_t fractional dividend value.

Returns: frac64_t fractional quotient value.

Note: Quotient is stored in A10 register of the MMAU for next computation.

static frac64_t MMAU_d_divas_l ( register frac32_t lden1 )

inlinestatic

The MMAU_d_divas_l function divides 32-bit fractional value stored in the A10 register of the MMAU by 32-bit fractional value returning a saturated 64-bit fractional quotient.

Parameters

lden1 frac32_t fractional dividend value.

Returns: frac64_t fractional quotient value.

Note: Saturated quotient is stored in A10 register of the MMAU for next computation. If saturation occurs, the instruction sets the accumulation overflow (Q) and multiply or divide overflow (V) flags to 1 in the CSR. Otherwise, it clears the Q and V flags.

static frac32_t MMAU_l_diva_l ( register frac32_t lden )

inlinestatic

The MMAU_l_diva_l function divides 64-bit fractional value stored in the A10 register of the MMAU by 32-bit fractional value returning a 32-bit fractional quotient.

Parameters

lden	frac32_t fractional dividend value.

Returns: frac32_t fractional quotient value.

Note: Quotient is stored in A1 register of the MMAU for next computation.

static frac32_t MMAU_l_sqr_l ( register frac32_t lrad )

inlinestatic

The MMAU_l_sqr_l function computes and returns a 32-bit fractional square root of the 32-bit fractional radicand.

Parameters

lrad	frac32_t fractional radicand.

Returns: frac32_t fractional square root.

Note: Square root is stored in A1 register of the MMAU for next computation.

static frac32_t MMAU_l_sqr_d ( register frac64_t drad )

inlinestatic

The MMAU_l_sqr_d function computes and returns a 32-bit fractional square root of the 64-bit fractional radicand.

Parameters

drad	frac64_t fractional radicand.

Returns: frac32_t fractional square root.

Note: Quotient is stored in A1 register of the MMAU for next computation.

static frac32_t MMAU_l_sqra ( void )

inlinestatic

The MMAU_l_sqra function computes and returns a 32-bit fractional square root of the radicand stored in the A10 register of the MMAU.

Returns: frac32_t fractional square root.

Note: Quotient is stored in A1 register of the MMAU for next computation.

Overview

Function groups

MMAU Initialization

MMAU Interrupts

MMAU Instruction flags

MMAU Operators

Typical use case and example

Enumerations

Functions

Driver version

Registers decorated load/store addresses

Unsigned integer instructions decorated load/store addresses

Signed fractional instructions decorated load/store addresses

Signed integer instructions decorated load/store addresses

Auxiliary decorated load/store addresses

Fractional Data Type

MMAU Configure

MMAU Interrupt

MMAU Instruction flag

Unsigned Integer Operands

Signed Integer Operands

Fractional Operands

Enumeration Type Documentation

Function Documentation