RW612

ACOMP: Analog Comparator

void ACOMP_Init(ACOMP_Type *base, const acomp_config_t *config)

Initializes the module, including warm up time, response mode, inactive value and so on.

Parameters:

base – ACOMP peripheral base address.
config – The pointer to the structure acomp_config_t.

void ACOMP_GetDefaultConfig(acomp_config_t *config)

Gets the default configuration of ACOMP module.

config->id = kACOMP_Acomp0;
config->enable = false;
config->warmupTime = kACOMP_WarmUpTime1us;
config->responseMode = kACOMP_SlowResponseMode;
config->inactiveValue = kACOMP_ResultLogicLow;
config->intTrigType = kACOMP_HighLevelTrig;
config->edgeDetectTrigSrc = kACOMP_EdgePulseDis;
config->outPinMode = kACOMP_PinOutDisable;
config->posInput = NULL;
config->negInput = NULL;

Parameters:

config – The pointer to the structure acomp_config_t.

void ACOMP_Deinit(ACOMP_Type *base)

De-initializes the module.

Parameters:

base – ACOMP peripheral base address.

void ACOMP_SetInputConfig(ACOMP_Type *base, acomp_comparator_id_t id, const acomp_positive_input_config_t *posInput, const acomp_negative_input_config_t *negInput)

Configures selected comparator’s inputs, inclduing input channel and hysteresis level.

Parameters:

base – ACOMP peripheral base address.
id – The selected acomp comparator’s id, please refer to acomp_comparator_id_t.
posInput – The configuration of selected comparator’s positive input, please refer to acomp_positive_input_config_t.
negInput – The configuration of selected comparator’s negative input, please refer to acomp_negative_input_config_t.

static inline void ACOMP_DoSoftwareReset(ACOMP_Type *base, acomp_comparator_id_t id)

Does software reset to the selected ACOMP module.

Parameters:

base – ACOMP peripheral base address.
id – The selected acomp comparator’s id, please refer to acomp_comparator_id_t.

static inline void ACOMP_Enable(ACOMP_Type *base, acomp_comparator_id_t id, bool enable)

Enables/Disables ACOMP module.

Parameters:

base – ACOMP peripheral base address.
id – The selected acomp comparator’s id, please refer to acomp_comparator_id_t.
enable – Used to enable/disable module.
- true Enable comparator instance.
- false Disable comparator instance.

static inline void ACOMP_ResetClockDivider(ACOMP_Type *base)

Resets clock divider.

Parameters:

base – ACOMP peripheral base address.

static inline acomp_result_logic_status_t ACOMP_GetResult(ACOMP_Type *base, acomp_comparator_id_t id)

Gets the selected acomp conversion result.

Parameters:

base – ACOMP peripheral base address.
id – The selected acomp comparator’s id, please refer to acomp_comparator_id_t.

Returns:

The result of the selected acomp instance.

static inline void ACOMP_EnableInterrupts(ACOMP_Type *base, uint32_t interruptMask)

ACOMP Interrupt Control Interfaces.

Enables interrupts, including acomp0 asynchronized interrupt, acomp0 synchronized interrupt, acomp1 asynchronized interrupt, and acomp1 synchronized interrupt.

Parameters:

base – ACOMP peripheral base address.
interruptMask – The OR’ed value of the interrupts to be enabled, please refer to _acomp_interrupt_enable.

static inline void ACOMP_DisableInterrupt(ACOMP_Type *base, uint32_t interruptMask)

Disables interrupts, including acomp0 asynchronized interrupt, acomp0 synchronized interrupt, acomp1 asynchronized interrupt, and acomp1 synchronized interrupt.

Parameters:

base – ACOMP peripheral base address.
interruptMask – The OR’ed value of the interrupts to be disabled, please refer to _acomp_interrupt_enable.

uint32_t ACOMP_GetStatusFlags(ACOMP_Type *base)

ACOMP Status Flag Interfaces.

Gets status flags, such as ACOMP0 active status flags, ACOMP1 active status flags, and so on.

Parameters:

base – ACOMP peripheral base address.

Returns:

The OR’ed value ACOMP status flags, please refer to _acomp_status_flags for details.

static inline void ACOMP_ClearStatusFlags(ACOMP_Type *base, uint32_t statusFlagMask)

Clears status flags that can be cleared by software.

Note

Only kACOMP_Acomp0OutInterruptFlag, kACOMP_Acomp0OutAInterruptFlag, kACOMP_Acomp1OutInterruptFlag, and kACOMP_Acomp1OutAInterruptFlag can be cleared by software.

Parameters:

base – ACOMP peripheral base address.
statusFlagMask – The OR’ed value of the status flags that can be cleared.

enum _acomp_interrupt_enable

The enumeration of interrupts, including ACOMP0 synchrnized output interrupt, ACOMP0 asynchrnized output interrupt, ACOMP1 synchrnized output interrupt, and ACOMP1 asynchrnized output interrupt.

Values:

enumerator kACOMP_Out0InterruptEnable: ACOMP0 synchrnized output interrupt enable.

enumerator kACOMP_OutA0InterruptEnable: ACOMP0 asynchrnized output interrupt enable.

enumerator kACOMP_Out1InterruptEnable: ACOMP1 synchrnized output interrupt enable.

enumerator kACOMP_OutA1InterruptEnable: ACOMP1 asynchrnized output interrupt enable.

enum _acomp_status_flags

The enumeration of status flags, including ACOMP0 active staus flag, ACOMP1 active status flag, and so on.

Values:

enumerator kACOMP_Acomp0ActiveFlag: ACOMP0 active status flag, if this flag is set it means the ACOMP0 is active.

enumerator kACOMP_Acomp0OutInterruptFlag: ACOMP0 Synchronized output interrupt flags, this flag is set when ACOMP0 synchronized output changes from 0 to 1 and the corresponding interrupt is enabled.

enumerator kACOMP_Acomp0OutAInterruptFlag: ACOMP0 Asynchronized output interrupt flags, this flag is set when ACOMP0 asynchronized output changes from 0 to 1 and the corresponding interrupt is enabled.

enumerator kACOMP_Acomp0RawOutInterruptFlag: ACOMP0 raw synchroized output interrrupt flags.

enumerator kACOMP_Acomp0RawOutAInterruptFlag: ACOMP0 raw asynchroized output interrupt flags.

enumerator kACOMP_Acomp1ActiveFlag: ACOMP1 active status flag, if this flag is set it means the ACOMP0 is active.

enumerator kACOMP_Acomp1OutInterruptFlag: ACOMP1 Synchronized output interrupt flags, this flag is set when ACOMP1 synchronized output changes from 0 to 1 and the corresponding interrupt is enabled.

enumerator kACOMP_Acomp1OutAInterruptFlag: ACOMP1 Asynchronized output interrupt flags, this flag is set when ACOMP1 asynchronized output changes from 0 to 1 and the corresponding interrupt is enabled.

enumerator kACOMP_Acomp1RawOutInterruptFlag: ACOMP1 raw synchroized output interrrupt flags.

enumerator kACOMP_Acomp1RawOutAInterruptFlag: ACOMP1 raw asynchroized output interrupt flags.

enum _acomp_result_logic_status

ACOMP result logical status Type definition.

Values:

enumerator kACOMP_ResultLogicLow: The comparsion result is high logic.

enumerator kACOMP_ResultLogicHigh: The comparsion result is low logic.

enum _acomp_comparator_id

ACOMP comparator id.

Values:

enumerator kACOMP_Acomp0: Index for ACOMP0

enumerator kACOMP_Acomp1: Index for ACOMP1

enum _acomp_warm_up_time

The enumeration of wave up time.

Values:

enumerator kACOMP_WarmUpTime1us: Set wave-up time as 1us.

enumerator kACOMP_WarmUpTime2us: Set wave-up time as 2us.

enumerator kACOMP_WarmUpTime4us: Set wave-up time as 4us.

enumerator kACOMP_WarmUpTime8us: Set wave-up time as 8us.

enum _acomp_response_mode

The enumeration of response mode. The response mode will affect the delay from input to output.

Values:

enumerator kACOMP_SlowResponseMode: Slow response mode also called power mode 1.

enumerator kACOMP_MediumResponseMode: Medium response mode also called power mode 2.

enumerator kACOMP_FastResponseMode: Fast response mode also called power mode 3.

enum _acomp_interrupt_trigger_type

ACOMP interrupt trigger type definition.

Values:

enumerator kACOMP_LowLevelTrig: Low level trigger interrupt.

enumerator kACOMP_HighLevelTrig: High level trigger interrupt.

enumerator kACOMP_FallingEdgeTrig: Falling edge trigger interrupt.

enumerator kACOMP_RisingEdgeTrig: Rising edge trigger interrupt.

enum _acomp_edge_pulse_trig_source

ACOMP edge pule trigger source type definition.

Values:

enumerator kACOMP_EdgePulseDis: edge pulse function is disable

enumerator kACOMP_EdgePulseRising: Rising edge can trigger edge pulse

enumerator kACOMP_EdgePulseFalling: Falling edge can trigger edge pulse

enumerator kACOMP_EdgePulseBothEdge: Both edge can trigger edge pulse

enum _acomp_pin_out_type

ACOMP synchronous/asynchronous output type to pin.

Values:

enumerator kACOMP_PinOutSyn: Enable ACOMP synchronous pin output

enumerator kACOMP_PinOutAsyn: Enable ACOMP asynchronous pin output

enumerator kACOMP_PinOutSynInverted: Enable ACOMP inverted synchronous pin output

enumerator kACOMP_PinOutAsynInverted: Enable ACOMP inverted asynchronous pin output

enumerator kACOMP_PinOutDisable: Diable ACOMP pin output

enum _acomp_positive_channel

ACOMP positive channel enumeration.

Values:

enumerator kACOMP_PosCh0: ACOMP Channel0 selection

enumerator kACOMP_PosCh1: ACOMP Channel1 selection

enumerator kACOMP_PosCh2: ACOMP Channel2 selection

enumerator kACOMP_PosCh3: ACOMP Channel3 selection

enumerator kACOMP_PosCh4: ACOMP Channel4 selection

enumerator kACOMP_PosCh5: ACOMP Channel5 selection

enumerator kACOMP_PosCh6: ACOMP Channel6 selection

enumerator kACOMP_PosCh7: ACOMP Channel7 selection

enumerator kACOMP_PosChDACA: DACA selection

enumerator kACOMP_PosChDACB: DACB selection

enum _acomp_negative_channel

ACOMP negative channel enumeration.

Values:

enumerator kACOMP_NegCh0: ACOMP Channel0 selection

enumerator kACOMP_NegCh1: ACOMP Channel1 selection

enumerator kACOMP_NegCh2: ACOMP Channel2 selection

enumerator kACOMP_NegCh3: ACOMP Channel3 selection

enumerator kACOMP_NegCh4: ACOMP Channel4 selection

enumerator kACOMP_NegCh5: ACOMP Channel5 selection

enumerator kACOMP_NegCh6: ACOMP Channel6 selection

enumerator kACOMP_NegCh7: ACOMP Channel7 selection

enumerator kACOMP_NegChDACA: DACA selection

enumerator kACOMP_NegChDACB: DACB selection

enumerator kACOMP_NegChVREF1P2: Vref1p2 selection

enumerator kACOMP_NegChAVSS: AVSS selection

enumerator kACOMP_NegChVIO_0P25: VIO Scaling factor 0.25

enumerator kACOMP_NegChVIO_0P50: VIO Scaling factor 0.50

enumerator kACOMP_NegChVIO_0P75: VIO Scaling factor 0.75

enumerator kACOMP_NegChVIO_1P00: VIO Scaling factor 1.00

enum _acomp_input_hysteresis

ACOMP hysteresis level enumeration.

Values:

enumerator kACOMP_Hyster0MV: Hysteresis level = 0mv

enumerator kACOMP_Hyster10MV: Hysteresis level = 10mv

enumerator kACOMP_Hyster20MV: Hysteresis level = 20mv

enumerator kACOMP_Hyster30MV: Hysteresis level = 30mv

enumerator kACOMP_Hyster40MV: Hysteresis level = 40mv

enumerator kACOMP_Hyster50MV: Hysteresis level = 50mv

enumerator kACOMP_Hyster60MV: Hysteresis level = 60mv

enumerator kACOMP_Hyster70MV: Hysteresis level = 70mv

typedef enum _acomp_result_logic_status acomp_result_logic_status_t: ACOMP result logical status Type definition.

typedef enum _acomp_comparator_id acomp_comparator_id_t: ACOMP comparator id.

typedef enum _acomp_warm_up_time acomp_warm_up_time_t: The enumeration of wave up time.

typedef enum _acomp_response_mode acomp_response_mode_t: The enumeration of response mode. The response mode will affect the delay from input to output.

typedef enum _acomp_interrupt_trigger_type acomp_interrupt_trigger_type_t: ACOMP interrupt trigger type definition.

typedef enum _acomp_edge_pulse_trig_source acomp_edge_pulse_trig_source_t: ACOMP edge pule trigger source type definition.

typedef enum _acomp_pin_out_type acomp_pin_out_type_t: ACOMP synchronous/asynchronous output type to pin.

typedef enum _acomp_positive_channel acomp_positive_channel_t: ACOMP positive channel enumeration.

typedef enum _acomp_negative_channel acomp_negative_channel_t: ACOMP negative channel enumeration.

typedef enum _acomp_input_hysteresis acomp_input_hysteresis_t: ACOMP hysteresis level enumeration.

typedef struct _acomp_positive_input_config acomp_positive_input_config_t: The configuration of positive input, including channel selection and hysteresis level.

typedef struct _acomp_negative_input_config acomp_negative_input_config_t: The configuration of negative input, including channel selection and hysteresis level.

typedef struct _acomp_config acomp_config_t: The configure structure of acomp, including warm up time, response mode and so on.

FSL_ACOMP_DRIVER_VERSION

ACOMP driver version.

Version 2.0.1.

ACOMP_REG_ADDR(startAddr, id): The macro to get the address based on start address and acomp id.

ACOMP_REG_CONST_ADDR(startAddr, id)

ACOMP_GET_REG_VAL(startAddr, id): The macro to get register value based on start address and acomp id.

ACOMP_GET_REG_CONST_VAL(startAddr, id)

ACOMP_SET_REG_BIT(startAddr, id, val): Sets register’s bit field.

ACOMP_CLEAR_REG_BIT(startAddr, id, val): Clears register’s bit field.

struct _acomp_positive_input_config

#include <fsl_acomp.h>

The configuration of positive input, including channel selection and hysteresis level.

Public Members

acomp_positive_channel_t channel: Positive input channel selection, please refer to acomp_positive_channel_t.

acomp_input_hysteresis_t hysterLevel: Positive hysteresis voltage level selection, please refer to acomp_input_hysteresis_t.

struct _acomp_negative_input_config

#include <fsl_acomp.h>

The configuration of negative input, including channel selection and hysteresis level.

Public Members

acomp_negative_channel_t channel: Negative input channel selection, please refer to acomp_negative_channel_t.

acomp_input_hysteresis_t hysterLevel: Negative hystersis voltage level selection, please refer to acomp_input_hysteresis_t.

struct _acomp_config

#include <fsl_acomp.h>

The configure structure of acomp, including warm up time, response mode and so on.

Public Members

acomp_comparator_id_t id: The id of comparator, please refer to acomp_comparator_id_t.

bool enable

Enable/Disable the selected ACOMP.

true Enable the selected ACOMP.
false Disable the selected ACOMP.

acomp_warm_up_time_t warmupTime: Configure warm-up time, please refer to acomp_warm_up_time_t.

acomp_response_mode_t responseMode: Configure responde mode(power mode), please refer to acomp_response_mode_t for details.

acomp_interrupt_trigger_type_t intTrigType: Select interrupt trigger type, please refer to acomp_interrupt_trigger_type_t.

acomp_result_logic_status_t inactiveValue: Configure output value for inactive state.

acomp_edge_pulse_trig_source_t edgeDetectTrigSrc: Config edge detect trigger source, please refer to acomp_edge_pulse_trig_source_t.

acomp_pin_out_type_t outPinMode: Config the output pin mode, please refer to acomp_pin_out_type_t for details.

const acomp_positive_input_config_t *posInput: The pointer to the configuration structure of positive input, please refer to acomp_positive_input_config_t.

const acomp_negative_input_config_t *negInput: The pointer to the configuration structure of negative input, please refer to acomp_positive_input_config_t.

ADC: Analog Digital Converter

void ADC_Init(ADC_Type *base, const adc_config_t *config)

Initialize ADC module, including clock divider, power mode, and so on.

Parameters:

base – ADC peripheral base address.
config – The pointer to the structure adc_config_t.

void ADC_GetDefaultConfig(adc_config_t *config)

Get default configuration.

config->clockDivider = kADC_ClockDivider1;
config->powerMode = kADC_PowerModeFullBiasingCurrent;
config->resolution = kADC_Resolution12Bit;
config->warmupTime = kADC_WarmUpTime16us;
config->vrefSource = kADC_Vref1P2V;
config->inputMode = kADC_InputSingleEnded;
config->conversionMode = kADC_ConversionContinuous;
config->scanLength = kADC_ScanLength_1;
config->averageLength = kADC_AverageNone;
config->triggerSource = kADC_TriggerSourceSoftware;
config->inputGain = kADC_InputGain1;
config->enableInputGainBuffer = false;
config->resultWidth = kADC_ResultWidth16;
config->fifoThreshold = kADC_FifoThresholdData1;
config->enableDMA = false;
config->enableADC = false;

Parameters:

config – The Pointer to the structure adc_config_t.

void ADC_Deinit(ADC_Type *base)

De-initialize the ADC module.

Parameters:

base – ADC peripheral base address.

static inline void ADC_DoSoftwareReset(ADC_Type *base)

Reset the whole ADC block.

Parameters:

base – ADC peripheral base address.

static inline void ADC_SelectAnalogPortionPowerMode(ADC_Type *base, adc_analog_portion_power_mode_t powerMode)

Select ADC analog portion power mode.

Parameters:

base – ADC peripheral base address.
powerMode – The power mode to be set, please refer to adc_analog_portion_power_mode_t.

status_t ADC_DoAutoCalibration(ADC_Type *base, adc_calibration_ref_t calVref)

Do automatic calibration measurement.

Note

After auto calibrate successful, user can invoke ADC_GetAutoCalibrationData() to get self offset calibration value and self gain calibration value.

Parameters:

base – ADC peripheral base address.
calVref – The inpul reference channel for gain calibration, please refer to adc_calibration_ref_t for details.

Return values:

kStatus_Success – Auto calibrate successfully.
kStatus_Fail – Auto calibrate failure.

static inline void ADC_GetAutoCalibrationData(ADC_Type *base, uint16_t *offsetCal, uint16_t *gainCal)

Get the ADC automatic calibration data.

Parameters:

base – ADC peripheral base address.
offsetCal – Self offset calibration data pointer, evaluate NULL if not requried.
gainCal – Self gain calibration data pointer, evaluate NULL if not requried.

static inline void ADC_ResetAutoCalibrationData(ADC_Type *base)

Reset the automatic calibration data.

Parameters:

base – ADC peripheral base address.

static inline void ADC_DoUserCalibration(ADC_Type *base, uint16_t offsetCal, uint16_t gainCal)

Do user defined calibration.

Parameters:

base – ADC peripheral base address.
offsetCal – User defined offset calibration data.
gainCal – User defined gain calibration date.

static inline void ADC_EnableTemperatureSensor(ADC_Type *base, bool enable)

Enable/disable temperature sensor.

Note

This function is useful only when the channel source is temperature sensor.

Parameters:

base – ADC peripheral base address.
enable – Used to enable/disable temperature sensor.
- true Enable temperature sensor.
- false Disable temperature sensor.

static inline void ADC_SetTemperatureSensorMode(ADC_Type *base, adc_temperature_sensor_mode_t tSensorMode)

Set temperature sensor mode, available selections are internal diode mode and external diode mode.

Parameters:

base – ADC peripheral base address.
tSensorMode – The temperature sensor mode to be set, please refer to adc_temperature_sensor_mode_t.

static inline void ADC_EnableAudio(ADC_Type *base, bool enable)

Enable/disable audio PGA and decimation rate select.

Parameters:

base – ADC peripheral base address.
enable – Used to enable/disable audio PGA and decimation rate select.
- true Enable audio PGA and decimation rate select.
- false Disable audio PGA and decimation rate select.

static inline void ADC_SetAudioPGAVoltageGain(ADC_Type *base, adc_audio_pga_voltage_gain_t voltageGain)

Set audio PGA voltage gain.

Parameters:

base – ADC peripheral base address.
voltageGain – The selected audio PGA voltage gain, please refer to adc_audio_pga_voltage_gain_t.

void ADC_ConfigAudioVoiceLevel(ADC_Type *base, bool enableDetect, adc_audio_voice_level_t voiceLevel)

Configure audio voice level.

Parameters:

base – ADC peripheral base address.
enableDetect – Used to enable/disable voice level detection.
- true Enable voice level detection.
- false Disable voice level detection.
voiceLevel – Selected voice level, please refer to adc_audio_voice_level_t.

void ADC_SetScanChannel(ADC_Type *base, adc_scan_channel_t scanChannel, adc_channel_source_t channelSource)

Set scan channel mux source.

Parameters:

base – ADC peripheral base address.
scanChannel – The selected channel, please refer to adc_scan_channel_t for details.
channelSource – The mux source to be set to the selected channel, please refer to adc_channel_source_t for details.

static inline void ADC_DoSoftwareTrigger(ADC_Type *base)

If trigger mode is selected as software trigger, invoking this function to start conversion.

Note

This API will also clear the FIFO.

Parameters:

base – ADC peripheral base address.

static inline void ADC_StopConversion(ADC_Type *base)

Invoke this function to stop conversion.

Parameters:

base – ADC peripheral base address.

static inline uint32_t ADC_GetConversionResult(ADC_Type *base)

Get the 32-bit width packed ADC conversion result.

Parameters:

base – ADC peripheral base address.

Returns:

32-bit width packed ADC conversion result.

static inline uint8_t ADC_GetFifoDataCount(ADC_Type *base)

Get the ADC FIFO data count.

Parameters:

base – ADC peripheral base address.

Returns:

ADC FIFO data count.

static inline void ADC_EnableInterrupts(ADC_Type *base, uint32_t interruptMask)

Enable interrupts, such as conversion data ready interrupt, gain correction saturation interrupt, FIFO under run interrupt, and so on.

Parameters:

base – ADC peripheral base address.
interruptMask – The interrupts to be enabled, should be the OR’ed value of _adc_interrupt_enable.

static inline void ADC_DisableInterrupts(ADC_Type *base, uint32_t interruptMask)

Disable interrupts, such as conversion data ready interrupt, gain correction saturation interrupt, FIFO under run interrupt, and so on.

Parameters:

base – ADC peripheral base address.
interruptMask – The interrupts to be disabled, should be the OR’ed value of _adc_interrupt_enable.

uint32_t ADC_GetStatusFlags(ADC_Type *base)

Get status flags, including interrupt flags, raw flags, and so on.

Parameters:

base – ADC peripheral base address.

Returns:

The OR’ed value of ADC status flags, please refer to _adc_status_flags for details.

static inline void ADC_ClearStatusFlags(ADC_Type *base, uint32_t statusFlagsMask)

Clear status flags.

Note

Only interrupt flags and raw flags can be cleared.

Parameters:

base – ADC peripheral base address.
statusFlagsMask – The OR’ed value of status flags to be cleared, please refer to _adc_status_flags for details.

enum _adc_interrupt_enable

The enumeration of interrupts, this enumeration can be used to enable/disable interrupts.

Values:

enumerator kADC_DataReadyInterruptEnable: Conversion data ready interrupt.

enumerator kADC_GainSaturationInterruptEnable: Gain correction saturation interrupt

enumerator kADC_OffsetSaturationInterruptEnable: Offset correction saturation interupt enable.

enumerator kADC_NegativeSaturationInterruptEnable: ADC data negative side saturation interrupt enable.

enumerator kADC_PositiveSaturationInterruptEnable: ADC data positive side saturation interrupt enable.

enumerator kADC_FifoOverrunInterruptEnable: FIFO overrun interrupt enable.

enumerator kADC_FifoUnderrunInterruptEnable: FIFO underrun interrupt enable.

enum _adc_status_flags

The enumeration of adc status flags, including interrupt flags, raw flags, and so on.

Note

The raw flags will be captured regardless the interrupt mask. Both interrupt flags and raw flags can be cleared.

Values:

enumerator kADC_DataReadyInterruptFlag: Conversion Data Ready interrupt flag.

enumerator kADC_GainSaturationInterruptFlag: Gain correction saturation interrupt flag.

enumerator kADC_OffsetSaturationInterruptFlag: Offset correction saturation interupt flag.

enumerator kADC_NegativeSaturationInterruptFlag: ADC data negative side saturation interrupt flag.

enumerator kADC_PositiveSaturationInterruptFlag: ADC data positive side saturation interrupt flag.

enumerator kADC_FifoOverrunInterruptFlag: FIFO overrun interrupt flag.

enumerator kADC_FifoUnderrunInterruptFlag: FIFO underrun interrupt flag.

enumerator kADC_DataReadyRawFlag: Conversion data ready raw flag, this flag will be captured regardless the interrupt mask.

enumerator kADC_GainSaturationRawFlag: Gain correction saturation raw flag, this flag will be captured regardless the interrupt mask.

enumerator kADC_OffsetSaturationRawFlag: Offset correction saturation raw flag, this flag will be captured regardless the interrupt mask.

enumerator kADC_NegativeSaturationRawFlag: ADC data negative side saturation raw flag, this flag will be captured regardless the interrupt mask.

enumerator kADC_PositiveSaturationRawFlag: ADC data positive side saturation raw flag, this flag will be captured regardless the interrupt mask.

enumerator kADC_FifoOverrunRawFlag: FIFO overrun raw flag, this flag will be captured regardless the interrupt mask.

enumerator kADC_FifoUnderrunRawFlag: FIFO underrun interrupt mask, this flag will be captured regardless the interrupt mask.

enumerator kADC_ActiveStatusFlag: ADC conversion active status flag.

enumerator kADC_FIFONotEmptyStatusFlag: FIFO not empty status flag.

enumerator kADC_FifoFullStatusFlag: FIFO full status flag.

enum _adc_clock_divider

ADC clock divider ratio type.

Values:

enumerator kADC_ClockDivider1: Clock divider ratio is 1

enumerator kADC_ClockDivider2: Clock divider ratio is 2

enumerator kADC_ClockDivider3: Clock divider ratio is 3

enumerator kADC_ClockDivider4: Clock divider ratio is 4

enumerator kADC_ClockDivider5: Clock divider ratio is 5

enumerator kADC_ClockDivider6: Clock divider ratio is 6

enumerator kADC_ClockDivider7: Clock divider ratio is 7

enumerator kADC_ClockDivider8: Clock divider ratio is 8

enumerator kADC_ClockDivider9: Clock divider ratio is 9

enumerator kADC_ClockDivider10: Clock divider ratio is 10

enumerator kADC_ClockDivider11: Clock divider ratio is 11

enumerator kADC_ClockDivider12: Clock divider ratio is 12

enumerator kADC_ClockDivider13: Clock divider ratio is 13

enumerator kADC_ClockDivider14: Clock divider ratio is 14

enumerator kADC_ClockDivider15: Clock divider ratio is 15

enumerator kADC_ClockDivider16: Clock divider ratio is 16

enumerator kADC_ClockDivider17: Clock divider ratio is 17

enumerator kADC_ClockDivider18: Clock divider ratio is 18

enumerator kADC_ClockDivider19: Clock divider ratio is 19

enumerator kADC_ClockDivider20: Clock divider ratio is 20

enumerator kADC_ClockDivider21: Clock divider ratio is 21

enumerator kADC_ClockDivider22: Clock divider ratio is 22

enumerator kADC_ClockDivider23: Clock divider ratio is 23

enumerator kADC_ClockDivider24: Clock divider ratio is 24

enumerator kADC_ClockDivider25: Clock divider ratio is 25

enumerator kADC_ClockDivider26: Clock divider ratio is 26

enumerator kADC_ClockDivider27: Clock divider ratio is 27

enumerator kADC_ClockDivider28: Clock divider ratio is 28

enumerator kADC_ClockDivider29: Clock divider ratio is 29

enumerator kADC_ClockDivider30: Clock divider ratio is 30

enumerator kADC_ClockDivider31: Clock divider ratio is 31

enumerator kADC_ClockDivider32: Clock divider ratio is 32

enum _adc_analog_portion_power_mode

ADC analog portion low-power mode selection.

Values:

enumerator kADC_PowerModeFullBiasingCurrent: Full biasing current.

enumerator kADC_PowerModeHalfBiasingCurrent: Half biasing current.

enum _adc_resolution

ADC resolution type.

Values:

enumerator kADC_Resolution12Bit: 12-bit resolution

enumerator kADC_Resolution14Bit: 14-bit resolution

enumerator kADC_Resolution16Bit: 16-bit resolution

enumerator kADC_Resolution16BitAudio: 16-bit resolution for audio application

enum _adc_warm_up_time

The enumeration of adc warm up time, the ADC warm-up state can also bypassed.

Values:

enumerator kADC_WarmUpTime1us: ADC warm-up time is 1 us.

enumerator kADC_WarmUpTime2us: ADC warm-up time is 2 us.

enumerator kADC_WarmUpTime3us: ADC warm-up time is 3 us.

enumerator kADC_WarmUpTime4us: ADC warm-up time is 4 us.

enumerator kADC_WarmUpTime5us: ADC warm-up time is 5 us.

enumerator kADC_WarmUpTime6us: ADC warm-up time is 6 us.

enumerator kADC_WarmUpTime7us: ADC warm-up time is 7 us.

enumerator kADC_WarmUpTime8us: ADC warm-up time is 8 us.

enumerator kADC_WarmUpTime9us: ADC warm-up time is 9 us.

enumerator kADC_WarmUpTime10us: ADC warm-up time is 10 us.

enumerator kADC_WarmUpTime11us: ADC warm-up time is 11 us.

enumerator kADC_WarmUpTime12us: ADC warm-up time is 12 us.

enumerator kADC_WarmUpTime13us: ADC warm-up time is 13 us.

enumerator kADC_WarmUpTime14us: ADC warm-up time is 14 us.

enumerator kADC_WarmUpTime15us: ADC warm-up time is 15 us.

enumerator kADC_WarmUpTime16us: ADC warm-up time is 16 us.

enumerator kADC_WarmUpTime17us: ADC warm-up time is 17 us.

enumerator kADC_WarmUpTime18us: ADC warm-up time is 18 us.

enumerator kADC_WarmUpTime19us: ADC warm-up time is 19 us.

enumerator kADC_WarmUpTime20us: ADC warm-up time is 20 us.

enumerator kADC_WarmUpTime21us: ADC warm-up time is 21 us.

enumerator kADC_WarmUpTime22us: ADC warm-up time is 22 us.

enumerator kADC_WarmUpTime23us: ADC warm-up time is 23 us.

enumerator kADC_WarmUpTime24us: ADC warm-up time is 24 us.

enumerator kADC_WarmUpTime25us: ADC warm-up time is 25 us.

enumerator kADC_WarmUpTime26us: ADC warm-up time is 26 us.

enumerator kADC_WarmUpTime27us: ADC warm-up time is 27 us.

enumerator kADC_WarmUpTime28us: ADC warm-up time is 28 us.

enumerator kADC_WarmUpTime29us: ADC warm-up time is 29 us.

enumerator kADC_WarmUpTime30us: ADC warm-up time is 30 us.

enumerator kADC_WarmUpTime31us: ADC warm-up time is 31 us.

enumerator kADC_WarmUpTime32us: ADC warm-up time is 32 us.

enumerator kADC_WarmUpStateBypass: ADC warm-up state bypassed.

enum _adc_vref_source

ADC voltage reference source type.

Values:

enumerator kADC_Vref1P8V: Internal 1.8V reference

enumerator kADC_Vref1P2V: Internal 1.2V reference

enumerator kADC_VrefExternal: External single-ended reference though ADC_CH3

enumerator kADC_VrefInternal1P2V: Internal 1.2V reference with cap filter though ADC_CH3

enum _adc_input_mode

ADC input mode type.

Values:

enumerator kADC_InputSingleEnded: Single-ended mode

enumerator kADC_InputDifferential: Differential mode

enum _adc_conversion_mode

ADC conversion mode type.

Values:

enumerator kADC_ConversionOneShot: One shot mode

enumerator kADC_ConversionContinuous: Continuous mode

enum _adc_scan_length

ADC scan length type.

Values:

enumerator kADC_ScanLength_1: Scan length is 1

enumerator kADC_ScanLength_2: Scan length is 2

enumerator kADC_ScanLength_3: Scan length is 3

enumerator kADC_ScanLength_4: Scan length is 4

enumerator kADC_ScanLength_5: Scan length is 5

enumerator kADC_ScanLength_6: Scan length is 6

enumerator kADC_ScanLength_7: Scan length is 7

enumerator kADC_ScanLength_8: Scan length is 8

enumerator kADC_ScanLength_9: Scan length is 9

enumerator kADC_ScanLength_10: Scan length is 10

enumerator kADC_ScanLength_11: Scan length is 11

enumerator kADC_ScanLength_12: Scan length is 12

enumerator kADC_ScanLength_13: Scan length is 13

enumerator kADC_ScanLength_14: Scan length is 14

enumerator kADC_ScanLength_15: Scan length is 15

enumerator kADC_ScanLength_16: Scan length is 16

enum _adc_average_length

ADC average length type.

Values:

enumerator kADC_AverageNone: Average length: no average

enumerator kADC_Average2: Average length: 2

enumerator kADC_Average4: Average length: 4

enumerator kADC_Average8: Average length: 8

enumerator kADC_Average16: Average length: 16

enum _adc_input_gain

ADC input buffer gain type.

Values:

enumerator kADC_InputGain0P5: Input buffer gain is 0.5

enumerator kADC_InputGain1: Input buffer gain is 1

enumerator kADC_InputGain2: Input buffer gain is 2

enum _adc_result_width

ADC result width type.

Values:

enumerator kADC_ResultWidth16: 16-bit final result buffer width

enumerator kADC_ResultWidth32: 32-bit final result buffer width

enum _adc_fifo_threshold

The threshold of FIFO.

Values:

enumerator kADC_FifoThresholdData1: FIFO Threshold is 1 data.

enumerator kADC_FifoThresholdData4: FIFO Threshold is 4 data.

enumerator kADC_FifoThresholdData8: FIFO Threshold is 8 data.

enumerator kADC_FifoThresholdData16: FIFO Threshold is 16 data.

enum _adc_calibration_ref

ADC calibration voltage reference type.

Values:

enumerator kADC_CalibrationVrefInternal: Internal vref as input for calibration

enumerator kADC_CalibrationVrefExternal: External vref as input for calibration

enum _adc_scan_channel

ADC scan channel type.

Values:

enumerator kADC_ScanChannel0: Scan channel 0

enumerator kADC_ScanChannel1: Scan channel 1

enumerator kADC_ScanChannel2: Scan channel 2

enumerator kADC_ScanChannel3: Scan channel 3

enumerator kADC_ScanChannel4: Scan channel 4

enumerator kADC_ScanChannel5: Scan channel 5

enumerator kADC_ScanChannel6: Scan channel 6

enumerator kADC_ScanChannel7: Scan channel 7

enumerator kADC_ScanChannel8: Scan channel 8

enumerator kADC_ScanChannel9: Scan channel 9

enumerator kADC_ScanChannel10: Scan channel 10

enumerator kADC_ScanChannel11: Scan channel 11

enumerator kADC_ScanChannel12: Scan channel 12

enumerator kADC_ScanChannel13: Scan channel 13

enumerator kADC_ScanChannel14: Scan channel 14

enumerator kADC_ScanChannel15: Scan channel 15

enum _adc_channel_source

ADC channel source type.

Values:

enumerator kADC_CH0: Single-ended mode, channel[0] and vssa

enumerator kADC_CH1: Single-ended mode, channel[1] and vssa

enumerator kADC_CH2: Single-ended mode, channel[2] and vssa

enumerator kADC_CH3: Single-ended mode, channel[3] and vssa

enumerator kADC_CH4: Single-ended mode, channel[4] and vssa

enumerator kADC_CH5: Single-ended mode, channel[5] and vssa

enumerator kADC_CH6: Single-ended mode, channel[6] and vssa

enumerator kADC_CH7: Single-ended mode, channel[7] and vssa

enumerator kADC_VBATS: Single-ended mode, vbat_s and vssa

enumerator kADC_VREF: Single-ended mode, vref_12 and vssa

enumerator kADC_DACA: Single-ended mode, daca and vssa

enumerator kADC_DACB: Single-ended mode, dacb and vssa

enumerator kADC_VSSA: Single-ended mode, vssa and vssa

enumerator kADC_CH0_CH1: Differential mode, channel[0] and channel[1]

enumerator kADC_CH2_CH3: Differential mode, channel[2] and channel[3]

enumerator kADC_CH4_CH5: Differential mode, channel[4] and channel[5]

enumerator kADC_CH6_CH7: Differential mode, channel[6] and channel[7]

enumerator kADC_DACA_DACB: Differential mode, daca and dacb

enum _adc_temperature_sensor_mode

Temperature sensor mode, including internal diode mode and external diode mode.

Values:

enumerator kADC_TSensorExternal: External diode mode.

enum _adc_audio_pga_voltage_gain

ADC audio pga gain type.

Values:

enumerator kADC_AudioGain4: Audio pga gain is 4

enumerator kADC_AudioGain8: Audio pga gain is 8

enumerator kADC_AudioGain16: Audio pga gain is 16

enumerator kADC_AudioGain32: Audio pga gain is 32

enum _adc_audio_voice_level

ADC audio voice level selection.

Values:

enumerator kADC_VoiceLevel0: Input voice level >+255LSB or <-256LSB

enumerator kADC_VoiceLevel1: Input voice level >+511LSB or <-512LSB

enumerator kADC_VoiceLevel2: Input voice level >+1023LSB or <-1024LSB

enumerator kADC_VoiceLevel3: Input voice level >+2047LSB or <-2048LSB

typedef enum _adc_clock_divider adc_clock_divider_t: ADC clock divider ratio type.

typedef enum _adc_analog_portion_power_mode adc_analog_portion_power_mode_t: ADC analog portion low-power mode selection.

typedef enum _adc_resolution adc_resolution_t: ADC resolution type.

typedef enum _adc_warm_up_time adc_warm_up_time_t: The enumeration of adc warm up time, the ADC warm-up state can also bypassed.

typedef enum _adc_vref_source adc_vref_source_t: ADC voltage reference source type.

typedef enum _adc_input_mode adc_input_mode_t: ADC input mode type.

typedef enum _adc_conversion_mode adc_conversion_mode_t: ADC conversion mode type.

typedef enum _adc_scan_length adc_scan_length_t: ADC scan length type.

typedef enum _adc_average_length adc_average_length_t: ADC average length type.

typedef enum _adc_input_gain adc_input_gain_t: ADC input buffer gain type.

typedef enum _adc_result_width adc_result_width_t: ADC result width type.

typedef enum _adc_fifo_threshold adc_fifo_threshold_t: The threshold of FIFO.

typedef enum _adc_calibration_ref adc_calibration_ref_t: ADC calibration voltage reference type.

typedef enum _adc_scan_channel adc_scan_channel_t: ADC scan channel type.

typedef enum _adc_channel_source adc_channel_source_t: ADC channel source type.

typedef enum _adc_temperature_sensor_mode adc_temperature_sensor_mode_t: Temperature sensor mode, including internal diode mode and external diode mode.

typedef enum _adc_audio_pga_voltage_gain adc_audio_pga_voltage_gain_t: ADC audio pga gain type.

typedef enum _adc_audio_voice_level adc_audio_voice_level_t: ADC audio voice level selection.

typedef struct _adc_config adc_config_t: The structure of adc options, including clock divider, power mode, and so on.

FSL_ADC_DRIVER_VERSION

ADC driver version.

Version 2.2.0.

struct _adc_config

#include <fsl_adc.h>

The structure of adc options, including clock divider, power mode, and so on.

Public Members

adc_clock_divider_t clockDivider: Analog 64M clock division ratio, please refer to adc_clock_divider_t.

adc_resolution_t resolution: Configure ADC resolution, please refer to adc_resolution_t.

adc_warm_up_time_t warmupTime: Configure warm-up time.

adc_vref_source_t vrefSource: Configure voltage reference source, please refer to adc_vref_source_t.

adc_input_mode_t inputMode: Configure input mode, such as kADC_InputSingleEnded or kADC_InputDifferential.

adc_conversion_mode_t conversionMode: Configure convrsion mode, such as kADC_ConversionOneShot or kADC_ConversionContinuous.

adc_scan_length_t scanLength: Configure the length of scan, please refer to adc_scan_length_t.

adc_average_length_t averageLength: Configure hardware average number, please refer to adc_average_length_t

adc_trigger_source_t triggerSource: Configure trigger source, the trigger source can be divided into hardware trigger and software trigger, please refer to adc_trigger_source_t for details.

adc_input_gain_t inputGain: Configure ADC input buffer gain, please refer to adc_input_gain_t.

bool enableInputGainBuffer

Enable/Disable input gain buffer.

true Enable input gain buffer.
false Disable input gain buffer.

bool enableInputBufferChop

Enable/Disable input buffer chopper:

true Enable input buffer chopper;
false Disable input buffer chopper.

bool enableChop

Enable/Disable the ADC chopper:

true Enable the chopper;
false Disable the chopper.

adc_result_width_t resultWidth: Select result FIFO data packed format, please refer to adc_result_width_t.

adc_fifo_threshold_t fifoThreshold: Configure FIFO threshold, please refer to adc_fifo_threshold_t.

bool enableDMA

Enable/Disable DMA reqeust.

true Enable DMA request.
false Disable DMA request.

bool enableADC

Enable/Disable ADC module.

true Enable ADC module.
false Disable ADC module.

CACHE: CACHE Memory Controller

uint32_t CACHE64_GetInstance(CACHE64_POLSEL_Type *base)

Returns an instance number given peripheral base address.

Parameters:

base – The peripheral base address.

Returns:

CACHE64_POLSEL instance number starting from 0.

uint32_t CACHE64_GetInstanceByAddr(uint32_t address)

brief Returns an instance number given physical memory address.

param address The physical memory address.

Returns:: CACHE64_CTRL instance number starting from 0.

status_t CACHE64_Init(CACHE64_POLSEL_Type *base, const cache64_config_t *config)

Initializes an CACHE64 instance with the user configuration structure.

This function configures the CACHE64 module with user-defined settings. Call the CACHE64_GetDefaultConfig() function to configure the configuration structure and get the default configuration.

Parameters:

base – CACHE64_POLSEL peripheral base address.
config – Pointer to a user-defined configuration structure.

Return values:

kStatus_Success – CACHE64 initialize succeed

void CACHE64_GetDefaultConfig(cache64_config_t *config)

Gets the default configuration structure.

This function initializes the CACHE64 configuration structure to a default value. The default values are first region covers whole cacheable area, and policy set to write back.

Parameters:

config – Pointer to a configuration structure.

void CACHE64_EnableCache(CACHE64_CTRL_Type *base)

Enables the cache.

Parameters:

base – CACHE64_CTRL peripheral base address.

void CACHE64_DisableCache(CACHE64_CTRL_Type *base)

Disables the cache.

Parameters:

base – CACHE64_CTRL peripheral base address.

void CACHE64_InvalidateCache(CACHE64_CTRL_Type *base)

Invalidates the cache.

Parameters:

base – CACHE64_CTRL peripheral base address.

void CACHE64_InvalidateCacheByRange(uint32_t address, uint32_t size_byte)

Invalidates cache by range.

Note

Address and size should be aligned to “CACHE64_LINESIZE_BYTE”. The startAddr here will be forced to align to CACHE64_LINESIZE_BYTE if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address of cache.
size_byte – size of the memory to be invalidated, should be larger than 0.

void CACHE64_CleanCache(CACHE64_CTRL_Type *base)

Cleans the cache.

Parameters:

base – CACHE64_CTRL peripheral base address.

void CACHE64_CleanCacheByRange(uint32_t address, uint32_t size_byte)

Cleans cache by range.

Note

Address and size should be aligned to “CACHE64_LINESIZE_BYTE”. The startAddr here will be forced to align to CACHE64_LINESIZE_BYTE if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address of cache.
size_byte – size of the memory to be cleaned, should be larger than 0.

void CACHE64_CleanInvalidateCache(CACHE64_CTRL_Type *base)

Cleans and invalidates the cache.

Parameters:

base – CACHE64_CTRL peripheral base address.

void CACHE64_CleanInvalidateCacheByRange(uint32_t address, uint32_t size_byte)

Cleans and invalidate cache by range.

Note

Address and size should be aligned to “CACHE64_LINESIZE_BYTE”. The startAddr here will be forced to align to CACHE64_LINESIZE_BYTE if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address of cache.
size_byte – size of the memory to be Cleaned and Invalidated, should be larger than 0.

void CACHE64_EnableWriteBuffer(CACHE64_CTRL_Type *base, bool enable)

Enables/disables the write buffer.

Parameters:

base – CACHE64_CTRL peripheral base address.
enable – The enable or disable flag. true - enable the write buffer. false - disable the write buffer.

static inline void ICACHE_InvalidateByRange(uint32_t address, uint32_t size_byte)

Invalidates instruction cache by range.

Note

Address and size should be aligned to CACHE64_LINESIZE_BYTE due to the cache operation unit FSL_FEATURE_CACHE64_CTRL_LINESIZE_BYTE. The startAddr here will be forced to align to the cache line size if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address.
size_byte – size of the memory to be invalidated, should be larger than 0.

static inline void DCACHE_InvalidateByRange(uint32_t address, uint32_t size_byte)

Invalidates data cache by range.

Note

Address and size should be aligned to CACHE64_LINESIZE_BYTE due to the cache operation unit FSL_FEATURE_CACHE64_CTRL_LINESIZE_BYTE. The startAddr here will be forced to align to the cache line size if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address.
size_byte – size of the memory to be invalidated, should be larger than 0.

static inline void DCACHE_CleanByRange(uint32_t address, uint32_t size_byte)

Clean data cache by range.

Note

Address and size should be aligned to CACHE64_LINESIZE_BYTE due to the cache operation unit FSL_FEATURE_CACHE64_CTRL_LINESIZE_BYTE. The startAddr here will be forced to align to the cache line size if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address.
size_byte – size of the memory to be cleaned, should be larger than 0.

static inline void DCACHE_CleanInvalidateByRange(uint32_t address, uint32_t size_byte)

Cleans and Invalidates data cache by range.

Note

Address and size should be aligned to CACHE64_LINESIZE_BYTE due to the cache operation unit FSL_FEATURE_CACHE64_CTRL_LINESIZE_BYTE. The startAddr here will be forced to align to the cache line size if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address.
size_byte – size of the memory to be Cleaned and Invalidated, should be larger than 0.

FSL_CACHE_DRIVER_VERSION: cache driver version.

enum _cache64_policy

Level 2 cache controller way size.

Values:

enumerator kCACHE64_PolicyNonCacheable: Non-cacheable

enumerator kCACHE64_PolicyWriteThrough: Write through

enumerator kCACHE64_PolicyWriteBack: Write back

typedef enum _cache64_policy cache64_policy_t: Level 2 cache controller way size.

typedef struct _cache64_config cache64_config_t: CACHE64 configuration structure.

CACHE64_LINESIZE_BYTE: cache line size.

CACHE64_REGION_NUM: cache region number.

CACHE64_REGION_ALIGNMENT: cache region alignment.

struct _cache64_config

#include <fsl_cache.h>

CACHE64 configuration structure.

Public Members

uint32_t boundaryAddr[(3U) - 1]: < The cache controller can divide whole memory into 3 regions. Boundary address is the FlexSPI internal address (start from 0) instead of system address (start from FlexSPI AMBA base) to split adjacent regions and must be 1KB aligned. The boundary address itself locates in upper region. Cacheable policy for each region.

CDOG

status_t CDOG_Init(CDOG_Type *base, cdog_config_t *conf)

Initialize CDOG.

This function initializes CDOG block and setting.

Parameters:

base – CDOG peripheral base address
conf – CDOG configuration structure

Returns:

Status of the init operation

void CDOG_Deinit(CDOG_Type *base)

Deinitialize CDOG.

This function deinitializes CDOG secure counter.

Parameters:

base – CDOG peripheral base address

void CDOG_GetDefaultConfig(cdog_config_t *conf)

Sets the default configuration of CDOG.

This function initialize CDOG config structure to default values.

Parameters:

conf – CDOG configuration structure

void CDOG_Stop(CDOG_Type *base, uint32_t stop)

Stops secure counter and instruction timer.

This function stops instruction timer and secure counter. This also change state od CDOG to IDLE.

Parameters:

base – CDOG peripheral base address
stop – expected value which will be compared with value of secure counter

void CDOG_Start(CDOG_Type *base, uint32_t reload, uint32_t start)

Sets secure counter and instruction timer values.

This function sets value in RELOAD and START registers for instruction timer and secure counter

Parameters:

base – CDOG peripheral base address
reload – reload value
start – start value

void CDOG_Check(CDOG_Type *base, uint32_t check)

Checks secure counter.

This function compares stop value in handler with secure counter value by writting to RELOAD refister.

Parameters:

base – CDOG peripheral base address
check – expected (stop) value

void CDOG_Set(CDOG_Type *base, uint32_t stop, uint32_t reload, uint32_t start)

Sets secure counter and instruction timer values.

This function sets value in STOP, RELOAD and START registers for instruction timer and secure counter.

Parameters:

base – CDOG peripheral base address
stop – expected value which will be compared with value of secure counter
reload – reload value for instruction timer
start – start value for secure timer

void CDOG_Add(CDOG_Type *base, uint32_t add)

Add value to secure counter.

This function add specified value to secure counter.

Parameters:

base – CDOG peripheral base address.
add – Value to be added.

void CDOG_Add1(CDOG_Type *base)

Add 1 to secure counter.

This function add 1 to secure counter.

Parameters:

base – CDOG peripheral base address.

void CDOG_Add16(CDOG_Type *base)

Add 16 to secure counter.

This function add 16 to secure counter.

Parameters:

base – CDOG peripheral base address.

void CDOG_Add256(CDOG_Type *base)

Add 256 to secure counter.

This function add 256 to secure counter.

Parameters:

base – CDOG peripheral base address.

void CDOG_Sub(CDOG_Type *base, uint32_t sub)

brief Substract value to secure counter

This function substract specified value to secure counter.

param base CDOG peripheral base address. param sub Value to be substracted.

void CDOG_Sub1(CDOG_Type *base)

Substract 1 from secure counter.

This function substract specified 1 from secure counter.

Parameters:

base – CDOG peripheral base address.

void CDOG_Sub16(CDOG_Type *base)

Substract 16 from secure counter.

This function substract specified 16 from secure counter.

Parameters:

base – CDOG peripheral base address.

void CDOG_Sub256(CDOG_Type *base)

Substract 256 from secure counter.

This function substract specified 256 from secure counter.

Parameters:

base – CDOG peripheral base address.

void CDOG_WritePersistent(CDOG_Type *base, uint32_t value)

Set the CDOG persistent word.

Parameters:

base – CDOG peripheral base address.
value – The value to be written.

uint32_t CDOG_ReadPersistent(CDOG_Type *base)

Get the CDOG persistent word.

Parameters:

base – CDOG peripheral base address.

Returns:

The persistent word.

FSL_CDOG_DRIVER_VERSION

Defines CDOG driver version 2.1.3.

Change log:

Version 2.1.3
- Re-design multiple instance IRQs and Clocks
- Add fix for RESTART command errata
Version 2.1.2
- Support multiple IRQs
- Fix default CONTROL values
Version 2.1.1
- Remove bit CONTROL[CONTROL_CTRL]
Version 2.1.0
- Rename CWT to CDOG
Version 2.0.2
- Fix MISRA-2012 issues
Version 2.0.1
- Fix doxygen issues
Version 2.0.0
- initial version

enum __cdog_debug_Action_ctrl_enum

Values:

enumerator kCDOG_DebugHaltCtrl_Run

enumerator kCDOG_DebugHaltCtrl_Pause

enum __cdog_irq_pause_ctrl_enum

Values:

enumerator kCDOG_IrqPauseCtrl_Run

enumerator kCDOG_IrqPauseCtrl_Pause

enum __cdog_fault_ctrl_enum

Values:

enumerator kCDOG_FaultCtrl_EnableReset

enumerator kCDOG_FaultCtrl_EnableInterrupt

enumerator kCDOG_FaultCtrl_NoAction

enum __code_lock_ctrl_enum

Values:

enumerator kCDOG_LockCtrl_Lock

enumerator kCDOG_LockCtrl_Unlock

typedef uint32_t secure_counter_t

SC_ADD(add)

SC_ADD1

SC_ADD16

SC_ADD256

SC_SUB(sub)

SC_SUB1

SC_SUB16

SC_SUB256

SC_CHECK(val)

struct cdog_config_t: #include <fsl_cdog.h>

Clock Driver

enum _clock_name

Clock name used to get clock frequency.

Values:

enumerator kCLOCK_CoreSysClk: Core clock (aka HCLK)

enumerator kCLOCK_BusClk: Bus clock (AHB/APB clock, aka HCLK)

enumerator kCLOCK_MclkClk: MCLK, to MCLK pin

enum _clock_ip_name

Peripheral clock name difinition used for clock gate.

Values:

enumerator kCLOCK_IpInvalid

enumerator kCLOCK_TcpuMciClk

enumerator kCLOCK_TcpuMciFlexspiClk

enumerator kCLOCK_TddrMciEnetClk

enumerator kCLOCK_TddrMciFlexspiClk

enumerator kCLOCK_T3PllMciIrcClk

enumerator kCLOCK_T3PllMci256mClk

enumerator kCLOCK_T3PllMci213mClk

enumerator kCLOCK_T3PllMciFlexspiClk

enumerator kCLOCK_RefClkSys

enumerator kCLOCK_RefClkTcpu

enumerator kCLOCK_RefClkTddr

enumerator kCLOCK_RefClkAud

enumerator kCLOCK_RefClkUsb

enumerator kCLOCK_RefClkCauSlp

enumerator kCLOCK_Cpu

enumerator kCLOCK_Matrix

enumerator kCLOCK_Romcp

enumerator kCLOCK_PowerQuad

enumerator kCLOCK_Pkc

enumerator kCLOCK_Els

enumerator kCLOCK_Puf

enumerator kCLOCK_Flexspi

enumerator kCLOCK_Hpu

enumerator kCLOCK_Usb

enumerator kCLOCK_Sct

enumerator kCLOCK_AonMem

enumerator kCLOCK_Gdma

enumerator kCLOCK_Dma0

enumerator kCLOCK_Dma1

enumerator kCLOCK_Sdio

enumerator kCLOCK_ElsApb

enumerator kCLOCK_SdioSlv

enumerator kCLOCK_Gau

enumerator kCLOCK_Otp

enumerator kCLOCK_SecureGpio

enumerator kCLOCK_EnetIpg

enumerator kCLOCK_EnetIpgS

enumerator kCLOCK_Trng

enumerator kCLOCK_Utick

enumerator kCLOCK_Wwdt0

enumerator kCLOCK_Usim

enumerator kCLOCK_Itrc

enumerator kCLOCK_FreeMrt

enumerator kCLOCK_Lcdic

enumerator kCLOCK_Flexcomm0

enumerator kCLOCK_Flexcomm1

enumerator kCLOCK_Flexcomm2

enumerator kCLOCK_Flexcomm3

enumerator kCLOCK_Flexcomm14

enumerator kCLOCK_Dmic0

enumerator kCLOCK_OsEventTimer

enumerator kCLOCK_HsGpio0

enumerator kCLOCK_HsGpio1

enumerator kCLOCK_Crc

enumerator kCLOCK_Freqme

enumerator kCLOCK_Ct32b0

enumerator kCLOCK_Ct32b1

enumerator kCLOCK_Ct32b2

enumerator kCLOCK_Ct32b3

enumerator kCLOCK_Ct32b4

enumerator kCLOCK_Pmu

enumerator kCLOCK_Rtc

enumerator kCLOCK_Mrt

enumerator kCLOCK_Pint

enumerator kCLOCK_InputMux

enum _clock_attach_id

Peripheral clock source selection definition.

Values:

enumerator kXTAL_to_SYSOSC_CLK

enumerator kCLKIN_to_SYSOSC_CLK

enumerator kNONE_to_SYSOSC_CLK

enumerator kSYSOSC_to_MAIN_CLK

enumerator kFFRO_DIV4_to_MAIN_CLK

enumerator kLPOSC_to_MAIN_CLK

enumerator kFFRO_to_MAIN_CLK

enumerator kSFRO_to_MAIN_CLK

enumerator kMAIN_PLL_to_MAIN_CLK

enumerator kCLK32K_to_MAIN_CLK

enumerator kMAIN_CLK_to_FLEXSPI_CLK

enumerator kT3PLL_MCI_FLEXSPI_to_FLEXSPI_CLK

enumerator kAUX0_PLL_to_FLEXSPI_CLK

enumerator kTCPU_MCI_FLEXSPI_to_FLEXSPI_CLK

enumerator kAUX1_PLL_to_FLEXSPI_CLK

enumerator kTDDR_MCI_FLEXSPI_to_FLEXSPI_CLK

enumerator kT3PLL_MCI_256M_to_FLEXSPI_CLK

enumerator kNONE_to_FLEXSPI_CLK

enumerator kMAIN_CLK_to_SCT_CLK

enumerator kMAIN_PLL_to_SCT_CLK

enumerator kAUX0_PLL_to_SCT_CLK

enumerator kFFRO_to_SCT_CLK

enumerator kAUX1_PLL_to_SCT_CLK

enumerator kAUDIO_PLL_to_SCT_CLK

enumerator kNONE_to_SCT_CLK

enumerator kLPOSC_to_UTICK_CLK

enumerator kMAIN_CLK_to_UTICK_CLK

enumerator kNONE_to_UTICK_CLK

enumerator kLPOSC_to_WDT0_CLK

enumerator kMAIN_CLK_to_WDT0_CLK

enumerator kNONE_to_WDT0_CLK

enumerator kSYSTICK_DIV_to_SYSTICK_CLK

enumerator kLPOSC_to_SYSTICK_CLK

enumerator kCLK32K_to_SYSTICK_CLK

enumerator kSFRO_to_SYSTICK_CLK

enumerator kNONE_to_SYSTICK_CLK

enumerator kMAIN_CLK_to_USIM_CLK

enumerator kAUDIO_PLL_to_USIM_CLK

enumerator kFFRO_to_USIM_CLK

enumerator kNONE_to_USIM_CLK

enumerator kMAIN_CLK_to_LCD_CLK

enumerator kT3PLL_MCI_FLEXSPI_to_LCD_CLK

enumerator kTCPU_MCI_FLEXSPI_to_LCD_CLK

enumerator kTDDR_MCI_FLEXSPI_to_LCD_CLK

enumerator kNONE_to_LCD_CLK

enumerator kMAIN_CLK_to_GAU_CLK

enumerator kT3PLL_MCI_256M_to_GAU_CLK

enumerator kAVPLL_CH2_to_GAU_CLK

enumerator kNONE_to_GAU_CLK

enumerator kT3PLL_MCI_256M_to_ELS_GDET

enumerator kELS_128M_to_ELS_GDET

enumerator kELS_64M_to_ELS_GDET

enumerator kOTP_FUSE_32M_to_ELS_GDET

enumerator kNONE_to_ELS_GDET

enumerator kLPOSC_to_OSTIMER_CLK

enumerator kCLK32K_to_OSTIMER_CLK

enumerator kHCLK_to_OSTIMER_CLK

enumerator kMAIN_CLK_to_OSTIMER_CLK

enumerator kNONE_to_OSTIMER_CLK

enumerator kSFRO_to_FLEXCOMM0

enumerator kFFRO_to_FLEXCOMM0

enumerator kAUDIO_PLL_to_FLEXCOMM0

enumerator kMCLK_IN_to_FLEXCOMM0

enumerator kFRG_to_FLEXCOMM0

enumerator kNONE_to_FLEXCOMM0

enumerator kSFRO_to_FLEXCOMM1

enumerator kFFRO_to_FLEXCOMM1

enumerator kAUDIO_PLL_to_FLEXCOMM1

enumerator kMCLK_IN_to_FLEXCOMM1

enumerator kFRG_to_FLEXCOMM1

enumerator kNONE_to_FLEXCOMM1

enumerator kSFRO_to_FLEXCOMM2

enumerator kFFRO_to_FLEXCOMM2

enumerator kAUDIO_PLL_to_FLEXCOMM2

enumerator kMCLK_IN_to_FLEXCOMM2

enumerator kFRG_to_FLEXCOMM2

enumerator kNONE_to_FLEXCOMM2

enumerator kSFRO_to_FLEXCOMM3

enumerator kFFRO_to_FLEXCOMM3

enumerator kAUDIO_PLL_to_FLEXCOMM3

enumerator kMCLK_IN_to_FLEXCOMM3

enumerator kFRG_to_FLEXCOMM3

enumerator kNONE_to_FLEXCOMM3

enumerator kSFRO_to_FLEXCOMM14

enumerator kFFRO_to_FLEXCOMM14

enumerator kAUDIO_PLL_to_FLEXCOMM14

enumerator kMCLK_IN_to_FLEXCOMM14

enumerator kFRG_to_FLEXCOMM14

enumerator kNONE_to_FLEXCOMM14

enumerator kSFRO_to_DMIC_CLK

enumerator kFFRO_to_DMIC_CLK

enumerator kAUDIO_PLL_to_DMIC_CLK

enumerator kMCLK_IN_to_DMIC_CLK

enumerator kLPOSC_to_DMIC_CLK

enumerator kCLK32K_to_DMIC_CLK

enumerator kMAIN_CLK_to_DMIC_CLK

enumerator kNONE_to_DMIC_CLK

enumerator kMAIN_CLK_to_CTIMER0

enumerator kSFRO_to_CTIMER0

enumerator kFFRO_to_CTIMER0

enumerator kAUDIO_PLL_to_CTIMER0

enumerator kMCLK_IN_to_CTIMER0

enumerator kLPOSC_to_CTIMER0

enumerator kNONE_to_CTIMER0

enumerator kMAIN_CLK_to_CTIMER1

enumerator kSFRO_to_CTIMER1

enumerator kFFRO_to_CTIMER1

enumerator kAUDIO_PLL_to_CTIMER1

enumerator kMCLK_IN_to_CTIMER1

enumerator kLPOSC_to_CTIMER1

enumerator kNONE_to_CTIMER1

enumerator kMAIN_CLK_to_CTIMER2

enumerator kSFRO_to_CTIMER2

enumerator kFFRO_to_CTIMER2

enumerator kAUDIO_PLL_to_CTIMER2

enumerator kMCLK_IN_to_CTIMER2

enumerator kLPOSC_to_CTIMER2

enumerator kNONE_to_CTIMER2

enumerator kMAIN_CLK_to_CTIMER3

enumerator kSFRO_to_CTIMER3

enumerator kFFRO_to_CTIMER3

enumerator kAUDIO_PLL_to_CTIMER3

enumerator kMCLK_IN_to_CTIMER3

enumerator kLPOSC_to_CTIMER3

enumerator kNONE_to_CTIMER3

enumerator kFFRO_to_MCLK_CLK

enumerator kAUDIO_PLL_to_MCLK_CLK

enumerator kMAIN_CLK_to_MCLK_CLK

enumerator kNONE_to_MCLK_CLK

enumerator kSFRO_to_CLKOUT

enumerator kSYSOSC_to_CLKOUT

enumerator kLPOSC_to_CLKOUT

enumerator kFFRO_to_CLKOUT

enumerator kMAIN_CLK_to_CLKOUT

enumerator kREFCLK_SYS_to_CLKOUT

enumerator kAVPLL_CH2_to_CLKOUT

enumerator kMAIN_PLL_to_CLKOUT

enumerator kAUX0_PLL_to_CLKOUT

enumerator kAUX1_PLL_to_CLKOUT

enumerator kAUDIO_PLL_to_CLKOUT

enumerator kCLK32K_to_CLKOUT

enumerator kTCPU_MCI_FLEXSPI_to_CLKOUT

enumerator kTDDR_MCI_FLEXSPI_to_CLKOUT

enumerator kT3PLL_MCI_FLEXSPI_to_CLKOUT

enumerator kT3PLL_MCI_256M_to_CLKOUT

enumerator kCAU_SLP_REF_CLK_to_CLKOUT

enumerator kTDDR_MCI_ENET_to_CLKOUT

enumerator kNONE_to_CLKOUT

enumerator kRC32K_to_CLK32K

enumerator kXTAL32K_to_CLK32K

enumerator kNCO32K_to_CLK32K

enum _clock_div_name

Clock divider definition.

Values:

enumerator kCLOCK_DivMainPllClk

enumerator kCLOCK_DivAux0PllClk

enumerator kCLOCK_DivAux1PllClk

enumerator kCLOCK_DivSysCpuAhbClk

enumerator kCLOCK_DivPfc1Clk

enumerator kCLOCK_DivFlexspiClk

enumerator kCLOCK_DivSctClk

enumerator kCLOCK_DivUsbHsFclk

enumerator kCLOCK_DivSystickClk

enumerator kCLOCK_DivLcdClk

enumerator kCLOCK_DivGauClk

enumerator kCLOCK_DivUsimClk

enumerator kCLOCK_DivPmuFclk

enumerator kCLOCK_DivAudioPllClk

enumerator kCLOCK_DivPllFrgClk

enumerator kCLOCK_DivDmicClk

enumerator kCLOCK_DivMclkClk

enumerator kCLOCK_DivClockOut

enum _clock_sfg_clk_src

SFG clock source.

Values:

enumerator kCLOCK_FrgMainClk: Main System clock

enumerator kCLOCK_FrgPllDiv: Main pll clock divider

enumerator kCLOCK_FrgSFro: 16MHz FRO

enumerator kCLOCK_FrgFFro: FRO48/60

enum clock_tcpu_flexspi_div_t

TCPU PLL divider for tcpu_mci_flexspi_clk.

Values:

enumerator kCLOCK_TcpuFlexspiDiv12: Divided by 12

enumerator kCLOCK_TcpuFlexspiDiv11: Divided by 11

enumerator kCLOCK_TcpuFlexspiDiv10: Divided by 10

enumerator kCLOCK_TcpuFlexspiDiv9: Divided by 9

enum clock_tddr_flexspi_div_t

TDDR PLL divider for tddr_mci_flexspi_clk.

Values:

enumerator kCLOCK_TddrFlexspiDiv11: Divided by 11

enumerator kCLOCK_TddrFlexspiDiv10: Divided by 10

enumerator kCLOCK_TddrFlexspiDiv9: Divided by 9

enumerator kCLOCK_TddrFlexspiDiv8: Divided by 8

enum clock_t3_mci_irc_config_t

T3 PLL IRC configuration.

Values:

enumerator kCLOCK_T3MciIrc60m: T3 MCI IRC 59.53MHz

enumerator kCLOCK_T3MciIrc48m: T3 MCI IRC 48.30MHz

enum clock_avpll_ch_freq_t

AVPLL channel1 frequency configuration.

Values:

enumerator kCLOCK_AvPllChUnchanged: AVPLL channel frequency unchanged.

enumerator kCLOCK_AvPllChFreq2p048m: AVPLL channel frequency 2.048MHz

enumerator kCLOCK_AvPllChFreq4p096m: AVPLL channel frequency 4.096MHz

enumerator kCLOCK_AvPllChFreq6p144m: AVPLL channel frequency 6.144MHz

enumerator kCLOCK_AvPllChFreq8p192m: AVPLL channel frequency 8.192MHz

enumerator kCLOCK_AvPllChFreq11p2896m: AVPLL channel frequency 11.2896MHz

enumerator kCLOCK_AvPllChFreq12m: AVPLL channel frequency 12MHz

enumerator kCLOCK_AvPllChFreq12p288m: AVPLL channel frequency 12.288MHz

enumerator kCLOCK_AvPllChFreq24p576m: AVPLL channel frequency 24.576MHz

enumerator kCLOCK_AvPllChFreq64m: AVPLL channel frequency 64MHz

enumerator kCLOCK_AvPllChFreq98p304m: AVPLL channel frequency 98.304MHz

typedef enum _clock_name clock_name_t: Clock name used to get clock frequency.

typedef enum _clock_ip_name clock_ip_name_t: Peripheral clock name difinition used for clock gate.

typedef enum _clock_attach_id clock_attach_id_t: Peripheral clock source selection definition.

typedef enum _clock_div_name clock_div_name_t: Clock divider definition.

typedef enum _clock_sfg_clk_src clock_sfg_clk_src_t: SFG clock source.

typedef struct _clock_frg_clk_config clock_frg_clk_config_t: PLL configuration for FRG.

volatile uint32_t g_clkinFreq

External CLK_IN pin clock frequency (clkin) clock frequency.

The CLK_IN pin (clkin) clock frequency in Hz, when the clock is setup, use the function CLOCK_SetClkinFreq to set the value in to clock driver. For example, if CLK_IN is 16MHz,

CLOCK_SetClkinFreq(16000000);

volatile uint32_t g_mclkinFreq

External MCLK IN clock frequency.

The MCLK in (mclk_in) PIN clock frequency in Hz, when the clock is setup, use the function CLOCK_SetMclkInFreq to set the value in to clock driver. For example, if mclk_In is 16MHz,

CLOCK_SetMclkInFreq(16000000);

uint32_t CLOCK_GetT3PllMciIrcClkFreq(void)

Return Frequency of t3pll_mci_48_60m_irc.

Returns:: Frequency of t3pll_mci_48_60m_irc

uint32_t CLOCK_GetT3PllMci213mClkFreq(void)

Return Frequency of t3pll_mci_213p3m.

Returns:: Frequency of t3pll_mci_213p3m

uint32_t CLOCK_GetT3PllMci256mClkFreq(void)

Return Frequency of t3pll_mci_256m.

Returns:: Frequency of t3pll_mci_256m

uint32_t CLOCK_GetT3PllMciFlexspiClkFreq(void)

Return Frequency of t3pll_mci_flexspi_clk.

Returns:: Frequency of t3pll_mci_flexspi_clk

uint32_t CLOCK_GetTcpuMciClkFreq(void)

Return Frequency of tcpu_mci_clk.

Returns:: Frequency of tcpu_mci_clk

uint32_t CLOCK_GetTcpuMciFlexspiClkFreq(void)

Return Frequency of tcpu_mci_flexspi_clk.

Returns:: Frequency of tcpu_mci_flexspi_clk

uint32_t CLOCK_GetTddrMciFlexspiClkFreq(void)

Return Frequency of tddr_mci_flexspi_clk.

Returns:: Frequency of tddr_mci_flexspi_clk

uint32_t CLOCK_GetTddrMciEnetClkFreq(void)

Return Frequency of tddr_mci_enet_clk.

Returns:: Frequency of tddr_mci_enet_clk

void CLOCK_EnableClock(clock_ip_name_t clk)

Enable the clock for specific IP.

Parameters:

clk – Which clock to enable, see clock_ip_name_t.

void CLOCK_DisableClock(clock_ip_name_t clk)

Disable the clock for specific IP.

Parameters:

clk – Which clock to disable, see clock_ip_name_t.

void CLOCK_AttachClk(clock_attach_id_t connection)

Configure the clock selection muxes.

Parameters:

connection – : Clock to be configured.

void CLOCK_SetClkDiv(clock_div_name_t name, uint32_t divider)

Setup clock dividers.

Parameters:

name – : Clock divider name
divider – : Value to be divided.

uint32_t CLOCK_GetFreq(clock_name_t clockName)

Return Frequency of selected clock.

Returns:: Frequency of selected clock

uint32_t CLOCK_GetFRGClock(uint32_t id)

Return Input frequency for the Fractional baud rate generator.

Returns:: Input Frequency for FRG

void CLOCK_SetFRGClock(const clock_frg_clk_config_t *config)

Set output of the Fractional baud rate generator.

Parameters:

config – : Configuration to set to FRGn clock.

uint32_t CLOCK_GetFFroFreq(void)

Return Frequency of FFRO.

Returns:: Frequency of FFRO

uint32_t CLOCK_GetSFroFreq(void)

Return Frequency of SFRO.

Returns:: Frequency of SFRO

uint32_t CLOCK_GetAvPllCh1Freq(void)

Return Frequency of AUDIO PLL (AVPLL CH1)

Returns:: Frequency of AUDIO PLL

uint32_t CLOCK_GetAvPllCh2Freq(void)

Return Frequency of AVPLL CH2.

Returns:: Frequency of AVPLL CH2

uint32_t CLOCK_GetMainClkFreq(void)

Return Frequency of main clk.

Returns:: Frequency of main clk

uint32_t CLOCK_GetCoreSysClkFreq(void)

Return Frequency of core/bus clk.

Returns:: Frequency of core/bus clk

uint32_t CLOCK_GetSystickClkFreq(void)

Return Frequency of systick clk.

Returns:: Frequency of systick clk

static inline uint32_t CLOCK_GetSysOscFreq(void)

Return Frequency of sys osc Clock.

Returns:: Frequency of sys osc Clock. Or CLK_IN pin frequency.

static inline uint32_t CLOCK_GetMclkInClkFreq(void)

Return Frequency of MCLK Input Clock.

Returns:: Frequency of MCLK input Clock.

static inline uint32_t CLOCK_GetLpOscFreq(void)

Return Frequency of LPOSC.

Returns:: Frequency of LPOSC

static inline uint32_t CLOCK_GetClk32KFreq(void)

Return Frequency of CLK_32K.

Returns:: Frequency of 32KHz osc

void CLOCK_EnableXtal32K(bool enable)

Enables and disables 32KHz XTAL.

Parameters:

enable – : true to enable 32k XTAL clock, false to disable clock

void CLOCK_EnableRtc32K(bool enable)

Enables and disables RTC 32KHz.

Parameters:

enable – : true to enable 32k RTC clock, false to disable clock

static inline void CLOCK_SetClkinFreq(uint32_t freq)

Set the CLKIN (CLKIN pin) frequency based on GPIO4 input.

Parameters:

freq – : The CLK_IN pin input clock frequency in Hz.

static inline void CLOCK_SetMclkinFreq(uint32_t freq)

Set the MCLK in (mclk_in) clock frequency based on board setting.

Parameters:

freq – : The MCLK input clock frequency in Hz.

uint32_t CLOCK_GetDmicClkFreq(void)

Return Frequency of DMIC clk.

Returns:: Frequency of DMIC clk

uint32_t CLOCK_GetLcdClkFreq(void)

Return Frequency of LCD clk.

Returns:: Frequency of LCD clk

uint32_t CLOCK_GetWdtClkFreq(void)

Return Frequency of WDT clk.

Returns:: Frequency of WDT clk

uint32_t CLOCK_GetMclkClkFreq(void)

Return Frequency of mclk.

Returns:: Frequency of mclk clk

uint32_t CLOCK_GetSctClkFreq(void)

Return Frequency of sct.

Returns:: Frequency of sct clk

uint32_t CLOCK_GetFlexCommClkFreq(uint32_t id)

Return Frequency of Flexcomm functional Clock.

Parameters:

id – : flexcomm index to get frequency.

Returns:

Frequency of Flexcomm functional Clock

uint32_t CLOCK_GetCTimerClkFreq(uint32_t id)

Return Frequency of CTimer Clock.

Parameters:

id – : ctimer index to get frequency.

Returns:

Frequency of CTimer Clock

uint32_t CLOCK_GetUtickClkFreq(void)

Return Frequency of Utick Clock.

Returns:: Frequency of Utick Clock

uint32_t CLOCK_GetFlexspiClkFreq(void)

Return Frequency of Flexspi Clock.

Returns:: Frequency of Flexspi.

uint32_t CLOCK_GetUsimClkFreq(void)

Return Frequency of USIM Clock.

Returns:: Frequency of USIM.

uint32_t CLOCK_GetGauClkFreq(void)

Return Frequency of GAU Clock.

Returns:: Frequency of GAU.

uint32_t CLOCK_GetOSTimerClkFreq(void)

Return Frequency of OSTimer Clock.

Returns:: Frequency of OSTimer.

uint32_t CLOCK_InitTcpuRefClk(uint32_t targetHz, clock_tcpu_flexspi_div_t div)

Initialize TCPU FVCO to target frequency. For 40MHz XTAL, FVCO ranges from 3000MHz to 3840MHz. For 38.4MHz XTAL, FVCO ranges from 2995.2MHz to 3840MHz.

Parameters:

targetHz – : Target FVCO frequency in Hz.
div – : Divider for tcpu_mci_flexspi_clk.

Returns:

Actual FVCO frequency in Hz.

void CLOCK_DeinitTcpuRefClk(void): Deinit the TCPU reference clock.

void CLOCK_InitTddrRefClk(clock_tddr_flexspi_div_t div)

Initialize the TDDR reference clock.

Parameters:

div – : Divider for tddr_mci_flexspi_clk.

void CLOCK_DeinitTddrRefClk(void): Deinit the TDDR reference clock.

void CLOCK_InitT3RefClk(clock_t3_mci_irc_config_t cnfg)

Initialize the T3 reference clock.

Parameters:

cnfg – : t3pll_mci_48_60m_irc clock configuration

void CLOCK_DeinitT3RefClk(void): Deinit the T3 reference clock.

void CLOCK_InitAvPll(const clock_avpll_config_t *cnfg)

Initialize the AVPLL. Both channel 1 and 2 are enabled.

Parameters:

cnfg – : AVPLL clock configuration

void CLOCK_DeinitAvPll(void): Deinit the AVPLL. All channels are disabled.

void CLOCK_ConfigAvPllCh(clock_avpll_ch_freq_t ch1Freq, clock_avpll_ch_freq_t ch2Freq, bool enableCali)

Update the AVPLL channel configuration. Enable/Disable state keeps unchanged.

Parameters:

ch1Freq – : Channel 1 frequency to set.
ch2Freq – : Channel 2 frequency to set.
enableCali – : Enable AVPLL calibration.

void CLOCK_EnableAvPllCh(bool enableCh1, bool enableCh2, bool enableCali)

Enable the AVPLL channel.

Parameters:

enableCh1 – : Enable AVPLL channel1, channel unchanged on false.
enableCh2 – : Enable AVPLL channel2, channel unchanged on false.
enableCali – : Enable AVPLL calibration.

void CLOCK_DisableAvPllCh(bool disableCh1, bool disableCh2)

Disable the AVPLL.

Parameters:

disableCh1 – : Disable AVPLL channel1, channel unchanged on false.
disableCh2 – : Disable AVPLL channel2, channel unchanged on false.

void CLOCK_EnableUsbhsPhyClock(void)

Enable USB HS PHY PLL clock.

This function enables USB HS PHY PLL clock.

void CLOCK_DisableUsbhsPhyClock(void)

Disable USB HS PHY PLL clock.

This function disables USB HS PHY PLL clock.

FSL_CLOCK_DRIVER_VERSION: CLOCK driver version 2.4.0.

SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY

GPIO_CLOCKS: Clock ip name array for GPIO.

CACHE64_CLOCKS: Clock ip name array for CACHE64.

FLEXSPI_CLOCKS: Clock ip name array for FLEXSPI.

FLEXCOMM_CLOCKS: Clock ip name array for FLEXCOMM.

USART_CLOCKS: Clock ip name array for LPUART.

I2C_CLOCKS: Clock ip name array for I2C.

SPI_CLOCKS: Clock ip name array for SPI.

ACOMP_CLOCKS: Clock ip name array for ACOMP.

ADC_CLOCKS: Clock ip name array for ADC.

DAC_CLOCKS: Clock ip name array for DAC.

LCDIC_CLOCKS: Clock ip name array for LCDIC.

DMA_CLOCKS: Clock ip name array for DMA.

DMIC_CLOCKS: Clock ip name array for DMIC.

ENET_CLOCKS: Clock ip name array for ENET.

ENET_EXTRA_CLOCKS: Extra clock ip name array for ENET.

POWERQUAD_CLOCKS: Clock ip name array for Powerquad.

OSTIMER_CLOCKS: Clock ip name array for OSTimer.

CTIMER_CLOCKS: Clock ip name array for CT32B.

UTICK_CLOCKS: Clock ip name array for UTICK.

MRT_CLOCKS: Clock ip name array for MRT.

SCT_CLOCKS: Clock ip name array for SCT.

RTC_CLOCKS: Clock ip name array for RTC.

WWDT_CLOCKS: Clock ip name array for WWDT.

TRNG_CLOCKS: Clock ip name array for TRNG.

USIM_CLOCKS: Clock ip name array for USIM.

CLK_GATE_REG_OFFSET_SHIFT: Clock gate name used for CLOCK_EnableClock/CLOCK_DisableClock.

CLK_GATE_REG_OFFSET_MASK

CLK_GATE_BIT_SHIFT_SHIFT

CLK_GATE_BIT_SHIFT_MASK

CLK_GATE_DEFINE(reg_offset, bit_shift)

CLK_GATE_ABSTRACT_REG_OFFSET(x)

CLK_GATE_ABSTRACT_BITS_SHIFT(x)

CLK_CTL0_PSCCTL0

CLK_CTL0_PSCCTL1

CLK_CTL0_PSCCTL2

CLK_CTL1_PSCCTL0

CLK_CTL1_PSCCTL1

CLK_CTL1_PSCCTL2

SYS_CLK_GATE_FLAG_MASK

SYS_CLK_GATE_DEFINE(bit_shift)

SYS_CLK_GATE_BIT_MASK(x)

CLKCTL0_TUPLE_MUXA(reg, choice)

CLKCTL0_TUPLE_MUXB(reg, choice)

CLKCTL1_TUPLE_FLAG_MASK

CLKCTL1_TUPLE_MUXA(reg, choice)

CLKCTL1_TUPLE_MUXB(reg, choice)

CLKCTL_TUPLE_REG(base, tuple)

CLKCTL_TUPLE_SEL(tuple)

CLKOUT_TUPLE_MUX_AVAIL

CLKOUT_TUPLE_MUX(ch0, ch1, ch2)

PMU_TUPLE_MUX_AVAIL

PMU_TUPLE_MUX(reg, choice)

PMU_TUPLE_REG(base, tuple)

PMU_TUPLE_SEL(tuple)

uint8_t num: FRG clock

clock_sfg_clk_src_t sfg_clock_src: Clock source

uint8_t divider: Denominator of the fractional divider.

uint8_t mult: Numerator of the fractional divider.

clock_avpll_ch_freq_t ch1Freq: AVPLL channel 1 frequency configuration

clock_avpll_ch_freq_t ch2Freq: AVPLL channel 2 frequency configuration

bool enableCali: Enable calibration

FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL

Configure whether driver controls clock.

When set to 0, peripheral drivers will enable clock in initialize function and disable clock in de-initialize function. When set to 1, peripheral driver will not control the clock, application could control the clock out of the driver.

Note

All drivers share this feature switcher. If it is set to 1, application should handle clock enable and disable for all drivers.

struct _clock_frg_clk_config: #include <fsl_clock.h>

PLL configuration for FRG.

struct clock_avpll_config_t: #include <fsl_clock.h>

AVPLL configuration.

CRC: Cyclic Redundancy Check Driver

FSL_CRC_DRIVER_VERSION

CRC driver version. Version 2.1.1.

Current version: 2.1.1

Change log:

Version 2.0.0
- initial version
Version 2.0.1
- add explicit type cast when writing to WR_DATA
Version 2.0.2
- Fix MISRA issue
Version 2.1.0
- Add CRC_WriteSeed function
Version 2.1.1
- Fix MISRA issue

enum _crc_polynomial

CRC polynomials to use.

Values:

enumerator kCRC_Polynomial_CRC_CCITT: x^16+x^12+x^5+1

enumerator kCRC_Polynomial_CRC_16: x^16+x^15+x^2+1

enumerator kCRC_Polynomial_CRC_32: x^32+x^26+x^23+x^22+x^16+x^12+x^11+x^10+x^8+x^7+x^5+x^4+x^2+x+1

typedef enum _crc_polynomial crc_polynomial_t: CRC polynomials to use.

typedef struct _crc_config crc_config_t

CRC protocol configuration.

This structure holds the configuration for the CRC protocol.

void CRC_Init(CRC_Type *base, const crc_config_t *config)

Enables and configures the CRC peripheral module.

This functions enables the CRC peripheral clock in the LPC SYSCON block. It also configures the CRC engine and starts checksum computation by writing the seed.

Parameters:

base – CRC peripheral address.
config – CRC module configuration structure.

static inline void CRC_Deinit(CRC_Type *base)

Disables the CRC peripheral module.

This functions disables the CRC peripheral clock in the LPC SYSCON block.

Parameters:

base – CRC peripheral address.

void CRC_Reset(CRC_Type *base)

resets CRC peripheral module.

Parameters:

base – CRC peripheral address.

void CRC_WriteSeed(CRC_Type *base, uint32_t seed)

Write seed to CRC peripheral module.

Parameters:

base – CRC peripheral address.
seed – CRC Seed value.

void CRC_GetDefaultConfig(crc_config_t *config)

Loads default values to CRC protocol configuration structure.

Loads default values to CRC protocol configuration structure. The default values are:

config->polynomial = kCRC_Polynomial_CRC_CCITT;
config->reverseIn = false;
config->complementIn = false;
config->reverseOut = false;
config->complementOut = false;
config->seed = 0xFFFFU;

Parameters:

config – CRC protocol configuration structure

void CRC_GetConfig(CRC_Type *base, crc_config_t *config)

Loads actual values configured in CRC peripheral to CRC protocol configuration structure.

The values, including seed, can be used to resume CRC calculation later.

Parameters:

base – CRC peripheral address.
config – CRC protocol configuration structure

void CRC_WriteData(CRC_Type *base, const uint8_t *data, size_t dataSize)

Writes data to the CRC module.

Writes input data buffer bytes to CRC data register.

Parameters:

base – CRC peripheral address.
data – Input data stream, MSByte in data[0].
dataSize – Size of the input data buffer in bytes.

static inline uint32_t CRC_Get32bitResult(CRC_Type *base)

Reads 32-bit checksum from the CRC module.

Reads CRC data register.

Parameters:

base – CRC peripheral address.

Returns:

final 32-bit checksum, after configured bit reverse and complement operations.

static inline uint16_t CRC_Get16bitResult(CRC_Type *base)

Reads 16-bit checksum from the CRC module.

Reads CRC data register.

Parameters:

base – CRC peripheral address.

Returns:

final 16-bit checksum, after configured bit reverse and complement operations.

CRC_DRIVER_USE_CRC16_CCITT_FALSE_AS_DEFAULT: Default configuration structure filled by CRC_GetDefaultConfig(). Uses CRC-16/CCITT-FALSE as default.

struct _crc_config

#include <fsl_crc.h>

CRC protocol configuration.

This structure holds the configuration for the CRC protocol.

Public Members

crc_polynomial_t polynomial: CRC polynomial.

bool reverseIn: Reverse bits on input.

bool complementIn: Perform 1’s complement on input.

bool reverseOut: Reverse bits on output.

bool complementOut: Perform 1’s complement on output.

uint32_t seed: Starting checksum value.

CTIMER: Standard counter/timers

void CTIMER_Init(CTIMER_Type *base, const ctimer_config_t *config)

Ungates the clock and configures the peripheral for basic operation.

Note

This API should be called at the beginning of the application before using the driver.

Parameters:

base – Ctimer peripheral base address
config – Pointer to the user configuration structure.

void CTIMER_Deinit(CTIMER_Type *base)

Gates the timer clock.

Parameters:

base – Ctimer peripheral base address

void CTIMER_GetDefaultConfig(ctimer_config_t *config)

Fills in the timers configuration structure with the default settings.

The default values are:

config->mode = kCTIMER_TimerMode;
config->input = kCTIMER_Capture_0;
config->prescale = 0;

Parameters:

config – Pointer to the user configuration structure.

status_t CTIMER_SetupPwmPeriod(CTIMER_Type *base, const ctimer_match_t pwmPeriodChannel, ctimer_match_t matchChannel, uint32_t pwmPeriod, uint32_t pulsePeriod, bool enableInt)

Configures the PWM signal parameters.

Enables PWM mode on the match channel passed in and will then setup the match value and other match parameters to generate a PWM signal. This function can manually assign the specified channel to set the PWM cycle.

Note

When setting PWM output from multiple output pins, all should use the same PWM period

Parameters:

base – Ctimer peripheral base address
pwmPeriodChannel – Specify the channel to control the PWM period
matchChannel – Match pin to be used to output the PWM signal
pwmPeriod – PWM period match value
pulsePeriod – Pulse width match value
enableInt – Enable interrupt when the timer value reaches the match value of the PWM pulse, if it is 0 then no interrupt will be generated.

Returns:

kStatus_Success on success kStatus_Fail If matchChannel is equal to pwmPeriodChannel; this channel is reserved to set the PWM cycle If PWM pulse width register value is larger than 0xFFFFFFFF.

status_t CTIMER_SetupPwm(CTIMER_Type *base, const ctimer_match_t pwmPeriodChannel, ctimer_match_t matchChannel, uint8_t dutyCyclePercent, uint32_t pwmFreq_Hz, uint32_t srcClock_Hz, bool enableInt)

Configures the PWM signal parameters.

Enables PWM mode on the match channel passed in and will then setup the match value and other match parameters to generate a PWM signal. This function can manually assign the specified channel to set the PWM cycle.

Note

When setting PWM output from multiple output pins, all should use the same PWM frequency. Please use CTIMER_SetupPwmPeriod to set up the PWM with high resolution.

Parameters:

base – Ctimer peripheral base address
pwmPeriodChannel – Specify the channel to control the PWM period
matchChannel – Match pin to be used to output the PWM signal
dutyCyclePercent – PWM pulse width; the value should be between 0 to 100
pwmFreq_Hz – PWM signal frequency in Hz
srcClock_Hz – Timer counter clock in Hz
enableInt – Enable interrupt when the timer value reaches the match value of the PWM pulse, if it is 0 then no interrupt will be generated.

static inline void CTIMER_UpdatePwmPulsePeriod(CTIMER_Type *base, ctimer_match_t matchChannel, uint32_t pulsePeriod)

Updates the pulse period of an active PWM signal.

Parameters:

base – Ctimer peripheral base address
matchChannel – Match pin to be used to output the PWM signal
pulsePeriod – New PWM pulse width match value

status_t CTIMER_UpdatePwmDutycycle(CTIMER_Type *base, const ctimer_match_t pwmPeriodChannel, ctimer_match_t matchChannel, uint8_t dutyCyclePercent)

Updates the duty cycle of an active PWM signal.

Note

Please use CTIMER_SetupPwmPeriod to update the PWM with high resolution. This function can manually assign the specified channel to set the PWM cycle.

Parameters:

base – Ctimer peripheral base address
pwmPeriodChannel – Specify the channel to control the PWM period
matchChannel – Match pin to be used to output the PWM signal
dutyCyclePercent – New PWM pulse width; the value should be between 0 to 100

Returns:

kStatus_Success on success kStatus_Fail If PWM pulse width register value is larger than 0xFFFFFFFF.

static inline void CTIMER_EnableInterrupts(CTIMER_Type *base, uint32_t mask)

Enables the selected Timer interrupts.

Parameters:

base – Ctimer peripheral base address
mask – The interrupts to enable. This is a logical OR of members of the enumeration ctimer_interrupt_enable_t

static inline void CTIMER_DisableInterrupts(CTIMER_Type *base, uint32_t mask)

Disables the selected Timer interrupts.

Parameters:

base – Ctimer peripheral base address
mask – The interrupts to enable. This is a logical OR of members of the enumeration ctimer_interrupt_enable_t

static inline uint32_t CTIMER_GetEnabledInterrupts(CTIMER_Type *base)

Gets the enabled Timer interrupts.

Parameters:

base – Ctimer peripheral base address

Returns:

The enabled interrupts. This is the logical OR of members of the enumeration ctimer_interrupt_enable_t

static inline uint32_t CTIMER_GetStatusFlags(CTIMER_Type *base)

Gets the Timer status flags.

Parameters:

base – Ctimer peripheral base address

Returns:

The status flags. This is the logical OR of members of the enumeration ctimer_status_flags_t

static inline void CTIMER_ClearStatusFlags(CTIMER_Type *base, uint32_t mask)

Clears the Timer status flags.

Parameters:

base – Ctimer peripheral base address
mask – The status flags to clear. This is a logical OR of members of the enumeration ctimer_status_flags_t

static inline void CTIMER_StartTimer(CTIMER_Type *base)

Starts the Timer counter.

Parameters:

base – Ctimer peripheral base address

static inline void CTIMER_StopTimer(CTIMER_Type *base)

Stops the Timer counter.

Parameters:

base – Ctimer peripheral base address

FSL_CTIMER_DRIVER_VERSION: Version 2.3.3

enum _ctimer_capture_channel

List of Timer capture channels.

Values:

enumerator kCTIMER_Capture_0: Timer capture channel 0

enumerator kCTIMER_Capture_1: Timer capture channel 1

enumerator kCTIMER_Capture_3: Timer capture channel 3

enum _ctimer_capture_edge

List of capture edge options.

Values:

enumerator kCTIMER_Capture_RiseEdge: Capture on rising edge

enumerator kCTIMER_Capture_FallEdge: Capture on falling edge

enumerator kCTIMER_Capture_BothEdge: Capture on rising and falling edge

enum _ctimer_match

List of Timer match registers.

Values:

enumerator kCTIMER_Match_0: Timer match register 0

enumerator kCTIMER_Match_1: Timer match register 1

enumerator kCTIMER_Match_2: Timer match register 2

enumerator kCTIMER_Match_3: Timer match register 3

enum _ctimer_external_match

List of external match.

Values:

enumerator kCTIMER_External_Match_0: External match 0

enumerator kCTIMER_External_Match_1: External match 1

enumerator kCTIMER_External_Match_2: External match 2

enumerator kCTIMER_External_Match_3: External match 3

enum _ctimer_match_output_control

List of output control options.

Values:

enumerator kCTIMER_Output_NoAction: No action is taken

enumerator kCTIMER_Output_Clear: Clear the EM bit/output to 0

enumerator kCTIMER_Output_Set: Set the EM bit/output to 1

enumerator kCTIMER_Output_Toggle: Toggle the EM bit/output

enum _ctimer_timer_mode

List of Timer modes.

Values:

enumerator kCTIMER_TimerMode

enumerator kCTIMER_IncreaseOnRiseEdge

enumerator kCTIMER_IncreaseOnFallEdge

enumerator kCTIMER_IncreaseOnBothEdge

enum _ctimer_interrupt_enable

List of Timer interrupts.

Values:

enumerator kCTIMER_Match0InterruptEnable: Match 0 interrupt

enumerator kCTIMER_Match1InterruptEnable: Match 1 interrupt

enumerator kCTIMER_Match2InterruptEnable: Match 2 interrupt

enumerator kCTIMER_Match3InterruptEnable: Match 3 interrupt

enum _ctimer_status_flags

List of Timer flags.

Values:

enumerator kCTIMER_Match0Flag: Match 0 interrupt flag

enumerator kCTIMER_Match1Flag: Match 1 interrupt flag

enumerator kCTIMER_Match2Flag: Match 2 interrupt flag

enumerator kCTIMER_Match3Flag: Match 3 interrupt flag

enum ctimer_callback_type_t

Callback type when registering for a callback. When registering a callback an array of function pointers is passed the size could be 1 or 8, the callback type will tell that.

Values:

enumerator kCTIMER_SingleCallback: Single Callback type where there is only one callback for the timer. based on the status flags different channels needs to be handled differently

enumerator kCTIMER_MultipleCallback: Multiple Callback type where there can be 8 valid callbacks, one per channel. for both match/capture

typedef enum _ctimer_capture_channel ctimer_capture_channel_t: List of Timer capture channels.

typedef enum _ctimer_capture_edge ctimer_capture_edge_t: List of capture edge options.

typedef enum _ctimer_match ctimer_match_t: List of Timer match registers.

typedef enum _ctimer_external_match ctimer_external_match_t: List of external match.

typedef enum _ctimer_match_output_control ctimer_match_output_control_t: List of output control options.

typedef enum _ctimer_timer_mode ctimer_timer_mode_t: List of Timer modes.

typedef enum _ctimer_interrupt_enable ctimer_interrupt_enable_t: List of Timer interrupts.

typedef enum _ctimer_status_flags ctimer_status_flags_t: List of Timer flags.

typedef void (*ctimer_callback_t)(uint32_t flags)

typedef struct _ctimer_match_config ctimer_match_config_t

Match configuration.

This structure holds the configuration settings for each match register.

typedef struct _ctimer_config ctimer_config_t

Timer configuration structure.

This structure holds the configuration settings for the Timer peripheral. To initialize this structure to reasonable defaults, call the CTIMER_GetDefaultConfig() function and pass a pointer to the configuration structure instance.

The configuration structure can be made constant so as to reside in flash.

void CTIMER_SetupMatch(CTIMER_Type *base, ctimer_match_t matchChannel, const ctimer_match_config_t *config)

Setup the match register.

User configuration is used to setup the match value and action to be taken when a match occurs.

Parameters:

base – Ctimer peripheral base address
matchChannel – Match register to configure
config – Pointer to the match configuration structure

uint32_t CTIMER_GetOutputMatchStatus(CTIMER_Type *base, uint32_t matchChannel)

Get the status of output match.

This function gets the status of output MAT, whether or not this output is connected to a pin. This status is driven to the MAT pins if the match function is selected via IOCON. 0 = LOW. 1 = HIGH.

Parameters:

base – Ctimer peripheral base address
matchChannel – External match channel, user can obtain the status of multiple match channels at the same time by using the logic of “|” enumeration ctimer_external_match_t

Returns:

The mask of external match channel status flags. Users need to use the _ctimer_external_match type to decode the return variables.

void CTIMER_SetupCapture(CTIMER_Type *base, ctimer_capture_channel_t capture, ctimer_capture_edge_t edge, bool enableInt)

Setup the capture.

Parameters:

base – Ctimer peripheral base address
capture – Capture channel to configure
edge – Edge on the channel that will trigger a capture
enableInt – Flag to enable channel interrupts, if enabled then the registered call back is called upon capture

static inline uint32_t CTIMER_GetTimerCountValue(CTIMER_Type *base)

Get the timer count value from TC register.

Parameters:

base – Ctimer peripheral base address.

Returns:

return the timer count value.

void CTIMER_RegisterCallBack(CTIMER_Type *base, ctimer_callback_t *cb_func, ctimer_callback_type_t cb_type)

Register callback.

Parameters:

base – Ctimer peripheral base address
cb_func – callback function
cb_type – callback function type, singular or multiple

static inline void CTIMER_Reset(CTIMER_Type *base)

Reset the counter.

The timer counter and prescale counter are reset on the next positive edge of the APB clock.

Parameters:

base – Ctimer peripheral base address

static inline void CTIMER_SetPrescale(CTIMER_Type *base, uint32_t prescale)

Setup the timer prescale value.

Specifies the maximum value for the Prescale Counter.

Parameters:

base – Ctimer peripheral base address
prescale – Prescale value

static inline uint32_t CTIMER_GetCaptureValue(CTIMER_Type *base, ctimer_capture_channel_t capture)

Get capture channel value.

Get the counter/timer value on the corresponding capture channel.

Parameters:

base – Ctimer peripheral base address
capture – Select capture channel

Returns:

The timer count capture value.

static inline void CTIMER_EnableResetMatchChannel(CTIMER_Type *base, ctimer_match_t match, bool enable)

Enable reset match channel.

Set the specified match channel reset operation.

Parameters:

base – Ctimer peripheral base address
match – match channel used
enable – Enable match channel reset operation.

static inline void CTIMER_EnableStopMatchChannel(CTIMER_Type *base, ctimer_match_t match, bool enable)

Enable stop match channel.

Set the specified match channel stop operation.

Parameters:

base – Ctimer peripheral base address.
match – match channel used.
enable – Enable match channel stop operation.

static inline void CTIMER_EnableMatchChannelReload(CTIMER_Type *base, ctimer_match_t match, bool enable)

Enable reload channel falling edge.

Enable the specified match channel reload match shadow value.

Parameters:

base – Ctimer peripheral base address.
match – match channel used.
enable – Enable .

static inline void CTIMER_EnableRisingEdgeCapture(CTIMER_Type *base, ctimer_capture_channel_t capture, bool enable)

Enable capture channel rising edge.

Sets the specified capture channel for rising edge capture.

Parameters:

base – Ctimer peripheral base address.
capture – capture channel used.
enable – Enable rising edge capture.

static inline void CTIMER_EnableFallingEdgeCapture(CTIMER_Type *base, ctimer_capture_channel_t capture, bool enable)

Enable capture channel falling edge.

Sets the specified capture channel for falling edge capture.

Parameters:

base – Ctimer peripheral base address.
capture – capture channel used.
enable – Enable falling edge capture.

static inline void CTIMER_SetShadowValue(CTIMER_Type *base, ctimer_match_t match, uint32_t matchvalue)

Set the specified match shadow channel.

Parameters:

base – Ctimer peripheral base address.
match – match channel used.
matchvalue – Reload the value of the corresponding match register.

struct _ctimer_match_config

#include <fsl_ctimer.h>

Match configuration.

This structure holds the configuration settings for each match register.

Public Members

uint32_t matchValue: This is stored in the match register

bool enableCounterReset: true: Match will reset the counter false: Match will not reser the counter

bool enableCounterStop: true: Match will stop the counter false: Match will not stop the counter

ctimer_match_output_control_t outControl: Action to be taken on a match on the EM bit/output

bool outPinInitState: Initial value of the EM bit/output

bool enableInterrupt: true: Generate interrupt upon match false: Do not generate interrupt on match

struct _ctimer_config

#include <fsl_ctimer.h>

Timer configuration structure.

This structure holds the configuration settings for the Timer peripheral. To initialize this structure to reasonable defaults, call the CTIMER_GetDefaultConfig() function and pass a pointer to the configuration structure instance.

The configuration structure can be made constant so as to reside in flash.

Public Members

ctimer_timer_mode_t mode: Timer mode

ctimer_capture_channel_t input: Input channel to increment the timer, used only in timer modes that rely on this input signal to increment TC

uint32_t prescale: Prescale value

DAC: Digital Analog Converter

void DAC_Init(DAC_Type *base, const dac_config_t *config)

Initializes DAC module, including set reference voltage source, set conversion range, and set output voltage range.

Parameters:

base – DAC peripheral base address.
config – Pointer to the structure which in type of dac_config_t.

void DAC_GetDefaultConfig(dac_config_t *config)

Gets the default configurations of DAC module.

config->conversionRate = kDAC_ConversionRate62P5KHZ;
config->refSource = kDAC_ReferenceInternalVoltageSource;
config->rangeSelect = kDAC_RangeLarge;

Parameters:

config – Pointer to the structure which in the type of dac_config_t.

void DAC_Deinit(DAC_Type *base)

De-initializes the DAC module, including reset clock divider, reset each channel, and so on.

Parameters:

base – DAC peripheral base address.

void DAC_SetChannelConfig(DAC_Type *base, uint32_t channelMask, const dac_channel_config_t *channelConfig)

Configures the DAC channels, including enable channel conversion, set wave type, set timing mode, and so on.

Parameters:

base – DAC peripheral base address.
channelMask – The mask of channel, can be the OR’ed value of dac_channel_id_t.
channelConfig – The pointer of structure which in the type of dac_channel_config_t.

static inline void DAC_ResetChannel(DAC_Type *base, uint32_t channelMask)

Does software reset for the selected DAC channels.

Parameters:

base – DAC peripheral base address.
channelMask – The mask of channel to be reset, should be the OR’ed value of dac_channel_id_t.

static inline void DAC_EnableChannelConversion(DAC_Type *base, uint32_t channelMask, bool enable)

Enables/Disables selected channel conversion.

Note

To enable/disable the conversions of both channels, invoking this API with the parameter channelMask set as kDAC_ChannelA|kDAC_ChannelB .

Parameters:

base – DAC peripheral base address.
channelMask – The mask of channel to be reset, can be the OR’ed value of dac_channel_id_t.
enable – Enable/Disable channel conversion.
- true Enable selected channels’ conversion.
- false Disable selected channels’ conversion.

static inline void DAC_SetChannelOutMode(DAC_Type *base, uint32_t channelMask, dac_channel_output_t outMode)

Sets channels out mode, including kDAC_ChannelOutputInternal and kDAC_ChannelOutputPad.

Parameters:

base – DAC peripheral base address.
channelMask – The mask of channel, can be the OR’ed value of dac_channel_id_t.
outMode – The out mode of selected channels, please refer to dac_channel_output_t for details.

static inline void DAC_EnableChannelTriggerMode(DAC_Type *base, uint32_t channelMask, bool enable)

Enables/Disables channels trigger mode.

Note

To enable/disable the trigger mode of both two channels, invoking this API with the parameter channelMask set as kDAC_ChannelA|kDAC_ChannelB .

Parameters:

base – DAC peripheral base address.
channelMask – The mask of channel, can be the OR’ed value of dac_channel_id_t.
enable – Enable/Disable channel trigger mode.
- true Channels’ conversion triggered by external event enabled.
- false Channels’ conversion trigged by external event disabled.

static inline void DAC_SetChannelTrigSource(DAC_Type *base, uint32_t channelMask, dac_channel_trigger_source_t trigSource)

Sets channels trigger source.

Note

To set the same trigger source to both two channels, invoking this API with the parameter channelMask set as kDAC_ChannelA|kDAC_ChannelB .

Parameters:

base – DAC peripheral base address.
channelMask – The mask of channel, can be the OR’ed value of dac_channel_id_t.
trigSource – The selected trigger source, please refer to dac_channel_trigger_source_t for details.

static inline void DAC_SetChannelTrigType(DAC_Type *base, uint32_t channelMask, dac_channel_trigger_type_t trigType)

Sets channels trigger type, such as rising edge trigger, falling edge trigger, or both edge trigger.

Note

To set the same trigger type to both two channels, invoking this API with the parameter channelMask set as kDAC_ChannelA|kDAC_ChannelB .

Parameters:

base – DAC peripheral base address.
channelMask – The mask of channel, can be the OR’ed value of dac_channel_id_t;
trigType – The selected trigger type, please refer to dac_channel_trigger_type_t;

static inline void DAC_SetChannelTimingMode(DAC_Type *base, uint32_t channelMask, dac_channel_timing_mode_t timingMode)

Sets channels timing mode, including not-timing related or timing related.

Note

To the same timing mode to both two channels, invoking this API with the parameter channelMask set as kDAC_ChannelA|kDAC_ChannelB .

Parameters:

base – DAC peripheral base address.
channelMask – The mask of channel, can be the OR’ed value of dac_channel_id_t.
timingMode – The selected timing mode, please refer to dac_channel_timing_mode_t for details.

static inline void DAC_EnableChannelDMA(DAC_Type *base, uint32_t channelMask, bool enable)

Enables/Disables channels DMA.

Parameters:

base – DAC peripheral base address.
channelMask – The mask of channel, can be the OR’ed value of dac_channel_id_t.
enable – Enable/Disable channel DMA data transfer.
- true DMA data transfer enabled.
- false DMA data transfer disabled.

static inline void DAC_SetChannelWaveType(DAC_Type *base, uint32_t channelMask, dac_channel_wave_type_t waveType)

Sets channels wave type, such as sine, noise, or triangle.

Note

To set the same wave type to both channel, invoking this API with the parameter channelMask set as kDAC_ChannelA|kDAC_ChannelB .

Parameters:

base – DAC peripheral base address.
channelMask – The mask of channel, should be the OR’ed value of dac_channel_id_t.
waveType – The wave type to set, please refer to dac_channel_wave_type_t.

static inline void DAC_SetChannelData(DAC_Type *base, uint32_t channelMask, uint16_t data)

Sets DAC channels data.

Note

To set the same data to both channel, invoking this API with the parameter channelMask set as kDAC_ChannelA|kDAC_ChannelB .

Parameters:

base – DAC peripheral base address.
channelMask – The mask of channel, can be the OR’ed value of dac_channel_id_t.
data –

void DAC_SetTriangleConfig(DAC_Type *base, const dac_triangle_config_t *triangleConfig)

Configures the options of triangle waveform.

Note

This API should be invoked to set the options of triangle waveform when channel A’s output wave type is selected as kDAC_WaveTriangle.

Parameters:

base – DAC peripheral base address.
triangleConfig – The pointer of structure which in the type of dac_triangle_config_t.

static inline void DAC_EnableInterrupts(DAC_Type *base, uint32_t interruptMask)

Enables interrupts, such as channel A data ready interupt, channel A timeout interrupt, and so on.

Parameters:

base – DAC peripheral base address.
interruptMask – The or’ed value of the interrupts to be enabled, please refer to _dac_interrupt_enable.

static inline void DAC_DisableInterrupts(DAC_Type *base, uint32_t interruptMask)

Disables interrupts, such as channel B data ready interrupt, channel B timeout interrupt, and so on.

Parameters:

base – DAC peripheral base address.
interruptMask – The or’ed value of the interrupts to be disabled, please refer to _dac_interrupt_enable.

static inline uint32_t DAC_GetStatusFlags(DAC_Type *base)

Gets the status flags, including interrupt status flags, raw status flags, and conversion status flags.

Parameters:

base – DAC peripheral base address.

Returns:

The mask of status flags, please refer to _dac_status_flags.

static inline void DAC_ClearStatusFlags(DAC_Type *base, uint32_t statusFlagsMask)

Clears the interrups status flags, such as channel A data ready interrupt flag, channel B data ready interrupt flag, and so on.

Parameters:

base – DAC peripheral base address.
statusFlagsMask – The mask of the status flags to be cleared, please refer to _dac_status_flags.

enum _dac_interrupt_enable

The enumeration of interrupts that DAC support.

Values:

enumerator kDAC_ChannelAReadyInterruptEnable: Enable channel A data ready interrupt.

enumerator kDAC_ChannelBReadyInterruptEnable: Enable channel B data ready interrupt.

enumerator kDAC_ChannelATimeoutInterruptEnable: Enable channel A time out interrupt.

enumerator kDAC_ChannelBTimeoutInterruptEnable: Enable channel B time out interrupt.

enumerator kDAC_TriangleOverflowInterruptEnable: Enable triangle overflow interrupt.

enum _dac_status_flags

The enumeration of DAC status flags, including interrupt status flags, raw status flags, and conversion status flags.

Note

The interrupt status flags can only be asserted upon both enabling and happening of related interrupts. Comparatively, the raw status flags will be asserted as long as related events happen regardless of whether related interrupts are enabled or not.

Note

Only interrupt status flags can be cleared mannually.

Values:

enumerator kDAC_ChannelADataReadyInterruptFlag: Channel A data ready.

enumerator kDAC_ChannelBDataReadyInterruptFlag: Channel B data ready.

enumerator kDAC_ChannelATimeoutInterruptFlag: Channel A time out.

enumerator kDAC_ChannelBTimeoutInterruptFlag: Channel B time out.

enumerator kDAC_TriangleOverflowInterruptFlag: Triangle overflow.

enumerator kDAC_RawChannelADataReadyFlag: Channel A data ready raw.

enumerator kDAC_RawChannelBDataReadyFlag: Channel B data ready raw.

enumerator kDAC_RawChannelATimeoutFlag: Channel A timeout raw.

enumerator kDAC_RawChannelBTimeoutFlag: Channel B timeout raw.

enumerator kDAC_RawTriangleOverflowFlag: Triangle overflow raw.

enumerator kDAC_ChannelAConversionCompleteFlag: Channel A conversion complete.

enumerator kDAC_ChannelBConversionCompleteFlag: Channel B conversion complete.

enum _dac_channel_id

The enumeration of dac channels, including channel A and channel B.

Values:

enumerator kDAC_ChannelA

enumerator kDAC_ChannelB

enum _dac_conversion_rate

The enumeration of dac converion rate, including 62.5 KHz, 125 KHz, 250 KHz, and 500 KHz.

Values:

enumerator kDAC_ConversionRate62P5KHZ: DAC Conversion Rate selects as 62.5 KHz.

enumerator kDAC_ConversionRate125KHZ: DAC Conversion Rate selects as 125 KHz.

enumerator kDAC_ConversionRate250KHZ: DAC Conversion Rate selects as 250 KHz.

enumerator kDAC_ConversionRate500KHZ: DAC Conversion Rate selects as 500 KHz.

enum _dac_reference_voltage_source

The enumeration of dac reference voltage source.

Values:

enumerator kDAC_ReferenceInternalVoltageSource: Select internal voltage reference.

enumerator kDAC_ReferenceExternalVoltageSource: Select external voltage reference.

enum _dac_output_voltage_range

The enumeration of dac output voltage range.

Values:

enumerator kDAC_RangeSmall: DAC output small range.

enumerator kDAC_RangeMiddle: DAC output middle range.

enumerator kDAC_RangeLarge: DAC output large range.

enum _dac_channel_output

The enumeration of dac channel’s output mode.

Values:

enumerator kDAC_ChannelOutputInternal: Enable internal output but disable output to pad

enumerator kDAC_ChannelOutputPAD: Enable output to pad but disable internal output

enum _dac_channel_trigger_type

The enumeration of dac channel’s trigger type, including rising edge trigger, falling edge trigger, and both edge triggers.

Values:

enumerator kDAC_RisingEdgeTrigger: Rising edge trigger.

enumerator kDAC_FallingEdgeTrigger: Failing edge trigger.

enumerator kDAC_BothEdgeTrigger: Rising and Failing edge trigger.

enum _dac_channel_timing_mode

The enumeration of dac channel timing mode.

Values:

enumerator kDAC_NonTimingCorrelated: DAC non-timing-correlated mode.

enumerator kDAC_TimingCorrelated: DAC timing-correlated mode.

enum _dac_channel_wave_type

The enumerator of channel output wave type, please note that not all wave types are effective to A and B channel.

Values:

enumerator kDAC_WaveNormal: No predefined waveform, effective to A or B channel

enumerator kDAC_WaveTriangle: Triangle wave, effective only to A channel

enumerator kDAC_WaveSine: Sine wave, effective only to A channel

enumerator kDAC_WaveNoiseDifferential: Noise wave, effective only to A channel; Differential mode, one’s complemental code from A data, effective only to B channel

enum _dac_triangle_mamp

DAC triangle maximum amplitude type.

Values:

enumerator kDAC_TriangleAmplitude63: DAC triangle amplitude 63 lsb

enumerator kDAC_TriangleAmplitude127: DAC triangle amplitude 127 lsb

enumerator kDAC_TriangleAmplitude191: DAC triangle amplitude 191 lsb

enumerator kDAC_TriangleAmplitude255: DAC triangle amplitude 255 lsb

enumerator kDAC_TriangleAmplitude319: DAC triangle amplitude 319 lsb

enumerator kDAC_TriangleAmplitude383: DAC triangle amplitude 383 lsb

enumerator kDAC_TriangleAmplitude447: DAC triangle amplitude 447 lsb

enumerator kDAC_TriangleAmplitude511: DAC triangle amplitude 511 lsb

enumerator kDAC_TriangleAmplitude575: DAC triangle amplitude 575 lsb

enumerator kDAC_TriangleAmplitude639: DAC triangle amplitude 639 lsb

enumerator kDAC_TriangleAmplitude703: DAC triangle amplitude 703 lsb

enumerator kDAC_TriangleAmplitude767: DAC triangle amplitude 767 lsb

enumerator kDAC_TriangleAmplitude831: DAC triangle amplitude 831 lsb

enumerator kDAC_TriangleAmplitude895: DAC triangle amplitude 895 lsb

enumerator kDAC_TriangleAmplitude959: DAC triangle amplitude 959 lsb

enumerator kDAC_TriangleAmplitude1023: DAC triangle amplitude 1023 lsb

enum _dac_triangle_step_size

DAC triangle step size type.

Values:

enumerator kDAC_TriangleStepSize1: DAC triangle step size 1 lsb

enumerator kDAC_TriangleStepSize3: DAC triangle step size 3 lsb

enumerator kDAC_TriangleStepSize15: DAC triangle step size 15 lsb

enumerator kDAC_TriangleStepSize511: DAC triangle step size 511 lsb

enum _dac_triangle_waveform_type

DAC triangle waveform type.

Values:

enumerator kDAC_TriangleFull: DAC full triangle waveform

enumerator kDAC_TriangleHalf: DAC half triangle waveform

typedef enum _dac_channel_id dac_channel_id_t: The enumeration of dac channels, including channel A and channel B.

typedef enum _dac_conversion_rate dac_conversion_rate_t: The enumeration of dac converion rate, including 62.5 KHz, 125 KHz, 250 KHz, and 500 KHz.

typedef enum _dac_reference_voltage_source dac_reference_voltage_source_t: The enumeration of dac reference voltage source.

typedef enum _dac_output_voltage_range dac_output_voltage_range_t: The enumeration of dac output voltage range.

typedef enum _dac_channel_output dac_channel_output_t: The enumeration of dac channel’s output mode.

typedef enum _dac_channel_trigger_type dac_channel_trigger_type_t: The enumeration of dac channel’s trigger type, including rising edge trigger, falling edge trigger, and both edge triggers.

typedef enum _dac_channel_timing_mode dac_channel_timing_mode_t: The enumeration of dac channel timing mode.

typedef enum _dac_channel_wave_type dac_channel_wave_type_t: The enumerator of channel output wave type, please note that not all wave types are effective to A and B channel.

typedef enum _dac_triangle_mamp dac_triangle_mamp_t: DAC triangle maximum amplitude type.

typedef enum _dac_triangle_step_size dac_triangle_step_size_t: DAC triangle step size type.

typedef enum _dac_triangle_waveform_type dac_triangle_waveform_type_t: DAC triangle waveform type.

typedef struct _dac_config dac_config_t: The structure of dac module basic configuration, including conversion rate, output range, and reference voltage source.

typedef struct _dac_channel_config dac_channel_config_t: The structure of dac channel configuration, such as trigger type, wave type, timing mode, and so on.

typedef struct _dac_triangle_config dac_triangle_config_t: The structure of triangle waveform, including maximum value, minimum value, step size, and so on.

FSL_DAC_DRIVER_VERSION

DAC driver version.

Version 2.1.0.

IS_DAC_CHANNEL_A_WAVE(CH_WAVE): DAC channel A wave mode check.

IS_DAC_CHANNEL_B_WAVE(CH_WAVE): DAC channel B wave mode check.

struct _dac_config

#include <fsl_dac.h>

The structure of dac module basic configuration, including conversion rate, output range, and reference voltage source.

Public Members

dac_conversion_rate_t conversionRate: Configure DAC conversion rate, please refer to dac_conversion_rate_t.

dac_reference_voltage_source_t refSource: Configure DAC vref source, please refer to dac_reference_voltage_source_t.

dac_output_voltage_range_t rangeSelect: Configure DAC channel output range, please refer to dac_output_voltage_range_t.

struct _dac_channel_config

#include <fsl_dac.h>

The structure of dac channel configuration, such as trigger type, wave type, timing mode, and so on.

Public Members

bool enableConversion

Enable/Disable selected channel’s conversion.

true Enable selected channel’s conversion.
false Disable selected channel’s conversion.

dac_channel_output_t outMode: Configure channel output mode, please refer to dac_channel_output_t

bool enableDMA

Enable/Disable channel DAM data transfer.

true DMA data transfer enabled.
false DMA data transfer disabled.

bool enableTrigger: Enable/Disable external event trigger.

dac_channel_trigger_type_t triggerType: Configure the channel trigger type, please refer to dac_channel_trigger_type_t.

dac_channel_trigger_source_t triggerSource: Configure DAC channel trigger source, please refer to dac_channel_trigger_source_t.

dac_channel_timing_mode_t timingMode: Configure channel timing mode, please refer to dac_channel_timing_mode_t.

dac_channel_wave_type_t waveType: Configure wave type for the selected channel, please refer to dac_channel_wave_type_t.

struct _dac_triangle_config

#include <fsl_dac.h>

The structure of triangle waveform, including maximum value, minimum value, step size, and so on.

Public Members

dac_triangle_mamp_t triangleMamp: Configure triangle maximum value.

dac_triangle_step_size_t triangleStepSize: Configure triangle step size.

dac_triangle_waveform_type_t triangleWaveform: Configure triangle waveform type.

uint32_t triangleBase: Configure triangle minimum value.

DMA: Direct Memory Access Controller Driver

void DMA_Init(DMA_Type *base)

Initializes DMA peripheral.

This function enable the DMA clock, set descriptor table and enable DMA peripheral.

Parameters:

base – DMA peripheral base address.

void DMA_Deinit(DMA_Type *base)

Deinitializes DMA peripheral.

This function gates the DMA clock.

Parameters:

base – DMA peripheral base address.

void DMA_InstallDescriptorMemory(DMA_Type *base, void *addr)

Install DMA descriptor memory.

This function used to register DMA descriptor memory for linked transfer, a typical case is ping pong transfer which will request more than one DMA descriptor memory space, althrough current DMA driver has a default DMA descriptor buffer, but it support one DMA descriptor for one channel only.

Parameters:

base – DMA base address.
addr – DMA descriptor address

static inline bool DMA_ChannelIsActive(DMA_Type *base, uint32_t channel)

Return whether DMA channel is processing transfer.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

Returns:

True for active state, false otherwise.

static inline bool DMA_ChannelIsBusy(DMA_Type *base, uint32_t channel)

Return whether DMA channel is busy.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

Returns:

True for busy state, false otherwise.

static inline void DMA_EnableChannelInterrupts(DMA_Type *base, uint32_t channel)

Enables the interrupt source for the DMA transfer.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

static inline void DMA_DisableChannelInterrupts(DMA_Type *base, uint32_t channel)

Disables the interrupt source for the DMA transfer.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

static inline void DMA_EnableChannel(DMA_Type *base, uint32_t channel)

Enable DMA channel.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

static inline void DMA_DisableChannel(DMA_Type *base, uint32_t channel)

Disable DMA channel.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

static inline void DMA_EnableChannelPeriphRq(DMA_Type *base, uint32_t channel)

Set PERIPHREQEN of channel configuration register.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

static inline void DMA_DisableChannelPeriphRq(DMA_Type *base, uint32_t channel)

Get PERIPHREQEN value of channel configuration register.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

Returns:

True for enabled PeriphRq, false for disabled.

void DMA_ConfigureChannelTrigger(DMA_Type *base, uint32_t channel, dma_channel_trigger_t *trigger)

Set trigger settings of DMA channel.

Deprecated:: Do not use this function. It has been superceded by DMA_SetChannelConfig.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.
trigger – trigger configuration.

void DMA_SetChannelConfig(DMA_Type *base, uint32_t channel, dma_channel_trigger_t *trigger, bool isPeriph)

set channel config.

This function provide a interface to configure channel configuration reisters.

Parameters:

base – DMA base address.
channel – DMA channel number.
trigger – channel configurations structure.
isPeriph – true is periph request, false is not.

static inline uint32_t DMA_SetChannelXferConfig(bool reload, bool clrTrig, bool intA, bool intB, uint8_t width, uint8_t srcInc, uint8_t dstInc, uint32_t bytes)

DMA channel xfer transfer configurations.

Parameters:

reload – true is reload link descriptor after current exhaust, false is not
clrTrig – true is clear trigger status, wait software trigger, false is not
intA – enable interruptA
intB – enable interruptB
width – transfer width
srcInc – source address interleave size
dstInc – destination address interleave size
bytes – transfer bytes

Returns:

The vaule of xfer config

uint32_t DMA_GetRemainingBytes(DMA_Type *base, uint32_t channel)

Gets the remaining bytes of the current DMA descriptor transfer.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

Returns:

The number of bytes which have not been transferred yet.

static inline void DMA_SetChannelPriority(DMA_Type *base, uint32_t channel, dma_priority_t priority)

Set priority of channel configuration register.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.
priority – Channel priority value.

static inline dma_priority_t DMA_GetChannelPriority(DMA_Type *base, uint32_t channel)

Get priority of channel configuration register.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

Returns:

Channel priority value.

static inline void DMA_SetChannelConfigValid(DMA_Type *base, uint32_t channel)

Set channel configuration valid.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

static inline void DMA_DoChannelSoftwareTrigger(DMA_Type *base, uint32_t channel)

Do software trigger for the channel.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.

static inline void DMA_LoadChannelTransferConfig(DMA_Type *base, uint32_t channel, uint32_t xfer)

Load channel transfer configurations.

Parameters:

base – DMA peripheral base address.
channel – DMA channel number.
xfer – transfer configurations.

void DMA_CreateDescriptor(dma_descriptor_t *desc, dma_xfercfg_t *xfercfg, void *srcAddr, void *dstAddr, void *nextDesc)

Create application specific DMA descriptor to be used in a chain in transfer.

Deprecated:: Do not use this function. It has been superceded by DMA_SetupDescriptor.

Parameters:

desc – DMA descriptor address.
xfercfg – Transfer configuration for DMA descriptor.
srcAddr – Address of last item to transmit
dstAddr – Address of last item to receive.
nextDesc – Address of next descriptor in chain.

void DMA_SetupDescriptor(dma_descriptor_t *desc, uint32_t xfercfg, void *srcStartAddr, void *dstStartAddr, void *nextDesc)

setup dma descriptor

Note: This function do not support configure wrap descriptor.

Parameters:

desc – DMA descriptor address.
xfercfg – Transfer configuration for DMA descriptor.
srcStartAddr – Start address of source address.
dstStartAddr – Start address of destination address.
nextDesc – Address of next descriptor in chain.

void DMA_SetupChannelDescriptor(dma_descriptor_t *desc, uint32_t xfercfg, void *srcStartAddr, void *dstStartAddr, void *nextDesc, dma_burst_wrap_t wrapType, uint32_t burstSize)

setup dma channel descriptor

Note: This function support configure wrap descriptor.

Parameters:

desc – DMA descriptor address.
xfercfg – Transfer configuration for DMA descriptor.
srcStartAddr – Start address of source address.
dstStartAddr – Start address of destination address.
nextDesc – Address of next descriptor in chain.
wrapType – burst wrap type.
burstSize – burst size, reference _dma_burst_size.

void DMA_LoadChannelDescriptor(DMA_Type *base, uint32_t channel, dma_descriptor_t *descriptor)

load channel transfer decriptor.

This function can be used to load desscriptor to driver internal channel descriptor that is used to start DMA transfer, the head descriptor table is defined in DMA driver, it is useful for the case:

for the polling transfer, application can allocate a local descriptor memory table to prepare a descriptor firstly and then call this api to load the configured descriptor to driver descriptor table.

DMA_Init(DMA0);
DMA_EnableChannel(DMA0, DEMO_DMA_CHANNEL);
DMA_SetupDescriptor(desc, xferCfg, s_srcBuffer, &s_destBuffer[0], NULL);
DMA_LoadChannelDescriptor(DMA0, DEMO_DMA_CHANNEL, (dma_descriptor_t *)desc);
DMA_DoChannelSoftwareTrigger(DMA0, DEMO_DMA_CHANNEL);
while(DMA_ChannelIsBusy(DMA0, DEMO_DMA_CHANNEL))
{}

Parameters:

base – DMA base address.
channel – DMA channel.
descriptor – configured DMA descriptor.

void DMA_AbortTransfer(dma_handle_t *handle)

Abort running transfer by handle.

This function aborts DMA transfer specified by handle.

Parameters:

handle – DMA handle pointer.

void DMA_CreateHandle(dma_handle_t *handle, DMA_Type *base, uint32_t channel)

Creates the DMA handle.

This function is called if using transaction API for DMA. This function initializes the internal state of DMA handle.

Parameters:

handle – DMA handle pointer. The DMA handle stores callback function and parameters.
base – DMA peripheral base address.
channel – DMA channel number.

void DMA_SetCallback(dma_handle_t *handle, dma_callback callback, void *userData)

Installs a callback function for the DMA transfer.

This callback is called in DMA IRQ handler. Use the callback to do something after the current major loop transfer completes.

Parameters:

handle – DMA handle pointer.
callback – DMA callback function pointer.
userData – Parameter for callback function.

void DMA_PrepareTransfer(dma_transfer_config_t *config, void *srcAddr, void *dstAddr, uint32_t byteWidth, uint32_t transferBytes, dma_transfer_type_t type, void *nextDesc)

Prepares the DMA transfer structure.

Deprecated:: Do not use this function. It has been superceded by DMA_PrepareChannelTransfer. This function prepares the transfer configuration structure according to the user input.

Note

The data address and the data width must be consistent. For example, if the SRC is 4 bytes, so the source address must be 4 bytes aligned, or it shall result in source address error(SAE).

Parameters:

config – The user configuration structure of type dma_transfer_t.
srcAddr – DMA transfer source address.
dstAddr – DMA transfer destination address.
byteWidth – DMA transfer destination address width(bytes).
transferBytes – DMA transfer bytes to be transferred.
type – DMA transfer type.
nextDesc – Chain custom descriptor to transfer.

void DMA_PrepareChannelTransfer(dma_channel_config_t *config, void *srcStartAddr, void *dstStartAddr, uint32_t xferCfg, dma_transfer_type_t type, dma_channel_trigger_t *trigger, void *nextDesc)

Prepare channel transfer configurations.

This function used to prepare channel transfer configurations.

Parameters:

config – Pointer to DMA channel transfer configuration structure.
srcStartAddr – source start address.
dstStartAddr – destination start address.
xferCfg – xfer configuration, user can reference DMA_CHANNEL_XFER about to how to get xferCfg value.
type – transfer type.
trigger – DMA channel trigger configurations.
nextDesc – address of next descriptor.

status_t DMA_SubmitTransfer(dma_handle_t *handle, dma_transfer_config_t *config)

Submits the DMA transfer request.

Deprecated:: Do not use this function. It has been superceded by DMA_SubmitChannelTransfer.

This function submits the DMA transfer request according to the transfer configuration structure. If the user submits the transfer request repeatedly, this function packs an unprocessed request as a TCD and enables scatter/gather feature to process it in the next time.

Parameters:

handle – DMA handle pointer.
config – Pointer to DMA transfer configuration structure.

Return values:

kStatus_DMA_Success – It means submit transfer request succeed.
kStatus_DMA_QueueFull – It means TCD queue is full. Submit transfer request is not allowed.
kStatus_DMA_Busy – It means the given channel is busy, need to submit request later.

void DMA_SubmitChannelTransferParameter(dma_handle_t *handle, uint32_t xferCfg, void *srcStartAddr, void *dstStartAddr, void *nextDesc)

Submit channel transfer paramter directly.

This function used to configue channel head descriptor that is used to start DMA transfer, the head descriptor table is defined in DMA driver, it is useful for the case:

for the single transfer, application doesn’t need to allocate descriptor table, the head descriptor can be used for it.

   DMA_SetChannelConfig(base, channel, trigger, isPeriph);
   DMA_CreateHandle(handle, base, channel)
   DMA_SubmitChannelTransferParameter(handle, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc,
bytes), srcStartAddr, dstStartAddr, NULL);
   DMA_StartTransfer(handle)

for the linked transfer, application should responsible for link descriptor, for example, if 4 transfer is required, then application should prepare three descriptor table with macro , the head descriptor in driver can be used for the first transfer descriptor.

   define link descriptor table in application with macro
   DMA_ALLOCATE_LINK_DESCRIPTOR(nextDesc[3]);

   DMA_SetupDescriptor(nextDesc0,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, nextDesc1);
   DMA_SetupDescriptor(nextDesc1,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, nextDesc2);
   DMA_SetupDescriptor(nextDesc2,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, NULL);
   DMA_SetChannelConfig(base, channel, trigger, isPeriph);
   DMA_CreateHandle(handle, base, channel)
   DMA_SubmitChannelTransferParameter(handle, DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc,
bytes), srcStartAddr, dstStartAddr, nextDesc0);
   DMA_StartTransfer(handle);

Parameters:

handle – Pointer to DMA handle.
xferCfg – xfer configuration, user can reference DMA_CHANNEL_XFER about to how to get xferCfg value.
srcStartAddr – source start address.
dstStartAddr – destination start address.
nextDesc – address of next descriptor.

void DMA_SubmitChannelDescriptor(dma_handle_t *handle, dma_descriptor_t *descriptor)

Submit channel descriptor.

This function used to configue channel head descriptor that is used to start DMA transfer, the head descriptor table is defined in DMA driver, this functiono is typical for the ping pong case:

for the ping pong case, application should responsible for the descriptor, for example, application should prepare two descriptor table with macro.

   define link descriptor table in application with macro
   DMA_ALLOCATE_LINK_DESCRIPTOR(nextDesc[2]);

   DMA_SetupDescriptor(nextDesc0,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, nextDesc1);
   DMA_SetupDescriptor(nextDesc1,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, nextDesc0);
   DMA_SetChannelConfig(base, channel, trigger, isPeriph);
   DMA_CreateHandle(handle, base, channel)
   DMA_SubmitChannelDescriptor(handle,  nextDesc0);
   DMA_StartTransfer(handle);

Parameters:

handle – Pointer to DMA handle.
descriptor – descriptor to submit.

status_t DMA_SubmitChannelTransfer(dma_handle_t *handle, dma_channel_config_t *config)

Submits the DMA channel transfer request.

This function submits the DMA transfer request according to the transfer configuration structure. If the user submits the transfer request repeatedly, this function packs an unprocessed request as a TCD and enables scatter/gather feature to process it in the next time. It is used for the case:

for the single transfer, application doesn’t need to allocate descriptor table, the head descriptor can be used for it.

DMA_CreateHandle(handle, base, channel)
DMA_PrepareChannelTransfer(config,srcStartAddr,dstStartAddr,xferCfg,type,trigger,NULL);
DMA_SubmitChannelTransfer(handle, config)
DMA_StartTransfer(handle)

for the linked transfer, application should responsible for link descriptor, for example, if 4 transfer is required, then application should prepare three descriptor table with macro , the head descriptor in driver can be used for the first transfer descriptor.

   define link descriptor table in application with macro
   DMA_ALLOCATE_LINK_DESCRIPTOR(nextDesc);
   DMA_SetupDescriptor(nextDesc0,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, nextDesc1);
   DMA_SetupDescriptor(nextDesc1,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, nextDesc2);
   DMA_SetupDescriptor(nextDesc2,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, NULL);
   DMA_CreateHandle(handle, base, channel)
   DMA_PrepareChannelTransfer(config,srcStartAddr,dstStartAddr,xferCfg,type,trigger,nextDesc0);
   DMA_SubmitChannelTransfer(handle, config)
   DMA_StartTransfer(handle)

for the ping pong case, application should responsible for link descriptor, for example, application should prepare two descriptor table with macro , the head descriptor in driver can be used for the first transfer descriptor.

   define link descriptor table in application with macro
   DMA_ALLOCATE_LINK_DESCRIPTOR(nextDesc);

   DMA_SetupDescriptor(nextDesc0,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, nextDesc1);
   DMA_SetupDescriptor(nextDesc1,  DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes),
srcStartAddr, dstStartAddr, nextDesc0);
   DMA_CreateHandle(handle, base, channel)
   DMA_PrepareChannelTransfer(config,srcStartAddr,dstStartAddr,xferCfg,type,trigger,nextDesc0);
   DMA_SubmitChannelTransfer(handle, config)
   DMA_StartTransfer(handle)

Parameters:

handle – DMA handle pointer.
config – Pointer to DMA transfer configuration structure.

Return values:

kStatus_DMA_Success – It means submit transfer request succeed.
kStatus_DMA_QueueFull – It means TCD queue is full. Submit transfer request is not allowed.
kStatus_DMA_Busy – It means the given channel is busy, need to submit request later.

void DMA_StartTransfer(dma_handle_t *handle)

DMA start transfer.

This function enables the channel request. User can call this function after submitting the transfer request It will trigger transfer start with software trigger only when hardware trigger is not used.

Parameters:

handle – DMA handle pointer.

void DMA_IRQHandle(DMA_Type *base)

DMA IRQ handler for descriptor transfer complete.

This function clears the channel major interrupt flag and call the callback function if it is not NULL.

Parameters:

base – DMA base address.

FSL_DMA_DRIVER_VERSION

DMA driver version.

Version 2.5.3.

_dma_transfer_status DMA transfer status

Values:

enumerator kStatus_DMA_Busy: Channel is busy and can’t handle the transfer request.

_dma_addr_interleave_size dma address interleave size

Values:

enumerator kDMA_AddressInterleave0xWidth: dma source/destination address no interleave

enumerator kDMA_AddressInterleave1xWidth: dma source/destination address interleave 1xwidth

enumerator kDMA_AddressInterleave2xWidth: dma source/destination address interleave 2xwidth

enumerator kDMA_AddressInterleave4xWidth: dma source/destination address interleave 3xwidth

_dma_transfer_width dma transfer width

Values:

enumerator kDMA_Transfer8BitWidth: dma channel transfer bit width is 8 bit

enumerator kDMA_Transfer16BitWidth: dma channel transfer bit width is 16 bit

enumerator kDMA_Transfer32BitWidth: dma channel transfer bit width is 32 bit

enum _dma_priority

DMA channel priority.

Values:

enumerator kDMA_ChannelPriority0: Highest channel priority - priority 0

enumerator kDMA_ChannelPriority1: Channel priority 1

enumerator kDMA_ChannelPriority2: Channel priority 2

enumerator kDMA_ChannelPriority3: Channel priority 3

enumerator kDMA_ChannelPriority4: Channel priority 4

enumerator kDMA_ChannelPriority5: Channel priority 5

enumerator kDMA_ChannelPriority6: Channel priority 6

enumerator kDMA_ChannelPriority7: Lowest channel priority - priority 7

enum _dma_int

DMA interrupt flags.

Values:

enumerator kDMA_IntA: DMA interrupt flag A

enumerator kDMA_IntB: DMA interrupt flag B

enumerator kDMA_IntError: DMA interrupt flag error

enum _dma_trigger_type

DMA trigger type.

Values:

enumerator kDMA_NoTrigger: Trigger is disabled

enumerator kDMA_LowLevelTrigger: Low level active trigger

enumerator kDMA_HighLevelTrigger: High level active trigger

enumerator kDMA_FallingEdgeTrigger: Falling edge active trigger

enumerator kDMA_RisingEdgeTrigger: Rising edge active trigger

_dma_burst_size DMA burst size

Values:

enumerator kDMA_BurstSize1: burst size 1 transfer

enumerator kDMA_BurstSize2: burst size 2 transfer

enumerator kDMA_BurstSize4: burst size 4 transfer

enumerator kDMA_BurstSize8: burst size 8 transfer

enumerator kDMA_BurstSize16: burst size 16 transfer

enumerator kDMA_BurstSize32: burst size 32 transfer

enumerator kDMA_BurstSize64: burst size 64 transfer

enumerator kDMA_BurstSize128: burst size 128 transfer

enumerator kDMA_BurstSize256: burst size 256 transfer

enumerator kDMA_BurstSize512: burst size 512 transfer

enumerator kDMA_BurstSize1024: burst size 1024 transfer

enum _dma_trigger_burst

DMA trigger burst.

Values:

enumerator kDMA_SingleTransfer: Single transfer

enumerator kDMA_LevelBurstTransfer: Burst transfer driven by level trigger

enumerator kDMA_EdgeBurstTransfer1: Perform 1 transfer by edge trigger

enumerator kDMA_EdgeBurstTransfer2: Perform 2 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer4: Perform 4 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer8: Perform 8 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer16: Perform 16 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer32: Perform 32 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer64: Perform 64 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer128: Perform 128 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer256: Perform 256 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer512: Perform 512 transfers by edge trigger

enumerator kDMA_EdgeBurstTransfer1024: Perform 1024 transfers by edge trigger

enum _dma_burst_wrap

DMA burst wrapping.

Values:

enumerator kDMA_NoWrap: Wrapping is disabled

enumerator kDMA_SrcWrap: Wrapping is enabled for source

enumerator kDMA_DstWrap: Wrapping is enabled for destination

enumerator kDMA_SrcAndDstWrap: Wrapping is enabled for source and destination

enum _dma_transfer_type

DMA transfer type.

Values:

enumerator kDMA_MemoryToMemory: Transfer from memory to memory (increment source and destination)

enumerator kDMA_PeripheralToMemory: Transfer from peripheral to memory (increment only destination)

enumerator kDMA_MemoryToPeripheral: Transfer from memory to peripheral (increment only source)

enumerator kDMA_StaticToStatic: Peripheral to static memory (do not increment source or destination)

typedef struct _dma_descriptor dma_descriptor_t: DMA descriptor structure.

typedef struct _dma_xfercfg dma_xfercfg_t: DMA transfer configuration.

typedef enum _dma_priority dma_priority_t: DMA channel priority.

typedef enum _dma_int dma_irq_t: DMA interrupt flags.

typedef enum _dma_trigger_type dma_trigger_type_t: DMA trigger type.

typedef enum _dma_trigger_burst dma_trigger_burst_t: DMA trigger burst.

typedef enum _dma_burst_wrap dma_burst_wrap_t: DMA burst wrapping.

typedef enum _dma_transfer_type dma_transfer_type_t: DMA transfer type.

typedef struct _dma_channel_trigger dma_channel_trigger_t: DMA channel trigger.

typedef struct _dma_channel_config dma_channel_config_t: DMA channel trigger.

typedef struct _dma_transfer_config dma_transfer_config_t: DMA transfer configuration.

typedef void (*dma_callback)(struct _dma_handle *handle, void *userData, bool transferDone, uint32_t intmode): Define Callback function for DMA.

typedef struct _dma_handle dma_handle_t: DMA transfer handle structure.

DMA_MAX_TRANSFER_COUNT: DMA max transfer size.

FSL_FEATURE_DMA_LINK_DESCRIPTOR_ALIGN_SIZE

DMA channel numbers.

DMA head link descriptor table align size

DMA_ALLOCATE_HEAD_DESCRIPTORS(name, number)

DMA head descriptor table allocate macro To simplify user interface, this macro will help allocate descriptor memory, user just need to provide the name and the number for the allocate descriptor.

Parameters:

name – Allocate decriptor name.
number – Number of descriptor to be allocated.

DMA_ALLOCATE_HEAD_DESCRIPTORS_AT_NONCACHEABLE(name, number)

DMA head descriptor table allocate macro at noncacheable section To simplify user interface, this macro will help allocate descriptor memory at noncacheable section, user just need to provide the name and the number for the allocate descriptor.

Parameters:

name – Allocate decriptor name.
number – Number of descriptor to be allocated.

DMA_ALLOCATE_LINK_DESCRIPTORS(name, number)

DMA link descriptor table allocate macro To simplify user interface, this macro will help allocate descriptor memory, user just need to provide the name and the number for the allocate descriptor.

Parameters:

name – Allocate decriptor name.
number – Number of descriptor to be allocated.

DMA_ALLOCATE_LINK_DESCRIPTORS_AT_NONCACHEABLE(name, number)

DMA link descriptor table allocate macro at noncacheable section To simplify user interface, this macro will help allocate descriptor memory at noncacheable section, user just need to provide the name and the number for the allocate descriptor.

Parameters:

name – Allocate decriptor name.
number – Number of descriptor to be allocated.

DMA_ALLOCATE_DATA_TRANSFER_BUFFER(name, width): DMA transfer buffer address need to align with the transfer width.

DMA_CHANNEL_GROUP(channel)

DMA_CHANNEL_INDEX(base, channel)

DMA_COMMON_REG_GET(base, channel, reg): DMA linked descriptor address algin size.

DMA_COMMON_CONST_REG_GET(base, channel, reg)

DMA_COMMON_REG_SET(base, channel, reg, value)

DMA_DESCRIPTOR_END_ADDRESS(start, inc, bytes, width)

DMA descriptor end address calculate.

Parameters:

start – start address
inc – address interleave size
bytes – transfer bytes
width – transfer width

DMA_CHANNEL_XFER(reload, clrTrig, intA, intB, width, srcInc, dstInc, bytes)

struct _dma_descriptor

#include <fsl_dma.h>

DMA descriptor structure.

Public Members

volatile uint32_t xfercfg: Transfer configuration

void *srcEndAddr: Last source address of DMA transfer

void *dstEndAddr: Last destination address of DMA transfer

void *linkToNextDesc: Address of next DMA descriptor in chain

struct _dma_xfercfg

#include <fsl_dma.h>

DMA transfer configuration.

Public Members

bool valid: Descriptor is ready to transfer

bool reload: Reload channel configuration register after current descriptor is exhausted

bool swtrig: Perform software trigger. Transfer if fired when ‘valid’ is set

bool clrtrig: Clear trigger

bool intA: Raises IRQ when transfer is done and set IRQA status register flag

bool intB: Raises IRQ when transfer is done and set IRQB status register flag

uint8_t byteWidth: Byte width of data to transfer

uint8_t srcInc: Increment source address by ‘srcInc’ x ‘byteWidth’

uint8_t dstInc: Increment destination address by ‘dstInc’ x ‘byteWidth’

uint16_t transferCount: Number of transfers

struct _dma_channel_trigger

#include <fsl_dma.h>

DMA channel trigger.

Public Members

dma_trigger_type_t type: Select hardware trigger as edge triggered or level triggered.

dma_trigger_burst_t burst: Select whether hardware triggers cause a single or burst transfer.

dma_burst_wrap_t wrap: Select wrap type, source wrap or dest wrap, or both.

struct _dma_channel_config

#include <fsl_dma.h>

DMA channel trigger.

Public Members

void *srcStartAddr: Source data address

void *dstStartAddr: Destination data address

void *nextDesc: Chain custom descriptor

uint32_t xferCfg: channel transfer configurations

dma_channel_trigger_t *trigger: DMA trigger type

bool isPeriph: select the request type

struct _dma_transfer_config

#include <fsl_dma.h>

DMA transfer configuration.

Public Members

uint8_t *srcAddr: Source data address

uint8_t *dstAddr: Destination data address

uint8_t *nextDesc: Chain custom descriptor

dma_xfercfg_t xfercfg: Transfer options

bool isPeriph: DMA transfer is driven by peripheral

struct _dma_handle

#include <fsl_dma.h>

DMA transfer handle structure.

Public Members

dma_callback callback: Callback function. Invoked when transfer of descriptor with interrupt flag finishes

void *userData: Callback function parameter

DMA_Type *base: DMA peripheral base address

uint8_t channel: DMA channel number

DMIC: Digital Microphone

DMIC DMA Driver

status_t DMIC_TransferCreateHandleDMA(DMIC_Type *base, dmic_dma_handle_t *handle, dmic_dma_transfer_callback_t callback, void *userData, dma_handle_t *rxDmaHandle)

Initializes the DMIC handle which is used in transactional functions.

Parameters:

base – DMIC peripheral base address.
handle – Pointer to dmic_dma_handle_t structure.
callback – Callback function.
userData – User data.
rxDmaHandle – User-requested DMA handle for RX DMA transfer.

status_t DMIC_TransferReceiveDMA(DMIC_Type *base, dmic_dma_handle_t *handle, dmic_transfer_t *xfer, uint32_t channel)

Receives data using DMA.

This function receives data using DMA. This is a non-blocking function, which returns right away. When all data is received, the receive callback function is called.

Parameters:

base – USART peripheral base address.
handle – Pointer to usart_dma_handle_t structure.
xfer – DMIC DMA transfer structure. See dmic_transfer_t.
channel – DMIC start channel number.

Return values:

kStatus_Success –

void DMIC_TransferAbortReceiveDMA(DMIC_Type *base, dmic_dma_handle_t *handle)

Aborts the received data using DMA.

This function aborts the received data using DMA.

Parameters:

base – DMIC peripheral base address
handle – Pointer to dmic_dma_handle_t structure

status_t DMIC_TransferGetReceiveCountDMA(DMIC_Type *base, dmic_dma_handle_t *handle, uint32_t *count)

Get the number of bytes that have been received.

This function gets the number of bytes that have been received.

Parameters:

base – DMIC peripheral base address.
handle – DMIC handle pointer.
count – Receive bytes count.

Return values:

kStatus_NoTransferInProgress – No receive in progress.
kStatus_InvalidArgument – Parameter is invalid.
kStatus_Success – Get successfully through the parameter count;

void DMIC_InstallDMADescriptorMemory(dmic_dma_handle_t *handle, void *linkAddr, size_t linkNum)

Install DMA descriptor memory.

This function used to register DMA descriptor memory for linked transfer, a typical case is ping pong transfer which will request more than one DMA descriptor memory space, it should be called after DMIC_TransferCreateHandleDMA. User should be take care about the address of DMA descriptor pool which required align with 16BYTE at least.

Parameters:

handle – Pointer to DMA channel transfer handle.
linkAddr – DMA link descriptor address.
linkNum – DMA link descriptor number.

FSL_DMIC_DMA_DRIVER_VERSION: DMIC DMA driver version 2.4.0.

typedef struct _dmic_transfer dmic_transfer_t: DMIC transfer structure.

typedef struct _dmic_dma_handle dmic_dma_handle_t

typedef void (*dmic_dma_transfer_callback_t)(DMIC_Type *base, dmic_dma_handle_t *handle, status_t status, void *userData): DMIC transfer callback function.

struct _dmic_transfer

#include <fsl_dmic_dma.h>

DMIC transfer structure.

Public Members

void *data: The buffer of data to be transfer.

uint8_t dataWidth: DMIC support 16bit/32bit

size_t dataSize: The byte count to be transfer.

uint8_t dataAddrInterleaveSize: destination address interleave size

struct _dmic_transfer *linkTransfer: use to support link transfer

struct _dmic_dma_handle

#include <fsl_dmic_dma.h>

DMIC DMA handle.

Public Members

DMIC_Type *base: DMIC peripheral base address.

dma_handle_t *rxDmaHandle: The DMA RX channel used.

dmic_dma_transfer_callback_t callback: Callback function.

void *userData: DMIC callback function parameter.

size_t transferSize: Size of the data to receive.

volatile uint8_t state: Internal state of DMIC DMA transfer

uint32_t channel: DMIC channel used.

bool isChannelValid: DMIC channel initialization flag

dma_descriptor_t *desLink: descriptor pool pointer

size_t linkNum: number of descriptor in descriptors pool

DMIC Driver

uint32_t DMIC_GetInstance(DMIC_Type *base)

Get the DMIC instance from peripheral base address.

Parameters:

base – DMIC peripheral base address.

Returns:

DMIC instance.

void DMIC_Init(DMIC_Type *base)

Turns DMIC Clock on.

Parameters:

base – : DMIC base

Returns:

Nothing

void DMIC_DeInit(DMIC_Type *base)

Turns DMIC Clock off.

Parameters:

base – : DMIC base

Returns:

Nothing

void DMIC_SetOperationMode(DMIC_Type *base, operation_mode_t mode)

Set DMIC operating mode.

Deprecated:: Do not use this function. It has been superceded by DMIC_EnableChannelInterrupt, DMIC_EnableChannelDma.

Parameters:

base – : The base address of DMIC interface
mode – : DMIC mode

Returns:

Nothing

void DMIC_Use2fs(DMIC_Type *base, bool use2fs)

Configure Clock scaling.

Parameters:

base – : The base address of DMIC interface
use2fs – : clock scaling

Returns:

Nothing

void DMIC_CfgChannelDc(DMIC_Type *base, dmic_channel_t channel, dc_removal_t dc_cut_level, uint32_t post_dc_gain_reduce, bool saturate16bit)

Configure DMIC channel.

Parameters:

base – : The base address of DMIC interface
channel – : DMIC channel
dc_cut_level – : dc_removal_t, Cut off Frequency
post_dc_gain_reduce – : Fine gain adjustment in the form of a number of bits to downshift.
saturate16bit – : If selects 16-bit saturation.

static inline void DMIC_EnableChannelSignExtend(DMIC_Type *base, dmic_channel_t channel, bool enable)

Enbale channel sign extend which allows processing of 24bit audio data on 32bit machines.

Parameters:

base – : The base address of DMIC interface
channel – : DMIC channel
enable – : true is enable sign extend, false is disable sign extend

void DMIC_ConfigChannel(DMIC_Type *base, dmic_channel_t channel, stereo_side_t side, dmic_channel_config_t *channel_config)

Configure DMIC channel.

Parameters:

base – : The base address of DMIC interface
channel – : DMIC channel
side – : stereo_side_t, choice of left or right
channel_config – : Channel configuration

Returns:

Nothing

void DMIC_EnableChannnel(DMIC_Type *base, uint32_t channelmask)

Enable a particualr channel.

Parameters:

base – : The base address of DMIC interface
channelmask – reference _dmic_channel_mask

Returns:

Nothing

void DMIC_FifoChannel(DMIC_Type *base, uint32_t channel, uint32_t trig_level, uint32_t enable, uint32_t resetn)

Configure fifo settings for DMIC channel.

Parameters:

base – : The base address of DMIC interface
channel – : DMIC channel
trig_level – : FIFO trigger level
enable – : FIFO level
resetn – : FIFO reset

Returns:

Nothing

static inline void DMIC_EnableChannelInterrupt(DMIC_Type *base, dmic_channel_t channel, bool enable)

Enable a particualr channel interrupt request.

Parameters:

base – : The base address of DMIC interface
channel – : Channel selection
enable – : true is enable, false is disable

static inline void DMIC_EnableChannelDma(DMIC_Type *base, dmic_channel_t channel, bool enable)

Enable a particualr channel dma request.

Parameters:

base – : The base address of DMIC interface
channel – : Channel selection
enable – : true is enable, false is disable

static inline void DMIC_EnableChannelFifo(DMIC_Type *base, dmic_channel_t channel, bool enable)

Enable a particualr channel fifo.

Parameters:

base – : The base address of DMIC interface
channel – : Channel selection
enable – : true is enable, false is disable

static inline void DMIC_DoFifoReset(DMIC_Type *base, dmic_channel_t channel)

Channel fifo reset.

Parameters:

base – : The base address of DMIC interface
channel – : Channel selection

static inline uint32_t DMIC_FifoGetStatus(DMIC_Type *base, uint32_t channel)

Get FIFO status.

Parameters:

base – : The base address of DMIC interface
channel – : DMIC channel

Returns:

FIFO status

static inline void DMIC_FifoClearStatus(DMIC_Type *base, uint32_t channel, uint32_t mask)

Clear FIFO status.

Parameters:

base – : The base address of DMIC interface
channel – : DMIC channel
mask – : Bits to be cleared

Returns:

FIFO status

static inline uint32_t DMIC_FifoGetData(DMIC_Type *base, uint32_t channel)

Get FIFO data.

Parameters:

base – : The base address of DMIC interface
channel – : DMIC channel

Returns:

FIFO data

static inline uint32_t DMIC_FifoGetAddress(DMIC_Type *base, uint32_t channel)

Get FIFO address.

Parameters:

base – : The base address of DMIC interface
channel – : DMIC channel

Returns:

FIFO data

void DMIC_ResetChannelDecimator(DMIC_Type *base, uint32_t channelMask, bool reset)

DMIC channel Decimator reset.

Parameters:

base – : The base address of DMIC interface
channelMask – : DMIC channel mask, reference _dmic_channel_mask
reset – : true is reset decimator, false is release decimator.

static inline void DMIC_EnableChannelGlobalSync(DMIC_Type *base, uint32_t channelMask, uint32_t syncCounter)

Enable DMIC channel global sync function.

Parameters:

base – : The base address of DMIC interface
channelMask – : DMIC channel mask, reference _dmic_channel_mask
syncCounter – :sync counter will trigger a pulse whenever count reaches CCOUNTVAL. If CCOUNTVAL is set to 0, there will be a pulse on every cycle

static inline void DMIC_DisableChannelGlobalSync(DMIC_Type *base, uint32_t channelMask)

Disbale DMIC channel global sync function.

Parameters:

base – : The base address of DMIC interface
channelMask – : DMIC channel mask, reference _dmic_channel_mask

void DMIC_EnableIntCallback(DMIC_Type *base, dmic_callback_t cb)

Enable callback.

This function enables the interrupt for the selected DMIC peripheral. The callback function is not enabled until this function is called.

Parameters:

base – Base address of the DMIC peripheral.
cb – callback Pointer to store callback function.

Return values:

None. –

void DMIC_DisableIntCallback(DMIC_Type *base, dmic_callback_t cb)

Disable callback.

This function disables the interrupt for the selected DMIC peripheral.

Parameters:

base – Base address of the DMIC peripheral.
cb – callback Pointer to store callback function..

Return values:

None. –

static inline void DMIC_SetGainNoiseEstHwvad(DMIC_Type *base, uint32_t value)

Sets the gain value for the noise estimator.

Parameters:

base – DMIC base pointer
value – gain value for the noise estimator.

Return values:

None. –

static inline void DMIC_SetGainSignalEstHwvad(DMIC_Type *base, uint32_t value)

Sets the gain value for the signal estimator.

Parameters:

base – DMIC base pointer
value – gain value for the signal estimator.

Return values:

None. –

static inline void DMIC_SetFilterCtrlHwvad(DMIC_Type *base, uint32_t value)

Sets the hwvad filter cutoff frequency parameter.

Parameters:

base – DMIC base pointer
value – cut off frequency value.

Return values:

None. –

static inline void DMIC_SetInputGainHwvad(DMIC_Type *base, uint32_t value)

Sets the input gain of hwvad.

Parameters:

base – DMIC base pointer
value – input gain value for hwvad.

Return values:

None. –

static inline void DMIC_CtrlClrIntrHwvad(DMIC_Type *base, bool st10)

Clears hwvad internal interrupt flag.

Parameters:

base – DMIC base pointer
st10 – bit value.

Return values:

None. –

static inline void DMIC_FilterResetHwvad(DMIC_Type *base, bool rstt)

Resets hwvad filters.

Parameters:

base – DMIC base pointer
rstt – Reset bit value.

Return values:

None. –

static inline uint16_t DMIC_GetNoiseEnvlpEst(DMIC_Type *base)

Gets the value from output of the filter z7.

Parameters:

base – DMIC base pointer

Return values:

output – of filter z7.

void DMIC_HwvadEnableIntCallback(DMIC_Type *base, dmic_hwvad_callback_t vadcb)

Enable hwvad callback.

This function enables the hwvad interrupt for the selected DMIC peripheral. The callback function is not enabled until this function is called.

Parameters:

base – Base address of the DMIC peripheral.
vadcb – callback Pointer to store callback function.

Return values:

None. –

void DMIC_HwvadDisableIntCallback(DMIC_Type *base, dmic_hwvad_callback_t vadcb)

Disable callback.

This function disables the hwvad interrupt for the selected DMIC peripheral.

Parameters:

base – Base address of the DMIC peripheral.
vadcb – callback Pointer to store callback function..

Return values:

None. –

FSL_DMIC_DRIVER_VERSION: DMIC driver version 2.3.2.

_dmic_status DMIC transfer status.

Values:

enumerator kStatus_DMIC_Busy: DMIC is busy

enumerator kStatus_DMIC_Idle: DMIC is idle

enumerator kStatus_DMIC_OverRunError: DMIC over run Error

enumerator kStatus_DMIC_UnderRunError: DMIC under run Error

enum _operation_mode

DMIC different operation modes.

Values:

enumerator kDMIC_OperationModeInterrupt: Interrupt mode

enumerator kDMIC_OperationModeDma: DMA mode

enum _stereo_side

DMIC left/right values.

Values:

enumerator kDMIC_Left: Left Stereo channel

enumerator kDMIC_Right: Right Stereo channel

enum pdm_div_t

DMIC Clock pre-divider values.

Values:

enumerator kDMIC_PdmDiv1: DMIC pre-divider set in divide by 1

enumerator kDMIC_PdmDiv2: DMIC pre-divider set in divide by 2

enumerator kDMIC_PdmDiv3: DMIC pre-divider set in divide by 3

enumerator kDMIC_PdmDiv4: DMIC pre-divider set in divide by 4

enumerator kDMIC_PdmDiv6: DMIC pre-divider set in divide by 6

enumerator kDMIC_PdmDiv8: DMIC pre-divider set in divide by 8

enumerator kDMIC_PdmDiv12: DMIC pre-divider set in divide by 12

enumerator kDMIC_PdmDiv16: DMIC pre-divider set in divide by 16

enumerator kDMIC_PdmDiv24: DMIC pre-divider set in divide by 24

enumerator kDMIC_PdmDiv32: DMIC pre-divider set in divide by 32

enumerator kDMIC_PdmDiv48: DMIC pre-divider set in divide by 48

enumerator kDMIC_PdmDiv64: DMIC pre-divider set in divide by 64

enumerator kDMIC_PdmDiv96: DMIC pre-divider set in divide by 96

enumerator kDMIC_PdmDiv128: DMIC pre-divider set in divide by 128

enum _compensation

Pre-emphasis Filter coefficient value for 2FS and 4FS modes.

Values:

enumerator kDMIC_CompValueZero: Compensation 0

enumerator kDMIC_CompValueNegativePoint16: Compensation -0.16

enumerator kDMIC_CompValueNegativePoint15: Compensation -0.15

enumerator kDMIC_CompValueNegativePoint13: Compensation -0.13

enum _dc_removal

DMIC DC filter control values.

Values:

enumerator kDMIC_DcNoRemove: Flat response no filter

enumerator kDMIC_DcCut155: Cut off Frequency is 155 Hz

enumerator kDMIC_DcCut78: Cut off Frequency is 78 Hz

enumerator kDMIC_DcCut39: Cut off Frequency is 39 Hz

enum _dmic_channel

DMIC Channel number.

Values:

enumerator kDMIC_Channel0: DMIC channel 0

enumerator kDMIC_Channel1: DMIC channel 1

_dmic_channel_mask DMIC Channel mask.

Values:

enumerator kDMIC_EnableChannel0: DMIC channel 0 mask

enumerator kDMIC_EnableChannel1: DMIC channel 1 mask

enum _dmic_phy_sample_rate

DMIC and decimator sample rates.

Values:

enumerator kDMIC_PhyFullSpeed: Decimator gets one sample per each chosen clock edge of PDM interface

enumerator kDMIC_PhyHalfSpeed: PDM clock to Microphone is halved, decimator receives each sample twice

typedef enum _operation_mode operation_mode_t: DMIC different operation modes.

typedef enum _stereo_side stereo_side_t: DMIC left/right values.

typedef enum _compensation compensation_t: Pre-emphasis Filter coefficient value for 2FS and 4FS modes.

typedef enum _dc_removal dc_removal_t: DMIC DC filter control values.

typedef enum _dmic_channel dmic_channel_t: DMIC Channel number.

typedef enum _dmic_phy_sample_rate dmic_phy_sample_rate_t: DMIC and decimator sample rates.

typedef struct _dmic_channel_config dmic_channel_config_t: DMIC Channel configuration structure.

typedef void (*dmic_callback_t)(void): DMIC Callback function.

typedef void (*dmic_hwvad_callback_t)(void): HWVAD Callback function.

struct _dmic_channel_config

#include <fsl_dmic.h>

DMIC Channel configuration structure.

Public Members

pdm_div_t divhfclk: DMIC Clock pre-divider values

uint32_t osr: oversampling rate(CIC decimation rate) for PCM

int32_t gainshft: 4FS PCM data gain control

compensation_t preac2coef: Pre-emphasis Filter coefficient value for 2FS

compensation_t preac4coef: Pre-emphasis Filter coefficient value for 4FS

dc_removal_t dc_cut_level: DMIC DC filter control values.

uint32_t post_dc_gain_reduce: Fine gain adjustment in the form of a number of bits to downshift

dmic_phy_sample_rate_t sample_rate: DMIC and decimator sample rates

bool saturate16bit: Selects 16-bit saturation. 0 means results roll over if out range and do not saturate. 1 means if the result overflows, it saturates at 0xFFFF for positive overflow and 0x8000 for negative overflow.

bool enableSignExtend: sign extend feature which allows processing of 24bit audio data on 32bit machine

ENET: Ethernet MAC Driver

void ENET_GetDefaultConfig(enet_config_t *config)

Gets the ENET default configuration structure.

The purpose of this API is to get the default ENET MAC controller configure structure for ENET_Init(). User may use the initialized structure unchanged in ENET_Init(), or modify some fields of the structure before calling ENET_Init(). Example:

enet_config_t config;
ENET_GetDefaultConfig(&config);

Parameters:

config – The ENET mac controller configuration structure pointer.

status_t ENET_Up(ENET_Type *base, enet_handle_t *handle, const enet_config_t *config, const enet_buffer_config_t *bufferConfig, uint8_t *macAddr, uint32_t srcClock_Hz)

Initializes the ENET module.

This function initializes the module with the ENET configuration.

Note

ENET has two buffer descriptors legacy buffer descriptors and enhanced IEEE 1588 buffer descriptors. The legacy descriptor is used by default. To use the IEEE 1588 feature, use the enhanced IEEE 1588 buffer descriptor by defining “ENET_ENHANCEDBUFFERDESCRIPTOR_MODE” and calling ENET_Ptp1588Configure() to configure the 1588 feature and related buffers after calling ENET_Up().

Parameters:

base – ENET peripheral base address.
handle – ENET handler pointer.
config – ENET mac configuration structure pointer. The “enet_config_t” type mac configuration return from ENET_GetDefaultConfig can be used directly. It is also possible to verify the Mac configuration using other methods.
bufferConfig – ENET buffer configuration structure pointer. The buffer configuration should be prepared for ENET Initialization. It is the start address of “ringNum” enet_buffer_config structures. To support added multi-ring features in some soc and compatible with the previous enet driver version. For single ring supported, this bufferConfig is a buffer configure structure pointer, for multi-ring supported and used case, this bufferConfig pointer should be a buffer configure structure array pointer.
macAddr – ENET mac address of Ethernet device. This MAC address should be provided.
srcClock_Hz – The internal module clock source for MII clock.

Return values:

kStatus_Success – Succeed to initialize the ethernet driver.
kStatus_ENET_InitMemoryFail – Init fails since buffer memory is not enough.

status_t ENET_Init(ENET_Type *base, enet_handle_t *handle, const enet_config_t *config, const enet_buffer_config_t *bufferConfig, uint8_t *macAddr, uint32_t srcClock_Hz)

Initializes the ENET module.

This function ungates the module clock and initializes it with the ENET configuration.

Note

ENET has two buffer descriptors legacy buffer descriptors and enhanced IEEE 1588 buffer descriptors. The legacy descriptor is used by default. To use the IEEE 1588 feature, use the enhanced IEEE 1588 buffer descriptor by defining “ENET_ENHANCEDBUFFERDESCRIPTOR_MODE” and calling ENET_Ptp1588Configure() to configure the 1588 feature and related buffers after calling ENET_Init().

Parameters:

base – ENET peripheral base address.
handle – ENET handler pointer.
config – ENET mac configuration structure pointer. The “enet_config_t” type mac configuration return from ENET_GetDefaultConfig can be used directly. It is also possible to verify the Mac configuration using other methods.
bufferConfig – ENET buffer configuration structure pointer. The buffer configuration should be prepared for ENET Initialization. It is the start address of “ringNum” enet_buffer_config structures. To support added multi-ring features in some soc and compatible with the previous enet driver version. For single ring supported, this bufferConfig is a buffer configure structure pointer, for multi-ring supported and used case, this bufferConfig pointer should be a buffer configure structure array pointer.
macAddr – ENET mac address of Ethernet device. This MAC address should be provided.
srcClock_Hz – The internal module clock source for MII clock.

Return values:

kStatus_Success – Succeed to initialize the ethernet driver.
kStatus_ENET_InitMemoryFail – Init fails since buffer memory is not enough.

void ENET_Down(ENET_Type *base)

Stops the ENET module.

This function disables the ENET module.

Parameters:

base – ENET peripheral base address.

void ENET_Deinit(ENET_Type *base)

Deinitializes the ENET module.

This function gates the module clock, clears ENET interrupts, and disables the ENET module.

Parameters:

base – ENET peripheral base address.

static inline void ENET_Reset(ENET_Type *base)

Resets the ENET module.

This function restores the ENET module to reset state. Note that this function sets all registers to reset state. As a result, the ENET module can’t work after calling this function.

Parameters:

base – ENET peripheral base address.

void ENET_ResetHardware(void)

Resets the ENET hardware.

This function resets ENET related resources in the hardware.

void ENET_SetMII(ENET_Type *base, enet_mii_speed_t speed, enet_mii_duplex_t duplex)

Sets the ENET MII speed and duplex.

This API is provided to dynamically change the speed and dulpex for MAC.

Parameters:

base – ENET peripheral base address.
speed – The speed of the RMII mode.
duplex – The duplex of the RMII mode.

void ENET_SetSMI(ENET_Type *base, uint32_t srcClock_Hz, bool isPreambleDisabled)

Sets the ENET SMI(serial management interface)- MII management interface.

Parameters:

base – ENET peripheral base address.
srcClock_Hz – This is the ENET module clock frequency. See clock distribution.
isPreambleDisabled – The preamble disable flag.
- true Enables the preamble.
- false Disables the preamble.

static inline bool ENET_GetSMI(ENET_Type *base)

Gets the ENET SMI- MII management interface configuration.

This API is used to get the SMI configuration to check whether the MII management interface has been set.

Parameters:

base – ENET peripheral base address.

Returns:

The SMI setup status true or false.

static inline uint32_t ENET_ReadSMIData(ENET_Type *base)

Reads data from the PHY register through an SMI interface.

Parameters:

base – ENET peripheral base address.

Returns:

The data read from PHY

static inline void ENET_StartSMIWrite(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, enet_mii_write_t operation, uint16_t data)

Sends the MDIO IEEE802.3 Clause 22 format write command.

After calling this function, need to check whether the transmission is over then do next MDIO operation. For ease of use, encapsulated ENET_MDIOWrite() can be called. For customized requirements, implement with combining separated APIs.

Parameters:

base – ENET peripheral base address.
phyAddr – The PHY address. Range from 0 ~ 31.
regAddr – The PHY register address. Range from 0 ~ 31.
operation – The write operation.
data – The data written to PHY.

static inline void ENET_StartSMIRead(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, enet_mii_read_t operation)

Sends the MDIO IEEE802.3 Clause 22 format read command.

After calling this function, need to check whether the transmission is over then do next MDIO operation. For ease of use, encapsulated ENET_MDIORead() can be called. For customized requirements, implement with combining separated APIs.

Parameters:

base – ENET peripheral base address.
phyAddr – The PHY address. Range from 0 ~ 31.
regAddr – The PHY register address. Range from 0 ~ 31.
operation – The read operation.

status_t ENET_MDIOWrite(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, uint16_t data)

MDIO write with IEEE802.3 Clause 22 format.

Parameters:

base – ENET peripheral base address.
phyAddr – The PHY address. Range from 0 ~ 31.
regAddr – The PHY register. Range from 0 ~ 31.
data – The data written to PHY.

Returns:

kStatus_Success MDIO access succeeds.

Returns:

kStatus_Timeout MDIO access timeout.

status_t ENET_MDIORead(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, uint16_t *pData)

MDIO read with IEEE802.3 Clause 22 format.

Parameters:

base – ENET peripheral base address.
phyAddr – The PHY address. Range from 0 ~ 31.
regAddr – The PHY register. Range from 0 ~ 31.
pData – The data read from PHY.

Returns:

kStatus_Success MDIO access succeeds.

Returns:

kStatus_Timeout MDIO access timeout.

static inline void ENET_StartExtC45SMIWriteReg(ENET_Type *base, uint8_t portAddr, uint8_t devAddr, uint16_t regAddr)

Sends the MDIO IEEE802.3 Clause 45 format write register command.

After calling this function, need to check whether the transmission is over then do next MDIO operation. For ease of use, encapsulated ENET_MDIOC45Write()/ENET_MDIOC45Read() can be called. For customized requirements, implement with combining separated APIs.

Parameters:

base – ENET peripheral base address.
portAddr – The MDIO port address(PHY address).
devAddr – The device address.
regAddr – The PHY register address.

static inline void ENET_StartExtC45SMIWriteData(ENET_Type *base, uint8_t portAddr, uint8_t devAddr, uint16_t data)

Sends the MDIO IEEE802.3 Clause 45 format write data command.

After calling this function, need to check whether the transmission is over then do next MDIO operation. For ease of use, encapsulated ENET_MDIOC45Write() can be called. For customized requirements, implement with combining separated APIs.

Parameters:

base – ENET peripheral base address.
portAddr – The MDIO port address(PHY address).
devAddr – The device address.
data – The data written to PHY.

static inline void ENET_StartExtC45SMIReadData(ENET_Type *base, uint8_t portAddr, uint8_t devAddr)

Sends the MDIO IEEE802.3 Clause 45 format read data command.

After calling this function, need to check whether the transmission is over then do next MDIO operation. For ease of use, encapsulated ENET_MDIOC45Read() can be called. For customized requirements, implement with combining separated APIs.

Parameters:

base – ENET peripheral base address.
portAddr – The MDIO port address(PHY address).
devAddr – The device address.

status_t ENET_MDIOC45Write(ENET_Type *base, uint8_t portAddr, uint8_t devAddr, uint16_t regAddr, uint16_t data)

MDIO write with IEEE802.3 Clause 45 format.

Parameters:

base – ENET peripheral base address.
portAddr – The MDIO port address(PHY address).
devAddr – The device address.
regAddr – The PHY register address.
data – The data written to PHY.

Returns:

kStatus_Success MDIO access succeeds.

Returns:

kStatus_Timeout MDIO access timeout.

status_t ENET_MDIOC45Read(ENET_Type *base, uint8_t portAddr, uint8_t devAddr, uint16_t regAddr, uint16_t *pData)

MDIO read with IEEE802.3 Clause 45 format.

Parameters:

base – ENET peripheral base address.
portAddr – The MDIO port address(PHY address).
devAddr – The device address.
regAddr – The PHY register address.
pData – The data read from PHY.

Returns:

kStatus_Success MDIO access succeeds.

Returns:

kStatus_Timeout MDIO access timeout.

static inline void ENET_SetRGMIIClockDelay(ENET_Type *base, bool txEnabled, bool rxEnabled)

Control the usage of the delayed tx/rx RGMII clock.

Parameters:

base – ENET peripheral base address.
txEnabled – Enable or disable to generate the delayed version of RGMII_TXC.
rxEnabled – Enable or disable to use the delayed version of RGMII_RXC.

void ENET_SetMacAddr(ENET_Type *base, uint8_t *macAddr)

Sets the ENET module Mac address.

Parameters:

base – ENET peripheral base address.
macAddr – The six-byte Mac address pointer. The pointer is allocated by application and input into the API.

void ENET_GetMacAddr(ENET_Type *base, uint8_t *macAddr)

Gets the ENET module Mac address.

Parameters:

base – ENET peripheral base address.
macAddr – The six-byte Mac address pointer. The pointer is allocated by application and input into the API.

void ENET_AddMulticastGroup(ENET_Type *base, uint8_t *address)

Adds the ENET device to a multicast group.

Parameters:

base – ENET peripheral base address.
address – The six-byte multicast group address which is provided by application.

void ENET_LeaveMulticastGroup(ENET_Type *base, uint8_t *address)

Moves the ENET device from a multicast group.

Parameters:

base – ENET peripheral base address.
address – The six-byte multicast group address which is provided by application.

static inline void ENET_ActiveRead(ENET_Type *base)

Activates frame reception for multiple rings.

This function is to active the enet read process.

Note

This must be called after the MAC configuration and state are ready. It must be called after the ENET_Init(). This should be called when the frame reception is required.

Parameters:

base – ENET peripheral base address.

static inline void ENET_EnableSleepMode(ENET_Type *base, bool enable)

Enables/disables the MAC to enter sleep mode. This function is used to set the MAC enter sleep mode. When entering sleep mode, the magic frame wakeup interrupt should be enabled to wake up MAC from the sleep mode and reset it to normal mode.

Parameters:

base – ENET peripheral base address.
enable – True enable sleep mode, false disable sleep mode.

static inline void ENET_GetAccelFunction(ENET_Type *base, uint32_t *txAccelOption, uint32_t *rxAccelOption)

Gets ENET transmit and receive accelerator functions from MAC controller.

Parameters:

base – ENET peripheral base address.
txAccelOption – The transmit accelerator option. The “enet_tx_accelerator_t” is recommended to be used to as the mask to get the exact the accelerator option.
rxAccelOption – The receive accelerator option. The “enet_rx_accelerator_t” is recommended to be used to as the mask to get the exact the accelerator option.

static inline void ENET_EnableInterrupts(ENET_Type *base, uint32_t mask)

Enables the ENET interrupt.

This function enables the ENET interrupt according to the provided mask. The mask is a logical OR of enumeration members. See enet_interrupt_enable_t. For example, to enable the TX frame interrupt and RX frame interrupt, do the following.

ENET_EnableInterrupts(ENET, kENET_TxFrameInterrupt | kENET_RxFrameInterrupt);

Parameters:

base – ENET peripheral base address.
mask – ENET interrupts to enable. This is a logical OR of the enumeration enet_interrupt_enable_t.

static inline void ENET_DisableInterrupts(ENET_Type *base, uint32_t mask)

Disables the ENET interrupt.

This function disables the ENET interrupts according to the provided mask. The mask is a logical OR of enumeration members. See enet_interrupt_enable_t. For example, to disable the TX frame interrupt and RX frame interrupt, do the following.

ENET_DisableInterrupts(ENET, kENET_TxFrameInterrupt | kENET_RxFrameInterrupt);

Parameters:

base – ENET peripheral base address.
mask – ENET interrupts to disable. This is a logical OR of the enumeration enet_interrupt_enable_t.

static inline uint32_t ENET_GetInterruptStatus(ENET_Type *base)

Gets the ENET interrupt status flag.

Parameters:

base – ENET peripheral base address.

Returns:

The event status of the interrupt source. This is the logical OR of members of the enumeration enet_interrupt_enable_t.

static inline void ENET_ClearInterruptStatus(ENET_Type *base, uint32_t mask)

Clears the ENET interrupt events status flag.

This function clears enabled ENET interrupts according to the provided mask. The mask is a logical OR of enumeration members. See the enet_interrupt_enable_t. For example, to clear the TX frame interrupt and RX frame interrupt, do the following.

ENET_ClearInterruptStatus(ENET, kENET_TxFrameInterrupt | kENET_RxFrameInterrupt);

Parameters:

base – ENET peripheral base address.
mask – ENET interrupt source to be cleared. This is the logical OR of members of the enumeration enet_interrupt_enable_t.

void ENET_SetRxISRHandler(ENET_Type *base, enet_isr_t ISRHandler)

Set the second level Rx IRQ handler.

Parameters:

base – ENET peripheral base address.
ISRHandler – The handler to install.

void ENET_SetTxISRHandler(ENET_Type *base, enet_isr_t ISRHandler)

Set the second level Tx IRQ handler.

Parameters:

base – ENET peripheral base address.
ISRHandler – The handler to install.

void ENET_SetErrISRHandler(ENET_Type *base, enet_isr_t ISRHandler)

Set the second level Err IRQ handler.

Parameters:

base – ENET peripheral base address.
ISRHandler – The handler to install.

void ENET_GetRxErrBeforeReadFrame(enet_handle_t *handle, enet_data_error_stats_t *eErrorStatic, uint8_t ringId)

Gets the error statistics of a received frame for ENET specified ring.

This API must be called after the ENET_GetRxFrameSize and before the ENET_ReadFrame(). If the ENET_GetRxFrameSize returns kStatus_ENET_RxFrameError, the ENET_GetRxErrBeforeReadFrame can be used to get the exact error statistics. This is an example.

status = ENET_GetRxFrameSize(&g_handle, &length, 0);
if (status == kStatus_ENET_RxFrameError)
{
    Comments: Get the error information of the received frame.
    ENET_GetRxErrBeforeReadFrame(&g_handle, &eErrStatic, 0);
    Comments: update the receive buffer.
    ENET_ReadFrame(EXAMPLE_ENET, &g_handle, NULL, 0);
}

Parameters:

handle – The ENET handler structure pointer. This is the same handler pointer used in the ENET_Init.
eErrorStatic – The error statistics structure pointer.
ringId – The ring index, range from 0 ~ (FSL_FEATURE_ENET_INSTANCE_QUEUEn(x) - 1).

void ENET_EnableStatistics(ENET_Type *base, bool enable)

Enables/disables collection of transfer statistics.

Note that this function does not reset any of the already collected data, use the function ENET_ResetStatistics to clear the transfer statistics if needed.

Parameters:

base – ENET peripheral base address.
enable – True enable statistics collection, false disable statistics collection.

void ENET_GetStatistics(ENET_Type *base, enet_transfer_stats_t *statistics)

Gets transfer statistics.

Copies the actual value of hardware counters into the provided structure. Calling this function does not reset the counters in hardware.

Parameters:

base – ENET peripheral base address.
statistics – The statistics structure pointer.

void ENET_ResetStatistics(ENET_Type *base)

Resets transfer statistics.

Sets the value of hardware transfer counters to zero.

Parameters:

base – ENET peripheral base address.

status_t ENET_GetRxFrameSize(enet_handle_t *handle, uint32_t *length, uint8_t ringId)

Gets the size of the read frame for specified ring.

This function gets a received frame size from the ENET buffer descriptors.

Note

The FCS of the frame is automatically removed by MAC and the size is the length without the FCS. After calling ENET_GetRxFrameSize, ENET_ReadFrame() should be called to receive frame and update the BD if the result is not “kStatus_ENET_RxFrameEmpty”.

Parameters:

handle – The ENET handler structure. This is the same handler pointer used in the ENET_Init.
length – The length of the valid frame received.
ringId – The ring index or ring number.

Return values:

kStatus_ENET_RxFrameEmpty – No frame received. Should not call ENET_ReadFrame to read frame.
kStatus_ENET_RxFrameError – Data error happens. ENET_ReadFrame should be called with NULL data and NULL length to update the receive buffers.
kStatus_Success – Receive a frame Successfully then the ENET_ReadFrame should be called with the right data buffer and the captured data length input.

status_t ENET_ReadFrame(ENET_Type *base, enet_handle_t *handle, uint8_t *data, uint32_t length, uint8_t ringId, uint32_t *ts)

Reads a frame from the ENET device. This function reads a frame (both the data and the length) from the ENET buffer descriptors. User can get timestamp through ts pointer if the ts is not NULL.

Note

It doesn’t store the timestamp in the receive timestamp queue. The ENET_GetRxFrameSize should be used to get the size of the prepared data buffer. This API uses memcpy to copy data from DMA buffer to application buffer, 4 bytes aligned data buffer in 32 bits platforms provided by user may let compiler use optimization instruction to reduce time consumption. This is an example:

uint32_t length;
enet_handle_t g_handle;
Comments: Get the received frame size firstly.
status = ENET_GetRxFrameSize(&g_handle, &length, 0);
if (length != 0)
{
    Comments: Allocate memory here with the size of "length"
    uint8_t *data = memory allocate interface;
    if (!data)
    {
        ENET_ReadFrame(ENET, &g_handle, NULL, 0, 0, NULL);
        Comments: Add the console warning log.
    }
    else
    {
        status = ENET_ReadFrame(ENET, &g_handle, data, length, 0, NULL);
        Comments: Call stack input API to deliver the data to stack
    }
}
else if (status == kStatus_ENET_RxFrameError)
{
    Comments: Update the received buffer when a error frame is received.
    ENET_ReadFrame(ENET, &g_handle, NULL, 0, 0, NULL);
}

Parameters:

base – ENET peripheral base address.
handle – The ENET handler structure. This is the same handler pointer used in the ENET_Init.
data – The data buffer provided by user to store the frame which memory size should be at least “length”.
length – The size of the data buffer which is still the length of the received frame.
ringId – The ring index or ring number.
ts – The timestamp address to store received timestamp.

Returns:

The execute status, successful or failure.

status_t ENET_SendFrame(ENET_Type *base, enet_handle_t *handle, const uint8_t *data, uint32_t length, uint8_t ringId, bool tsFlag, void *context)

Transmits an ENET frame for specified ring.

Note

The CRC is automatically appended to the data. Input the data to send without the CRC. This API uses memcpy to copy data from DMA buffer to application buffer, 4 bytes aligned data buffer in 32 bits platforms provided by user may let compiler use optimization instruction to reduce time consumption.

Parameters:

base – ENET peripheral base address.
handle – The ENET handler pointer. This is the same handler pointer used in the ENET_Init.
data – The data buffer provided by user to send.
length – The length of the data to send.
ringId – The ring index or ring number.
tsFlag – Timestamp enable flag.
context – Used by user to handle some events after transmit over.

Return values:

kStatus_Success – Send frame succeed.
kStatus_ENET_TxFrameBusy – Transmit buffer descriptor is busy under transmission. The transmit busy happens when the data send rate is over the MAC capacity. The waiting mechanism is recommended to be added after each call return with kStatus_ENET_TxFrameBusy.

status_t ENET_SetTxReclaim(enet_handle_t *handle, bool isEnable, uint8_t ringId)

Enable or disable tx descriptors reclaim mechanism.

Note

This function must be called when no pending send frame action. Set enable if you want to reclaim context or timestamp in interrupt.

Parameters:

handle – The ENET handler pointer. This is the same handler pointer used in the ENET_Init.
isEnable – Enable or disable flag.
ringId – The ring index or ring number.

Return values:

kStatus_Success – Succeed to enable/disable Tx reclaim.
kStatus_Fail – Fail to enable/disable Tx reclaim.

void ENET_ReclaimTxDescriptor(ENET_Type *base, enet_handle_t *handle, uint8_t ringId)

Reclaim tx descriptors. This function is used to update the tx descriptor status and store the tx timestamp when the 1588 feature is enabled. This is called by the transmit interupt IRQ handler after the complete of a frame transmission.

Parameters:

base – ENET peripheral base address.
handle – The ENET handler pointer. This is the same handler pointer used in the ENET_Init.
ringId – The ring index or ring number.

status_t ENET_GetRxFrame(ENET_Type *base, enet_handle_t *handle, enet_rx_frame_struct_t *rxFrame, uint8_t ringId)

Receives one frame in specified BD ring with zero copy.

This function uses the user-defined allocation and free callbacks. Every time application gets one frame through this function, driver stores the buffer address(es) in enet_buffer_struct_t and allocate new buffer(s) for the BD(s). If there’s no memory buffer in the pool, this function drops current one frame to keep the Rx frame in BD ring is as fresh as possible.

Note

Application must provide a memory pool including at least BD number + n buffers in order for this function to work properly, because each BD must always take one buffer while driver is running, then other extra n buffer(s) can be taken by application. Here n is the ceil(max_frame_length(set by RCR) / bd_rx_size(set by MRBR)). Application must also provide an array structure in rxFrame->rxBuffArray with n index to receive one complete frame in any case.

Parameters:

base – ENET peripheral base address.
handle – The ENET handler pointer. This is the same handler pointer used in the ENET_Init.
rxFrame – The received frame information structure provided by user.
ringId – The ring index or ring number.

Return values:

kStatus_Success – Succeed to get one frame and allocate new memory for Rx buffer.
kStatus_ENET_RxFrameEmpty – There’s no Rx frame in the BD.
kStatus_ENET_RxFrameError – There’s issue in this receiving.
kStatus_ENET_RxFrameDrop – There’s no new buffer memory for BD, drop this frame.

status_t ENET_StartTxFrame(ENET_Type *base, enet_handle_t *handle, enet_tx_frame_struct_t *txFrame, uint8_t ringId)

Sends one frame in specified BD ring with zero copy.

This function supports scattered buffer transmit, user needs to provide the buffer array.

Note

Tx reclaim should be enabled to ensure the Tx buffer ownership can be given back to application after Tx is over.

Parameters:

base – ENET peripheral base address.
handle – The ENET handler pointer. This is the same handler pointer used in the ENET_Init.
txFrame – The Tx frame structure.
ringId – The ring index or ring number.

Return values:

kStatus_Success – Succeed to send one frame.
kStatus_ENET_TxFrameBusy – The BD is not ready for Tx or the reclaim operation still not finishs.
kStatus_ENET_TxFrameOverLen – The Tx frame length is over max ethernet frame length.

void ENET_TransmitIRQHandler(ENET_Type *base, enet_handle_t *handle)

The transmit IRQ handler.

Parameters:

base – ENET peripheral base address.
handle – The ENET handler pointer.

void ENET_ReceiveIRQHandler(ENET_Type *base, enet_handle_t *handle)

The receive IRQ handler.

Parameters:

base – ENET peripheral base address.
handle – The ENET handler pointer.

void ENET_ErrorIRQHandler(ENET_Type *base, enet_handle_t *handle)

Some special IRQ handler including the error, mii, wakeup irq handler.

Parameters:

base – ENET peripheral base address.
handle – The ENET handler pointer.

void ENET_Ptp1588IRQHandler(ENET_Type *base)

the common IRQ handler for the 1588 irq handler.

This is used for the 1588 timer interrupt.

Parameters:

base – ENET peripheral base address.

void ENET_CommonFrame0IRQHandler(ENET_Type *base)

the common IRQ handler for the tx/rx/error etc irq handler.

This is used for the combined tx/rx/error interrupt for single/mutli-ring (frame 0).

Parameters:

base – ENET peripheral base address.

FSL_ENET_DRIVER_VERSION: Defines the driver version.

ENET_BUFFDESCRIPTOR_RX_EMPTY_MASK: Empty bit mask.

ENET_BUFFDESCRIPTOR_RX_SOFTOWNER1_MASK: Software owner one mask.

ENET_BUFFDESCRIPTOR_RX_WRAP_MASK: Next buffer descriptor is the start address.

ENET_BUFFDESCRIPTOR_RX_SOFTOWNER2_Mask: Software owner two mask.

ENET_BUFFDESCRIPTOR_RX_LAST_MASK: Last BD of the frame mask.

ENET_BUFFDESCRIPTOR_RX_MISS_MASK: Received because of the promiscuous mode.

ENET_BUFFDESCRIPTOR_RX_BROADCAST_MASK: Broadcast packet mask.

ENET_BUFFDESCRIPTOR_RX_MULTICAST_MASK: Multicast packet mask.

ENET_BUFFDESCRIPTOR_RX_LENVLIOLATE_MASK: Length violation mask.

ENET_BUFFDESCRIPTOR_RX_NOOCTET_MASK: Non-octet aligned frame mask.

ENET_BUFFDESCRIPTOR_RX_CRC_MASK: CRC error mask.

ENET_BUFFDESCRIPTOR_RX_OVERRUN_MASK: FIFO overrun mask.

ENET_BUFFDESCRIPTOR_RX_TRUNC_MASK: Frame is truncated mask.

ENET_BUFFDESCRIPTOR_TX_READY_MASK: Ready bit mask.

ENET_BUFFDESCRIPTOR_TX_SOFTOWENER1_MASK: Software owner one mask.

ENET_BUFFDESCRIPTOR_TX_WRAP_MASK: Wrap buffer descriptor mask.

ENET_BUFFDESCRIPTOR_TX_SOFTOWENER2_MASK: Software owner two mask.

ENET_BUFFDESCRIPTOR_TX_LAST_MASK: Last BD of the frame mask.

ENET_BUFFDESCRIPTOR_TX_TRANMITCRC_MASK: Transmit CRC mask.

ENET_FRAME_MAX_FRAMELEN: Default maximum Ethernet frame size without VLAN tag.

ENET_FRAME_VLAN_TAGLEN: Ethernet single VLAN tag size.

ENET_FRAME_CRC_LEN: CRC size in a frame.

ENET_FRAME_TX_LEN_LIMITATION(x)

ENET_FIFO_MIN_RX_FULL: ENET minimum receive FIFO full.

ENET_RX_MIN_BUFFERSIZE: ENET minimum buffer size.

ENET_PHY_MAXADDRESS: Maximum PHY address.

ENET_TX_INTERRUPT: Enet Tx interrupt flag.

ENET_RX_INTERRUPT: Enet Rx interrupt flag.

ENET_TS_INTERRUPT: Enet timestamp interrupt flag.

ENET_ERR_INTERRUPT: Enet error interrupt flag.

Defines the status return codes for transaction.

Values:

enumerator kStatus_ENET_InitMemoryFail: Init fails since buffer memory is not enough.

enumerator kStatus_ENET_RxFrameError: A frame received but data error happen.

enumerator kStatus_ENET_RxFrameFail: Failed to receive a frame.

enumerator kStatus_ENET_RxFrameEmpty: No frame arrive.

enumerator kStatus_ENET_RxFrameDrop: Rx frame is dropped since no buffer memory.

enumerator kStatus_ENET_TxFrameOverLen: Tx frame over length.

enumerator kStatus_ENET_TxFrameBusy: Tx buffer descriptors are under process.

enumerator kStatus_ENET_TxFrameFail: Transmit frame fail.

enum _enet_mii_mode

Defines the MII/RMII/RGMII mode for data interface between the MAC and the PHY.

Values:

enumerator kENET_MiiMode: MII mode for data interface.

enumerator kENET_RmiiMode: RMII mode for data interface.

enumerator kENET_RgmiiMode: RGMII mode for data interface.

enum _enet_mii_speed

Defines the 10/100/1000 Mbps speed for the MII data interface.

Notice: “kENET_MiiSpeed1000M” only supported when mii mode is “kENET_RgmiiMode”.

Values:

enumerator kENET_MiiSpeed10M: Speed 10 Mbps.

enumerator kENET_MiiSpeed100M: Speed 100 Mbps.

enumerator kENET_MiiSpeed1000M: Speed 1000M bps.

enum _enet_mii_duplex

Defines the half or full duplex for the MII data interface.

Values:

enumerator kENET_MiiHalfDuplex: Half duplex mode.

enumerator kENET_MiiFullDuplex: Full duplex mode.

enum _enet_mii_write

Define the MII opcode for normal MDIO_CLAUSES_22 Frame.

Values:

enumerator kENET_MiiWriteNoCompliant: Write frame operation, but not MII-compliant.

enumerator kENET_MiiWriteValidFrame: Write frame operation for a valid MII management frame.

enum _enet_mii_read

Defines the read operation for the MII management frame.

Values:

enumerator kENET_MiiReadValidFrame: Read frame operation for a valid MII management frame.

enumerator kENET_MiiReadNoCompliant: Read frame operation, but not MII-compliant.

enum _enet_mii_extend_opcode

Define the MII opcode for extended MDIO_CLAUSES_45 Frame.

Values:

enumerator kENET_MiiAddrWrite_C45: Address Write operation.

enumerator kENET_MiiWriteFrame_C45: Write frame operation for a valid MII management frame.

enumerator kENET_MiiReadFrame_C45: Read frame operation for a valid MII management frame.

enum _enet_special_control_flag

Defines a special configuration for ENET MAC controller.

These control flags are provided for special user requirements. Normally, these control flags are unused for ENET initialization. For special requirements, set the flags to macSpecialConfig in the enet_config_t. The kENET_ControlStoreAndFwdDisable is used to disable the FIFO store and forward. FIFO store and forward means that the FIFO read/send is started when a complete frame is stored in TX/RX FIFO. If this flag is set, configure rxFifoFullThreshold and txFifoWatermark in the enet_config_t.

Values:

enumerator kENET_ControlFlowControlEnable: Enable ENET flow control: pause frame.

enumerator kENET_ControlRxPayloadCheckEnable: Enable ENET receive payload length check.

enumerator kENET_ControlRxPadRemoveEnable: Padding is removed from received frames.

enumerator kENET_ControlRxBroadCastRejectEnable: Enable broadcast frame reject.

enumerator kENET_ControlMacAddrInsert: Enable MAC address insert.

enumerator kENET_ControlStoreAndFwdDisable: Enable FIFO store and forward.

enumerator kENET_ControlSMIPreambleDisable: Enable SMI preamble.

enumerator kENET_ControlPromiscuousEnable: Enable promiscuous mode.

enumerator kENET_ControlMIILoopEnable: Enable ENET MII loop back.

enumerator kENET_ControlVLANTagEnable: Enable normal VLAN (single vlan tag).

enumerator kENET_ControlSVLANEnable: Enable S-VLAN.

enumerator kENET_ControlVLANUseSecondTag: Enable extracting the second vlan tag for further processing.

enum _enet_interrupt_enable

List of interrupts supported by the peripheral. This enumeration uses one-bit encoding to allow a logical OR of multiple members. Members usually map to interrupt enable bits in one or more peripheral registers.

Values:

enumerator kENET_BabrInterrupt: Babbling receive error interrupt source

enumerator kENET_BabtInterrupt: Babbling transmit error interrupt source

enumerator kENET_GraceStopInterrupt: Graceful stop complete interrupt source

enumerator kENET_TxFrameInterrupt: TX FRAME interrupt source

enumerator kENET_TxBufferInterrupt: TX BUFFER interrupt source

enumerator kENET_RxFrameInterrupt: RX FRAME interrupt source

enumerator kENET_RxBufferInterrupt: RX BUFFER interrupt source

enumerator kENET_MiiInterrupt: MII interrupt source

enumerator kENET_EBusERInterrupt: Ethernet bus error interrupt source

enumerator kENET_LateCollisionInterrupt: Late collision interrupt source

enumerator kENET_RetryLimitInterrupt: Collision Retry Limit interrupt source

enumerator kENET_UnderrunInterrupt: Transmit FIFO underrun interrupt source

enumerator kENET_PayloadRxInterrupt: Payload Receive error interrupt source

enumerator kENET_WakeupInterrupt: WAKEUP interrupt source

enumerator kENET_TsAvailInterrupt: TS AVAIL interrupt source for PTP

enumerator kENET_TsTimerInterrupt: TS WRAP interrupt source for PTP

enum _enet_event

Defines the common interrupt event for callback use.

Values:

enumerator kENET_RxEvent: Receive event.

enumerator kENET_TxEvent: Transmit event.

enumerator kENET_ErrEvent: Error event: BABR/BABT/EBERR/LC/RL/UN/PLR .

enumerator kENET_WakeUpEvent: Wake up from sleep mode event.

enumerator kENET_TimeStampEvent: Time stamp event.

enumerator kENET_TimeStampAvailEvent: Time stamp available event.

enum _enet_idle_slope

Defines certain idle slope for bandwidth fraction.

Values:

enumerator kENET_IdleSlope1: The bandwidth fraction is about 0.002.

enumerator kENET_IdleSlope2: The bandwidth fraction is about 0.003.

enumerator kENET_IdleSlope4: The bandwidth fraction is about 0.008.

enumerator kENET_IdleSlope8: The bandwidth fraction is about 0.02.

enumerator kENET_IdleSlope16: The bandwidth fraction is about 0.03.

enumerator kENET_IdleSlope32: The bandwidth fraction is about 0.06.

enumerator kENET_IdleSlope64: The bandwidth fraction is about 0.11.

enumerator kENET_IdleSlope128: The bandwidth fraction is about 0.20.

enumerator kENET_IdleSlope256: The bandwidth fraction is about 0.33.

enumerator kENET_IdleSlope384: The bandwidth fraction is about 0.43.

enumerator kENET_IdleSlope512: The bandwidth fraction is about 0.50.

enumerator kENET_IdleSlope640: The bandwidth fraction is about 0.56.

enumerator kENET_IdleSlope768: The bandwidth fraction is about 0.60.

enumerator kENET_IdleSlope896: The bandwidth fraction is about 0.64.

enumerator kENET_IdleSlope1024: The bandwidth fraction is about 0.67.

enumerator kENET_IdleSlope1152: The bandwidth fraction is about 0.69.

enumerator kENET_IdleSlope1280: The bandwidth fraction is about 0.71.

enumerator kENET_IdleSlope1408: The bandwidth fraction is about 0.73.

enumerator kENET_IdleSlope1536: The bandwidth fraction is about 0.75.

enum _enet_tx_accelerator

Defines the transmit accelerator configuration.

Note that the hardware does not insert ICMPv6 protocol checksums as mentioned in errata ERR052152.

Values:

enumerator kENET_TxAccelIsShift16Enabled: Transmit FIFO shift-16.

enumerator kENET_TxAccelIpCheckEnabled: Insert IP header checksum.

enumerator kENET_TxAccelProtoCheckEnabled: Insert protocol checksum (TCP, UDP, ICMPv4).

enum _enet_rx_accelerator

Defines the receive accelerator configuration.

Note that the hardware does not validate ICMPv6 protocol checksums as mentioned in errata ERR052152.

Values:

enumerator kENET_RxAccelPadRemoveEnabled: Padding removal for short IP frames.

enumerator kENET_RxAccelIpCheckEnabled: Discard with wrong IP header checksum.

enumerator kENET_RxAccelProtoCheckEnabled: Discard with wrong protocol checksum (TCP, UDP, ICMPv4).

enumerator kENET_RxAccelMacCheckEnabled: Discard with Mac layer errors.

enumerator kENET_RxAccelisShift16Enabled: Receive FIFO shift-16.

typedef enum _enet_mii_mode enet_mii_mode_t: Defines the MII/RMII/RGMII mode for data interface between the MAC and the PHY.

typedef enum _enet_mii_speed enet_mii_speed_t

Defines the 10/100/1000 Mbps speed for the MII data interface.

Notice: “kENET_MiiSpeed1000M” only supported when mii mode is “kENET_RgmiiMode”.

typedef enum _enet_mii_duplex enet_mii_duplex_t: Defines the half or full duplex for the MII data interface.

typedef enum _enet_mii_write enet_mii_write_t: Define the MII opcode for normal MDIO_CLAUSES_22 Frame.

typedef enum _enet_mii_read enet_mii_read_t: Defines the read operation for the MII management frame.

typedef enum _enet_mii_extend_opcode enet_mii_extend_opcode: Define the MII opcode for extended MDIO_CLAUSES_45 Frame.

typedef enum _enet_special_control_flag enet_special_control_flag_t

Defines a special configuration for ENET MAC controller.

These control flags are provided for special user requirements. Normally, these control flags are unused for ENET initialization. For special requirements, set the flags to macSpecialConfig in the enet_config_t. The kENET_ControlStoreAndFwdDisable is used to disable the FIFO store and forward. FIFO store and forward means that the FIFO read/send is started when a complete frame is stored in TX/RX FIFO. If this flag is set, configure rxFifoFullThreshold and txFifoWatermark in the enet_config_t.

typedef enum _enet_interrupt_enable enet_interrupt_enable_t: List of interrupts supported by the peripheral. This enumeration uses one-bit encoding to allow a logical OR of multiple members. Members usually map to interrupt enable bits in one or more peripheral registers.

typedef enum _enet_event enet_event_t: Defines the common interrupt event for callback use.

typedef enum _enet_idle_slope enet_idle_slope_t: Defines certain idle slope for bandwidth fraction.

typedef enum _enet_tx_accelerator enet_tx_accelerator_t

Defines the transmit accelerator configuration.

Note that the hardware does not insert ICMPv6 protocol checksums as mentioned in errata ERR052152.

typedef enum _enet_rx_accelerator enet_rx_accelerator_t

Defines the receive accelerator configuration.

Note that the hardware does not validate ICMPv6 protocol checksums as mentioned in errata ERR052152.

typedef struct _enet_rx_bd_struct enet_rx_bd_struct_t: Defines the receive buffer descriptor structure for the little endian system.

typedef struct _enet_tx_bd_struct enet_tx_bd_struct_t: Defines the enhanced transmit buffer descriptor structure for the little endian system.

typedef struct _enet_data_error_stats enet_data_error_stats_t: Defines the ENET data error statistics structure.

typedef struct _enet_rx_frame_error enet_rx_frame_error_t: Defines the Rx frame error structure.

typedef struct _enet_transfer_stats enet_transfer_stats_t: Defines the ENET transfer statistics structure.

typedef struct enet_frame_info enet_frame_info_t: Defines the frame info structure.

typedef struct _enet_tx_dirty_ring enet_tx_dirty_ring_t: Defines the ENET transmit dirty addresses ring/queue structure.

typedef void *(*enet_rx_alloc_callback_t)(ENET_Type *base, void *userData, uint8_t ringId): Defines the ENET Rx memory buffer alloc function pointer.

typedef void (*enet_rx_free_callback_t)(ENET_Type *base, void *buffer, void *userData, uint8_t ringId): Defines the ENET Rx memory buffer free function pointer.

typedef struct _enet_buffer_config enet_buffer_config_t

Defines the receive buffer descriptor configuration structure.

Note that for the internal DMA requirements, the buffers have a corresponding alignment requirements.

The aligned receive and transmit buffer size must be evenly divisible by ENET_BUFF_ALIGNMENT. when the data buffers are in cacheable region when cache is enabled, all those size should be aligned to the maximum value of “ENET_BUFF_ALIGNMENT” and the cache line size.
The aligned transmit and receive buffer descriptor start address must be at least 64 bit aligned. However, it’s recommended to be evenly divisible by ENET_BUFF_ALIGNMENT. buffer descriptors should be put in non-cacheable region when cache is enabled.
The aligned transmit and receive data buffer start address must be evenly divisible by ENET_BUFF_ALIGNMENT. Receive buffers should be continuous with the total size equal to “rxBdNumber * rxBuffSizeAlign”. Transmit buffers should be continuous with the total size equal to “txBdNumber * txBuffSizeAlign”. when the data buffers are in cacheable region when cache is enabled, all those size should be aligned to the maximum value of “ENET_BUFF_ALIGNMENT” and the cache line size.

typedef struct _enet_intcoalesce_config enet_intcoalesce_config_t: Defines the interrupt coalescing configure structure.

typedef struct _enet_avb_config enet_avb_config_t

Defines the ENET AVB Configure structure.

This is used for to configure the extended ring 1 and ring 2.

The classification match format is (CMP3 << 12) | (CMP2 << 8) | (CMP1 << 4) | CMP0. composed of four 3-bit compared VLAN priority field cmp0~cmp3, cm0 ~ cmp3 are used in parallel.

If CMP1,2,3 are not unused, please set them to the same value as CMP0.

The idleSlope is used to calculate the Band Width fraction, BW fraction = 1 / (1 + 512/idleSlope). For avb configuration, the BW fraction of Class 1 and Class 2 combined must not exceed 0.75.

typedef struct _enet_handle enet_handle_t

typedef void (*enet_callback_t)(ENET_Type *base, enet_handle_t *handle, enet_event_t event, enet_frame_info_t *frameInfo, void *userData): ENET callback function.

typedef struct _enet_config enet_config_t

Defines the basic configuration structure for the ENET device.

Note:

macSpecialConfig is used for a special control configuration, A logical OR of “enet_special_control_flag_t”. For a special configuration for MAC, set this parameter to 0.
txWatermark is used for a cut-through operation. It is in steps of 64 bytes: 0/1 - 64 bytes written to TX FIFO before transmission of a frame begins. 2 - 128 bytes written to TX FIFO …. 3 - 192 bytes written to TX FIFO …. The maximum of txWatermark is 0x2F - 4032 bytes written to TX FIFO …. txWatermark allows minimizing the transmit latency to set the txWatermark to 0 or 1 or for larger bus access latency 3 or larger due to contention for the system bus.
rxFifoFullThreshold is similar to the txWatermark for cut-through operation in RX. It is in 64-bit words. The minimum is ENET_FIFO_MIN_RX_FULL and the maximum is 0xFF. If the end of the frame is stored in FIFO and the frame size if smaller than the txWatermark, the frame is still transmitted. The rule is the same for rxFifoFullThreshold in the receive direction.
When “kENET_ControlFlowControlEnable” is set in the macSpecialConfig, ensure that the pauseDuration, rxFifoEmptyThreshold, and rxFifoStatEmptyThreshold are set for flow control enabled case.
When “kENET_ControlStoreAndFwdDisabled” is set in the macSpecialConfig, ensure that the rxFifoFullThreshold and txFifoWatermark are set for store and forward disable.
The rxAccelerConfig and txAccelerConfig default setting with 0 - accelerator are disabled. The “enet_tx_accelerator_t” and “enet_rx_accelerator_t” are recommended to be used to enable the transmit and receive accelerator. After the accelerators are enabled, the store and forward feature should be enabled. As a result, kENET_ControlStoreAndFwdDisabled should not be set.
The intCoalesceCfg can be used in the rx or tx enabled cases to decrese the CPU loading.

typedef struct _enet_tx_bd_ring enet_tx_bd_ring_t: Defines the ENET transmit buffer descriptor ring/queue structure.

typedef struct _enet_rx_bd_ring enet_rx_bd_ring_t: Defines the ENET receive buffer descriptor ring/queue structure.

typedef struct _enet_buffer_struct enet_buffer_struct_t

typedef struct _enet_rx_frame_attribute_struct enet_rx_frame_attribute_t

typedef struct _enet_rx_frame_struct enet_rx_frame_struct_t

typedef struct _enet_tx_frame_struct enet_tx_frame_struct_t

typedef void (*enet_isr_t)(ENET_Type *base, enet_handle_t *handle): Define interrupt IRQ handler.

const clock_ip_name_t s_enetClock[]: Pointers to enet clocks for each instance.

const clock_ip_name_t s_enetExtraClock[]

uint32_t ENET_GetInstance(ENET_Type *base)

Get the ENET instance from peripheral base address.

Parameters:

base – ENET peripheral base address.

Returns:

ENET instance.

ENET_BUFFDESCRIPTOR_RX_ERR_MASK: Defines the receive error status flag mask.

struct _enet_rx_bd_struct

#include <fsl_enet.h>

Defines the receive buffer descriptor structure for the little endian system.

Public Members

uint16_t length: Buffer descriptor data length.

uint16_t control: Buffer descriptor control and status.

uint32_t buffer: Data buffer pointer.

struct _enet_tx_bd_struct

#include <fsl_enet.h>

Defines the enhanced transmit buffer descriptor structure for the little endian system.

Public Members

uint16_t length: Buffer descriptor data length.

uint16_t control: Buffer descriptor control and status.

uint32_t buffer: Data buffer pointer.

struct _enet_data_error_stats

#include <fsl_enet.h>

Defines the ENET data error statistics structure.

Public Members

uint32_t statsRxLenGreaterErr: Receive length greater than RCR[MAX_FL].

uint32_t statsRxAlignErr: Receive non-octet alignment/

uint32_t statsRxFcsErr: Receive CRC error.

uint32_t statsRxOverRunErr: Receive over run.

uint32_t statsRxTruncateErr: Receive truncate.

struct _enet_rx_frame_error

#include <fsl_enet.h>

Defines the Rx frame error structure.

Public Members

bool statsRxTruncateErr: Receive truncate.

bool statsRxOverRunErr: Receive over run.

bool statsRxFcsErr: Receive CRC error.

bool statsRxAlignErr: Receive non-octet alignment.

bool statsRxLenGreaterErr: Receive length greater than RCR[MAX_FL].

struct _enet_transfer_stats

#include <fsl_enet.h>

Defines the ENET transfer statistics structure.

Public Members

uint32_t statsRxFrameCount: Rx frame number.

uint32_t statsRxFrameOk: Good Rx frame number.

uint32_t statsRxCrcErr: Rx frame number with CRC error.

uint32_t statsRxAlignErr: Rx frame number with alignment error.

uint32_t statsRxDropInvalidSFD: Dropped frame number due to invalid SFD.

uint32_t statsRxFifoOverflowErr: Rx FIFO overflow count.

uint32_t statsTxFrameCount: Tx frame number.

uint32_t statsTxFrameOk: Good Tx frame number.

uint32_t statsTxCrcAlignErr: The transmit frame is error.

uint32_t statsTxFifoUnderRunErr: Tx FIFO underrun count.

struct enet_frame_info

#include <fsl_enet.h>

Defines the frame info structure.

Public Members

void *context: User specified data

struct _enet_tx_dirty_ring

#include <fsl_enet.h>

Defines the ENET transmit dirty addresses ring/queue structure.

Public Members

enet_frame_info_t *txDirtyBase: Dirty buffer descriptor base address pointer.

uint16_t txGenIdx: tx generate index.

uint16_t txConsumIdx: tx consume index.

uint16_t txRingLen: tx ring length.

bool isFull: tx ring is full flag.

struct _enet_buffer_config

#include <fsl_enet.h>

Defines the receive buffer descriptor configuration structure.

Note that for the internal DMA requirements, the buffers have a corresponding alignment requirements.

The aligned receive and transmit buffer size must be evenly divisible by ENET_BUFF_ALIGNMENT. when the data buffers are in cacheable region when cache is enabled, all those size should be aligned to the maximum value of “ENET_BUFF_ALIGNMENT” and the cache line size.
The aligned transmit and receive buffer descriptor start address must be at least 64 bit aligned. However, it’s recommended to be evenly divisible by ENET_BUFF_ALIGNMENT. buffer descriptors should be put in non-cacheable region when cache is enabled.
The aligned transmit and receive data buffer start address must be evenly divisible by ENET_BUFF_ALIGNMENT. Receive buffers should be continuous with the total size equal to “rxBdNumber * rxBuffSizeAlign”. Transmit buffers should be continuous with the total size equal to “txBdNumber * txBuffSizeAlign”. when the data buffers are in cacheable region when cache is enabled, all those size should be aligned to the maximum value of “ENET_BUFF_ALIGNMENT” and the cache line size.

Public Members

uint16_t rxBdNumber: Receive buffer descriptor number.

uint16_t txBdNumber: Transmit buffer descriptor number.

uint16_t rxBuffSizeAlign: Aligned receive data buffer size.

uint16_t txBuffSizeAlign: Aligned transmit data buffer size.

volatile enet_rx_bd_struct_t *rxBdStartAddrAlign: Aligned receive buffer descriptor start address: should be non-cacheable.

volatile enet_tx_bd_struct_t *txBdStartAddrAlign: Aligned transmit buffer descriptor start address: should be non-cacheable.

uint8_t *rxBufferAlign: Receive data buffer start address.

uint8_t *txBufferAlign: Transmit data buffer start address.

bool rxMaintainEnable: Receive buffer cache maintain.

bool txMaintainEnable: Transmit buffer cache maintain.

enet_frame_info_t *txFrameInfo: Transmit frame information start address.

struct _enet_intcoalesce_config

#include <fsl_enet.h>

Defines the interrupt coalescing configure structure.

Public Members

uint8_t txCoalesceFrameCount[1]: Transmit interrupt coalescing frame count threshold.

uint16_t txCoalesceTimeCount[1]: Transmit interrupt coalescing timer count threshold.

uint8_t rxCoalesceFrameCount[1]: Receive interrupt coalescing frame count threshold.

uint16_t rxCoalesceTimeCount[1]: Receive interrupt coalescing timer count threshold.

struct _enet_avb_config

#include <fsl_enet.h>

Defines the ENET AVB Configure structure.

This is used for to configure the extended ring 1 and ring 2.

The classification match format is (CMP3 << 12) | (CMP2 << 8) | (CMP1 << 4) | CMP0. composed of four 3-bit compared VLAN priority field cmp0~cmp3, cm0 ~ cmp3 are used in parallel.

If CMP1,2,3 are not unused, please set them to the same value as CMP0.

The idleSlope is used to calculate the Band Width fraction, BW fraction = 1 / (1 + 512/idleSlope). For avb configuration, the BW fraction of Class 1 and Class 2 combined must not exceed 0.75.

Public Members

uint16_t rxClassifyMatch[1 - 1]: The classification match value for the ring.

enet_idle_slope_t idleSlope[1 - 1]: The idle slope for certian bandwidth fraction.

struct _enet_config

#include <fsl_enet.h>

Defines the basic configuration structure for the ENET device.

Note:

macSpecialConfig is used for a special control configuration, A logical OR of “enet_special_control_flag_t”. For a special configuration for MAC, set this parameter to 0.
txWatermark is used for a cut-through operation. It is in steps of 64 bytes: 0/1 - 64 bytes written to TX FIFO before transmission of a frame begins. 2 - 128 bytes written to TX FIFO …. 3 - 192 bytes written to TX FIFO …. The maximum of txWatermark is 0x2F - 4032 bytes written to TX FIFO …. txWatermark allows minimizing the transmit latency to set the txWatermark to 0 or 1 or for larger bus access latency 3 or larger due to contention for the system bus.
rxFifoFullThreshold is similar to the txWatermark for cut-through operation in RX. It is in 64-bit words. The minimum is ENET_FIFO_MIN_RX_FULL and the maximum is 0xFF. If the end of the frame is stored in FIFO and the frame size if smaller than the txWatermark, the frame is still transmitted. The rule is the same for rxFifoFullThreshold in the receive direction.
When “kENET_ControlFlowControlEnable” is set in the macSpecialConfig, ensure that the pauseDuration, rxFifoEmptyThreshold, and rxFifoStatEmptyThreshold are set for flow control enabled case.
When “kENET_ControlStoreAndFwdDisabled” is set in the macSpecialConfig, ensure that the rxFifoFullThreshold and txFifoWatermark are set for store and forward disable.
The rxAccelerConfig and txAccelerConfig default setting with 0 - accelerator are disabled. The “enet_tx_accelerator_t” and “enet_rx_accelerator_t” are recommended to be used to enable the transmit and receive accelerator. After the accelerators are enabled, the store and forward feature should be enabled. As a result, kENET_ControlStoreAndFwdDisabled should not be set.
The intCoalesceCfg can be used in the rx or tx enabled cases to decrese the CPU loading.

Public Members

uint32_t macSpecialConfig: Mac special configuration. A logical OR of “enet_special_control_flag_t”.

uint32_t interrupt: Mac interrupt source. A logical OR of “enet_interrupt_enable_t”.

uint16_t rxMaxFrameLen: Receive maximum frame length.

enet_mii_mode_t miiMode: MII mode.

enet_mii_speed_t miiSpeed: MII Speed.

enet_mii_duplex_t miiDuplex: MII duplex.

uint8_t rxAccelerConfig: Receive accelerator, A logical OR of “enet_rx_accelerator_t”.

uint8_t txAccelerConfig: Transmit accelerator, A logical OR of “enet_rx_accelerator_t”.

uint16_t pauseDuration: For flow control enabled case: Pause duration.

uint8_t rxFifoEmptyThreshold: For flow control enabled case: when RX FIFO level reaches this value, it makes MAC generate XOFF pause frame.

uint8_t rxFifoStatEmptyThreshold: For flow control enabled case: number of frames in the receive FIFO, independent of size, that can be accept. If the limit is reached, reception continues and a pause frame is triggered.

uint8_t rxFifoFullThreshold: For store and forward disable case, the data required in RX FIFO to notify the MAC receive ready status.

uint8_t txFifoWatermark: For store and forward disable case, the data required in TX FIFO before a frame transmit start.

enet_intcoalesce_config_t *intCoalesceCfg: If the interrupt coalsecence is not required in the ring n(0,1,2), please set to NULL.

uint8_t ringNum: Number of used rings. default with 1 — single ring.

enet_rx_alloc_callback_t rxBuffAlloc: Callback function to alloc memory, must be provided for zero-copy Rx.

enet_rx_free_callback_t rxBuffFree: Callback function to free memory, must be provided for zero-copy Rx.

enet_callback_t callback: General callback function.

void *userData: Callback function parameter.

struct _enet_tx_bd_ring

#include <fsl_enet.h>

Defines the ENET transmit buffer descriptor ring/queue structure.

Public Members

volatile enet_tx_bd_struct_t *txBdBase: Buffer descriptor base address pointer.

uint16_t txGenIdx: The current available transmit buffer descriptor pointer.

uint16_t txConsumIdx: Transmit consume index.

volatile uint16_t txDescUsed: Transmit descriptor used number.

uint16_t txRingLen: Transmit ring length.

struct _enet_rx_bd_ring

#include <fsl_enet.h>

Defines the ENET receive buffer descriptor ring/queue structure.

Public Members

volatile enet_rx_bd_struct_t *rxBdBase: Buffer descriptor base address pointer.

uint16_t rxGenIdx: The current available receive buffer descriptor pointer.

uint16_t rxRingLen: Receive ring length.

struct _enet_handle

#include <fsl_enet.h>

Defines the ENET handler structure.

Public Members

enet_rx_bd_ring_t rxBdRing[1]: Receive buffer descriptor.

enet_tx_bd_ring_t txBdRing[1]: Transmit buffer descriptor.

uint16_t rxBuffSizeAlign[1]: Receive buffer size alignment.

uint16_t txBuffSizeAlign[1]: Transmit buffer size alignment.

bool rxMaintainEnable[1]: Receive buffer cache maintain.

bool txMaintainEnable[1]: Transmit buffer cache maintain.

uint8_t ringNum: Number of used rings.

enet_callback_t callback: Callback function.

void *userData: Callback function parameter.

enet_tx_dirty_ring_t txDirtyRing[1]: Ring to store tx frame information.

bool txReclaimEnable[1]: Tx reclaim enable flag.

enet_rx_alloc_callback_t rxBuffAlloc: Callback function to alloc memory for zero copy Rx.

enet_rx_free_callback_t rxBuffFree: Callback function to free memory for zero copy Rx.

uint8_t multicastCount[64]: Multicast collisions counter

struct _enet_buffer_struct

#include <fsl_enet.h>

Public Members

void *buffer: The buffer store the whole or partial frame.

uint16_t length: The byte length of this buffer.

struct _enet_rx_frame_attribute_struct

#include <fsl_enet.h>

Public Members

bool promiscuous: This frame is received because of promiscuous mode.

struct _enet_rx_frame_struct

#include <fsl_enet.h>

Public Members

enet_buffer_struct_t *rxBuffArray: Rx frame buffer structure.

uint16_t totLen: Rx frame total length.

enet_rx_frame_attribute_t rxAttribute: Rx frame attribute structure.

enet_rx_frame_error_t rxFrameError: Rx frame error.

struct _enet_tx_frame_struct

#include <fsl_enet.h>

Public Members

enet_buffer_struct_t *txBuffArray: Tx frame buffer structure.

uint32_t txBuffNum: Buffer number of this Tx frame.

void *context: Driver reclaims and gives it in Tx over callback, usually store network packet header.

FLEXCOMM: FLEXCOMM Driver

FLEXCOMM Driver

FSL_FLEXCOMM_DRIVER_VERSION: FlexCOMM driver version 2.0.2.

enum FLEXCOMM_PERIPH_T

FLEXCOMM peripheral modes.

Values:

enumerator FLEXCOMM_PERIPH_NONE: No peripheral

enumerator FLEXCOMM_PERIPH_USART: USART peripheral

enumerator FLEXCOMM_PERIPH_SPI: SPI Peripheral

enumerator FLEXCOMM_PERIPH_I2C: I2C Peripheral

enumerator FLEXCOMM_PERIPH_I2S_TX: I2S TX Peripheral

enumerator FLEXCOMM_PERIPH_I2S_RX: I2S RX Peripheral

typedef void (*flexcomm_irq_handler_t)(void *base, void *handle): Typedef for interrupt handler.

IRQn_Type const kFlexcommIrqs[]: Array with IRQ number for each FLEXCOMM module.

uint32_t FLEXCOMM_GetInstance(void *base): Returns instance number for FLEXCOMM module with given base address.

status_t FLEXCOMM_Init(void *base, FLEXCOMM_PERIPH_T periph): Initializes FLEXCOMM and selects peripheral mode according to the second parameter.

void FLEXCOMM_SetIRQHandler(void *base, flexcomm_irq_handler_t handler, void *flexcommHandle): Sets IRQ handler for given FLEXCOMM module. It is used by drivers register IRQ handler according to FLEXCOMM mode.

FLEXSPI: Flexible Serial Peripheral Interface Driver

uint32_t FLEXSPI_GetInstance(FLEXSPI_Type *base)

Get the instance number for FLEXSPI.

Parameters:

base – FLEXSPI base pointer.

status_t FLEXSPI_CheckAndClearError(FLEXSPI_Type *base, uint32_t status)

Check and clear IP command execution errors.

Parameters:

base – FLEXSPI base pointer.
status – interrupt status.

void FLEXSPI_Init(FLEXSPI_Type *base, const flexspi_config_t *config)

Initializes the FLEXSPI module and internal state.

This function enables the clock for FLEXSPI and also configures the FLEXSPI with the input configure parameters. Users should call this function before any FLEXSPI operations.

Parameters:

base – FLEXSPI peripheral base address.
config – FLEXSPI configure structure.

void FLEXSPI_GetDefaultConfig(flexspi_config_t *config)

Gets default settings for FLEXSPI.

Parameters:

config – FLEXSPI configuration structure.

void FLEXSPI_Deinit(FLEXSPI_Type *base)

Deinitializes the FLEXSPI module.

Clears the FLEXSPI state and FLEXSPI module registers.

Parameters:

base – FLEXSPI peripheral base address.

void FLEXSPI_UpdateDllValue(FLEXSPI_Type *base, flexspi_device_config_t *config, flexspi_port_t port)

Update FLEXSPI DLL value depending on currently flexspi root clock.

Parameters:

base – FLEXSPI peripheral base address.
config – Flash configuration parameters.
port – FLEXSPI Operation port.

void FLEXSPI_SetFlashConfig(FLEXSPI_Type *base, flexspi_device_config_t *config, flexspi_port_t port)

Configures the connected device parameter.

This function configures the connected device relevant parameters, such as the size, command, and so on. The flash configuration value cannot have a default value. The user needs to configure it according to the connected device.

Parameters:

base – FLEXSPI peripheral base address.
config – Flash configuration parameters.
port – FLEXSPI Operation port.

void FLEXSPI_SoftwareReset(FLEXSPI_Type *base)

Software reset for the FLEXSPI logic.

This function sets the software reset flags for both AHB and buffer domain and resets both AHB buffer and also IP FIFOs.

Parameters:

base – FLEXSPI peripheral base address.

static inline void FLEXSPI_Enable(FLEXSPI_Type *base, bool enable)

Enables or disables the FLEXSPI module.

Parameters:

base – FLEXSPI peripheral base address.
enable – True means enable FLEXSPI, false means disable.

static inline void FLEXSPI_EnableInterrupts(FLEXSPI_Type *base, uint32_t mask)

Enables the FLEXSPI interrupts.

Parameters:

base – FLEXSPI peripheral base address.
mask – FLEXSPI interrupt source.

static inline void FLEXSPI_DisableInterrupts(FLEXSPI_Type *base, uint32_t mask)

Disable the FLEXSPI interrupts.

Parameters:

base – FLEXSPI peripheral base address.
mask – FLEXSPI interrupt source.

static inline void FLEXSPI_EnableTxDMA(FLEXSPI_Type *base, bool enable)

Enables or disables FLEXSPI IP Tx FIFO DMA requests.

Parameters:

base – FLEXSPI peripheral base address.
enable – Enable flag for transmit DMA request. Pass true for enable, false for disable.

static inline void FLEXSPI_EnableRxDMA(FLEXSPI_Type *base, bool enable)

Enables or disables FLEXSPI IP Rx FIFO DMA requests.

Parameters:

base – FLEXSPI peripheral base address.
enable – Enable flag for receive DMA request. Pass true for enable, false for disable.

static inline uint32_t FLEXSPI_GetTxFifoAddress(FLEXSPI_Type *base)

Gets FLEXSPI IP tx fifo address for DMA transfer.

Parameters:

base – FLEXSPI peripheral base address.

Return values:

The – tx fifo address.

static inline uint32_t FLEXSPI_GetRxFifoAddress(FLEXSPI_Type *base)

Gets FLEXSPI IP rx fifo address for DMA transfer.

Parameters:

base – FLEXSPI peripheral base address.

Return values:

The – rx fifo address.

static inline void FLEXSPI_ResetFifos(FLEXSPI_Type *base, bool txFifo, bool rxFifo)

Clears the FLEXSPI IP FIFO logic.

Parameters:

base – FLEXSPI peripheral base address.
txFifo – Pass true to reset TX FIFO.
rxFifo – Pass true to reset RX FIFO.

static inline void FLEXSPI_GetFifoCounts(FLEXSPI_Type *base, size_t *txCount, size_t *rxCount)

Gets the valid data entries in the FLEXSPI FIFOs.

Parameters:

base – FLEXSPI peripheral base address.
txCount – [out] Pointer through which the current number of bytes in the transmit FIFO is returned. Pass NULL if this value is not required.
rxCount – [out] Pointer through which the current number of bytes in the receive FIFO is returned. Pass NULL if this value is not required.

static inline uint32_t FLEXSPI_GetInterruptStatusFlags(FLEXSPI_Type *base)

Get the FLEXSPI interrupt status flags.

Parameters:

base – FLEXSPI peripheral base address.

Return values:

interrupt – status flag, use status flag to AND flexspi_flags_t could get the related status.

static inline void FLEXSPI_ClearInterruptStatusFlags(FLEXSPI_Type *base, uint32_t mask)

Get the FLEXSPI interrupt status flags.

Parameters:

base – FLEXSPI peripheral base address.
mask – FLEXSPI interrupt source.

static inline void FLEXSPI_GetDataLearningPhase(FLEXSPI_Type *base, uint8_t *portAPhase, uint8_t *portBPhase)

Gets the sampling clock phase selection after Data Learning.

Parameters:

base – FLEXSPI peripheral base address.
portAPhase – Pointer to a uint8_t type variable to receive the selected clock phase on PORTA.
portBPhase – Pointer to a uint8_t type variable to receive the selected clock phase on PORTB.

static inline flexspi_arb_command_source_t FLEXSPI_GetArbitratorCommandSource(FLEXSPI_Type *base)

Gets the trigger source of current command sequence granted by arbitrator.

Parameters:

base – FLEXSPI peripheral base address.

Return values:

trigger – source of current command sequence.

static inline flexspi_ip_error_code_t FLEXSPI_GetIPCommandErrorCode(FLEXSPI_Type *base, uint8_t *index)

Gets the error code when IP command error detected.

Parameters:

base – FLEXSPI peripheral base address.
index – Pointer to a uint8_t type variable to receive the sequence index when error detected.

Return values:

error – code when IP command error detected.

static inline flexspi_ahb_error_code_t FLEXSPI_GetAHBCommandErrorCode(FLEXSPI_Type *base, uint8_t *index)

Gets the error code when AHB command error detected.

Parameters:

base – FLEXSPI peripheral base address.
index – Pointer to a uint8_t type variable to receive the sequence index when error detected.

Return values:

error – code when AHB command error detected.

static inline bool FLEXSPI_GetBusIdleStatus(FLEXSPI_Type *base)

Returns whether the bus is idle.

Parameters:

base – FLEXSPI peripheral base address.

Return values:

true – Bus is idle.
false – Bus is busy.

void FLEXSPI_UpdateRxSampleClock(FLEXSPI_Type *base, flexspi_read_sample_clock_t clockSource)

Update read sample clock source.

Parameters:

base – FLEXSPI peripheral base address.
clockSource – clockSource of type flexspi_read_sample_clock_t

void FLEXSPI_UpdateLUT(FLEXSPI_Type *base, uint32_t index, const uint32_t *cmd, uint32_t count)

Updates the LUT table.

Parameters:

base – FLEXSPI peripheral base address.
index – From which index start to update. It could be any index of the LUT table, which also allows user to update command content inside a command. Each command consists of up to 8 instructions and occupy 4*32-bit memory.
cmd – Command sequence array.
count – Number of sequences.

static inline void FLEXSPI_WriteData(FLEXSPI_Type *base, uint32_t data, uint8_t fifoIndex)

Writes data into FIFO.

Parameters:

base – FLEXSPI peripheral base address
data – The data bytes to send
fifoIndex – Destination fifo index.

static inline uint32_t FLEXSPI_ReadData(FLEXSPI_Type *base, uint8_t fifoIndex)

Receives data from data FIFO.

Parameters:

base – FLEXSPI peripheral base address
fifoIndex – Source fifo index.

Returns:

The data in the FIFO.

status_t FLEXSPI_WriteBlocking(FLEXSPI_Type *base, uint8_t *buffer, size_t size)

Sends a buffer of data bytes using blocking method.

Note

This function blocks via polling until all bytes have been sent.

Parameters:

base – FLEXSPI peripheral base address
buffer – The data bytes to send
size – The number of data bytes to send

Return values:

kStatus_Success – write success without error
kStatus_FLEXSPI_SequenceExecutionTimeout – sequence execution timeout
kStatus_FLEXSPI_IpCommandSequenceError – IP command sequence error detected
kStatus_FLEXSPI_IpCommandGrantTimeout – IP command grant timeout detected

status_t FLEXSPI_ReadBlocking(FLEXSPI_Type *base, uint8_t *buffer, size_t size)

Receives a buffer of data bytes using a blocking method.

Note

This function blocks via polling until all bytes have been sent.

Parameters:

base – FLEXSPI peripheral base address
buffer – The data bytes to send
size – The number of data bytes to receive

Return values:

kStatus_Success – read success without error
kStatus_FLEXSPI_SequenceExecutionTimeout – sequence execution timeout
kStatus_FLEXSPI_IpCommandSequenceError – IP command sequencen error detected
kStatus_FLEXSPI_IpCommandGrantTimeout – IP command grant timeout detected

status_t FLEXSPI_TransferBlocking(FLEXSPI_Type *base, flexspi_transfer_t *xfer)

Execute command to transfer a buffer data bytes using a blocking method.

Parameters:

base – FLEXSPI peripheral base address
xfer – pointer to the transfer structure.

Return values:

kStatus_Success – command transfer success without error
kStatus_FLEXSPI_SequenceExecutionTimeout – sequence execution timeout
kStatus_FLEXSPI_IpCommandSequenceError – IP command sequence error detected
kStatus_FLEXSPI_IpCommandGrantTimeout – IP command grant timeout detected

void FLEXSPI_TransferCreateHandle(FLEXSPI_Type *base, flexspi_handle_t *handle, flexspi_transfer_callback_t callback, void *userData)

Initializes the FLEXSPI handle which is used in transactional functions.

Parameters:

base – FLEXSPI peripheral base address.
handle – pointer to flexspi_handle_t structure to store the transfer state.
callback – pointer to user callback function.
userData – user parameter passed to the callback function.

status_t FLEXSPI_TransferNonBlocking(FLEXSPI_Type *base, flexspi_handle_t *handle, flexspi_transfer_t *xfer)

Performs a interrupt non-blocking transfer on the FLEXSPI bus.

Note

Calling the API returns immediately after transfer initiates. The user needs to call FLEXSPI_GetTransferCount to poll the transfer status to check whether the transfer is finished. If the return status is not kStatus_FLEXSPI_Busy, the transfer is finished. For FLEXSPI_Read, the dataSize should be multiple of rx watermark level, or FLEXSPI could not read data properly.

Parameters:

base – FLEXSPI peripheral base address.
handle – pointer to flexspi_handle_t structure which stores the transfer state.
xfer – pointer to flexspi_transfer_t structure.

Return values:

kStatus_Success – Successfully start the data transmission.
kStatus_FLEXSPI_Busy – Previous transmission still not finished.

status_t FLEXSPI_TransferGetCount(FLEXSPI_Type *base, flexspi_handle_t *handle, size_t *count)

Gets the master transfer status during a interrupt non-blocking transfer.

Parameters:

base – FLEXSPI peripheral base address.
handle – pointer to flexspi_handle_t structure which stores the transfer state.
count – Number of bytes transferred so far by the non-blocking transaction.

Return values:

kStatus_InvalidArgument – count is Invalid.
kStatus_Success – Successfully return the count.

void FLEXSPI_TransferAbort(FLEXSPI_Type *base, flexspi_handle_t *handle)

Aborts an interrupt non-blocking transfer early.

Note

This API can be called at any time when an interrupt non-blocking transfer initiates to abort the transfer early.

Parameters:

base – FLEXSPI peripheral base address.
handle – pointer to flexspi_handle_t structure which stores the transfer state

void FLEXSPI_TransferHandleIRQ(FLEXSPI_Type *base, flexspi_handle_t *handle)

Master interrupt handler.

Parameters:

base – FLEXSPI peripheral base address.
handle – pointer to flexspi_handle_t structure.

FSL_FLEXSPI_DRIVER_VERSION: FLEXSPI driver version.

Status structure of FLEXSPI.

Values:

enumerator kStatus_FLEXSPI_Busy: FLEXSPI is busy

enumerator kStatus_FLEXSPI_SequenceExecutionTimeout: Sequence execution timeout error occurred during FLEXSPI transfer.

enumerator kStatus_FLEXSPI_IpCommandSequenceError: IP command Sequence execution timeout error occurred during FLEXSPI transfer.

enumerator kStatus_FLEXSPI_IpCommandGrantTimeout: IP command grant timeout error occurred during FLEXSPI transfer.

CMD definition of FLEXSPI, use to form LUT instruction, _flexspi_command.

Values:

enumerator kFLEXSPI_Command_STOP: Stop execution, deassert CS.

enumerator kFLEXSPI_Command_SDR: Transmit Command code to Flash, using SDR mode.

enumerator kFLEXSPI_Command_RADDR_SDR: Transmit Row Address to Flash, using SDR mode.

enumerator kFLEXSPI_Command_CADDR_SDR: Transmit Column Address to Flash, using SDR mode.

enumerator kFLEXSPI_Command_MODE1_SDR: Transmit 1-bit Mode bits to Flash, using SDR mode.

enumerator kFLEXSPI_Command_MODE2_SDR: Transmit 2-bit Mode bits to Flash, using SDR mode.

enumerator kFLEXSPI_Command_MODE4_SDR: Transmit 4-bit Mode bits to Flash, using SDR mode.

enumerator kFLEXSPI_Command_MODE8_SDR: Transmit 8-bit Mode bits to Flash, using SDR mode.

enumerator kFLEXSPI_Command_WRITE_SDR: Transmit Programming Data to Flash, using SDR mode.

enumerator kFLEXSPI_Command_READ_SDR: Receive Read Data from Flash, using SDR mode.

enumerator kFLEXSPI_Command_LEARN_SDR: Receive Read Data or Preamble bit from Flash, SDR mode.

enumerator kFLEXSPI_Command_DATSZ_SDR: Transmit Read/Program Data size (byte) to Flash, SDR mode.

enumerator kFLEXSPI_Command_DUMMY_SDR: Leave data lines undriven by FlexSPI controller.

enumerator kFLEXSPI_Command_DUMMY_RWDS_SDR: Leave data lines undriven by FlexSPI controller, dummy cycles decided by RWDS.

enumerator kFLEXSPI_Command_DDR: Transmit Command code to Flash, using DDR mode.

enumerator kFLEXSPI_Command_RADDR_DDR: Transmit Row Address to Flash, using DDR mode.

enumerator kFLEXSPI_Command_CADDR_DDR: Transmit Column Address to Flash, using DDR mode.

enumerator kFLEXSPI_Command_MODE1_DDR: Transmit 1-bit Mode bits to Flash, using DDR mode.

enumerator kFLEXSPI_Command_MODE2_DDR: Transmit 2-bit Mode bits to Flash, using DDR mode.

enumerator kFLEXSPI_Command_MODE4_DDR: Transmit 4-bit Mode bits to Flash, using DDR mode.

enumerator kFLEXSPI_Command_MODE8_DDR: Transmit 8-bit Mode bits to Flash, using DDR mode.

enumerator kFLEXSPI_Command_WRITE_DDR: Transmit Programming Data to Flash, using DDR mode.

enumerator kFLEXSPI_Command_READ_DDR: Receive Read Data from Flash, using DDR mode.

enumerator kFLEXSPI_Command_LEARN_DDR: Receive Read Data or Preamble bit from Flash, DDR mode.

enumerator kFLEXSPI_Command_DATSZ_DDR: Transmit Read/Program Data size (byte) to Flash, DDR mode.

enumerator kFLEXSPI_Command_DUMMY_DDR: Leave data lines undriven by FlexSPI controller.

enumerator kFLEXSPI_Command_DUMMY_RWDS_DDR: Leave data lines undriven by FlexSPI controller, dummy cycles decided by RWDS.

enumerator kFLEXSPI_Command_JUMP_ON_CS: Stop execution, deassert CS and save operand[7:0] as the instruction start pointer for next sequence

enum _flexspi_pad

pad definition of FLEXSPI, use to form LUT instruction.

Values:

enumerator kFLEXSPI_1PAD: Transmit command/address and transmit/receive data only through DATA0/DATA1.

enumerator kFLEXSPI_2PAD: Transmit command/address and transmit/receive data only through DATA[1:0].

enumerator kFLEXSPI_4PAD: Transmit command/address and transmit/receive data only through DATA[3:0].

enumerator kFLEXSPI_8PAD: Transmit command/address and transmit/receive data only through DATA[7:0].

enum _flexspi_flags

FLEXSPI interrupt status flags.

Values:

enumerator kFLEXSPI_SequenceExecutionTimeoutFlag: Sequence execution timeout.

enumerator kFLEXSPI_AhbBusTimeoutFlag: AHB Bus timeout.

enumerator kFLEXSPI_SckStoppedBecauseTxEmptyFlag: SCK is stopped during command sequence because Async TX FIFO empty.

enumerator kFLEXSPI_SckStoppedBecauseRxFullFlag: SCK is stopped during command sequence because Async RX FIFO full.

enumerator kFLEXSPI_DataLearningFailedFlag: Data learning failed.

enumerator kFLEXSPI_IpTxFifoWatermarkEmptyFlag: IP TX FIFO WaterMark empty.

enumerator kFLEXSPI_IpRxFifoWatermarkAvailableFlag: IP RX FIFO WaterMark available.

enumerator kFLEXSPI_AhbCommandSequenceErrorFlag: AHB triggered Command Sequences Error.

enumerator kFLEXSPI_IpCommandSequenceErrorFlag: IP triggered Command Sequences Error.

enumerator kFLEXSPI_AhbCommandGrantTimeoutFlag: AHB triggered Command Sequences Grant Timeout.

enumerator kFLEXSPI_IpCommandGrantTimeoutFlag: IP triggered Command Sequences Grant Timeout.

enumerator kFLEXSPI_IpCommandExecutionDoneFlag: IP triggered Command Sequences Execution finished.

enumerator kFLEXSPI_AllInterruptFlags: All flags.

enum _flexspi_read_sample_clock

FLEXSPI sample clock source selection for Flash Reading.

Values:

enumerator kFLEXSPI_ReadSampleClkLoopbackInternally: Dummy Read strobe generated by FlexSPI Controller and loopback internally.

enumerator kFLEXSPI_ReadSampleClkLoopbackFromDqsPad: Dummy Read strobe generated by FlexSPI Controller and loopback from DQS pad.

enumerator kFLEXSPI_ReadSampleClkLoopbackFromSckPad: SCK output clock and loopback from SCK pad.

enumerator kFLEXSPI_ReadSampleClkExternalInputFromDqsPad: Flash provided Read strobe and input from DQS pad.

enum _flexspi_cs_interval_cycle_unit

FLEXSPI interval unit for flash device select.

Values:

enumerator kFLEXSPI_CsIntervalUnit1SckCycle: Chip selection interval: CSINTERVAL * 1 serial clock cycle.

enumerator kFLEXSPI_CsIntervalUnit256SckCycle: Chip selection interval: CSINTERVAL * 256 serial clock cycle.

enum _flexspi_ahb_write_wait_unit

FLEXSPI AHB wait interval unit for writing.

Values:

enumerator kFLEXSPI_AhbWriteWaitUnit2AhbCycle: AWRWAIT unit is 2 ahb clock cycle.

enumerator kFLEXSPI_AhbWriteWaitUnit8AhbCycle: AWRWAIT unit is 8 ahb clock cycle.

enumerator kFLEXSPI_AhbWriteWaitUnit32AhbCycle: AWRWAIT unit is 32 ahb clock cycle.

enumerator kFLEXSPI_AhbWriteWaitUnit128AhbCycle: AWRWAIT unit is 128 ahb clock cycle.

enumerator kFLEXSPI_AhbWriteWaitUnit512AhbCycle: AWRWAIT unit is 512 ahb clock cycle.

enumerator kFLEXSPI_AhbWriteWaitUnit2048AhbCycle: AWRWAIT unit is 2048 ahb clock cycle.

enumerator kFLEXSPI_AhbWriteWaitUnit8192AhbCycle: AWRWAIT unit is 8192 ahb clock cycle.

enumerator kFLEXSPI_AhbWriteWaitUnit32768AhbCycle: AWRWAIT unit is 32768 ahb clock cycle.

enum _flexspi_ip_error_code

Error Code when IP command Error detected.

Values:

enumerator kFLEXSPI_IpCmdErrorNoError: No error.

enumerator kFLEXSPI_IpCmdErrorJumpOnCsInIpCmd: IP command with JMP_ON_CS instruction used.

enumerator kFLEXSPI_IpCmdErrorUnknownOpCode: Unknown instruction opcode in the sequence.

enumerator kFLEXSPI_IpCmdErrorSdrDummyInDdrSequence: Instruction DUMMY_SDR/DUMMY_RWDS_SDR used in DDR sequence.

enumerator kFLEXSPI_IpCmdErrorDdrDummyInSdrSequence: Instruction DUMMY_DDR/DUMMY_RWDS_DDR used in SDR sequence.

enumerator kFLEXSPI_IpCmdErrorInvalidAddress: Flash access start address exceed the whole flash address range (A1/A2/B1/B2).

enumerator kFLEXSPI_IpCmdErrorSequenceExecutionTimeout: Sequence execution timeout.

enumerator kFLEXSPI_IpCmdErrorFlashBoundaryAcrosss: Flash boundary crossed.

enum _flexspi_ahb_error_code

Error Code when AHB command Error detected.

Values:

enumerator kFLEXSPI_AhbCmdErrorNoError: No error.

enumerator kFLEXSPI_AhbCmdErrorJumpOnCsInWriteCmd: AHB Write command with JMP_ON_CS instruction used in the sequence.

enumerator kFLEXSPI_AhbCmdErrorUnknownOpCode: Unknown instruction opcode in the sequence.

enumerator kFLEXSPI_AhbCmdErrorSdrDummyInDdrSequence: Instruction DUMMY_SDR/DUMMY_RWDS_SDR used in DDR sequence.

enumerator kFLEXSPI_AhbCmdErrorDdrDummyInSdrSequence: Instruction DUMMY_DDR/DUMMY_RWDS_DDR used in SDR sequence.

enumerator kFLEXSPI_AhbCmdSequenceExecutionTimeout: Sequence execution timeout.

enum _flexspi_port

FLEXSPI operation port select.

Values:

enumerator kFLEXSPI_PortA1: Access flash on A1 port.

enumerator kFLEXSPI_PortA2: Access flash on A2 port.

enumerator kFLEXSPI_PortB1: Access flash on B1 port.

enumerator kFLEXSPI_PortB2: Access flash on B2 port.

enumerator kFLEXSPI_PortCount

enum _flexspi_arb_command_source

Trigger source of current command sequence granted by arbitrator.

Values:

enumerator kFLEXSPI_AhbReadCommand

enumerator kFLEXSPI_AhbWriteCommand

enumerator kFLEXSPI_IpCommand

enumerator kFLEXSPI_SuspendedCommand

enum _flexspi_command_type

Command type.

Values:

enumerator kFLEXSPI_Command: FlexSPI operation: Only command, both TX and Rx buffer are ignored.

enumerator kFLEXSPI_Config: FlexSPI operation: Configure device mode, the TX fifo size is fixed in LUT.

enumerator kFLEXSPI_Read

enumerator kFLEXSPI_Write

typedef enum _flexspi_pad flexspi_pad_t: pad definition of FLEXSPI, use to form LUT instruction.

typedef enum _flexspi_flags flexspi_flags_t: FLEXSPI interrupt status flags.

typedef enum _flexspi_read_sample_clock flexspi_read_sample_clock_t: FLEXSPI sample clock source selection for Flash Reading.

typedef enum _flexspi_cs_interval_cycle_unit flexspi_cs_interval_cycle_unit_t: FLEXSPI interval unit for flash device select.

typedef enum _flexspi_ahb_write_wait_unit flexspi_ahb_write_wait_unit_t: FLEXSPI AHB wait interval unit for writing.

typedef enum _flexspi_ip_error_code flexspi_ip_error_code_t: Error Code when IP command Error detected.

typedef enum _flexspi_ahb_error_code flexspi_ahb_error_code_t: Error Code when AHB command Error detected.

typedef enum _flexspi_port flexspi_port_t: FLEXSPI operation port select.

typedef enum _flexspi_arb_command_source flexspi_arb_command_source_t: Trigger source of current command sequence granted by arbitrator.

typedef enum _flexspi_command_type flexspi_command_type_t: Command type.

typedef struct _flexspi_ahbBuffer_config flexspi_ahbBuffer_config_t

typedef struct _flexspi_config flexspi_config_t: FLEXSPI configuration structure.

typedef struct _flexspi_device_config flexspi_device_config_t: External device configuration items.

typedef struct _flexspi_transfer flexspi_transfer_t: Transfer structure for FLEXSPI.

typedef struct _flexspi_handle flexspi_handle_t

typedef void (*flexspi_transfer_callback_t)(FLEXSPI_Type *base, flexspi_handle_t *handle, status_t status, void *userData): FLEXSPI transfer callback function.

FSL_FEATURE_FLEXSPI_AHB_BUFFER_COUNT

FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1): Formula to form FLEXSPI instructions in LUT table.

struct _flexspi_ahbBuffer_config

#include <fsl_flexspi.h>

Public Members

uint8_t priority: This priority for AHB Master Read which this AHB RX Buffer is assigned.

uint8_t masterIndex: AHB Master ID the AHB RX Buffer is assigned.

uint16_t bufferSize: AHB buffer size in byte.

bool enablePrefetch: AHB Read Prefetch Enable for current AHB RX Buffer corresponding Master, allows prefetch disable/enable separately for each master.

struct _flexspi_config

#include <fsl_flexspi.h>

FLEXSPI configuration structure.

Public Members

flexspi_read_sample_clock_t rxSampleClock: Sample Clock source selection for Flash Reading.

bool enableSckFreeRunning: Enable/disable SCK output free-running.

bool enableCombination: Enable/disable combining PORT A and B Data Pins (SIOA[3:0] and SIOB[3:0]) to support Flash Octal mode.

bool enableDoze: Enable/disable doze mode support.

bool enableHalfSpeedAccess: Enable/disable divide by 2 of the clock for half speed commands.

flexspi_read_sample_clock_t rxSampleClockPortB: Sample Clock source_b selection for Flash Reading.

bool rxSampleClockDiff: Sample Clock source or source_b selection for Flash Reading.

bool enableSckBDiffOpt: Enable/disable SCKB pad use as SCKA differential clock output, when enable, Port B flash access is not available.

bool enableSameConfigForAll: Enable/disable same configuration for all connected devices when enabled, same configuration in FLASHA1CRx is applied to all.

uint16_t seqTimeoutCycle: Timeout wait cycle for command sequence execution, timeout after ahbGrantTimeoutCyle*1024 serial root clock cycles.

uint8_t ipGrantTimeoutCycle: Timeout wait cycle for IP command grant, timeout after ipGrantTimeoutCycle*1024 AHB clock cycles.

uint8_t txWatermark: FLEXSPI IP transmit watermark value.

uint8_t rxWatermark: FLEXSPI receive watermark value.

struct _flexspi_device_config

#include <fsl_flexspi.h>

External device configuration items.

Public Members

uint32_t flexspiRootClk: FLEXSPI serial root clock.

bool isSck2Enabled: FLEXSPI use SCK2.

uint32_t flashSize: Flash size in KByte.

bool addressShift: Address shift.

flexspi_cs_interval_cycle_unit_t CSIntervalUnit: CS interval unit, 1 or 256 cycle.

uint16_t CSInterval: CS line assert interval, multiply CS interval unit to get the CS line assert interval cycles.

uint8_t CSHoldTime: CS line hold time.

uint8_t CSSetupTime: CS line setup time.

uint8_t dataValidTime: Data valid time for external device.

uint8_t columnspace: Column space size.

bool enableWordAddress: If enable word address.

uint8_t AWRSeqIndex: Sequence ID for AHB write command.

uint8_t AWRSeqNumber: Sequence number for AHB write command.

uint8_t ARDSeqIndex: Sequence ID for AHB read command.

uint8_t ARDSeqNumber: Sequence number for AHB read command.

flexspi_ahb_write_wait_unit_t AHBWriteWaitUnit: AHB write wait unit.

uint16_t AHBWriteWaitInterval: AHB write wait interval, multiply AHB write interval unit to get the AHB write wait cycles.

bool enableWriteMask: Enable/Disable FLEXSPI drive DQS pin as write mask when writing to external device.

struct _flexspi_transfer

#include <fsl_flexspi.h>

Transfer structure for FLEXSPI.

Public Members

uint32_t deviceAddress: Operation device address.

flexspi_port_t port: Operation port.

flexspi_command_type_t cmdType: Execution command type.

uint8_t seqIndex: Sequence ID for command.

uint8_t SeqNumber: Sequence number for command.

uint32_t *data: Data buffer.

size_t dataSize: Data size in bytes.

struct _flexspi_handle

#include <fsl_flexspi.h>

Transfer handle structure for FLEXSPI.

Public Members

uint32_t state: Internal state for FLEXSPI transfer

uint8_t *data: Data buffer.

size_t dataSize: Remaining Data size in bytes.

size_t transferTotalSize: Total Data size in bytes.

flexspi_transfer_callback_t completionCallback: Callback for users while transfer finish or error occurred

void *userData: FLEXSPI callback function parameter.

struct ahbConfig

Public Members

uint8_t ahbGrantTimeoutCycle: Timeout wait cycle for AHB command grant, timeout after ahbGrantTimeoutCyle*1024 AHB clock cycles.

uint16_t ahbBusTimeoutCycle: Timeout wait cycle for AHB read/write access, timeout after ahbBusTimeoutCycle*1024 AHB clock cycles.

uint8_t resumeWaitCycle: Wait cycle for idle state before suspended command sequence resume, timeout after ahbBusTimeoutCycle AHB clock cycles.

flexspi_ahbBuffer_config_t buffer[FSL_FEATURE_FLEXSPI_AHB_BUFFER_COUNTn(0)]: AHB buffer size.

bool enableClearAHBBufferOpt: Enable/disable automatically clean AHB RX Buffer and TX Buffer when FLEXSPI returns STOP mode ACK.

bool enableReadAddressOpt: Enable/disable remove AHB read burst start address alignment limitation. when enable, there is no AHB read burst start address alignment limitation.

bool enableAHBPrefetch: Enable/disable AHB read prefetch feature, when enabled, FLEXSPI will fetch more data than current AHB burst.

bool enableAHBBufferable: Enable/disable AHB bufferable write access support, when enabled, FLEXSPI return before waiting for command execution finished.

bool enableAHBCachable: Enable AHB bus cachable read access support.

FLEXSPI DMA Driver

void FLEXSPI_TransferCreateHandleDMA(FLEXSPI_Type *base, flexspi_dma_handle_t *handle, flexspi_dma_callback_t callback, void *userData, dma_handle_t *txDmaHandle, dma_handle_t *rxDmaHandle)

Initializes the FLEXSPI handle for transfer which is used in transactional functions and set the callback.

Parameters:

base – FLEXSPI peripheral base address
handle – Pointer to flexspi_dma_handle_t structure
callback – FLEXSPI callback, NULL means no callback.
userData – User callback function data.
txDmaHandle – User requested DMA handle for TX DMA transfer.
rxDmaHandle – User requested DMA handle for RX DMA transfer.

void FLEXSPI_TransferUpdateSizeDMA(FLEXSPI_Type *base, flexspi_dma_handle_t *handle, flexspi_dma_transfer_nsize_t nsize)

Update FLEXSPI DMA transfer source data transfer size(SSIZE) and destination data transfer size(DSIZE).

See also

flexspi_dma_transfer_nsize_t .

Parameters:

base – FLEXSPI peripheral base address
handle – Pointer to flexspi_dma_handle_t structure
nsize – FLEXSPI DMA transfer data transfer size(SSIZE/DSIZE), by default the size is kFLEXPSI_DMAnSize1Bytes(one byte).

status_t FLEXSPI_TransferDMA(FLEXSPI_Type *base, flexspi_dma_handle_t *handle, flexspi_transfer_t *xfer)

Transfers FLEXSPI data using an dma non-blocking method.

This function writes/receives data to/from the FLEXSPI transmit/receive FIFO. This function is non-blocking.

Parameters:

base – FLEXSPI peripheral base address.
handle – Pointer to flexspi_dma_handle_t structure
xfer – FLEXSPI transfer structure.

Return values:

kStatus_FLEXSPI_Busy – FLEXSPI is busy transfer.
kStatus_InvalidArgument – The watermark configuration is invalid, the watermark should be power of 2 to do successfully DMA transfer.
kStatus_Success – FLEXSPI successfully start dma transfer.

void FLEXSPI_TransferAbortDMA(FLEXSPI_Type *base, flexspi_dma_handle_t *handle)

Aborts the transfer data using dma.

This function aborts the transfer data using dma.

Parameters:

base – FLEXSPI peripheral base address.
handle – Pointer to flexspi_dma_handle_t structure

status_t FLEXSPI_TransferGetTransferCountDMA(FLEXSPI_Type *base, flexspi_dma_handle_t *handle, size_t *count)

Gets the transferred counts of transfer.

Parameters:

base – FLEXSPI peripheral base address.
handle – Pointer to flexspi_dma_handle_t structure.
count – Bytes transfer.

Return values:

kStatus_Success – Succeed get the transfer count.
kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.

FSL_FLEXSPI_DMA_DRIVER_VERSION: FLEXSPI DMA driver version 2.2.1.

enum _flexspi_dma_ntransfer_size

dma transfer configuration

Values:

enumerator kFLEXPSI_DMAnSize1Bytes: Source/Destination data transfer size is 1 byte every time

enumerator kFLEXPSI_DMAnSize2Bytes: Source/Destination data transfer size is 2 bytes every time

enumerator kFLEXPSI_DMAnSize4Bytes: Source/Destination data transfer size is 4 bytes every time

typedef struct _flexspi_dma_handle flexspi_dma_handle_t

typedef void (*flexspi_dma_callback_t)(FLEXSPI_Type *base, flexspi_dma_handle_t *handle, status_t status, void *userData): FLEXSPI dma transfer callback function for finish and error.

typedef enum _flexspi_dma_ntransfer_size flexspi_dma_transfer_nsize_t: dma transfer configuration

struct _flexspi_dma_handle

#include <fsl_flexspi_dma.h>

FLEXSPI DMA transfer handle, users should not touch the content of the handle.

Public Members

dma_handle_t *txDmaHandle: dma handler for FLEXSPI Tx.

dma_handle_t *rxDmaHandle: dma handler for FLEXSPI Rx.

size_t transferSize: Bytes need to transfer.

flexspi_dma_transfer_nsize_t nsize: dma SSIZE/DSIZE in each transfer.

uint8_t nbytes: dma minor byte transfer count initially configured.

uint8_t count: The transfer data count in a DMA request.

uint32_t state: Internal state for FLEXSPI dma transfer.

flexspi_dma_callback_t completionCallback: A callback function called after the dma transfer is finished.

void *userData: User callback parameter

FMEAS: Frequency Measure Driver

static inline void FMEAS_StartMeasure(FMEAS_SYSCON_Type *base)

Starts a frequency measurement cycle.

Parameters:

base – : SYSCON peripheral base address.

static inline bool FMEAS_IsMeasureComplete(FMEAS_SYSCON_Type *base)

Indicates when a frequency measurement cycle is complete.

Parameters:

base – : SYSCON peripheral base address.

Returns:

true if a measurement cycle is active, otherwise false.

uint32_t FMEAS_GetFrequency(FMEAS_SYSCON_Type *base, uint32_t refClockRate)

Returns the computed value for a frequency measurement cycle.

Parameters:

base – : SYSCON peripheral base address.
refClockRate – : Reference clock rate used during the frequency measurement cycle.

Returns:

Frequency in Hz.

FSL_FMEAS_DRIVER_VERSION: Defines LPC Frequency Measure driver version 2.1.1.

typedef FREQME_Type FMEAS_SYSCON_Type

FMEAS_SYSCON_FREQMECTRL_CAPVAL_MASK

FMEAS_SYSCON_FREQMECTRL_CAPVAL_SHIFT

FMEAS_SYSCON_FREQMECTRL_CAPVAL

FMEAS_SYSCON_FREQMECTRL_PROG_MASK

FMEAS_SYSCON_FREQMECTRL_PROG_SHIFT

FMEAS_SYSCON_FREQMECTRL_PROG

GDMA: General DMA(GDMA) Driver

void GDMA_Init(GDMA_Type *base)

Initializes GDMA peripheral.

It ungates the GDMA access clock, after this function, the GDMA module is ready to be used.

Parameters:

base – GDMA peripheral base address.

void GDMA_Deinit(GDMA_Type *base)

Deinitializes GDMA peripheral.

Parameters:

base – GDMA peripheral base address.

static inline void GDMA_SetChannelSourceAddress(GDMA_Type *base, uint8_t channel, uint32_t addr)

Set GDMA channel source address.

Parameters:

base – GDMA peripheral base address.
channel – GDMA channel number.
addr – Source address.

static inline void GDMA_SetChannelDestAddress(GDMA_Type *base, uint8_t channel, uint32_t addr)

Set GDMA channel destination address.

Parameters:

base – GDMA peripheral base address.
channel – GDMA channel number.
addr – Destination address.

static inline void GDMA_StartChannel(GDMA_Type *base, uint8_t channel)

Start GDMA channel to work.

Parameters:

base – GDMA peripheral base address.
channel – GDMA channel number.

static inline void GDMA_StopChannel(GDMA_Type *base, uint8_t channel)

Stop GDMA channel.

Parameters:

base – GDMA peripheral base address.
channel – GDMA channel number.

static inline bool GDMA_IsChannelBusy(GDMA_Type *base, uint8_t channel)

Return whether GDMA channel is processing transfer.

When GDMA_StopChannel is called, if the channel is on service, it does not stop immediately, application could call this API to check whether the channel is stopped.

Parameters:

base – GDMA peripheral base address.
channel – GDMA channel number.

Returns:

True if the channel is busy, false if not.

static inline void GDMA_EnableChannelInterrupts(GDMA_Type *base, uint8_t channel, uint32_t interrupts)

Enables the interrupt for the GDMA transfer.

Parameters:

base – GDMA peripheral base address.
channel – GDMA channel number.
interrupts – The interrupts to enable, it is OR’ed value of _gdma_interrupt_enable.

static inline void GDMA_DisableChannelInterrupts(GDMA_Type *base, uint8_t channel, uint32_t interrupts)

Disables the interrupt for the GDMA transfer.

Parameters:

base – GDMA peripheral base address.
channel – GDMA channel number.
interrupts – The interrupts to disable, it is OR’ed value of _gdma_interrupt_enable.

static inline uint32_t GDMA_GetChannelInterruptFlags(GDMA_Type *base, uint8_t channel)

Get the GDMA channel interrupt flags.

Parameters:

base – GDMA peripheral base address.
channel – GDMA channel number.

Returns:

The interrupt flags, it is OR’ed value of _gdma_interrupt_flags.

static inline void GDMA_ClearChannelInterruptFlags(GDMA_Type *base, uint8_t channel, uint32_t flags)

Clear the GDMA channel interrupt flags.

The kGDMA_ChannelInterruptFlag is OR’ed status of all other unmasked interrupt flags, it could not be clear directly, it should be cleared by clear all other flags.

Parameters:

base – GDMA peripheral base address.
channel – GDMA channel number.
flags – The interrupt flags to clear, it is OR’ed value of _gdma_interrupt_flags.

static inline uint32_t GDMA_GetChannelFinishedDescriptorNumber(GDMA_Type *base, uint8_t channel)

Get the number of finished descriptor.

The counter increases when an item of descriptor is done in linklist mode.

Parameters:

base – GDMA peripheral base address.
channel – GDMA channel number.

Returns:

Number of finished descriptor.

static inline void GDMA_ClearChannelFinishedDescriptorNumber(GDMA_Type *base, uint8_t channel)

Clear the number of finished descriptor.

Parameters:

base – GDMA peripheral base address.
channel – GDMA channel number.

static inline void GDMA_SetChannelPriority(GDMA_Type *base, uint8_t channel, gdma_priority_t priority)

Set priority of channel.

Parameters:

base – GDMA peripheral base address.
channel – GDMA channel number.
priority – Channel priority value.

status_t GDMA_SetChannelTransferConfig(GDMA_Type *base, uint8_t channel, const gdma_channel_xfer_config_t *config)

Set channel transfer configuration..

This function configures the channel transfer, after configured, GDMA_StartChannel could be called to start the transfer.

This function must be called when previous transfer finished. Application can use GDMA_IsChannelBusy to check whether the channel has finished the previous work.

Note

The transfer configuration must follow the requirements:

SRCBSIZE * SRCWIDTH == DESTBSIZE * DESTWIDTH
If wrap not used, the address should align with WIDTH
If wrap used, the address should align with WIDTH * BURST_SIZE.

Parameters:

base – GDMA base address.
channel – GDMA channel number. @config Pointer to the transfer configuration.

Return values:

kStatus_Fail – GDMA is busy with previous transfer.
kStatus_Success – Configuration set successfully.
kStatus_InvalidArgument – Configuration wrong.

void GDMA_CreateHandle(gdma_handle_t *handle, GDMA_Type *base, uint8_t channel)

Creates the GDMA handle.

This function is called if using transaction API for GDMA. This function initializes the internal state of GDMA handle.

Parameters:

handle – GDMA handle pointer. It stores callback function and parameters.
base – GDMA peripheral base address.
channel – GDMA channel number.

void GDMA_SetCallback(gdma_handle_t *handle, gdma_callback_t callback, void *userData)

Installs a callback function for the GDMA transfer.

This callback is called in GDMA IRQ handler to inform user the interrupt status.

Parameters:

handle – GDMA handle pointer.
callback – GDMA callback function pointer.
userData – Parameter for callback function.

status_t GDMA_SubmitTransfer(gdma_handle_t *handle, gdma_channel_xfer_config_t *config)

Submits the GDMA channel transfer request.

After this function, user could call GDMA_StartTransfer to start GDMA transfer.

This function must be called when previous transfer finished. Application can use GDMA_IsChannelBusy to check whether the channel has finished the previous work.

Note

The transfer configuration must follow the requirements:

SRCBSIZE * SRCWIDTH == DESTBSIZE * DESTWIDTH
If wrap not used, the address should align with WIDTH
If wrap used, the address should align with WIDTH * BURST_SIZE.

Parameters:

handle – GDMA handle pointer.
config – Pointer to GDMA transfer configuration structure.

Return values:

kStatus_Fail – GDMA is busy with previous transfer.
kStatus_Success – Configuration set successfully.
kStatus_InvalidArgument – Configuration wrong.

void GDMA_StartTransfer(gdma_handle_t *handle)

GDMA start transfer.

User can call this function after GDMA_SubmitTransfer.

Parameters:

handle – GDMA handle pointer.

void GDMA_AbortTransfer(gdma_handle_t *handle)

Abort running transfer by handle.

When this function is called, if the channel is on service, it only stops when service finished.

Parameters:

handle – GDMA handle pointer.

void GDMA_IRQHandle(GDMA_Type *base)

GDMA IRQ handler.

This function checks all GDMA channel interrupts and inform application the interrupt flags through user registered callback.

Parameters:

base – GDMA peripheral.

FSL_GDMA_DRIVER_VERSION

enum _gdma_transfer_width

GDMA transfer width.

Values:

enumerator kGDMA_TransferWidth1Byte: 1 byte.

enumerator kGDMA_TransferWidth2Byte: 2 bytes.

enumerator kGDMA_TransferWidth4Byte: 4 bytes.

enum _gdma_burst_size

GDMA burst size.

Values:

enumerator kGDMA_BurstSize1: Burst 1.

enumerator kGDMA_BurstSize4: Burst 4.

enumerator kGDMA_BurstSize8: Burst 8.

enumerator kGDMA_BurstSize16: Burst 16.

enumerator kGDMA_BurstSizeWrap4: Wrap 4.

enumerator kGDMA_BurstSizeWrap8: Wrap 8.

enumerator kGDMA_BurstSizeWrap16: Wrap 16.

enum _gdma_ahb_prot

GDMA AHB HPROT flags. .

Values:

enumerator kGDMA_ProtUserMode: The access is in user mode.

enumerator kGDMA_ProtPrevilegedMode: The access is in previleged mode.

enumerator kGDMA_ProtUnbufferable: The access is not bufferable.

enumerator kGDMA_ProtBufferable: The access is bufferable.

enumerator kGDMA_ProtUncacheable: The access is not cacheable.

enumerator kGDMA_ProtCacheable: The access is cacheable.

enum _gdma_priority

GDMA channel priority.

Values:

enumerator kGDMA_ChannelPriority0: Lowest channel priority - priority 0

enumerator kGDMA_ChannelPriority1: Channel priority 1

enumerator kGDMA_ChannelPriority2: Channel priority 2

enumerator kGDMA_ChannelPriority3: Channel priority 3

enumerator kGDMA_ChannelPriority4: Channel priority 4

enumerator kGDMA_ChannelPriority5: Channel priority 5

enumerator kGDMA_ChannelPriority6: Channel priority 6

enumerator kGDMA_ChannelPriority7: Channel priority 7

enumerator kGDMA_ChannelPriority8: Channel priority 8

enumerator kGDMA_ChannelPriority9: Channel priority 9

enumerator kGDMA_ChannelPriority10: Channel priority 10

enumerator kGDMA_ChannelPriority11: Channel priority 11

enumerator kGDMA_ChannelPriority12: Channel priority 12

enumerator kGDMA_ChannelPriority13: Channel priority 13

enumerator kGDMA_ChannelPriority14: Channel priority 14

enumerator kGDMA_ChannelPriority15: Highest channel priority - priority 15

enum _gdma_interrupt_enable

GDMA interrupts to enable .

Values:

enumerator kGDMA_DescriptorTransferDoneInterruptEnable: Descriptor transfer done interrupt. This happens when the descriptor is configured to generate interrupt when transfer done.

enumerator kGDMA_AddressErrorInterruptEnable: Channel source or destination address is not aligned to corresponding transfer width.

enumerator kGDMA_BusErrorInterruptEnable: AHB bus interrupt.

enumerator kGDMA_TransferDoneInterruptEnable: DMA transfer done interrupt.

enumerator kGDMA_BlockTransferDoneInterruptEnable: DMA block single/burst transfer done interrupt.

enumerator kGDMA_AllInterruptEnable: All interrupt enable.

enum _gdma_interrupt_flags

GDMA interrupt status flags. .

Values:

enumerator kGDMA_DescriptorTransferDoneFlag: Descriptor transfer done interrupt. This happens when the descriptor is configured to generate interrupt when transfer done.

enumerator kGDMA_ChannelInterruptFlag: OR of the content of the respective unmasked interrupt of channel.

enumerator kGDMA_AddressErrorFlag: Channel source or destination address is not aligned to corresponding transfer width.

enumerator kGDMA_BusErrorFlag: AHB bus interrupt.

enumerator kGDMA_TransferDoneFlag: DMA transfer done interrupt.

enumerator kGDMA_BlockTransferDoneFlag: DMA block single/burst transfer done interrupt.

enumerator kGDMA_AllInterruptFlag: All interrupt flags.

typedef enum _gdma_transfer_width gdma_transfer_width_t: GDMA transfer width.

typedef enum _gdma_burst_size gdma_burst_size_t: GDMA burst size.

typedef enum _gdma_priority gdma_priority_t: GDMA channel priority.

typedef struct _gdma_channel_xfer_config gdma_channel_xfer_config_t

GDMA channel transfer configuration.

Note

The transfer configuration must follow the requirements:

SRCBSIZE * SRCWIDTH == DESTBSIZE * DESTWIDTH
If wrap not used, the address should align with WIDTH
If wrap used, the address should align with WIDTH * BURST_SIZE.

typedef void (*gdma_callback_t)(struct _gdma_handle *handle, void *userData, uint32_t interrupts)

Define Callback function for GDMA.

handle: Pointer to the GDMA driver handle. userData: The userData registered using GDMA_SetCallback. interrupts: The interrupts flags of the specific channel.

typedef struct _gdma_handle gdma_handle_t: GDMA transfer handle structure.

gdma_descriptor_t

struct __ALIGNED (16) _gdma_descriptor: GDMA channel link list descriptor structure.

GDMA_DESC_LLI(linkListAddr, stopAfterDescFinished, enableDescInterrupt)

Macro for GDMA link list descriptor LLI.

This macro constructs gdma_descriptor_t::lli.

Parameters:

linkListAddr – Address of next link list descriptor item.
stopAfterDescFinished – Stop or not after this descriptor transfer done.
enableDescInterrupt – Generate interrupt after this descriptor transfer done.

GDMA_DESC_CTRL(ahbProt, srcAddrInc, destAddrInc, srcWidth, destWidth, srcBurstSize, destBurstSize, length)

struct _gdma_channel_xfer_config

#include <fsl_gdma.h>

GDMA channel transfer configuration.

Note

The transfer configuration must follow the requirements:

SRCBSIZE * SRCWIDTH == DESTBSIZE * DESTWIDTH
If wrap not used, the address should align with WIDTH
If wrap used, the address should align with WIDTH * BURST_SIZE.

Public Members

uint32_t srcAddr: Source data address

uint32_t destAddr: Destination data address

uint8_t ahbProt: GDMA AHB HPROT flags, it could be OR’ed value of _gdma_ahb_prot.

gdma_burst_size_t srcBurstSize: Source address burst size.

gdma_burst_size_t destBurstSize: Destination address burst size.

gdma_transfer_width_t srcWidth: Source transfer width.

gdma_transfer_width_t destWidth: Destination transfer width.

bool srcAddrInc: Increase source address on each successive access.

bool destAddrInc: Increase destination address on each successive access.

uint16_t transferLen: Transfer length in bytes, max value is 8 * 1024 - 1, should align with transfer size.

bool enableLinkList: Enable link list or not.

bool enableDescInterrupt: Generate interrupt when descriptor transfer finished, only used when enableLinkList is true.

bool stopAfterDescFinished: Stop channel when descriptor transfer finished, only used when enableLinkList is true.

uint32_t linkListAddr: Link list address, only used when enableLinkList is true.

struct _gdma_handle

#include <fsl_gdma.h>

GDMA transfer handle structure.

Public Members

GDMA_Type *gdma: GDMA peripheral base address

uint8_t channel: GDMA channel number

gdma_callback_t callback: Callback function. Invoked interrupt happens.

void *userData: Callback function parameter

I2C: Inter-Integrated Circuit Driver

I2C DMA Driver

void I2C_MasterTransferCreateHandleDMA(I2C_Type *base, i2c_master_dma_handle_t *handle, i2c_master_dma_transfer_callback_t callback, void *userData, dma_handle_t *dmaHandle)

Init the I2C handle which is used in transactional functions.

Parameters:

base – I2C peripheral base address
handle – pointer to i2c_master_dma_handle_t structure
callback – pointer to user callback function
userData – user param passed to the callback function
dmaHandle – DMA handle pointer

status_t I2C_MasterTransferDMA(I2C_Type *base, i2c_master_dma_handle_t *handle, i2c_master_transfer_t *xfer)

Performs a master dma non-blocking transfer on the I2C bus.

Parameters:

base – I2C peripheral base address
handle – pointer to i2c_master_dma_handle_t structure
xfer – pointer to transfer structure of i2c_master_transfer_t

Return values:

kStatus_Success – Sucessully complete the data transmission.
kStatus_I2C_Busy – Previous transmission still not finished.
kStatus_I2C_Timeout – Transfer error, wait signal timeout.
kStatus_I2C_ArbitrationLost – Transfer error, arbitration lost.
kStataus_I2C_Nak – Transfer error, receive Nak during transfer.

status_t I2C_MasterTransferGetCountDMA(I2C_Type *base, i2c_master_dma_handle_t *handle, size_t *count)

Get master transfer status during a dma non-blocking transfer.

Parameters:

base – I2C peripheral base address
handle – pointer to i2c_master_dma_handle_t structure
count – Number of bytes transferred so far by the non-blocking transaction.

void I2C_MasterTransferAbortDMA(I2C_Type *base, i2c_master_dma_handle_t *handle)

Abort a master dma non-blocking transfer in a early time.

Parameters:

base – I2C peripheral base address
handle – pointer to i2c_master_dma_handle_t structure

FSL_I2C_DMA_DRIVER_VERSION: I2C DMA driver version.

typedef struct _i2c_master_dma_handle i2c_master_dma_handle_t: I2C master dma handle typedef.

typedef void (*i2c_master_dma_transfer_callback_t)(I2C_Type *base, i2c_master_dma_handle_t *handle, status_t status, void *userData): I2C master dma transfer callback typedef.

typedef void (*flexcomm_i2c_dma_master_irq_handler_t)(I2C_Type *base, i2c_master_dma_handle_t *handle): Typedef for master dma handler.

I2C_MAX_DMA_TRANSFER_COUNT: Maximum lenght of single DMA transfer (determined by capability of the DMA engine)

struct _i2c_master_dma_handle

#include <fsl_i2c_dma.h>

I2C master dma transfer structure.

Public Members

uint8_t state: Transfer state machine current state.

uint32_t transferCount: Indicates progress of the transfer

uint32_t remainingBytesDMA: Remaining byte count to be transferred using DMA.

uint8_t *buf: Buffer pointer for current state.

bool checkAddrNack: Whether to check the nack signal is detected during addressing.

dma_handle_t *dmaHandle: The DMA handler used.

i2c_master_transfer_t transfer: Copy of the current transfer info.

i2c_master_dma_transfer_callback_t completionCallback: Callback function called after dma transfer finished.

void *userData: Callback parameter passed to callback function.

I2C Driver

FSL_I2C_DRIVER_VERSION: I2C driver version.

I2C status return codes.

Values:

enumerator kStatus_I2C_Busy: The master is already performing a transfer.

enumerator kStatus_I2C_Idle: The slave driver is idle.

enumerator kStatus_I2C_Nak: The slave device sent a NAK in response to a byte.

enumerator kStatus_I2C_InvalidParameter: Unable to proceed due to invalid parameter.

enumerator kStatus_I2C_BitError: Transferred bit was not seen on the bus.

enumerator kStatus_I2C_ArbitrationLost: Arbitration lost error.

enumerator kStatus_I2C_NoTransferInProgress: Attempt to abort a transfer when one is not in progress.

enumerator kStatus_I2C_DmaRequestFail: DMA request failed.

enumerator kStatus_I2C_StartStopError: Start and stop error.

enumerator kStatus_I2C_UnexpectedState: Unexpected state.

enumerator kStatus_I2C_Timeout: Timeout when waiting for I2C master/slave pending status to set to continue transfer.

enumerator kStatus_I2C_Addr_Nak: NAK received for Address

enumerator kStatus_I2C_EventTimeout: Timeout waiting for bus event.

enumerator kStatus_I2C_SclLowTimeout: Timeout SCL signal remains low.

enum _i2c_status_flags

I2C status flags.

Note

These enums are meant to be OR’d together to form a bit mask.

Values:

enumerator kI2C_MasterPendingFlag: The I2C module is waiting for software interaction. bit 0

enumerator kI2C_MasterArbitrationLostFlag: The arbitration of the bus was lost. There was collision on the bus. bit 4

enumerator kI2C_MasterStartStopErrorFlag: There was an error during start or stop phase of the transaction. bit 6

enumerator kI2C_MasterIdleFlag: The I2C master idle status. bit 5

enumerator kI2C_MasterRxReadyFlag: The I2C master rx ready status. bit 1

enumerator kI2C_MasterTxReadyFlag: The I2C master tx ready status. bit 2

enumerator kI2C_MasterAddrNackFlag: The I2C master address nack status. bit 7

enumerator kI2C_MasterDataNackFlag: The I2C master data nack status. bit 3

enumerator kI2C_SlavePendingFlag: The I2C module is waiting for software interaction. bit 8

enumerator kI2C_SlaveNotStretching: Indicates whether the slave is currently stretching clock (0 = yes, 1 = no). bit 11

enumerator kI2C_SlaveSelected: Indicates whether the slave is selected by an address match. bit 14

enumerator kI2C_SaveDeselected: Indicates that slave was previously deselected (deselect event took place, w1c). bit 15

enumerator kI2C_SlaveAddressedFlag: One of the I2C slave’s 4 addresses is matched. bit 22

enumerator kI2C_SlaveReceiveFlag: Slave receive data available. bit 9

enumerator kI2C_SlaveTransmitFlag: Slave data can be transmitted. bit 10

enumerator kI2C_SlaveAddress0MatchFlag: Slave address0 match. bit 20

enumerator kI2C_SlaveAddress1MatchFlag: Slave address1 match. bit 12

enumerator kI2C_SlaveAddress2MatchFlag: Slave address2 match. bit 13

enumerator kI2C_SlaveAddress3MatchFlag: Slave address3 match. bit 21

enumerator kI2C_MonitorReadyFlag: The I2C monitor ready interrupt. bit 16

enumerator kI2C_MonitorOverflowFlag: The monitor data overrun interrupt. bit 17

enumerator kI2C_MonitorActiveFlag: The monitor is active. bit 18

enumerator kI2C_MonitorIdleFlag: The monitor idle interrupt. bit 19

enumerator kI2C_EventTimeoutFlag: The bus event timeout interrupt. bit 24

enumerator kI2C_SclTimeoutFlag: The SCL timeout interrupt. bit 25

enumerator kI2C_MasterAllClearFlags

enumerator kI2C_SlaveAllClearFlags

enumerator kI2C_CommonAllClearFlags

enum _i2c_interrupt_enable

I2C interrupt enable.

Note

These enums are meant to be OR’d together to form a bit mask.

Values:

enumerator kI2C_MasterPendingInterruptEnable: The I2C master communication pending interrupt.

enumerator kI2C_MasterArbitrationLostInterruptEnable: The I2C master arbitration lost interrupt.

enumerator kI2C_MasterStartStopErrorInterruptEnable: The I2C master start/stop timing error interrupt.

enumerator kI2C_SlavePendingInterruptEnable: The I2C slave communication pending interrupt.

enumerator kI2C_SlaveNotStretchingInterruptEnable: The I2C slave not streching interrupt, deep-sleep mode can be entered only when this interrupt occurs.

enumerator kI2C_SlaveDeselectedInterruptEnable: The I2C slave deselection interrupt.

enumerator kI2C_MonitorReadyInterruptEnable: The I2C monitor ready interrupt.

enumerator kI2C_MonitorOverflowInterruptEnable: The monitor data overrun interrupt.

enumerator kI2C_MonitorIdleInterruptEnable: The monitor idle interrupt.

enumerator kI2C_EventTimeoutInterruptEnable: The bus event timeout interrupt.

enumerator kI2C_SclTimeoutInterruptEnable: The SCL timeout interrupt.

enumerator kI2C_MasterAllInterruptEnable

enumerator kI2C_SlaveAllInterruptEnable

enumerator kI2C_CommonAllInterruptEnable

I2C_RETRY_TIMES: Retry times for waiting flag.

I2C_MASTER_TRANSMIT_IGNORE_LAST_NACK: Whether to ignore the nack signal of the last byte during master transmit.

I2C_STAT_MSTCODE_IDLE: Master Idle State Code

I2C_STAT_MSTCODE_RXREADY: Master Receive Ready State Code

I2C_STAT_MSTCODE_TXREADY: Master Transmit Ready State Code

I2C_STAT_MSTCODE_NACKADR: Master NACK by slave on address State Code

I2C_STAT_MSTCODE_NACKDAT: Master NACK by slave on data State Code

I2C_STAT_SLVST_ADDR

I2C_STAT_SLVST_RX

I2C_STAT_SLVST_TX

I2C Master Driver

void I2C_MasterGetDefaultConfig(i2c_master_config_t *masterConfig)

Provides a default configuration for the I2C master peripheral.

This function provides the following default configuration for the I2C master peripheral:

masterConfig->enableMaster            = true;
masterConfig->baudRate_Bps            = 100000U;
masterConfig->enableTimeout           = false;

After calling this function, you can override any settings in order to customize the configuration, prior to initializing the master driver with I2C_MasterInit().

Parameters:

masterConfig – [out] User provided configuration structure for default values. Refer to i2c_master_config_t.

void I2C_MasterInit(I2C_Type *base, const i2c_master_config_t *masterConfig, uint32_t srcClock_Hz)

Initializes the I2C master peripheral.

This function enables the peripheral clock and initializes the I2C master peripheral as described by the user provided configuration. A software reset is performed prior to configuration.

Parameters:

base – The I2C peripheral base address.
masterConfig – User provided peripheral configuration. Use I2C_MasterGetDefaultConfig() to get a set of defaults that you can override.
srcClock_Hz – Frequency in Hertz of the I2C functional clock. Used to calculate the baud rate divisors, filter widths, and timeout periods.

void I2C_MasterDeinit(I2C_Type *base)

Deinitializes the I2C master peripheral.

This function disables the I2C master peripheral and gates the clock. It also performs a software reset to restore the peripheral to reset conditions.

Parameters:

base – The I2C peripheral base address.

uint32_t I2C_GetInstance(I2C_Type *base)

Returns an instance number given a base address.

If an invalid base address is passed, debug builds will assert. Release builds will just return instance number 0.

Parameters:

base – The I2C peripheral base address.

Returns:

I2C instance number starting from 0.

static inline void I2C_MasterReset(I2C_Type *base)

Performs a software reset.

Restores the I2C master peripheral to reset conditions.

Parameters:

base – The I2C peripheral base address.

static inline void I2C_MasterEnable(I2C_Type *base, bool enable)

Enables or disables the I2C module as master.

Parameters:

base – The I2C peripheral base address.
enable – Pass true to enable or false to disable the specified I2C as master.

uint32_t I2C_GetStatusFlags(I2C_Type *base)

Gets the I2C status flags.

A bit mask with the state of all I2C status flags is returned. For each flag, the corresponding bit in the return value is set if the flag is asserted.

See also

_i2c_status_flags.

Parameters:

base – The I2C peripheral base address.

Returns:

State of the status flags:

1: related status flag is set.
0: related status flag is not set.

static inline void I2C_ClearStatusFlags(I2C_Type *base, uint32_t statusMask)

Clears the I2C status flag state.

Refer to kI2C_CommonAllClearStatusFlags, kI2C_MasterAllClearStatusFlags and kI2C_SlaveAllClearStatusFlags to see the clearable flags. Attempts to clear other flags has no effect.

See also

_i2c_status_flags, _i2c_master_status_flags and _i2c_slave_status_flags.

Parameters:

base – The I2C peripheral base address.
statusMask – A bitmask of status flags that are to be cleared. The mask is composed of the members in kI2C_CommonAllClearStatusFlags, kI2C_MasterAllClearStatusFlags and kI2C_SlaveAllClearStatusFlags. You may pass the result of a previous call to I2C_GetStatusFlags().

static inline void I2C_MasterClearStatusFlags(I2C_Type *base, uint32_t statusMask)

Clears the I2C master status flag state.

Deprecated:

Do not use this function. It has been superceded by I2C_ClearStatusFlags The following status register flags can be cleared:

kI2C_MasterArbitrationLostFlag
kI2C_MasterStartStopErrorFlag

Attempts to clear other flags has no effect.

See also

_i2c_status_flags.

Parameters:

base – The I2C peripheral base address.
statusMask – A bitmask of status flags that are to be cleared. The mask is composed of _i2c_status_flags enumerators OR’d together. You may pass the result of a previous call to I2C_GetStatusFlags().

static inline void I2C_EnableInterrupts(I2C_Type *base, uint32_t interruptMask)

Enables the I2C interrupt requests.

Parameters:

base – The I2C peripheral base address.
interruptMask – Bit mask of interrupts to enable. See _i2c_interrupt_enable for the set of constants that should be OR’d together to form the bit mask.

static inline void I2C_DisableInterrupts(I2C_Type *base, uint32_t interruptMask)

Disables the I2C interrupt requests.

Parameters:

base – The I2C peripheral base address.
interruptMask – Bit mask of interrupts to disable. See _i2c_interrupt_enable for the set of constants that should be OR’d together to form the bit mask.

static inline uint32_t I2C_GetEnabledInterrupts(I2C_Type *base)

Returns the set of currently enabled I2C interrupt requests.

Parameters:

base – The I2C peripheral base address.

Returns:

A bitmask composed of _i2c_interrupt_enable enumerators OR’d together to indicate the set of enabled interrupts.

void I2C_MasterSetBaudRate(I2C_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz)

Sets the I2C bus frequency for master transactions.

The I2C master is automatically disabled and re-enabled as necessary to configure the baud rate. Do not call this function during a transfer, or the transfer is aborted.

Parameters:

base – The I2C peripheral base address.
srcClock_Hz – I2C functional clock frequency in Hertz.
baudRate_Bps – Requested bus frequency in bits per second.

void I2C_MasterSetTimeoutValue(I2C_Type *base, uint8_t timeout_Ms, uint32_t srcClock_Hz)

Sets the I2C bus timeout value.

If the SCL signal remains low or bus does not have event longer than the timeout value, kI2C_SclTimeoutFlag or kI2C_EventTimeoutFlag is set. This can indicete the bus is held by slave or any fault occurs to the I2C module.

Parameters:

base – The I2C peripheral base address.
timeout_Ms – Timeout value in millisecond.
srcClock_Hz – I2C functional clock frequency in Hertz.

static inline bool I2C_MasterGetBusIdleState(I2C_Type *base)

Returns whether the bus is idle.

Requires the master mode to be enabled.

Parameters:

base – The I2C peripheral base address.

Return values:

true – Bus is busy.
false – Bus is idle.

status_t I2C_MasterStart(I2C_Type *base, uint8_t address, i2c_direction_t direction)

Sends a START on the I2C bus.

This function is used to initiate a new master mode transfer by sending the START signal. The slave address is sent following the I2C START signal.

Parameters:

base – I2C peripheral base pointer
address – 7-bit slave device address.
direction – Master transfer directions(transmit/receive).

Return values:

kStatus_Success – Successfully send the start signal.
kStatus_I2C_Busy – Current bus is busy.

status_t I2C_MasterStop(I2C_Type *base)

Sends a STOP signal on the I2C bus.

Return values:

kStatus_Success – Successfully send the stop signal.
kStatus_I2C_Timeout – Send stop signal failed, timeout.

static inline status_t I2C_MasterRepeatedStart(I2C_Type *base, uint8_t address, i2c_direction_t direction)

Sends a REPEATED START on the I2C bus.

Parameters:

base – I2C peripheral base pointer
address – 7-bit slave device address.
direction – Master transfer directions(transmit/receive).

Return values:

kStatus_Success – Successfully send the start signal.
kStatus_I2C_Busy – Current bus is busy but not occupied by current I2C master.

status_t I2C_MasterWriteBlocking(I2C_Type *base, const void *txBuff, size_t txSize, uint32_t flags)

Performs a polling send transfer on the I2C bus.

Sends up to txSize number of bytes to the previously addressed slave device. The slave may reply with a NAK to any byte in order to terminate the transfer early. If this happens, this function returns kStatus_I2C_Nak.

Parameters:

base – The I2C peripheral base address.
txBuff – The pointer to the data to be transferred.
txSize – The length in bytes of the data to be transferred.
flags – Transfer control flag to control special behavior like suppressing start or stop, for normal transfers use kI2C_TransferDefaultFlag

Return values:

kStatus_Success – Data was sent successfully.
kStatus_I2C_Busy – Another master is currently utilizing the bus.
kStatus_I2C_Nak – The slave device sent a NAK in response to a byte.
kStatus_I2C_ArbitrationLost – Arbitration lost error.

status_t I2C_MasterReadBlocking(I2C_Type *base, void *rxBuff, size_t rxSize, uint32_t flags)

Performs a polling receive transfer on the I2C bus.

Parameters:

base – The I2C peripheral base address.
rxBuff – The pointer to the data to be transferred.
rxSize – The length in bytes of the data to be transferred.
flags – Transfer control flag to control special behavior like suppressing start or stop, for normal transfers use kI2C_TransferDefaultFlag

Return values:

kStatus_Success – Data was received successfully.
kStatus_I2C_Busy – Another master is currently utilizing the bus.
kStatus_I2C_Nak – The slave device sent a NAK in response to a byte.
kStatus_I2C_ArbitrationLost – Arbitration lost error.

status_t I2C_MasterTransferBlocking(I2C_Type *base, i2c_master_transfer_t *xfer)

Performs a master polling transfer on the I2C bus.

Note

The API does not return until the transfer succeeds or fails due to arbitration lost or receiving a NAK.

Parameters:

base – I2C peripheral base address.
xfer – Pointer to the transfer structure.

Return values:

kStatus_Success – Successfully complete the data transmission.
kStatus_I2C_Busy – Previous transmission still not finished.
kStatus_I2C_Timeout – Transfer error, wait signal timeout.
kStatus_I2C_ArbitrationLost – Transfer error, arbitration lost.
kStataus_I2C_Nak – Transfer error, receive NAK during transfer.
kStataus_I2C_Addr_Nak – Transfer error, receive NAK during addressing.

void I2C_MasterTransferCreateHandle(I2C_Type *base, i2c_master_handle_t *handle, i2c_master_transfer_callback_t callback, void *userData)

Creates a new handle for the I2C master non-blocking APIs.

The creation of a handle is for use with the non-blocking APIs. Once a handle is created, there is not a corresponding destroy handle. If the user wants to terminate a transfer, the I2C_MasterTransferAbort() API shall be called.

Parameters:

base – The I2C peripheral base address.
handle – [out] Pointer to the I2C master driver handle.
callback – User provided pointer to the asynchronous callback function.
userData – User provided pointer to the application callback data.

status_t I2C_MasterTransferNonBlocking(I2C_Type *base, i2c_master_handle_t *handle, i2c_master_transfer_t *xfer)

Performs a non-blocking transaction on the I2C bus.

Parameters:

base – The I2C peripheral base address.
handle – Pointer to the I2C master driver handle.
xfer – The pointer to the transfer descriptor.

Return values:

kStatus_Success – The transaction was started successfully.
kStatus_I2C_Busy – Either another master is currently utilizing the bus, or a non-blocking transaction is already in progress.

status_t I2C_MasterTransferGetCount(I2C_Type *base, i2c_master_handle_t *handle, size_t *count)

Returns number of bytes transferred so far.

Parameters:

base – The I2C peripheral base address.
handle – Pointer to the I2C master driver handle.
count – [out] Number of bytes transferred so far by the non-blocking transaction.

Return values:

kStatus_Success –
kStatus_I2C_Busy –

status_t I2C_MasterTransferAbort(I2C_Type *base, i2c_master_handle_t *handle)

Terminates a non-blocking I2C master transmission early.

Note

It is not safe to call this function from an IRQ handler that has a higher priority than the I2C peripheral’s IRQ priority.

Parameters:

base – The I2C peripheral base address.
handle – Pointer to the I2C master driver handle.

Return values:

kStatus_Success – A transaction was successfully aborted.
kStatus_I2C_Timeout – Timeout during polling for flags.

void I2C_MasterTransferHandleIRQ(I2C_Type *base, i2c_master_handle_t *handle)

Reusable routine to handle master interrupts.

Note

This function does not need to be called unless you are reimplementing the nonblocking API’s interrupt handler routines to add special functionality.

Parameters:

base – The I2C peripheral base address.
handle – Pointer to the I2C master driver handle.

enum _i2c_direction

Direction of master and slave transfers.

Values:

enumerator kI2C_Write: Master transmit.

enumerator kI2C_Read: Master receive.

enum _i2c_master_transfer_flags

Transfer option flags.

Note

These enumerations are intended to be OR’d together to form a bit mask of options for the _i2c_master_transfer::flags field.

Values:

enumerator kI2C_TransferDefaultFlag: Transfer starts with a start signal, stops with a stop signal.

enumerator kI2C_TransferNoStartFlag: Don’t send a start condition, address, and sub address

enumerator kI2C_TransferRepeatedStartFlag: Send a repeated start condition

enumerator kI2C_TransferNoStopFlag: Don’t send a stop condition.

enum _i2c_transfer_states

States for the state machine used by transactional APIs.

Values:

enumerator kIdleState

enumerator kTransmitSubaddrState

enumerator kTransmitDataState

enumerator kReceiveDataBeginState

enumerator kReceiveDataState

enumerator kReceiveLastDataState

enumerator kStartState

enumerator kStopState

enumerator kWaitForCompletionState

typedef enum _i2c_direction i2c_direction_t: Direction of master and slave transfers.

typedef struct _i2c_master_config i2c_master_config_t

Structure with settings to initialize the I2C master module.

This structure holds configuration settings for the I2C peripheral. To initialize this structure to reasonable defaults, call the I2C_MasterGetDefaultConfig() function and pass a pointer to your configuration structure instance.

The configuration structure can be made constant so it resides in flash.

typedef struct _i2c_master_transfer i2c_master_transfer_t: I2C master transfer typedef.

typedef struct _i2c_master_handle i2c_master_handle_t: I2C master handle typedef.

typedef void (*i2c_master_transfer_callback_t)(I2C_Type *base, i2c_master_handle_t *handle, status_t completionStatus, void *userData)

Master completion callback function pointer type.

This callback is used only for the non-blocking master transfer API. Specify the callback you wish to use in the call to I2C_MasterTransferCreateHandle().

Param base:: The I2C peripheral base address.
Param completionStatus:: Either kStatus_Success or an error code describing how the transfer completed.
Param userData:: Arbitrary pointer-sized value passed from the application.

struct _i2c_master_config

#include <fsl_i2c.h>

Structure with settings to initialize the I2C master module.

This structure holds configuration settings for the I2C peripheral. To initialize this structure to reasonable defaults, call the I2C_MasterGetDefaultConfig() function and pass a pointer to your configuration structure instance.

The configuration structure can be made constant so it resides in flash.

Public Members

bool enableMaster: Whether to enable master mode.

uint32_t baudRate_Bps: Desired baud rate in bits per second.

bool enableTimeout: Enable internal timeout function.

uint8_t timeout_Ms: Event timeout and SCL low timeout value.

struct _i2c_master_transfer

#include <fsl_i2c.h>

Non-blocking transfer descriptor structure.

This structure is used to pass transaction parameters to the I2C_MasterTransferNonBlocking() API.

Public Members

uint32_t flags: Bit mask of options for the transfer. See enumeration _i2c_master_transfer_flags for available options. Set to 0 or kI2C_TransferDefaultFlag for normal transfers.

uint8_t slaveAddress: The 7-bit slave address.

i2c_direction_t direction: Either kI2C_Read or kI2C_Write.

uint32_t subaddress: Sub address. Transferred MSB first.

size_t subaddressSize: Length of sub address to send in bytes. Maximum size is 4 bytes.

void *data: Pointer to data to transfer.

size_t dataSize: Number of bytes to transfer.

struct _i2c_master_handle

#include <fsl_i2c.h>

Driver handle for master non-blocking APIs.

Note

The contents of this structure are private and subject to change.

Public Members

uint8_t state: Transfer state machine current state.

uint32_t transferCount: Indicates progress of the transfer

uint32_t remainingBytes: Remaining byte count in current state.

uint8_t *buf: Buffer pointer for current state.

bool checkAddrNack: Whether to check the nack signal is detected during addressing.

i2c_master_transfer_t transfer: Copy of the current transfer info.

i2c_master_transfer_callback_t completionCallback: Callback function pointer.

void *userData: Application data passed to callback.

I2C Slave Driver

void I2C_SlaveGetDefaultConfig(i2c_slave_config_t *slaveConfig)

Provides a default configuration for the I2C slave peripheral.

This function provides the following default configuration for the I2C slave peripheral:

slaveConfig->enableSlave = true;
slaveConfig->address0.disable = false;
slaveConfig->address0.address = 0u;
slaveConfig->address1.disable = true;
slaveConfig->address2.disable = true;
slaveConfig->address3.disable = true;
slaveConfig->busSpeed = kI2C_SlaveStandardMode;

After calling this function, override any settings to customize the configuration, prior to initializing the master driver with I2C_SlaveInit(). Be sure to override at least the address0.address member of the configuration structure with the desired slave address.

Parameters:

slaveConfig – [out] User provided configuration structure that is set to default values. Refer to i2c_slave_config_t.

status_t I2C_SlaveInit(I2C_Type *base, const i2c_slave_config_t *slaveConfig, uint32_t srcClock_Hz)

Initializes the I2C slave peripheral.

This function enables the peripheral clock and initializes the I2C slave peripheral as described by the user provided configuration.

Parameters:

base – The I2C peripheral base address.
slaveConfig – User provided peripheral configuration. Use I2C_SlaveGetDefaultConfig() to get a set of defaults that you can override.
srcClock_Hz – Frequency in Hertz of the I2C functional clock. Used to calculate CLKDIV value to provide enough data setup time for master when slave stretches the clock.

void I2C_SlaveSetAddress(I2C_Type *base, i2c_slave_address_register_t addressRegister, uint8_t address, bool addressDisable)

Configures Slave Address n register.

This function writes new value to Slave Address register.

Parameters:

base – The I2C peripheral base address.
addressRegister – The module supports multiple address registers. The parameter determines which one shall be changed.
address – The slave address to be stored to the address register for matching.
addressDisable – Disable matching of the specified address register.

void I2C_SlaveDeinit(I2C_Type *base)

Deinitializes the I2C slave peripheral.

This function disables the I2C slave peripheral and gates the clock. It also performs a software reset to restore the peripheral to reset conditions.

Parameters:

base – The I2C peripheral base address.

static inline void I2C_SlaveEnable(I2C_Type *base, bool enable)

Enables or disables the I2C module as slave.

Parameters:

base – The I2C peripheral base address.
enable – True to enable or flase to disable.

static inline void I2C_SlaveClearStatusFlags(I2C_Type *base, uint32_t statusMask)

Clears the I2C status flag state.

The following status register flags can be cleared:

slave deselected flag

Attempts to clear other flags has no effect.

See also

_i2c_slave_flags.

Parameters:

base – The I2C peripheral base address.
statusMask – A bitmask of status flags that are to be cleared. The mask is composed of _i2c_slave_flags enumerators OR’d together. You may pass the result of a previous call to I2C_SlaveGetStatusFlags().

status_t I2C_SlaveWriteBlocking(I2C_Type *base, const uint8_t *txBuff, size_t txSize)

Performs a polling send transfer on the I2C bus.

The function executes blocking address phase and blocking data phase.

Parameters:

base – The I2C peripheral base address.
txBuff – The pointer to the data to be transferred.
txSize – The length in bytes of the data to be transferred.

Returns:

kStatus_Success Data has been sent.

Returns:

kStatus_Fail Unexpected slave state (master data write while master read from slave is expected).

status_t I2C_SlaveReadBlocking(I2C_Type *base, uint8_t *rxBuff, size_t rxSize)

Performs a polling receive transfer on the I2C bus.

The function executes blocking address phase and blocking data phase.

Parameters:

base – The I2C peripheral base address.
rxBuff – The pointer to the data to be transferred.
rxSize – The length in bytes of the data to be transferred.

Returns:

kStatus_Success Data has been received.

Returns:

kStatus_Fail Unexpected slave state (master data read while master write to slave is expected).

void I2C_SlaveTransferCreateHandle(I2C_Type *base, i2c_slave_handle_t *handle, i2c_slave_transfer_callback_t callback, void *userData)

Creates a new handle for the I2C slave non-blocking APIs.

The creation of a handle is for use with the non-blocking APIs. Once a handle is created, there is not a corresponding destroy handle. If the user wants to terminate a transfer, the I2C_SlaveTransferAbort() API shall be called.

Parameters:

base – The I2C peripheral base address.
handle – [out] Pointer to the I2C slave driver handle.
callback – User provided pointer to the asynchronous callback function.
userData – User provided pointer to the application callback data.

status_t I2C_SlaveTransferNonBlocking(I2C_Type *base, i2c_slave_handle_t *handle, uint32_t eventMask)

Starts accepting slave transfers.

Call this API after calling I2C_SlaveInit() and I2C_SlaveTransferCreateHandle() to start processing transactions driven by an I2C master. The slave monitors the I2C bus and pass events to the callback that was passed into the call to I2C_SlaveTransferCreateHandle(). The callback is always invoked from the interrupt context.

If no slave Tx transfer is busy, a master read from slave request invokes kI2C_SlaveTransmitEvent callback. If no slave Rx transfer is busy, a master write to slave request invokes kI2C_SlaveReceiveEvent callback.

The set of events received by the callback is customizable. To do so, set the eventMask parameter to the OR’d combination of i2c_slave_transfer_event_t enumerators for the events you wish to receive. The kI2C_SlaveTransmitEvent and kI2C_SlaveReceiveEvent events are always enabled and do not need to be included in the mask. Alternatively, you can pass 0 to get a default set of only the transmit and receive events that are always enabled. In addition, the kI2C_SlaveAllEvents constant is provided as a convenient way to enable all events.

Parameters:

base – The I2C peripheral base address.
handle – Pointer to i2c_slave_handle_t structure which stores the transfer state.
eventMask – Bit mask formed by OR’ing together i2c_slave_transfer_event_t enumerators to specify which events to send to the callback. Other accepted values are 0 to get a default set of only the transmit and receive events, and kI2C_SlaveAllEvents to enable all events.

Return values:

kStatus_Success – Slave transfers were successfully started.
kStatus_I2C_Busy – Slave transfers have already been started on this handle.

status_t I2C_SlaveSetSendBuffer(I2C_Type *base, volatile i2c_slave_transfer_t *transfer, const void *txData, size_t txSize, uint32_t eventMask)

Starts accepting master read from slave requests.

The function can be called in response to kI2C_SlaveTransmitEvent callback to start a new slave Tx transfer from within the transfer callback.

The set of events received by the callback is customizable. To do so, set the eventMask parameter to the OR’d combination of i2c_slave_transfer_event_t enumerators for the events you wish to receive. The kI2C_SlaveTransmitEvent and kI2C_SlaveReceiveEvent events are always enabled and do not need to be included in the mask. Alternatively, you can pass 0 to get a default set of only the transmit and receive events that are always enabled. In addition, the kI2C_SlaveAllEvents constant is provided as a convenient way to enable all events.

Parameters:

base – The I2C peripheral base address.
transfer – Pointer to i2c_slave_transfer_t structure.
txData – Pointer to data to send to master.
txSize – Size of txData in bytes.
eventMask – Bit mask formed by OR’ing together i2c_slave_transfer_event_t enumerators to specify which events to send to the callback. Other accepted values are 0 to get a default set of only the transmit and receive events, and kI2C_SlaveAllEvents to enable all events.

Return values:

kStatus_Success – Slave transfers were successfully started.
kStatus_I2C_Busy – Slave transfers have already been started on this handle.

status_t I2C_SlaveSetReceiveBuffer(I2C_Type *base, volatile i2c_slave_transfer_t *transfer, void *rxData, size_t rxSize, uint32_t eventMask)

Starts accepting master write to slave requests.

The function can be called in response to kI2C_SlaveReceiveEvent callback to start a new slave Rx transfer from within the transfer callback.

The set of events received by the callback is customizable. To do so, set the eventMask parameter to the OR’d combination of i2c_slave_transfer_event_t enumerators for the events you wish to receive. The kI2C_SlaveTransmitEvent and kI2C_SlaveReceiveEvent events are always enabled and do not need to be included in the mask. Alternatively, you can pass 0 to get a default set of only the transmit and receive events that are always enabled. In addition, the kI2C_SlaveAllEvents constant is provided as a convenient way to enable all events.

Parameters:

base – The I2C peripheral base address.
transfer – Pointer to i2c_slave_transfer_t structure.
rxData – Pointer to data to store data from master.
rxSize – Size of rxData in bytes.
eventMask – Bit mask formed by OR’ing together i2c_slave_transfer_event_t enumerators to specify which events to send to the callback. Other accepted values are 0 to get a default set of only the transmit and receive events, and kI2C_SlaveAllEvents to enable all events.

Return values:

kStatus_Success – Slave transfers were successfully started.
kStatus_I2C_Busy – Slave transfers have already been started on this handle.

static inline uint32_t I2C_SlaveGetReceivedAddress(I2C_Type *base, volatile i2c_slave_transfer_t *transfer)

Returns the slave address sent by the I2C master.

This function should only be called from the address match event callback kI2C_SlaveAddressMatchEvent.

Parameters:

base – The I2C peripheral base address.
transfer – The I2C slave transfer.

Returns:

The 8-bit address matched by the I2C slave. Bit 0 contains the R/w direction bit, and the 7-bit slave address is in the upper 7 bits.

void I2C_SlaveTransferAbort(I2C_Type *base, i2c_slave_handle_t *handle)

Aborts the slave non-blocking transfers.

Note

This API could be called at any time to stop slave for handling the bus events.

Parameters:

base – The I2C peripheral base address.
handle – Pointer to i2c_slave_handle_t structure which stores the transfer state.

Return values:

kStatus_Success –
kStatus_I2C_Idle –

status_t I2C_SlaveTransferGetCount(I2C_Type *base, i2c_slave_handle_t *handle, size_t *count)

Gets the slave transfer remaining bytes during a interrupt non-blocking transfer.

Parameters:

base – I2C base pointer.
handle – pointer to i2c_slave_handle_t structure.
count – Number of bytes transferred so far by the non-blocking transaction.

Return values:

kStatus_InvalidArgument – count is Invalid.
kStatus_Success – Successfully return the count.

void I2C_SlaveTransferHandleIRQ(I2C_Type *base, i2c_slave_handle_t *handle)

Reusable routine to handle slave interrupts.

Note

This function does not need to be called unless you are reimplementing the non blocking API’s interrupt handler routines to add special functionality.

Parameters:

base – The I2C peripheral base address.
handle – Pointer to i2c_slave_handle_t structure which stores the transfer state.

enum _i2c_slave_address_register

I2C slave address register.

Values:

enumerator kI2C_SlaveAddressRegister0: Slave Address 0 register.

enumerator kI2C_SlaveAddressRegister1: Slave Address 1 register.

enumerator kI2C_SlaveAddressRegister2: Slave Address 2 register.

enumerator kI2C_SlaveAddressRegister3: Slave Address 3 register.

enum _i2c_slave_address_qual_mode

I2C slave address match options.

Values:

enumerator kI2C_QualModeMask: The SLVQUAL0 field (qualAddress) is used as a logical mask for matching address0.

enumerator kI2C_QualModeExtend: The SLVQUAL0 (qualAddress) field is used to extend address 0 matching in a range of addresses.

enum _i2c_slave_bus_speed

I2C slave bus speed options.

Values:

enumerator kI2C_SlaveStandardMode

enumerator kI2C_SlaveFastMode

enumerator kI2C_SlaveFastModePlus

enumerator kI2C_SlaveHsMode

enum _i2c_slave_transfer_event

Set of events sent to the callback for non blocking slave transfers.

These event enumerations are used for two related purposes. First, a bit mask created by OR’ing together events is passed to I2C_SlaveTransferNonBlocking() in order to specify which events to enable. Then, when the slave callback is invoked, it is passed the current event through its transfer parameter.

Note

These enumerations are meant to be OR’d together to form a bit mask of events.

Values:

enumerator kI2C_SlaveAddressMatchEvent: Received the slave address after a start or repeated start.

enumerator kI2C_SlaveTransmitEvent: Callback is requested to provide data to transmit (slave-transmitter role).

enumerator kI2C_SlaveReceiveEvent: Callback is requested to provide a buffer in which to place received data (slave-receiver role).

enumerator kI2C_SlaveCompletionEvent: All data in the active transfer have been consumed.

enumerator kI2C_SlaveDeselectedEvent: The slave function has become deselected (SLVSEL flag changing from 1 to 0.

enumerator kI2C_SlaveAllEvents: Bit mask of all available events.

enum _i2c_slave_fsm

I2C slave software finite state machine states.

Values:

enumerator kI2C_SlaveFsmAddressMatch

enumerator kI2C_SlaveFsmReceive

enumerator kI2C_SlaveFsmTransmit

typedef enum _i2c_slave_address_register i2c_slave_address_register_t: I2C slave address register.

typedef struct _i2c_slave_address i2c_slave_address_t: Data structure with 7-bit Slave address and Slave address disable.

typedef enum _i2c_slave_address_qual_mode i2c_slave_address_qual_mode_t: I2C slave address match options.

typedef enum _i2c_slave_bus_speed i2c_slave_bus_speed_t: I2C slave bus speed options.

typedef struct _i2c_slave_config i2c_slave_config_t

Structure with settings to initialize the I2C slave module.

This structure holds configuration settings for the I2C slave peripheral. To initialize this structure to reasonable defaults, call the I2C_SlaveGetDefaultConfig() function and pass a pointer to your configuration structure instance.

The configuration structure can be made constant so it resides in flash.

typedef enum _i2c_slave_transfer_event i2c_slave_transfer_event_t

Set of events sent to the callback for non blocking slave transfers.

These event enumerations are used for two related purposes. First, a bit mask created by OR’ing together events is passed to I2C_SlaveTransferNonBlocking() in order to specify which events to enable. Then, when the slave callback is invoked, it is passed the current event through its transfer parameter.

Note

These enumerations are meant to be OR’d together to form a bit mask of events.

typedef struct _i2c_slave_handle i2c_slave_handle_t: I2C slave handle typedef.

typedef struct _i2c_slave_transfer i2c_slave_transfer_t: I2C slave transfer structure.

typedef void (*i2c_slave_transfer_callback_t)(I2C_Type *base, volatile i2c_slave_transfer_t *transfer, void *userData)

Slave event callback function pointer type.

This callback is used only for the slave non-blocking transfer API. To install a callback, use the I2C_SlaveSetCallback() function after you have created a handle.

Param base:: Base address for the I2C instance on which the event occurred.
Param transfer:: Pointer to transfer descriptor containing values passed to and/or from the callback.
Param userData:: Arbitrary pointer-sized value passed from the application.

typedef enum _i2c_slave_fsm i2c_slave_fsm_t: I2C slave software finite state machine states.

typedef void (*flexcomm_i2c_master_irq_handler_t)(I2C_Type *base, i2c_master_handle_t *handle): Typedef for master interrupt handler.

typedef void (*flexcomm_i2c_slave_irq_handler_t)(I2C_Type *base, i2c_slave_handle_t *handle): Typedef for slave interrupt handler.

struct _i2c_slave_address

#include <fsl_i2c.h>

Data structure with 7-bit Slave address and Slave address disable.

Public Members

uint8_t address: 7-bit Slave address SLVADR.

bool addressDisable: Slave address disable SADISABLE.

struct _i2c_slave_config

#include <fsl_i2c.h>

Structure with settings to initialize the I2C slave module.

This structure holds configuration settings for the I2C slave peripheral. To initialize this structure to reasonable defaults, call the I2C_SlaveGetDefaultConfig() function and pass a pointer to your configuration structure instance.

The configuration structure can be made constant so it resides in flash.

Public Members

i2c_slave_address_t address0: Slave’s 7-bit address and disable.

i2c_slave_address_t address1: Alternate slave 7-bit address and disable.

i2c_slave_address_t address2: Alternate slave 7-bit address and disable.

i2c_slave_address_t address3: Alternate slave 7-bit address and disable.

i2c_slave_address_qual_mode_t qualMode: Qualify mode for slave address 0.

uint8_t qualAddress: Slave address qualifier for address 0.

i2c_slave_bus_speed_t busSpeed: Slave bus speed mode. If the slave function stretches SCL to allow for software response, it must provide sufficient data setup time to the master before releasing the stretched clock. This is accomplished by inserting one clock time of CLKDIV at that point. The busSpeed value is used to configure CLKDIV such that one clock time is greater than the tSU;DAT value noted in the I2C bus specification for the I2C mode that is being used. If the busSpeed mode is unknown at compile time, use the longest data setup time kI2C_SlaveStandardMode (250 ns)

bool enableSlave: Enable slave mode.

struct _i2c_slave_transfer

#include <fsl_i2c.h>

I2C slave transfer structure.

Public Members

i2c_slave_handle_t *handle: Pointer to handle that contains this transfer.

i2c_slave_transfer_event_t event: Reason the callback is being invoked.

uint8_t receivedAddress: Matching address send by master. 7-bits plus R/nW bit0

uint32_t eventMask: Mask of enabled events.

uint8_t *rxData: Transfer buffer for receive data

const uint8_t *txData: Transfer buffer for transmit data

size_t txSize: Transfer size

size_t rxSize: Transfer size

size_t transferredCount: Number of bytes transferred during this transfer.

status_t completionStatus: Success or error code describing how the transfer completed. Only applies for kI2C_SlaveCompletionEvent.

struct _i2c_slave_handle

#include <fsl_i2c.h>

I2C slave handle structure.

Note

The contents of this structure are private and subject to change.

Public Members

volatile i2c_slave_transfer_t transfer: I2C slave transfer.

volatile bool isBusy: Whether transfer is busy.

volatile i2c_slave_fsm_t slaveFsm: slave transfer state machine.

i2c_slave_transfer_callback_t callback: Callback function called at transfer event.

void *userData: Callback parameter passed to callback.

I2S: I2S Driver

I2S_BRIDGE: I2S bridging and signal sharing configuration

enum _i2s_bridge_share_set_index

I2S Bridge share set.

Values:

enumerator kI2S_BRIDGE_OriginalSignal: Original FLEXCOMM I2S signals

enumerator kI2S_BRIDGE_ShareSet0: share set 0 signals

enumerator kI2S_BRIDGE_ShareSet1: share set 1 signals

enum _i2s_bridge_signal

I2S signal.

Values:

enumerator kI2S_BRIDGE_SignalSCK: SCK signal

enumerator kI2S_BRIDGE_SignalWS: WS signal

enumerator kI2S_BRIDGE_SignalDataIn: Data in signal

enumerator kI2S_BRIDGE_SignalDataOut: Data out signal

enum _i2s_bridge_share_src

I2S signal source.

Values:

enumerator kI2S_BRIDGE_Flexcomm0: Shared signal comes from FLEXCOMM0

enumerator kI2S_BRIDGE_Flexcomm1: Shared signal comes from FLEXCOMM1

enumerator kI2S_BRIDGE_Flexcomm2: Shared signal comes from FLEXCOMM2

enumerator kI2S_BRIDGE_Flexcomm3: Shared signal comes from FLEXCOMM3

enum _i2s_bridge_dataout_mask

I2S Bridge shared data out mask.

Values:

enumerator kI2S_BRIDGE_Flexcomm0DataOut: FLEXCOMM0 DATAOUT Output Enable

enumerator kI2S_BRIDGE_Flexcomm1DataOut: FLEXCOMM1 DATAOUT Output Enable

enumerator kI2S_BRIDGE_Flexcomm2DataOut: FLEXCOMM2 DATAOUT Output Enable

enumerator kI2S_BRIDGE_Flexcomm3DataOut: FLEXCOMM3 DATAOUT Output Enable

typedef enum _i2s_bridge_signal i2s_bridge_signal_t: I2S signal.

FSL_I2S_BRIDGE_DRIVER_VERSION

Group I2S Bridge driver version for SDK.

Version 2.0.0.

void I2S_BRIDGE_SetFlexcommShareSet(uint32_t flexCommIndex, uint32_t sckSet, uint32_t wsSet, uint32_t dataInSet, uint32_t dataOutSet)

I2S Bridge share set selection for flexcomm instance.

Parameters:

flexCommIndex – index of flexcomm, refer to RM for supported FLEXCOMM instances.
sckSet – share set for sck, refer to _i2s_bridge_share_set_index
wsSet – share set for ws, refer to _i2s_bridge_share_set_index
dataInSet – share set for data in, refer to _i2s_bridge_share_set_index
dataOutSet – share set for data out, refer to _i2s_bridge_share_set_index

void I2S_BRIDGE_SetFlexcommSignalShareSet(uint32_t flexCommIndex, i2s_bridge_signal_t signal, uint32_t set)

I2S Bridge share set selection for a separate signal.

Parameters:

flexCommIndex – index of flexcomm, refer to RM for supported FLEXCOMM instances.
signal – The signal need to be configured.
set – share set for the signal, refer to _i2s_bridge_share_set_index

void I2S_BRIDGE_SetShareSetSrc(uint32_t setIndex, uint32_t sckShareSrc, uint32_t wsShareSrc, uint32_t dataInShareSrc, uint32_t dataOutShareSrc)

I2S Bridge share set source configure.

Parameters:

setIndex – index of share set, refer _i2s_bridge_share_set_index
sckShareSrc – sck source for this share set, refer to _i2s_bridge_share_src
wsShareSrc – ws source for this share set, refer to _i2s_bridge_share_src
dataInShareSrc – data in source for this share set, refer to _i2s_bridge_share_src
dataOutShareSrc – data out source for this share set, refer to _i2s_bridge_dataout_mask

void I2S_BRIDGE_SetShareSignalSrc(uint32_t setIndex, i2s_bridge_signal_t signal, uint32_t shareSrc)

I2S Bridge shared signal source selection for a share set.

Parameters:

setIndex – index of share set, refer to _i2s_bridge_share_set_index
signal – the shared signal to be configured
shareSrc – the signal selection, refer to _i2s_bridge_share_src.

I2S DMA Driver

void I2S_TxTransferCreateHandleDMA(I2S_Type *base, i2s_dma_handle_t *handle, dma_handle_t *dmaHandle, i2s_dma_transfer_callback_t callback, void *userData)

Initializes handle for transfer of audio data.

Parameters:

base – I2S base pointer.
handle – pointer to handle structure.
dmaHandle – pointer to dma handle structure.
callback – function to be called back when transfer is done or fails.
userData – pointer to data passed to callback.

status_t I2S_TxTransferSendDMA(I2S_Type *base, i2s_dma_handle_t *handle, i2s_transfer_t transfer)

Begins or queue sending of the given data.

Parameters:

base – I2S base pointer.
handle – pointer to handle structure.
transfer – data buffer.

Return values:

kStatus_Success –
kStatus_I2S_Busy – if all queue slots are occupied with unsent buffers.

void I2S_TransferAbortDMA(I2S_Type *base, i2s_dma_handle_t *handle)

Aborts transfer of data.

Parameters:

base – I2S base pointer.
handle – pointer to handle structure.

void I2S_RxTransferCreateHandleDMA(I2S_Type *base, i2s_dma_handle_t *handle, dma_handle_t *dmaHandle, i2s_dma_transfer_callback_t callback, void *userData)

Initializes handle for reception of audio data.

Parameters:

base – I2S base pointer.
handle – pointer to handle structure.
dmaHandle – pointer to dma handle structure.
callback – function to be called back when transfer is done or fails.
userData – pointer to data passed to callback.

status_t I2S_RxTransferReceiveDMA(I2S_Type *base, i2s_dma_handle_t *handle, i2s_transfer_t transfer)

Begins or queue reception of data into given buffer.

Parameters:

base – I2S base pointer.
handle – pointer to handle structure.
transfer – data buffer.

Return values:

kStatus_Success –
kStatus_I2S_Busy – if all queue slots are occupied with buffers which are not full.

void I2S_DMACallback(dma_handle_t *handle, void *userData, bool transferDone, uint32_t tcds)

Invoked from DMA interrupt handler.

Parameters:

handle – pointer to DMA handle structure.
userData – argument for user callback.
transferDone – if transfer was done.
tcds –

void I2S_TransferInstallLoopDMADescriptorMemory(i2s_dma_handle_t *handle, void *dmaDescriptorAddr, size_t dmaDescriptorNum)

Install DMA descriptor memory for loop transfer only.

This function used to register DMA descriptor memory for the i2s loop dma transfer.

It must be callbed before I2S_TransferSendLoopDMA/I2S_TransferReceiveLoopDMA and after I2S_RxTransferCreateHandleDMA/I2S_TxTransferCreateHandleDMA.

User should be take care about the address of DMA descriptor pool which required align with 16BYTE at least.

Parameters:

handle – Pointer to i2s DMA transfer handle.
dmaDescriptorAddr – DMA descriptor start address.
dmaDescriptorNum – DMA descriptor number.

status_t I2S_TransferSendLoopDMA(I2S_Type *base, i2s_dma_handle_t *handle, i2s_transfer_t *xfer, uint32_t loopTransferCount)

Send link transfer data using DMA.

This function receives data using DMA. This is a non-blocking function, which returns right away. When all data is received, the receive callback function is called.

This function support loop transfer, such as A->B->…->A, the loop transfer chain will be converted into a chain of descriptor and submit to dma. Application must be aware of that the more counts of the loop transfer, then more DMA descriptor memory required, user can use function I2S_InstallDMADescriptorMemory to register the dma descriptor memory.

As the DMA support maximum 1024 transfer count, so application must be aware of that this transfer function support maximum 1024 samples in each transfer, otherwise assert error or error status will be returned. Once the loop transfer start, application can use function I2S_TransferAbortDMA to stop the loop transfer.

Parameters:

base – I2S peripheral base address.
handle – Pointer to usart_dma_handle_t structure.
xfer – I2S DMA transfer structure. See i2s_transfer_t.
loopTransferCount – loop count

Return values:

kStatus_Success –

status_t I2S_TransferReceiveLoopDMA(I2S_Type *base, i2s_dma_handle_t *handle, i2s_transfer_t *xfer, uint32_t loopTransferCount)

Receive link transfer data using DMA.

This function receives data using DMA. This is a non-blocking function, which returns right away. When all data is received, the receive callback function is called.

This function support loop transfer, such as A->B->…->A, the loop transfer chain will be converted into a chain of descriptor and submit to dma. Application must be aware of that the more counts of the loop transfer, then more DMA descriptor memory required, user can use function I2S_InstallDMADescriptorMemory to register the dma descriptor memory.

As the DMA support maximum 1024 transfer count, so application must be aware of that this transfer function support maximum 1024 samples in each transfer, otherwise assert error or error status will be returned. Once the loop transfer start, application can use function I2S_TransferAbortDMA to stop the loop transfer.

Parameters:

base – I2S peripheral base address.
handle – Pointer to usart_dma_handle_t structure.
xfer – I2S DMA transfer structure. See i2s_transfer_t.
loopTransferCount – loop count

Return values:

kStatus_Success –

FSL_I2S_DMA_DRIVER_VERSION: I2S DMA driver version 2.3.3.

typedef struct _i2s_dma_handle i2s_dma_handle_t: Members not to be accessed / modified outside of the driver.

typedef void (*i2s_dma_transfer_callback_t)(I2S_Type *base, i2s_dma_handle_t *handle, status_t completionStatus, void *userData)

Callback function invoked from DMA API on completion.

Param base:: I2S base pointer.
Param handle:: pointer to I2S transaction.
Param completionStatus:: status of the transaction.
Param userData:: optional pointer to user arguments data.

struct _i2s_dma_handle

#include <fsl_i2s_dma.h>

i2s dma handle

Public Members

uint32_t state: Internal state of I2S DMA transfer

uint8_t bytesPerFrame: bytes per frame

i2s_dma_transfer_callback_t completionCallback: Callback function pointer

void *userData: Application data passed to callback

dma_handle_t *dmaHandle: DMA handle

volatile i2s_transfer_t i2sQueue[(4U)]: Transfer queue storing transfer buffers

volatile uint8_t queueUser: Queue index where user’s next transfer will be stored

volatile uint8_t queueDriver: Queue index of buffer actually used by the driver

dma_descriptor_t *i2sLoopDMADescriptor: descriptor pool pointer

size_t i2sLoopDMADescriptorNum: number of descriptor in descriptors pool

I2S Driver

void I2S_TxInit(I2S_Type *base, const i2s_config_t *config)

Initializes the FLEXCOMM peripheral for I2S transmit functionality.

Ungates the FLEXCOMM clock and configures the module for I2S transmission using a configuration structure. The configuration structure can be custom filled or set with default values by I2S_TxGetDefaultConfig().

Note

This API should be called at the beginning of the application to use the I2S driver.

Parameters:

base – I2S base pointer.
config – pointer to I2S configuration structure.

void I2S_RxInit(I2S_Type *base, const i2s_config_t *config)

Initializes the FLEXCOMM peripheral for I2S receive functionality.

Ungates the FLEXCOMM clock and configures the module for I2S receive using a configuration structure. The configuration structure can be custom filled or set with default values by I2S_RxGetDefaultConfig().

Note

This API should be called at the beginning of the application to use the I2S driver.

Parameters:

base – I2S base pointer.
config – pointer to I2S configuration structure.

void I2S_TxGetDefaultConfig(i2s_config_t *config)

Sets the I2S Tx configuration structure to default values.

This API initializes the configuration structure for use in I2S_TxInit(). The initialized structure can remain unchanged in I2S_TxInit(), or it can be modified before calling I2S_TxInit(). Example:

i2s_config_t config;
I2S_TxGetDefaultConfig(&config);

Default values:

config->masterSlave = kI2S_MasterSlaveNormalMaster;
config->mode = kI2S_ModeI2sClassic;
config->rightLow = false;
config->leftJust = false;
config->pdmData = false;
config->sckPol = false;
config->wsPol = false;
config->divider = 1;
config->oneChannel = false;
config->dataLength = 16;
config->frameLength = 32;
config->position = 0;
config->watermark = 4;
config->txEmptyZero = true;
config->pack48 = false;

Parameters:

config – pointer to I2S configuration structure.

void I2S_RxGetDefaultConfig(i2s_config_t *config)

Sets the I2S Rx configuration structure to default values.

This API initializes the configuration structure for use in I2S_RxInit(). The initialized structure can remain unchanged in I2S_RxInit(), or it can be modified before calling I2S_RxInit(). Example:

i2s_config_t config;
I2S_RxGetDefaultConfig(&config);

Default values:

config->masterSlave = kI2S_MasterSlaveNormalSlave;
config->mode = kI2S_ModeI2sClassic;
config->rightLow = false;
config->leftJust = false;
config->pdmData = false;
config->sckPol = false;
config->wsPol = false;
config->divider = 1;
config->oneChannel = false;
config->dataLength = 16;
config->frameLength = 32;
config->position = 0;
config->watermark = 4;
config->txEmptyZero = false;
config->pack48 = false;

Parameters:

config – pointer to I2S configuration structure.

void I2S_Deinit(I2S_Type *base)

De-initializes the I2S peripheral.

This API gates the FLEXCOMM clock. The I2S module can’t operate unless I2S_TxInit or I2S_RxInit is called to enable the clock.

Parameters:

base – I2S base pointer.

void I2S_SetBitClockRate(I2S_Type *base, uint32_t sourceClockHz, uint32_t sampleRate, uint32_t bitWidth, uint32_t channelNumbers)

Transmitter/Receiver bit clock rate configurations.

Parameters:

base – SAI base pointer.
sourceClockHz – bit clock source frequency.
sampleRate – audio data sample rate.
bitWidth – audio data bitWidth.
channelNumbers – audio channel numbers.

void I2S_TxTransferCreateHandle(I2S_Type *base, i2s_handle_t *handle, i2s_transfer_callback_t callback, void *userData)

Initializes handle for transfer of audio data.

Parameters:

base – I2S base pointer.
handle – pointer to handle structure.
callback – function to be called back when transfer is done or fails.
userData – pointer to data passed to callback.

status_t I2S_TxTransferNonBlocking(I2S_Type *base, i2s_handle_t *handle, i2s_transfer_t transfer)

Begins or queue sending of the given data.

Parameters:

base – I2S base pointer.
handle – pointer to handle structure.
transfer – data buffer.

Return values:

kStatus_Success –
kStatus_I2S_Busy – if all queue slots are occupied with unsent buffers.

void I2S_TxTransferAbort(I2S_Type *base, i2s_handle_t *handle)

Aborts sending of data.

Parameters:

base – I2S base pointer.
handle – pointer to handle structure.

void I2S_RxTransferCreateHandle(I2S_Type *base, i2s_handle_t *handle, i2s_transfer_callback_t callback, void *userData)

Initializes handle for reception of audio data.

Parameters:

base – I2S base pointer.
handle – pointer to handle structure.
callback – function to be called back when transfer is done or fails.
userData – pointer to data passed to callback.

status_t I2S_RxTransferNonBlocking(I2S_Type *base, i2s_handle_t *handle, i2s_transfer_t transfer)

Begins or queue reception of data into given buffer.

Parameters:

base – I2S base pointer.
handle – pointer to handle structure.
transfer – data buffer.

Return values:

kStatus_Success –
kStatus_I2S_Busy – if all queue slots are occupied with buffers which are not full.

void I2S_RxTransferAbort(I2S_Type *base, i2s_handle_t *handle)

Aborts receiving of data.

Parameters:

base – I2S base pointer.
handle – pointer to handle structure.

status_t I2S_TransferGetCount(I2S_Type *base, i2s_handle_t *handle, size_t *count)

Returns number of bytes transferred so far.

Parameters:

base – I2S base pointer.
handle – pointer to handle structure.
count – [out] number of bytes transferred so far by the non-blocking transaction.

Return values:

kStatus_Success –
kStatus_NoTransferInProgress – there is no non-blocking transaction currently in progress.

status_t I2S_TransferGetErrorCount(I2S_Type *base, i2s_handle_t *handle, size_t *count)

Returns number of buffer underruns or overruns.

Parameters:

base – I2S base pointer.
handle – pointer to handle structure.
count – [out] number of transmit errors encountered so far by the non-blocking transaction.

Return values:

kStatus_Success –
kStatus_NoTransferInProgress – there is no non-blocking transaction currently in progress.

static inline void I2S_Enable(I2S_Type *base)

Enables I2S operation.

Parameters:

base – I2S base pointer.

void I2S_EnableSecondaryChannel(I2S_Type *base, uint32_t channel, bool oneChannel, uint32_t position)

Enables I2S secondary channel.

Parameters:

base – I2S base pointer.
channel – seondary channel channel number, reference _i2s_secondary_channel.
oneChannel – true is treated as single channel, functionality left channel for this pair.
position – define the location within the frame of the data, should not bigger than 0x1FFU.

static inline void I2S_DisableSecondaryChannel(I2S_Type *base, uint32_t channel)

Disables I2S secondary channel.

Parameters:

base – I2S base pointer.
channel – seondary channel channel number, reference _i2s_secondary_channel.

static inline void I2S_Disable(I2S_Type *base)

Disables I2S operation.

Parameters:

base – I2S base pointer.

static inline void I2S_EnableInterrupts(I2S_Type *base, uint32_t interruptMask)

Enables I2S FIFO interrupts.

Parameters:

base – I2S base pointer.
interruptMask – bit mask of interrupts to enable. See i2s_flags_t for the set of constants that should be OR’d together to form the bit mask.

static inline void I2S_DisableInterrupts(I2S_Type *base, uint32_t interruptMask)

Disables I2S FIFO interrupts.

Parameters:

base – I2S base pointer.
interruptMask – bit mask of interrupts to enable. See i2s_flags_t for the set of constants that should be OR’d together to form the bit mask.

static inline uint32_t I2S_GetEnabledInterrupts(I2S_Type *base)

Returns the set of currently enabled I2S FIFO interrupts.

Parameters:

base – I2S base pointer.

Returns:

A bitmask composed of i2s_flags_t enumerators OR’d together to indicate the set of enabled interrupts.

status_t I2S_EmptyTxFifo(I2S_Type *base)

Flush the valid data in TX fifo.

Parameters:

base – I2S base pointer.

Returns:

kStatus_Fail empty TX fifo failed, kStatus_Success empty tx fifo success.

void I2S_TxHandleIRQ(I2S_Type *base, i2s_handle_t *handle)

Invoked from interrupt handler when transmit FIFO level decreases.

Parameters:

base – I2S base pointer.
handle – pointer to handle structure.

void I2S_RxHandleIRQ(I2S_Type *base, i2s_handle_t *handle)

Invoked from interrupt handler when receive FIFO level decreases.

Parameters:

base – I2S base pointer.
handle – pointer to handle structure.

FSL_I2S_DRIVER_VERSION: I2S driver version 2.3.2.

_i2s_status I2S status codes.

Values:

enumerator kStatus_I2S_BufferComplete: Transfer from/into a single buffer has completed

enumerator kStatus_I2S_Done: All buffers transfers have completed

enumerator kStatus_I2S_Busy: Already performing a transfer and cannot queue another buffer

enum _i2s_flags

I2S flags.

Note

These enums are meant to be OR’d together to form a bit mask.

Values:

enumerator kI2S_TxErrorFlag: TX error interrupt

enumerator kI2S_TxLevelFlag: TX level interrupt

enumerator kI2S_RxErrorFlag: RX error interrupt

enumerator kI2S_RxLevelFlag: RX level interrupt

enum _i2s_master_slave

Master / slave mode.

Values:

enumerator kI2S_MasterSlaveNormalSlave: Normal slave

enumerator kI2S_MasterSlaveWsSyncMaster: WS synchronized master

enumerator kI2S_MasterSlaveExtSckMaster: Master using existing SCK

enumerator kI2S_MasterSlaveNormalMaster: Normal master

enum _i2s_mode

I2S mode.

Values:

enumerator kI2S_ModeI2sClassic: I2S classic mode

enumerator kI2S_ModeDspWs50: DSP mode, WS having 50% duty cycle

enumerator kI2S_ModeDspWsShort: DSP mode, WS having one clock long pulse

enumerator kI2S_ModeDspWsLong: DSP mode, WS having one data slot long pulse

_i2s_secondary_channel I2S secondary channel.

Values:

enumerator kI2S_SecondaryChannel1: secondary channel 1

enumerator kI2S_SecondaryChannel2: secondary channel 2

enumerator kI2S_SecondaryChannel3: secondary channel 3

typedef enum _i2s_flags i2s_flags_t: I2S flags.

Note

These enums are meant to be OR’d together to form a bit mask.

typedef enum _i2s_master_slave i2s_master_slave_t: Master / slave mode.

typedef enum _i2s_mode i2s_mode_t: I2S mode.

typedef struct _i2s_config i2s_config_t: I2S configuration structure.

typedef struct _i2s_transfer i2s_transfer_t: Buffer to transfer from or receive audio data into.

typedef struct _i2s_handle i2s_handle_t: Transactional state of the intialized transfer or receive I2S operation.

typedef void (*i2s_transfer_callback_t)(I2S_Type *base, i2s_handle_t *handle, status_t completionStatus, void *userData)

Callback function invoked from transactional API on completion of a single buffer transfer.

Param base:: I2S base pointer.
Param handle:: pointer to I2S transaction.
Param completionStatus:: status of the transaction.
Param userData:: optional pointer to user arguments data.

I2S_NUM_BUFFERS: Number of buffers .

struct _i2s_config

#include <fsl_i2s.h>

I2S configuration structure.

Public Members

i2s_master_slave_t masterSlave: Master / slave configuration

i2s_mode_t mode: I2S mode

bool rightLow: Right channel data in low portion of FIFO

bool leftJust: Left justify data in FIFO

bool pdmData: Data source is the D-Mic subsystem

bool sckPol: SCK polarity

bool wsPol: WS polarity

uint16_t divider: Flexcomm function clock divider (1 - 4096)

bool oneChannel: true mono, false stereo

uint8_t dataLength: Data length (4 - 32)

uint16_t frameLength: Frame width (4 - 512)

uint16_t position: Data position in the frame

uint8_t watermark: FIFO trigger level

bool txEmptyZero: Transmit zero when buffer becomes empty or last item

bool pack48: Packing format for 48-bit data (false - 24 bit values, true - alternating 32-bit and 16-bit values)

struct _i2s_transfer

#include <fsl_i2s.h>

Buffer to transfer from or receive audio data into.

Public Members

uint8_t *data: Pointer to data buffer.

size_t dataSize: Buffer size in bytes.

struct _i2s_handle

#include <fsl_i2s.h>

Members not to be accessed / modified outside of the driver.

Public Members

volatile uint32_t state: State of transfer

i2s_transfer_callback_t completionCallback: Callback function pointer

void *userData: Application data passed to callback

bool oneChannel: true mono, false stereo

uint8_t dataLength: Data length (4 - 32)

bool pack48: Packing format for 48-bit data (false - 24 bit values, true - alternating 32-bit and 16-bit values)

uint8_t watermark: FIFO trigger level

bool useFifo48H: When dataLength 17-24: true use FIFOWR48H, false use FIFOWR

volatile i2s_transfer_t i2sQueue[(4U)]: Transfer queue storing transfer buffers

volatile uint8_t queueUser: Queue index where user’s next transfer will be stored

volatile uint8_t queueDriver: Queue index of buffer actually used by the driver

volatile uint32_t errorCount: Number of buffer underruns/overruns

volatile uint32_t transferCount: Number of bytes transferred

IMU: Inter CPU Messaging Unit

status_t IMU_Init(imu_link_t link)

Initializes the IMU module.

This function sets IMU to initialized state, including:

Flush the send FIFO.
Unlock the send FIFO.
Set the water mark to (IMU_MAX_MSG_FIFO_WATER_MARK)
Flush the read FIFO.

Parameters:

link – IMU link.

Return values:

kStatus_InvalidArgument – The link is invalid.
kStatus_Success – Initialized successfully.

void IMU_Deinit(imu_link_t link)

De-initializes the IMU module.

Parameters:

link – IMU link.

static inline void IMU_WriteMsg(imu_link_t link, uint32_t msg)

Write one message to TX FIFO.

This function writes message to the TX FIFO, user need to make sure there is empty space in the TX FIFO, and TX FIFO not locked before calling this function.

Parameters:

link – IMU link.
msg – The message to send.

static inline uint32_t IMU_ReadMsg(imu_link_t link)

Read one message from RX FIFO.

User need to make sure there is available message in the RX FIFO.

Parameters:

link – IMU link.

Returns:

The message.

int32_t IMU_SendMsgsBlocking(imu_link_t link, const uint32_t *msgs, int32_t msgCount, bool lockSendFifo)

Blocking to send messages.

This function blocks until all messages have been filled to TX FIFO.

If the TX FIFO is locked, this function returns IMU_ERR_TX_FIFO_LOCKED.
If TX FIFO not locked, this function waits the available empty slot in TX FIFO, and fills the message to TX FIFO.
To lock TX FIFO after filling all messages, set lockSendFifo to true.

Parameters:

link – IMU link.
msgs – The messages to send.
msgCount – Message count, one message is a 32-bit word.
lockSendFifo – If set to true, the TX FIFO is locked after all messages filled to TX FIFO.

Returns:

If TX FIFO is locked, this function returns IMU_ERR_TX_FIFO_LOCKED, otherwise, this function returns the actual message count sent out, it equals msgCount because this function is blocking function, it returns until all messages have been filled into TX FIFO.

int32_t IMU_TrySendMsgs(imu_link_t link, const uint32_t *msgs, int32_t msgCount, bool lockSendFifo)

Try to send messages.

This function is similar with IMU_SendMsgsBlocking, the difference is, this function tries to send as many as possible, if there is not enough empty slot in TX FIFO, this function fills messages to available empty slots and returns how many messages have been filled.

If the TX FIFO is locked, this function returns IMU_ERR_TX_FIFO_LOCKED.
If TX FIFO not locked, this function fills messages to TX FIFO empty slot, and returns how many messages have been filled.
If lockSendFifo is set to true, TX FIFO is locked after all messages have been filled to TX FIFO. In other word, TX FIFO is locked if the function return value equals msgCount, when lockSendFifo set to true.

Parameters:

link – IMU link.
msgs – The messages to send.
msgCount – Message count, one message is a 32-bit word.
lockSendFifo – If set to true, the TX FIFO is locked after all messages filled to TX FIFO.

Returns:

If TX FIFO is locked, this function returns IMU_ERR_TX_FIFO_LOCKED, otherwise, this function returns the actual message count sent out.

int32_t IMU_TryReceiveMsgs(imu_link_t link, uint32_t *msgs, int32_t desiredMsgCount, bool *needAckLock)

Try to receive messages.

This function tries to read messages from RX FIFO. It reads the messages already exists in RX FIFO and returns the actual read count.

If the RX FIFO has enough messages, this function reads the messages and returns.
If the RX FIFO does not have enough messages, this function the messages in RX FIFO and returns the actual read count.
During message reading, if RX FIFO is empty and locked, in this case peer CPU will not send message until current CPU send lock ack message. Then this function returns the message count actually received, and sets needAckLock to true to inform upper layer.

Parameters:

link – IMU link.
msgs – The buffer to read messages.
desiredMsgCount – Desired read count, one message is a 32-bit word.
needAckLock – Upper layer should always check this value. When this is set to true by this function, upper layer should send lock ack message to peer CPU.

Returns:

Count of messages actually received.

int32_t IMU_ReceiveMsgsBlocking(imu_link_t link, uint32_t *msgs, int32_t desiredMsgCount, bool *needAckLock)

Blocking to receive messages.

This function blocks until all desired messages have been received or the RX FIFO is locked.

If the RX FIFO has enough messages, this function reads the messages and returns.
If the RX FIFO does not have enough messages, this function waits for the new messages.
During message reading, if RX FIFO is empty and locked, in this case peer CPU will not send message until current CPU send lock ack message. Then this function returns the message count actually received, and sets needAckLock to true to inform upper layer.

Parameters:

link – IMU link.
msgs – The buffer to read messages.
desiredMsgCount – Desired read count, one message is a 32-bit word.
needAckLock – Upper layer should always check this value. When this is set to true by this function, upper layer should send lock ack message to peer CPU.

Returns:

Count of messages actually received.

int32_t IMU_SendMsgPtrBlocking(imu_link_t link, uint32_t msgPtr, bool lockSendFifo)

Blocking to send messages pointer.

Compared with IMU_SendMsgsBlocking, this function fills message pointer to TX FIFO, but not the message content.

This function blocks until the message pointer is filled to TX FIFO.

If the TX FIFO is locked, this function returns IMU_ERR_TX_FIFO_LOCKED.
If TX FIFO not locked, this function waits the available empty slot in TX FIFO, and fills the message pointer to TX FIFO.
To lock TX FIFO after filling the message pointer, set lockSendFifo to true.

Parameters:

link – IMU link.
msgPtr – The buffer pointer to message to send.
needAckLock – Upper layer should always check this value. When this is set to true by this function, upper layer should send lock ack message to peer CPU.

Return values:

0 – The message pointer set successfully.
IMU_ERR_TX_FIFO_LOCKED – The TX FIFO is locked, send failed.

static inline void IMU_LockSendFifo(imu_link_t link, bool lock)

Lock or unlock the TX FIFO.

Parameters:

link – IMU link.
lock – Use true to lock the FIFO, use false to unlock.

void IMU_FlushSendFifo(imu_link_t link)

Flush the send FIFO.

Flush all messages in send FIFO.

Parameters:

link – IMU link.

static inline void IMU_SetSendFifoWaterMark(imu_link_t link, uint8_t waterMark)

Set send FIFO warter mark.

The warter mark must be less than IMU_MAX_MSG_FIFO_WATER_MARK, i.e. 0 < waterMark <= IMU_MAX_MSG_FIFO_WATER_MARK.

Parameters:

link – IMU link.
waterMark – Send FIFO warter mark.

static inline uint32_t IMU_GetReceivedMsgCount(imu_link_t link)

Get the message count in receive FIFO.

Parameters:

link – IMU link.

Returns:

The message count in receive FIFO.

static inline uint32_t IMU_GetSendFifoEmptySpace(imu_link_t link)

Get the empty slot in send FIFO.

Parameters:

link – IMU link.

Returns:

The empty slot count in send FIFO.

uint32_t IMU_GetStatusFlags(imu_link_t link)

Gets the IMU status flags.

Parameters:

link – IMU link.

Returns:

Bit mask of the IMU status flags, see _imu_status_flags.

static inline void IMU_ClearPendingInterrupts(imu_link_t link, uint32_t mask)

Clear the IMU IRQ.

Parameters:

link – IMU link.
mask – Bit mask of the interrupts to clear, see _imu_interrupts.

FSL_IMU_DRIVER_VERSION: IMU driver version.

enum _imu_status_flags

IMU status flags. .

Values:

enumerator kIMU_TxFifoEmpty

enumerator kIMU_TxFifoFull

enumerator kIMU_TxFifoAlmostFull

enumerator kIMU_TxFifoLocked

enumerator kIMU_RxFifoEmpty

enumerator kIMU_RxFifoFull

enumerator kIMU_RxFifoAlmostFull

enumerator kIMU_RxFifoLocked

enum _imu_interrupts

IMU interrupt. .

Values:

enumerator kIMU_RxMsgReadyInterrupt

enumerator kIMU_TxFifoSpaceAvailableInterrupt

IMU_MSG_FIFO_STATUS_MSG_FIFO_LOCKED_MASK

IMU_MSG_FIFO_STATUS_MSG_FIFO_ALMOST_FULL_MASK

IMU_MSG_FIFO_STATUS_MSG_FIFO_FULL_MASK

IMU_MSG_FIFO_STATUS_MSG_FIFO_EMPTY_MASK

IMU_MSG_FIFO_STATUS_MSG_COUNT_MASK

IMU_MSG_FIFO_STATUS_MSG_COUNT_SHIFT

IMU_MSG_FIFO_STATUS_WR_PTR_MASK

IMU_MSG_FIFO_STATUS_WR_PTR_SHIFT

IMU_MSG_FIFO_STATUS_RD_PTR_MASK

IMU_MSG_FIFO_STATUS_RD_PTR_SHIFT

IMU_MSG_FIFO_CNTL_MSG_RDY_INT_CLR_MASK

IMU_MSG_FIFO_CNTL_SP_AV_INT_CLR_MASK

IMU_MSG_FIFO_CNTL_FIFO_FLUSH_MASK

IMU_MSG_FIFO_CNTL_WAIT_FOR_ACK_MASK

IMU_MSG_FIFO_CNTL_FIFO_FULL_WATERMARK_MASK

IMU_MSG_FIFO_CNTL_FIFO_FULL_WATERMARK_SHIFT

IMU_MSG_FIFO_CNTL_FIFO_FULL_WATERMARK(x)

IMU_WR_MSG(link, msg)

IMU_RD_MSG(link)

IMU_RX_FIFO_LOCKED(link)

IMU_TX_FIFO_LOCKED(link)

IMU_TX_FIFO_ALMOST_FULL(link)

IMU_RX_FIFO_EMPTY(link): Get Rx FIFO empty status.

IMU_LOCK_TX_FIFO(link)

IMU_UNLOCK_TX_FIFO(link)

IMU_RX_FIFO_MSG_COUNT(link)

IMU_TX_FIFO_MSG_COUNT(link)

IMU_RX_FIFO_MSG_COUNT_FROM_STATUS(rxFifoStatus)

IMU_RX_FIFO_LOCKED_FROM_STATUS(rxFifoStatus)

IMU_TX_FIFO_STATUS(link)

IMU_RX_FIFO_STATUS(link)

IMU_TX_FIFO_CNTL(link)

IMU_ERR_TX_FIFO_LOCKED: IMU driver returned error value.

IMU_MSG_FIFO_MAX_COUNT: Maximum message numbers in FIFO.

IMU_MAX_MSG_FIFO_WATER_MARK: Maximum message FIFO warter mark.

IMU_FIFO_SW_WRAPAROUND(ptr)

IMU_WR_PTR(link)

IMU_RD_PTR(link)

struct IMU_Type: #include <fsl_imu.h>

IMU register structure.

INPUTMUX: Input Multiplexing Driver

FSL_INPUTMUX_DRIVER_VERSION: Group interrupt driver version for SDK.

enum _inputmux_connection_t

INPUTMUX connections type.

Values:

enumerator kINPUTMUX_Gpio3Inp0ToSct0: SCT INMUX.

enumerator kINPUTMUX_Gpio4Inp1ToSct0

enumerator kINPUTMUX_Gpio22Inp2ToSct0

enumerator kINPUTMUX_Gpio23Inp3ToSct0

enumerator kINPUTMUX_Gpio26Inp4ToSct0

enumerator kINPUTMUX_Gpio27Inp5ToSct0

enumerator kINPUTMUX_Gpio35Inp6ToSct0

enumerator kINPUTMUX_Gpio36Inp7ToSct0

enumerator kINPUTMUX_Ctimer0Mat0ToSct0

enumerator kINPUTMUX_Ctimer1Mat0ToSct0

enumerator kINPUTMUX_Ctimer2Mat0ToSct0

enumerator kINPUTMUX_Ctimer3Mat0ToSct0

enumerator kINPUTMUX_GpioIntBmatchToSct0

enumerator kINPUTMUX_SharedI2s0SclkToSct0

enumerator kINPUTMUX_SharedI2s1SclkToSct0

enumerator kINPUTMUX_SharedI2s0WsToSct0

enumerator kINPUTMUX_SharedI2s1WsToSct0

enumerator kINPUTMUX_MclkToSct0

enumerator kINPUTMUX_ArmTxevToSct0

enumerator kINPUTMUX_DebugHaltedToSct0: Pin Interrupt.

enumerator kINPUTMUX_GpioPort0Pin0ToPintsel

enumerator kINPUTMUX_GpioPort0Pin1ToPintsel

enumerator kINPUTMUX_GpioPort0Pin2ToPintsel

enumerator kINPUTMUX_GpioPort0Pin3ToPintsel

enumerator kINPUTMUX_GpioPort0Pin4ToPintsel

enumerator kINPUTMUX_GpioPort0Pin5ToPintsel

enumerator kINPUTMUX_GpioPort0Pin6ToPintsel

enumerator kINPUTMUX_GpioPort0Pin7ToPintsel

enumerator kINPUTMUX_GpioPort0Pin8ToPintsel

enumerator kINPUTMUX_GpioPort0Pin9ToPintsel

enumerator kINPUTMUX_GpioPort0Pin10ToPintsel

enumerator kINPUTMUX_GpioPort0Pin11ToPintsel

enumerator kINPUTMUX_GpioPort0Pin12ToPintsel

enumerator kINPUTMUX_GpioPort0Pin13ToPintsel

enumerator kINPUTMUX_GpioPort0Pin14ToPintsel

enumerator kINPUTMUX_GpioPort0Pin15ToPintsel

enumerator kINPUTMUX_GpioPort0Pin16ToPintsel

enumerator kINPUTMUX_GpioPort0Pin17ToPintsel

enumerator kINPUTMUX_GpioPort0Pin18ToPintsel

enumerator kINPUTMUX_GpioPort0Pin19ToPintsel

enumerator kINPUTMUX_GpioPort0Pin20ToPintsel

enumerator kINPUTMUX_GpioPort0Pin21ToPintsel

enumerator kINPUTMUX_GpioPort0Pin22ToPintsel

enumerator kINPUTMUX_GpioPort0Pin23ToPintsel

enumerator kINPUTMUX_GpioPort0Pin24ToPintsel

enumerator kINPUTMUX_GpioPort0Pin25ToPintsel

enumerator kINPUTMUX_GpioPort0Pin26ToPintsel

enumerator kINPUTMUX_GpioPort0Pin27ToPintsel

enumerator kINPUTMUX_GpioPort0Pin28ToPintsel

enumerator kINPUTMUX_GpioPort0Pin29ToPintsel

enumerator kINPUTMUX_GpioPort0Pin30ToPintsel

enumerator kINPUTMUX_GpioPort0Pin31ToPintsel

enumerator kINPUTMUX_GpioPort1Pin0ToPintsel

enumerator kINPUTMUX_GpioPort1Pin1ToPintsel

enumerator kINPUTMUX_GpioPort1Pin2ToPintsel

enumerator kINPUTMUX_GpioPort1Pin3ToPintsel

enumerator kINPUTMUX_GpioPort1Pin4ToPintsel

enumerator kINPUTMUX_GpioPort1Pin5ToPintsel

enumerator kINPUTMUX_GpioPort1Pin6ToPintsel

enumerator kINPUTMUX_GpioPort1Pin7ToPintsel

enumerator kINPUTMUX_GpioPort1Pin8ToPintsel

enumerator kINPUTMUX_GpioPort1Pin9ToPintsel

enumerator kINPUTMUX_GpioPort1Pin10ToPintsel

enumerator kINPUTMUX_GpioPort1Pin11ToPintsel

enumerator kINPUTMUX_GpioPort1Pin12ToPintsel

enumerator kINPUTMUX_GpioPort1Pin13ToPintsel

enumerator kINPUTMUX_GpioPort1Pin14ToPintsel

enumerator kINPUTMUX_GpioPort1Pin15ToPintsel

enumerator kINPUTMUX_GpioPort1Pin16ToPintsel

enumerator kINPUTMUX_GpioPort1Pin17ToPintsel

enumerator kINPUTMUX_GpioPort1Pin18ToPintsel

enumerator kINPUTMUX_GpioPort1Pin19ToPintsel

enumerator kINPUTMUX_GpioPort1Pin20ToPintsel

enumerator kINPUTMUX_GpioPort1Pin21ToPintsel

enumerator kINPUTMUX_GpioPort1Pin22ToPintsel

enumerator kINPUTMUX_GpioPort1Pin23ToPintsel

enumerator kINPUTMUX_GpioPort1Pin24ToPintsel

enumerator kINPUTMUX_GpioPort1Pin25ToPintsel

enumerator kINPUTMUX_GpioPort1Pin26ToPintsel

enumerator kINPUTMUX_GpioPort1Pin27ToPintsel

enumerator kINPUTMUX_GpioPort1Pin28ToPintsel

enumerator kINPUTMUX_GpioPort1Pin29ToPintsel

enumerator kINPUTMUX_GpioPort1Pin30ToPintsel

enumerator kINPUTMUX_GpioPort1Pin31ToPintsel: Frequency measure.

enumerator kINPUTMUX_SysoscToFreqmeas

enumerator kINPUTMUX_SfroToFreqmeas

enumerator kINPUTMUX_FfroToFreqmeas

enumerator kINPUTMUX_LposcToFreqmeas

enumerator kINPUTMUX_Xtal32kToFreqmeas

enumerator kINPUTMUX_C0FrHclkToFreqmeas

enumerator kINPUTMUX_FreqmeGpioClkInToFreqmeas

enumerator kINPUTMUX_T3pllMcuFlexspiClkToFreqmeas

enumerator kINPUTMUX_TddrMcuFlexspiClkToFreqmeas

enumerator kINPUTMUX_TddrMcuEnetClkToFreqmeas

enumerator kINPUTMUX_TcpuMcuFlexspiClkToFreqmeas

enumerator kINPUTMUX_Nco32kToFreqmeas

enumerator kINPUTMUX_PmuFclkToFreqmeas

enumerator kINPUTMUX_Osc32kClk1hzToFreqmeas

enumerator kINPUTMUX_Osc32kClk1khzToFreqmeas

enumerator kINPUTMUX_LcdFclkToFreqmeas

enumerator kINPUTMUX_Flexcomm0FclkToFreqmeas

enumerator kINPUTMUX_DmicFclkToFreqmeas

enumerator kINPUTMUX_Flexspi0FclkToFreqmeas

enumerator kINPUTMUX_TcpuMcuClkToFreqmeas

enumerator kINPUTMUX_AvpllCh2ClkoutToFreqmeas: CTmier0 capture input mux.

enumerator kINPUTMUX_Gpio0Inp0ToTimer0CaptureChannels

enumerator kINPUTMUX_Gpio1Inp1ToTimer0CaptureChannels

enumerator kINPUTMUX_Gpio12Inp2ToTimer0CaptureChannels

enumerator kINPUTMUX_Gpio13Inp3ToTimer0CaptureChannels

enumerator kINPUTMUX_Gpio14Inp4ToTimer0CaptureChannels

enumerator kINPUTMUX_Gpio21Inp5ToTimer0CaptureChannels

enumerator kINPUTMUX_Gpio24Inp6ToTimer0CaptureChannels

enumerator kINPUTMUX_Gpio25Inp7ToTimer0CaptureChannels

enumerator kINPUTMUX_Gpio37Inp8ToTimer0CaptureChannels

enumerator kINPUTMUX_Gpio38Inp9ToTimer0CaptureChannels

enumerator kINPUTMUX_Gpio39Inp10ToTimer0CaptureChannels

enumerator kINPUTMUX_Gpio51Inp11ToTimer0CaptureChannels

enumerator kINPUTMUX_Gpio52Inp12ToTimer0CaptureChannels

enumerator kINPUTMUX_Gpio53Inp13ToTimer0CaptureChannels

enumerator kINPUTMUX_Gpio54Inp14ToTimer0CaptureChannels

enumerator kINPUTMUX_SharedI2s0WsToTimer0CaptureChannels

enumerator kINPUTMUX_SharedI2s1WsToTimer0CaptureChannels

enumerator kINPUTMUX_BtuHostTrigger0ToTimer0CaptureChannels

enumerator kINPUTMUX_BtuHostTrigger1ToTimer0CaptureChannels

enumerator kINPUTMUX_BtuHostTrigger2ToTimer0CaptureChannels

enumerator kINPUTMUX_FlexcommDmaDone0ToTimer0CaptureChannels

enumerator kINPUTMUX_FlexcommDmaDone1ToTimer0CaptureChannels

enumerator kINPUTMUX_FlexcommDmaCmpltDone0ToTimer0CaptureChannels

enumerator kINPUTMUX_FlexcommDmaCmpltDone1ToTimer0CaptureChannels: CTmier1 capture input mux.

enumerator kINPUTMUX_Gpio0Inp0ToTimer1CaptureChannels

enumerator kINPUTMUX_Gpio1Inp1ToTimer1CaptureChannels

enumerator kINPUTMUX_Gpio12Inp2ToTimer1CaptureChannels

enumerator kINPUTMUX_Gpio13Inp3ToTimer1CaptureChannels

enumerator kINPUTMUX_Gpio14Inp4ToTimer1CaptureChannels

enumerator kINPUTMUX_Gpio21Inp5ToTimer1CaptureChannels

enumerator kINPUTMUX_Gpio24Inp6ToTimer1CaptureChannels

enumerator kINPUTMUX_Gpio25Inp7ToTimer1CaptureChannels

enumerator kINPUTMUX_Gpio37Inp8ToTimer1CaptureChannels

enumerator kINPUTMUX_Gpio38Inp9ToTimer1CaptureChannels

enumerator kINPUTMUX_Gpio39Inp10ToTimer1CaptureChannels

enumerator kINPUTMUX_Gpio51Inp11ToTimer1CaptureChannels

enumerator kINPUTMUX_Gpio52Inp12ToTimer1CaptureChannels

enumerator kINPUTMUX_Gpio53Inp13ToTimer1CaptureChannels

enumerator kINPUTMUX_Gpio54Inp14ToTimer1CaptureChannels

enumerator kINPUTMUX_SharedI2s0WsToTimer1CaptureChannels

enumerator kINPUTMUX_SharedI2s1WsToTimer1CaptureChannels

enumerator kINPUTMUX_EnetToTimer1CaptureChannels

enumerator kINPUTMUX_BtuHostTrigger0ToTimer1CaptureChannels

enumerator kINPUTMUX_BtuHostTrigger1ToTimer1CaptureChannels

enumerator kINPUTMUX_BtuHostTrigger2ToTimer1CaptureChannels: CTmier2 capture input mux.

enumerator kINPUTMUX_Gpio0Inp0ToTimer2CaptureChannels

enumerator kINPUTMUX_Gpio1Inp1ToTimer2CaptureChannels

enumerator kINPUTMUX_Gpio12Inp2ToTimer2CaptureChannels

enumerator kINPUTMUX_Gpio13Inp3ToTimer2CaptureChannels

enumerator kINPUTMUX_Gpio14Inp4ToTimer2CaptureChannels

enumerator kINPUTMUX_Gpio21Inp5ToTimer2CaptureChannels

enumerator kINPUTMUX_Gpio24Inp6ToTimer2CaptureChannels

enumerator kINPUTMUX_Gpio25Inp7ToTimer2CaptureChannels

enumerator kINPUTMUX_Gpio37Inp8ToTimer2CaptureChannels

enumerator kINPUTMUX_Gpio38Inp9ToTimer2CaptureChannels

enumerator kINPUTMUX_Gpio39Inp10ToTimer2CaptureChannels

enumerator kINPUTMUX_Gpio51Inp11ToTimer2CaptureChannels

enumerator kINPUTMUX_Gpio52Inp12ToTimer2CaptureChannels

enumerator kINPUTMUX_Gpio53Inp13ToTimer2CaptureChannels

enumerator kINPUTMUX_Gpio54Inp14ToTimer2CaptureChannels

enumerator kINPUTMUX_SharedI2s0WsToTimer2CaptureChannels

enumerator kINPUTMUX_SharedI2s1WsToTimer2CaptureChannels

enumerator kINPUTMUX_BtuHostTrigger0ToTimer2CaptureChannels

enumerator kINPUTMUX_BtuHostTrigger1ToTimer2CaptureChannels

enumerator kINPUTMUX_BtuHostTrigger2ToTimer2CaptureChannels

enumerator kINPUTMUX_FlexcommDmaDone0ToTimer2CaptureChannels

enumerator kINPUTMUX_FlexcommDmaDone1ToTimer2CaptureChannels

enumerator kINPUTMUX_FlexcommDmaCmpltDone0ToTimer2CaptureChannels

enumerator kINPUTMUX_FlexcommDmaCmpltDone1ToTimer2CaptureChannels: CTmier3 capture input mux.

enumerator kINPUTMUX_Gpio0Inp0ToTimer3CaptureChannels

enumerator kINPUTMUX_Gpio1Inp1ToTimer3CaptureChannels

enumerator kINPUTMUX_Gpio12Inp2ToTimer3CaptureChannels

enumerator kINPUTMUX_Gpio13Inp3ToTimer3CaptureChannels

enumerator kINPUTMUX_Gpio14Inp4ToTimer3CaptureChannels

enumerator kINPUTMUX_Gpio21Inp5ToTimer3CaptureChannels

enumerator kINPUTMUX_Gpio24Inp6ToTimer3CaptureChannels

enumerator kINPUTMUX_Gpio25Inp7ToTimer3CaptureChannels

enumerator kINPUTMUX_Gpio37Inp8ToTimer3CaptureChannels

enumerator kINPUTMUX_Gpio38Inp9ToTimer3CaptureChannels

enumerator kINPUTMUX_Gpio39Inp10ToTimer3CaptureChannels

enumerator kINPUTMUX_Gpio51Inp11ToTimer3CaptureChannels

enumerator kINPUTMUX_Gpio52Inp12ToTimer3CaptureChannels

enumerator kINPUTMUX_Gpio53Inp13ToTimer3CaptureChannels

enumerator kINPUTMUX_Gpio54Inp14ToTimer3CaptureChannels

enumerator kINPUTMUX_SharedI2s0WsToTimer3CaptureChannels

enumerator kINPUTMUX_SharedI2s1WsToTimer3CaptureChannels

enumerator kINPUTMUX_BtuHostTrigger0ToTimer3CaptureChannels

enumerator kINPUTMUX_BtuHostTrigger1ToTimer3CaptureChannels

enumerator kINPUTMUX_BtuHostTrigger2ToTimer3CaptureChannels: DMA0 ITRIG.

enumerator kINPUTMUX_NsGpioPint0ToDma0

enumerator kINPUTMUX_NsGpioPint1ToDma0

enumerator kINPUTMUX_NsGpioPint2ToDma0

enumerator kINPUTMUX_NsGpioPint3ToDma0

enumerator kINPUTMUX_Ctimer0M0ToDma0

enumerator kINPUTMUX_Ctimer0M1ToDma0

enumerator kINPUTMUX_Ctimer1M0ToDma0

enumerator kINPUTMUX_Ctimer1M1ToDma0

enumerator kINPUTMUX_Ctimer2M0ToDma0

enumerator kINPUTMUX_Ctimer2M1ToDma0

enumerator kINPUTMUX_Ctimer3M0ToDma0

enumerator kINPUTMUX_Ctimer3M1ToDma0

enumerator kINPUTMUX_Dma0TrigOutAToDma0

enumerator kINPUTMUX_Dma0TrigOutBToDma0

enumerator kINPUTMUX_Dma0TrigOutCToDma0

enumerator kINPUTMUX_Dma0TrigOutDToDma0

enumerator kINPUTMUX_Sct0Dmac0ToDma0

enumerator kINPUTMUX_Sct0Dmac1ToDma0

enumerator kINPUTMUX_EnetMac0DmaReq0ToDma0

enumerator kINPUTMUX_EnetMac0DmaReq1ToDma0

enumerator kINPUTMUX_UsimDmaRxSingleToDma0

enumerator kINPUTMUX_UsimDmaTxSingleToDma0

enumerator kINPUTMUX_GauGpadc0DmaSingleToDma0

enumerator kINPUTMUX_GauGpadc1DmaSingleToDma0

enumerator kINPUTMUX_GauGpdacaDmaSingleToDma0

enumerator kINPUTMUX_GauGpdacbDmaSingleToDma0

enumerator kINPUTMUX_FlexspiRxToDma0

enumerator kINPUTMUX_FlexspiTxToDma0

enumerator kINPUTMUX_LcdRxRegToDmaSingleToDma0

enumerator kINPUTMUX_LcdTxRegToDmaSingleToDma0: DMA1 ITRIG.

enumerator kINPUTMUX_NsGpioPint0ToDma1

enumerator kINPUTMUX_NsGpioPint1ToDma1

enumerator kINPUTMUX_NsGpioPint2ToDma1

enumerator kINPUTMUX_NsGpioPint3ToDma1

enumerator kINPUTMUX_Ctimer0M0ToDma1

enumerator kINPUTMUX_Ctimer0M1ToDma1

enumerator kINPUTMUX_Ctimer1M0ToDma1

enumerator kINPUTMUX_Ctimer1M1ToDma1

enumerator kINPUTMUX_Ctimer2M0ToDma1

enumerator kINPUTMUX_Ctimer2M1ToDma1

enumerator kINPUTMUX_Ctimer3M0ToDma1

enumerator kINPUTMUX_Ctimer3M1ToDma1

enumerator kINPUTMUX_Dma1TrigOutAToDma1

enumerator kINPUTMUX_Dma1TrigOutBToDma1

enumerator kINPUTMUX_Dma1TrigOutCToDma1

enumerator kINPUTMUX_Dma1TrigOutDToDma1

enumerator kINPUTMUX_Sct0Dmac0ToDma1

enumerator kINPUTMUX_Sct0Dmac1ToDma1

enumerator kINPUTMUX_EnetMac0DmaReq0ToDma1

enumerator kINPUTMUX_EnetMac0DmaReq1ToDma1

enumerator kINPUTMUX_UsimDmaRxSingleToDma1

enumerator kINPUTMUX_UsimDmaTxSingleToDma1

enumerator kINPUTMUX_GauGpadc0DmaSingleToDma1

enumerator kINPUTMUX_GauGpadc1DmaSingleToDma1

enumerator kINPUTMUX_GauGpdacaDmaSingleToDma1

enumerator kINPUTMUX_GauGpdacbDmaSingleToDma1

enumerator kINPUTMUX_FlexspiRxToDma1

enumerator kINPUTMUX_FlexspiTxToDma1

enumerator kINPUTMUX_LcdRxRegToDmaSingleToDma1

enumerator kINPUTMUX_LcdTxRegToDmaSingleToDma1: DMA0 OTRIG.

enumerator kINPUTMUX_Dma0OtrigChannel0ToTriginChannels

enumerator kINPUTMUX_Dma0OtrigChannel1ToTriginChannels

enumerator kINPUTMUX_Dma0OtrigChannel2ToTriginChannels

enumerator kINPUTMUX_Dma0OtrigChannel3ToTriginChannels

enumerator kINPUTMUX_Dma0OtrigChannel4ToTriginChannels

enumerator kINPUTMUX_Dma0OtrigChannel5ToTriginChannels

enumerator kINPUTMUX_Dma0OtrigChannel6ToTriginChannels

enumerator kINPUTMUX_Dma0OtrigChannel7ToTriginChannels

enumerator kINPUTMUX_Dma0OtrigChannel8ToTriginChannels

enumerator kINPUTMUX_Dma0OtrigChannel9ToTriginChannels

enumerator kINPUTMUX_Dma0OtrigChannel10ToTriginChannels

enumerator kINPUTMUX_Dma0OtrigChannel11ToTriginChannels

enumerator kINPUTMUX_Dma0OtrigChannel12ToTriginChannels

enumerator kINPUTMUX_Dma0OtrigChannel13ToTriginChannels

enumerator kINPUTMUX_Dma0OtrigChannel14ToTriginChannels

enumerator kINPUTMUX_Dma0OtrigChannel15ToTriginChannels

enumerator kINPUTMUX_Dma0OtrigChannel16ToTriginChannels

enumerator kINPUTMUX_Dma0OtrigChannel17ToTriginChannels

enumerator kINPUTMUX_Dma0OtrigChannel18ToTriginChannels

enumerator kINPUTMUX_Dma0OtrigChannel19ToTriginChannels

enumerator kINPUTMUX_Dma0OtrigChannel20ToTriginChannels

enumerator kINPUTMUX_Dma0OtrigChannel21ToTriginChannels

enumerator kINPUTMUX_Dma0OtrigChannel22ToTriginChannels

enumerator kINPUTMUX_Dma0OtrigChannel23ToTriginChannels

enumerator kINPUTMUX_Dma0OtrigChannel24ToTriginChannels

enumerator kINPUTMUX_Dma0OtrigChannel25ToTriginChannels

enumerator kINPUTMUX_Dma0OtrigChannel26ToTriginChannels

enumerator kINPUTMUX_Dma0OtrigChannel27ToTriginChannels

enumerator kINPUTMUX_Dma0OtrigChannel28ToTriginChannels

enumerator kINPUTMUX_Dma0OtrigChannel29ToTriginChannels

enumerator kINPUTMUX_Dma0OtrigChannel30ToTriginChannels

enumerator kINPUTMUX_Dma0OtrigChannel31ToTriginChannels

enumerator kINPUTMUX_Dma0OtrigChannel32ToTriginChannels: DMA1 OTRIG.

enumerator kINPUTMUX_Dma1OtrigChannel0ToTriginChannels

enumerator kINPUTMUX_Dma1OtrigChannel1ToTriginChannels

enumerator kINPUTMUX_Dma1OtrigChannel2ToTriginChannels

enumerator kINPUTMUX_Dma1OtrigChannel3ToTriginChannels

enumerator kINPUTMUX_Dma1OtrigChannel4ToTriginChannels

enumerator kINPUTMUX_Dma1OtrigChannel5ToTriginChannels

enumerator kINPUTMUX_Dma1OtrigChannel6ToTriginChannels

enumerator kINPUTMUX_Dma1OtrigChannel7ToTriginChannels

enumerator kINPUTMUX_Dma1OtrigChannel8ToTriginChannels

enumerator kINPUTMUX_Dma1OtrigChannel9ToTriginChannels

enumerator kINPUTMUX_Dma1OtrigChannel10ToTriginChannels

enumerator kINPUTMUX_Dma1OtrigChannel11ToTriginChannels

enumerator kINPUTMUX_Dma1OtrigChannel12ToTriginChannels

enumerator kINPUTMUX_Dma1OtrigChannel13ToTriginChannels

enumerator kINPUTMUX_Dma1OtrigChannel14ToTriginChannels

enumerator kINPUTMUX_Dma1OtrigChannel15ToTriginChannels

enumerator kINPUTMUX_Dma1OtrigChannel16ToTriginChannels

enumerator kINPUTMUX_Dma1OtrigChannel17ToTriginChannels

enumerator kINPUTMUX_Dma1OtrigChannel18ToTriginChannels

enumerator kINPUTMUX_Dma1OtrigChannel19ToTriginChannels

enumerator kINPUTMUX_Dma1OtrigChannel20ToTriginChannels

enumerator kINPUTMUX_Dma1OtrigChannel21ToTriginChannels

enumerator kINPUTMUX_Dma1OtrigChannel22ToTriginChannels

enumerator kINPUTMUX_Dma1OtrigChannel23ToTriginChannels

enumerator kINPUTMUX_Dma1OtrigChannel24ToTriginChannels

enumerator kINPUTMUX_Dma1OtrigChannel25ToTriginChannels

enumerator kINPUTMUX_Dma1OtrigChannel26ToTriginChannels

enumerator kINPUTMUX_Dma1OtrigChannel27ToTriginChannels

enumerator kINPUTMUX_Dma1OtrigChannel28ToTriginChannels

enumerator kINPUTMUX_Dma1OtrigChannel29ToTriginChannels

enumerator kINPUTMUX_Dma1OtrigChannel30ToTriginChannels

enumerator kINPUTMUX_Dma1OtrigChannel31ToTriginChannels

enumerator kINPUTMUX_Dma1OtrigChannel32ToTriginChannels

enum _inputmux_signal_t

INPUTMUX signal enable/disable type.

Values:

enumerator kINPUTMUX_Dmac0InputTriggerPint0Ena: DMA0 input trigger source enable.

enumerator kINPUTMUX_Dmac0InputTriggerPint1Ena

enumerator kINPUTMUX_Dmac0InputTriggerPint2Ena

enumerator kINPUTMUX_Dmac0InputTriggerPint3Ena

enumerator kINPUTMUX_Dmac0InputTriggerCtimer0M0Ena

enumerator kINPUTMUX_Dmac0InputTriggerCtimer0M1Ena

enumerator kINPUTMUX_Dmac0InputTriggerCtimer1M0Ena

enumerator kINPUTMUX_Dmac0InputTriggerCtimer1M1Ena

enumerator kINPUTMUX_Dmac0InputTriggerCtimer2M0Ena

enumerator kINPUTMUX_Dmac0InputTriggerCtimer2M1Ena

enumerator kINPUTMUX_Dmac0InputTriggerCtimer3M0Ena

enumerator kINPUTMUX_Dmac0InputTriggerCtimer3M1Ena

enumerator kINPUTMUX_Dmac0InputTriggerDma0OutAEna

enumerator kINPUTMUX_Dmac0InputTriggerDma0OutBEna

enumerator kINPUTMUX_Dmac0InputTriggerDma0OutCEna

enumerator kINPUTMUX_Dmac0InputTriggerDma0OutDEna

enumerator kINPUTMUX_Dmac0InputTriggerSct0Dmac0Ena

enumerator kINPUTMUX_Dmac0InputTriggerSct0Dmac1Ena

enumerator kINPUTMUX_Dmac0InputTriggerEnetMac0DmaReq0Ena

enumerator kINPUTMUX_Dmac0InputTriggerEnetMac0DmaReq1Ena

enumerator kINPUTMUX_Dmac0InputTriggerUsimDmaRxSingleEna

enumerator kINPUTMUX_Dmac0InputTriggerUsimDmaTxSingleEna

enumerator kINPUTMUX_Dmac0InputTriggerGauGpadc0DmaSingleEna

enumerator kINPUTMUX_Dmac0InputTriggerGauGpadc1DmaSingleEna

enumerator kINPUTMUX_Dmac0InputTriggerGauGpdacaDmaSingleEna

enumerator kINPUTMUX_Dmac0InputTriggerGauGpdacbDmaSingleEna

enumerator kINPUTMUX_Dmac0InputTriggerFlexspiRxEna

enumerator kINPUTMUX_Dmac0InputTriggerFlexspiTxEna

enumerator kINPUTMUX_Dmac0InputTriggerLcdRxRegToDmaSingleEna

enumerator kINPUTMUX_Dmac0InputTriggerLcdTxRegToDmaSingleEna: DMA1 input trigger source enable.

enumerator kINPUTMUX_Dmac1InputTriggerPint0Ena

enumerator kINPUTMUX_Dmac1InputTriggerPint1Ena

enumerator kINPUTMUX_Dmac1InputTriggerPint2Ena

enumerator kINPUTMUX_Dmac1InputTriggerPint3Ena

enumerator kINPUTMUX_Dmac1InputTriggerCtimer0M0Ena

enumerator kINPUTMUX_Dmac1InputTriggerCtimer0M1Ena

enumerator kINPUTMUX_Dmac1InputTriggerCtimer1M0Ena

enumerator kINPUTMUX_Dmac1InputTriggerCtimer1M1Ena

enumerator kINPUTMUX_Dmac1InputTriggerCtimer2M0Ena

enumerator kINPUTMUX_Dmac1InputTriggerCtimer2M1Ena

enumerator kINPUTMUX_Dmac1InputTriggerCtimer3M0Ena

enumerator kINPUTMUX_Dmac1InputTriggerCtimer3M1Ena

enumerator kINPUTMUX_Dmac1InputTriggerDma1OutAEna

enumerator kINPUTMUX_Dmac1InputTriggerDma1OutBEna

enumerator kINPUTMUX_Dmac1InputTriggerDma1OutCEna

enumerator kINPUTMUX_Dmac1InputTriggerDma1OutDEna

enumerator kINPUTMUX_Dmac1InputTriggerSct0Dmac0Ena

enumerator kINPUTMUX_Dmac1InputTriggerSct0Dmac1Ena

enumerator kINPUTMUX_Dmac1InputTriggerEnetMac0DmaReq0Ena

enumerator kINPUTMUX_Dmac1InputTriggerEnetMac0DmaReq1Ena

enumerator kINPUTMUX_Dmac1InputTriggerUsimDmaRxSingleEna

enumerator kINPUTMUX_Dmac1InputTriggerUsimDmaTxSingleEna

enumerator kINPUTMUX_Dmac1InputTriggerGauGpadc0DmaSingleEna

enumerator kINPUTMUX_Dmac1InputTriggerGauGpadc1DmaSingleEna

enumerator kINPUTMUX_Dmac1InputTriggerGauGpdacaDmaSingleEna

enumerator kINPUTMUX_Dmac1InputTriggerGauGpdacbDmaSingleEna

enumerator kINPUTMUX_Dmac1InputTriggerFlexspiRxEna

enumerator kINPUTMUX_Dmac1InputTriggerFlexspiTxEna

enumerator kINPUTMUX_Dmac1InputTriggerLcdRxRegToDmaSingleEna

enumerator kINPUTMUX_Dmac1InputTriggerLcdTxRegToDmaSingleEna: DMA0 REQ signal.

enumerator kINPUTMUX_Flexcomm0RxToDmac0Ch0RequestEna

enumerator kINPUTMUX_Flexcomm0TxToDmac0Ch1RequestEna

enumerator kINPUTMUX_Flexcomm1RxToDmac0Ch2RequestEna

enumerator kINPUTMUX_Flexcomm1TxToDmac0Ch3RequestEna

enumerator kINPUTMUX_Flexcomm2RxToDmac0Ch4RequestEna

enumerator kINPUTMUX_Flexcomm2TxToDmac0Ch5RequestEna

enumerator kINPUTMUX_Flexcomm3RxToDmac0Ch6RequestEna

enumerator kINPUTMUX_Flexcomm3TxToDmac0Ch7RequestEna

enumerator kINPUTMUX_Dmic0Ch0ToDmac0Ch16RequestEna

enumerator kINPUTMUX_Dmic0Ch1ToDmac0Ch17RequestEna

enumerator kINPUTMUX_Dmic0Ch2ToDmac0Ch18RequestEna

enumerator kINPUTMUX_Dmic0Ch3ToDmac0Ch19RequestEna

enumerator kINPUTMUX_Flexcomm14RxToDmac0Ch26RequestEna

enumerator kINPUTMUX_Flexcomm14TxToDmac0Ch27RequestEna: DMA1 REQ signal.

enumerator kINPUTMUX_Flexcomm0RxToDmac1Ch0RequestEna

enumerator kINPUTMUX_Flexcomm0TxToDmac1Ch1RequestEna

enumerator kINPUTMUX_Flexcomm1RxToDmac1Ch2RequestEna

enumerator kINPUTMUX_Flexcomm1TxToDmac1Ch3RequestEna

enumerator kINPUTMUX_Flexcomm2RxToDmac1Ch4RequestEna

enumerator kINPUTMUX_Flexcomm2TxToDmac1Ch5RequestEna

enumerator kINPUTMUX_Flexcomm3RxToDmac1Ch6RequestEna

enumerator kINPUTMUX_Flexcomm3TxToDmac1Ch7RequestEna

enumerator kINPUTMUX_Dmic0Ch0ToDmac1Ch16RequestEna

enumerator kINPUTMUX_Dmic0Ch1ToDmac1Ch17RequestEna

enumerator kINPUTMUX_Dmic0Ch2ToDmac1Ch18RequestEna

enumerator kINPUTMUX_Dmic0Ch3ToDmac1Ch19RequestEna

enumerator kINPUTMUX_Flexcomm14RxToDmac1Ch26RequestEna

enumerator kINPUTMUX_Flexcomm14TxToDmac1Ch27RequestEna

typedef enum _inputmux_connection_t inputmux_connection_t: INPUTMUX connections type.

typedef enum _inputmux_signal_t inputmux_signal_t: INPUTMUX signal enable/disable type.

void INPUTMUX_Init(INPUTMUX_Type *base)

Initialize INPUTMUX peripheral.

This function enables the INPUTMUX clock.

Parameters:

base – Base address of the INPUTMUX peripheral.

Return values:

None. –

void INPUTMUX_AttachSignal(INPUTMUX_Type *base, uint16_t index, inputmux_connection_t connection)

Attaches a signal.

This function attaches multiplexed signals from INPUTMUX to target signals. For example, to attach GPIO PORT0 Pin 5 to PINT peripheral, do the following:

INPUTMUX_AttachSignal(INPUTMUX, 2, kINPUTMUX_GpioPort0Pin5ToPintsel);

In this example, INTMUX has 8 registers for PINT, PINT_SEL0~PINT_SEL7. With parameter index specified as 2, this function configures register PINT_SEL2.

Parameters:

base – Base address of the INPUTMUX peripheral.
index – The serial number of destination register in the group of INPUTMUX registers with same name.
connection – Applies signal from source signals collection to target signal.

Return values:

None. –

void INPUTMUX_EnableSignal(INPUTMUX_Type *base, inputmux_signal_t signal, bool enable)

Enable/disable a signal.

This function gates the INPUTPMUX clock.

Parameters:

base – Base address of the INPUTMUX peripheral.
signal – Enable signal register id and bit offset.
enable – Selects enable or disable.

Return values:

None. –

void INPUTMUX_Deinit(INPUTMUX_Type *base)

Deinitialize INPUTMUX peripheral.

This function disables the INPUTMUX clock.

Parameters:

base – Base address of the INPUTMUX peripheral.

Return values:

None. –

SCT0_PMUX_ID: Periphinmux IDs.

SHSGPIO_PMUX_ID

PINTSEL_PMUX_ID

DMA0_ITRIG_PMUX_ID

DMA0_OTRIG_PMUX_ID

DMA1_ITRIG_PMUX_ID

DMA1_OTRIG_PMUX_ID

CT32BIT0_CAP_PMUX_ID

CT32BIT1_CAP_PMUX_ID

CT32BIT2_CAP_PMUX_ID

CT32BIT3_CAP_PMUX_ID

FREQMEAS_PMUX_ID

DMA0_REQ_ENA0_ID

DMA1_REQ_ENA0_ID

DMA0_ITRIG_EN0_ID

DMA0_ITRIG_EN1_ID

DMA1_ITRIG_EN0_ID

DMA1_ITRIG_EN1_ID

ENA_SHIFT

PMUX_SHIFT

IO_MUX Driver

enum io_mux_pin_config_t

IO MUX pin configuration. Bit [1:0] for pull configuration Bit [3:2] for drive strength configuration.

Values:

enumerator IO_MUX_PinConfigNoPullDriveWeakest

enumerator IO_MUX_PinConfigNoPullDriveWeak

enumerator IO_MUX_PinConfigNoPullDriveStrong

enumerator IO_MUX_PinConfigNoPullDriveStrongest

enumerator IO_MUX_PinConfigPullUpDriveWeakest

enumerator IO_MUX_PinConfigPullUpDriveWeak

enumerator IO_MUX_PinConfigPullUpDriveStrong

enumerator IO_MUX_PinConfigPullUpDriveStrongest

enumerator IO_MUX_PinConfigPullDownDriveWeakest

enumerator IO_MUX_PinConfigPullDownDriveWeak

enumerator IO_MUX_PinConfigPullDownDriveStrong

enumerator IO_MUX_PinConfigPullDownDriveStrongest

enumerator IO_MUX_PinConfigNoPull

enumerator IO_MUX_PinConfigPullUp

enumerator IO_MUX_PinConfigPullDown

enum io_mux_sleep_pin_level_t

IO MUX sleep pin level.

Values:

enumerator IO_MUX_SleepPinLevelLow

enumerator IO_MUX_SleepPinLevelHigh

enumerator IO_MUX_SleepPinLevelUnchanged

IO_MUX_GPIO_FC_MASK(gpio, fcIdx, fcMsk)

IO_MUX_SGPIO_FLAG(mask)

IO_MUX_GPIO_FLAG(mask)

IO_MUX_FC_OFFSET(mask)

IO_MUX_FC_MASK(mask)

IO_MUX_CTIMER_MASK(inMsk, outMsk)

IO_MUX_CTIMER_IN_MASK(mask)

IO_MUX_CTIMER_OUT_MASK(mask)

IO_MUX_SCTIMER_MASK(inMsk, outMsk)

IO_MUX_FC0_USART_SCK

IO_MUX_FC0_USART_DATA

IO_MUX_FC0_USART_CMD

IO_MUX_FC0_I2C_2_3

IO_MUX_FC0_I2S

IO_MUX_FC0_I2S_DATA

IO_MUX_FC0_SPI_SS0

IO_MUX_FC1_USART_SCK

IO_MUX_FC1_USART_DATA

IO_MUX_FC1_USART_CMD

IO_MUX_FC1_I2C_8_9

IO_MUX_FC1_I2S

IO_MUX_FC1_I2S_DATA

IO_MUX_FC1_SPI_SS0

IO_MUX_FC2_USART_SCK

IO_MUX_FC2_USART_DATA

IO_MUX_FC2_USART_CMD

IO_MUX_FC2_I2C_13_14

IO_MUX_FC2_I2C_16_17

IO_MUX_FC2_I2S

IO_MUX_FC2_I2S_DATA

IO_MUX_FC2_SPI_SS0

IO_MUX_FC3_USART_SCK

IO_MUX_FC3_USART_DATA

IO_MUX_FC3_USART_CMD

IO_MUX_FC3_I2C_24_26

IO_MUX_FC3_I2C_19_20

IO_MUX_FC3_I2S

IO_MUX_FC3_I2S_DATA

IO_MUX_FC3_SPI_SS0

IO_MUX_FC14_USART_SCK

IO_MUX_FC14_USART_DATA

IO_MUX_FC14_USART_CMD

IO_MUX_FC14_I2C_56_57

IO_MUX_FC14_I2S

IO_MUX_FC14_I2S_DATA

IO_MUX_FC14_SPI_SS0

IO_MUX_QUAD_SPI_FLASH

IO_MUX_QUAD_SPI_PSRAM

IO_MUX_PDM

IO_MUX_USB

IO_MUX_SCT_OUT_0

IO_MUX_SCT_OUT_1

IO_MUX_SCT_OUT_8

IO_MUX_SCT_OUT_4

IO_MUX_SCT_OUT_5

IO_MUX_SCT_OUT_6

IO_MUX_SCT_OUT_7

IO_MUX_SCT_OUT_9

IO_MUX_SCT_IN_0

IO_MUX_SCT_IN_1

IO_MUX_SCT_IN_2

IO_MUX_SCT_IN_3

IO_MUX_SCT_IN_4

IO_MUX_SCT_IN_5

IO_MUX_SCT_IN_6

IO_MUX_SCT_IN_7

IO_MUX_CT0_MAT0_OUT

IO_MUX_CT0_MAT1_OUT

IO_MUX_CT0_MAT2_OUT

IO_MUX_CT0_MAT3_OUT

IO_MUX_CT1_MAT0_OUT

IO_MUX_CT1_MAT1_OUT

IO_MUX_CT1_MAT2_OUT

IO_MUX_CT1_MAT3_OUT

IO_MUX_CT2_MAT0_OUT

IO_MUX_CT2_MAT1_OUT

IO_MUX_CT2_MAT2_OUT

IO_MUX_CT2_MAT3_OUT

IO_MUX_CT3_MAT0_OUT

IO_MUX_CT3_MAT1_OUT

IO_MUX_CT3_MAT2_OUT

IO_MUX_CT_INP0

IO_MUX_CT_INP1

IO_MUX_CT_INP2

IO_MUX_CT_INP3

IO_MUX_CT_INP4

IO_MUX_CT_INP5

IO_MUX_CT_INP6

IO_MUX_CT_INP7

IO_MUX_CT_INP8

IO_MUX_CT_INP9

IO_MUX_CT_INP10

IO_MUX_CT_INP11

IO_MUX_CT_INP12

IO_MUX_CT_INP13

IO_MUX_CT_INP14

IO_MUX_MCLK

IO_MUX_UTICK

IO_MUX_USIM

IO_MUX_LCD_8080

IO_MUX_LCD_SPI

IO_MUX_FREQ_GPIO_CLK

IO_MUX_GPIO_INT_BMATCH

IO_MUX_GAU_TRIGGER0

IO_MUX_ACOMP0_GPIO_OUT

IO_MUX_ACOMP0_EDGE_PULSE

IO_MUX_ACOMP1_GPIO_OUT

IO_MUX_ACOMP1_EDGE_PULSE

IO_MUX_GAU_TRIGGER1

IO_MUX_SDIO

IO_MUX_ENET_CLK

IO_MUX_ENET_RX

IO_MUX_ENET_TX

IO_MUX_ENET_MDIO

IO_MUX_ENET_TIMER0

IO_MUX_ENET_TIMER1

IO_MUX_ENET_TIMER2

IO_MUX_ENET_TIMER3

IO_MUX_CLKIN_FRM_PD

IO_MUX_GPIO0

IO_MUX_GPIO1

IO_MUX_GPIO2

IO_MUX_GPIO3

IO_MUX_GPIO4

IO_MUX_GPIO5

IO_MUX_GPIO6

IO_MUX_GPIO7

IO_MUX_GPIO8

IO_MUX_GPIO9

IO_MUX_GPIO10

IO_MUX_GPIO11

IO_MUX_GPIO12

IO_MUX_GPIO13

IO_MUX_GPIO14

IO_MUX_GPIO15

IO_MUX_GPIO16

IO_MUX_GPIO17

IO_MUX_GPIO18

IO_MUX_GPIO19

IO_MUX_GPIO20

IO_MUX_GPIO21

IO_MUX_GPIO22

IO_MUX_GPIO23

IO_MUX_GPIO24

IO_MUX_GPIO25

IO_MUX_GPIO26

IO_MUX_GPIO27

IO_MUX_GPIO28

IO_MUX_GPIO29

IO_MUX_GPIO30

IO_MUX_GPIO31

IO_MUX_GPIO32

IO_MUX_GPIO33

IO_MUX_GPIO34

IO_MUX_GPIO35

IO_MUX_GPIO36

IO_MUX_GPIO37

IO_MUX_GPIO38

IO_MUX_GPIO39

IO_MUX_GPIO40

IO_MUX_GPIO41

IO_MUX_GPIO42

IO_MUX_GPIO43

IO_MUX_GPIO44

IO_MUX_GPIO45

IO_MUX_GPIO46

IO_MUX_GPIO47

IO_MUX_GPIO48

IO_MUX_GPIO49

IO_MUX_GPIO50

IO_MUX_GPIO51

IO_MUX_GPIO52

IO_MUX_GPIO53

IO_MUX_GPIO54

IO_MUX_GPIO55

IO_MUX_GPIO56

IO_MUX_GPIO57

IO_MUX_GPIO58

IO_MUX_GPIO59

IO_MUX_GPIO60

IO_MUX_GPIO61

IO_MUX_GPIO62

IO_MUX_GPIO63

IO_MUX_SGPIO0

IO_MUX_SGPIO1

IO_MUX_SGPIO2

IO_MUX_SGPIO3

IO_MUX_SGPIO4

IO_MUX_SGPIO5

IO_MUX_SGPIO6

IO_MUX_SGPIO7

IO_MUX_SGPIO8

IO_MUX_SGPIO9

IO_MUX_SGPIO10

IO_MUX_SGPIO11

IO_MUX_SGPIO12

IO_MUX_SGPIO13

IO_MUX_SGPIO14

IO_MUX_SGPIO15

IO_MUX_SGPIO16

IO_MUX_SGPIO17

IO_MUX_SGPIO18

IO_MUX_SGPIO19

IO_MUX_SGPIO20

IO_MUX_SGPIO21

IO_MUX_SGPIO22

IO_MUX_SGPIO23

IO_MUX_SGPIO24

IO_MUX_SGPIO25

IO_MUX_SGPIO26

IO_MUX_SGPIO27

IO_MUX_SGPIO28

IO_MUX_SGPIO29

IO_MUX_SGPIO30

IO_MUX_SGPIO31

IO_MUX_AON_CAPTURE

static inline void IO_MUX_SetPinMux(uint32_t pinLowMask, uint32_t pinHighMask, uint32_t gpioFcSetMask, uint32_t gpioFcClrMask, uint32_t fselSetMask, uint32_t fselClrMask, uint32_t ctimerSetMask, uint32_t ctimerClrMask, uint32_t sctimerSetMask, uint32_t sctimerClrMask)

Sets the IO_MUX pin mux mode.

This is an example to set the GPIO2/GPIO3 as the Flexcomm0 UART RX/TX:

IO_MUX_SetPinMux(IO_MUX_FC0_USART_DATA);

This is an example to set the GPIO6/GPIO10 as Flexcomm1 I2C SDA/SCL:

IO_MUX_SetPinMux(IO_MUX_FC1_I2C_6_10);

Note

The parameters can be filled with the pin function ID macros.

Parameters:

pinLowMask – The GPIO0-31 pins mask.
pinHighMask – The GPIO32-63 pins mask.
gpioFcSetMask – The GPIO and Flexcomm registers mask to set, defined by IO_MUX_GPIO_FC_MASK()
gpioFcClrMask – The GPIO and Flexcomm registers mask to clear, defined by IO_MUX_GPIO_FC_MASK()
fselSetMask – The FSEL register mask to set
fselClrMask – The FSEL register mask to clear
ctimerSetMask – The C_TIMER_IN/C_TIMER_OUT register mask to set, defined by IO_MUX_CTIMER_MASK()
ctimerClrMask – The C_TIMER_IN/C_TIMER_OUT register mask to clear, defined by IO_MUX_CTIMER_MASK()
sctimerSetMask – The SC_TIMER register mask to set
sctimerClrMask – The SC_TIMER register mask to clear

static inline void IO_MUX_SetPinConfig(uint32_t pin, io_mux_pin_config_t config)

Sets the IO_MUX pin mux pull up/down configuartion.

This is an example to set the GPIO2 pin to pull down:

IO_MUX_SetPinConfig(2U, IO_MUX_PinConfigPullDown);

Parameters:

pin – The GPIO pin index to config.
config – The pull up/down setting for the pin.

static inline void IO_MUX_SetPinOutLevelInSleep(uint32_t pin, io_mux_sleep_pin_level_t level)

Sets IO output level in sleep mode. If level set to IO_MUX_SleepPinLevelUnchanged, the IO configuration is same as the active mode.

This is an example to set the GPIO2 pin to output high during sleep:

IO_MUX_SetPinOutLevelInSleep(2U, IO_MUX_SleepPinLevelHigh);

Parameters:

pin – The GPIO pin index to config.
level – Output level in sleep.

static inline void IO_MUX_SetRfPinOutLevelInSleep(uint32_t pin, io_mux_sleep_pin_level_t level)

Sets RF Switch Pin 0-3 output level in sleep mode. If level set to IO_MUX_SleepPinLevelUnchanged, the IO configuration is same as the active mode.

This is an example to set the RF_CNTL0 pin to output low during sleep:

IO_MUX_SetRfPinOutLevelInSleep(0U, IO_MUX_SleepPinLevelLow);

Parameters:

pin – The RF Switch pin index to config.
level – Output level in sleep.

FSL_IO_MUX_DRIVER_VERSION: IO_MUX driver version 2.2.1.

FSL_COMPONENT_ID

IPED Driver

enum _iped_status

Values:

enumerator kStatus_IPED_RegionIsLocked

typedef uint32_t iped_region_t

typedef uint32_t iped_prince_rounds_t

static inline void IPED_EncryptEnable(FLEXSPI_Type *base)

Enable data encryption.

This function enables IPED on-the-fly data encryption.

Parameters:

base – IPED peripheral address.

static inline void IPED_EncryptDisable(FLEXSPI_Type *base)

Disable data encryption.

This function disables IPED on-the-fly data encryption.

Parameters:

base – IPED peripheral address.

static inline void IPED_SetLock(FLEXSPI_Type *base, iped_region_t region)

Locks access for specified region registers or data mask register.

This function sets lock on specified region.

Parameters:

base – IPED peripheral address.
region – number to lock

static inline bool IPED_IsRegionLocked(FLEXSPI_Type *base, iped_region_t region)

Gets info whether IPED region is locked.

Parameters:

base – IPED peripheral address.
region – Selection of the IPED region to be queried.

status_t IPED_SetRegionEnable(FLEXSPI_Type *base, iped_region_t region, bool enable)

Enable encryption for a specific IPED region encryption.

Parameters:

base – IPED peripheral address.
region – Selection of the IPED region to be enabled.

static inline bool IPED_IsRegionEnabled(FLEXSPI_Type *base, iped_region_t region)

Gets info whether IPED region encryption is enabled.

Parameters:

base – IPED peripheral address.
region – Selection of the IPED region to be queried.

status_t IPED_SetRegionAddressRange(FLEXSPI_Type *base, iped_region_t region, uint32_t start_address, uint32_t end_address)

Sets IPED region address range.

This function configures IPED region address range.

Parameters:

base – IPED peripheral address.
region – Selection of the IPED region to be configured.
start_address – Start address for region.
end_address – End address for region.

void IPED_GetRegionAddressRange(FLEXSPI_Type *base, iped_region_t region, uint32_t *start_address, uint32_t *end_address)

Gets IPED region base address.

This function reads current start and end address settings for selected region.

Parameters:

base – IPED peripheral address.
region – Selection of the IPED region to be configured.
start_address – Start address for region.
end_address – End address for region.

void IPED_SetRegionIV(FLEXSPI_Type *base, iped_region_t region, const uint8_t iv[8])

Sets the IPED region IV.

This function sets specified AES IV for the given region.

Parameters:

base – IPED peripheral address.
region – Selection of the IPED region to be configured.
iv – 64-bit AES IV in little-endian byte order.

void IPED_GetRegionIV(FLEXSPI_Type *base, iped_region_t region, uint8_t iv[8])

Gets the IPED region IV.

This function gets specified AES IV for the given region.

Parameters:

base – IPED peripheral address.
region – Selection of the IPED region to be configured.
iv – 64-bit AES IV in little-endian byte order.

void IPED_SetRegionAAD(FLEXSPI_Type *base, iped_region_t region, const uint8_t aad[8])

Sets the IPED region AAD.

This function sets specified AES AAD for the given region.

Parameters:

base – IPED peripheral address.
region – Selection of the IPED region to be configured.
iv – 64-bit AES AAD in little-endian byte order.

void IPED_GetRegionAAD(FLEXSPI_Type *base, iped_region_t region, uint8_t aad[8])

Gets the IPED region AAD.

This function gets specified AES AAD for the given region.

Parameters:

base – IPED peripheral address.
region – Selection of the IPED region to be configured.
iv – 64-bit AES AAD in little-endian byte order.

static inline void IPED_SetPrinceRounds(FLEXSPI_Type *base, iped_prince_rounds_t rounds)

Sets the number of rounds used for PRINCE.

Parameters:

base – IPED peripheral address.
rounds – Number of PRINCE rounds used during encryption/decryption

static inline iped_prince_rounds_t IPED_GetPrinceRounds(FLEXSPI_Type *base)

Gets the number of rounds used for PRINCE.

Parameters:

base – IPED peripheral address.
rounds – Number of PRINCE rounds used during encryption/decryption

FSL_IPED_DRIVER_VERSION

IPED driver version for RW61x. Version 1.0.0.

Version 1.0.1
- Initial version

kIPED_Region0: IPED region 0

kIPED_Region1: IPED region 1

kIPED_Region2: IPED region 2

kIPED_Region3: IPED region 3

kIPED_Region4: IPED region 4

kIPED_Region5: IPED region 5

kIPED_Region6: IPED region 6

kIPED_Region7: IPED region 7

kIPED_Region8: IPED region 8

kIPED_Region9: IPED region 9

kIPED_Region10: IPED region 10

kIPED_Region11: IPED region 11

kIPED_Region12: IPED region 12

kIPED_Region13: IPED region 13

kIPED_Region14: IPED region 14

kIPED_Region15: IPED region 15

kIPED_PrinceRounds12

kIPED_PrinceRounds22

IPED_REGION_COUNT: IPED region count.

IPED_RW_ENABLE_VAL

IPED_RW_DISABLE_VAL

IPED_CTX_REG_OFFSET

Intrusion and Tamper Response Controller

ITRC

status_t ITRC_SetActionToEvent(ITRC_Type *base, itrc_out_signals_t out, itrc_in_signals_t in, itrc_lock_t lock, itrc_enable_t enable)

Set ITRC Action to Event.

This function sets input Event signal to corresponding output Action response signal.

Parameters:

base – ITRC peripheral base address
out – ITRC OUT signal action
in – ITRC IN signal event
lock – if set locks INx_SEL configuration. This can be cleared only by PMC Core reset.
enable – if set input Event will be selected for output Action, otherwise disable (if not already locked).

Returns:

kStatus_Success if success, kStatus_InvalidArgument otherwise

void ITRC_SetSWEvent0(ITRC_Type *base)

Trigger ITRC SW Event 0.

This funciton set SW_EVENT0 register with value !=0 which triggers ITRC SW Event 0.

Parameters:

base – ITRC peripheral base address

void ITRC_SetSWEvent1(ITRC_Type *base)

Trigger ITRC SW Event 1.

This funciton set SW_EVENT1 register with value !=0 which triggers ITRC SW Event 1.

Parameters:

base – ITRC peripheral base address

bool ITRC_GetInEventStatus(ITRC_Type *base, itrc_in_signals_t event)

Get ITRC input event status.

This function returns ITRC status corresponding to provided input event.

Parameters:

base – ITRC peripheral base address
event – represents input event to get from STATUS register (see ITRC_STATUS_INx)

Returns:

boolean TRUE if corresponding event occured FALSE otherwise

bool ITRC_GetOutActionStatus(ITRC_Type *base, itrc_out_signals_t action)

Get ITRC output action status.

This function returns ITRC register output status.

Parameters:

base – ITRC peripheral base address
action – represents output action to get from STATUS register (see ITRC_STATUS_OUTx)

Returns:

boolean TRUE if corresponding action occured FALSE otherwise

status_t ITRC_ClearInEventStatus(ITRC_Type *base, itrc_in_signals_t event)

Clear In ITRC status.

This function clears corresponding ITRC event or action in input STATUS register.

Parameters:

base – ITRC peripheral base address
event – represents input event in STATUS register to be cleared (see ITRC_STATUS_INx)

Returns:

kStatus_Success if success, kStatus_InvalidArgument otherwise

status_t ITRC_ClearOutActionStatus(ITRC_Type *base, itrc_out_signals_t action)

Clear Out ITRC status.

This function clears corresponding ITRC event or action in output STATUS register.

Parameters:

base – ITRC peripheral base address
action – represents output action in STATUS register to be cleared (see OUTx_STATUS)

Returns:

kStatus_Success if success, kStatus_InvalidArgument otherwise

status_t ITRC_ClearAllStatus(ITRC_Type *base)

Clear All ITRC status.

This function clears all event and action status.

Parameters:

base – ITRC peripheral base address

Returns:

kStatus_Success if success

status_t ITRC_Init(ITRC_Type *base)

Initialize ITRC.

This function initializes ITRC by enabling IRQ.

Parameters:

base – ITRC peripheral base address
conf – ITRC configuration structure

Returns:

Status of the init operation

void ITRC_Deinit(ITRC_Type *base)

Deinitialize ITRC.

This function deinitializes ITRC by disabling IRQ.

Parameters:

base – ITRC peripheral base address

FSL_ITRC_DRIVER_VERSION

Defines ITRC driver version 2.0.0.

Change log:

Version 2.0.0
- Initial version.

typedef uint32_t itrc_in_signals_t: ITRC input events.

typedef uint32_t itrc_out_signals_t: ITRC output actions.

typedef uint32_t itrc_lock_t: ITRC lock/unlock.

typedef uint32_t itrc_enable_t: ITRC enable/disable.

void ITRC_DriverIRQHandler(void)

ITRC_INPUT_SIGNALS_NUM

kITRC_CauTemeprature

kITRC_PmipTemperature

kITRC_VddCore

kITRC_Vdd18

kITRC_Vdd33

kITRC_VddCoreGlitch

kITRC_AnalogSensor

kITRC_Ahb

kITRC_Cwd

kITRC_Css

kITRC_Pkc

kITRC_Otp

kITRC_Prince

kITRC_ClockGlitch

kITRC_SecurityIP

kITRC_Trng

kITRC_PmipGlitch

kITRC_PmipVddCoreGlitch

kITRC_TcpuPll

kITRC_T3Pll

kITRC_SwEvent0

kITRC_SwEvent1

kITRC_Irq

kITRC_ChipReset

kITRC_Unlock

kITRC_Lock

kITRC_Enable

kITRC_Disable

IN_STATUS0_EVENTS_MASK

IN_STATUS1_EVENTS_MASK

OUT_ACTIONS_MASK

ITRC

Common Driver

FSL_COMMON_DRIVER_VERSION: common driver version.

DEBUG_CONSOLE_DEVICE_TYPE_NONE: No debug console.

DEBUG_CONSOLE_DEVICE_TYPE_UART: Debug console based on UART.

DEBUG_CONSOLE_DEVICE_TYPE_LPUART: Debug console based on LPUART.

DEBUG_CONSOLE_DEVICE_TYPE_LPSCI: Debug console based on LPSCI.

DEBUG_CONSOLE_DEVICE_TYPE_USBCDC: Debug console based on USBCDC.

DEBUG_CONSOLE_DEVICE_TYPE_FLEXCOMM: Debug console based on FLEXCOMM.

DEBUG_CONSOLE_DEVICE_TYPE_IUART: Debug console based on i.MX UART.

DEBUG_CONSOLE_DEVICE_TYPE_VUSART: Debug console based on LPC_VUSART.

DEBUG_CONSOLE_DEVICE_TYPE_MINI_USART: Debug console based on LPC_USART.

DEBUG_CONSOLE_DEVICE_TYPE_SWO: Debug console based on SWO.

DEBUG_CONSOLE_DEVICE_TYPE_QSCI: Debug console based on QSCI.

MIN(a, b): Computes the minimum of a and b.

MAX(a, b): Computes the maximum of a and b.

UINT16_MAX: Max value of uint16_t type.

UINT32_MAX: Max value of uint32_t type.

SDK_ATOMIC_LOCAL_ADD(addr, val): Add value val from the variable at address address.

SDK_ATOMIC_LOCAL_SUB(addr, val): Subtract value val to the variable at address address.

SDK_ATOMIC_LOCAL_SET(addr, bits): Set the bits specifiled by bits to the variable at address address.

SDK_ATOMIC_LOCAL_CLEAR(addr, bits): Clear the bits specifiled by bits to the variable at address address.

SDK_ATOMIC_LOCAL_TOGGLE(addr, bits): Toggle the bits specifiled by bits to the variable at address address.

SDK_ATOMIC_LOCAL_CLEAR_AND_SET(addr, clearBits, setBits): For the variable at address address, clear the bits specifiled by clearBits and set the bits specifiled by setBits.

SDK_ATOMIC_LOCAL_COMPARE_AND_SET(addr, expected, newValue): For the variable at address address, check whether the value equal to expected. If value same as expected then update newValue to address and return true , else return false .

SDK_ATOMIC_LOCAL_TEST_AND_SET(addr, newValue): For the variable at address address, set as newValue value and return old value.

USEC_TO_COUNT(us, clockFreqInHz): Macro to convert a microsecond period to raw count value

COUNT_TO_USEC(count, clockFreqInHz): Macro to convert a raw count value to microsecond

MSEC_TO_COUNT(ms, clockFreqInHz): Macro to convert a millisecond period to raw count value

COUNT_TO_MSEC(count, clockFreqInHz): Macro to convert a raw count value to millisecond

SDK_ISR_EXIT_BARRIER

SDK_SIZEALIGN(var, alignbytes)

Macro to define a variable with L1 d-cache line size alignment

Macro to define a variable with L2 cache line size alignment

Macro to change a value to a given size aligned value

AT_NONCACHEABLE_SECTION(var): Define a variable var, and place it in non-cacheable section.

AT_NONCACHEABLE_SECTION_ALIGN(var, alignbytes): Define a variable var, and place it in non-cacheable section, the start address of the variable is aligned to alignbytes.

AT_NONCACHEABLE_SECTION_INIT(var): Define a variable var with initial value, and place it in non-cacheable section.

AT_NONCACHEABLE_SECTION_ALIGN_INIT(var, alignbytes): Define a variable var with initial value, and place it in non-cacheable section, the start address of the variable is aligned to alignbytes.

enum _status_groups

Status group numbers.

Values:

enumerator kStatusGroup_Generic: Group number for generic status codes.

enumerator kStatusGroup_FLASH: Group number for FLASH status codes.

enumerator kStatusGroup_LPSPI: Group number for LPSPI status codes.

enumerator kStatusGroup_FLEXIO_SPI: Group number for FLEXIO SPI status codes.

enumerator kStatusGroup_DSPI: Group number for DSPI status codes.

enumerator kStatusGroup_FLEXIO_UART: Group number for FLEXIO UART status codes.

enumerator kStatusGroup_FLEXIO_I2C: Group number for FLEXIO I2C status codes.

enumerator kStatusGroup_LPI2C: Group number for LPI2C status codes.

enumerator kStatusGroup_UART: Group number for UART status codes.

enumerator kStatusGroup_I2C: Group number for UART status codes.

enumerator kStatusGroup_LPSCI: Group number for LPSCI status codes.

enumerator kStatusGroup_LPUART: Group number for LPUART status codes.

enumerator kStatusGroup_SPI: Group number for SPI status code.

enumerator kStatusGroup_XRDC: Group number for XRDC status code.

enumerator kStatusGroup_SEMA42: Group number for SEMA42 status code.

enumerator kStatusGroup_SDHC: Group number for SDHC status code

enumerator kStatusGroup_SDMMC: Group number for SDMMC status code

enumerator kStatusGroup_SAI: Group number for SAI status code

enumerator kStatusGroup_MCG: Group number for MCG status codes.

enumerator kStatusGroup_SCG: Group number for SCG status codes.

enumerator kStatusGroup_SDSPI: Group number for SDSPI status codes.

enumerator kStatusGroup_FLEXIO_I2S: Group number for FLEXIO I2S status codes

enumerator kStatusGroup_FLEXIO_MCULCD: Group number for FLEXIO LCD status codes

enumerator kStatusGroup_FLASHIAP: Group number for FLASHIAP status codes

enumerator kStatusGroup_FLEXCOMM_I2C: Group number for FLEXCOMM I2C status codes

enumerator kStatusGroup_I2S: Group number for I2S status codes

enumerator kStatusGroup_IUART: Group number for IUART status codes

enumerator kStatusGroup_CSI: Group number for CSI status codes

enumerator kStatusGroup_MIPI_DSI: Group number for MIPI DSI status codes

enumerator kStatusGroup_SDRAMC: Group number for SDRAMC status codes.

enumerator kStatusGroup_POWER: Group number for POWER status codes.

enumerator kStatusGroup_ENET: Group number for ENET status codes.

enumerator kStatusGroup_PHY: Group number for PHY status codes.

enumerator kStatusGroup_TRGMUX: Group number for TRGMUX status codes.

enumerator kStatusGroup_SMARTCARD: Group number for SMARTCARD status codes.

enumerator kStatusGroup_LMEM: Group number for LMEM status codes.

enumerator kStatusGroup_QSPI: Group number for QSPI status codes.

enumerator kStatusGroup_DMA: Group number for DMA status codes.

enumerator kStatusGroup_EDMA: Group number for EDMA status codes.

enumerator kStatusGroup_DMAMGR: Group number for DMAMGR status codes.

enumerator kStatusGroup_FLEXCAN: Group number for FlexCAN status codes.

enumerator kStatusGroup_LTC: Group number for LTC status codes.

enumerator kStatusGroup_FLEXIO_CAMERA: Group number for FLEXIO CAMERA status codes.

enumerator kStatusGroup_LPC_SPI: Group number for LPC_SPI status codes.

enumerator kStatusGroup_LPC_USART: Group number for LPC_USART status codes.

enumerator kStatusGroup_DMIC: Group number for DMIC status codes.

enumerator kStatusGroup_SDIF: Group number for SDIF status codes.

enumerator kStatusGroup_SPIFI: Group number for SPIFI status codes.

enumerator kStatusGroup_OTP: Group number for OTP status codes.

enumerator kStatusGroup_MCAN: Group number for MCAN status codes.

enumerator kStatusGroup_CAAM: Group number for CAAM status codes.

enumerator kStatusGroup_ECSPI: Group number for ECSPI status codes.

enumerator kStatusGroup_USDHC: Group number for USDHC status codes.

enumerator kStatusGroup_LPC_I2C: Group number for LPC_I2C status codes.

enumerator kStatusGroup_DCP: Group number for DCP status codes.

enumerator kStatusGroup_MSCAN: Group number for MSCAN status codes.

enumerator kStatusGroup_ESAI: Group number for ESAI status codes.

enumerator kStatusGroup_FLEXSPI: Group number for FLEXSPI status codes.

enumerator kStatusGroup_MMDC: Group number for MMDC status codes.

enumerator kStatusGroup_PDM: Group number for MIC status codes.

enumerator kStatusGroup_SDMA: Group number for SDMA status codes.

enumerator kStatusGroup_ICS: Group number for ICS status codes.

enumerator kStatusGroup_SPDIF: Group number for SPDIF status codes.

enumerator kStatusGroup_LPC_MINISPI: Group number for LPC_MINISPI status codes.

enumerator kStatusGroup_HASHCRYPT: Group number for Hashcrypt status codes

enumerator kStatusGroup_LPC_SPI_SSP: Group number for LPC_SPI_SSP status codes.

enumerator kStatusGroup_I3C: Group number for I3C status codes

enumerator kStatusGroup_LPC_I2C_1: Group number for LPC_I2C_1 status codes.

enumerator kStatusGroup_NOTIFIER: Group number for NOTIFIER status codes.

enumerator kStatusGroup_DebugConsole: Group number for debug console status codes.

enumerator kStatusGroup_SEMC: Group number for SEMC status codes.

enumerator kStatusGroup_ApplicationRangeStart: Starting number for application groups.

enumerator kStatusGroup_IAP: Group number for IAP status codes

enumerator kStatusGroup_SFA: Group number for SFA status codes

enumerator kStatusGroup_SPC: Group number for SPC status codes.

enumerator kStatusGroup_PUF: Group number for PUF status codes.

enumerator kStatusGroup_TOUCH_PANEL: Group number for touch panel status codes

enumerator kStatusGroup_VBAT: Group number for VBAT status codes

enumerator kStatusGroup_XSPI: Group number for XSPI status codes

enumerator kStatusGroup_PNGDEC: Group number for PNGDEC status codes

enumerator kStatusGroup_JPEGDEC: Group number for JPEGDEC status codes

enumerator kStatusGroup_HAL_GPIO: Group number for HAL GPIO status codes.

enumerator kStatusGroup_HAL_UART: Group number for HAL UART status codes.

enumerator kStatusGroup_HAL_TIMER: Group number for HAL TIMER status codes.

enumerator kStatusGroup_HAL_SPI: Group number for HAL SPI status codes.

enumerator kStatusGroup_HAL_I2C: Group number for HAL I2C status codes.

enumerator kStatusGroup_HAL_FLASH: Group number for HAL FLASH status codes.

enumerator kStatusGroup_HAL_PWM: Group number for HAL PWM status codes.

enumerator kStatusGroup_HAL_RNG: Group number for HAL RNG status codes.

enumerator kStatusGroup_HAL_I2S: Group number for HAL I2S status codes.

enumerator kStatusGroup_HAL_ADC_SENSOR: Group number for HAL ADC SENSOR status codes.

enumerator kStatusGroup_TIMERMANAGER: Group number for TiMER MANAGER status codes.

enumerator kStatusGroup_SERIALMANAGER: Group number for SERIAL MANAGER status codes.

enumerator kStatusGroup_LED: Group number for LED status codes.

enumerator kStatusGroup_BUTTON: Group number for BUTTON status codes.

enumerator kStatusGroup_EXTERN_EEPROM: Group number for EXTERN EEPROM status codes.

enumerator kStatusGroup_SHELL: Group number for SHELL status codes.

enumerator kStatusGroup_MEM_MANAGER: Group number for MEM MANAGER status codes.

enumerator kStatusGroup_LIST: Group number for List status codes.

enumerator kStatusGroup_OSA: Group number for OSA status codes.

enumerator kStatusGroup_COMMON_TASK: Group number for Common task status codes.

enumerator kStatusGroup_MSG: Group number for messaging status codes.

enumerator kStatusGroup_SDK_OCOTP: Group number for OCOTP status codes.

enumerator kStatusGroup_SDK_FLEXSPINOR: Group number for FLEXSPINOR status codes.

enumerator kStatusGroup_CODEC: Group number for codec status codes.

enumerator kStatusGroup_ASRC: Group number for codec status ASRC.

enumerator kStatusGroup_OTFAD: Group number for codec status codes.

enumerator kStatusGroup_SDIOSLV: Group number for SDIOSLV status codes.

enumerator kStatusGroup_MECC: Group number for MECC status codes.

enumerator kStatusGroup_ENET_QOS: Group number for ENET_QOS status codes.

enumerator kStatusGroup_LOG: Group number for LOG status codes.

enumerator kStatusGroup_I3CBUS: Group number for I3CBUS status codes.

enumerator kStatusGroup_QSCI: Group number for QSCI status codes.

enumerator kStatusGroup_ELEMU: Group number for ELEMU status codes.

enumerator kStatusGroup_QUEUEDSPI: Group number for QSPI status codes.

enumerator kStatusGroup_POWER_MANAGER: Group number for POWER_MANAGER status codes.

enumerator kStatusGroup_IPED: Group number for IPED status codes.

enumerator kStatusGroup_ELS_PKC: Group number for ELS PKC status codes.

enumerator kStatusGroup_CSS_PKC: Group number for CSS PKC status codes.

enumerator kStatusGroup_HOSTIF: Group number for HOSTIF status codes.

enumerator kStatusGroup_CLIF: Group number for CLIF status codes.

enumerator kStatusGroup_BMA: Group number for BMA status codes.

enumerator kStatusGroup_NETC: Group number for NETC status codes.

enumerator kStatusGroup_ELE: Group number for ELE status codes.

enumerator kStatusGroup_GLIKEY: Group number for GLIKEY status codes.

enumerator kStatusGroup_AON_POWER: Group number for AON_POWER status codes.

enumerator kStatusGroup_AON_COMMON: Group number for AON_COMMON status codes.

enumerator kStatusGroup_ENDAT3: Group number for ENDAT3 status codes.

enumerator kStatusGroup_HIPERFACE: Group number for HIPERFACE status codes.

Generic status return codes.

Values:

enumerator kStatus_Success: Generic status for Success.

enumerator kStatus_Fail: Generic status for Fail.

enumerator kStatus_ReadOnly: Generic status for read only failure.

enumerator kStatus_OutOfRange: Generic status for out of range access.

enumerator kStatus_InvalidArgument: Generic status for invalid argument check.

enumerator kStatus_Timeout: Generic status for timeout.

enumerator kStatus_NoTransferInProgress: Generic status for no transfer in progress.

enumerator kStatus_Busy: Generic status for module is busy.

enumerator kStatus_NoData: Generic status for no data is found for the operation.

typedef int32_t status_t: Type used for all status and error return values.

void *SDK_Malloc(size_t size, size_t alignbytes)

Allocate memory with given alignment and aligned size.

This is provided to support the dynamically allocated memory used in cache-able region.

Parameters:

size – The length required to malloc.
alignbytes – The alignment size.

Return values:

The – allocated memory.

void SDK_Free(void *ptr)

Free memory.

Parameters:

ptr – The memory to be release.

void SDK_DelayAtLeastUs(uint32_t delayTime_us, uint32_t coreClock_Hz)

Delay at least for some time. Please note that, this API uses while loop for delay, different run-time environments make the time not precise, if precise delay count was needed, please implement a new delay function with hardware timer.

Parameters:

delayTime_us – Delay time in unit of microsecond.
coreClock_Hz – Core clock frequency with Hz.

static inline status_t EnableIRQ(IRQn_Type interrupt)

Enable specific interrupt.

Enable LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.

This function only enables the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:

interrupt – The IRQ number.

Return values:

kStatus_Success – Interrupt enabled successfully
kStatus_Fail – Failed to enable the interrupt

static inline status_t DisableIRQ(IRQn_Type interrupt)

Disable specific interrupt.

Disable LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.

This function only disables the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:

interrupt – The IRQ number.

Return values:

kStatus_Success – Interrupt disabled successfully
kStatus_Fail – Failed to disable the interrupt

static inline status_t EnableIRQWithPriority(IRQn_Type interrupt, uint8_t priNum)

Enable the IRQ, and also set the interrupt priority.

Only handle LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.

This function only handles the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:

interrupt – The IRQ to Enable.
priNum – Priority number set to interrupt controller register.

Return values:

kStatus_Success – Interrupt priority set successfully
kStatus_Fail – Failed to set the interrupt priority.

static inline status_t IRQ_SetPriority(IRQn_Type interrupt, uint8_t priNum)

Set the IRQ priority.

Only handle LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.

This function only handles the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:

interrupt – The IRQ to set.
priNum – Priority number set to interrupt controller register.

Return values:

kStatus_Success – Interrupt priority set successfully
kStatus_Fail – Failed to set the interrupt priority.

static inline status_t IRQ_ClearPendingIRQ(IRQn_Type interrupt)

Clear the pending IRQ flag.

Only handle LEVEL1 interrupt. For some devices, there might be multiple interrupt levels. For example, there are NVIC and intmux. Here the interrupts connected to NVIC are the LEVEL1 interrupts, because they are routed to the core directly. The interrupts connected to intmux are the LEVEL2 interrupts, they are routed to NVIC first then routed to core.

This function only handles the LEVEL1 interrupts. The number of LEVEL1 interrupts is indicated by the feature macro FSL_FEATURE_NUMBER_OF_LEVEL1_INT_VECTORS.

Parameters:

interrupt – The flag which IRQ to clear.

Return values:

kStatus_Success – Interrupt priority set successfully
kStatus_Fail – Failed to set the interrupt priority.

static inline uint32_t DisableGlobalIRQ(void)

Disable the global IRQ.

Disable the global interrupt and return the current primask register. User is required to provided the primask register for the EnableGlobalIRQ().

Returns:: Current primask value.

static inline void EnableGlobalIRQ(uint32_t primask)

Enable the global IRQ.

Set the primask register with the provided primask value but not just enable the primask. The idea is for the convenience of integration of RTOS. some RTOS get its own management mechanism of primask. User is required to use the EnableGlobalIRQ() and DisableGlobalIRQ() in pair.

Parameters:

primask – value of primask register to be restored. The primask value is supposed to be provided by the DisableGlobalIRQ().

static inline bool _SDK_AtomicLocalCompareAndSet(uint32_t *addr, uint32_t expected, uint32_t newValue)

static inline uint32_t _SDK_AtomicTestAndSet(uint32_t *addr, uint32_t newValue)

FSL_DRIVER_TRANSFER_DOUBLE_WEAK_IRQ: Macro to use the default weak IRQ handler in drivers.

MAKE_STATUS(group, code): Construct a status code value from a group and code number.

MAKE_VERSION(major, minor, bugfix)

Construct the version number for drivers.

The driver version is a 32-bit number, for both 32-bit platforms(such as Cortex M) and 16-bit platforms(such as DSC).

| Unused    || Major Version || Minor Version ||  Bug Fix    |
31        25  24           17  16            9  8            0

ARRAY_SIZE(x): Computes the number of elements in an array.

UINT64_H(X): Macro to get upper 32 bits of a 64-bit value

UINT64_L(X): Macro to get lower 32 bits of a 64-bit value

SUPPRESS_FALL_THROUGH_WARNING(): For switch case code block, if case section ends without “break;” statement, there wil be fallthrough warning with compiler flag -Wextra or -Wimplicit-fallthrough=n when using armgcc. To suppress this warning, “SUPPRESS_FALL_THROUGH_WARNING();” need to be added at the end of each case section which misses “break;”statement.

MSDK_REG_SECURE_ADDR(x): Convert the register address to the one used in secure mode.

MSDK_REG_NONSECURE_ADDR(x): Convert the register address to the one used in non-secure mode.

LCDIC Driver

status_t LCDIC_Init(LCDIC_Type *base, const lcdic_config_t *config)

Initialize the LCDIC.

This function initializes the LCDIC to work, it configues the LCDIC according to the configue structure and enables the module. After calling this function, the peripheral is ready to work.

Parameters:

base – LCDIC peripheral base address.

Return values:

kStatus_Success – Initialize successfully.

void LCDIC_Deinit(LCDIC_Type *base)

De-initialize the LCDIC.

This function disables the LCDIC, and disables peripheral clock if necessary.

Parameters:

base – LCDIC peripheral base address.

void LCDIC_GetDefaultConfig(lcdic_config_t *config)

Get the default configuration for to initialize the LCDIC.

The default configuration value is:

config->mode        = kLCDIC_3WireSPI;
config->endian      = kLCDIC_BigEndian;
config->rxThreshold = kLCDIC_RxThreshold0Word;
config->txThreshold = kLCDIC_TxThreshold3Word;

config->timerRatio0 = 8;
config->timerRatio1 = 9;

config->resetPulseWidth_Timer0 = 20;
config->resetSequence          = 0;
config->resetSequencePulseNum  = 1;
config->resetPolarity          = kLCDIC_ResetActiveLow;

config->i8080CtrlFlags = kLCDIC_I8080_CsActiveLow | kLCDIC_I8080_DcCmdLow | kLCDIC_I8080_RdActiveLow |
                         kLCDIC_I8080_WrActiveLow | kLCDIC_I8080_CsEnableIdleOff;

config->csWaitTime               = 2;
config->csSetupTime              = 2;
config->csHoldTime               = 2;
config->dcSetupTime              = 2;
config->dcHoldTime               = 2;
config->writeDataSetupTime       = 2;
config->writeDataHoldTime        = 2;
config->writeEnableActiveWidth   = 6;
config->writeEnableInactiveWidth = 6;
config->readEnableActiveWidth    = 15;
config->readEnableInactiveWidth  = 15;

config->spiCtrlFlags =
    kLCDIC_SPI_MsbFirst | kLCDIC_SPI_ClkActiveHigh | kLCDIC_SPI_ClkPhaseFirstEdge | kLCDIC_SPI_DcCmdLow;

config->teTimeoutTime_Timer1  = 16;
config->teSyncWaitTime_Timer1 = 0;

config->cmdShortTimeout_Timer0 = 1;
config->cmdLongTimeout_Timer1  = 16;

Parameters:

config – Pointer to the LCDIC configuration.

void LCDIC_ResetState(LCDIC_Type *base)

Reset the LCDIC.

This function resets the LCDIC state. After calling this function, all data in TX_FIFO and RX_FIFO will be cleared and all transactions on LCD interface will restart despite of formal status.

The configurations will not be reset.

Parameters:

base – LCDIC peripheral base address.

static inline void LCDIC_EnableInterrupts(LCDIC_Type *base, uint32_t interrupts)

Enables LCDIC interrupts.

Parameters:

base – LCDIC peripheral base address.
interrupts – The interrupts to enable, pass in as OR’ed value of _lcdic_interrupt.

static inline void LCDIC_DisableInterrupts(LCDIC_Type *base, uint32_t interrupts)

Disable LCDIC interrupts.

Parameters:

base – LCDIC peripheral base address.
interrupts – The interrupts to disable, pass in as OR’ed value of _lcdic_interrupt.

static inline uint32_t LCDIC_GetInterruptStatus(LCDIC_Type *base)

Get LCDIC interrupt pending status.

Note

The interrupt must be enabled, otherwise the interrupt flags will not assert.

Parameters:

base – LCDIC peripheral base address.

Returns:

The interrupt pending status.

static inline uint32_t LCDIC_GetInterruptRawStatus(LCDIC_Type *base)

Get LCDIC raw interrupt status.

This function gets the raw interrupt pending flags, it is not affected by interrupt enabled status.

Parameters:

base – LCDIC peripheral base address.

Returns:

The raw interrupt status.

static inline void LCDIC_ClearInterruptStatus(LCDIC_Type *base, uint32_t interrupts)

Clear LCDIC interrupt status.

Parameters:

base – LCDIC peripheral base address.
interrupts – The interrupt status to clear , pass in as OR’ed value of _lcdic_interrupt.

static inline uint32_t LCDIC_GetStatusFlags(LCDIC_Type *base)

Get LCDIC status flags.

Note

The interval between two times calling this function shall be larger than one LCDIC function clock.

Parameters:

base – LCDIC peripheral base address.

Returns:

The status flags, it is OR’ed value of _lcdic_flags.

static inline uint32_t LCDIC_GetProcessingTrxCmd(LCDIC_Type *base)

Get current on-going LCDIC TRX-CMD.

Note

The interval between two times calling this function shall be larger than one LCDIC function clock.

Parameters:

base – LCDIC peripheral base address.

Returns:

The TRX-CMD on-going.

static inline void LCDIC_SetTxThreshold(LCDIC_Type *base, lcdic_tx_threshold_t threshold)

Set TX FIFO threshold.

Parameters:

base – LCDIC peripheral base address.
threshold – TX threshold.

static inline void LCDIC_SetRxThreshold(LCDIC_Type *base, lcdic_rx_threshold_t threshold)

Set RX FIFO threshold.

Parameters:

base – LCDIC peripheral base address.
threshold – RX threshold.

status_t LCDIC_WriteTxFifoBlocking(LCDIC_Type *base, const uint32_t *data, uint32_t dataLen_Word)

Write the TX FIFO using blocking way.

This function waits for empty slot in TX FIFO and fill the data to TX FIFO.

Parameters:

base – LCDIC peripheral base address.
data – Data to send, the data length must be dividable by 4.
dataLen_Word – Data length in word.

Return values:

kStatus_Success – Write successfully.
kStatus_Timeout – Timeout happened.

status_t LCDIC_ReadRxFifoBlocking(LCDIC_Type *base, uint32_t *data, uint32_t dataLen_Word)

Read the RX FIFO using blocking way.

This function waits for valid data in RX FIFO and read them.

Parameters:

base – LCDIC peripheral base address.
data – Array for received data, the data length must be dividable by 4.
dataLen_Word – Data length in word.

Return values:

kStatus_Success – Read successfully.
kStatus_Timeout – Timeout happened.

static inline void LCDIC_SendResetSequence(LCDIC_Type *base)

Send reset sequence to the reset pin.

The function sends reset to reset pin, to reset the external panel. The reset sequence parameters are configued by lcdic_config_t.

Parameters:

base – LCDIC peripheral base address.

void LCDIC_SetResetSequenceDoneCallback(lcdic_reset_done_callback_t callback)

Set the callback called when reset sequence sent done.

Parameters:

callback – The callback to set.

static inline void LCDIC_EnableDMA(LCDIC_Type *base, bool enable)

Enable or disable to trigger DMA.

Parameters:

base – LCDIC peripheral base address.
enable – Use true to enable, false to disable.

status_t LCDIC_SendCommandBlocking(LCDIC_Type *base, uint8_t cmd)

Send command using blocking way.

This function sends out command and waits until send finished.

Parameters:

base – LCDIC peripheral base address.
cmd – Command to send.

Return values:

kStatus_Success – Command sent successfully.

status_t LCDIC_SendRepeatDataBlocking(LCDIC_Type *base, const lcdic_repeat_tx_xfer_t *xfer)

Send repeat data using blocking way.

This function sends out command and the repeat data, then waits until send finished or timeout happened.

Parameters:

base – LCDIC peripheral base address.
xfer – Pointer to the transfer configuration.

Return values:

kStatus_Success – Sent successfully.
kStatus_Timeout – Timeout happened.
kStatus_InvalidArgument – Invalid argument.

status_t LCDIC_SendDataArrayBlocking(LCDIC_Type *base, const lcdic_tx_xfer_t *xfer)

Send data array using blocking way.

This function sends out command and the data array, then waits until send finished or timeout happened.

Parameters:

base – LCDIC peripheral base address.
xfer – Pointer to the transfer configuration.

Return values:

kStatus_Success – Sent successfully.
kStatus_Timeout – Timeout happened.
kStatus_InvalidArgument – Invalid argument.

status_t LCDIC_ReadDataArrayBlocking(LCDIC_Type *base, const lcdic_rx_xfer_t *xfer)

Read data array using blocking way.

This function sends out command and read the data array, then waits until send finished or timeout happened.

Parameters:

base – LCDIC peripheral base address.
xfer – Pointer to the transfer configuration.

Return values:

kStatus_Success – Sent successfully.
kStatus_Timeout – Timeout happened.
kStatus_InvalidArgument – Invalid argument.

status_t LCDC_TransferBlocking(LCDIC_Type *base, const lcdic_xfer_t *xfer)

LCDIC data transfer using blocking way.

This function sends command only, or sends repeat data, or sends data array, or reads data array based on the transfer structure. It uses blocking way, only returns when transfer successed or failed.

Parameters:

base – LCDIC peripheral base address.
xfer – Pointer to the transfer configuration.

Return values:

kStatus_Success – Sent successfully.
kStatus_Timeout – Timeout happened.
kStatus_InvalidArgument – Invalid argument.

status_t LCDIC_TransferCreateHandle(LCDIC_Type *base, lcdic_handle_t *handle, lcdic_transfer_callback_t callback, void *userData)

Initializes the LCDIC driver handle, which is used in transactional functions.

Parameters:

base – LCDIC peripheral base address.
handle – Pointer to the lcdic_handle_t structure to store the transfer state.
callback – The callback function.
userData – The parameter of the callback function.

Return values:

kStatus_Success – Successfully created the handle.

status_t LCDIC_TransferNonBlocking(LCDIC_Type *base, lcdic_handle_t *handle, lcdic_xfer_t *xfer)

Transfer data using IRQ.

This function transfer data using IRQ. This is a non-blocking function, which returns right away. When all data is sent out/received, or timeout happened, the callback function is called.

Parameters:

base – LCDIC peripheral base address.
handle – Pointer to the lcdic_handle_t structure to store the transfer state.
xfer – LCDIC transfer structure.

Return values:

kStatus_Success – Successfully start a transfer.
kStatus_InvalidArgument – Input argument is invalid.
kStatus_Busy – LCDIC driver is busy with another transfer.

status_t LCDIC_SendCommandNonBlocking(LCDIC_Type *base, lcdic_handle_t *handle, uint8_t cmd)

Send command using interrupt-driven way.

Parameters:

base – LCDIC peripheral base address.
handle – Pointer to the lcdic_handle_t structure to store the transfer state.
cmd – Command to send.

Return values:

kStatus_Success – Command sent successfully.
kStatus_Busy – LCDIC driver is busy with another transfer.

status_t LCDIC_SendRepeatDataNonBlocking(LCDIC_Type *base, lcdic_handle_t *handle, const lcdic_repeat_tx_xfer_t *xfer)

Send repeat data using interrupt-driven way.

Parameters:

base – LCDIC peripheral base address.
handle – Pointer to the lcdic_handle_t structure to store the transfer state.
xfer – LCDIC transfer structure.

Return values:

kStatus_Success – Successfully start a transfer.
kStatus_InvalidArgument – Input argument is invalid.
kStatus_Busy – LCDIC driver is busy with another transfer.

status_t LCDIC_SendDataArrayNonBlocking(LCDIC_Type *base, lcdic_handle_t *handle, const lcdic_tx_xfer_t *xfer)

Send data array using interrupt-driven way.

Parameters:

base – LCDIC peripheral base address.
handle – Pointer to the lcdic_handle_t structure to store the transfer state.
xfer – LCDIC transfer structure.

Return values:

kStatus_Success – Successfully start a transfer.
kStatus_InvalidArgument – Input argument is invalid.
kStatus_Busy – LCDIC driver is busy with another transfer.

status_t LCDIC_ReadDataArrayNonBlocking(LCDIC_Type *base, lcdic_handle_t *handle, const lcdic_rx_xfer_t *xfer)

Read data array using interrupt-driven way.

Parameters:

base – LCDIC peripheral base address.
handle – Pointer to the lcdic_handle_t structure to store the transfer state.
xfer – LCDIC transfer structure.

Return values:

kStatus_Success – Successfully start a transfer.
kStatus_InvalidArgument – Input argument is invalid.
kStatus_Busy – LCDIC driver is busy with another transfer.

void LCDIC_TransferHandleIRQ(LCDIC_Type *base, void *handle)

LCDIC IRQ handler function.

IRQ handler to work with LCDIC_TransferNonBlocking.

Parameters:

base – LCDIC peripheral base address.
handle – Pointer to the lcdic_handle_t structure to store the transfer state.

void LCDIC_TransferInstallIRQHandler(uint32_t instance, void *handle, lcdic_transfer_irq_handler_t handler)

Install the IRQ handler.

Install IRQ handler for specific instance.

Parameters:

instance – LCDIC instance.
handle – Driver handle, it will be used as IRQ handler parameter.
handler – IRQ handler to instance.

uint32_t LCDIC_GetInstance(LCDIC_Type *base)

Get the instance from the base address.

Parameters:

base – LCDIC peripheral base address

Returns:

The LCDIC module instance

IRQn_Type LCDIC_GetIRQn(uint32_t instance)

Get IRQn for specific instance.

Parameters:

instance – LCDIC instance.

Returns:

The LCDIC IRQn.

uint32_t LCDIC_FillByteToWord(const uint8_t *bytes, uint8_t len)

Get data from byte array, and fill to 4-byte word.

LCDIC data registers only accept 4-byte data, but the user passed data might be not 4-byte size aligned. This function is used to construct the unaligned part to a word, to write to LCDIC register.

Parameters:

bytes – The byte array.
len – Length of the byte array.

Returns:

The construct word.

void LCDIC_ExtractByteFromWord(uint32_t word, uint8_t *bytes, uint8_t len)

Get data from 4-byte, and fill to byte array.

LCDIC data registers only accept 4-byte data, but the user passed data might be not 4-byte size aligned. This function is used to get desired bytes from the word read from LCDIC register, and save to the user data array.

Parameters:

word – Word data read from LCDIC register.
bytes – The byte array.
len – Length of the byte array.

status_t LCDIC_PrepareSendCommand(LCDIC_Type *base, uint8_t cmd)

Prepare the command sending.

Fill the TRX command and command to TX FIFO, after calling this function, user should wait for transfer done by checking status or IRQ.

Parameters:

base – LCDIC peripheral base address.
cmd – Command to send.

Return values:

kStatus_Success – Operation successed.

status_t LCDIC_PrepareSendRepeatData(LCDIC_Type *base, const lcdic_repeat_tx_xfer_t *xfer)

Prepare the repeat data sending.

Fill the required data to TX FIFO, after calling this function, user should wait for transfer done by checking status or IRQ.

Parameters:

base – LCDIC peripheral base address.
xfer – Transfer structure.

Return values:

kStatus_Success – Operation successed.
kStatus_InvalidArgument – Invalid argument.

status_t LCDIC_PrepareSendDataArray(LCDIC_Type *base, const lcdic_tx_xfer_t *xfer, uint32_t *xferSizeWordAligned, uint8_t *xferSizeWordUnaligned, uint32_t *wordUnalignedData)

Prepare sending data array.

Fill the required command data to TX FIFO, after calling this function, user should fill the xfer->txData to TX FIFO based on FIFO status.

Parameters:

base – LCDIC peripheral base address.
xfer – Transfer structure.
xferSizeWordAligned – The word size aligned part of the transfer data.
xferSizeWordUnaligned – The word size unaligned part of the transfer data.
wordUnalignedData – Word to save the word size unaligned data, it should be sent after all word size aligned data write finished.

Return values:

kStatus_Success – Operation successed.
kStatus_InvalidArgument – Invalid argument.

status_t LCDIC_PrepareReadDataArray(LCDIC_Type *base, const lcdic_rx_xfer_t *xfer, uint32_t *xferSizeWordAligned, uint8_t *xferSizeWordUnaligned)

Prepare reading data array.

Fill the required command data to TX FIFO, after calling this function, user should read RX FIFO to xfer->rxData based on FIFO status.

Parameters:

base – LCDIC peripheral base address.
xfer – Transfer structure.
xferSizeWordAligned – The word size aligned part of the transfer data.
xferSizeWordUnaligned – The word size unaligned part of the transfer data.

Return values:

kStatus_Success – Operation successed.
kStatus_InvalidArgument – Invalid argument.

FSL_LCDIC_DRIVER_VERSION

enum _lcdic_mode

LCDIC mode.

Values:

enumerator kLCDIC_3WireSPI: 3-wire SPI mode.

enumerator kLCDIC_4WireSPI: 4-wire SPI mode.

enumerator kLCDIC_I8080: I8080 mode.

enum _lcdic_endian

LCDIC byte order data endian.

Values:

enumerator kLCDIC_BigEndian: Big endian.

enumerator kLCDIC_LittleEndian: Little endian.

enum _lcdic_rx_threshold

LCDIC RX FIFO threshold.

RX threshold interrupt happens if the occupied word number in RX FIFO is bigger than the threshold value.

Values:

enumerator kLCDIC_RxThreshold0Word: 0 word.

enumerator kLCDIC_RxThreshold1Word: 1 word.

enum _lcdic_tx_threshold

LCDIC TX FIFO threshold.

TX threshold interrupt happens if the empty word number in TX FIFO is bigger than the threshold value.

Values:

enumerator kLCDIC_TxThreshold0Word: 0 word.

enumerator kLCDIC_TxThreshold1Word: 1 word.

enumerator kLCDIC_TxThreshold2Word: 2 word.

enumerator kLCDIC_TxThreshold3Word: 3 word.

enumerator kLCDIC_TxThreshold4Word: 4 word.

enumerator kLCDIC_TxThreshold5Word: 5 word.

enumerator kLCDIC_TxThreshold6Word: 6 word.

enumerator kLCDIC_TxThreshold7Word: 7 word.

enum _lcdic_reset_polarity

LCDIC reset signal polarity.

Values:

enumerator kLCDIC_ResetActiveLow: Active low.

enumerator kLCDIC_ResetActiveHigh: Active high.

LCDIC I8080 control flags. .

Values:

enumerator kLCDIC_I8080_CsActiveLow: CS active low.

enumerator kLCDIC_I8080_CsActiveHigh: CS active high.

enumerator kLCDIC_I8080_DcCmdLow: DC 0 means command, while 1 means data.

enumerator kLCDIC_I8080_DcCmdHigh: DC 1 means command, while 0 means data.

enumerator kLCDIC_I8080_RdActiveLow: RD active low.

enumerator kLCDIC_I8080_RdActiveHigh: RD active high.

enumerator kLCDIC_I8080_WrActiveLow: WR active low.

enumerator kLCDIC_I8080_WrActiveHigh: WR active high.

enumerator kLCDIC_I8080_CsEnableIdleOff: CS off while no transmission.

enumerator kLCDIC_I8080_CsEnableDcSwitchOff: CS off while DC switches.

LCDIC SPI mode control flags. .

Values:

enumerator kLCDIC_SPI_MsbFirst: MSB(bit 7) sent and received first.

enumerator kLCDIC_SPI_LsbFirst: LSB(bit 0) sent and received first.

enumerator kLCDIC_SPI_ClkActiveHigh: CPOL=0. Clock active-high (idle low)

enumerator kLCDIC_SPI_ClkActiveLow: CPOL=1. Clock active-low (idle high)

enumerator kLCDIC_SPI_ClkPhaseFirstEdge: CPHA=0. Data sample at first clock edge.

enumerator kLCDIC_SPI_ClkPhaseSecondEdge: CPHA=1. Data sample at second clock edge.

enumerator kLCDIC_SPI_DcCmdLow: DC 0 means command, while 1 means data.

enumerator kLCDIC_SPI_DcCmdHigh: DC 1 means command, while 0 means data.

enum _lcdic_interrupt

LCDIC interrupts.

Values:

enumerator kLCDIC_ResetDoneInterrupt

enumerator kLCDIC_CmdDoneInterrupt

enumerator kLCDIC_CmdTimeoutInterrupt

enumerator kLCDIC_TeTimeoutInterrupt

enumerator kLCDIC_TxOverflowInterrupt

enumerator kLCDIC_TxThresholdInterrupt

enumerator kLCDIC_RxUnderflowInterrupt

enumerator kLCDIC_RxThresholdInterrupt

enumerator kLCDIC_AllInterrupt: All interrupts.

LCDIC status flags. .

Values:

enumerator kLCDIC_IdleFlag

enumerator kLCDIC_TxThresholdFlag

enumerator kLCDIC_TxFullFlag

enumerator kLCDIC_RxThresholdFlag

enumerator kLCDIC_RxEmptyFlag

enumerator kLCDIC_AllFlag: All flags.

LCDIC TE sync mode .

Values:

enumerator kLCDIC_TeNoSync: Don’t need to sync.

enumerator kLCDIC_TeRisingEdgeSync: Sync to TE rising edge.

enumerator kLCDIC_TeFallingEdgeSync: Sync to TE falling edge.

LCDIC TRX command timeout mode .

Values:

enumerator kLCDIC_ShortTimeout: Using short timeout.

enumerator kLCDIC_LongTimeout: Using long timeout.

LCDIC data format .

Values:

enumerator kLCDIC_DataFormatByte: Byte.

enumerator kLCDIC_DataFormatHalfWord: Half word (2-byte).

enumerator kLCDIC_DataFormatWord: Word (4-byte).

LCDIC data or command .

Values:

enumerator kLCDIC_Command: Command.

enumerator kLCDIC_Data: Data.

LCDIC TX or RX .

Values:

enumerator kLCDIC_RX: RX

enumerator kLCDIC_TX: TX.

enum lcdic_xfer_mode_t

LCDIC transfer mode.

Values:

enumerator kLCDIC_XferCmdOnly: Only send command.

enumerator kLCDIC_XferSendRepeatData: Send repeat data.

enumerator kLCDIC_XferSendDataArray: Send data array.

enumerator kLCDIC_XferReceiveDataArray: Receive data array.

typedef enum _lcdic_mode lcdic_mode_t: LCDIC mode.

typedef enum _lcdic_endian lcdic_endian_t: LCDIC byte order data endian.

typedef enum _lcdic_rx_threshold lcdic_rx_threshold_t

LCDIC RX FIFO threshold.

RX threshold interrupt happens if the occupied word number in RX FIFO is bigger than the threshold value.

typedef enum _lcdic_tx_threshold lcdic_tx_threshold_t

LCDIC TX FIFO threshold.

TX threshold interrupt happens if the empty word number in TX FIFO is bigger than the threshold value.

typedef enum _lcdic_reset_polarity lcdic_reset_polarity_t: LCDIC reset signal polarity.

typedef struct _lcdic_config lcdic_config_t: LCDIC configuration.

typedef union _lcdic_trx_cmd lcdic_trx_cmd_t: LCDIC TRX command.

typedef struct _lcdic_repeat_tx_xfer lcdic_repeat_tx_xfer_t: LCDIC repeat data TX transfer structure.

typedef struct _lcdic_tx_xfer lcdic_tx_xfer_t: LCDIC data array TX transfer structure.

typedef struct _lcdic_rx_xfer lcdic_rx_xfer_t: LCDIC data array RX transfer structure.

typedef struct _lcdic_xfer lcdic_xfer_t: LCDIC transfer structure.

typedef struct _lcdic_handle lcdic_handle_t

typedef void (*lcdic_transfer_callback_t)(LCDIC_Type *base, lcdic_handle_t *handle, status_t status, void *userData)

LCDIC transfer callback function.

The status is kStatus_Success when transfer finished successfully, it is kStatus_Timeout when timeout happened.

typedef void (*lcdic_transfer_irq_handler_t)(LCDIC_Type *base, void *handle): Typedef for transactional APIs IRQ handler.

typedef void (*lcdic_reset_done_callback_t)(LCDIC_Type *base): Typedef for reset sequence sent done callback.

LCDIC_RESET_STATE_DELAY

Delay used in LCDIC_ResetState.

This should be larger than 5 * core clock / LCDIC function clock.

LCDIC_MAX_BYTE_PER_TRX

struct _lcdic_config

#include <fsl_lcdic.h>

LCDIC configuration.

Public Members

lcdic_mode_t mode: LCDIC work mode.

lcdic_endian_t endian: Data endian.

lcdic_rx_threshold_t rxThreshold: RX FIFO threshold.

lcdic_tx_threshold_t txThreshold: TX FIFO threshold.

uint8_t timerRatio0: Valid range: 0~15. freq(timer0) = freq(lcdic_clk) / (2 ^ timerRatio0).

uint8_t timerRatio1: Valid range: 0~15. freq(timer1) = freq(timer0) / (2 ^ timerRatio1).

uint8_t resetPulseWidth_Timer0: Reset pulse width, in the unit of timer0 period. Valid range 1 ~ 64.

uint8_t resetSequence: Reset sequence, it is a 8-bit value sent to reset pin from LSB.

uint8_t resetSequencePulseNum: Reset sequence pulse number, valid range is 1 ~ 8.

lcdic_reset_polarity_t resetPolarity: Reset signal polarity.

uint8_t i8080CtrlFlags: I8080 control flags, it is OR’ed value of _lcdic_i8080_ctrl_flags.

uint8_t csWaitTime: Minimum CS inactive pulse width. T(csw)=T(lcdic_clk)*csWaitTime, valid range 0-7.

uint8_t csSetupTime: Minimum CS setup time before WR/RD. T(css)=T(lcdic_clk)*csSetupTime, valid range 0-255.

uint8_t csHoldTime: Minimum CS hold time after WR/RD. T(csh)=T(lcdic_clk)*csHoldTime, valid range 0-7.

uint8_t dcSetupTime: Minimum DC setup time before WR/RD/CS. T(dcs)=T(lcdic_clk)*dsSetupTime, valid range 0-7.

uint8_t dcHoldTime: Minimum DC hold time after WR/RD/CS. T(dch)=T(lcdic_clk)*dsHoldTime, valid range 0-7.

uint8_t writeDataSetupTime: Minimum write data setup time after WR active. T(wdh)=T(lcdic_clk)*writeDataSetupTime, valid range 0-7.

uint8_t writeDataHoldTime: Minimum write data setup time before WR active. T(wds)=T(lcdic_clk)*writeDataHoldTime, valid range 0-7.

uint8_t writeEnableActiveWidth: Minmum write enable active pulse width. T(waw)=T(lcdic_clk)*writeEnableActiveWidth, valid range 0-63.

uint8_t writeEnableInactiveWidth: Minmum write enable inactive pulse width. T(wiw)=T(lcdic_clk)*writeEnableInactiveWidth, valid range 0-63.

uint8_t readEnableActiveWidth: Minmum read enable active pulse width. T(raw)=T(lcdic_clk)*readEnableActiveWidth, valid range 0-255.

uint8_t readEnableInactiveWidth: Minmum read enable inactive pulse width. T(riw)=T(lcdic_clk)*readEnableInactiveWidth, valid range 0-255.

uint8_t spiCtrlFlags: SPI control flags, it is OR’ed value of _lcdic_spi_ctrl_flags.

uint8_t teTimeoutTime_Timer1: Tearing effect timeout time. T(te_to)=T(timer1)*teTimeoutTime_Timer1.

uint8_t teSyncWaitTime_Timer1: Tearing effect signal synchronization wait time. T(tew)=T(timer1)*teSyncWaitTime_Timer1.

uint8_t cmdShortTimeout_Timer0: Command short timeout. T(cmd_short_to)=T(timer0)*cmdShortTimeout_Timer0.

uint8_t cmdLongTimeout_Timer1: Command long timeout. T(cmd_long_to)=T(timer1)*cmdLongTimeout_Timer1.

union _lcdic_trx_cmd

#include <fsl_lcdic.h>

LCDIC TRX command.

Public Members

struct _lcdic_trx_cmd bits

uint32_t u32

struct _lcdic_repeat_tx_xfer

#include <fsl_lcdic.h>

LCDIC repeat data TX transfer structure.

Public Members

uint8_t cmd: Command.

uint8_t teSyncMode: TE sync mode, see _lcdic_te_sync_mode.

uint8_t trxTimeoutMode: TRX command timeout mode, see _lcdic_trx_timeout_mode.

uint8_t dataFormat: Data format, see _lcdic_data_format.

uint32_t dataLen: Data length.

uint32_t txRepeatData: The repeat data.

struct _lcdic_tx_xfer

#include <fsl_lcdic.h>

LCDIC data array TX transfer structure.

Public Members

uint8_t cmd: Command.

uint8_t teSyncMode: TE sync mode, see _lcdic_te_sync_mode.

uint8_t trxTimeoutMode: TRX command timeout mode, see _lcdic_trx_timeout_mode.

uint8_t dataFormat: Data format, see _lcdic_data_format.

uint32_t dataLen: Data length.

const uint8_t *txData: The data to send.

struct _lcdic_rx_xfer

#include <fsl_lcdic.h>

LCDIC data array RX transfer structure.

Public Members

uint8_t cmd: Command.

uint8_t dummyCount: Dummy cycle between TX and RX, only used for SPI mode.

uint8_t trxTimeoutMode: TRX command timeout mode, see _lcdic_trx_timeout_mode.

uint8_t dataFormat: Data format, see _lcdic_data_format.

uint32_t dataLen: Data length.

uint8_t *rxData: Pointer to the data receive array.

struct _lcdic_xfer

#include <fsl_lcdic.h>

LCDIC transfer structure.

Public Members

lcdic_xfer_mode_t mode: Transfer mode.

struct _lcdic_handle

#include <fsl_lcdic.h>

LCDIC handle structure.

Public Members

volatile bool xferInProgress: Transfer in progress.

lcdic_xfer_mode_t xferMode: On-going transfer mode.

lcdic_transfer_callback_t callback: Callback function.

void *userData: LCDIC callback function parameter.

uint32_t xferSizeWordAligned: 4-byte aligned part of the transfer size.

uint8_t xferSizeWordUnaligned: 4-byte unaligned part of the transfer size.

uint32_t tmpData: Temp data for driver internal use.

struct bits

Public Members

uint32_t dataLen: Data length in bytes, transfered byte is dataLen + 1.

uint32_t dummyCount: Dummy cycle count between TX and RX (for SPI only).

uint32_t useAutoRepeat: Use auto repeat mode or not.

uint32_t teSyncMode: TE sync mode, see _lcdic_te_sync_mode.

uint32_t trxTimeoutMode: TRX command timeout mode, see _lcdic_trx_timeout_mode.

uint32_t dataFormat: Data format, see _lcdic_data_format.

uint32_t enableCmdDoneInt: Enable command done interrupt or not.

uint32_t cmdOrData: Command or data, see _lcdic_dc.

uint32_t trx: TX or TX, see _lcdic_trx.

union __unnamed35__

Public Members

uint8_t cmdToSendOnly: Command to send in mode kLCDIC_XferCmdOnly.

lcdic_repeat_tx_xfer_t repeatTxXfer: For mode kLCDIC_XferSendRepeatData.

lcdic_tx_xfer_t txXfer: For mode kLCDIC_XferSendDataArray.

lcdic_rx_xfer_t rxXfer: For mode kLCDIC_XferReceiveDataArray.

union __unnamed37__

Public Members

const uint8_t *txData: Data array to send.

uint8_t *rxData: RX data array.

LCDIC DMA Driver

status_t LCDIC_TransferCreateHandleDMA(LCDIC_Type *base, lcdic_dma_handle_t *handle, lcdic_dma_callback_t callback, void *userData, dma_handle_t *txDmaHandle, dma_handle_t *rxDmaHandle, dma_descriptor_t dmaDesc[2])

Initialize the LCDIC DMA handle.

This function initializes the LCDIC DMA handle which can be used for other LCDIC transactional APIs. Usually, for a specified LCDIC instance, user need only call this API once to get the initialized handle.

Parameters:

base – LCDIC peripheral base address.
handle – LCDIC handle pointer.
callback – User callback function called at the end of a transfer.
userData – User data for callback.
txDmaHandle – DMA handle pointer for LCDIC Tx, the handle shall be static allocated by users.
rxDmaHandle – DMA handle pointer for LCDIC Rx, the handle shall be static allocated by users.
dmaDesc – User allocated dma descriptor, it should be in non-cacheable region and 16-byte aligned.

status_t LCDIC_TransferDMA(LCDIC_Type *base, lcdic_dma_handle_t *handle, const lcdic_xfer_t *xfer)

Perform a non-blocking LCDIC transfer using DMA.

This function returned immediately after transfer initiates, monitor the transfer done by callback.

Parameters:

base – LCDIC peripheral base address.
handle – LCDIC DMA handle pointer.
xfer – Pointer to dma transfer structure.

Return values:

kStatus_Success – Successfully start a transfer.
kStatus_InvalidArgument – Input argument is invalid.
kStatus_Busy – LCDIC is not idle, is running another transfer.

status_t LCDIC_SendDataArrayDMA(LCDIC_Type *base, lcdic_dma_handle_t *handle, const lcdic_tx_xfer_t *xfer)

Send data array using DMA.

Parameters:

base – LCDIC peripheral base address.
handle – Pointer to the lcdic_handle_t structure to store the transfer state.
xfer – LCDIC transfer structure.

Return values:

kStatus_Success – Successfully start a transfer.
kStatus_InvalidArgument – Input argument is invalid.
kStatus_Busy – LCDIC driver is busy with another transfer.

status_t LCDIC_ReadDataArrayDMA(LCDIC_Type *base, lcdic_dma_handle_t *handle, const lcdic_rx_xfer_t *xfer)

Read data array using DMA.

Parameters:

base – LCDIC peripheral base address.
handle – Pointer to the lcdic_handle_t structure to store the transfer state.
xfer – LCDIC transfer structure.

Return values:

kStatus_Success – Successfully start a transfer.
kStatus_InvalidArgument – Input argument is invalid.
kStatus_Busy – LCDIC driver is busy with another transfer.

void LCDIC_TransferHandleIRQDMA(LCDIC_Type *base, void *handle)

LCDIC IRQ handler function work with DMA transactional APIs.

IRQ handler to work with LCDIC_TransferDMA.

Parameters:

base – LCDIC peripheral base address.
handle – Pointer to the lcdic_dma_handle_t structure to store the transfer state.

FSL_LCDIC_DMA_DRIVER_VERSION

typedef struct _lcdic_dma_handle lcdic_dma_handle_t

typedef void (*lcdic_dma_callback_t)(LCDIC_Type *base, lcdic_dma_handle_t *handle, status_t status, void *userData): LCDIC DMA callback called at the end of transfer.

struct _lcdic_dma_handle

#include <fsl_lcdic_dma.h>

LCDIC DMA transfer handle, users should not touch the content of the handle.

Public Members

volatile bool xferInProgress: Transfer in progress

lcdic_xfer_mode_t xferMode: On-going transfer mode.

dma_handle_t *txDmaHandle: DMA handler for send

dma_handle_t *rxDmaHandle: DMA handler for receive

lcdic_dma_callback_t callback: Callback when transfer finished.

void *userData: User Data for callback

uint32_t xferSizeWordAligned: 4-byte size aligned part or the transfer data size.

uint8_t xferSizeWordUnaligned: 4-byte size unaligned part of the transfer data size.

uint8_t rxSizeWordUnaligned: Same as xferSizeWordUnaligned, it is only used for RX.

uint32_t tmpData: To save temporary data during transfer.

dma_descriptor_t *dmaDesc: Pointer to two DMA descriptor, should be 16-byte aligned.

union __unnamed24__

Public Members

const uint8_t *txData: Pointer to the TX data.

uint8_t *rxData: Pointer to the RX data.

LCDIC: LCD Interface Controller

GPIO: General Purpose I/O

void GPIO_PortInit(GPIO_Type *base, uint32_t port)

Initializes the GPIO peripheral.

This function ungates the GPIO clock.

Parameters:

base – GPIO peripheral base pointer.
port – GPIO port number.

void GPIO_PinInit(GPIO_Type *base, uint32_t port, uint32_t pin, const gpio_pin_config_t *config)

Initializes a GPIO pin used by the board.

To initialize the GPIO, define a pin configuration, either input or output, in the user file. Then, call the GPIO_PinInit() function.

This is an example to define an input pin or output pin configuration:

Define a digital input pin configuration,
gpio_pin_config_t config =
{
  kGPIO_DigitalInput,
  0,
}
Define a digital output pin configuration,
gpio_pin_config_t config =
{
  kGPIO_DigitalOutput,
  0,
}

Parameters:

base – GPIO peripheral base pointer(Typically GPIO)
port – GPIO port number
pin – GPIO pin number
config – GPIO pin configuration pointer

static inline void GPIO_PinWrite(GPIO_Type *base, uint32_t port, uint32_t pin, uint8_t output)

Sets the output level of the one GPIO pin to the logic 1 or 0.

Parameters:

base – GPIO peripheral base pointer(Typically GPIO)
port – GPIO port number
pin – GPIO pin number
output – GPIO pin output logic level.
- 0: corresponding pin output low-logic level.
- 1: corresponding pin output high-logic level.

static inline uint32_t GPIO_PinRead(GPIO_Type *base, uint32_t port, uint32_t pin)

Reads the current input value of the GPIO PIN.

Parameters:

base – GPIO peripheral base pointer(Typically GPIO)
port – GPIO port number
pin – GPIO pin number

Return values:

GPIO – port input value

0: corresponding pin input low-logic level.
1: corresponding pin input high-logic level.

FSL_GPIO_DRIVER_VERSION: LPC GPIO driver version.

enum _gpio_pin_direction

LPC GPIO direction definition.

Values:

enumerator kGPIO_DigitalInput: Set current pin as digital input

enumerator kGPIO_DigitalOutput: Set current pin as digital output

enum _gpio_pin_enable_mode

GPIO Pin Interrupt enable mode.

Values:

enumerator kGPIO_PinIntEnableLevel: Generate Pin Interrupt on level mode

enumerator kGPIO_PinIntEnableEdge: Generate Pin Interrupt on edge mode

enum _gpio_pin_enable_polarity

GPIO Pin Interrupt enable polarity.

Values:

enumerator kGPIO_PinIntEnableHighOrRise: Generate Pin Interrupt on high level or rising edge

enumerator kGPIO_PinIntEnableLowOrFall: Generate Pin Interrupt on low level or falling edge

enum _gpio_interrupt_index

LPC GPIO interrupt index definition.

Values:

enumerator kGPIO_InterruptA: Set current pin as interrupt A

enumerator kGPIO_InterruptB: Set current pin as interrupt B

typedef enum _gpio_pin_direction gpio_pin_direction_t: LPC GPIO direction definition.

typedef struct _gpio_pin_config gpio_pin_config_t

The GPIO pin configuration structure.

Every pin can only be configured as either output pin or input pin at a time. If configured as a input pin, then leave the outputConfig unused.

typedef enum _gpio_pin_enable_mode gpio_pin_enable_mode_t: GPIO Pin Interrupt enable mode.

typedef enum _gpio_pin_enable_polarity gpio_pin_enable_polarity_t: GPIO Pin Interrupt enable polarity.

typedef enum _gpio_interrupt_index gpio_interrupt_index_t: LPC GPIO interrupt index definition.

typedef struct _gpio_interrupt_config gpio_interrupt_config_t: Configures the interrupt generation condition.

static inline void GPIO_PortSet(GPIO_Type *base, uint32_t port, uint32_t mask)

Sets the output level of the multiple GPIO pins to the logic 1.

Parameters:

base – GPIO peripheral base pointer(Typically GPIO)
port – GPIO port number
mask – GPIO pin number macro

static inline void GPIO_PortClear(GPIO_Type *base, uint32_t port, uint32_t mask)

Sets the output level of the multiple GPIO pins to the logic 0.

Parameters:

base – GPIO peripheral base pointer(Typically GPIO)
port – GPIO port number
mask – GPIO pin number macro

static inline void GPIO_PortToggle(GPIO_Type *base, uint32_t port, uint32_t mask)

Reverses current output logic of the multiple GPIO pins.

Parameters:

base – GPIO peripheral base pointer(Typically GPIO)
port – GPIO port number
mask – GPIO pin number macro

GPIO_PIN_INT_LEVEL

GPIO_PIN_INT_EDGE

PINT_PIN_INT_HIGH_OR_RISE_TRIGGER

PINT_PIN_INT_LOW_OR_FALL_TRIGGER

struct _gpio_pin_config

#include <fsl_gpio.h>

The GPIO pin configuration structure.

Every pin can only be configured as either output pin or input pin at a time. If configured as a input pin, then leave the outputConfig unused.

Public Members

gpio_pin_direction_t pinDirection: GPIO direction, input or output

uint8_t outputLogic: Set default output logic, no use in input

struct _gpio_interrupt_config: #include <fsl_gpio.h>

Configures the interrupt generation condition.

MRT: Multi-Rate Timer

void MRT_Init(MRT_Type *base, const mrt_config_t *config)

Ungates the MRT clock and configures the peripheral for basic operation.

Note

This API should be called at the beginning of the application using the MRT driver.

Parameters:

base – Multi-Rate timer peripheral base address
config – Pointer to user’s MRT config structure. If MRT has MULTITASK bit field in MODCFG reigster, param config is useless.

void MRT_Deinit(MRT_Type *base)

Gate the MRT clock.

Parameters:

base – Multi-Rate timer peripheral base address

static inline void MRT_GetDefaultConfig(mrt_config_t *config)

Fill in the MRT config struct with the default settings.

The default values are:

config->enableMultiTask = false;

Parameters:

config – Pointer to user’s MRT config structure.

static inline void MRT_SetupChannelMode(MRT_Type *base, mrt_chnl_t channel, const mrt_timer_mode_t mode)

Sets up an MRT channel mode.

Parameters:

base – Multi-Rate timer peripheral base address
channel – Channel that is being configured.
mode – Timer mode to use for the channel.

static inline void MRT_EnableInterrupts(MRT_Type *base, mrt_chnl_t channel, uint32_t mask)

Enables the MRT interrupt.

Parameters:

base – Multi-Rate timer peripheral base address
channel – Timer channel number
mask – The interrupts to enable. This is a logical OR of members of the enumeration mrt_interrupt_enable_t

static inline void MRT_DisableInterrupts(MRT_Type *base, mrt_chnl_t channel, uint32_t mask)

Disables the selected MRT interrupt.

Parameters:

base – Multi-Rate timer peripheral base address
channel – Timer channel number
mask – The interrupts to disable. This is a logical OR of members of the enumeration mrt_interrupt_enable_t

static inline uint32_t MRT_GetEnabledInterrupts(MRT_Type *base, mrt_chnl_t channel)

Gets the enabled MRT interrupts.

Parameters:

base – Multi-Rate timer peripheral base address
channel – Timer channel number

Returns:

The enabled interrupts. This is the logical OR of members of the enumeration mrt_interrupt_enable_t

static inline uint32_t MRT_GetStatusFlags(MRT_Type *base, mrt_chnl_t channel)

Gets the MRT status flags.

Parameters:

base – Multi-Rate timer peripheral base address
channel – Timer channel number

Returns:

The status flags. This is the logical OR of members of the enumeration mrt_status_flags_t

static inline void MRT_ClearStatusFlags(MRT_Type *base, mrt_chnl_t channel, uint32_t mask)

Clears the MRT status flags.

Parameters:

base – Multi-Rate timer peripheral base address
channel – Timer channel number
mask – The status flags to clear. This is a logical OR of members of the enumeration mrt_status_flags_t

void MRT_UpdateTimerPeriod(MRT_Type *base, mrt_chnl_t channel, uint32_t count, bool immediateLoad)

Used to update the timer period in units of count.

The new value will be immediately loaded or will be loaded at the end of the current time interval. For one-shot interrupt mode the new value will be immediately loaded.

Note

User can call the utility macros provided in fsl_common.h to convert to ticks

Parameters:

base – Multi-Rate timer peripheral base address
channel – Timer channel number
count – Timer period in units of ticks
immediateLoad – true: Load the new value immediately into the TIMER register; false: Load the new value at the end of current timer interval

static inline uint32_t MRT_GetCurrentTimerCount(MRT_Type *base, mrt_chnl_t channel)

Reads the current timer counting value.

This function returns the real-time timer counting value, in a range from 0 to a timer period.

Note

User can call the utility macros provided in fsl_common.h to convert ticks to usec or msec

Parameters:

base – Multi-Rate timer peripheral base address
channel – Timer channel number

Returns:

Current timer counting value in ticks

static inline void MRT_StartTimer(MRT_Type *base, mrt_chnl_t channel, uint32_t count)

Starts the timer counting.

After calling this function, timers load period value, counts down to 0 and depending on the timer mode it will either load the respective start value again or stop.

Note

User can call the utility macros provided in fsl_common.h to convert to ticks

Parameters:

base – Multi-Rate timer peripheral base address
channel – Timer channel number.
count – Timer period in units of ticks. Count can contain the LOAD bit, which control the force load feature.

static inline void MRT_StopTimer(MRT_Type *base, mrt_chnl_t channel)

Stops the timer counting.

This function stops the timer from counting.

Parameters:

base – Multi-Rate timer peripheral base address
channel – Timer channel number.

static inline uint32_t MRT_GetIdleChannel(MRT_Type *base)

Find the available channel.

This function returns the lowest available channel number.

Parameters:

base – Multi-Rate timer peripheral base address

static inline void MRT_ReleaseChannel(MRT_Type *base, mrt_chnl_t channel)

Release the channel when the timer is using the multi-task mode.

In multi-task mode, the INUSE flags allow more control over when MRT channels are released for further use. The user can hold on to a channel acquired by calling MRT_GetIdleChannel() for as long as it is needed and release it by calling this function. This removes the need to ask for an available channel for every use.

Parameters:

base – Multi-Rate timer peripheral base address
channel – Timer channel number.

FSL_MRT_DRIVER_VERSION

enum _mrt_chnl

List of MRT channels.

Values:

enumerator kMRT_Channel_0: MRT channel number 0

enumerator kMRT_Channel_1: MRT channel number 1

enumerator kMRT_Channel_2: MRT channel number 2

enumerator kMRT_Channel_3: MRT channel number 3

enum _mrt_timer_mode

List of MRT timer modes.

Values:

enumerator kMRT_RepeatMode: Repeat Interrupt mode

enumerator kMRT_OneShotMode: One-shot Interrupt mode

enumerator kMRT_OneShotStallMode: One-shot stall mode

enum _mrt_interrupt_enable

List of MRT interrupts.

Values:

enumerator kMRT_TimerInterruptEnable: Timer interrupt enable

enum _mrt_status_flags

List of MRT status flags.

Values:

enumerator kMRT_TimerInterruptFlag: Timer interrupt flag

enumerator kMRT_TimerRunFlag: Indicates state of the timer

typedef enum _mrt_chnl mrt_chnl_t: List of MRT channels.

typedef enum _mrt_timer_mode mrt_timer_mode_t: List of MRT timer modes.

typedef enum _mrt_interrupt_enable mrt_interrupt_enable_t: List of MRT interrupts.

typedef enum _mrt_status_flags mrt_status_flags_t: List of MRT status flags.

typedef struct _mrt_config mrt_config_t

MRT configuration structure.

This structure holds the configuration settings for the MRT peripheral. To initialize this structure to reasonable defaults, call the MRT_GetDefaultConfig() function and pass a pointer to your config structure instance.

The config struct can be made const so it resides in flash

struct _mrt_config

#include <fsl_mrt.h>

MRT configuration structure.

This structure holds the configuration settings for the MRT peripheral. To initialize this structure to reasonable defaults, call the MRT_GetDefaultConfig() function and pass a pointer to your config structure instance.

The config struct can be made const so it resides in flash

Public Members

bool enableMultiTask: true: Timers run in multi-task mode; false: Timers run in hardware status mode

This type defines status return values used by NBOOT functions that are not easily disturbed by Fault Attacks

kStatus_NBOOT_Success: Operation completed successfully.

kStatus_NBOOT_Fail: Operation failed.

kStatus_NBOOT_InvalidArgument: Invalid argument passed to the function.

kStatus_NBOOT_RequestTimeout: Operation timed out.

kStatus_NBOOT_KeyNotLoaded: The requested key is not loaded.

kStatus_NBOOT_AuthFail: Authentication failed.

kStatus_NBOOT_OperationNotAvaialable: Operation not available on this HW.

kStatus_NBOOT_KeyNotAvailable: Key is not avaialble.

kStatus_NBOOT_IvCounterOverflow: Overflow of IV counter (PRINCE/IPED).

kStatus_NBOOT_SelftestFail: FIPS self-test failure.

kStatus_NBOOT_InvalidDataFormat: Invalid data format for example antipole

kStatus_NBOOT_IskCertUserDataTooBig: Size of User data in ISK certificate is greater than 96 bytes

kStatus_NBOOT_IskCertSignatureOffsetTooSmall: Signature offset in ISK certificate is smaller than expected

kStatus_NBOOT_MemcpyFail: Unexpected error detected during nboot_memcpy()

NXPCLCSS_HASH_RTF_OUTPUT_SIZE: Size of run-time fingerprint appended to the hash in pDigest in bytes, if #NXPCLCSS_HASH_RTF_OUTPUT_ENABLE was specified.

NXPCLHASH_WA_SIZE_MAX

OCOTP Driver

OTP Status Group.

Values:

enumerator kStatusGroup_OtpGroup

OTP Error Status definitions.

Values:

enumerator kStatus_OTP_InvalidAddress: Invalid OTP address

enumerator kStatus_OTP_Timeout: OTP operation time out

status_t OCOTP_OtpInit(void)

Initialize OTP controller.

This function enables OTP Controller clock.

Returns:: kStatus_Success

status_t OCOTP_OtpDeinit(void)

De-Initialize OTP controller.

This functin disables OTP Controller Clock.

Returns:: kStatus_Success

status_t OCOTP_OtpFuseRead(uint32_t addr, uint32_t *data)

Read Fuse value from OTP Fuse Block.

This function read fuse data from OTP Fuse block to specified data buffer.

Parameters:

addr – Fuse address
data – Buffer to hold the data read from OTP Fuse block

Returns:

kStatus_Success - Data read from OTP Fuse block successfully kStatus_OTP_Timeout - OTP read timeout kStatus_InvalidArgument - data pointer is invalid

status_t OCOTP_ReadSocOtp(uint64_t *data, uint32_t tag)

Read Fuse line with specific tag value from SoC OTP.

This function read Fuse line with specific tag value from SoC OTP to specified data buffer.

Parameters:

data – Buffer to hold the data read from SoC OTP
tag – Tag value to match

Returns:

kStatus_Success - Data read from SoC OTP successfully kStatus_Fail - Data read from SoC OTP failed, or cannot find the tag kStatus_InvalidArgument - data pointer is invalid

status_t OCOTP_ReadUniqueID(uint8_t *uid, uint32_t *idLen)

Read unique ID from OTP Fuse Block.

This function read unique ID from OTP Fuse block to specified data buffer.

Parameters:

uid – The buffer to store unique ID, buffer byte length is FSL_OCOTP_UID_LENGTH.
idLen[in/out] – The unique ID byte length. Set the length to read, return the length read out.

Returns:

kStatus_Success - Data read from OTP Fuse block successfully kStatus_OTP_Timeout - OTP read timeout kStatus_InvalidArgument - data pointer is invalid

status_t OCOTP_ReadSVC(uint64_t *svc)

Read Static Voltage Compansation from SOC OTP.

This function read SVC from OTP Fuse block to specified data buffer.

Parameters:

svc – The buffer to store SVC.

Returns:

kStatus_Success - Data read from SOC OTP successfully kStatus_Fail - SOC OTP read failure

status_t OCOTP_ReadPackage(uint32_t *pack)

Read package type from SOC OTP.

Parameters:

pack – The buffer to store package type.

Returns:

kStatus_Success - Data read from SOC OTP successfully kStatus_Fail - SOC OTP read failure

FSL_OCOTP_DRIVER_VERSION: OCOTP driver version 2.2.2.

FSL_OCOTP_UID_LENGTH: OCOTP unique ID length.

OSTIMER: OS Event Timer Driver

void OSTIMER_Init(OSTIMER_Type *base): Initializes an OSTIMER by turning its bus clock on.

void OSTIMER_Deinit(OSTIMER_Type *base)

Deinitializes a OSTIMER instance.

This function shuts down OSTIMER bus clock

Parameters:

base – OSTIMER peripheral base address.

uint64_t OSTIMER_GrayToDecimal(uint64_t gray)

Translate the value from gray-code to decimal.

Parameters:

gray – The gray value input.

Returns:

The decimal value.

static inline uint64_t OSTIMER_DecimalToGray(uint64_t dec)

Translate the value from decimal to gray-code.

Parameters:

dec – The decimal value.

Returns:

The gray code of the input value.

uint32_t OSTIMER_GetStatusFlags(OSTIMER_Type *base)

Get OSTIMER status Flags.

This returns the status flag. Currently, only match interrupt flag can be got.

Parameters:

base – OSTIMER peripheral base address.

Returns:

status register value

void OSTIMER_ClearStatusFlags(OSTIMER_Type *base, uint32_t mask)

Clear Status Interrupt Flags.

This clears intrrupt status flag. Currently, only match interrupt flag can be cleared.

Parameters:

base – OSTIMER peripheral base address.
mask – Clear bit mask.

Returns:

none

status_t OSTIMER_SetMatchRawValue(OSTIMER_Type *base, uint64_t count, ostimer_callback_t cb)

Set the match raw value for OSTIMER.

This function will set a match value for OSTIMER with an optional callback. And this callback will be called while the data in dedicated pair match register is equals to the value of central EVTIMER. Please note that, the data format is gray-code, if decimal data was desired, please using OSTIMER_SetMatchValue().

Parameters:

base – OSTIMER peripheral base address.
count – OSTIMER timer match value.(Value is gray-code format)
cb – OSTIMER callback (can be left as NULL if none, otherwise should be a void func(void)).

Return values:

kStatus_Success – - Set match raw value and enable interrupt Successfully.
kStatus_Fail – - Set match raw value fail.

status_t OSTIMER_SetMatchValue(OSTIMER_Type *base, uint64_t count, ostimer_callback_t cb)

Set the match value for OSTIMER.

This function will set a match value for OSTIMER with an optional callback. And this callback will be called while the data in dedicated pair match register is equals to the value of central OS TIMER.

Parameters:

base – OSTIMER peripheral base address.
count – OSTIMER timer match value.(Value is decimal format, and this value will be translate to Gray code internally.)
cb – OSTIMER callback (can be left as NULL if none, otherwise should be a void func(void)).

Return values:

kStatus_Success – - Set match value and enable interrupt Successfully.
kStatus_Fail – - Set match value fail.

static inline void OSTIMER_SetMatchRegister(OSTIMER_Type *base, uint64_t value)

Set value to OSTIMER MATCH register directly.

This function writes the input value to OSTIMER MATCH register directly, it does not touch any other registers. Note that, the data format is gray-code. The function OSTIMER_DecimalToGray could convert decimal value to gray code.

Parameters:

base – OSTIMER peripheral base address.
value – OSTIMER timer match value (Value is gray-code format).

static inline void OSTIMER_EnableMatchInterrupt(OSTIMER_Type *base)

Enable the OSTIMER counter match interrupt.

Enable the timer counter match interrupt. The interrupt happens when OSTIMER counter matches the value in MATCH registers.

Parameters:

base – OSTIMER peripheral base address.

static inline void OSTIMER_DisableMatchInterrupt(OSTIMER_Type *base)

Disable the OSTIMER counter match interrupt.

Disable the timer counter match interrupt. The interrupt happens when OSTIMER counter matches the value in MATCH registers.

Parameters:

base – OSTIMER peripheral base address.

static inline uint64_t OSTIMER_GetCurrentTimerRawValue(OSTIMER_Type *base)

Get current timer raw count value from OSTIMER.

This function will get a gray code type timer count value from OS timer register. The raw value of timer count is gray code format.

Parameters:

base – OSTIMER peripheral base address.

Returns:

Raw value of OSTIMER, gray code format.

uint64_t OSTIMER_GetCurrentTimerValue(OSTIMER_Type *base)

Get current timer count value from OSTIMER.

This function will get a decimal timer count value. The RAW value of timer count is gray code format, will be translated to decimal data internally.

Parameters:

base – OSTIMER peripheral base address.

Returns:

Value of OSTIMER which will be formated to decimal value.

static inline uint64_t OSTIMER_GetCaptureRawValue(OSTIMER_Type *base)

Get the capture value from OSTIMER.

This function will get a captured gray-code value from OSTIMER. The Raw value of timer capture is gray code format.

Parameters:

base – OSTIMER peripheral base address.

Returns:

Raw value of capture register, data format is gray code.

uint64_t OSTIMER_GetCaptureValue(OSTIMER_Type *base)

Get the capture value from OSTIMER.

This function will get a capture decimal-value from OSTIMER. The RAW value of timer capture is gray code format, will be translated to decimal data internally.

Parameters:

base – OSTIMER peripheral base address.

Returns:

Value of capture register, data format is decimal.

void OSTIMER_HandleIRQ(OSTIMER_Type *base, ostimer_callback_t cb)

OS timer interrupt Service Handler.

This function handles the interrupt and refers to the callback array in the driver to callback user (as per request in OSTIMER_SetMatchValue()). if no user callback is scheduled, the interrupt will simply be cleared.

Parameters:

base – OS timer peripheral base address.
cb – callback scheduled for this instance of OS timer

Returns:

none

FSL_OSTIMER_DRIVER_VERSION: OSTIMER driver version.

enum _ostimer_flags

OSTIMER status flags.

Values:

enumerator kOSTIMER_MatchInterruptFlag: Match interrupt flag bit, sets if the match value was reached.

typedef void (*ostimer_callback_t)(void): ostimer callback function.

PINT: Pin Interrupt and Pattern Match Driver

FSL_PINT_DRIVER_VERSION

enum _pint_pin_enable

PINT Pin Interrupt enable type.

Values:

enumerator kPINT_PinIntEnableNone: Do not generate Pin Interrupt

enumerator kPINT_PinIntEnableRiseEdge: Generate Pin Interrupt on rising edge

enumerator kPINT_PinIntEnableFallEdge: Generate Pin Interrupt on falling edge

enumerator kPINT_PinIntEnableBothEdges: Generate Pin Interrupt on both edges

enumerator kPINT_PinIntEnableLowLevel: Generate Pin Interrupt on low level

enumerator kPINT_PinIntEnableHighLevel: Generate Pin Interrupt on high level

enum _pint_int

PINT Pin Interrupt type.

Values:

enumerator kPINT_PinInt0: Pin Interrupt 0

enum _pint_pmatch_input_src

PINT Pattern Match bit slice input source type.

Values:

enumerator kPINT_PatternMatchInp0Src: Input source 0

enumerator kPINT_PatternMatchInp1Src: Input source 1

enumerator kPINT_PatternMatchInp2Src: Input source 2

enumerator kPINT_PatternMatchInp3Src: Input source 3

enumerator kPINT_PatternMatchInp4Src: Input source 4

enumerator kPINT_PatternMatchInp5Src: Input source 5

enumerator kPINT_PatternMatchInp6Src: Input source 6

enumerator kPINT_PatternMatchInp7Src: Input source 7

enumerator kPINT_SecPatternMatchInp0Src: Input source 0

enumerator kPINT_SecPatternMatchInp1Src: Input source 1

enum _pint_pmatch_bslice

PINT Pattern Match bit slice type.

Values:

enumerator kPINT_PatternMatchBSlice0: Bit slice 0

enum _pint_pmatch_bslice_cfg

PINT Pattern Match configuration type.

Values:

enumerator kPINT_PatternMatchAlways: Always Contributes to product term match

enumerator kPINT_PatternMatchStickyRise: Sticky Rising edge

enumerator kPINT_PatternMatchStickyFall: Sticky Falling edge

enumerator kPINT_PatternMatchStickyBothEdges: Sticky Rising or Falling edge

enumerator kPINT_PatternMatchHigh: High level

enumerator kPINT_PatternMatchLow: Low level

enumerator kPINT_PatternMatchNever: Never contributes to product term match

enumerator kPINT_PatternMatchBothEdges: Either rising or falling edge

typedef enum _pint_pin_enable pint_pin_enable_t: PINT Pin Interrupt enable type.

typedef enum _pint_int pint_pin_int_t: PINT Pin Interrupt type.

typedef enum _pint_pmatch_input_src pint_pmatch_input_src_t: PINT Pattern Match bit slice input source type.

typedef enum _pint_pmatch_bslice pint_pmatch_bslice_t: PINT Pattern Match bit slice type.

typedef enum _pint_pmatch_bslice_cfg pint_pmatch_bslice_cfg_t: PINT Pattern Match configuration type.

typedef void (*pint_cb_t)(pint_pin_int_t pintr, uint32_t pmatch_status): PINT Callback function.

typedef struct _pint_pmatch_cfg pint_pmatch_cfg_t

void PINT_Init(PINT_Type *base)

Initialize PINT peripheral.

This function initializes the PINT peripheral and enables the clock.

Parameters:

base – Base address of the PINT peripheral.

Return values:

None. –

void PINT_PinInterruptConfig(PINT_Type *base, pint_pin_int_t intr, pint_pin_enable_t enable, pint_cb_t callback)

Configure PINT peripheral pin interrupt.

This function configures a given pin interrupt.

Parameters:

base – Base address of the PINT peripheral.
intr – Pin interrupt.
enable – Selects detection logic.
callback – Callback.

Return values:

None. –

void PINT_PinInterruptGetConfig(PINT_Type *base, pint_pin_int_t pintr, pint_pin_enable_t *enable, pint_cb_t *callback)

Get PINT peripheral pin interrupt configuration.

This function returns the configuration of a given pin interrupt.

Parameters:

base – Base address of the PINT peripheral.
pintr – Pin interrupt.
enable – Pointer to store the detection logic.
callback – Callback.

Return values:

None. –

void PINT_PinInterruptClrStatus(PINT_Type *base, pint_pin_int_t pintr)

Clear Selected pin interrupt status only when the pin was triggered by edge-sensitive.

This function clears the selected pin interrupt status.

Parameters:

base – Base address of the PINT peripheral.
pintr – Pin interrupt.

Return values:

None. –

static inline uint32_t PINT_PinInterruptGetStatus(PINT_Type *base, pint_pin_int_t pintr)

Get Selected pin interrupt status.

This function returns the selected pin interrupt status.

Parameters:

base – Base address of the PINT peripheral.
pintr – Pin interrupt.

Return values:

status – = 0 No pin interrupt request. = 1 Selected Pin interrupt request active.

void PINT_PinInterruptClrStatusAll(PINT_Type *base)

Clear all pin interrupts status only when pins were triggered by edge-sensitive.

This function clears the status of all pin interrupts.

Parameters:

base – Base address of the PINT peripheral.

Return values:

None. –

static inline uint32_t PINT_PinInterruptGetStatusAll(PINT_Type *base)

Get all pin interrupts status.

This function returns the status of all pin interrupts.

Parameters:

base – Base address of the PINT peripheral.

Return values:

status – Each bit position indicates the status of corresponding pin interrupt. = 0 No pin interrupt request. = 1 Pin interrupt request active.

static inline void PINT_PinInterruptClrFallFlag(PINT_Type *base, pint_pin_int_t pintr)

Clear Selected pin interrupt fall flag.

This function clears the selected pin interrupt fall flag.

Parameters:

base – Base address of the PINT peripheral.
pintr – Pin interrupt.

Return values:

None. –

static inline uint32_t PINT_PinInterruptGetFallFlag(PINT_Type *base, pint_pin_int_t pintr)

Get selected pin interrupt fall flag.

This function returns the selected pin interrupt fall flag.

Parameters:

base – Base address of the PINT peripheral.
pintr – Pin interrupt.

Return values:

flag – = 0 Falling edge has not been detected. = 1 Falling edge has been detected.

static inline void PINT_PinInterruptClrFallFlagAll(PINT_Type *base)

Clear all pin interrupt fall flags.

This function clears the fall flag for all pin interrupts.

Parameters:

base – Base address of the PINT peripheral.

Return values:

None. –

static inline uint32_t PINT_PinInterruptGetFallFlagAll(PINT_Type *base)

Get all pin interrupt fall flags.

This function returns the fall flag of all pin interrupts.

Parameters:

base – Base address of the PINT peripheral.

Return values:

flags – Each bit position indicates the falling edge detection of the corresponding pin interrupt. 0 Falling edge has not been detected. = 1 Falling edge has been detected.

static inline void PINT_PinInterruptClrRiseFlag(PINT_Type *base, pint_pin_int_t pintr)

Clear Selected pin interrupt rise flag.

This function clears the selected pin interrupt rise flag.

Parameters:

base – Base address of the PINT peripheral.
pintr – Pin interrupt.

Return values:

None. –

static inline uint32_t PINT_PinInterruptGetRiseFlag(PINT_Type *base, pint_pin_int_t pintr)

Get selected pin interrupt rise flag.

This function returns the selected pin interrupt rise flag.

Parameters:

base – Base address of the PINT peripheral.
pintr – Pin interrupt.

Return values:

flag – = 0 Rising edge has not been detected. = 1 Rising edge has been detected.

static inline void PINT_PinInterruptClrRiseFlagAll(PINT_Type *base)

Clear all pin interrupt rise flags.

This function clears the rise flag for all pin interrupts.

Parameters:

base – Base address of the PINT peripheral.

Return values:

None. –

static inline uint32_t PINT_PinInterruptGetRiseFlagAll(PINT_Type *base)

Get all pin interrupt rise flags.

This function returns the rise flag of all pin interrupts.

Parameters:

base – Base address of the PINT peripheral.

Return values:

flags – Each bit position indicates the rising edge detection of the corresponding pin interrupt. 0 Rising edge has not been detected. = 1 Rising edge has been detected.

void PINT_PatternMatchConfig(PINT_Type *base, pint_pmatch_bslice_t bslice, pint_pmatch_cfg_t *cfg)

Configure PINT pattern match.

This function configures a given pattern match bit slice.

Parameters:

base – Base address of the PINT peripheral.
bslice – Pattern match bit slice number.
cfg – Pointer to bit slice configuration.

Return values:

None. –

void PINT_PatternMatchGetConfig(PINT_Type *base, pint_pmatch_bslice_t bslice, pint_pmatch_cfg_t *cfg)

Get PINT pattern match configuration.

This function returns the configuration of a given pattern match bit slice.

Parameters:

base – Base address of the PINT peripheral.
bslice – Pattern match bit slice number.
cfg – Pointer to bit slice configuration.

Return values:

None. –

static inline uint32_t PINT_PatternMatchGetStatus(PINT_Type *base, pint_pmatch_bslice_t bslice)

Get pattern match bit slice status.

This function returns the status of selected bit slice.

Parameters:

base – Base address of the PINT peripheral.
bslice – Pattern match bit slice number.

Return values:

status – = 0 Match has not been detected. = 1 Match has been detected.

static inline uint32_t PINT_PatternMatchGetStatusAll(PINT_Type *base)

Get status of all pattern match bit slices.

This function returns the status of all bit slices.

Parameters:

base – Base address of the PINT peripheral.

Return values:

status – Each bit position indicates the match status of corresponding bit slice. = 0 Match has not been detected. = 1 Match has been detected.

uint32_t PINT_PatternMatchResetDetectLogic(PINT_Type *base)

Reset pattern match detection logic.

This function resets the pattern match detection logic if any of the product term is matching.

Parameters:

base – Base address of the PINT peripheral.

Return values:

pmstatus – Each bit position indicates the match status of corresponding bit slice. = 0 Match was detected. = 1 Match was not detected.

static inline void PINT_PatternMatchEnable(PINT_Type *base)

Enable pattern match function.

This function enables the pattern match function.

Parameters:

base – Base address of the PINT peripheral.

Return values:

None. –

static inline void PINT_PatternMatchDisable(PINT_Type *base)

Disable pattern match function.

This function disables the pattern match function.

Parameters:

base – Base address of the PINT peripheral.

Return values:

None. –

static inline void PINT_PatternMatchEnableRXEV(PINT_Type *base)

Enable RXEV output.

This function enables the pattern match RXEV output.

Parameters:

base – Base address of the PINT peripheral.

Return values:

None. –

static inline void PINT_PatternMatchDisableRXEV(PINT_Type *base)

Disable RXEV output.

This function disables the pattern match RXEV output.

Parameters:

base – Base address of the PINT peripheral.

Return values:

None. –

void PINT_EnableCallback(PINT_Type *base)

Enable callback.

This function enables the interrupt for the selected PINT peripheral. Although the pin(s) are monitored as soon as they are enabled, the callback function is not enabled until this function is called.

Parameters:

base – Base address of the PINT peripheral.

Return values:

None. –

void PINT_DisableCallback(PINT_Type *base)

Disable callback.

This function disables the interrupt for the selected PINT peripheral. Although the pins are still being monitored but the callback function is not called.

Parameters:

base – Base address of the peripheral.

Return values:

None. –

void PINT_Deinit(PINT_Type *base)

Deinitialize PINT peripheral.

This function disables the PINT clock.

Parameters:

base – Base address of the PINT peripheral.

Return values:

None. –

void PINT_EnableCallbackByIndex(PINT_Type *base, pint_pin_int_t pintIdx)

enable callback by pin index.

This function enables callback by pin index instead of enabling all pins.

Parameters:

base – Base address of the peripheral.
pintIdx – pin index.

Return values:

None. –

void PINT_DisableCallbackByIndex(PINT_Type *base, pint_pin_int_t pintIdx)

disable callback by pin index.

This function disables callback by pin index instead of disabling all pins.

Parameters:

base – Base address of the peripheral.
pintIdx – pin index.

Return values:

None. –

PININT_BITSLICE_SRC_START

PININT_BITSLICE_SRC_MASK

PININT_BITSLICE_CFG_START

PININT_BITSLICE_CFG_MASK

PININT_BITSLICE_ENDP_MASK

PINT_PIN_INT_LEVEL

PINT_PIN_INT_EDGE

PINT_PIN_INT_FALL_OR_HIGH_LEVEL

PINT_PIN_INT_RISE

PINT_PIN_RISE_EDGE

PINT_PIN_FALL_EDGE

PINT_PIN_BOTH_EDGE

PINT_PIN_LOW_LEVEL

PINT_PIN_HIGH_LEVEL

struct _pint_pmatch_cfg: #include <fsl_pint.h>

Power Driver

enum _power_wakeup_edge

Pin edge for wakeup.

Values:

enumerator kPOWER_WakeupEdgeLow: Wakeup on pin low level.

enumerator kPOWER_WakeupEdgeHigh: Wakeup on pin high level.

enum _power_wakeup_pin

Wakeup pin.

Values:

enumerator kPOWER_WakeupPin0: Wakeup0 pin.

enumerator kPOWER_WakeupPin1: Wakeup1 pin.

enum _power_reset_cause

Reset cause.

Values:

enumerator kPOWER_ResetCauseSysResetReq: CM33 system soft reset request.

enumerator kPOWER_ResetCauseLockup: CM33 locked up.

enumerator kPOWER_ResetCauseWdt: Watchdog timer.

enumerator kPOWER_ResetCauseApResetReq: Debug mailbox reset.

enumerator kPOWER_ResetCauseCodeWdt: Code watchdog timer.

enumerator kPOWER_ResetCauseItrc: ITRC_CHIP reset.

enumerator kPOWER_ResetCauseResetB: sw_resetb_scantest reset.

enumerator kPOWER_ResetCauseAll: All reset causes. Used in POWER_ClearResetCause().

enum _power_reset_source

Reset source.

Values:

enumerator kPOWER_ResetSourceSysResetReq: CM33 system soft reset request.

enumerator kPOWER_ResetSourceLockup: CM33 locked up.

enumerator kPOWER_ResetSourceWdt: Watchdog timer.

enumerator kPOWER_ResetSourceApResetReq: Debug mailbox reset.

enumerator kPOWER_ResetSourceCodeWdt: Code watchdog timer.

enumerator kPOWER_ResetSourceItrc: ITRC_CHIP reset.

enumerator kPOWER_ResetSourceAll: All reset sources.

enum _pm2_mem_pu_bits

PM2 mem power up bits definition.

Values:

enumerator kPOWER_Pm2MemPuEnet

enumerator kPOWER_Pm2MemPuSdio

enumerator kPOWER_Pm2MemPuOtp

enumerator kPOWER_Pm2MemPuRom

enumerator kPOWER_Pm2MemPuFlexspi

enumerator kPOWER_Pm2MemPuPq

enumerator kPOWER_Pm2MemPuPkc

enumerator kPOWER_Pm2MemPuEls

enumerator kPOWER_Pm2MemPuAon1

enumerator kPOWER_Pm2MemPuAon0

enumerator kPOWER_Pm2MemPuSram18

enumerator kPOWER_Pm2MemPuSram17

enumerator kPOWER_Pm2MemPuSram16

enumerator kPOWER_Pm2MemPuSram15

enumerator kPOWER_Pm2MemPuSram14

enumerator kPOWER_Pm2MemPuSram13

enumerator kPOWER_Pm2MemPuSram12

enumerator kPOWER_Pm2MemPuSram11

enumerator kPOWER_Pm2MemPuSram10

enumerator kPOWER_Pm2MemPuSram9

enumerator kPOWER_Pm2MemPuSram8

enumerator kPOWER_Pm2MemPuSram7

enumerator kPOWER_Pm2MemPuSram6

enumerator kPOWER_Pm2MemPuSram5

enumerator kPOWER_Pm2MemPuSram4

enumerator kPOWER_Pm2MemPuSram3

enumerator kPOWER_Pm2MemPuSram2

enumerator kPOWER_Pm2MemPuSram1

enumerator kPOWER_Pm2MemPuSram0

enumerator kPOWER_Pm2MemPuAll

enum _pm2_ana_pu_bits

PM2 ana power up bits definition.

Values:

enumerator kPOWER_Pm2AnaPuT3

enumerator kPOWER_Pm2AnaPuTcpuTop

enumerator kPOWER_Pm2AnaPuTddrTop

enumerator kPOWER_Pm2AnaPuAnaTop

enumerator kPOWER_Pm2AnaPuGau

enumerator kPOWER_Pm2AnaPuUsb

enumerator kPOWER_Pm2AnaPuAvpll

enumerator kPOWER_Pm2AnaPuAll

enum _clk_gate_bits

clock gate bits definition

Values:

enumerator kPOWER_ClkGateTddrMciEnet

enumerator kPOWER_ClkGateAll

enum _clk_pm3_buck_bits

PM3 buck control bits definition.

Values:

enumerator kPOWER_Pm3Buck18: 1: Use normal buck18 level in PM3. 0: Use sleep buck18 level in PM3

enumerator kPOWER_Pm3Buck11: 1: Use normal buck11 level in PM3. 0: Use sleep buck11 level in PM3

enumerator kPOWER_Pm3BuckAll

enum _capt_slow_pulse_width

Capture slow pulse width.

Values:

enumerator kPOWER_CaptSlowPulseWidth1

enumerator kPOWER_CaptSlowPulseWidth2

enumerator kPOWER_CaptSlowPulseWidth3

enumerator kPOWER_CaptSlowPulseWidth4

enumerator kPOWER_CaptSlowPulseWidth5

enumerator kPOWER_CaptSlowPulseWidth6

enumerator kPOWER_CaptSlowPulseWidth7

enum _capt_slow_pulse_edge

Capture slow pulse edge.

Values:

enumerator kPOWER_CaptSlowPulseEdgeRising

enumerator kPOWER_CaptSlowPulseEdgeFalling

enumerator kPOWER_CaptSlowPulseEdgeAny

typedef enum _power_wakeup_edge power_wakeup_edge_t: Pin edge for wakeup.

typedef enum _power_wakeup_pin power_wakeup_pin_t: Wakeup pin.

typedef enum _power_reset_cause power_reset_cause_t: Reset cause.

typedef enum _power_reset_source power_reset_source_t: Reset source.

typedef enum _capt_slow_pulse_width capt_slow_pulse_width_t: Capture slow pulse width.

typedef enum _capt_slow_pulse_edge capt_slow_pulse_edge_t: Capture slow pulse edge.

typedef void (*capt_pulse_timer_callback_t)(void *param)

Capture timer callback function.

Param param:: : User parameter for callback.

typedef void (*power_switch_callback_t)(uint32_t mode, void *param)

Power mode switch callback function.

Param mode:: : Power mode to switch.
Param param:: : User parameter for callback.

typedef struct _power_init_config power_init_config_t: Init configuration.

typedef struct _power_sleep_config power_sleep_config_t: Sleep configuration.

typedef struct _power_gdet_data power_gdet_data_t: Glitch detector configuration.

typedef bool (*power_load_gdet_cfg)(power_gdet_data_t *data): Glitch detector configuration load function.

__STATIC_INLINE void POWER_EnableResetSource (uint32_t source)

Enable system reset source.

Parameters:

source – : A bitmask of of power_reset_source_t

__STATIC_INLINE void POWER_DisableResetSource (uint32_t source)

Disable system reset source.

Parameters:

source – : A bitmask of of power_reset_source_t

__STATIC_INLINE uint32_t POWER_GetResetCause (void)

Get last reset cause.

Returns:: Or’ed cause of power_reset_cause_t

__STATIC_INLINE void POWER_ClearResetCause (uint32_t cause)

Clear last reset cause.

Parameters:

cause – : A bitmask of of power_reset_cause_t

__STATIC_INLINE void POWER_ConfigWakeupPin (power_wakeup_pin_t pin, power_wakeup_edge_t edge)

Configure pin edge for wakeup.

Parameters:

pin – : Wakeup pin
edge – : Pin level for wakeup

bool POWER_GetWakeupStatus(IRQn_Type irq)

Check if IRQ is the wakeup source.

Parameters:

irq – : IRQ number

Returns:

true if IRQ is the wakeup source, false otherwise.

void POWER_ClearWakeupStatus(IRQn_Type irq)

Clear wakeup status.

Parameters:

irq – : IRQ number

void POWER_EnableWakeup(IRQn_Type irq)

Enable the Wakeup interrupt.

Parameters:

irq – : IRQ number

void POWER_DisableWakeup(IRQn_Type irq)

Disable the Wakeup interrupts.

Parameters:

irq – : IRQ number

AT_QUICKACCESS_SECTION_CODE (void POWER_SetSleepMode(uint32_t mode))

Set power mode on idle.

Parameters:

mode – : 0 ~ 4 stands for PM0 ~ PM4.

__STATIC_INLINE uint32_t POWER_GetWakenMode (void)

Get power mode waken up from.

Returns:: Power mode.

void POWER_GetCurrentSleepConfig(power_sleep_config_t *config)

Get current sleep configuration.

Parameters:

config – : Pointer to config structure to save current config.

void POWER_InitPowerConfig(const power_init_config_t *config)

Initialize power configuration.

Parameters:

config – : Pointer to init config structure.

void POWER_ConfigCauInSleep(bool pdCau)

Configure CAU_SOC_SLP_REF_GEN_CLK on/off status in SoC sleep mode.

Parameters:

pdCau – : true for clock off; false for clock on.

void POWER_SetPowerSwitchCallback(power_switch_callback_t pre, void *preParam, power_switch_callback_t post, void *postParam)

Set power mode switch callback. The callbacks are called with interrupt disabled.

Parameters:

pre – : Function called before power mode switch
preParam – : User parameter for pre callback
post – : Function called after power mode switch
postParam – : User parameter for post callback

AT_QUICKACCESS_SECTION_CODE (bool POWER_EnterPowerMode(uint32_t mode, const power_sleep_config_t *config))

Switch system into certain power mode.

Parameters:

mode – : 0 ~ 4 stands for PM0 ~ PM4.
config – : Sleep configuration on PM2-PM4.

Returns:

True for success, else failure.

void POWER_PowerOnWlan(void): Power on WLAN.

void POWER_PowerOffWlan(void): Power off WLAN.

__STATIC_INLINE void PMU_EnableWlanWakeup (uint8_t wlWakeup)

Enable MCI wakeup WLAN.

Parameters:

wlWakeup – : 8 bits wakeup mask

__STATIC_INLINE void PMU_DisableWlanWakeup (uint8_t wlWakeup)

Disable MCI wakeup WLAN.

Parameters:

wlWakeup – : 8 bits wakeup mask

void POWER_PowerOnBle(void): Power on BLE.

void POWER_PowerOffBle(void): Power off BLE.

__STATIC_INLINE void PMU_EnableBleWakeup (uint8_t bleWakeup)

Enable MCI wakeup BLE.

Parameters:

bleWakeup – : 8 bits wakeup mask

__STATIC_INLINE void PMU_DisableBleWakeup (uint8_t bleWakeup)

Disable MCI wakeup BLE.

Parameters:

bleWakeup – : 8 bits wakeup mask

void POWER_PowerOnGau(void): Power on GAU.

void POWER_PowerOffGau(void): Power off GAU.

void POWER_EnableCaptSlowPulseTimer(capt_slow_pulse_width_t width, capt_slow_pulse_edge_t edge, uint32_t timeout, capt_pulse_timer_callback_t cb, void *param)

Enable capture slow pulse timer with 32768Hz clock source.

Parameters:

width – : input capture filter width in cycles
edge – : trigger condition of counter
timeout – : timer expire counter which will trigger callback
callback – : callback function on timer expire
param – : callback parameter

void POWER_EnableCaptFastPulseTimer(uint32_t timeout, capt_pulse_timer_callback_t cb, void *param)

Enable capture fast pulse timer with 3.84/4MHz clock source.

Parameters:

timeout – : timer expire counter which will trigger callback
callback – : callback function on timer expire
param – : callback parameter

void POWER_DisableCaptPulseTimer(void): Disable capture pulse timer.

void POWER_InitVoltage(uint32_t dro, uint32_t pack)

Configure power rail voltage and LVD/HVD threshold.

Parameters:

dro – : trim value from fuse.
pack – : Device package type: 0 - QFN, 1 - CSP, 2 - BGA

void Power_InitLoadGdetCfg(power_load_gdet_cfg loadFunc, const power_gdet_data_t *data, uint32_t pack)

Initialize glitch detector configuration.

Parameters:

loadFunc – : function pointer to the GDET load configuration.
data – : GDET config data loaded from fuse.
pack – : Device package type: 0 - QFN, 1 - CSP, 2 - BGA

AT_QUICKACCESS_SECTION_CODE (void POWER_DisableGDetVSensors(void)): Disable GDET and VSensors.

AT_QUICKACCESS_SECTION_CODE (bool POWER_EnableGDetVSensors(void))

Enable GDET and VSensors.

Returns:: True for success, else failure.

uint32_t POWER_TrimSvc(uint32_t gdetTrim, uint32_t pack)

Apply SVC GDC equation and get the SVC trim configuration.

Parameters:

gdetTrim – : GDET trim value from fuse.
pack – : Device package type: 0 - QFN, 1 - CSP, 2 - BGA

FSL_POWER_DRIVER_VERSION: POWER driver version 2.5.0.

bool iBuck: true: VCORE and AVDD18 supplied from iBuck; false: supplied from external DCDC.

bool gateCauRefClk: true: CAU_SOC_SLP_REF_GEN_CLK gated; false: CAU_SOC_SLP_REF_GEN_CLK on.

uint32_t pm2MemPuCfg: Modules to keep powered on in PM2 mode. Logical OR of the enums in _pm2_mem_pu_bits.

uint32_t pm2AnaPuCfg: Ana to keep powered on in PM2 mode. Logical OR of the enums in _pm2_ana_pu_bits.

uint32_t clkGate: Source clock gate control. Logical OR of the enums in _clk_gate_bits.

uint32_t memPdCfg: PMU MEM_CFG: Power Down memory configuration. Bit0-5 for PM3, bit8 for PM4. bit0: ram0-5 384KB bit1: ram6 64KB bit2: ram7 64KB bit3: ram8-9 128KB bit4: ram10-13 256KB bit5: ram14-18 320KB. bit8: aon mem higher 8KB

uint32_t pm3BuckCfg: PMIP BUCK control in PM3 mode. Logical OR of the enums in _clk_pm3_buck_bits.

uint32_t CFG[6]

uint32_t TRIM0

struct _power_init_config: #include <fsl_power.h>

Init configuration.

struct _power_sleep_config: #include <fsl_power.h>

Sleep configuration.

struct _power_gdet_data: #include <fsl_power.h>

Glitch detector configuration.

POWERQUAD: PowerQuad hardware accelerator

void PQ_GetDefaultConfig(pq_config_t *config)

Get default configuration.

This function initializes the POWERQUAD configuration structure to a default value. FORMAT register field definitions Bits[15:8] scaler (for scaled ‘q31’ formats) Bits[5:4] external format. 00b=q15, 01b=q31, 10b=float Bits[1:0] internal format. 00b=q15, 01b=q31, 10b=float POWERQUAD->INAFORMAT = (config->inputAPrescale << 8U) | (config->inputAFormat << 4U) | config->machineFormat

For all Powerquad operations internal format must be float (with the only exception being the FFT related functions, ie FFT/IFFT/DCT/IDCT which must be set to q31). The default values are: config->inputAFormat = kPQ_Float; config->inputAPrescale = 0; config->inputBFormat = kPQ_Float; config->inputBPrescale = 0; config->outputFormat = kPQ_Float; config->outputPrescale = 0; config->tmpFormat = kPQ_Float; config->tmpPrescale = 0; config->machineFormat = kPQ_Float; config->tmpBase = 0xE0000000;

Parameters:

config – Pointer to “pq_config_t” structure.

void PQ_SetConfig(POWERQUAD_Type *base, const pq_config_t *config)

Set configuration with format/prescale.

Parameters:

base – POWERQUAD peripheral base address
config – Pointer to “pq_config_t” structure.

static inline void PQ_SetCoprocessorScaler(POWERQUAD_Type *base, const pq_prescale_t *prescale)

set coprocessor scaler for coprocessor instructions, this function is used to set output saturation and scaleing for input/output.

Parameters:

base – POWERQUAD peripheral base address
prescale – Pointer to “pq_prescale_t” structure.

void PQ_Init(POWERQUAD_Type *base)

Initializes the POWERQUAD module.

Parameters:

base – POWERQUAD peripheral base address.

void PQ_Deinit(POWERQUAD_Type *base)

De-initializes the POWERQUAD module.

Parameters:

base – POWERQUAD peripheral base address.

void PQ_SetFormat(POWERQUAD_Type *base, pq_computationengine_t engine, pq_format_t format)

Set format for non-coprecessor instructions.

Parameters:

base – POWERQUAD peripheral base address
engine – Computation engine
format – Data format

static inline void PQ_WaitDone(POWERQUAD_Type *base)

Wait for the completion.

Parameters:

base – POWERQUAD peripheral base address

static inline void PQ_LnF32(float *pSrc, float *pDst)

Processing function for the floating-point natural log.

Parameters:

*pSrc – points to the block of input data. The range of the input value is (0 +INFINITY).
*pDst – points to the block of output data

static inline void PQ_InvF32(float *pSrc, float *pDst)

Processing function for the floating-point reciprocal.

Parameters:

*pSrc – points to the block of input data. The range of the input value is non-zero.
*pDst – points to the block of output data

static inline void PQ_SqrtF32(float *pSrc, float *pDst)

Processing function for the floating-point square-root.

Parameters:

*pSrc – points to the block of input data. The range of the input value is [0 +INFINITY).
*pDst – points to the block of output data

static inline void PQ_InvSqrtF32(float *pSrc, float *pDst)

Processing function for the floating-point inverse square-root.

Parameters:

*pSrc – points to the block of input data. The range of the input value is (0 +INFINITY).
*pDst – points to the block of output data

static inline void PQ_EtoxF32(float *pSrc, float *pDst)

Processing function for the floating-point natural exponent.

Parameters:

*pSrc – points to the block of input data. The range of the input value is (-INFINITY +INFINITY).
*pDst – points to the block of output data

static inline void PQ_EtonxF32(float *pSrc, float *pDst)

Processing function for the floating-point natural exponent with negative parameter.

Parameters:

*pSrc – points to the block of input data. The range of the input value is (-INFINITY +INFINITY).
*pDst – points to the block of output data

static inline void PQ_SinF32(float *pSrc, float *pDst)

Processing function for the floating-point sine.

Parameters:

*pSrc – points to the block of input data. The input value is in radians, the range is (-INFINITY +INFINITY).
*pDst – points to the block of output data

static inline void PQ_CosF32(float *pSrc, float *pDst)

Processing function for the floating-point cosine.

Parameters:

*pSrc – points to the block of input data. The input value is in radians, the range is (-INFINITY +INFINITY).
*pDst – points to the block of output data

static inline void PQ_BiquadF32(float *pSrc, float *pDst)

Processing function for the floating-point biquad.

Parameters:

*pSrc – points to the block of input data
*pDst – points to the block of output data

static inline void PQ_DivF32(float *x1, float *x2, float *pDst)

Processing function for the floating-point division.

Get x1 / x2.

Parameters:

x1 – x1
x2 – x2
*pDst – points to the block of output data

static inline void PQ_Biquad1F32(float *pSrc, float *pDst)

Processing function for the floating-point biquad.

Parameters:

*pSrc – points to the block of input data
*pDst – points to the block of output data

static inline int32_t PQ_LnFixed(int32_t val)

Processing function for the fixed natural log.

Parameters:

val – value to be calculated. The range of the input value is (0 +INFINITY).

Returns:

returns ln(val).

static inline int32_t PQ_InvFixed(int32_t val)

Processing function for the fixed reciprocal.

Parameters:

val – value to be calculated. The range of the input value is non-zero.

Returns:

returns inv(val).

static inline uint32_t PQ_SqrtFixed(uint32_t val)

Processing function for the fixed square-root.

Parameters:

val – value to be calculated. The range of the input value is [0 +INFINITY).

Returns:

returns sqrt(val).

static inline int32_t PQ_InvSqrtFixed(int32_t val)

Processing function for the fixed inverse square-root.

Parameters:

val – value to be calculated. The range of the input value is (0 +INFINITY).

Returns:

returns 1/sqrt(val).

static inline int32_t PQ_EtoxFixed(int32_t val)

Processing function for the Fixed natural exponent.

Parameters:

val – value to be calculated. The range of the input value is (-INFINITY +INFINITY).

Returns:

returns etox^(val).

static inline int32_t PQ_EtonxFixed(int32_t val)

Processing function for the fixed natural exponent with negative parameter.

Parameters:

val – value to be calculated. The range of the input value is (-INFINITY +INFINITY).

Returns:

returns etonx^(val).

static inline int32_t PQ_SinQ31(int32_t val)

Processing function for the fixed sine.

Parameters:

val – value to be calculated. The input value is [-1, 1] in Q31 format, which means [-pi, pi].

Returns:

returns sin(val).

static inline int16_t PQ_SinQ15(int16_t val)

Processing function for the fixed sine.

Parameters:

val – value to be calculated. The input value is [-1, 1] in Q15 format, which means [-pi, pi].

Returns:

returns sin(val).

static inline int32_t PQ_CosQ31(int32_t val)

Processing function for the fixed cosine.

Parameters:

val – value to be calculated. The input value is [-1, 1] in Q31 format, which means [-pi, pi].

Returns:

returns cos(val).

static inline int16_t PQ_CosQ15(int16_t val)

Processing function for the fixed sine.

Parameters:

val – value to be calculated. The input value is [-1, 1] in Q15 format, which means [-pi, pi].

Returns:

returns sin(val).

static inline int32_t PQ_BiquadFixed(int32_t val)

Processing function for the fixed biquad.

Parameters:

val – value to be calculated

Returns:

returns biquad(val).

void PQ_VectorLnF32(float *pSrc, float *pDst, int32_t length)

Processing function for the floating-point vectorised natural log.

Parameters:

*pSrc – points to the block of input data
*pDst – points to the block of output data
length – the block of input data.

void PQ_VectorInvF32(float *pSrc, float *pDst, int32_t length)

Processing function for the floating-point vectorised reciprocal.

Parameters:

*pSrc – points to the block of input data
*pDst – points to the block of output data
length – the block of input data.

void PQ_VectorSqrtF32(float *pSrc, float *pDst, int32_t length)

Processing function for the floating-point vectorised square-root.

Parameters:

*pSrc – points to the block of input data
*pDst – points to the block of output data
length – the block of input data.

void PQ_VectorInvSqrtF32(float *pSrc, float *pDst, int32_t length)

Processing function for the floating-point vectorised inverse square-root.

Parameters:

*pSrc – points to the block of input data
*pDst – points to the block of output data
length – the block of input data.

void PQ_VectorEtoxF32(float *pSrc, float *pDst, int32_t length)

Processing function for the floating-point vectorised natural exponent.

Parameters:

*pSrc – points to the block of input data
*pDst – points to the block of output data
length – the block of input data.

void PQ_VectorEtonxF32(float *pSrc, float *pDst, int32_t length)

Processing function for the floating-point vectorised natural exponent with negative parameter.

Parameters:

*pSrc – points to the block of input data
*pDst – points to the block of output data
length – the block of input data.

void PQ_VectorSinF32(float *pSrc, float *pDst, int32_t length)

Processing function for the floating-point vectorised sine.

Parameters:

*pSrc – points to the block of input data
*pDst – points to the block of output data
length – the block of input data.

void PQ_VectorCosF32(float *pSrc, float *pDst, int32_t length)

Processing function for the floating-point vectorised cosine.

Parameters:

*pSrc – points to the block of input data
*pDst – points to the block of output data
length – the block of input data.

void PQ_VectorLnFixed32(int32_t *pSrc, int32_t *pDst, int32_t length)

Processing function for the Q31 vectorised natural log.

Parameters:

*pSrc – points to the block of input data
*pDst – points to the block of output data
length – the block of input data.

void PQ_VectorInvFixed32(int32_t *pSrc, int32_t *pDst, int32_t length)

Processing function for the Q31 vectorised reciprocal.

Parameters:

*pSrc – points to the block of input data
*pDst – points to the block of output data
length – the block of input data.

void PQ_VectorSqrtFixed32(int32_t *pSrc, int32_t *pDst, int32_t length)

Processing function for the 32-bit integer vectorised square-root.

Parameters:

*pSrc – points to the block of input data
*pDst – points to the block of output data
length – the block of input data.

void PQ_VectorInvSqrtFixed32(int32_t *pSrc, int32_t *pDst, int32_t length)

Processing function for the 32-bit integer vectorised inverse square-root.

Parameters:

*pSrc – points to the block of input data
*pDst – points to the block of output data
length – the block of input data.

void PQ_VectorEtoxFixed32(int32_t *pSrc, int32_t *pDst, int32_t length)

Processing function for the 32-bit integer vectorised natural exponent.

Parameters:

*pSrc – points to the block of input data
*pDst – points to the block of output data
length – the block of input data.

void PQ_VectorEtonxFixed32(int32_t *pSrc, int32_t *pDst, int32_t length)

Processing function for the 32-bit integer vectorised natural exponent with negative parameter.

Parameters:

*pSrc – points to the block of input data
*pDst – points to the block of output data
length – the block of input data.

void PQ_VectorSinQ15(int16_t *pSrc, int16_t *pDst, int32_t length)

Processing function for the Q15 vectorised sine.

Parameters:

*pSrc – points to the block of input data
*pDst – points to the block of output data
length – the block of input data.

void PQ_VectorCosQ15(int16_t *pSrc, int16_t *pDst, int32_t length)

Processing function for the Q15 vectorised cosine.

Parameters:

*pSrc – points to the block of input data
*pDst – points to the block of output data
length – the block of input data.

void PQ_VectorSinQ31(int32_t *pSrc, int32_t *pDst, int32_t length)

Processing function for the Q31 vectorised sine.

Parameters:

*pSrc – points to the block of input data
*pDst – points to the block of output data
length – the block of input data.

void PQ_VectorCosQ31(int32_t *pSrc, int32_t *pDst, int32_t length)

Processing function for the Q31 vectorised cosine.

Parameters:

*pSrc – points to the block of input data
*pDst – points to the block of output data
length – the block of input data.

void PQ_VectorLnFixed16(int16_t *pSrc, int16_t *pDst, int32_t length)

Processing function for the 16-bit integer vectorised natural log.

Parameters:

*pSrc – points to the block of input data
*pDst – points to the block of output data
length – the block of input data.

void PQ_VectorInvFixed16(int16_t *pSrc, int16_t *pDst, int32_t length)

Processing function for the 16-bit integer vectorised reciprocal.

Parameters:

*pSrc – points to the block of input data
*pDst – points to the block of output data
length – the block of input data.

void PQ_VectorSqrtFixed16(int16_t *pSrc, int16_t *pDst, int32_t length)

Processing function for the 16-bit integer vectorised square-root.

Parameters:

*pSrc – points to the block of input data
*pDst – points to the block of output data
length – the block of input data.

void PQ_VectorInvSqrtFixed16(int16_t *pSrc, int16_t *pDst, int32_t length)

Processing function for the 16-bit integer vectorised inverse square-root.

Parameters:

*pSrc – points to the block of input data
*pDst – points to the block of output data
length – the block of input data.

void PQ_VectorEtoxFixed16(int16_t *pSrc, int16_t *pDst, int32_t length)

Processing function for the 16-bit integer vectorised natural exponent.

Parameters:

*pSrc – points to the block of input data
*pDst – points to the block of output data
length – the block of input data.

void PQ_VectorEtonxFixed16(int16_t *pSrc, int16_t *pDst, int32_t length)

Processing function for the 16-bit integer vectorised natural exponent with negative parameter.

Parameters:

*pSrc – points to the block of input data
*pDst – points to the block of output data
length – the block of input data.

void PQ_VectorBiquadDf2F32(float *pSrc, float *pDst, int32_t length)

Processing function for the floating-point vectorised biquad direct form II.

Parameters:

*pSrc – points to the block of input data
*pDst – points to the block of output data
length – the block size of input data.

void PQ_VectorBiquadDf2Fixed32(int32_t *pSrc, int32_t *pDst, int32_t length)

Processing function for the 32-bit integer vectorised biquad direct form II.

Parameters:

*pSrc – points to the block of input data
*pDst – points to the block of output data
length – the block size of input data

void PQ_VectorBiquadDf2Fixed16(int16_t *pSrc, int16_t *pDst, int32_t length)

Processing function for the 16-bit integer vectorised biquad direct form II.

Parameters:

*pSrc – points to the block of input data
*pDst – points to the block of output data
length – the block size of input data

void PQ_VectorBiquadCascadeDf2F32(float *pSrc, float *pDst, int32_t length)

Processing function for the floating-point vectorised biquad direct form II.

Parameters:

*pSrc – points to the block of input data
*pDst – points to the block of output data
length – the block size of input data

void PQ_VectorBiquadCascadeDf2Fixed32(int32_t *pSrc, int32_t *pDst, int32_t length)

Processing function for the 32-bit integer vectorised biquad direct form II.

Parameters:

*pSrc – points to the block of input data
*pDst – points to the block of output data
length – the block size of input data

void PQ_VectorBiquadCascadeDf2Fixed16(int16_t *pSrc, int16_t *pDst, int32_t length)

Processing function for the 16-bit integer vectorised biquad direct form II.

Parameters:

*pSrc – points to the block of input data
*pDst – points to the block of output data
length – the block size of input data

int32_t PQ_ArctanFixed(POWERQUAD_Type *base, int32_t x, int32_t y, pq_cordic_iter_t iteration)

Processing function for the fixed inverse trigonometric.

Get the inverse tangent, the behavior is like c function atan.

Note

The sum of x and y should not exceed the range of int32_t.

Note

Larger input number gets higher output accuracy, for example the arctan(0.5), the result of PQ_ArctanFixed(POWERQUAD, 100000, 200000, kPQ_Iteration_24) is more accurate than PQ_ArctanFixed(POWERQUAD, 1, 2, kPQ_Iteration_24).

Parameters:

base – POWERQUAD peripheral base address
x – value of opposite
y – value of adjacent
iteration – iteration times

Returns:

The return value is in the range of -2^26 to 2^26, which means -pi/2 to pi/2.

int32_t PQ_ArctanhFixed(POWERQUAD_Type *base, int32_t x, int32_t y, pq_cordic_iter_t iteration)

Processing function for the fixed inverse trigonometric.

Note

The sum of x and y should not exceed the range of int32_t.

Note

Larger input number gets higher output accuracy, for example the arctanh(0.5), the result of PQ_ArctanhFixed(POWERQUAD, 100000, 200000, kPQ_Iteration_24) is more accurate than PQ_ArctanhFixed(POWERQUAD, 1, 2, kPQ_Iteration_24).

Parameters:

base – POWERQUAD peripheral base address
x – value of opposite
y – value of adjacent
iteration – iteration times

Returns:

The return value is radians, 2^27 means pi. The range is -1.118 to 1.118 radians.

int32_t PQ_Arctan2Fixed(POWERQUAD_Type *base, int32_t x, int32_t y, pq_cordic_iter_t iteration)

Processing function for the fixed inverse trigonometric.

Get the inverse tangent, it calculates the angle in radians for the quadrant. The behavior is like c function atan2.

Note

The sum of x and y should not exceed the range of int32_t.

Note

Larger input number gets higher output accuracy, for example the arctan(0.5), the result of PQ_Arctan2Fixed(POWERQUAD, 100000, 200000, kPQ_Iteration_24) is more accurate than PQ_Arctan2Fixed(POWERQUAD, 1, 2, kPQ_Iteration_24).

Parameters:

base – POWERQUAD peripheral base address
x – value of opposite
y – value of adjacent
iteration – iteration times

Returns:

The return value is in the range of -2^27 to 2^27, which means -pi to pi.

static inline int32_t PQ_Biquad1Fixed(int32_t val)

Processing function for the fixed biquad.

Parameters:

val – value to be calculated

Returns:

returns biquad(val).

void PQ_TransformCFFT(POWERQUAD_Type *base, uint32_t length, void *pData, void *pResult)

Processing function for the complex FFT.

Parameters:

base – POWERQUAD peripheral base address
length – number of input samples
pData – input data
pResult – output data.

void PQ_TransformRFFT(POWERQUAD_Type *base, uint32_t length, void *pData, void *pResult)

Processing function for the real FFT.

Parameters:

base – POWERQUAD peripheral base address
length – number of input samples
pData – input data
pResult – output data.

void PQ_TransformIFFT(POWERQUAD_Type *base, uint32_t length, void *pData, void *pResult)

Processing function for the inverse complex FFT.

Parameters:

base – POWERQUAD peripheral base address
length – number of input samples
pData – input data
pResult – output data.

void PQ_TransformCDCT(POWERQUAD_Type *base, uint32_t length, void *pData, void *pResult)

Processing function for the complex DCT.

Parameters:

base – POWERQUAD peripheral base address
length – number of input samples
pData – input data
pResult – output data.

void PQ_TransformRDCT(POWERQUAD_Type *base, uint32_t length, void *pData, void *pResult)

Processing function for the real DCT.

Parameters:

base – POWERQUAD peripheral base address
length – number of input samples
pData – input data
pResult – output data.

void PQ_TransformIDCT(POWERQUAD_Type *base, uint32_t length, void *pData, void *pResult)

Processing function for the inverse complex DCT.

Parameters:

base – POWERQUAD peripheral base address
length – number of input samples
pData – input data
pResult – output data.

void PQ_BiquadBackUpInternalState(POWERQUAD_Type *base, int32_t biquad_num, pq_biquad_state_t *state)

Processing function for backup biquad context.

Parameters:

base – POWERQUAD peripheral base address
biquad_num – biquad side
state – point to states.

void PQ_BiquadRestoreInternalState(POWERQUAD_Type *base, int32_t biquad_num, pq_biquad_state_t *state)

Processing function for restore biquad context.

Parameters:

base – POWERQUAD peripheral base address
biquad_num – biquad side
state – point to states.

void PQ_BiquadCascadeDf2Init(pq_biquad_cascade_df2_instance *S, uint8_t numStages, pq_biquad_state_t *pState)

Initialization function for the direct form II Biquad cascade filter.

Parameters:

*S – [inout] points to an instance of the filter data structure.
numStages – [in] number of 2nd order stages in the filter.
*pState – [in] points to the state buffer.

void PQ_BiquadCascadeDf2F32(const pq_biquad_cascade_df2_instance *S, float *pSrc, float *pDst, uint32_t blockSize)

Processing function for the floating-point direct form II Biquad cascade filter.

Parameters:

*S – [in] points to an instance of the filter data structure.
*pSrc – [in] points to the block of input data.
*pDst – [out] points to the block of output data
blockSize – [in] number of samples to process.

void PQ_BiquadCascadeDf2Fixed32(const pq_biquad_cascade_df2_instance *S, int32_t *pSrc, int32_t *pDst, uint32_t blockSize)

Processing function for the Q31 direct form II Biquad cascade filter.

Parameters:

*S – [in] points to an instance of the filter data structure.
*pSrc – [in] points to the block of input data.
*pDst – [out] points to the block of output data
blockSize – [in] number of samples to process.

void PQ_BiquadCascadeDf2Fixed16(const pq_biquad_cascade_df2_instance *S, int16_t *pSrc, int16_t *pDst, uint32_t blockSize)

Processing function for the Q15 direct form II Biquad cascade filter.

Parameters:

*S – [in] points to an instance of the filter data structure.
*pSrc – [in] points to the block of input data.
*pDst – [out] points to the block of output data
blockSize – [in] number of samples to process.

void PQ_FIR(POWERQUAD_Type *base, const void *pAData, int32_t ALength, const void *pBData, int32_t BLength, void *pResult, uint32_t opType)

Processing function for the FIR.

Parameters:

base – POWERQUAD peripheral base address
pAData – the first input sequence
ALength – number of the first input sequence
pBData – the second input sequence
BLength – number of the second input sequence
pResult – array for the output data
opType – operation type, could be PQ_FIR_FIR, PQ_FIR_CONVOLUTION, PQ_FIR_CORRELATION.

void PQ_FIRIncrement(POWERQUAD_Type *base, int32_t ALength, int32_t BLength, int32_t xOffset)

Processing function for the incremental FIR. This function can be used after pq_fir() for incremental FIR operation when new x data are available.

Parameters:

base – POWERQUAD peripheral base address
ALength – number of input samples
BLength – number of taps
xOffset – offset for number of input samples

void PQ_MatrixAddition(POWERQUAD_Type *base, uint32_t length, void *pAData, void *pBData, void *pResult)

Processing function for the matrix addition.

Parameters:

base – POWERQUAD peripheral base address
length – rows and cols for matrix. LENGTH register configuration: LENGTH[23:16] = M2 cols LENGTH[15:8] = M1 cols LENGTH[7:0] = M1 rows This could be constructed using macro POWERQUAD_MAKE_MATRIX_LEN.
pAData – input matrix A
pBData – input matrix B
pResult – array for the output data.

void PQ_MatrixSubtraction(POWERQUAD_Type *base, uint32_t length, void *pAData, void *pBData, void *pResult)

Processing function for the matrix subtraction.

Parameters:

base – POWERQUAD peripheral base address
length – rows and cols for matrix. LENGTH register configuration: LENGTH[23:16] = M2 cols LENGTH[15:8] = M1 cols LENGTH[7:0] = M1 rows This could be constructed using macro POWERQUAD_MAKE_MATRIX_LEN.
pAData – input matrix A
pBData – input matrix B
pResult – array for the output data.

void PQ_MatrixMultiplication(POWERQUAD_Type *base, uint32_t length, void *pAData, void *pBData, void *pResult)

Processing function for the matrix multiplication.

Parameters:

base – POWERQUAD peripheral base address
length – rows and cols for matrix. LENGTH register configuration: LENGTH[23:16] = M2 cols LENGTH[15:8] = M1 cols LENGTH[7:0] = M1 rows This could be constructed using macro POWERQUAD_MAKE_MATRIX_LEN.
pAData – input matrix A
pBData – input matrix B
pResult – array for the output data.

void PQ_MatrixProduct(POWERQUAD_Type *base, uint32_t length, void *pAData, void *pBData, void *pResult)

Processing function for the matrix product.

Parameters:

base – POWERQUAD peripheral base address
length – rows and cols for matrix. LENGTH register configuration: LENGTH[23:16] = M2 cols LENGTH[15:8] = M1 cols LENGTH[7:0] = M1 rows This could be constructed using macro POWERQUAD_MAKE_MATRIX_LEN.
pAData – input matrix A
pBData – input matrix B
pResult – array for the output data.

void PQ_VectorDotProduct(POWERQUAD_Type *base, uint32_t length, void *pAData, void *pBData, void *pResult)

Processing function for the vector dot product.

Parameters:

base – POWERQUAD peripheral base address
length – length of vector
pAData – input vector A
pBData – input vector B
pResult – array for the output data.

void PQ_MatrixInversion(POWERQUAD_Type *base, uint32_t length, void *pData, void *pTmpData, void *pResult)

Processing function for the matrix inverse.

Parameters:

base – POWERQUAD peripheral base address
length – rows and cols for matrix. LENGTH register configuration: LENGTH[23:16] = M2 cols LENGTH[15:8] = M1 cols LENGTH[7:0] = M1 rows This could be constructed using macro POWERQUAD_MAKE_MATRIX_LEN.
pData – input matrix
pTmpData – input temporary matrix, pTmpData length not less than pData lenght and 1024 words is sufficient for the largest supported matrix.
pResult – array for the output data, round down for fixed point.

void PQ_MatrixTranspose(POWERQUAD_Type *base, uint32_t length, void *pData, void *pResult)

Processing function for the matrix transpose.

Parameters:

base – POWERQUAD peripheral base address
length – rows and cols for matrix. LENGTH register configuration: LENGTH[23:16] = M2 cols LENGTH[15:8] = M1 cols LENGTH[7:0] = M1 rows This could be constructed using macro POWERQUAD_MAKE_MATRIX_LEN.
pData – input matrix
pResult – array for the output data.

void PQ_MatrixScale(POWERQUAD_Type *base, uint32_t length, float misc, const void *pData, void *pResult)

Processing function for the matrix scale.

Parameters:

base – POWERQUAD peripheral base address
length – rows and cols for matrix. LENGTH register configuration: LENGTH[23:16] = M2 cols LENGTH[15:8] = M1 cols LENGTH[7:0] = M1 rows This could be constructed using macro POWERQUAD_MAKE_MATRIX_LEN.
misc – scaling parameters
pData – input matrix
pResult – array for the output data.

FSL_POWERQUAD_DRIVER_VERSION: Version.

enum pq_computationengine_t

powerquad computation engine

Values:

enumerator kPQ_CP_PQ: Math engine.

enumerator kPQ_CP_MTX: Matrix engine.

enumerator kPQ_CP_FFT: FFT engine.

enumerator kPQ_CP_FIR: FIR engine.

enumerator kPQ_CP_CORDIC: CORDIC engine.

enum pq_format_t

powerquad data structure format type

Values:

enumerator kPQ_16Bit: Int16 Fixed point.

enumerator kPQ_32Bit: Int32 Fixed point.

enumerator kPQ_Float: Float point.

enum pq_cordic_iter_t

CORDIC iteration.

Values:

enumerator kPQ_Iteration_8: Iterate 8 times.

enumerator kPQ_Iteration_16: Iterate 16 times.

enumerator kPQ_Iteration_24: Iterate 24 times.

typedef struct _pq_biquad_param pq_biquad_param_t: Struct to save biquad parameters.

typedef struct _pq_biquad_state pq_biquad_state_t: Struct to save biquad state.

typedef union _pq_float pq_float_t: Conversion between integer and float type.

PQ_VectorBiqaudDf2F32

PQ_VectorBiqaudDf2Fixed32

PQ_VectorBiqaudDf2Fixed16

PQ_VectorBiqaudCascadeDf2F32

PQ_VectorBiqaudCascadeDf2Fixed32

PQ_VectorBiqaudCascadeDf2Fixed16

PQ_Vector8BiqaudDf2CascadeF32

PQ_Vector8BiqaudDf2CascadeFixed32

PQ_Vector8BiqaudDf2CascadeFixed16

PQ_FLOAT32

PQ_FIXEDPT

CP_PQ

CP_MTX

CP_FFT

CP_FIR

CP_CORDIC

PQ_TRANS

PQ_TRIG

PQ_BIQUAD

PQ_TRANS_FIXED

PQ_TRIG_FIXED

PQ_BIQUAD_FIXED

PQ_INV

PQ_LN

PQ_SQRT

PQ_INVSQRT

PQ_ETOX

PQ_ETONX

PQ_DIV

PQ_SIN

PQ_COS

PQ_BIQ0_CALC

PQ_BIQ1_CALC

PQ_COMP0_ONLY

PQ_COMP1_ONLY

CORDIC_ITER(x)

CORDIC_MIU(x)

CORDIC_T(x)

CORDIC_ARCTAN

CORDIC_ARCTANH

INST_BUSY

PQ_ERRSTAT_OVERFLOW

PQ_ERRSTAT_NAN

PQ_ERRSTAT_FIXEDOVERFLOW

PQ_ERRSTAT_UNDERFLOW

PQ_TRANS_CFFT

PQ_TRANS_IFFT

PQ_TRANS_CDCT

PQ_TRANS_IDCT

PQ_TRANS_RFFT

PQ_TRANS_RDCT

PQ_MTX_SCALE

PQ_MTX_MULT

PQ_MTX_ADD

PQ_MTX_INV

PQ_MTX_PROD

PQ_MTX_SUB

PQ_VEC_DOTP

PQ_MTX_TRAN

PQ_FIR_FIR

PQ_FIR_CONVOLUTION

PQ_FIR_CORRELATION

PQ_FIR_INCREMENTAL

_pq_ln0(x)

_pq_inv0(x)

_pq_sqrt0(x)

_pq_invsqrt0(x)

_pq_etox0(x)

_pq_etonx0(x)

_pq_sin0(x)

_pq_cos0(x)

_pq_biquad0(x)

_pq_ln_fx0(x)

_pq_inv_fx0(x)

_pq_sqrt_fx0(x)

_pq_invsqrt_fx0(x)

_pq_etox_fx0(x)

_pq_etonx_fx0(x)

_pq_sin_fx0(x)

_pq_cos_fx0(x)

_pq_biquad0_fx(x)

_pq_div0(x)

_pq_div1(x)

_pq_ln1(x)

_pq_inv1(x)

_pq_sqrt1(x)

_pq_invsqrt1(x)

_pq_etox1(x)

_pq_etonx1(x)

_pq_sin1(x)

_pq_cos1(x)

_pq_biquad1(x)

_pq_ln_fx1(x)

_pq_inv_fx1(x)

_pq_sqrt_fx1(x)

_pq_invsqrt_fx1(x)

_pq_etox_fx1(x)

_pq_etonx_fx1(x)

_pq_sin_fx1(x)

_pq_cos_fx1(x)

_pq_biquad1_fx(x)

_pq_readMult0()

_pq_readAdd0()

_pq_readMult1()

_pq_readAdd1()

_pq_readMult0_fx()

_pq_readAdd0_fx()

_pq_readMult1_fx()

_pq_readAdd1_fx()

PQ_LN_INF: Parameter used for vector ln(x)

PQ_INV_INF: Parameter used for vector 1/x

PQ_SQRT_INF: Parameter used for vector sqrt(x)

PQ_ISQRT_INF: Parameter used for vector 1/sqrt(x)

PQ_ETOX_INF: Parameter used for vector e^x

PQ_ETONX_INF: Parameter used for vector e^(-x)

PQ_SIN_INF: Parameter used for vector sin(x)

PQ_COS_INF: Parameter used for vector cos(x)

PQ_RUN_OPCODE_R3_R2(BATCH_OPCODE, BATCH_MACHINE)

PQ_RUN_OPCODE_R5_R4(BATCH_OPCODE, BATCH_MACHINE)

PQ_RUN_OPCODE_R7_R6(BATCH_OPCODE, BATCH_MACHINE)

PQ_Vector8_FP(middle, last, BATCH_OPCODE, DOUBLE_READ_ADDERS, BATCH_MACHINE)

PQ_RUN_OPCODE_R2_R3(BATCH_OPCODE, BATCH_MACHINE)

PQ_RUN_OPCODE_R4_R5(BATCH_OPCODE, BATCH_MACHINE)

PQ_RUN_OPCODE_R6_R7(BATCH_OPCODE, BATCH_MACHINE)

PQ_Vector8_FX(middle, last, BATCH_OPCODE, DOUBLE_READ_ADDERS, BATCH_MACHINE)

PQ_Initiate_Vector_Func(pSrc, pDst)

Start 32-bit data vector calculation.

Start the vector calculation, the input data could be float, int32_t or Q31.

Parameters:

pSrc – Pointer to the source data.
pDst – Pointer to the destination data.

PQ_End_Vector_Func()

End vector calculation.

This function should be called after vector calculation.

PQ_StartVector(PSRC, PDST, LENGTH)

Start 32-bit data vector calculation.

Start the vector calculation, the input data could be float, int32_t or Q31.

Parameters:

PSRC – Pointer to the source data.
PDST – Pointer to the destination data.
LENGTH – Number of the data, must be multiple of 8.

PQ_StartVectorFixed16(PSRC, PDST, LENGTH)

Start 16-bit data vector calculation.

Start the vector calculation, the input data could be int16_t. This function should be use with PQ_Vector8Fixed16.

Parameters:

PSRC – Pointer to the source data.
PDST – Pointer to the destination data.
LENGTH – Number of the data, must be multiple of 8.

PQ_StartVectorQ15(PSRC, PDST, LENGTH)

Start Q15-bit data vector calculation.

Start the vector calculation, the input data could be Q15. This function should be use with PQ_Vector8Q15. This function is dedicate for SinQ15/CosQ15 vector calculation. Because PowerQuad only supports Q31 Sin/Cos fixed function, so the input Q15 data is left shift 16 bits first, after Q31 calculation, the output data is right shift 16 bits.

Parameters:

PSRC – Pointer to the source data.
PDST – Pointer to the destination data.
LENGTH – Number of the data, must be multiple of 8.

PQ_EndVector()

End vector calculation.

This function should be called after vector calculation.

PQ_Vector8F32(BATCH_OPCODE, DOUBLE_READ_ADDERS, BATCH_MACHINE)

Float data vector calculation.

Float data vector calculation, the input data should be float. The parameter could be PQ_LN_INF, PQ_INV_INF, PQ_SQRT_INF, PQ_ISQRT_INF, PQ_ETOX_INF, PQ_ETONX_INF. For example, to calculate sqrt of a vector, use like this:

#define VECTOR_LEN 8
float input[VECTOR_LEN] = {1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0};
float output[VECTOR_LEN];

PQ_StartVector(input, output, VECTOR_LEN);
PQ_Vector8F32(PQ_SQRT_INF);
PQ_EndVector();

PQ_Vector8Fixed32(BATCH_OPCODE, DOUBLE_READ_ADDERS, BATCH_MACHINE)

Fixed 32bits data vector calculation.

Float data vector calculation, the input data should be 32-bit integer. The parameter could be PQ_LN_INF, PQ_INV_INF, PQ_SQRT_INF, PQ_ISQRT_INF, PQ_ETOX_INF, PQ_ETONX_INF. PQ_SIN_INF, PQ_COS_INF. When this function is used for sin/cos calculation, the input data should be in the format Q1.31. For example, to calculate sqrt of a vector, use like this:

#define VECTOR_LEN 8
int32_t input[VECTOR_LEN] = {1, 4, 9, 16, 25, 36, 49, 64};
int32_t output[VECTOR_LEN];

PQ_StartVector(input, output, VECTOR_LEN);
PQ_Vector8F32(PQ_SQRT_INF);
PQ_EndVector();

PQ_Vector8Fixed16(BATCH_OPCODE, DOUBLE_READ_ADDERS, BATCH_MACHINE)

Fixed 32bits data vector calculation.

Float data vector calculation, the input data should be 16-bit integer. The parameter could be PQ_LN_INF, PQ_INV_INF, PQ_SQRT_INF, PQ_ISQRT_INF, PQ_ETOX_INF, PQ_ETONX_INF. For example, to calculate sqrt of a vector, use like this:

#define VECTOR_LEN 8
int16_t input[VECTOR_LEN] = {1, 4, 9, 16, 25, 36, 49, 64};
int16_t output[VECTOR_LEN];

PQ_StartVector(input, output, VECTOR_LEN);
PQ_Vector8F32(PQ_SQRT_INF);
PQ_EndVector();

PQ_Vector8Q15(BATCH_OPCODE, DOUBLE_READ_ADDERS, BATCH_MACHINE)

Q15 data vector calculation.

Q15 data vector calculation, this function should only be used for sin/cos Q15 calculation, and the coprocessor output prescaler must be set to 31 before this function. This function loads Q15 data and left shift 16 bits, calculate and right shift 16 bits, then stores to the output array. The input range -1 to 1 means -pi to pi. For example, to calculate sin of a vector, use like this:

#define VECTOR_LEN 8
int16_t input[VECTOR_LEN] = {...}
int16_t output[VECTOR_LEN];
const pq_prescale_t prescale =
{
    .inputPrescale = 0,
    .outputPrescale = 31,
    .outputSaturate = 0
};

PQ_SetCoprocessorScaler(POWERQUAD, const pq_prescale_t *prescale);

PQ_StartVectorQ15(pSrc, pDst, length);
PQ_Vector8Q15(PQ_SQRT_INF);
PQ_EndVector();

PQ_DF2_Vector8_FP(middle, last)

Float data vector biquad direct form II calculation.

Biquad filter, the input and output data are float data. Biquad side 0 is used. Example:

#define VECTOR_LEN 16
float input[VECTOR_LEN] = {1024.0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
float output[VECTOR_LEN];
pq_biquad_state_t state =
{
     .param =
     {
         .a_1 = xxx,
         .a_2 = xxx,
         .b_0 = xxx,
         .b_1 = xxx,
         .b_2 = xxx,
     },
};

PQ_BiquadRestoreInternalState(POWERQUAD, 0, &state);

PQ_Initiate_Vector_Func(pSrc,pDst);
PQ_DF2_Vector8_FP(false,false);
PQ_DF2_Vector8_FP(true,true);
PQ_End_Vector_Func();

PQ_DF2_Vector8_FX(middle, last)

Fixed data vector biquad direct form II calculation.

Biquad filter, the input and output data are fixed data. Biquad side 0 is used. Example:

#define VECTOR_LEN 16
int32_t input[VECTOR_LEN] = {1024, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
int32_t output[VECTOR_LEN];
pq_biquad_state_t state =
{
     .param =
     {
         .a_1 = xxx,
         .a_2 = xxx,
         .b_0 = xxx,
         .b_1 = xxx,
         .b_2 = xxx,
     },
};

PQ_BiquadRestoreInternalState(POWERQUAD, 0, &state);

PQ_Initiate_Vector_Func(pSrc,pDst);
PQ_DF2_Vector8_FX(false,false);
PQ_DF2_Vector8_FX(true,true);
PQ_End_Vector_Func();

PQ_Vector8BiquadDf2F32()

Float data vector biquad direct form II calculation.

Biquad filter, the input and output data are float data. Biquad side 0 is used. Example:

#define VECTOR_LEN 8
float input[VECTOR_LEN] = {1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0};
float output[VECTOR_LEN];
pq_biquad_state_t state =
{
     .param =
     {
         .a_1 = xxx,
         .a_2 = xxx,
         .b_0 = xxx,
         .b_1 = xxx,
         .b_2 = xxx,
     },
};

PQ_BiquadRestoreInternalState(POWERQUAD, 0, &state);

PQ_StartVector(input, output, VECTOR_LEN);
PQ_Vector8BiquadDf2F32();
PQ_EndVector();

PQ_Vector8BiquadDf2Fixed32()

Fixed 32-bit data vector biquad direct form II calculation.

Biquad filter, the input and output data are Q31 or 32-bit integer. Biquad side 0 is used. Example:

#define VECTOR_LEN 8
int32_t input[VECTOR_LEN] = {1, 2, 3, 4, 5, 6, 7, 8};
int32_t output[VECTOR_LEN];
pq_biquad_state_t state =
{
     .param =
     {
         .a_1 = xxx,
         .a_2 = xxx,
         .b_0 = xxx,
         .b_1 = xxx,
         .b_2 = xxx,
     },
};

PQ_BiquadRestoreInternalState(POWERQUAD, 0, &state);

PQ_StartVector(input, output, VECTOR_LEN);
PQ_Vector8BiquadDf2Fixed32();
PQ_EndVector();

PQ_Vector8BiquadDf2Fixed16()

Fixed 16-bit data vector biquad direct form II calculation.

Biquad filter, the input and output data are Q15 or 16-bit integer. Biquad side 0 is used. Example:

#define VECTOR_LEN 8
int16_t input[VECTOR_LEN] = {1, 2, 3, 4, 5, 6, 7, 8};
int16_t output[VECTOR_LEN];
pq_biquad_state_t state =
{
     .param =
     {
         .a_1 = xxx,
         .a_2 = xxx,
         .b_0 = xxx,
         .b_1 = xxx,
         .b_2 = xxx,
     },
};

PQ_BiquadRestoreInternalState(POWERQUAD, 0, &state);

PQ_StartVector(input, output, VECTOR_LEN);
PQ_Vector8BiquadDf2Fixed16();
PQ_EndVector();

PQ_DF2_Cascade_Vector8_FP(middle, last)

Float data vector direct form II biquad cascade filter.

The input and output data are float data. The data flow is input -> biquad side 1 -> biquad side 0 -> output.

#define VECTOR_LEN 16
float input[VECTOR_LEN] = {1024.0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
float output[VECTOR_LEN];
pq_biquad_state_t state0 =
{
     .param =
     {
         .a_1 = xxx,
         .a_2 = xxx,
         .b_0 = xxx,
         .b_1 = xxx,
         .b_2 = xxx,
     },
};

pq_biquad_state_t state1 =
{
     .param =
     {
         .a_1 = xxx,
         .a_2 = xxx,
         .b_0 = xxx,
         .b_1 = xxx,
         .b_2 = xxx,
     },
};

PQ_BiquadRestoreInternalState(POWERQUAD, 0, &state0);
PQ_BiquadRestoreInternalState(POWERQUAD, 1, &state1);

PQ_Initiate_Vector_Func(pSrc, pDst);
PQ_DF2_Cascade_Vector8_FP(false, false);
PQ_DF2_Cascade_Vector8_FP(true, true);
PQ_End_Vector_Func();

PQ_DF2_Cascade_Vector8_FX(middle, last)

Fixed data vector direct form II biquad cascade filter.

The input and output data are fixed data. The data flow is input -> biquad side 1 -> biquad side 0 -> output.

#define VECTOR_LEN 16
int32_t input[VECTOR_LEN] = {1024.0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
int32_t output[VECTOR_LEN];
pq_biquad_state_t state0 =
{
     .param =
     {
         .a_1 = xxx,
         .a_2 = xxx,
         .b_0 = xxx,
         .b_1 = xxx,
         .b_2 = xxx,
     },
};

pq_biquad_state_t state1 =
{
     .param =
     {
         .a_1 = xxx,
         .a_2 = xxx,
         .b_0 = xxx,
         .b_1 = xxx,
         .b_2 = xxx,
     },
};

PQ_BiquadRestoreInternalState(POWERQUAD, 0, &state0);
PQ_BiquadRestoreInternalState(POWERQUAD, 1, &state1);

PQ_Initiate_Vector_Func(pSrc, pDst);
PQ_DF2_Cascade_Vector8_FX(false, false);
PQ_DF2_Cascade_Vector8_FX(true, true);
PQ_End_Vector_Func();

PQ_Vector8BiquadDf2CascadeF32()

Float data vector direct form II biquad cascade filter.

The input and output data are float data. The data flow is input -> biquad side 1 -> biquad side 0 -> output.

#define VECTOR_LEN 8
float input[VECTOR_LEN] = {1, 2, 3, 4, 5, 6, 7, 8};
float output[VECTOR_LEN];
pq_biquad_state_t state0 =
{
     .param =
     {
         .a_1 = xxx,
         .a_2 = xxx,
         .b_0 = xxx,
         .b_1 = xxx,
         .b_2 = xxx,
     },
};

pq_biquad_state_t state1 =
{
     .param =
     {
         .a_1 = xxx,
         .a_2 = xxx,
         .b_0 = xxx,
         .b_1 = xxx,
         .b_2 = xxx,
     },
};

PQ_BiquadRestoreInternalState(POWERQUAD, 0, &state0);
PQ_BiquadRestoreInternalState(POWERQUAD, 1, &state1);

PQ_StartVector(input, output, VECTOR_LEN);
PQ_Vector8BiquadDf2CascadeF32();
PQ_EndVector();

PQ_Vector8BiquadDf2CascadeFixed32()

Fixed 32-bit data vector direct form II biquad cascade filter.

The input and output data are fixed 32-bit data. The data flow is input -> biquad side 1 -> biquad side 0 -> output.

#define VECTOR_LEN 8
int32_t input[VECTOR_LEN] = {1, 2, 3, 4, 5, 6, 7, 8};
int32_t output[VECTOR_LEN];
pq_biquad_state_t state0 =
{
     .param =
     {
         .a_1 = xxx,
         .a_2 = xxx,
         .b_0 = xxx,
         .b_1 = xxx,
         .b_2 = xxx,
     },
};

pq_biquad_state_t state1 =
{
     .param =
     {
         .a_1 = xxx,
         .a_2 = xxx,
         .b_0 = xxx,
         .b_1 = xxx,
         .b_2 = xxx,
     },
};

PQ_BiquadRestoreInternalState(POWERQUAD, 0, &state0);
PQ_BiquadRestoreInternalState(POWERQUAD, 1, &state1);

PQ_StartVector(input, output, VECTOR_LEN);
PQ_Vector8BiquadDf2CascadeFixed32();
PQ_EndVector();

PQ_Vector8BiquadDf2CascadeFixed16()

Fixed 16-bit data vector direct form II biquad cascade filter.

The input and output data are fixed 16-bit data. The data flow is input -> biquad side 1 -> biquad side 0 -> output.

#define VECTOR_LEN 8
int32_t input[VECTOR_LEN] = {1, 2, 3, 4, 5, 6, 7, 8};
int32_t output[VECTOR_LEN];
pq_biquad_state_t state0 =
{
     .param =
     {
         .a_1 = xxx,
         .a_2 = xxx,
         .b_0 = xxx,
         .b_1 = xxx,
         .b_2 = xxx,
     },
};

pq_biquad_state_t state1 =
{
     .param =
     {
         .a_1 = xxx,
         .a_2 = xxx,
         .b_0 = xxx,
         .b_1 = xxx,
         .b_2 = xxx,
     },
};

PQ_BiquadRestoreInternalState(POWERQUAD, 0, &state0);
PQ_BiquadRestoreInternalState(POWERQUAD, 1, &state1);

PQ_StartVector(input, output, VECTOR_LEN);
PQ_Vector8BiquadDf2CascadeFixed16();
PQ_EndVector();

POWERQUAD_MAKE_MATRIX_LEN(mat1Row, mat1Col, mat2Col): Make the length used for matrix functions.

PQ_Q31_2_FLOAT(x): Convert Q31 to float.

PQ_Q15_2_FLOAT(x): Convert Q15 to float.

struct pq_prescale_t

#include <fsl_powerquad.h>

Coprocessor prescale.

Public Members

int8_t inputPrescale: Input prescale.

int8_t outputPrescale: Output prescale.

int8_t outputSaturate: Output saturate at n bits, for example 0x11 is 8 bit space, the value will be truncated at +127 or -128.

struct pq_config_t

#include <fsl_powerquad.h>

powerquad data structure format

Public Members

pq_format_t inputAFormat: Input A format.

int8_t inputAPrescale: Input A prescale, for example 1.5 can be 1.5*2^n if you scale by ‘shifting’ (‘scaling’ by a factor of n).

pq_format_t inputBFormat: Input B format.

int8_t inputBPrescale: Input B prescale.

pq_format_t outputFormat: Out format.

int8_t outputPrescale: Out prescale.

pq_format_t tmpFormat: Temp format.

int8_t tmpPrescale: Temp prescale.

pq_format_t machineFormat: Machine format.

uint32_t *tmpBase: Tmp base address.

struct _pq_biquad_param

#include <fsl_powerquad.h>

Struct to save biquad parameters.

Public Members

float v_n_1: v[n-1], set to 0 when initialization.

float v_n: v[n], set to 0 when initialization.

float a_1: a[1]

float a_2: a[2]

float b_0: b[0]

float b_1: b[1]

float b_2: b[2]

struct _pq_biquad_state

#include <fsl_powerquad.h>

Struct to save biquad state.

Public Members

pq_biquad_param_t param: Filter parameter.

uint32_t compreg: Internal register, set to 0 when initialization.

struct pq_biquad_cascade_df2_instance

#include <fsl_powerquad.h>

Instance structure for the direct form II Biquad cascade filter.

Public Members

uint8_t numStages: Number of 2nd order stages in the filter.

pq_biquad_state_t *pState: Points to the array of state coefficients.

union _pq_float

#include <fsl_powerquad.h>

Conversion between integer and float type.

Public Members

float floatX: Float type.

uint32_t integerX: Unsigned interger type.

Reset Driver

enum _RSTCTL_RSTn

Enumeration for peripheral reset control bits.

Defines the enumeration for peripheral reset control bits in RSTCLTx registers

Values:

enumerator kPOWERQUAD_RST_SHIFT_RSTn: POWERQUAD reset control

enumerator kPKC_RST_SHIFT_RSTn: PKC reset control

enumerator kELS_RST_SHIFT_RSTn: ELS reset control

enumerator kPUF_RST_SHIFT_RSTn: Physical unclonable function reset control

enumerator kFLEXSPI_RST_SHIFT_RSTn: FLEXSPI reset control

enumerator kHPU_RST_SHIFT_RSTn: HPU reset control

enumerator kUSB_RST_SHIFT_RSTn: USB reset control

enumerator kSCT_RST_SHIFT_RSTn: Standard ctimers reset control

enumerator kAON_MEM_RST_SHIFT_RSTn: AON MEM reset control

enumerator kGDMA_RST_SHIFT_RSTn: GDMA reset control

enumerator kDMA0_RST_SHIFT_RSTn: DMA0 reset control

enumerator kDMA1_RST_SHIFT_RSTn: DMA1 reset control

enumerator kSDIO_RST_SHIFT_RSTn: SDIO reset control

enumerator kELS_APB_RST_SHIFT_RSTn: ELS_APB reset control

enumerator kELS_GDET_REF_RST_SHIFT_RSTn: ELS_GDET_REF_RST reset control

enumerator kSDIO_SLV_SHIFT_RSTn: SDIO_SLV reset control

enumerator kGAU_RST_SHIFT_RSTn: GAU reset control

enumerator kOTP_RST_SHIFT_RSTn: OTP reset control

enumerator kSECURE_GPIO_RST_SHIFT_RSTn: Security GPIO reset control

enumerator kENET_IPG_RST_SHIFT_RSTn: ENET_IPG reset control

enumerator kENET_IPG_S_RST_SHIFT_RSTn: ENET_IPG_S reset control

enumerator kTRNG_RST_SHIFT_RSTn: TRNG reset control

enumerator kUTICK_RST_SHIFT_RSTn: Micro-tick timer reset control

enumerator kWWDT_RST_SHIFT_RSTn: Windowed Watchdog timer reset control

enumerator kUSIM_RST_SHIFT_RSTn: USIM reset control

enumerator kFREEMRT_RST_SHIFT_RSTn: FREEMRT reset control

enumerator kLCDIC_RST_SHIFT_RSTn: LCDIC reset control

enumerator kFC0_RST_SHIFT_RSTn: Flexcomm Interface 0 reset control

enumerator kFC1_RST_SHIFT_RSTn: Flexcomm Interface 1 reset control

enumerator kFC2_RST_SHIFT_RSTn: Flexcomm Interface 2 reset control

enumerator kFC3_RST_SHIFT_RSTn: Flexcomm Interface 3 reset control

enumerator kFC14_RST_SHIFT_RSTn: Flexcomm Interface 14 reset control

enumerator kDMIC_RST_SHIFT_RSTn: Digital microphone interface reset control

enumerator kOSEVENT_TIMER_RST_SHIFT_RSTn: Osevent Timer reset control

enumerator kHSGPIO0_RST_SHIFT_RSTn: HSGPIO 0 reset control

enumerator kHSGPIO1_RST_SHIFT_RSTn: HSGPIO 1 reset control

enumerator kCRC_RST_SHIFT_RSTn: CRC reset control

enumerator kFREQME_RST_SHIFT_RSTn: Frequency Measure reset control

enumerator kCT32B0_RST_SHIFT_RSTn: CT32B0 reset control

enumerator kCT32B1_RST_SHIFT_RSTn: CT32B1 reset control

enumerator kCT32B2_RST_SHIFT_RSTn: CT32B3 reset control

enumerator kCT32B3_RST_SHIFT_RSTn: CT32B4 reset control

enumerator kCT32B4_RST_SHIFT_RSTn: CT32B4 reset control

enumerator kMRT_RST_SHIFT_RSTn: Multi-rate timer (MRT) reset control

enumerator kPINT_RST_SHIFT_RSTn: GPIO_INT reset control

enumerator kINPUTMUX_RST_SHIFT_RSTn: PMUX reset control

typedef enum _RSTCTL_RSTn RSTCTL_RSTn_t

Enumeration for peripheral reset control bits.

Defines the enumeration for peripheral reset control bits in RSTCLTx registers

typedef RSTCTL_RSTn_t reset_ip_name_t: IP reset handle.

void RESET_SetPeripheralReset(reset_ip_name_t peripheral)

Assert reset to peripheral.

Asserts reset signal to specified peripheral module.

Parameters:

peripheral – Assert reset to this peripheral. The enum argument contains encoding of reset register and reset bit position in the reset register.

void RESET_ClearPeripheralReset(reset_ip_name_t peripheral)

Clear reset to peripheral.

Clears reset signal to specified peripheral module, allows it to operate.

Parameters:

peripheral – Clear reset to this peripheral. The enum argument contains encoding of reset register and reset bit position in the reset register.

void RESET_PeripheralReset(reset_ip_name_t peripheral)

Reset peripheral module.

Parameters:

peripheral – Peripheral to reset. The enum argument contains encoding of reset register and reset bit position in the reset register.

static inline void RESET_ReleasePeripheralReset(reset_ip_name_t peripheral)

Release peripheral module.

Parameters:

peripheral – Peripheral to release. The enum argument contains encoding of reset register and reset bit position in the reset register.

FSL_RESET_DRIVER_VERSION: reset driver version 2.1.1.

RST_CTL0_PSCCTL0: Reset control registers index.

RST_CTL0_PSCCTL1

RST_CTL0_PSCCTL2

RST_CTL1_PSCCTL0

RST_CTL1_PSCCTL1

RST_CTL1_PSCCTL2

CRC_RSTS: Array initializers with peripheral reset bits

DMA_RSTS_N

DMIC_RSTS

FLEXCOMM_RSTS

GPIO_RSTS_N

MRT_RSTS

PINT_RSTS

SCT_RSTS

CTIMER_RSTS

USB_RSTS

UTICK_RSTS

WWDT_RSTS

OSTIMER_RSTS

POWERQUAD_RSTS

PUF_RSTS

TRNG_RSTS

USIM_RSTS

ENET_RSTS

RTC: Real Time Clock

void RTC_Init(RTC_Type *base)

Un-gate the RTC clock and enable the RTC oscillator.

Note

This API should be called at the beginning of the application using the RTC driver.

Parameters:

base – RTC peripheral base address

static inline void RTC_Deinit(RTC_Type *base)

Stop the timer and gate the RTC clock.

Parameters:

base – RTC peripheral base address

status_t RTC_SetDatetime(RTC_Type *base, const rtc_datetime_t *datetime)

Set the RTC date and time according to the given time structure.

The RTC counter must be stopped prior to calling this function as writes to the RTC seconds register will fail if the RTC counter is running.

Parameters:

base – RTC peripheral base address
datetime – Pointer to structure where the date and time details to set are stored

Returns:

kStatus_Success: Success in setting the time and starting the RTC kStatus_InvalidArgument: Error because the datetime format is incorrect

void RTC_GetDatetime(RTC_Type *base, rtc_datetime_t *datetime)

Get the RTC time and stores it in the given time structure.

Parameters:

base – RTC peripheral base address
datetime – Pointer to structure where the date and time details are stored.

status_t RTC_SetAlarm(RTC_Type *base, const rtc_datetime_t *alarmTime)

Set the RTC alarm time.

The function checks whether the specified alarm time is greater than the present time. If not, the function does not set the alarm and returns an error.

Parameters:

base – RTC peripheral base address
alarmTime – Pointer to structure where the alarm time is stored.

Returns:

kStatus_Success: success in setting the RTC alarm kStatus_InvalidArgument: Error because the alarm datetime format is incorrect kStatus_Fail: Error because the alarm time has already passed

void RTC_GetAlarm(RTC_Type *base, rtc_datetime_t *datetime)

Return the RTC alarm time.

Parameters:

base – RTC peripheral base address
datetime – Pointer to structure where the alarm date and time details are stored.

static inline void RTC_EnableWakeupTimer(RTC_Type *base, bool enable)

Enable the RTC wake-up timer (1KHZ).

After calling this function, the RTC driver will use/un-use the RTC wake-up (1KHZ) at the same time.

Parameters:

base – RTC peripheral base address
enable – Use/Un-use the RTC wake-up timer.
- true: Use RTC wake-up timer at the same time.
- false: Un-use RTC wake-up timer, RTC only use the normal seconds timer by default.

static inline uint32_t RTC_GetEnabledWakeupTimer(RTC_Type *base)

Get the enabled status of the RTC wake-up timer (1KHZ).

Parameters:

base – RTC peripheral base address

Returns:

The enabled status of RTC wake-up timer (1KHZ).

static inline void RTC_EnableSubsecCounter(RTC_Type *base, bool enable)

Enable the RTC Sub-second counter (32KHZ).

Note

Only enable sub-second counter after RTC_ENA bit has been set to 1.

Parameters:

base – RTC peripheral base address
enable – Enable/Disable RTC sub-second counter.
- true: Enable RTC sub-second counter.
- false: Disable RTC sub-second counter.

static inline uint32_t RTC_GetSubsecValue(const RTC_Type *base)

A read of 32KHZ sub-seconds counter.

Parameters:

base – RTC peripheral base address

Returns:

Current value of the SUBSEC register

static inline void RTC_EnableWakeUpTimerInterruptFromDPD(RTC_Type *base, bool enable)

Enable the wake-up timer interrupt from deep power down mode.

Parameters:

base – RTC peripheral base address
enable – Enable/Disable wake-up timer interrupt from deep power down mode.
- true: Enable wake-up timer interrupt from deep power down mode.
- false: Disable wake-up timer interrupt from deep power down mode.

static inline void RTC_EnableAlarmTimerInterruptFromDPD(RTC_Type *base, bool enable)

Enable the alarm timer interrupt from deep power down mode.

Parameters:

base – RTC peripheral base address
enable – Enable/Disable alarm timer interrupt from deep power down mode.
- true: Enable alarm timer interrupt from deep power down mode.
- false: Disable alarm timer interrupt from deep power down mode.

static inline void RTC_EnableInterrupts(RTC_Type *base, uint32_t mask)

Enables the selected RTC interrupts.

Deprecated:: Do not use this function. It has been superceded by RTC_EnableAlarmTimerInterruptFromDPD and RTC_EnableWakeUpTimerInterruptFromDPD

Parameters:

base – RTC peripheral base address
mask – The interrupts to enable. This is a logical OR of members of the enumeration rtc_interrupt_enable_t

static inline void RTC_DisableInterrupts(RTC_Type *base, uint32_t mask)

Disables the selected RTC interrupts.

Deprecated:: Do not use this function. It has been superceded by RTC_EnableAlarmTimerInterruptFromDPD and RTC_EnableWakeUpTimerInterruptFromDPD

Parameters:

base – RTC peripheral base address
mask – The interrupts to enable. This is a logical OR of members of the enumeration rtc_interrupt_enable_t

static inline uint32_t RTC_GetEnabledInterrupts(RTC_Type *base)

Get the enabled RTC interrupts.

Deprecated:: Do not use this function. It will be deleted in next release version.

Parameters:

base – RTC peripheral base address

Returns:

The enabled interrupts. This is the logical OR of members of the enumeration rtc_interrupt_enable_t

static inline uint32_t RTC_GetStatusFlags(RTC_Type *base)

Get the RTC status flags.

Parameters:

base – RTC peripheral base address

Returns:

The status flags. This is the logical OR of members of the enumeration rtc_status_flags_t

static inline void RTC_ClearStatusFlags(RTC_Type *base, uint32_t mask)

Clear the RTC status flags.

Parameters:

base – RTC peripheral base address
mask – The status flags to clear. This is a logical OR of members of the enumeration rtc_status_flags_t

static inline void RTC_EnableTimer(RTC_Type *base, bool enable)

Enable the RTC timer counter.

After calling this function, the RTC inner counter increments once a second when only using the RTC seconds timer (1hz), while the RTC inner wake-up timer countdown once a millisecond when using RTC wake-up timer (1KHZ) at the same time. RTC timer contain two timers, one is the RTC normal seconds timer, the other one is the RTC wake-up timer, the RTC enable bit is the master switch for the whole RTC timer, so user can use the RTC seconds (1HZ) timer independly, but they can’t use the RTC wake-up timer (1KHZ) independently.

Parameters:

base – RTC peripheral base address
enable – Enable/Disable RTC Timer counter.
- true: Enable RTC Timer counter.
- false: Disable RTC Timer counter.

static inline void RTC_StartTimer(RTC_Type *base)

Starts the RTC time counter.

Deprecated:: Do not use this function. It has been superceded by RTC_EnableTimer

After calling this function, the timer counter increments once a second provided SR[TOF] or SR[TIF] are not set.

Parameters:

base – RTC peripheral base address

static inline void RTC_StopTimer(RTC_Type *base)

Stops the RTC time counter.

Deprecated:: Do not use this function. It has been superceded by RTC_EnableTimer

RTC’s seconds register can be written to only when the timer is stopped.

Parameters:

base – RTC peripheral base address

FSL_RTC_DRIVER_VERSION: Version 2.2.0

enum _rtc_interrupt_enable

List of RTC interrupts.

Values:

enumerator kRTC_AlarmInterruptEnable: Alarm interrupt.

enumerator kRTC_WakeupInterruptEnable: Wake-up interrupt.

enum _rtc_status_flags

List of RTC flags.

Values:

enumerator kRTC_AlarmFlag: Alarm flag

enumerator kRTC_WakeupFlag: 1kHz wake-up timer flag

typedef enum _rtc_interrupt_enable rtc_interrupt_enable_t: List of RTC interrupts.

typedef enum _rtc_status_flags rtc_status_flags_t: List of RTC flags.

typedef struct _rtc_datetime rtc_datetime_t: Structure is used to hold the date and time.

static inline void RTC_SetSecondsTimerMatch(RTC_Type *base, uint32_t matchValue)

Set the RTC seconds timer (1HZ) MATCH value.

Parameters:

base – RTC peripheral base address
matchValue – The value to be set into the RTC MATCH register

static inline uint32_t RTC_GetSecondsTimerMatch(RTC_Type *base)

Read actual RTC seconds timer (1HZ) MATCH value.

Parameters:

base – RTC peripheral base address

Returns:

The actual RTC seconds timer (1HZ) MATCH value.

static inline void RTC_SetSecondsTimerCount(RTC_Type *base, uint32_t countValue)

Set the RTC seconds timer (1HZ) COUNT value.

Parameters:

base – RTC peripheral base address
countValue – The value to be loaded into the RTC COUNT register

static inline uint32_t RTC_GetSecondsTimerCount(RTC_Type *base)

Read the actual RTC seconds timer (1HZ) COUNT value.

Parameters:

base – RTC peripheral base address

Returns:

The actual RTC seconds timer (1HZ) COUNT value.

static inline void RTC_SetWakeupCount(RTC_Type *base, uint16_t wakeupValue)

Enable the RTC wake-up timer (1KHZ) and set countdown value to the RTC WAKE register.

Parameters:

base – RTC peripheral base address
wakeupValue – The value to be loaded into the WAKE register in RTC wake-up timer (1KHZ).

static inline uint16_t RTC_GetWakeupCount(RTC_Type *base)

Read the actual value from the WAKE register value in RTC wake-up timer (1KHZ)

Read the WAKE register twice and compare the result, if the value match,the time can be used.

Parameters:

base – RTC peripheral base address

Returns:

The actual value of the WAKE register value in RTC wake-up timer (1KHZ).

static inline void RTC_Reset(RTC_Type *base)

Perform a software reset on the RTC module.

This resets all RTC registers to their reset value. The bit is cleared by software explicitly clearing it.

Parameters:

base – RTC peripheral base address

struct _rtc_datetime

#include <fsl_rtc.h>

Structure is used to hold the date and time.

Public Members

uint16_t year: Range from 1970 to 2099.

uint8_t month: Range from 1 to 12.

uint8_t day: Range from 1 to 31 (depending on month).

uint8_t hour: Range from 0 to 23.

uint8_t minute: Range from 0 to 59.

uint8_t second: Range from 0 to 59.

Sbloader

enum _bl_status_groups

Values:

enumerator kStatusGroup_SBLoader

enum _sbloader_status

Values:

enumerator kStatusRomLdrSectionOverrun

enumerator kStatusRomLdrSignature

enumerator kStatusRomLdrSectionLength

enumerator kStatusRomLdrUnencryptedOnly

enumerator kStatusRomLdrEOFReached

enumerator kStatusRomLdrChecksum

enumerator kStatusRomLdrCrc32Error

enumerator kStatusRomLdrUnknownCommand

enumerator kStatusRomLdrIdNotFound

enumerator kStatusRomLdrDataUnderrun

enumerator kStatusRomLdrJumpReturned

enumerator kStatusRomLdrCallFailed

enumerator kStatusRomLdrKeyNotFound

enumerator kStatusRomLdrSecureOnly

enumerator kStatusRomLdrResetReturned

enumerator kStatusRomLdrRollbackBlocked

enumerator kStatusRomLdrInvalidSectionMacCount

enumerator kStatusRomLdrUnexpectedCommand

enumerator kStatusRomLdrBadSBKEK

enumerator kStatusRomLdrPendingJumpCommand

enum _sectionType

sb3 section definitions

section type

Values:

enumerator kSectionNone

enumerator kSectionDataRange

enumerator kSectionDiffUpdate

enumerator kSectionDDRConfig

enumerator kSectionRegister

Values:

enumerator kFwVerChk_Id_none

enumerator kFwVerChk_Id_nonsecure

enumerator kFwVerChk_Id_secure

enum _loader_command_sb3

Values:

enumerator kSB3_CmdInvalid

enumerator kSB3_CmdErase

enumerator kSB3_CmdLoad

enumerator kSB3_CmdExecute

enumerator kSB3_CmdCall

enumerator kSB3_CmdProgramFuse

enumerator kSB3_CmdProgramIFR

enumerator kSB3_CmdLoadCmac

enumerator kSB3_CmdCopy

enumerator kSB3_CmdLoadHashLocking

enumerator kSB3_CmdLoadKeyBlob

enumerator kSB3_CmdConfigMem

enumerator kSB3_CmdFillMem

enumerator kSB3_CmdFwVerCheck

typedef uint8_t chunk_v3_t[16]

typedef struct _ldr_buf ldr_buf_t

typedef struct _ldr_Context_v3 ldr_Context_v3_t

typedef status_t (*pLdrFnc_v3_t)(ldr_Context_v3_t *content): Function pointer definition for all loader action functions.

typedef enum _sectionType section_type_t

sb3 section definitions

section type

typedef struct range_header sb3_data_range_header_t: section data range structure

typedef struct range_header_expansion sb3_data_range_expansion_t

typedef struct copy_memory_expansion sb3_copy_memory_expansion_t

typedef struct copy sb3_copy_memory_t

typedef struct load_keyblob sb3_load_keyblob_t

typedef struct fill_memory_expansion sb3_fill_memory_expansion_t

typedef struct fill_memory sb3_fill_memory_t

typedef struct config_memory sb3_config_memory_t

typedef struct fw_ver_check sb3_fw_ver_check_t

typedef struct section_header sb3_section_header_t: sb3 DATA section header format

typedef enum _loader_command_sb3 sb3_cmd_t

SB3_BYTES_PER_CHUNK: Defines the number of bytes in a cipher block (chunk). This is dictated by the encryption algorithm.

SB3_DATA_RANGE_HEADER_FLAGS_ERASE_MASK

SB3_DATA_RANGE_HEADER_FLAGS_LOAD_MASK

SB3_DATA_RANGE_HEADER_TAG

SB3_DATA_ALIGNMENT_SIZE_IN_BYTE

SB3_LOAD_KEY_BLOB_OTP_MASK

SBLOADER_V3_CMD_SET_ALL: The all of the allowed command.

SBLOADER_V3_CMD_SET_IN_ISP_MODE: The allowed command set in ISP mode.

SBLOADER_V3_CMD_SET_IN_REC_MODE: The allowed command set in recovery mode.

SBLOADER_V3_CMD_SET_IN_SEC_ATE_MODE: The allowed command set in secure ATE mode.

SB3_DATA_BUFFER_SIZE_IN_BYTE

struct _ldr_buf: #include <fsl_sbloader_v3.h>

struct range_header: #include <fsl_sbloader_v3.h>

section data range structure

struct range_header_expansion: #include <fsl_sbloader_v3.h>

struct copy_memory_expansion: #include <fsl_sbloader_v3.h>

struct copy: #include <fsl_sbloader_v3.h>

struct load_keyblob: #include <fsl_sbloader_v3.h>

struct fill_memory_expansion: #include <fsl_sbloader_v3.h>

struct fill_memory: #include <fsl_sbloader_v3.h>

struct config_memory: #include <fsl_sbloader_v3.h>

struct fw_ver_check: #include <fsl_sbloader_v3.h>

struct section_header: #include <fsl_sbloader_v3.h>

sb3 DATA section header format

struct _ldr_Context_v3

#include <fsl_sbloader_v3.h>

Loader context definition.

Public Members

pLdrFnc_v3_t Action: pointer to loader action function

uint32_t block_size: size of each block in bytes

uint32_t block_data_size: data size in bytes (NBOOT_SB3_CHUNK_SIZE_IN_BYTES)

uint32_t block_data_total: data max size in bytes (block_size * data_size

uint32_t block_buffer_size: block0 and block size

uint32_t processedBlocks: will be used for both block0 and blockx

bool in_data_block

data block offset in a block.

in progress of handling a data block within a block

bool in_data_section: in progress of handling a data section within a data block

bool in_data_range: in progress of handling a data range within a data section

uint32_t commandSet: support command set during sb file handling

uint8_t data_buffer[(MAX(128, NBOOT_KEY_BLOB_SIZE_IN_BYTE_MAX))]: temporary data buffer

uint8_t fuse_cmd_buffer[32 * 4]: used for fuse command

bool do_firmware_load: special handling for firmware loading ourside normal memory regions

SCTimer: SCTimer/PWM (SCT)

status_t SCTIMER_Init(SCT_Type *base, const sctimer_config_t *config)

Ungates the SCTimer clock and configures the peripheral for basic operation.

Note

This API should be called at the beginning of the application using the SCTimer driver.

Parameters:

base – SCTimer peripheral base address
config – Pointer to the user configuration structure.

Returns:

kStatus_Success indicates success; Else indicates failure.

void SCTIMER_Deinit(SCT_Type *base)

Gates the SCTimer clock.

Parameters:

base – SCTimer peripheral base address

void SCTIMER_GetDefaultConfig(sctimer_config_t *config)

Fills in the SCTimer configuration structure with the default settings.

The default values are:

config->enableCounterUnify = true;
config->clockMode = kSCTIMER_System_ClockMode;
config->clockSelect = kSCTIMER_Clock_On_Rise_Input_0;
config->enableBidirection_l = false;
config->enableBidirection_h = false;
config->prescale_l = 0U;
config->prescale_h = 0U;
config->outInitState = 0U;
config->inputsync  = 0xFU;

Parameters:

config – Pointer to the user configuration structure.

status_t SCTIMER_SetupPwm(SCT_Type *base, const sctimer_pwm_signal_param_t *pwmParams, sctimer_pwm_mode_t mode, uint32_t pwmFreq_Hz, uint32_t srcClock_Hz, uint32_t *event)

Configures the PWM signal parameters.

Call this function to configure the PWM signal period, mode, duty cycle, and edge. This function will create 2 events; one of the events will trigger on match with the pulse value and the other will trigger when the counter matches the PWM period. The PWM period event is also used as a limit event to reset the counter or change direction. Both events are enabled for the same state. The state number can be retrieved by calling the function SCTIMER_GetCurrentStateNumber(). The counter is set to operate as one 32-bit counter (unify bit is set to 1). The counter operates in bi-directional mode when generating a center-aligned PWM.

Note

When setting PWM output from multiple output pins, they all should use the same PWM mode i.e all PWM’s should be either edge-aligned or center-aligned. When using this API, the PWM signal frequency of all the initialized channels must be the same. Otherwise all the initialized channels’ PWM signal frequency is equal to the last call to the API’s pwmFreq_Hz.

Parameters:

base – SCTimer peripheral base address
pwmParams – PWM parameters to configure the output
mode – PWM operation mode, options available in enumeration sctimer_pwm_mode_t
pwmFreq_Hz – PWM signal frequency in Hz
srcClock_Hz – SCTimer counter clock in Hz
event – Pointer to a variable where the PWM period event number is stored

Returns:

kStatus_Success on success kStatus_Fail If we have hit the limit in terms of number of events created or if an incorrect PWM dutycylce is passed in.

void SCTIMER_UpdatePwmDutycycle(SCT_Type *base, sctimer_out_t output, uint8_t dutyCyclePercent, uint32_t event)

Updates the duty cycle of an active PWM signal.

Before calling this function, the counter is set to operate as one 32-bit counter (unify bit is set to 1).

Parameters:

base – SCTimer peripheral base address
output – The output to configure
dutyCyclePercent – New PWM pulse width; the value should be between 1 to 100
event – Event number associated with this PWM signal. This was returned to the user by the function SCTIMER_SetupPwm().

static inline void SCTIMER_EnableInterrupts(SCT_Type *base, uint32_t mask)

Enables the selected SCTimer interrupts.

Parameters:

base – SCTimer peripheral base address
mask – The interrupts to enable. This is a logical OR of members of the enumeration sctimer_interrupt_enable_t

static inline void SCTIMER_DisableInterrupts(SCT_Type *base, uint32_t mask)

Disables the selected SCTimer interrupts.

Parameters:

base – SCTimer peripheral base address
mask – The interrupts to enable. This is a logical OR of members of the enumeration sctimer_interrupt_enable_t

static inline uint32_t SCTIMER_GetEnabledInterrupts(SCT_Type *base)

Gets the enabled SCTimer interrupts.

Parameters:

base – SCTimer peripheral base address

Returns:

The enabled interrupts. This is the logical OR of members of the enumeration sctimer_interrupt_enable_t

static inline uint32_t SCTIMER_GetStatusFlags(SCT_Type *base)

Gets the SCTimer status flags.

Parameters:

base – SCTimer peripheral base address

Returns:

The status flags. This is the logical OR of members of the enumeration sctimer_status_flags_t

static inline void SCTIMER_ClearStatusFlags(SCT_Type *base, uint32_t mask)

Clears the SCTimer status flags.

Parameters:

base – SCTimer peripheral base address
mask – The status flags to clear. This is a logical OR of members of the enumeration sctimer_status_flags_t

static inline void SCTIMER_StartTimer(SCT_Type *base, uint32_t countertoStart)

Starts the SCTimer counter.

Note

In 16-bit mode, we can enable both Counter_L and Counter_H, In 32-bit mode, we only can select Counter_U.

Parameters:

base – SCTimer peripheral base address
countertoStart – The SCTimer counters to enable. This is a logical OR of members of the enumeration sctimer_counter_t.

static inline void SCTIMER_StopTimer(SCT_Type *base, uint32_t countertoStop)

Halts the SCTimer counter.

Parameters:

base – SCTimer peripheral base address
countertoStop – The SCTimer counters to stop. This is a logical OR of members of the enumeration sctimer_counter_t.

status_t SCTIMER_CreateAndScheduleEvent(SCT_Type *base, sctimer_event_t howToMonitor, uint32_t matchValue, uint32_t whichIO, sctimer_counter_t whichCounter, uint32_t *event)

Create an event that is triggered on a match or IO and schedule in current state.

This function will configure an event using the options provided by the user. If the event type uses the counter match, then the function will set the user provided match value into a match register and put this match register number into the event control register. The event is enabled for the current state and the event number is increased by one at the end. The function returns the event number; this event number can be used to configure actions to be done when this event is triggered.

Parameters:

base – SCTimer peripheral base address
howToMonitor – Event type; options are available in the enumeration sctimer_interrupt_enable_t
matchValue – The match value that will be programmed to a match register
whichIO – The input or output that will be involved in event triggering. This field is ignored if the event type is “match only”
whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.
event – Pointer to a variable where the new event number is stored

Returns:

kStatus_Success on success kStatus_Error if we have hit the limit in terms of number of events created or if we have reached the limit in terms of number of match registers

void SCTIMER_ScheduleEvent(SCT_Type *base, uint32_t event)

Enable an event in the current state.

This function will allow the event passed in to trigger in the current state. The event must be created earlier by either calling the function SCTIMER_SetupPwm() or function SCTIMER_CreateAndScheduleEvent() .

Parameters:

base – SCTimer peripheral base address
event – Event number to enable in the current state

status_t SCTIMER_IncreaseState(SCT_Type *base)

Increase the state by 1.

All future events created by calling the function SCTIMER_ScheduleEvent() will be enabled in this new state.

Parameters:

base – SCTimer peripheral base address

Returns:

kStatus_Success on success kStatus_Error if we have hit the limit in terms of states used

uint32_t SCTIMER_GetCurrentState(SCT_Type *base)

Provides the current state.

User can use this to set the next state by calling the function SCTIMER_SetupNextStateAction().

Parameters:

base – SCTimer peripheral base address

Returns:

The current state

static inline void SCTIMER_SetCounterState(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t state)

Set the counter current state.

The function is to set the state variable bit field of STATE register. Writing to the STATE_L, STATE_H, or unified register is only allowed when the corresponding counter is halted (HALT bits are set to 1 in the CTRL register).

Parameters:

base – SCTimer peripheral base address
whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.
state – The counter current state number (only support range from 0~31).

static inline uint16_t SCTIMER_GetCounterState(SCT_Type *base, sctimer_counter_t whichCounter)

Get the counter current state value.

The function is to get the state variable bit field of STATE register.

Parameters:

base – SCTimer peripheral base address
whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.

Returns:

The the counter current state value.

status_t SCTIMER_SetupCaptureAction(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t *captureRegister, uint32_t event)

Setup capture of the counter value on trigger of a selected event.

Parameters:

base – SCTimer peripheral base address
whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.
captureRegister – Pointer to a variable where the capture register number will be returned. User can read the captured value from this register when the specified event is triggered.
event – Event number that will trigger the capture

Returns:

kStatus_Success on success kStatus_Error if we have hit the limit in terms of number of match/capture registers available

void SCTIMER_SetCallback(SCT_Type *base, sctimer_event_callback_t callback, uint32_t event)

Receive noticification when the event trigger an interrupt.

If the interrupt for the event is enabled by the user, then a callback can be registered which will be invoked when the event is triggered

Parameters:

base – SCTimer peripheral base address
event – Event number that will trigger the interrupt
callback – Function to invoke when the event is triggered

static inline void SCTIMER_SetupStateLdMethodAction(SCT_Type *base, uint32_t event, bool fgLoad)

Change the load method of transition to the specified state.

Change the load method of transition, it will be triggered by the event number that is passed in by the user.

Parameters:

base – SCTimer peripheral base address
event – Event number that will change the method to trigger the state transition
fgLoad – The method to load highest-numbered event occurring for that state to the STATE register.
- true: Load the STATEV value to STATE when the event occurs to be the next state.
- false: Add the STATEV value to STATE when the event occurs to be the next state.

static inline void SCTIMER_SetupNextStateActionwithLdMethod(SCT_Type *base, uint32_t nextState, uint32_t event, bool fgLoad)

Transition to the specified state with Load method.

This transition will be triggered by the event number that is passed in by the user, the method decide how to load the highest-numbered event occurring for that state to the STATE register.

Parameters:

base – SCTimer peripheral base address
nextState – The next state SCTimer will transition to
event – Event number that will trigger the state transition
fgLoad – The method to load the highest-numbered event occurring for that state to the STATE register.
- true: Load the STATEV value to STATE when the event occurs to be the next state.
- false: Add the STATEV value to STATE when the event occurs to be the next state.

static inline void SCTIMER_SetupNextStateAction(SCT_Type *base, uint32_t nextState, uint32_t event)

Transition to the specified state.

Deprecated:: Do not use this function. It has been superceded by SCTIMER_SetupNextStateActionwithLdMethod

This transition will be triggered by the event number that is passed in by the user.

Parameters:

base – SCTimer peripheral base address
nextState – The next state SCTimer will transition to
event – Event number that will trigger the state transition

static inline void SCTIMER_SetupEventActiveDirection(SCT_Type *base, sctimer_event_active_direction_t activeDirection, uint32_t event)

Setup event active direction when the counters are operating in BIDIR mode.

Parameters:

base – SCTimer peripheral base address
activeDirection – Event generation active direction, see sctimer_event_active_direction_t.
event – Event number that need setup the active direction.

static inline void SCTIMER_SetupOutputSetAction(SCT_Type *base, uint32_t whichIO, uint32_t event)

Set the Output.

This output will be set when the event number that is passed in by the user is triggered.

Parameters:

base – SCTimer peripheral base address
whichIO – The output to set
event – Event number that will trigger the output change

static inline void SCTIMER_SetupOutputClearAction(SCT_Type *base, uint32_t whichIO, uint32_t event)

Clear the Output.

This output will be cleared when the event number that is passed in by the user is triggered.

Parameters:

base – SCTimer peripheral base address
whichIO – The output to clear
event – Event number that will trigger the output change

void SCTIMER_SetupOutputToggleAction(SCT_Type *base, uint32_t whichIO, uint32_t event)

Toggle the output level.

This change in the output level is triggered by the event number that is passed in by the user.

Parameters:

base – SCTimer peripheral base address
whichIO – The output to toggle
event – Event number that will trigger the output change

static inline void SCTIMER_SetupCounterLimitAction(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t event)

Limit the running counter.

The counter is limited when the event number that is passed in by the user is triggered.

Parameters:

base – SCTimer peripheral base address
whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.
event – Event number that will trigger the counter to be limited

static inline void SCTIMER_SetupCounterStopAction(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t event)

Stop the running counter.

The counter is stopped when the event number that is passed in by the user is triggered.

Parameters:

base – SCTimer peripheral base address
whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.
event – Event number that will trigger the counter to be stopped

static inline void SCTIMER_SetupCounterStartAction(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t event)

Re-start the stopped counter.

The counter will re-start when the event number that is passed in by the user is triggered.

Parameters:

base – SCTimer peripheral base address
whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.
event – Event number that will trigger the counter to re-start

static inline void SCTIMER_SetupCounterHaltAction(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t event)

Halt the running counter.

The counter is disabled (halted) when the event number that is passed in by the user is triggered. When the counter is halted, all further events are disabled. The HALT condition can only be removed by calling the SCTIMER_StartTimer() function.

Parameters:

base – SCTimer peripheral base address
whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.
event – Event number that will trigger the counter to be halted

static inline void SCTIMER_SetupDmaTriggerAction(SCT_Type *base, uint32_t dmaNumber, uint32_t event)

Generate a DMA request.

DMA request will be triggered by the event number that is passed in by the user.

Parameters:

base – SCTimer peripheral base address
dmaNumber – The DMA request to generate
event – Event number that will trigger the DMA request

static inline void SCTIMER_SetCOUNTValue(SCT_Type *base, sctimer_counter_t whichCounter, uint32_t value)

Set the value of counter.

The function is to set the value of Count register, Writing to the COUNT_L, COUNT_H, or unified register is only allowed when the corresponding counter is halted (HALT bits are set to 1 in the CTRL register).

Parameters:

base – SCTimer peripheral base address
whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.
value – the counter value update to the COUNT register.

static inline uint32_t SCTIMER_GetCOUNTValue(SCT_Type *base, sctimer_counter_t whichCounter)

Get the value of counter.

The function is to read the value of Count register, software can read the counter registers at any time..

Parameters:

base – SCTimer peripheral base address
whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.

Returns:

The value of counter selected.

static inline void SCTIMER_SetEventInState(SCT_Type *base, uint32_t event, uint32_t state)

Set the state mask bit field of EV_STATE register.

Parameters:

base – SCTimer peripheral base address
event – The EV_STATE register be set.
state – The state value in which the event is enabled to occur.

static inline void SCTIMER_ClearEventInState(SCT_Type *base, uint32_t event, uint32_t state)

Clear the state mask bit field of EV_STATE register.

Parameters:

base – SCTimer peripheral base address
event – The EV_STATE register be clear.
state – The state value in which the event is disabled to occur.

static inline bool SCTIMER_GetEventInState(SCT_Type *base, uint32_t event, uint32_t state)

Get the state mask bit field of EV_STATE register.

Note

This function is to check whether the event is enabled in a specific state.

Parameters:

base – SCTimer peripheral base address
event – The EV_STATE register be read.
state – The state value.

Returns:

The the state mask bit field of EV_STATE register.

true: The event is enable in state.
false: The event is disable in state.

static inline uint32_t SCTIMER_GetCaptureValue(SCT_Type *base, sctimer_counter_t whichCounter, uint8_t capChannel)

Get the value of capture register.

This function returns the captured value upon occurrence of the events selected by the corresponding Capture Control registers occurred.

Parameters:

base – SCTimer peripheral base address
whichCounter – SCTimer counter to use. In 16-bit mode, we can select Counter_L and Counter_H, In 32-bit mode, we can select Counter_U.
capChannel – SCTimer capture register of capture channel.

Returns:

The SCTimer counter value at which this register was last captured.

void SCTIMER_EventHandleIRQ(SCT_Type *base)

SCTimer interrupt handler.

Parameters:

base – SCTimer peripheral base address.

FSL_SCTIMER_DRIVER_VERSION: Version

enum _sctimer_pwm_mode

SCTimer PWM operation modes.

Values:

enumerator kSCTIMER_EdgeAlignedPwm: Edge-aligned PWM

enumerator kSCTIMER_CenterAlignedPwm: Center-aligned PWM

enum _sctimer_counter

SCTimer counters type.

Values:

enumerator kSCTIMER_Counter_L: 16-bit Low counter.

enumerator kSCTIMER_Counter_H: 16-bit High counter.

enumerator kSCTIMER_Counter_U: 32-bit Unified counter.

enum _sctimer_input

List of SCTimer input pins.

Values:

enumerator kSCTIMER_Input_0: SCTIMER input 0

enumerator kSCTIMER_Input_1: SCTIMER input 1

enumerator kSCTIMER_Input_2: SCTIMER input 2

enumerator kSCTIMER_Input_3: SCTIMER input 3

enumerator kSCTIMER_Input_4: SCTIMER input 4

enumerator kSCTIMER_Input_5: SCTIMER input 5

enumerator kSCTIMER_Input_6: SCTIMER input 6

enumerator kSCTIMER_Input_7: SCTIMER input 7

enum _sctimer_out

List of SCTimer output pins.

Values:

enumerator kSCTIMER_Out_0: SCTIMER output 0

enumerator kSCTIMER_Out_1: SCTIMER output 1

enumerator kSCTIMER_Out_2: SCTIMER output 2

enumerator kSCTIMER_Out_3: SCTIMER output 3

enumerator kSCTIMER_Out_4: SCTIMER output 4

enumerator kSCTIMER_Out_5: SCTIMER output 5

enumerator kSCTIMER_Out_6: SCTIMER output 6

enumerator kSCTIMER_Out_7: SCTIMER output 7

enumerator kSCTIMER_Out_8: SCTIMER output 8

enumerator kSCTIMER_Out_9: SCTIMER output 9

enum _sctimer_pwm_level_select

SCTimer PWM output pulse mode: high-true, low-true or no output.

Values:

enumerator kSCTIMER_LowTrue: Low true pulses

enumerator kSCTIMER_HighTrue: High true pulses

enum _sctimer_clock_mode

SCTimer clock mode options.

Values:

enumerator kSCTIMER_System_ClockMode: System Clock Mode

enumerator kSCTIMER_Sampled_ClockMode: Sampled System Clock Mode

enumerator kSCTIMER_Input_ClockMode: SCT Input Clock Mode

enumerator kSCTIMER_Asynchronous_ClockMode: Asynchronous Mode

enum _sctimer_clock_select

SCTimer clock select options.

Values:

enumerator kSCTIMER_Clock_On_Rise_Input_0: Rising edges on input 0

enumerator kSCTIMER_Clock_On_Fall_Input_0: Falling edges on input 0

enumerator kSCTIMER_Clock_On_Rise_Input_1: Rising edges on input 1

enumerator kSCTIMER_Clock_On_Fall_Input_1: Falling edges on input 1

enumerator kSCTIMER_Clock_On_Rise_Input_2: Rising edges on input 2

enumerator kSCTIMER_Clock_On_Fall_Input_2: Falling edges on input 2

enumerator kSCTIMER_Clock_On_Rise_Input_3: Rising edges on input 3

enumerator kSCTIMER_Clock_On_Fall_Input_3: Falling edges on input 3

enumerator kSCTIMER_Clock_On_Rise_Input_4: Rising edges on input 4

enumerator kSCTIMER_Clock_On_Fall_Input_4: Falling edges on input 4

enumerator kSCTIMER_Clock_On_Rise_Input_5: Rising edges on input 5

enumerator kSCTIMER_Clock_On_Fall_Input_5: Falling edges on input 5

enumerator kSCTIMER_Clock_On_Rise_Input_6: Rising edges on input 6

enumerator kSCTIMER_Clock_On_Fall_Input_6: Falling edges on input 6

enumerator kSCTIMER_Clock_On_Rise_Input_7: Rising edges on input 7

enumerator kSCTIMER_Clock_On_Fall_Input_7: Falling edges on input 7

enum _sctimer_conflict_resolution

SCTimer output conflict resolution options.

Specifies what action should be taken if multiple events dictate that a given output should be both set and cleared at the same time

Values:

enumerator kSCTIMER_ResolveNone: No change

enumerator kSCTIMER_ResolveSet: Set output

enumerator kSCTIMER_ResolveClear: Clear output

enumerator kSCTIMER_ResolveToggle: Toggle output

enum _sctimer_event_active_direction

List of SCTimer event generation active direction when the counters are operating in BIDIR mode.

Values:

enumerator kSCTIMER_ActiveIndependent: This event is triggered regardless of the count direction.

enumerator kSCTIMER_ActiveInCountUp: This event is triggered only during up-counting when BIDIR = 1.

enumerator kSCTIMER_ActiveInCountDown: This event is triggered only during down-counting when BIDIR = 1.

enum _sctimer_event

List of SCTimer event types.

Values:

enumerator kSCTIMER_InputLowOrMatchEvent

enumerator kSCTIMER_InputRiseOrMatchEvent

enumerator kSCTIMER_InputFallOrMatchEvent

enumerator kSCTIMER_InputHighOrMatchEvent

enumerator kSCTIMER_MatchEventOnly

enumerator kSCTIMER_InputLowEvent

enumerator kSCTIMER_InputRiseEvent

enumerator kSCTIMER_InputFallEvent

enumerator kSCTIMER_InputHighEvent

enumerator kSCTIMER_InputLowAndMatchEvent

enumerator kSCTIMER_InputRiseAndMatchEvent

enumerator kSCTIMER_InputFallAndMatchEvent

enumerator kSCTIMER_InputHighAndMatchEvent

enumerator kSCTIMER_OutputLowOrMatchEvent

enumerator kSCTIMER_OutputRiseOrMatchEvent

enumerator kSCTIMER_OutputFallOrMatchEvent

enumerator kSCTIMER_OutputHighOrMatchEvent

enumerator kSCTIMER_OutputLowEvent

enumerator kSCTIMER_OutputRiseEvent

enumerator kSCTIMER_OutputFallEvent

enumerator kSCTIMER_OutputHighEvent

enumerator kSCTIMER_OutputLowAndMatchEvent

enumerator kSCTIMER_OutputRiseAndMatchEvent

enumerator kSCTIMER_OutputFallAndMatchEvent

enumerator kSCTIMER_OutputHighAndMatchEvent

enum _sctimer_interrupt_enable

List of SCTimer interrupts.

Values:

enumerator kSCTIMER_Event0InterruptEnable: Event 0 interrupt

enumerator kSCTIMER_Event1InterruptEnable: Event 1 interrupt

enumerator kSCTIMER_Event2InterruptEnable: Event 2 interrupt

enumerator kSCTIMER_Event3InterruptEnable: Event 3 interrupt

enumerator kSCTIMER_Event4InterruptEnable: Event 4 interrupt

enumerator kSCTIMER_Event5InterruptEnable: Event 5 interrupt

enumerator kSCTIMER_Event6InterruptEnable: Event 6 interrupt

enumerator kSCTIMER_Event7InterruptEnable: Event 7 interrupt

enumerator kSCTIMER_Event8InterruptEnable: Event 8 interrupt

enumerator kSCTIMER_Event9InterruptEnable: Event 9 interrupt

enumerator kSCTIMER_Event10InterruptEnable: Event 10 interrupt

enumerator kSCTIMER_Event11InterruptEnable: Event 11 interrupt

enumerator kSCTIMER_Event12InterruptEnable: Event 12 interrupt

enum _sctimer_status_flags

List of SCTimer flags.

Values:

enumerator kSCTIMER_Event0Flag: Event 0 Flag

enumerator kSCTIMER_Event1Flag: Event 1 Flag

enumerator kSCTIMER_Event2Flag: Event 2 Flag

enumerator kSCTIMER_Event3Flag: Event 3 Flag

enumerator kSCTIMER_Event4Flag: Event 4 Flag

enumerator kSCTIMER_Event5Flag: Event 5 Flag

enumerator kSCTIMER_Event6Flag: Event 6 Flag

enumerator kSCTIMER_Event7Flag: Event 7 Flag

enumerator kSCTIMER_Event8Flag: Event 8 Flag

enumerator kSCTIMER_Event9Flag: Event 9 Flag

enumerator kSCTIMER_Event10Flag: Event 10 Flag

enumerator kSCTIMER_Event11Flag: Event 11 Flag

enumerator kSCTIMER_Event12Flag: Event 12 Flag

enumerator kSCTIMER_BusErrorLFlag: Bus error due to write when L counter was not halted

enumerator kSCTIMER_BusErrorHFlag: Bus error due to write when H counter was not halted

typedef enum _sctimer_pwm_mode sctimer_pwm_mode_t: SCTimer PWM operation modes.

typedef enum _sctimer_counter sctimer_counter_t: SCTimer counters type.

typedef enum _sctimer_input sctimer_input_t: List of SCTimer input pins.

typedef enum _sctimer_out sctimer_out_t: List of SCTimer output pins.

typedef enum _sctimer_pwm_level_select sctimer_pwm_level_select_t: SCTimer PWM output pulse mode: high-true, low-true or no output.

typedef struct _sctimer_pwm_signal_param sctimer_pwm_signal_param_t: Options to configure a SCTimer PWM signal.

typedef enum _sctimer_clock_mode sctimer_clock_mode_t: SCTimer clock mode options.

typedef enum _sctimer_clock_select sctimer_clock_select_t: SCTimer clock select options.

typedef enum _sctimer_conflict_resolution sctimer_conflict_resolution_t

SCTimer output conflict resolution options.

Specifies what action should be taken if multiple events dictate that a given output should be both set and cleared at the same time

typedef enum _sctimer_event_active_direction sctimer_event_active_direction_t: List of SCTimer event generation active direction when the counters are operating in BIDIR mode.

typedef enum _sctimer_event sctimer_event_t: List of SCTimer event types.

typedef void (*sctimer_event_callback_t)(void): SCTimer callback typedef.

typedef enum _sctimer_interrupt_enable sctimer_interrupt_enable_t: List of SCTimer interrupts.

typedef enum _sctimer_status_flags sctimer_status_flags_t: List of SCTimer flags.

typedef struct _sctimer_config sctimer_config_t

SCTimer configuration structure.

This structure holds the configuration settings for the SCTimer peripheral. To initialize this structure to reasonable defaults, call the SCTMR_GetDefaultConfig() function and pass a pointer to the configuration structure instance.

The configuration structure can be made constant so as to reside in flash.

SCT_EV_STATE_STATEMSKn(x)

struct _sctimer_pwm_signal_param

#include <fsl_sctimer.h>

Options to configure a SCTimer PWM signal.

Public Members

sctimer_out_t output: The output pin to use to generate the PWM signal

sctimer_pwm_level_select_t level: PWM output active level select.

uint8_t dutyCyclePercent: PWM pulse width, value should be between 0 to 100 0 = always inactive signal (0% duty cycle) 100 = always active signal (100% duty cycle).

struct _sctimer_config

#include <fsl_sctimer.h>

SCTimer configuration structure.

This structure holds the configuration settings for the SCTimer peripheral. To initialize this structure to reasonable defaults, call the SCTMR_GetDefaultConfig() function and pass a pointer to the configuration structure instance.

The configuration structure can be made constant so as to reside in flash.

Public Members

bool enableCounterUnify: true: SCT operates as a unified 32-bit counter; false: SCT operates as two 16-bit counters. User can use the 16-bit low counter and the 16-bit high counters at the same time; for Hardware limit, user can not use unified 32-bit counter and any 16-bit low/high counter at the same time.

sctimer_clock_mode_t clockMode: SCT clock mode value

sctimer_clock_select_t clockSelect: SCT clock select value

bool enableBidirection_l: true: Up-down count mode for the L or unified counter false: Up count mode only for the L or unified counter

bool enableBidirection_h: true: Up-down count mode for the H or unified counter false: Up count mode only for the H or unified counter. This field is used only if the enableCounterUnify is set to false

uint8_t prescale_l: Prescale value to produce the L or unified counter clock

uint8_t prescale_h: Prescale value to produce the H counter clock. This field is used only if the enableCounterUnify is set to false

uint8_t outInitState: Defines the initial output value

uint8_t inputsync: SCT INSYNC value, INSYNC field in the CONFIG register, from bit9 to bit 16. it is used to define synchronization for input N: bit 9 = input 0 bit 10 = input 1 bit 11 = input 2 bit 12 = input 3 All other bits are reserved (bit13 ~bit 16). How User to set the the value for the member inputsync. IE: delay for input0, and input 1, bypasses for input 2 and input 3 MACRO definition in user level. #define INPUTSYNC0 (0U) #define INPUTSYNC1 (1U) #define INPUTSYNC2 (2U) #define INPUTSYNC3 (3U) User Code. sctimerInfo.inputsync = (1 << INPUTSYNC2) | (1 << INPUTSYNC3);

Sdioslv_sdu_driver

enum _sdioslv_status

SDIO status.

Values:

enumerator kStatus_SDIOSLV_CmdPending: previous command is under working.

enumerator kStatus_SDIOSLV_SendFull: all data slots are occupied.

enumerator kStatus_SDIOSLV_FuncEnabled: function enabled

enumerator kStatus_SDIOSLV_FuncDisabled: function disabled

enumerator kStatus_SDIOSLV_FuncSuspended: function suspended

enumerator kStatus_SDIOSLV_FuncResumed: function resumed

enumerator kStatus_SDIOSLV_FuncSendComplete: function send complete

enumerator kStatus_SDIOSLV_FuncReadComplete: function read complete

enumerator kStatus_SDIOSLV_FuncRequestBuffer: function request read buffer

enum _sdioslv_int_cpu_num

SDIO card function number.

Values:

enumerator kSDIOSLV_INT_CPUNum1: sdio interrupt to CPU1

enumerator kSDIOSLV_INT_CPUNum2: sdio interrupt to CPU2

enumerator kSDIOSLV_INT_CPUNum3: sdio interrupt to CPU3

enum _sdioslv_func_num

SDIO card function number.

Values:

enumerator kSDIOSLV_FunctionNum1: sdio function1

enumerator kSDIOSLV_FunctionNum2: sdio function2

enumerator kSDIOSLV_FunctionNum3: sdio function3

enumerator kSDIOSLV_FunctionNum4: sdio function4

enumerator kSDIOSLV_FunctionNum5: sdio function5

enumerator kSDIOSLV_FunctionNum6: sdio function6

enumerator kSDIOSLV_FunctionNum7: sdio function7

enum _sdioslv_port_num

SDIO port number (per function)

Values:

enumerator kSDIOSLV_DataPortNum0: sdio dataport0

enumerator kSDIOSLV_DataPortNum1: sdio dataport1

enumerator kSDIOSLV_DataPortNum2: sdio dataport2

enumerator kSDIOSLV_DataPortNum3: sdio dataport3

enumerator kSDIOSLV_DataPortNum4: sdio dataport4

enumerator kSDIOSLV_DataPortNum5: sdio dataport5

enumerator kSDIOSLV_DataPortNum6: sdio dataport6

enumerator kSDIOSLV_DataPortNum7: sdio dataport7

enumerator kSDIOSLV_DataPortNum8: sdio dataport8

enumerator kSDIOSLV_DataPortNum9: sdio dataport9

enumerator kSDIOSLV_DataPortNum10: sdio dataport10

enumerator kSDIOSLV_DataPortNum11: sdio dataport11

enumerator kSDIOSLV_DataPortNum12: sdio dataport12

enumerator kSDIOSLV_DataPortNum13: sdio dataport13

enumerator kSDIOSLV_DataPortNum14: sdio dataport14

enumerator kSDIOSLV_DataPortNum15: sdio dataport15

enumerator kSDIOSLV_DataPortNum16: sdio dataport16

enumerator kSDIOSLV_DataPortNum17: sdio dataport17

enumerator kSDIOSLV_DataPortNum18: sdio dataport18

enumerator kSDIOSLV_DataPortNum19: sdio dataport19

enumerator kSDIOSLV_DataPortNum20: sdio dataport20

enumerator kSDIOSLV_DataPortNum21: sdio dataport21

enumerator kSDIOSLV_DataPortNum22: sdio dataport22

enumerator kSDIOSLV_DataPortNum23: sdio dataport23

enumerator kSDIOSLV_DataPortNum24: sdio dataport24

enumerator kSDIOSLV_DataPortNum25: sdio dataport25

enumerator kSDIOSLV_DataPortNum26: sdio dataport26

enumerator kSDIOSLV_DataPortNum27: sdio dataport27

enumerator kSDIOSLV_DataPortNum28: sdio dataport28

enumerator kSDIOSLV_DataPortNum29: sdio dataport29

enumerator kSDIOSLV_DataPortNum30: sdio dataport30

enumerator kSDIOSLV_DataPortNum31: sdio dataport31

enumerator kSDIOSLV_CmdPortNum0: sdio cmdport0

enum _sdioslv_bus_speed

SDIO Bus Speed.

Values:

enumerator kSDIOSLV_SDR12_MODE: SDR12 mode => 25Mhz

enumerator kSDIOSLV_SDR25_MODE: SDR25 mode => 50Mhz

enumerator kSDIOSLV_SDR50_MODE: SDR50 mode => 100Mhz

enumerator kSDIOSLV_SDR104_MODE: SDR104 mode => 208Mhz

enum _sdioslv_scratch_group

Scratch register group.

Values:

enumerator kSDIOSLV_ScratchGroup0: sdio scratch1 in FW18 0xnD4 n:1..7 16 bits

enumerator kSDIOSLV_ScratchGroup1: sdio scratch2 in FW18 0xnB0 n:1..7 16 bits

enumerator kSDIOSLV_ScratchGroup2: sdio scratch group 2 in SDU 0xnE8 n:1..7 32 bits

enumerator kSDIOSLV_ScratchGroup3: sdio scratch group 3 in SDU 0xnEC n:1..7 32 bits

enumerator kSDIOSLV_ScratchGroup4: sdio scratch group 4 in SDU 0xnF0 n:1..7 32 bits

enumerator kSDIOSLV_ScratchGroup5: sdio scratch group 5 in SDU 0xnF4 n:1..7 32 bits

enumerator kSDIOSLV_ScratchGroup6: sdio scratch group 6 in SDU 0xnF8 n:1..7 32 bits

enumerator kSDIOSLV_ScratchGroup7: sdio scratch group 7 in SDU 0xnFC n:1..7 32 bits

enum _sdioslv_scratch_offset

Scratch register offset in a group.

Values:

enumerator kSDIOSLV_ScratchOffset0: sdio scratchoffset0

enumerator kSDIOSLV_ScratchOffset1: sdio scratchoffset1

enumerator kSDIOSLV_ScratchOffset3: sdio scratchoffset2

enumerator kSDIOSLV_ScratchOffset4: sdio scratchoffset3

typedef enum _sdioslv_int_cpu_num sdioslv_int_cpu_num_t: SDIO card function number.

typedef enum _sdioslv_func_num sdioslv_func_t: SDIO card function number.

typedef enum _sdioslv_port_num sdioslv_port_t: SDIO port number (per function)

typedef enum _sdioslv_bus_speed sdioslv_bus_speed_t: SDIO Bus Speed.

typedef enum _sdioslv_scratch_group sdioslv_scratch_group_t: Scratch register group.

typedef enum _sdioslv_scratch_offset sdioslv_scratch_offset_t: Scratch register offset in a group.

typedef struct _sdioslv_sdu_regmap sdioslv_sdu_regmap_t: SDU register map version 4.

typedef void (*sdioslv_cis_table_callback_t)(const uint32_t SDU_BASE): SDIO CIS table callback.

typedef struct sdio_slave_config sdio_slave_config_t: Data structure to configure SDIO handle for specific function.

FSL_SDIOSLV_SDU_DRIVER_VERSION: Driver version 1.0.0.

void SDIOSLV_Init0(void)

SDIOSLV Init0.

Call this API to Init SDIOSLV phase0.

Parameters:

void – None.

Return values:

void – None.

status_t SDIOSLV_Init1(SDU_FN_CARD_Type *base, sdio_slave_config_t *config)

SDIOSLV Init1.

Call this API to Init SDIOSLV phase1.

Parameters:

base – FN FSR pointer.
config – Configure for SDIO Slave.

Return values:

kStatus_Success – command is ready to be sent to host driver.
kStatus_InvalidArgument – Invalid argument.

status_t SDIOSLV_SendCmdNonBlocking(sdioslv_sdu_regmap_t *regmap, uint8_t *data_addr, uint16_t data_len)

SDIOSLV send command.

Call this API to send command to host driver. The callback is always invoked from theinterrupt context.

Parameters:

regmap – FN FSR pointer.
data_addr – Data Address.
data_len – Data Length.

Return values:

kStatus_Success – command is ready to be sent to host driver.
kStatus_InvalidArgument – Invalid argument.

status_t SDIOSLV_RefillCmdBuffer(sdioslv_sdu_regmap_t *regmap, uint8_t *data_addr)

SDIOSLV provide command buffer.

Call this API to provide receive command buffer to SDU driver.

Parameters:

regmap – FN FSR pointer.
data_addr – Data Address.
data_len – Data Length.

Return values:

kStatus_Success – buffer refill sucessfully.
kStatus_Fail – fail to refill buffer.

status_t SDIOSLV_SendDataNonBlocking(sdioslv_sdu_regmap_t *regmap, sdioslv_port_t tx_port, uint8_t *data_addr, uint16_t data_len)

SDIOSLV send data transfer.

Call this API to send data to host driver. The callback is always invoked from theinterrupt context.

Parameters:

regmap – FN FSR pointer.
port – Data Port.
data_addr – Data Address.
data_len – Data Length.

Return values:

kStatus_Success – buffer is added to data slot with problem.
kStatus_InvalidArgument – Invalid argument.
kStatus_SDIOSLV_SendFull – all data slots are occupied, application

status_t SDIOSLV_RefillDataBuffer(sdioslv_sdu_regmap_t *regmap, sdioslv_port_t port, uint8_t *data_addr)

SDIOSLV provide receive data buffer.

Call this API to provide receive data buffer to SDU driver.

Parameters:

regmap – FN FSR pointer.
port – Data Port.
data_addr – Data Address.
data_len – Data Length.

Return values:

kStatus_Success – refill buffer sucessfully.
kStatus_Fail – fail to refill buffer.

sdioslv_bus_speed_t SDIOSLV_GetBusSpeed(void)

Get SDIO bus speed selection.

Call this API to get current bus speed selected for SDIO.

Parameters:

void – None.

Return values:

sdioslv_bus_speed_t – Bus speed selected for SDIO.

uint32_t SDIOSLV_GetBlockSize(uint8_t fn_num)

Get SDIO the block size in FBR.

For block mode, block size equals to block size in FBR.

Parameters:

handle – Created by SDIOSLV_CreateHanle().

Return values:

the – block size in FBR.

status_t SDIOSLV_ReadScratchRegister(sdioslv_func_t fun_num, sdioslv_scratch_group_t group, sdioslv_scratch_offset_t offset, uint8_t *value)

SDIOSLV read scratch register of SDU.

Call this API to read scratch register of SDU (based on group and offset).

Parameters:

fun_num – Specify which function.
group – Specify which group scratch register.
offset – Specify offset of the scratch group.
value – Value read from the register.

Return values:

kStatus_Success – read sucessfully.
kStatus_Fail – fail to read.

status_t SDIOSLV_WriteScratchRegister(sdioslv_func_t fun_num, sdioslv_scratch_group_t group, sdioslv_scratch_offset_t offset, uint8_t value)

SDIOSLV write value to scratch register of SDU.

Call this API to write value to scratch register of SDU (based on group and offset).

Parameters:

fun_num – Specify which function.
group – Specify which group scratch register.
offset – Specify offset of the scratch group.
value – Value write to the register.

Return values:

kStatus_Success – write sucessfully.
kStatus_Fail – fail to write.

uint32_t HostToCardEvent: 0x100/200…/700

uint32_t HostIntCause: 0x104/204…/704

uint32_t HostIntMask: 0x108/208…/708

uint32_t HostIntStatus: 0x10C/20C…/70C

uint32_t RdBitMap: 0x110/210…/710

uint32_t WrBitMap: 0x114/214…/714

uint16_t RdLen[32]: 0x118/218…/718

uint8_t HostTransferStatus: 0x158/258…/758

uint8_t FunctionCardIntMsk: 0x159/259…/759

uint8_t Card_Q_PTR_RANGE0: 0x15A/25A…/75A

uint8_t Card_Q_PTR_RANGE1: 0x15B/25B…/75B

uint16_t CardToHostEvent: 0x15C/25C…/75C

uint8_t reserved2[2]

uint32_t CardIntMask: 0x160/260…/760

uint32_t CardIntStatus: 0x164/264…/764

uint32_t CardIntMode: 0x168/268…/768

uint32_t SqReadBase: 0x16C/26C…/76C

uint32_t SqWriteBase: 0x170/270…/770

uint8_t RdIdx: 0x174/274…/774

uint8_t WrIdx: 0x175/275…/775

uint8_t Reserved6[2]: 0x176/276…/776

uint8_t Card_APU_SLP_RDY_EN: 0x178/278…/778

uint8_t Reserved7[3]

uint8_t Card_HOST_ERR_WKUP_EN: 0x17C/27C…/77C

uint8_t Reserved8[3]

uint8_t HOST_ERR_CMD0: 0x180/280…/780

uint8_t HOST_ERR_CMD1: 0x181/281…/781

uint8_t HOST_ERR_CMD2: 0x182/282…/782

uint8_t HOST_ERR_CMD3: 0x183/283…/783

uint8_t HOST_ERR_CMD4: 0x184/284…/784

uint8_t HOST_ERR_CMD5: 0x185/285…/785

uint8_t Reserved9[2]

uint32_t PktWrBitmapClr: 0x188/288…/788

uint32_t PktRdBitmapClr: 0x18C/28C…/78C

uint32_t HostIntActMskEn: 0x190/290…/790

uint32_t HostIntActMskClr: 0x194/294…/794

uint32_t HostIntActMskStat: 0x198/298…/798

uint32_t CardIntActMskEn: 0x19C/29C…/79C

uint32_t CardIntActMskClr: 0x1A0/2A0…/7A0

uint32_t CardIntActMskStat: 0x1A4/2A4…/7A4

uint32_t TestbusBitSelect: 0x1A8/2A8…/7A8

uint32_t TestbusBitSelect1: 0x1AC/2AC…/7AC

uint16_t Scratch2: 0x1B0/2B0…/7B0

uint8_t Scratch[6]: 0x1B2/2B2…/7B2

uint32_t CmdPortSqWriteBase: 0x1B8/2B8…/7B8

uint32_t CmdPortSqReadBase: 0x1BC/2BC…/7BC

uint16_t CmdPortRdLen: 0x1C0/2C0…/7C0

uint16_t Reserved10: 0x1C2/2C2…/7C2

uint32_t CmdPortConfig: 0x1C4/2C4…/7C4

uint8_t ChipRev: 0x1C8/2C8…/7C8

uint8_t reserved11

uint8_t SDUMinorIPRev: 0x1CA/2CA…/7CA

uint8_t SDUMajorIPRev: 0x1CB/2CB…/7CB

uint32_t Card_PKT_END_RADDR: 0x1CC/2CC…/7CC

uint32_t Card_PKT_END_WADDR: 0x1D0/2D0…/7D0

uint16_t Scratch1: 0x1D4/2D4…/7D4

uint8_t Ocr2: 0x1D6/2D6…/7D6

uint8_t Config: 0x1D7/2D7…/7D7

uint32_t Config2: 0x1D8/2D8…/7D8

uint32_t Debug: 0x1DC/2DC…/7DC

uint32_t DmaAddr: 0x1E0/2E0…/7E0

uint8_t IoPort[3]: 0x1E4/2E4…/7E4

uint8_t fun_num: SDIO function number (1..7).

sdioslv_int_cpu_num_t cpu_num: Specify interrupt should be generated to which CPU

uint8_t used_port_num: How many data ports are used inside this function

uint8_t cmd_tx_format: Command Tx length format. 0: no tx_len, 1: 2 bytes, 2: 3 bytes

uint8_t cmd_rd_format: Command Rx length format. 0: blk_num * blk_size, 1: CMD_PORT_RD_LEN

uint8_t data_tx_format: Data Tx length format. 0: no tx_len, 1: 2 bytes, 2: 3 bytes

uint8_t data_rd_format: Data Rx length format. 0: blk_num * blk_size, 1: PORT_RD_LEN[15:0], 2: PORT1_RD_LEN[7:0] && PORT0_RD_LEN[15:0]

sdioslv_cis_table_callback_t cis_table_callback: Callback function for initializing the CIS table.

SDU_INT_CPU_NUM

SDU_USED_FUN_NUM

SDU_USED_PORT_NUM

SDU_MAX_FUNCTION_NUM: Maximum functions supported by SDU.

SDU_MAX_PORT_NUM: Maximum data ports supported by SDU per function.

sdu_fbr_fnN_base(FN)

sdu_fbr_fnN_fn_code(FN)

sdu_fbr_fnN_fn_code_code_HI

sdu_fbr_fnN_fn_code_code_LO

SDU_REGS8(x): MACRO used to access register of SDU.

SDU_READ_REGS8(reg, val): MACRO used to read SDU register.

SDU_WRITE_REGS8(reg, val): MACRO used to write SDU register.

SDU_REGS8_SETBITS(reg, val): MACRO used to set bits of SDU register.

SDU_REGS8_CLRBITS(reg, val): MACRO used to clear bits of SDU register.

SDU_SCRATCH2_OFFSET0_ADDR: Address of scratch register (group 2, offset 0) within function.

SDU_SDIO_CFG_BASE: SDU SDIO configuration base (SDU_FN0_CARD_BASE defined in device)

SDIO_CCR_FUNC_OFFSET: Address offset of CCR between two functions.

SDIO_IO_ENABLE: SDIO I/O Enable.

SDIO_FUNC0_BSS: SDIO Bus Speed Select.

SDIO_FUNC0_BSS_SUPPORT_MASK

SDIO_FUNC0_BSS_MODE_BIT

SDIO_FUNC0_BSS_MODE_MASK

SDIO_CCR_FUNC0_CARD_INT_MSK: Interrupt mask register for function 0.

SDIO_CCR_HOST_DnLdReStart: Bit Def. Host Transfer Status (HostTransferStatus)

SDIO_CCR_HOST_UpLdReStart

SDIO_CCR_HOST_DnLdCRC_err

SDIO_CCR_CS_DnLdRdy: Bit Def. Card To Host Interrupt Event (CardToHostEvent)

SDIO_CCR_CS_UpLdRdy

SDIO_CCR_CS_ReadCISRdy

SDIO_CCR_CS_CmdUpLdRdy

SDIO_CCR_CS_CmdDnLdRdy

SDIO_CCR_CIM_DnLdOvr: Bit Def. Card Interrupt Mask (CardIntMask)

SDIO_CCR_CIM_UpLdOvr

SDIO_CCR_CIM_Abort

SDIO_CCR_CIM_PwrDn

SDIO_CCR_CIM_PwrUp

SDIO_CCR_CIM_CmdUpLdOvr

SDIO_CCR_CIM_CmdDnLdOvr

SDIO_CCR_CIM_MASK

SDIO_CCR_CIC_DnLdOvr: Bit Def. Card Interrupt Status (CardIntStatus)

SDIO_CCR_CIC_UpLdOvr

SDIO_CCR_CIC_Abort

SDIO_CCR_CIC_PwrDn

SDIO_CCR_CIC_PwrUp

SDIO_CCR_CIC_CmdUpLdOvr

SDIO_CCR_CIC_CmdDnLdOvr

SDIO_CCR_CIC_ALL

SDIO_CCR_CIC_MASK

CARD_INT_MODE_MSK: Bit Def. Default setting ISR bit clear after read (CardIntMode)

CMD_TX_LEN_BIT_OFFSET: Bit Def. Command port configuration register (CmdPortConfig)

CMD_RD_LEN_BIT_OFFSET

CONFIG2_ASYNC_INT: Bit Def. Config2 register (Config2)

CONFIG2_CMD53_NEW_MODE

CONFIG2_DNLD_RDY_AUTO_RESET

CONFIG2_UPLD_RDY_AUTO_RESET

CONFIG2_TX_LEN_BIT_OFFSET

CONFIG2_RD_LEN_BIT_OFFSET

CONFIG2_DEFAULT_SETTING

struct _sdioslv_sdu_regmap: #include <fsl_sdioslv_sdu.h>

SDU register map version 4.

struct sdio_slave_config: #include <fsl_sdioslv_sdu.h>

Data structure to configure SDIO handle for specific function.

Smartcard

FSL_SMARTCARD_DRIVER_VERSION: Smart card driver version 2.3.0.

Smart card Error codes.

Values:

enumerator kStatus_SMARTCARD_Success: Transfer ends successfully

enumerator kStatus_SMARTCARD_TxBusy: Transmit in progress

enumerator kStatus_SMARTCARD_RxBusy: Receiving in progress

enumerator kStatus_SMARTCARD_NoTransferInProgress: No transfer in progress

enumerator kStatus_SMARTCARD_Timeout: Transfer ends with time-out

enumerator kStatus_SMARTCARD_Initialized: Smart card driver is already initialized

enumerator kStatus_SMARTCARD_PhyInitialized: Smart card PHY drive is already initialized

enumerator kStatus_SMARTCARD_CardNotActivated: Smart card is not activated

enumerator kStatus_SMARTCARD_InvalidInput: Function called with invalid input arguments

enumerator kStatus_SMARTCARD_OtherError: Some other error occur

enum _smartcard_control

Control codes for the Smart card protocol timers and misc.

Values:

enumerator kSMARTCARD_EnableADT

enumerator kSMARTCARD_DisableADT

enumerator kSMARTCARD_EnableGTV

enumerator kSMARTCARD_DisableGTV

enumerator kSMARTCARD_ResetWWT

enumerator kSMARTCARD_EnableWWT

enumerator kSMARTCARD_DisableWWT

enumerator kSMARTCARD_ResetCWT

enumerator kSMARTCARD_EnableCWT

enumerator kSMARTCARD_DisableCWT

enumerator kSMARTCARD_ResetBWT

enumerator kSMARTCARD_EnableBWT

enumerator kSMARTCARD_DisableBWT

enumerator kSMARTCARD_EnableInitDetect

enumerator kSMARTCARD_EnableAnack

enumerator kSMARTCARD_DisableAnack

enumerator kSMARTCARD_ConfigureBaudrate

enumerator kSMARTCARD_SetupATRMode

enumerator kSMARTCARD_SetupT0Mode

enumerator kSMARTCARD_SetupT1Mode

enumerator kSMARTCARD_EnableReceiverMode

enumerator kSMARTCARD_DisableReceiverMode

enumerator kSMARTCARD_EnableTransmitterMode

enumerator kSMARTCARD_DisableTransmitterMode

enumerator kSMARTCARD_ResetWaitTimeMultiplier

enum _smartcard_card_voltage_class

Defines Smart card interface voltage class values.

Values:

enumerator kSMARTCARD_VoltageClassUnknown

enumerator kSMARTCARD_VoltageClassA5_0V

enumerator kSMARTCARD_VoltageClassB3_3V

enumerator kSMARTCARD_VoltageClassC1_8V

enum _smartcard_transfer_state

Defines Smart card I/O transfer states.

Values:

enumerator kSMARTCARD_IdleState

enumerator kSMARTCARD_WaitingForTSState

enumerator kSMARTCARD_InvalidTSDetecetedState

enumerator kSMARTCARD_ReceivingState

enumerator kSMARTCARD_TransmittingState

enum _smartcard_reset_type

Defines Smart card reset types.

Values:

enumerator kSMARTCARD_ColdReset

enumerator kSMARTCARD_WarmReset

enumerator kSMARTCARD_NoColdReset

enumerator kSMARTCARD_NoWarmReset

enum _smartcard_transport_type

Defines Smart card transport protocol types.

Values:

enumerator kSMARTCARD_T0Transport

enumerator kSMARTCARD_T1Transport

enum _smartcard_parity_type

Defines Smart card data parity types.

Values:

enumerator kSMARTCARD_EvenParity

enumerator kSMARTCARD_OddParity

enum _smartcard_card_convention

Defines data Convention format.

Values:

enumerator kSMARTCARD_DirectConvention

enumerator kSMARTCARD_InverseConvention

enum _smartcard_interface_control

Defines Smart card interface IC control types.

Values:

enumerator kSMARTCARD_InterfaceSetVcc

enumerator kSMARTCARD_InterfaceSetClockToResetDelay

enumerator kSMARTCARD_InterfaceReadStatus

enum _smartcard_direction

Defines transfer direction.

Values:

enumerator kSMARTCARD_Receive

enumerator kSMARTCARD_Transmit

typedef enum _smartcard_control smartcard_control_t: Control codes for the Smart card protocol timers and misc.

typedef enum _smartcard_card_voltage_class smartcard_card_voltage_class_t: Defines Smart card interface voltage class values.

typedef enum _smartcard_transfer_state smartcard_transfer_state_t: Defines Smart card I/O transfer states.

typedef enum _smartcard_reset_type smartcard_reset_type_t: Defines Smart card reset types.

typedef enum _smartcard_transport_type smartcard_transport_type_t: Defines Smart card transport protocol types.

typedef enum _smartcard_parity_type smartcard_parity_type_t: Defines Smart card data parity types.

typedef enum _smartcard_card_convention smartcard_card_convention_t: Defines data Convention format.

typedef enum _smartcard_interface_control smartcard_interface_control_t: Defines Smart card interface IC control types.

typedef enum _smartcard_direction smartcard_direction_t: Defines transfer direction.

typedef void (*smartcard_interface_callback_t)(void *smartcardContext, void *param): Smart card interface interrupt callback function type.

typedef void (*smartcard_transfer_callback_t)(void *smartcardContext, void *param): Smart card transfer interrupt callback function type.

typedef void (*smartcard_time_delay_t)(uint32_t us): Time Delay function used to passive waiting using RTOS [us].

typedef struct _smartcard_card_params smartcard_card_params_t: Defines card-specific parameters for Smart card driver.

typedef struct _smartcard_timers_state smartcard_timers_state_t: Smart card defines the state of the EMV timers in the Smart card driver.

typedef struct _smartcard_interface_config smartcard_interface_config_t: Defines user specified configuration of Smart card interface.

typedef struct _smartcard_xfer smartcard_xfer_t: Defines user transfer structure used to initialize transfer.

typedef struct _smartcard_context smartcard_context_t: Runtime state of the Smart card driver.

SMARTCARD_INIT_DELAY_CLOCK_CYCLES: Smart card global define which specify number of clock cycles until initial ‘TS’ character has to be received.

SMARTCARD_EMV_ATR_DURATION_ETU: Smart card global define which specify number of clock cycles during which ATR string has to be received.

SMARTCARD_TS_DIRECT_CONVENTION: Smart card specification initial TS character definition of direct convention.

SMARTCARD_TS_INVERSE_CONVENTION: Smart card specification initial TS character definition of inverse convention.

struct _smartcard_card_params

#include <fsl_smartcard.h>

Defines card-specific parameters for Smart card driver.

Public Members

uint16_t Fi: 4 bits Fi - clock rate conversion integer

uint8_t fMax: Maximum Smart card frequency in MHz

uint8_t WI: 8 bits WI - work wait time integer

uint8_t Di: 4 bits DI - baud rate divisor

uint8_t BWI: 4 bits BWI - block wait time integer

uint8_t CWI: 4 bits CWI - character wait time integer

uint8_t BGI: 4 bits BGI - block guard time integer

uint8_t GTN: 8 bits GTN - extended guard time integer

uint8_t IFSC: Indicates IFSC value of the card

uint8_t modeNegotiable: Indicates if the card acts in negotiable or a specific mode.

uint8_t currentD: 4 bits DI - current baud rate divisor

uint8_t status: Indicates smart card status

bool t0Indicated: Indicates ff T=0 indicated in TD1 byte

bool t1Indicated: Indicates if T=1 indicated in TD2 byte

bool atrComplete: Indicates whether the ATR received from the card was complete or not

bool atrValid: Indicates whether the ATR received from the card was valid or not

bool present: Indicates if a smart card is present

bool active: Indicates if the smart card is activated

bool faulty: Indicates whether smart card/interface is faulty

smartcard_card_convention_t convention: Card convention, kSMARTCARD_DirectConvention for direct convention, kSMARTCARD_InverseConvention for inverse convention

struct _smartcard_timers_state

#include <fsl_smartcard.h>

Smart card defines the state of the EMV timers in the Smart card driver.

Public Members

volatile bool adtExpired: Indicates whether ADT timer expired

volatile bool wwtExpired: Indicates whether WWT timer expired

volatile bool cwtExpired: Indicates whether CWT timer expired

volatile bool bwtExpired: Indicates whether BWT timer expired

volatile bool initCharTimerExpired: Indicates whether reception timer for initialization character (TS) after the RST has expired

struct _smartcard_interface_config

#include <fsl_smartcard.h>

Defines user specified configuration of Smart card interface.

Public Members

uint32_t smartCardClock: Smart card interface clock [Hz]

uint32_t clockToResetDelay: Indicates clock to RST apply delay [smart card clock cycles]

uint8_t clockModule: Smart card clock module number

uint8_t clockModuleChannel: Smart card clock module channel number

uint8_t clockModuleSourceClock: Smart card clock module source clock [e.g., BusClk]

smartcard_card_voltage_class_t vcc: Smart card voltage class

uint8_t controlPort: Smart card PHY control port instance

uint8_t controlPin: Smart card PHY control pin instance

uint8_t irqPort: Smart card PHY Interrupt port instance

uint8_t irqPin: Smart card PHY Interrupt pin instance

uint8_t resetPort: Smart card reset port instance

uint8_t resetPin: Smart card reset pin instance

uint8_t vsel0Port: Smart card PHY Vsel0 control port instance

uint8_t vsel0Pin: Smart card PHY Vsel0 control pin instance

uint8_t vsel1Port: Smart card PHY Vsel1 control port instance

uint8_t vsel1Pin: Smart card PHY Vsel1 control pin instance

uint8_t dataPort: Smart card PHY data port instance

uint8_t dataPin: Smart card PHY data pin instance

uint8_t dataPinMux: Smart card PHY data pin mux option

uint8_t tsTimerId: Numerical identifier of the External HW timer for Initial character detection

struct _smartcard_xfer

#include <fsl_smartcard.h>

Defines user transfer structure used to initialize transfer.

Public Members

smartcard_direction_t direction: Direction of communication. (RX/TX)

uint8_t *buff: The buffer of data.

size_t size: The number of transferred units.

struct _smartcard_context

#include <fsl_smartcard.h>

Runtime state of the Smart card driver.

Public Members

void *base: Smart card module base address

smartcard_direction_t direction: Direction of communication. (RX/TX)

uint8_t *xBuff: The buffer of data being transferred.

volatile size_t xSize: The number of bytes to be transferred.

volatile bool xIsBusy: True if there is an active transfer.

uint8_t txFifoEntryCount: Number of data word entries in transmit FIFO.

uint8_t rxFifoThreshold: The max value of the receiver FIFO threshold.

smartcard_interface_callback_t interfaceCallback: Callback to invoke after interface IC raised interrupt.

smartcard_transfer_callback_t transferCallback: Callback to invoke after transfer event occur.

void *interfaceCallbackParam: Interface callback parameter pointer.

void *transferCallbackParam: Transfer callback parameter pointer.

smartcard_time_delay_t timeDelay: Function which handles time delay defined by user or RTOS.

smartcard_reset_type_t resetType: Indicates whether a Cold reset or Warm reset was requested.

smartcard_transport_type_t tType: Indicates current transfer protocol (T0 or T1)

volatile smartcard_transfer_state_t transferState: Indicates the current transfer state

smartcard_timers_state_t timersState: Indicates the state of different protocol timers used in driver

smartcard_card_params_t cardParams: Smart card parameters(ATR and current) and interface slots states(ATR and current)

uint8_t IFSD: Indicates the terminal IFSD

smartcard_parity_type_t parity: Indicates current parity even/odd

volatile bool rxtCrossed: Indicates whether RXT thresholds has been crossed

volatile bool txtCrossed: Indicates whether TXT thresholds has been crossed

volatile bool wtxRequested: Indicates whether WTX has been requested or not

volatile bool parityError: Indicates whether a parity error has been detected

uint8_t statusBytes[2]: Used to store Status bytes SW1, SW2 of the last executed card command response

smartcard_interface_config_t interfaceConfig: Smart card interface configuration structure

bool abortTransfer: Used to abort transfer.

Smart Card PHY Driver

void SMARTCARD_PHY_GetDefaultConfig(smartcard_interface_config_t *config)

Fills in the configuration structure with default values.

Parameters:

config – The Smart card user configuration structure which contains configuration structure of type smartcard_interface_config_t. Function fill in members: clockToResetDelay = 42000, vcc = kSmartcardVoltageClassB3_3V, with default values.

status_t SMARTCARD_PHY_Init(void *base, smartcard_interface_config_t const *config, uint32_t srcClock_Hz)

Initializes a Smart card interface instance.

Parameters:

base – The Smart card peripheral base address.
config – The user configuration structure of type smartcard_interface_config_t. Call the function SMARTCARD_PHY_GetDefaultConfig() to fill the configuration structure.
srcClock_Hz – Smart card clock generation module source clock.

Return values:

kStatus_SMARTCARD_Success – or kStatus_SMARTCARD_OtherError in case of error.

void SMARTCARD_PHY_Deinit(void *base, smartcard_interface_config_t const *config)

De-initializes a Smart card interface, stops the Smart card clock, and disables the VCC.

Parameters:

base – The Smart card peripheral module base address.
config – The user configuration structure of type smartcard_interface_config_t.

status_t SMARTCARD_PHY_Activate(void *base, smartcard_context_t *context, smartcard_reset_type_t resetType)

Activates the Smart card IC.

Parameters:

base – The Smart card peripheral module base address.
context – A pointer to a Smart card driver context structure.
resetType – type of reset to be performed, possible values = kSmartcardColdReset, kSmartcardWarmReset

Return values:

kStatus_SMARTCARD_Success – or kStatus_SMARTCARD_OtherError in case of error.

status_t SMARTCARD_PHY_Deactivate(void *base, smartcard_context_t *context)

De-activates the Smart card IC.

Parameters:

base – The Smart card peripheral module base address.
context – A pointer to a Smart card driver context structure.

Return values:

kStatus_SMARTCARD_Success – or kStatus_SMARTCARD_OtherError in case of error.

status_t SMARTCARD_PHY_Control(void *base, smartcard_context_t *context, smartcard_interface_control_t control, uint32_t param)

Controls the Smart card interface IC.

Parameters:

base – The Smart card peripheral module base address.
context – A pointer to a Smart card driver context structure.
control – A interface command type.
param – Integer value specific to control type

Return values:

kStatus_SMARTCARD_Success – or kStatus_SMARTCARD_OtherError in case of error.

SMARTCARD_ATR_DURATION_ADJUSTMENT: Smart card definition which specifies the adjustment number of clock cycles during which an ATR string has to be received.

SMARTCARD_INIT_DELAY_CLOCK_CYCLES_ADJUSTMENT: Smart card definition which specifies the adjustment number of clock cycles until an initial ‘TS’ character has to be received.

Smart Card PHY USIM W

Smart Card USIM Driver

void SMARTCARD_USIM_GetDefaultConfig(smartcard_card_params_t *cardParams)

Fills in the smartcard_card_params structure with default values according to the EMV 4.3 specification.

Parameters:

cardParams – The configuration structure of type smartcard_interface_config_t. Function fill in members: Fi = 372; Di = 1; currentD = 1; WI = 0x0A; GTN = 0x00; with default values.

status_t SMARTCARD_USIM_Init(USIM_Type *base, smartcard_context_t *context, uint32_t srcClock_Hz)

Initializes an USIM peripheral for the Smart card/ISO-7816 operation.

This function un-gates the USIM clock, initializes the module to EMV default settings, configures the IRQ, enables the module-level interrupt to the core and, initializes the driver context.

Parameters:

base – The USIM peripheral base address.
context – A pointer to the smart card driver context structure.
srcClock_Hz – Smart card clock generation module source clock.

Returns:

An error code or kStatus_SMARTCARD_Success.

void SMARTCARD_USIM_Deinit(USIM_Type *base)

This function disables the USIM interrupts, disables the transmitter and receiver, flushes the FIFOs, and gates USIM clock in SIM.

Parameters:

base – The USIM module base address.

int32_t SMARTCARD_USIM_GetTransferRemainingBytes(USIM_Type *base, smartcard_context_t *context)

Returns whether the previous USIM transfer has finished.

When performing an async transfer, call this function to ascertain the context of the current transfer: in progress (or busy) or complete (success). If the transfer is still in progress, the user can obtain the number of words that have not been transferred.

Parameters:

base – The USIM module base address.
context – A pointer to a smart card driver context structure.

Returns:

The number of bytes not transferred.

status_t SMARTCARD_USIM_AbortTransfer(USIM_Type *base, smartcard_context_t *context)

Terminates an asynchronous USIM transfer early.

During an async USIM transfer, the user can terminate the transfer early if the transfer is still in progress.

Parameters:

base – The USIM peripheral address.
context – A pointer to a smart card driver context structure.

Returns:

kStatus_SMARTCARD_Success The transmit abort was successful.

Returns:

kStatus_SMARTCARD_NoTransmitInProgress No transmission is currently in progress.

status_t SMARTCARD_USIM_TransferNonBlocking(USIM_Type *base, smartcard_context_t *context, smartcard_xfer_t *xfer)

Transfer data using interrupts.

A non-blocking (also known as asynchronous) function means that the function returns immediately after initiating the transfer function. The application has to get the transfer status to see when the transfer is complete. In other words, after calling the non-blocking (asynchronous) transfer function, the application must get the transfer status to check if the transmit is completed or not.

Parameters:

base – The USIM peripheral base address.
context – A pointer to a smart card driver context structure.
xfer – A pointer to the smart card transfer structure where the linked buffers and sizes are stored.

Returns:

An error code or kStatus_SMARTCARD_Success.

status_t SMARTCARD_USIM_Control(USIM_Type *base, smartcard_context_t *context, smartcard_control_t control, uint32_t param)

Controls the USIM module per different user request.

Parameters:

base – The USIM peripheral base address.
context – A pointer to a smart card driver context structure.
control – Control type.
param – Integer value of specific to control command.

Returns:

kStatus_SMARTCARD_Success in success.

Returns:

kStatus_SMARTCARD_OtherError in case of error.

void SMARTCARD_USIM_IRQHandler(USIM_Type *base, smartcard_context_t *context)

Handles USIM module interrupts.

Parameters:

base – The USIM peripheral base address.
context – A pointer to a smart card driver context structure.

void SMARTCARD_USIM_TSExpiryCallback(USIM_Type *base, smartcard_context_t *context)

Handles initial TS character timer time-out event.

Parameters:

base – The USIM peripheral base address.
context – A pointer to a Smart card driver context structure.

void SMARTCARD_USIM_TimerStart(uint32_t time)

Initializes timer with input period, enable interrupt and start counter.

Parameters:

time – The time period.

enum _usim_rx_fifo_trigger_level

USIM Rx FIFO receiver trigger level enumeration.

Values:

enumerator kUSIM_1ByteOrMore: 1 byte or more in the RX-FIFO can trigger receiver data ready interrupt.

enumerator kUSIM_4ByteOrMore: 4 byte or more in the RX-FIFO can trigger receiver data ready interrupt.

enumerator kUSIM_8ByteOrMore: 8 byte or more in the RX-FIFO can trigger receiver data ready interrupt.

enumerator kUSIM_12ByteOrMore: 12 byte or more in the RX-FIFO can trigger receiver data ready interrupt.

typedef enum _usim_rx_fifo_trigger_level usim_rx_fifo_trigger_level_t: USIM Rx FIFO receiver trigger level enumeration.

SMARTCARD_Control(base, handle, control, param)

SMARTCARD_TransferNonBlocking(base, handle, xfer)

SMARTCARD_Init(base, handle, sourceClockHz)

SMARTCARD_Deinit(base)

SMARTCARD_GetTransferRemainingBytes(base, handle)

SMARTCARD_AbortTransfer(base, handle)

SMARTCARD_EMV_RX_NACK_THRESHOLD: EMV RX NACK interrupt generation threshold.

SMARTCARD_EMV_TX_NACK_THRESHOLD: EMV TX NACK interrupt generation threshold.

SMARTCARD_T0_CWT_ADJUSTMENT: Smart card T0 Character Wait Timer adjustment value.

SMARTCARD_T1_CWT_ADJUSTMENT: Smart card T1 Character Wait Timer adjustment value.

SMARTCARD_T0_BWT_ADJUSTMENT: Smart card T0 Block Wait Timer adjustment value.

SMARTCARD_T1_BWT_ADJUSTMENT: Smart card T1 Block Wait Timer adjustment value.

SMARTCARD_MAX_RX_TRIGGER_LEVEL: Rx FIFO max receive trigger level.

USIM_FIND_RX_FIFO_TRIGGER_LEVEL(x): USIM Find max Rx FIFO receiver trigger level according to bytes numbers.

SPI: Serial Peripheral Interface Driver

SPI DMA Driver

status_t SPI_MasterTransferCreateHandleDMA(SPI_Type *base, spi_dma_handle_t *handle, spi_dma_callback_t callback, void *userData, dma_handle_t *txHandle, dma_handle_t *rxHandle)

Initialize the SPI master DMA handle.

This function initializes the SPI master DMA handle which can be used for other SPI master transactional APIs. Usually, for a specified SPI instance, user need only call this API once to get the initialized handle.

Parameters:

base – SPI peripheral base address.
handle – SPI handle pointer.
callback – User callback function called at the end of a transfer.
userData – User data for callback.
txHandle – DMA handle pointer for SPI Tx, the handle shall be static allocated by users.
rxHandle – DMA handle pointer for SPI Rx, the handle shall be static allocated by users.

status_t SPI_MasterTransferDMA(SPI_Type *base, spi_dma_handle_t *handle, spi_transfer_t *xfer)

Perform a non-blocking SPI transfer using DMA.

Note

This interface returned immediately after transfer initiates, users should call SPI_GetTransferStatus to poll the transfer status to check whether SPI transfer finished.

Parameters:

base – SPI peripheral base address.
handle – SPI DMA handle pointer.
xfer – Pointer to dma transfer structure.

Return values:

kStatus_Success – Successfully start a transfer.
kStatus_InvalidArgument – Input argument is invalid.
kStatus_SPI_Busy – SPI is not idle, is running another transfer.

status_t SPI_MasterHalfDuplexTransferDMA(SPI_Type *base, spi_dma_handle_t *handle, spi_half_duplex_transfer_t *xfer)

Transfers a block of data using a DMA method.

This function using polling way to do the first half transimission and using DMA way to do the srcond half transimission, the transfer mechanism is half-duplex. When do the second half transimission, code will return right away. When all data is transferred, the callback function is called.

Parameters:

base – SPI base pointer
handle – A pointer to the spi_master_dma_handle_t structure which stores the transfer state.
xfer – A pointer to the spi_half_duplex_transfer_t structure.

Returns:

status of status_t.

static inline status_t SPI_SlaveTransferCreateHandleDMA(SPI_Type *base, spi_dma_handle_t *handle, spi_dma_callback_t callback, void *userData, dma_handle_t *txHandle, dma_handle_t *rxHandle)

Initialize the SPI slave DMA handle.

This function initializes the SPI slave DMA handle which can be used for other SPI master transactional APIs. Usually, for a specified SPI instance, user need only call this API once to get the initialized handle.

Parameters:

base – SPI peripheral base address.
handle – SPI handle pointer.
callback – User callback function called at the end of a transfer.
userData – User data for callback.
txHandle – DMA handle pointer for SPI Tx, the handle shall be static allocated by users.
rxHandle – DMA handle pointer for SPI Rx, the handle shall be static allocated by users.

static inline status_t SPI_SlaveTransferDMA(SPI_Type *base, spi_dma_handle_t *handle, spi_transfer_t *xfer)

Perform a non-blocking SPI transfer using DMA.

Note

This interface returned immediately after transfer initiates, users should call SPI_GetTransferStatus to poll the transfer status to check whether SPI transfer finished.

Parameters:

base – SPI peripheral base address.
handle – SPI DMA handle pointer.
xfer – Pointer to dma transfer structure.

Return values:

kStatus_Success – Successfully start a transfer.
kStatus_InvalidArgument – Input argument is invalid.
kStatus_SPI_Busy – SPI is not idle, is running another transfer.

void SPI_MasterTransferAbortDMA(SPI_Type *base, spi_dma_handle_t *handle)

Abort a SPI transfer using DMA.

Parameters:

base – SPI peripheral base address.
handle – SPI DMA handle pointer.

status_t SPI_MasterTransferGetCountDMA(SPI_Type *base, spi_dma_handle_t *handle, size_t *count)

Gets the master DMA transfer remaining bytes.

This function gets the master DMA transfer remaining bytes.

Parameters:

base – SPI peripheral base address.
handle – A pointer to the spi_dma_handle_t structure which stores the transfer state.
count – A number of bytes transferred by the non-blocking transaction.

Returns:

status of status_t.

static inline void SPI_SlaveTransferAbortDMA(SPI_Type *base, spi_dma_handle_t *handle)

Abort a SPI transfer using DMA.

Parameters:

base – SPI peripheral base address.
handle – SPI DMA handle pointer.

static inline status_t SPI_SlaveTransferGetCountDMA(SPI_Type *base, spi_dma_handle_t *handle, size_t *count)

Gets the slave DMA transfer remaining bytes.

This function gets the slave DMA transfer remaining bytes.

Parameters:

base – SPI peripheral base address.
handle – A pointer to the spi_dma_handle_t structure which stores the transfer state.
count – A number of bytes transferred by the non-blocking transaction.

Returns:

status of status_t.

FSL_SPI_DMA_DRIVER_VERSION: SPI DMA driver version 2.1.1.

typedef struct _spi_dma_handle spi_dma_handle_t

typedef void (*spi_dma_callback_t)(SPI_Type *base, spi_dma_handle_t *handle, status_t status, void *userData): SPI DMA callback called at the end of transfer.

struct _spi_dma_handle

#include <fsl_spi_dma.h>

SPI DMA transfer handle, users should not touch the content of the handle.

Public Members

volatile bool txInProgress: Send transfer finished

volatile bool rxInProgress: Receive transfer finished

uint8_t bytesPerFrame: Bytes in a frame for SPI transfer

uint8_t lastwordBytes: The Bytes of lastword for master

dma_handle_t *txHandle: DMA handler for SPI send

dma_handle_t *rxHandle: DMA handler for SPI receive

spi_dma_callback_t callback: Callback for SPI DMA transfer

void *userData: User Data for SPI DMA callback

uint32_t state: Internal state of SPI DMA transfer

size_t transferSize: Bytes need to be transfer

uint32_t instance: Index of SPI instance

const uint8_t *txNextData: The pointer of next time tx data

const uint8_t *txEndData: The pointer of end of data

uint8_t *rxNextData: The pointer of next time rx data

uint8_t *rxEndData: The pointer of end of rx data

uint32_t dataBytesEveryTime: Bytes in a time for DMA transfer, default is DMA_MAX_TRANSFER_COUNT

SPI Driver

FSL_SPI_DRIVER_VERSION: SPI driver version.

enum _spi_xfer_option

SPI transfer option.

Values:

enumerator kSPI_FrameDelay: A delay may be inserted, defined in the DLY register.

enumerator kSPI_FrameAssert: SSEL will be deasserted at the end of a transfer

enum _spi_shift_direction

SPI data shifter direction options.

Values:

enumerator kSPI_MsbFirst: Data transfers start with most significant bit.

enumerator kSPI_LsbFirst: Data transfers start with least significant bit.

enum _spi_clock_polarity

SPI clock polarity configuration.

Values:

enumerator kSPI_ClockPolarityActiveHigh: Active-high SPI clock (idles low).

enumerator kSPI_ClockPolarityActiveLow: Active-low SPI clock (idles high).

enum _spi_clock_phase

SPI clock phase configuration.

Values:

enumerator kSPI_ClockPhaseFirstEdge: First edge on SCK occurs at the middle of the first cycle of a data transfer.

enumerator kSPI_ClockPhaseSecondEdge: First edge on SCK occurs at the start of the first cycle of a data transfer.

enum _spi_txfifo_watermark

txFIFO watermark values

Values:

enumerator kSPI_TxFifo0: SPI tx watermark is empty

enumerator kSPI_TxFifo1: SPI tx watermark at 1 item

enumerator kSPI_TxFifo2: SPI tx watermark at 2 items

enumerator kSPI_TxFifo3: SPI tx watermark at 3 items

enumerator kSPI_TxFifo4: SPI tx watermark at 4 items

enumerator kSPI_TxFifo5: SPI tx watermark at 5 items

enumerator kSPI_TxFifo6: SPI tx watermark at 6 items

enumerator kSPI_TxFifo7: SPI tx watermark at 7 items

enum _spi_rxfifo_watermark

rxFIFO watermark values

Values:

enumerator kSPI_RxFifo1: SPI rx watermark at 1 item

enumerator kSPI_RxFifo2: SPI rx watermark at 2 items

enumerator kSPI_RxFifo3: SPI rx watermark at 3 items

enumerator kSPI_RxFifo4: SPI rx watermark at 4 items

enumerator kSPI_RxFifo5: SPI rx watermark at 5 items

enumerator kSPI_RxFifo6: SPI rx watermark at 6 items

enumerator kSPI_RxFifo7: SPI rx watermark at 7 items

enumerator kSPI_RxFifo8: SPI rx watermark at 8 items

enum _spi_data_width

Transfer data width.

Values:

enumerator kSPI_Data4Bits: 4 bits data width

enumerator kSPI_Data5Bits: 5 bits data width

enumerator kSPI_Data6Bits: 6 bits data width

enumerator kSPI_Data7Bits: 7 bits data width

enumerator kSPI_Data8Bits: 8 bits data width

enumerator kSPI_Data9Bits: 9 bits data width

enumerator kSPI_Data10Bits: 10 bits data width

enumerator kSPI_Data11Bits: 11 bits data width

enumerator kSPI_Data12Bits: 12 bits data width

enumerator kSPI_Data13Bits: 13 bits data width

enumerator kSPI_Data14Bits: 14 bits data width

enumerator kSPI_Data15Bits: 15 bits data width

enumerator kSPI_Data16Bits: 16 bits data width

enum _spi_ssel

Slave select.

Values:

enumerator kSPI_Ssel0: Slave select 0

enumerator kSPI_Ssel1: Slave select 1

enumerator kSPI_Ssel2: Slave select 2

enumerator kSPI_Ssel3: Slave select 3

enum _spi_spol

ssel polarity

Values:

enumerator kSPI_Spol0ActiveHigh

enumerator kSPI_Spol1ActiveHigh

enumerator kSPI_Spol3ActiveHigh

enumerator kSPI_SpolActiveAllHigh

enumerator kSPI_SpolActiveAllLow

SPI transfer status.

Values:

enumerator kStatus_SPI_Busy: SPI bus is busy

enumerator kStatus_SPI_Idle: SPI is idle

enumerator kStatus_SPI_Error: SPI error

enumerator kStatus_SPI_BaudrateNotSupport: Baudrate is not support in current clock source

enumerator kStatus_SPI_Timeout: SPI timeout polling status flags.

enum _spi_interrupt_enable

SPI interrupt sources.

Values:

enumerator kSPI_RxLvlIrq: Rx level interrupt

enumerator kSPI_TxLvlIrq: Tx level interrupt

enum _spi_statusflags

SPI status flags.

Values:

enumerator kSPI_TxEmptyFlag: txFifo is empty

enumerator kSPI_TxNotFullFlag: txFifo is not full

enumerator kSPI_RxNotEmptyFlag: rxFIFO is not empty

enumerator kSPI_RxFullFlag: rxFIFO is full

typedef enum _spi_xfer_option spi_xfer_option_t: SPI transfer option.

typedef enum _spi_shift_direction spi_shift_direction_t: SPI data shifter direction options.

typedef enum _spi_clock_polarity spi_clock_polarity_t: SPI clock polarity configuration.

typedef enum _spi_clock_phase spi_clock_phase_t: SPI clock phase configuration.

typedef enum _spi_txfifo_watermark spi_txfifo_watermark_t: txFIFO watermark values

typedef enum _spi_rxfifo_watermark spi_rxfifo_watermark_t: rxFIFO watermark values

typedef enum _spi_data_width spi_data_width_t: Transfer data width.

typedef enum _spi_ssel spi_ssel_t: Slave select.

typedef enum _spi_spol spi_spol_t: ssel polarity

typedef struct _spi_delay_config spi_delay_config_t: SPI delay time configure structure. Note: The DLY register controls several programmable delays related to SPI signalling, it stands for how many SPI clock time will be inserted. The maxinun value of these delay time is 15.

typedef struct _spi_master_config spi_master_config_t: SPI master user configure structure.

typedef struct _spi_slave_config spi_slave_config_t: SPI slave user configure structure.

typedef struct _spi_transfer spi_transfer_t: SPI transfer structure.

typedef struct _spi_half_duplex_transfer spi_half_duplex_transfer_t: SPI half-duplex(master only) transfer structure.

typedef struct _spi_config spi_config_t: Internal configuration structure used in ‘spi’ and ‘spi_dma’ driver.

typedef struct _spi_master_handle spi_master_handle_t: Master handle type.

typedef spi_master_handle_t spi_slave_handle_t: Slave handle type.

typedef void (*spi_master_callback_t)(SPI_Type *base, spi_master_handle_t *handle, status_t status, void *userData): SPI master callback for finished transmit.

typedef void (*spi_slave_callback_t)(SPI_Type *base, spi_slave_handle_t *handle, status_t status, void *userData): SPI slave callback for finished transmit.

typedef void (*flexcomm_spi_master_irq_handler_t)(SPI_Type *base, spi_master_handle_t *handle): Typedef for master interrupt handler.

typedef void (*flexcomm_spi_slave_irq_handler_t)(SPI_Type *base, spi_slave_handle_t *handle): Typedef for slave interrupt handler.

volatile uint8_t s_dummyData[]

SPI default SSEL COUNT.

Global variable for dummy data value setting.

SPI_DUMMYDATA: SPI dummy transfer data, the data is sent while txBuff is NULL.

SPI_RETRY_TIMES: Retry times for waiting flag.

SPI_DATA(n)

SPI_CTRLMASK

SPI_ASSERTNUM_SSEL(n)

SPI_DEASSERTNUM_SSEL(n)

SPI_DEASSERT_ALL

SPI_FIFOWR_FLAGS_MASK

SPI_FIFOTRIG_TXLVL_GET(base)

SPI_FIFOTRIG_RXLVL_GET(base)

struct _spi_delay_config

#include <fsl_spi.h>

SPI delay time configure structure. Note: The DLY register controls several programmable delays related to SPI signalling, it stands for how many SPI clock time will be inserted. The maxinun value of these delay time is 15.

Public Members

uint8_t preDelay: Delay between SSEL assertion and the beginning of transfer.

uint8_t postDelay: Delay between the end of transfer and SSEL deassertion.

uint8_t frameDelay: Delay between frame to frame.

uint8_t transferDelay: Delay between transfer to transfer.

struct _spi_master_config

#include <fsl_spi.h>

SPI master user configure structure.

Public Members

bool enableLoopback: Enable loopback for test purpose

bool enableMaster: Enable SPI at initialization time

spi_clock_polarity_t polarity: Clock polarity

spi_clock_phase_t phase: Clock phase

spi_shift_direction_t direction: MSB or LSB

uint32_t baudRate_Bps: Baud Rate for SPI in Hz

spi_data_width_t dataWidth: Width of the data

spi_ssel_t sselNum: Slave select number

spi_spol_t sselPol: Configure active CS polarity

uint8_t txWatermark: txFIFO watermark

uint8_t rxWatermark: rxFIFO watermark

spi_delay_config_t delayConfig: Delay configuration.

struct _spi_slave_config

#include <fsl_spi.h>

SPI slave user configure structure.

Public Members

bool enableSlave: Enable SPI at initialization time

spi_clock_polarity_t polarity: Clock polarity

spi_clock_phase_t phase: Clock phase

spi_shift_direction_t direction: MSB or LSB

spi_data_width_t dataWidth: Width of the data

spi_spol_t sselPol: Configure active CS polarity

uint8_t txWatermark: txFIFO watermark

uint8_t rxWatermark: rxFIFO watermark

struct _spi_transfer

#include <fsl_spi.h>

SPI transfer structure.

Public Members

const uint8_t *txData: Send buffer

uint8_t *rxData: Receive buffer

uint32_t configFlags: Additional option to control transfer, spi_xfer_option_t.

size_t dataSize: Transfer bytes

struct _spi_half_duplex_transfer

#include <fsl_spi.h>

SPI half-duplex(master only) transfer structure.

Public Members

const uint8_t *txData: Send buffer

uint8_t *rxData: Receive buffer

size_t txDataSize: Transfer bytes for transmit

size_t rxDataSize: Transfer bytes

uint32_t configFlags: Transfer configuration flags, spi_xfer_option_t.

bool isPcsAssertInTransfer: If PCS pin keep assert between transmit and receive. true for assert and false for deassert.

bool isTransmitFirst: True for transmit first and false for receive first.

struct _spi_config: #include <fsl_spi.h>

Internal configuration structure used in ‘spi’ and ‘spi_dma’ driver.

struct _spi_master_handle

#include <fsl_spi.h>

SPI transfer handle structure.

Public Members

const uint8_t *volatile txData: Transfer buffer

uint8_t *volatile rxData: Receive buffer

volatile size_t txRemainingBytes: Number of data to be transmitted [in bytes]

volatile size_t rxRemainingBytes: Number of data to be received [in bytes]

volatile int8_t toReceiveCount: The number of data expected to receive in data width. Since the received count and sent count should be the same to complete the transfer, if the sent count is x and the received count is y, toReceiveCount is x-y.

size_t totalByteCount: A number of transfer bytes

volatile uint32_t state: SPI internal state

spi_master_callback_t callback: SPI callback

void *userData: Callback parameter

uint8_t dataWidth: Width of the data [Valid values: 1 to 16]

uint8_t sselNum: Slave select number to be asserted when transferring data [Valid values: 0 to 3]

uint32_t configFlags: Additional option to control transfer

uint8_t txWatermark: txFIFO watermark

uint8_t rxWatermark: rxFIFO watermark

TRNG: True Random Number Generator

FSL_TRNG_DRIVER_VERSION

TRNG driver version 2.0.17.

Current version: 2.0.17

Change log:

version 2.0.17
- Added support for RT700.
version 2.0.16
- Added support for Dual oscillator mode.
version 2.0.15
- Changed TRNG_USER_CONFIG_DEFAULT_XXX values according to latest reccomended by design team.
version 2.0.14
- add support for RW610 and RW612
version 2.0.13
- After deepsleep it might return error, added clearing bits in TRNG_GetRandomData() and generating new entropy.
- Modified reloading entropy in TRNG_GetRandomData(), for some data length it doesn’t reloading entropy correctly.
version 2.0.12
- For KW34A4_SERIES, KW35A4_SERIES, KW36A4_SERIES set TRNG_USER_CONFIG_DEFAULT_OSC_DIV to kTRNG_RingOscDiv8.
version 2.0.11
- Add clearing pending errors in TRNG_Init().
version 2.0.10
- Fixed doxygen issues.
version 2.0.9
- Fix HIS_CCM metrics issues.
version 2.0.8
- For K32L2A41A_SERIES set TRNG_USER_CONFIG_DEFAULT_OSC_DIV to kTRNG_RingOscDiv4.
version 2.0.7
- Fix MISRA 2004 issue rule 12.5.
version 2.0.6
- For KW35Z4_SERIES set TRNG_USER_CONFIG_DEFAULT_OSC_DIV to kTRNG_RingOscDiv8.
version 2.0.5
- Add possibility to define default TRNG configuration by device specific preprocessor macros for FRQMIN, FRQMAX and OSCDIV.
version 2.0.4
- Fix MISRA-2012 issues.
Version 2.0.3
- update TRNG_Init to restart entropy generation
Version 2.0.2
- fix MISRA issues
Version 2.0.1
- add support for KL8x and KL28Z
- update default OSCDIV for K81 to divide by 2

enum _trng_sample_mode

TRNG sample mode. Used by trng_config_t.

Values:

enumerator kTRNG_SampleModeVonNeumann: Use von Neumann data in both Entropy shifter and Statistical Checker.

enumerator kTRNG_SampleModeRaw: Use raw data into both Entropy shifter and Statistical Checker.

enumerator kTRNG_SampleModeVonNeumannRaw: Use von Neumann data in Entropy shifter. Use raw data into Statistical Checker.

enum _trng_clock_mode

TRNG clock mode. Used by trng_config_t.

Values:

enumerator kTRNG_ClockModeRingOscillator: Ring oscillator is used to operate the TRNG (default).

enumerator kTRNG_ClockModeSystem: System clock is used to operate the TRNG. This is for test use only, and indeterminate results may occur.

enum _trng_ring_osc_div

TRNG ring oscillator divide. Used by trng_config_t.

Values:

enumerator kTRNG_RingOscDiv0: Ring oscillator with no divide

enumerator kTRNG_RingOscDiv2: Ring oscillator divided-by-2.

enumerator kTRNG_RingOscDiv4: Ring oscillator divided-by-4.

enumerator kTRNG_RingOscDiv8: Ring oscillator divided-by-8.

enum trng_oscillator_mode_t

TRNG oscillator mode . Used by trng_config_t.

Values:

enumerator kTRNG_SingleOscillatorModeOsc1: Single oscillator mode, using OSC1 (default)

enumerator kTRNG_DualOscillatorMode: Dual oscillator mode

enumerator kTRNG_SingleOscillatorModeOsc2: Single oscillator mode, using OSC2

typedef enum _trng_sample_mode trng_sample_mode_t: TRNG sample mode. Used by trng_config_t.

typedef enum _trng_clock_mode trng_clock_mode_t: TRNG clock mode. Used by trng_config_t.

typedef enum _trng_ring_osc_div trng_ring_osc_div_t: TRNG ring oscillator divide. Used by trng_config_t.

typedef enum trng_oscillator_mode_t trng_oscillator_mode_t: TRNG oscillator mode . Used by trng_config_t.

typedef struct _trng_statistical_check_limit trng_statistical_check_limit_t: Data structure for definition of statistical check limits. Used by trng_config_t.

typedef struct _trng_user_config trng_config_t

Data structure for the TRNG initialization.

This structure initializes the TRNG by calling the TRNG_Init() function. It contains all TRNG configurations.

status_t TRNG_GetDefaultConfig(trng_config_t *userConfig)

Initializes the user configuration structure to default values.

This function initializes the configuration structure to default values. The default values are platform dependent.

Parameters:

userConfig – User configuration structure.

Returns:

If successful, returns the kStatus_TRNG_Success. Otherwise, it returns an error.

status_t TRNG_Init(TRNG_Type *base, const trng_config_t *userConfig)

Initializes the TRNG.

This function initializes the TRNG. When called, the TRNG entropy generation starts immediately.

Parameters:

base – TRNG base address
userConfig – Pointer to the initialization configuration structure.

Returns:

If successful, returns the kStatus_TRNG_Success. Otherwise, it returns an error.

void TRNG_Deinit(TRNG_Type *base)

Shuts down the TRNG.

This function shuts down the TRNG.

Parameters:

base – TRNG base address.

status_t TRNG_GetRandomData(TRNG_Type *base, void *data, size_t dataSize)

Gets random data.

This function gets random data from the TRNG.

Parameters:

base – TRNG base address.
data – Pointer address used to store random data.
dataSize – Size of the buffer pointed by the data parameter.

Returns:

random data

struct _trng_statistical_check_limit

#include <fsl_trng.h>

Data structure for definition of statistical check limits. Used by trng_config_t.

Public Members

uint32_t maximum: Maximum limit.

uint32_t minimum: Minimum limit.

struct _trng_user_config

#include <fsl_trng.h>

Data structure for the TRNG initialization.

This structure initializes the TRNG by calling the TRNG_Init() function. It contains all TRNG configurations.

Public Members

bool lock: Disable programmability of TRNG registers.

trng_clock_mode_t clockMode: Clock mode used to operate TRNG.

trng_ring_osc_div_t ringOscDiv: Ring oscillator divide used by TRNG.

trng_sample_mode_t sampleMode: Sample mode of the TRNG ring oscillator.

trng_oscillator_mode_t oscillatorMode: TRNG oscillator mode .

trng_ring_osc_div_t ringOsc2Div: Divider used for Ring oscillator 2.

uint16_t entropyDelay: Entropy Delay. Defines the length (in system clocks) of each Entropy sample taken.

uint16_t sampleSize: Sample Size. Defines the total number of Entropy samples that will be taken during Entropy generation.

uint16_t sparseBitLimit: Sparse Bit Limit which defines the maximum number of consecutive samples that may be discarded before an error is generated. This limit is used only for during von Neumann sampling (enabled by TRNG_HAL_SetSampleMode()). Samples are discarded if two consecutive raw samples are both 0 or both 1. If this discarding occurs for a long period of time, it indicates that there is insufficient Entropy.

uint8_t retryCount: Retry count. It defines the number of times a statistical check may fails during the TRNG Entropy Generation before generating an error.

uint8_t longRunMaxLimit: Largest allowable number of consecutive samples of all 1, or all 0, that is allowed during the Entropy generation.

trng_statistical_check_limit_t monobitLimit: Maximum and minimum limits for statistical check of number of ones/zero detected during entropy generation.

trng_statistical_check_limit_t runBit1Limit: Maximum and minimum limits for statistical check of number of runs of length 1 detected during entropy generation.

trng_statistical_check_limit_t runBit2Limit: Maximum and minimum limits for statistical check of number of runs of length 2 detected during entropy generation.

trng_statistical_check_limit_t runBit3Limit: Maximum and minimum limits for statistical check of number of runs of length 3 detected during entropy generation.

trng_statistical_check_limit_t runBit4Limit: Maximum and minimum limits for statistical check of number of runs of length 4 detected during entropy generation.

trng_statistical_check_limit_t runBit5Limit: Maximum and minimum limits for statistical check of number of runs of length 5 detected during entropy generation.

trng_statistical_check_limit_t runBit6PlusLimit: Maximum and minimum limits for statistical check of number of runs of length 6 or more detected during entropy generation.

trng_statistical_check_limit_t pokerLimit: Maximum and minimum limits for statistical check of “Poker Test”.

trng_statistical_check_limit_t frequencyCountLimit: Maximum and minimum limits for statistical check of entropy sample frequency count.

USART: Universal Synchronous/Asynchronous Receiver/Transmitter Driver

USART DMA Driver

status_t USART_TransferCreateHandleDMA(USART_Type *base, usart_dma_handle_t *handle, usart_dma_transfer_callback_t callback, void *userData, dma_handle_t *txDmaHandle, dma_handle_t *rxDmaHandle)

Initializes the USART handle which is used in transactional functions.

Parameters:

base – USART peripheral base address.
handle – Pointer to usart_dma_handle_t structure.
callback – Callback function.
userData – User data.
txDmaHandle – User-requested DMA handle for TX DMA transfer.
rxDmaHandle – User-requested DMA handle for RX DMA transfer.

status_t USART_TransferSendDMA(USART_Type *base, usart_dma_handle_t *handle, usart_transfer_t *xfer)

Sends data using DMA.

This function sends data using DMA. This is a non-blocking function, which returns right away. When all data is sent, the send callback function is called.

Parameters:

base – USART peripheral base address.
handle – USART handle pointer.
xfer – USART DMA transfer structure. See usart_transfer_t.

Return values:

kStatus_Success – if succeed, others failed.
kStatus_USART_TxBusy – Previous transfer on going.
kStatus_InvalidArgument – Invalid argument.

status_t USART_TransferReceiveDMA(USART_Type *base, usart_dma_handle_t *handle, usart_transfer_t *xfer)

Receives data using DMA.

This function receives data using DMA. This is a non-blocking function, which returns right away. When all data is received, the receive callback function is called.

Parameters:

base – USART peripheral base address.
handle – Pointer to usart_dma_handle_t structure.
xfer – USART DMA transfer structure. See usart_transfer_t.

Return values:

kStatus_Success – if succeed, others failed.
kStatus_USART_RxBusy – Previous transfer on going.
kStatus_InvalidArgument – Invalid argument.

void USART_TransferAbortSendDMA(USART_Type *base, usart_dma_handle_t *handle)

Aborts the sent data using DMA.

This function aborts send data using DMA.

Parameters:

base – USART peripheral base address
handle – Pointer to usart_dma_handle_t structure

void USART_TransferAbortReceiveDMA(USART_Type *base, usart_dma_handle_t *handle)

Aborts the received data using DMA.

This function aborts the received data using DMA.

Parameters:

base – USART peripheral base address
handle – Pointer to usart_dma_handle_t structure

status_t USART_TransferGetReceiveCountDMA(USART_Type *base, usart_dma_handle_t *handle, uint32_t *count)

Get the number of bytes that have been received.

This function gets the number of bytes that have been received.

Parameters:

base – USART peripheral base address.
handle – USART handle pointer.
count – Receive bytes count.

Return values:

kStatus_NoTransferInProgress – No receive in progress.
kStatus_InvalidArgument – Parameter is invalid.
kStatus_Success – Get successfully through the parameter count;

status_t USART_TransferGetSendCountDMA(USART_Type *base, usart_dma_handle_t *handle, uint32_t *count)

Get the number of bytes that have been sent.

This function gets the number of bytes that have been sent.

Parameters:

base – USART peripheral base address.
handle – USART handle pointer.
count – Sent bytes count.

Return values:

kStatus_NoTransferInProgress – No receive in progress.
kStatus_InvalidArgument – Parameter is invalid.
kStatus_Success – Get successfully through the parameter count;

FSL_USART_DMA_DRIVER_VERSION: USART dma driver version.

typedef struct _usart_dma_handle usart_dma_handle_t

typedef void (*usart_dma_transfer_callback_t)(USART_Type *base, usart_dma_handle_t *handle, status_t status, void *userData): UART transfer callback function.

struct _usart_dma_handle

#include <fsl_usart_dma.h>

UART DMA handle.

Public Members

USART_Type *base: UART peripheral base address.

usart_dma_transfer_callback_t callback: Callback function.

void *userData: UART callback function parameter.

size_t rxDataSizeAll: Size of the data to receive.

size_t txDataSizeAll: Size of the data to send out.

dma_handle_t *txDmaHandle: The DMA TX channel used.

dma_handle_t *rxDmaHandle: The DMA RX channel used.

volatile uint8_t txState: TX transfer state.

volatile uint8_t rxState: RX transfer state

USART Driver

status_t USART_Init(USART_Type *base, const usart_config_t *config, uint32_t srcClock_Hz)

Initializes a USART instance with user configuration structure and peripheral clock.

This function configures the USART module with the user-defined settings. The user can configure the configuration structure and also get the default configuration by using the USART_GetDefaultConfig() function. Example below shows how to use this API to configure USART.

usart_config_t usartConfig;
usartConfig.baudRate_Bps = 115200U;
usartConfig.parityMode = kUSART_ParityDisabled;
usartConfig.stopBitCount = kUSART_OneStopBit;
USART_Init(USART1, &usartConfig, 20000000U);

Parameters:

base – USART peripheral base address.
config – Pointer to user-defined configuration structure.
srcClock_Hz – USART clock source frequency in HZ.

Return values:

kStatus_USART_BaudrateNotSupport – Baudrate is not support in current clock source.
kStatus_InvalidArgument – USART base address is not valid
kStatus_Success – Status USART initialize succeed

void USART_CalcTimeoutConfig(uint32_t target_us, uint8_t *rxTimeoutPrescaler, uint32_t *rxTimeoutcounter, uint32_t srcClock_Hz)

Calculate the USART instance RX timeout prescaler and counter.

This function for calculate the USART RXFIFO timeout config. This function is used to calculate suitable prescaler and counter for target_us.

usart_config_t config;
config.rxWatermark                     = kUSART_RxFifo2;
config.rxTimeout.enable                = true;
config.rxTimeout.resetCounterOnEmpty   = true;
config.rxTimeout.resetCounterOnReceive = true;
USART_CalcTimeoutConfig(200U, &config.rxTimeout.prescaler, &config.rxTimeout.counter,
                                 CLOCK_GetFreq(kCLOCK_BusClk));

Parameters:

target_us – Time for rx timeout unit us.
rxTimeoutPrescaler – The prescaler to be setted after function.
rxTimeoutcounter – The counter to be setted after function.
srcClock_Hz – The clockSrc for rx timeout.

void USART_SetRxTimeoutConfig(USART_Type *base, const usart_rx_timeout_config *config)

Sets the USART instance RX timeout config.

This function configures the USART RXFIFO timeout config. This function is used to config the USART RXFIFO timeout config after the USART module is initialized by the USART_Init.

Parameters:

base – USART peripheral base address.
config – pointer to receive timeout configuration structure.

void USART_Deinit(USART_Type *base)

Deinitializes a USART instance.

This function waits for TX complete, disables TX and RX, and disables the USART clock.

Parameters:

base – USART peripheral base address.

void USART_GetDefaultConfig(usart_config_t *config)

Gets the default configuration structure.

This function initializes the USART configuration structure to a default value. The default values are: usartConfig->baudRate_Bps = 115200U; usartConfig->parityMode = kUSART_ParityDisabled; usartConfig->stopBitCount = kUSART_OneStopBit; usartConfig->bitCountPerChar = kUSART_8BitsPerChar; usartConfig->loopback = false; usartConfig->enableTx = false; usartConfig->enableRx = false;

Parameters:

config – Pointer to configuration structure.

status_t USART_SetBaudRate(USART_Type *base, uint32_t baudrate_Bps, uint32_t srcClock_Hz)

Sets the USART instance baud rate.

This function configures the USART module baud rate. This function is used to update the USART module baud rate after the USART module is initialized by the USART_Init.

USART_SetBaudRate(USART1, 115200U, 20000000U);

Parameters:

base – USART peripheral base address.
baudrate_Bps – USART baudrate to be set.
srcClock_Hz – USART clock source frequency in HZ.

Return values:

kStatus_USART_BaudrateNotSupport – Baudrate is not support in current clock source.
kStatus_Success – Set baudrate succeed.
kStatus_InvalidArgument – One or more arguments are invalid.

status_t USART_Enable32kMode(USART_Type *base, uint32_t baudRate_Bps, bool enableMode32k, uint32_t srcClock_Hz)

Enable 32 kHz mode which USART uses clock from the RTC oscillator as the clock source.

Please note that in order to use a 32 kHz clock to operate USART properly, the RTC oscillator and its 32 kHz output must be manully enabled by user, by calling RTC_Init and setting SYSCON_RTCOSCCTRL_EN bit to 1. And in 32kHz clocking mode the USART can only work at 9600 baudrate or at the baudrate that 9600 can evenly divide, eg: 4800, 3200.

Parameters:

base – USART peripheral base address.
baudRate_Bps – USART baudrate to be set..
enableMode32k – true is 32k mode, false is normal mode.
srcClock_Hz – USART clock source frequency in HZ.

Return values:

kStatus_USART_BaudrateNotSupport – Baudrate is not support in current clock source.
kStatus_Success – Set baudrate succeed.
kStatus_InvalidArgument – One or more arguments are invalid.

void USART_Enable9bitMode(USART_Type *base, bool enable)

Enable 9-bit data mode for USART.

This function set the 9-bit mode for USART module. The 9th bit is not used for parity thus can be modified by user.

Parameters:

base – USART peripheral base address.
enable – true to enable, false to disable.

static inline void USART_SetMatchAddress(USART_Type *base, uint8_t address)

Set the USART slave address.

This function configures the address for USART module that works as slave in 9-bit data mode. When the address detection is enabled, the frame it receices with MSB being 1 is considered as an address frame, otherwise it is considered as data frame. Once the address frame matches slave’s own addresses, this slave is addressed. This address frame and its following data frames are stored in the receive buffer, otherwise the frames will be discarded. To un-address a slave, just send an address frame with unmatched address.

Note

Any USART instance joined in the multi-slave system can work as slave. The position of the address mark is the same as the parity bit when parity is enabled for 8 bit and 9 bit data formats.

Parameters:

base – USART peripheral base address.
address – USART slave address.

static inline void USART_EnableMatchAddress(USART_Type *base, bool match)

Enable the USART match address feature.

Parameters:

base – USART peripheral base address.
match – true to enable match address, false to disable.

static inline uint32_t USART_GetStatusFlags(USART_Type *base)

Get USART status flags.

This function get all USART status flags, the flags are returned as the logical OR value of the enumerators _usart_flags. To check a specific status, compare the return value with enumerators in _usart_flags. For example, to check whether the TX is empty:

if (kUSART_TxFifoNotFullFlag & USART_GetStatusFlags(USART1))
{
    ...
}

Parameters:

base – USART peripheral base address.

Returns:

USART status flags which are ORed by the enumerators in the _usart_flags.

static inline void USART_ClearStatusFlags(USART_Type *base, uint32_t mask)

Clear USART status flags.

This function clear supported USART status flags. The mask is a logical OR of enumeration members. See kUSART_AllClearFlags. For example:

USART_ClearStatusFlags(USART1, kUSART_TxError | kUSART_RxError)

Parameters:

base – USART peripheral base address.
mask – status flags to be cleared.

static inline void USART_EnableInterrupts(USART_Type *base, uint32_t mask)

Enables USART interrupts according to the provided mask.

This function enables the USART interrupts according to the provided mask. The mask is a logical OR of enumeration members. See _usart_interrupt_enable. For example, to enable TX empty interrupt and RX full interrupt:

USART_EnableInterrupts(USART1, kUSART_TxLevelInterruptEnable | kUSART_RxLevelInterruptEnable);

Parameters:

base – USART peripheral base address.
mask – The interrupts to enable. Logical OR of _usart_interrupt_enable.

static inline void USART_DisableInterrupts(USART_Type *base, uint32_t mask)

Disables USART interrupts according to a provided mask.

This function disables the USART interrupts according to a provided mask. The mask is a logical OR of enumeration members. See _usart_interrupt_enable. This example shows how to disable the TX empty interrupt and RX full interrupt:

USART_DisableInterrupts(USART1, kUSART_TxLevelInterruptEnable | kUSART_RxLevelInterruptEnable);

Parameters:

base – USART peripheral base address.
mask – The interrupts to disable. Logical OR of _usart_interrupt_enable.

static inline uint32_t USART_GetEnabledInterrupts(USART_Type *base)

Returns enabled USART interrupts.

This function returns the enabled USART interrupts.

Parameters:

base – USART peripheral base address.

static inline void USART_EnableTxDMA(USART_Type *base, bool enable): Enable DMA for Tx.

static inline void USART_EnableRxDMA(USART_Type *base, bool enable): Enable DMA for Rx.

static inline void USART_EnableCTS(USART_Type *base, bool enable)

Enable CTS. This function will determine whether CTS is used for flow control.

Parameters:

base – USART peripheral base address.
enable – Enable CTS or not, true for enable and false for disable.

static inline void USART_EnableContinuousSCLK(USART_Type *base, bool enable)

Continuous Clock generation. By default, SCLK is only output while data is being transmitted in synchronous mode. Enable this funciton, SCLK will run continuously in synchronous mode, allowing characters to be received on Un_RxD independently from transmission on Un_TXD).

Parameters:

base – USART peripheral base address.
enable – Enable Continuous Clock generation mode or not, true for enable and false for disable.

static inline void USART_EnableAutoClearSCLK(USART_Type *base, bool enable)

Enable Continuous Clock generation bit auto clear. While enable this cuntion, the Continuous Clock bit is automatically cleared when a complete character has been received. This bit is cleared at the same time.

Parameters:

base – USART peripheral base address.
enable – Enable auto clear or not, true for enable and false for disable.

static inline void USART_SetRxFifoWatermark(USART_Type *base, uint8_t water)

Sets the rx FIFO watermark.

Parameters:

base – USART peripheral base address.
water – Rx FIFO watermark.

static inline void USART_SetTxFifoWatermark(USART_Type *base, uint8_t water)

Sets the tx FIFO watermark.

Parameters:

base – USART peripheral base address.
water – Tx FIFO watermark.

static inline void USART_WriteByte(USART_Type *base, uint8_t data)

Writes to the FIFOWR register.

This function writes data to the txFIFO directly. The upper layer must ensure that txFIFO has space for data to write before calling this function.

Parameters:

base – USART peripheral base address.
data – The byte to write.

static inline uint8_t USART_ReadByte(USART_Type *base)

Reads the FIFORD register directly.

This function reads data from the rxFIFO directly. The upper layer must ensure that the rxFIFO is not empty before calling this function.

Parameters:

base – USART peripheral base address.

Returns:

The byte read from USART data register.

static inline uint8_t USART_GetRxFifoCount(USART_Type *base)

Gets the rx FIFO data count.

Parameters:

base – USART peripheral base address.

Returns:

rx FIFO data count.

static inline uint8_t USART_GetTxFifoCount(USART_Type *base)

Gets the tx FIFO data count.

Parameters:

base – USART peripheral base address.

Returns:

tx FIFO data count.

void USART_SendAddress(USART_Type *base, uint8_t address)

Transmit an address frame in 9-bit data mode.

Parameters:

base – USART peripheral base address.
address – USART slave address.

status_t USART_WriteBlocking(USART_Type *base, const uint8_t *data, size_t length)

Writes to the TX register using a blocking method.

This function polls the TX register, waits for the TX register to be empty or for the TX FIFO to have room and writes data to the TX buffer.

Parameters:

base – USART peripheral base address.
data – Start address of the data to write.
length – Size of the data to write.

Return values:

kStatus_USART_Timeout – Transmission timed out and was aborted.
kStatus_InvalidArgument – Invalid argument.
kStatus_Success – Successfully wrote all data.

status_t USART_ReadBlocking(USART_Type *base, uint8_t *data, size_t length)

Read RX data register using a blocking method.

This function polls the RX register, waits for the RX register to be full or for RX FIFO to have data and read data from the TX register.

Parameters:

base – USART peripheral base address.
data – Start address of the buffer to store the received data.
length – Size of the buffer.

Return values:

kStatus_USART_FramingError – Receiver overrun happened while receiving data.
kStatus_USART_ParityError – Noise error happened while receiving data.
kStatus_USART_NoiseError – Framing error happened while receiving data.
kStatus_USART_RxError – Overflow or underflow rxFIFO happened.
kStatus_USART_Timeout – Transmission timed out and was aborted.
kStatus_Success – Successfully received all data.

status_t USART_TransferCreateHandle(USART_Type *base, usart_handle_t *handle, usart_transfer_callback_t callback, void *userData)

Initializes the USART handle.

This function initializes the USART handle which can be used for other USART transactional APIs. Usually, for a specified USART instance, call this API once to get the initialized handle.

Parameters:

base – USART peripheral base address.
handle – USART handle pointer.
callback – The callback function.
userData – The parameter of the callback function.

status_t USART_TransferSendNonBlocking(USART_Type *base, usart_handle_t *handle, usart_transfer_t *xfer)

Transmits a buffer of data using the interrupt method.

This function sends data using an interrupt method. This is a non-blocking function, which returns directly without waiting for all data to be written to the TX register. When all data is written to the TX register in the IRQ handler, the USART driver calls the callback function and passes the kStatus_USART_TxIdle as status parameter.

Parameters:

base – USART peripheral base address.
handle – USART handle pointer.
xfer – USART transfer structure. See usart_transfer_t.

Return values:

kStatus_Success – Successfully start the data transmission.
kStatus_USART_TxBusy – Previous transmission still not finished, data not all written to TX register yet.
kStatus_InvalidArgument – Invalid argument.

void USART_TransferStartRingBuffer(USART_Type *base, usart_handle_t *handle, uint8_t *ringBuffer, size_t ringBufferSize)

Sets up the RX ring buffer.

This function sets up the RX ring buffer to a specific USART handle.

When the RX ring buffer is used, data received are stored into the ring buffer even when the user doesn’t call the USART_TransferReceiveNonBlocking() API. If there is already data received in the ring buffer, the user can get the received data from the ring buffer directly.

Note

When using the RX ring buffer, one byte is reserved for internal use. In other words, if ringBufferSize is 32, then only 31 bytes are used for saving data.

Parameters:

base – USART peripheral base address.
handle – USART handle pointer.
ringBuffer – Start address of the ring buffer for background receiving. Pass NULL to disable the ring buffer.
ringBufferSize – size of the ring buffer.

void USART_TransferStopRingBuffer(USART_Type *base, usart_handle_t *handle)

Aborts the background transfer and uninstalls the ring buffer.

This function aborts the background transfer and uninstalls the ring buffer.

Parameters:

base – USART peripheral base address.
handle – USART handle pointer.

size_t USART_TransferGetRxRingBufferLength(usart_handle_t *handle)

Get the length of received data in RX ring buffer.

Parameters:

handle – USART handle pointer.

Returns:

Length of received data in RX ring buffer.

void USART_TransferAbortSend(USART_Type *base, usart_handle_t *handle)

Aborts the interrupt-driven data transmit.

This function aborts the interrupt driven data sending. The user can get the remainBtyes to find out how many bytes are still not sent out.

Parameters:

base – USART peripheral base address.
handle – USART handle pointer.

status_t USART_TransferGetSendCount(USART_Type *base, usart_handle_t *handle, uint32_t *count)

Get the number of bytes that have been sent out to bus.

This function gets the number of bytes that have been sent out to bus by interrupt method.

Parameters:

base – USART peripheral base address.
handle – USART handle pointer.
count – Send bytes count.

Return values:

kStatus_NoTransferInProgress – No send in progress.
kStatus_InvalidArgument – Parameter is invalid.
kStatus_Success – Get successfully through the parameter count;

status_t USART_TransferReceiveNonBlocking(USART_Type *base, usart_handle_t *handle, usart_transfer_t *xfer, size_t *receivedBytes)

Receives a buffer of data using an interrupt method.

This function receives data using an interrupt method. This is a non-blocking function, which returns without waiting for all data to be received. If the RX ring buffer is used and not empty, the data in the ring buffer is copied and the parameter receivedBytes shows how many bytes are copied from the ring buffer. After copying, if the data in the ring buffer is not enough to read, the receive request is saved by the USART driver. When the new data arrives, the receive request is serviced first. When all data is received, the USART driver notifies the upper layer through a callback function and passes the status parameter kStatus_USART_RxIdle. For example, the upper layer needs 10 bytes but there are only 5 bytes in the ring buffer. The 5 bytes are copied to the xfer->data and this function returns with the parameter receivedBytes set to 5. For the left 5 bytes, newly arrived data is saved from the xfer->data[5]. When 5 bytes are received, the USART driver notifies the upper layer. If the RX ring buffer is not enabled, this function enables the RX and RX interrupt to receive data to the xfer->data. When all data is received, the upper layer is notified.

Parameters:

base – USART peripheral base address.
handle – USART handle pointer.
xfer – USART transfer structure, see usart_transfer_t.
receivedBytes – Bytes received from the ring buffer directly.

Return values:

kStatus_Success – Successfully queue the transfer into transmit queue.
kStatus_USART_RxBusy – Previous receive request is not finished.
kStatus_InvalidArgument – Invalid argument.

void USART_TransferAbortReceive(USART_Type *base, usart_handle_t *handle)

Aborts the interrupt-driven data receiving.

This function aborts the interrupt-driven data receiving. The user can get the remainBytes to find out how many bytes not received yet.

Parameters:

base – USART peripheral base address.
handle – USART handle pointer.

status_t USART_TransferGetReceiveCount(USART_Type *base, usart_handle_t *handle, uint32_t *count)

Get the number of bytes that have been received.

This function gets the number of bytes that have been received.

Parameters:

base – USART peripheral base address.
handle – USART handle pointer.
count – Receive bytes count.

Return values:

kStatus_NoTransferInProgress – No receive in progress.
kStatus_InvalidArgument – Parameter is invalid.
kStatus_Success – Get successfully through the parameter count;

void USART_TransferHandleIRQ(USART_Type *base, usart_handle_t *handle)

USART IRQ handle function.

This function handles the USART transmit and receive IRQ request.

Parameters:

base – USART peripheral base address.
handle – USART handle pointer.

FSL_USART_DRIVER_VERSION: USART driver version.

Error codes for the USART driver.

Values:

enumerator kStatus_USART_TxBusy: Transmitter is busy.

enumerator kStatus_USART_RxBusy: Receiver is busy.

enumerator kStatus_USART_TxIdle: USART transmitter is idle.

enumerator kStatus_USART_RxIdle: USART receiver is idle.

enumerator kStatus_USART_TxError: Error happens on txFIFO.

enumerator kStatus_USART_RxError: Error happens on rxFIFO.

enumerator kStatus_USART_RxRingBufferOverrun: Error happens on rx ring buffer

enumerator kStatus_USART_NoiseError: USART noise error.

enumerator kStatus_USART_FramingError: USART framing error.

enumerator kStatus_USART_ParityError: USART parity error.

enumerator kStatus_USART_BaudrateNotSupport: Baudrate is not support in current clock source

enum _usart_sync_mode

USART synchronous mode.

Values:

enumerator kUSART_SyncModeDisabled: Asynchronous mode.

enumerator kUSART_SyncModeSlave: Synchronous slave mode.

enumerator kUSART_SyncModeMaster: Synchronous master mode.

enum _usart_parity_mode

USART parity mode.

Values:

enumerator kUSART_ParityDisabled: Parity disabled

enumerator kUSART_ParityEven: Parity enabled, type even, bit setting: PE|PT = 10

enumerator kUSART_ParityOdd: Parity enabled, type odd, bit setting: PE|PT = 11

enum _usart_stop_bit_count

USART stop bit count.

Values:

enumerator kUSART_OneStopBit: One stop bit

enumerator kUSART_TwoStopBit: Two stop bits

enum _usart_data_len

USART data size.

Values:

enumerator kUSART_7BitsPerChar: Seven bit mode

enumerator kUSART_8BitsPerChar: Eight bit mode

enum _usart_clock_polarity

USART clock polarity configuration, used in sync mode.

Values:

enumerator kUSART_RxSampleOnFallingEdge: Un_RXD is sampled on the falling edge of SCLK.

enumerator kUSART_RxSampleOnRisingEdge: Un_RXD is sampled on the rising edge of SCLK.

enum _usart_txfifo_watermark

txFIFO watermark values

Values:

enumerator kUSART_TxFifo0: USART tx watermark is empty

enumerator kUSART_TxFifo1: USART tx watermark at 1 item

enumerator kUSART_TxFifo2: USART tx watermark at 2 items

enumerator kUSART_TxFifo3: USART tx watermark at 3 items

enumerator kUSART_TxFifo4: USART tx watermark at 4 items

enumerator kUSART_TxFifo5: USART tx watermark at 5 items

enumerator kUSART_TxFifo6: USART tx watermark at 6 items

enumerator kUSART_TxFifo7: USART tx watermark at 7 items

enum _usart_rxfifo_watermark

rxFIFO watermark values

Values:

enumerator kUSART_RxFifo1: USART rx watermark at 1 item

enumerator kUSART_RxFifo2: USART rx watermark at 2 items

enumerator kUSART_RxFifo3: USART rx watermark at 3 items

enumerator kUSART_RxFifo4: USART rx watermark at 4 items

enumerator kUSART_RxFifo5: USART rx watermark at 5 items

enumerator kUSART_RxFifo6: USART rx watermark at 6 items

enumerator kUSART_RxFifo7: USART rx watermark at 7 items

enumerator kUSART_RxFifo8: USART rx watermark at 8 items

enum _usart_interrupt_enable

USART interrupt configuration structure, default settings all disabled.

Values:

enumerator kUSART_TxErrorInterruptEnable

enumerator kUSART_RxErrorInterruptEnable

enumerator kUSART_TxLevelInterruptEnable

enumerator kUSART_RxLevelInterruptEnable

enumerator kUSART_TxIdleInterruptEnable: Transmitter idle.

enumerator kUSART_CtsChangeInterruptEnable: Change in the state of the CTS input.

enumerator kUSART_RxBreakChangeInterruptEnable: Break condition asserted or deasserted.

enumerator kUSART_RxStartInterruptEnable: Rx start bit detected.

enumerator kUSART_FramingErrorInterruptEnable: Framing error detected.

enumerator kUSART_ParityErrorInterruptEnable: Parity error detected.

enumerator kUSART_NoiseErrorInterruptEnable: Noise error detected.

enumerator kUSART_AutoBaudErrorInterruptEnable: Auto baudrate error detected.

enumerator kUSART_RxTimeoutInterruptEnable: Receive timeout detected.

enumerator kUSART_AllInterruptEnables

enum _usart_flags

USART status flags.

This provides constants for the USART status flags for use in the USART functions.

Values:

enumerator kUSART_TxError: TXERR bit, sets if TX buffer is error

enumerator kUSART_RxError: RXERR bit, sets if RX buffer is error

enumerator kUSART_TxFifoEmptyFlag: TXEMPTY bit, sets if TX buffer is empty

enumerator kUSART_TxFifoNotFullFlag: TXNOTFULL bit, sets if TX buffer is not full

enumerator kUSART_RxFifoNotEmptyFlag: RXNOEMPTY bit, sets if RX buffer is not empty

enumerator kUSART_RxFifoFullFlag: RXFULL bit, sets if RX buffer is full

enumerator kUSART_RxIdleFlag: Receiver idle.

enumerator kUSART_TxIdleFlag: Transmitter idle.

enumerator kUSART_CtsAssertFlag: CTS signal high.

enumerator kUSART_CtsChangeFlag: CTS signal changed interrupt status.

enumerator kUSART_BreakDetectFlag: Break detected. Self cleared when rx pin goes high again.

enumerator kUSART_BreakDetectChangeFlag: Break detect change interrupt flag. A change in the state of receiver break detection.

enumerator kUSART_RxStartFlag: Rx start bit detected interrupt flag.

enumerator kUSART_FramingErrorFlag: Framing error interrupt flag.

enumerator kUSART_ParityErrorFlag: parity error interrupt flag.

enumerator kUSART_NoiseErrorFlag: Noise error interrupt flag.

enumerator kUSART_AutobaudErrorFlag: Auto baudrate error interrupt flag, caused by the baudrate counter timeout before the end of start bit.

enumerator kUSART_RxTimeoutFlag: RXTIMEOUT bit, sets if RX FIFO Timeout.

enumerator kUSART_AllClearFlags

typedef enum _usart_sync_mode usart_sync_mode_t: USART synchronous mode.

typedef enum _usart_parity_mode usart_parity_mode_t: USART parity mode.

typedef enum _usart_stop_bit_count usart_stop_bit_count_t: USART stop bit count.

typedef enum _usart_data_len usart_data_len_t: USART data size.

typedef enum _usart_clock_polarity usart_clock_polarity_t: USART clock polarity configuration, used in sync mode.

typedef enum _usart_txfifo_watermark usart_txfifo_watermark_t: txFIFO watermark values

typedef enum _usart_rxfifo_watermark usart_rxfifo_watermark_t: rxFIFO watermark values

typedef struct _usart_rx_timeout_config usart_rx_timeout_config: USART receive timeout configuration structure.

typedef struct _usart_config usart_config_t: USART configuration structure.

typedef struct _usart_transfer usart_transfer_t: USART transfer structure.

typedef struct _usart_handle usart_handle_t

typedef void (*usart_transfer_callback_t)(USART_Type *base, usart_handle_t *handle, status_t status, void *userData): USART transfer callback function.

typedef void (*flexcomm_usart_irq_handler_t)(USART_Type *base, usart_handle_t *handle): Typedef for usart interrupt handler.

uint32_t USART_GetInstance(USART_Type *base): Returns instance number for USART peripheral base address.

USART_FIFOTRIG_TXLVL_GET(base)

USART_FIFOTRIG_RXLVL_GET(base)

UART_RETRY_TIMES

Retry times for waiting flag.

Defining to zero means to keep waiting for the flag until it is assert/deassert in blocking transfer, otherwise the program will wait until the UART_RETRY_TIMES counts down to 0, if the flag still remains unchanged then program will return kStatus_USART_Timeout. It is not advised to use this macro in formal application to prevent any hardware error because the actual wait period is affected by the compiler and optimization.

struct _usart_rx_timeout_config

#include <fsl_usart.h>

USART receive timeout configuration structure.

Public Members

bool enable: Enable RX timeout

bool resetCounterOnEmpty: Enable RX timeout counter reset when RX FIFO becames empty.

bool resetCounterOnReceive: Enable RX timeout counter reset when RX FIFO receives data from the transmitter side.

uint32_t counter: RX timeout counter

uint8_t prescaler: RX timeout prescaler

struct _usart_config

#include <fsl_usart.h>

USART configuration structure.

Public Members

uint32_t baudRate_Bps: USART baud rate

usart_parity_mode_t parityMode: Parity mode, disabled (default), even, odd

usart_stop_bit_count_t stopBitCount: Number of stop bits, 1 stop bit (default) or 2 stop bits

usart_data_len_t bitCountPerChar: Data length - 7 bit, 8 bit

bool loopback: Enable peripheral loopback

bool enableRx: Enable RX

bool enableTx: Enable TX

bool enableContinuousSCLK: USART continuous Clock generation enable in synchronous master mode.

bool enableMode32k: USART uses 32 kHz clock from the RTC oscillator as the clock source.

bool enableHardwareFlowControl: Enable hardware control RTS/CTS

usart_txfifo_watermark_t txWatermark: txFIFO watermark

usart_rxfifo_watermark_t rxWatermark: rxFIFO watermark

usart_sync_mode_t syncMode: Transfer mode select - asynchronous, synchronous master, synchronous slave.

usart_clock_polarity_t clockPolarity: Selects the clock polarity and sampling edge in synchronous mode.

usart_rx_timeout_config rxTimeout: rx timeout configuration

struct _usart_transfer

#include <fsl_usart.h>

USART transfer structure.

Public Members

size_t dataSize: The byte count to be transfer.

struct _usart_handle

#include <fsl_usart.h>

USART handle structure.

Public Members

const uint8_t *volatile txData: Address of remaining data to send.

volatile size_t txDataSize: Size of the remaining data to send.

size_t txDataSizeAll: Size of the data to send out.

uint8_t *volatile rxData: Address of remaining data to receive.

volatile size_t rxDataSize: Size of the remaining data to receive.

size_t rxDataSizeAll: Size of the data to receive.

uint8_t *rxRingBuffer: Start address of the receiver ring buffer.

size_t rxRingBufferSize: Size of the ring buffer.

volatile uint16_t rxRingBufferHead: Index for the driver to store received data into ring buffer.

volatile uint16_t rxRingBufferTail: Index for the user to get data from the ring buffer.

usart_transfer_callback_t callback: Callback function.

void *userData: USART callback function parameter.

volatile uint8_t txState: TX transfer state.

volatile uint8_t rxState: RX transfer state

uint8_t txWatermark: txFIFO watermark

uint8_t rxWatermark: rxFIFO watermark

union __unnamed49__

Public Members

uint8_t *data: The buffer of data to be transfer.

uint8_t *rxData: The buffer to receive data.

const uint8_t *txData: The buffer of data to be sent.

UTICK: MictoTick Timer Driver

void UTICK_Init(UTICK_Type *base): Initializes an UTICK by turning its bus clock on.

void UTICK_Deinit(UTICK_Type *base)

Deinitializes a UTICK instance.

This function shuts down Utick bus clock

Parameters:

base – UTICK peripheral base address.

uint32_t UTICK_GetStatusFlags(UTICK_Type *base)

Get Status Flags.

This returns the status flag

Parameters:

base – UTICK peripheral base address.

Returns:

status register value

void UTICK_ClearStatusFlags(UTICK_Type *base)

Clear Status Interrupt Flags.

This clears intr status flag

Parameters:

base – UTICK peripheral base address.

Returns:

none

void UTICK_SetTick(UTICK_Type *base, utick_mode_t mode, uint32_t count, utick_callback_t cb)

Starts UTICK.

This function starts a repeat/onetime countdown with an optional callback

Parameters:

base – UTICK peripheral base address.
mode – UTICK timer mode (ie kUTICK_onetime or kUTICK_repeat)
count – UTICK timer mode (ie kUTICK_onetime or kUTICK_repeat)
cb – UTICK callback (can be left as NULL if none, otherwise should be a void func(void))

Returns:

none

void UTICK_HandleIRQ(UTICK_Type *base, utick_callback_t cb)

UTICK Interrupt Service Handler.

This function handles the interrupt and refers to the callback array in the driver to callback user (as per request in UTICK_SetTick()). if no user callback is scheduled, the interrupt will simply be cleared.

Parameters:

base – UTICK peripheral base address.
cb – callback scheduled for this instance of UTICK

Returns:

none

FSL_UTICK_DRIVER_VERSION: UTICK driver version 2.0.5.

enum _utick_mode

UTICK timer operational mode.

Values:

enumerator kUTICK_Onetime: Trigger once

enumerator kUTICK_Repeat: Trigger repeatedly

typedef enum _utick_mode utick_mode_t: UTICK timer operational mode.

typedef void (*utick_callback_t)(void): UTICK callback function.

WWDT: Windowed Watchdog Timer Driver

void WWDT_GetDefaultConfig(wwdt_config_t *config)

Initializes WWDT configure structure.

This function initializes the WWDT configure structure to default value. The default value are:

config->enableWwdt = true;
config->enableWatchdogReset = false;
config->enableWatchdogProtect = false;
config->enableLockOscillator = false;
config->windowValue = 0xFFFFFFU;
config->timeoutValue = 0xFFFFFFU;
config->warningValue = 0;

See also

wwdt_config_t

Parameters:

config – Pointer to WWDT config structure.

void WWDT_Init(WWDT_Type *base, const wwdt_config_t *config)

Initializes the WWDT.

This function initializes the WWDT. When called, the WWDT runs according to the configuration.

Example:

wwdt_config_t config;
WWDT_GetDefaultConfig(&config);
config.timeoutValue = 0x7ffU;
WWDT_Init(wwdt_base,&config);

Parameters:

base – WWDT peripheral base address
config – The configuration of WWDT

void WWDT_Deinit(WWDT_Type *base)

Shuts down the WWDT.

This function shuts down the WWDT.

Parameters:

base – WWDT peripheral base address

static inline void WWDT_Enable(WWDT_Type *base)

Enables the WWDT module.

This function write value into WWDT_MOD register to enable the WWDT, it is a write-once bit; once this bit is set to one and a watchdog feed is performed, the watchdog timer will run permanently.

Parameters:

base – WWDT peripheral base address

static inline void WWDT_Disable(WWDT_Type *base)

Disables the WWDT module.

Deprecated:: Do not use this function. It will be deleted in next release version, for once the bit field of WDEN written with a 1, it can not be re-written with a 0.

This function write value into WWDT_MOD register to disable the WWDT.

Parameters:

base – WWDT peripheral base address

static inline uint32_t WWDT_GetStatusFlags(WWDT_Type *base)

Gets all WWDT status flags.

This function gets all status flags.

Example for getting Timeout Flag:

uint32_t status;
status = WWDT_GetStatusFlags(wwdt_base) & kWWDT_TimeoutFlag;

Parameters:

base – WWDT peripheral base address

Returns:

The status flags. This is the logical OR of members of the enumeration _wwdt_status_flags_t

void WWDT_ClearStatusFlags(WWDT_Type *base, uint32_t mask)

Clear WWDT flag.

This function clears WWDT status flag.

Example for clearing warning flag:

WWDT_ClearStatusFlags(wwdt_base, kWWDT_WarningFlag);

Parameters:

base – WWDT peripheral base address
mask – The status flags to clear. This is a logical OR of members of the enumeration _wwdt_status_flags_t

static inline void WWDT_SetWarningValue(WWDT_Type *base, uint32_t warningValue)

Set the WWDT warning value.

The WDWARNINT register determines the watchdog timer counter value that will generate a watchdog interrupt. When the watchdog timer counter is no longer greater than the value defined by WARNINT, an interrupt will be generated after the subsequent WDCLK.

Parameters:

base – WWDT peripheral base address
warningValue – WWDT warning value.

static inline void WWDT_SetTimeoutValue(WWDT_Type *base, uint32_t timeoutCount)

Set the WWDT timeout value.

This function sets the timeout value. Every time a feed sequence occurs the value in the TC register is loaded into the Watchdog timer. Writing a value below 0xFF will cause 0xFF to be loaded into the TC register. Thus the minimum time-out interval is TWDCLK*256*4. If enableWatchdogProtect flag is true in wwdt_config_t config structure, any attempt to change the timeout value before the watchdog counter is below the warning and window values will cause a watchdog reset and set the WDTOF flag.

Parameters:

base – WWDT peripheral base address
timeoutCount – WWDT timeout value, count of WWDT clock tick.

static inline void WWDT_SetWindowValue(WWDT_Type *base, uint32_t windowValue)

Sets the WWDT window value.

The WINDOW register determines the highest TV value allowed when a watchdog feed is performed. If a feed sequence occurs when timer value is greater than the value in WINDOW, a watchdog event will occur. To disable windowing, set windowValue to 0xFFFFFF (maximum possible timer value) so windowing is not in effect.

Parameters:

base – WWDT peripheral base address
windowValue – WWDT window value.

void WWDT_Refresh(WWDT_Type *base)

Refreshes the WWDT timer.

This function feeds the WWDT. This function should be called before WWDT timer is in timeout. Otherwise, a reset is asserted.

Parameters:

base – WWDT peripheral base address

FSL_WWDT_DRIVER_VERSION: Defines WWDT driver version.

WWDT_FIRST_WORD_OF_REFRESH: First word of refresh sequence

WWDT_SECOND_WORD_OF_REFRESH: Second word of refresh sequence

enum _wwdt_status_flags_t

WWDT status flags.

This structure contains the WWDT status flags for use in the WWDT functions.

Values:

enumerator kWWDT_TimeoutFlag: Time-out flag, set when the timer times out

enumerator kWWDT_WarningFlag: Warning interrupt flag, set when timer is below the value WDWARNINT

typedef struct _wwdt_config wwdt_config_t: Describes WWDT configuration structure.

struct _wwdt_config

#include <fsl_wwdt.h>

Describes WWDT configuration structure.

Public Members

bool enableWwdt: Enables or disables WWDT

bool enableWatchdogReset: true: Watchdog timeout will cause a chip reset false: Watchdog timeout will not cause a chip reset

bool enableWatchdogProtect: true: Enable watchdog protect i.e timeout value can only be changed after counter is below warning & window values false: Disable watchdog protect; timeout value can be changed at any time

uint32_t windowValue: Window value, set this to 0xFFFFFF if windowing is not in effect

uint32_t timeoutValue: Timeout value

uint32_t warningValue: Watchdog time counter value that will generate a warning interrupt. Set this to 0 for no warning

uint32_t clockFreq_Hz: Watchdog clock source frequency.