MCUXpresso SDK Changelog

ANACTRL

[2.4.0]

• Improvements

  • Added some interrupt flags for devices containing BOD1 and BOD2 interrupt controls.

  • Added a control macro to enable/disable the 32MHz Crystal oscillator code in current driver.

  • Added a feature macro for bit field ENA_96MHZCLK in FRO192M_CTRL.

  • Added a feature macro for bit field BODCORE_INT_ENABLE in BOD_DCDC_INT_CTRL.

[2.3.1]

• Bug Fixes

  • Added casts to prevent overflow caused by capturing large target clock.

[2.3.0]

• Improvements

  • Added AUX_BIAS control APIs.

[2.2.0]

• Improvements

  • Added some macros to separate the scenes that some bit fields are reserved for some devices.

  • Optimized the comments.

  • Optimized the code implementation inside some functions.

[2.1.2]

• Bug Fixes

  • Fixed MISRA C-2012 rule 10.3 and rule 17.7.

[2.1.1]

• Bug Fixes

  • Removed AnalogTestBus configuration to align with new header.

[2.1.0]

• Improvements

  • Updates for LPC55xx A1.

    • Removed the control of bitfield FRO192M_CTRL_ENA_48MHZCLK, XO32M_CTRL_ACBUF_PASS_ENABLE.

    • Removed status bits in ANACTRL_STATUS: PMU_ID OSC_ID FINAL_TEST_DONE_VECT.

    • Removed API ANACTRL_EnableAdcVBATDivider() and APIs which operate the RingOSC registers.

    • Removed the configurations of 32 MHz Crystal oscillator voltage source supply control register.

    • Added API ANACTRL_ClearInterrupts().

[2.0.0]

• Initial version.

---

CASSPER

[2.2.4]

• Fix MISRA-C 2012 issue.

[2.2.3]

• Added macro into CASPER_Init and CASPER_Deinit to support devices without clock and reset control.

[2.2.2]

• Enable hardware interleaving to RAMX0 and RAMX1 for CASPER by feature macro FSL_FEATURE_CASPER_RAM_HW_INTERLEAVE

[2.2.1]

• Fix MISRA C-2012 issue.

[2.2.0]

• Rework driver to support multiple curves at once.

[2.1.0]

• Add ECC NIST P-521 elliptic curve.

[2.0.10]

• Fix MISRA C-2012 issue.

[2.0.9]

• Remove unused function Jac_oncurve().

• Fix ECC384 build.

[2.0.8]

• Add feature macro for CASPER_RAM_OFFSET.

[2.0.7]

• Fix MISRA C-2012 issue.

[2.0.6]

• Bug Fixes

  • Fix IAR Pa082 warning

[2.0.5]

• Bug Fixes

  • Fix sign-compare warning

[2.0.4]

• For GCC compiler, enforce O1 optimize level, specifically to remove strict-aliasing option. This driver is very specific and requires -fno-strict-aliasing.

[2.0.3]

• Bug Fixes

  • Fixed the bug for KPSDK-28107 RSUB, FILL and ZERO operations not implemented in enum _casper_operation.

[2.0.2]

• Bug Fixes

  • Fixed KPSDK-25015 CASPER_MEMCPY hard-fault on LPC55xx when both source and destination buffers are outside of CASPER_RAM.

[2.0.1]

• Bug Fixes

  • Fixed the bug that KPSDK-24531 double_scalar_multiplication() result may be all zeroes for some specific input.

[2.0.0]

• Initial version.

---

CDOG

[2.1.3]

• Re-design multiple instance IRQs and Clocks

• Add fix for RESTART command errata

[2.1.2]

• Support multiple IRQs

• Fix default CONTROL values

[2.1.1]

• Remove bit CONTROL[CONTROL_CTRL].

[2.1.0]

• Rename CWT to CDOG.

[2.0.2]

• Fix MISRA-2012 issues.

[2.0.1]

• Fix doxygen issues.

[2.0.0]

• Initial version.

---

CLOCK

[2.1.0]

• New Features

  • Added CLOCK_SetupPLUClkInClocking() to store the PLU CLKIN frequency.

• Bug Fixes

  • Fixed CLOCK_GetFlexCommClkFreq function to get flexcomm output frequency correctly.

  • Fixed attach incorrect attach_id for SCT.

[2.0.3]

• Bug Fixes

  • Fixed attach incorrect attach_id.

[2.0.2]

• New Features

  • Added get actual clock attach id api to allow users to obtain the actual clock source in target register.

• Bug Fixes

  • The attach clock and get actual clock attach id APIs should check combination of two clock sources.

• Optimizations

  • Made the judgement statements more clear.

  • Strengthened the compatibility of clock attach id.

  • Removed some unmeaningful definitions and add some useful ones to enhance readability.

[2.0.1]

• Some minor fixes.

[2.0.0]

• Initial version.

---

COMMON

[2.5.0]

• New Features

  • Added new APIs InitCriticalSectionMeasurementContext, DisableGlobalIRQEx and EnableGlobalIRQEx so that user can measure the execution time of the protected sections.

[2.4.3]

• Improvements

  • Enable irqs that mount under irqsteer interrupt extender.

[2.4.2]

• Improvements

  • Add the macros to convert peripheral address to secure address or non-secure address.

[2.4.1]

• Improvements

  • Improve for the macro redefinition error when integrated with zephyr.

[2.4.0]

• New Features

  • Added EnableIRQWithPriority, IRQ_SetPriority, and IRQ_ClearPendingIRQ for ARM.

  • Added MSDK_EnableCpuCycleCounter, MSDK_GetCpuCycleCount for ARM.

[2.3.3]

• New Features

  • Added NETC into status group.

[2.3.2]

• Improvements

  • Make driver aarch64 compatible

[2.3.1]

• Bug Fixes

  • Fixed MAKE_VERSION overflow on 16-bit platforms.

[2.3.0]

• Improvements

  • Split the driver to common part and CPU architecture related part.

[2.2.10]

• Bug Fixes

  • Fixed the ATOMIC macros build error in cpp files.

[2.2.9]

• Bug Fixes

  • Fixed MISRA C-2012 issue, 5.6, 5.8, 8.4, 8.5, 8.6, 10.1, 10.4, 17.7, 21.3.

  • Fixed SDK_Malloc issue that not allocate memory with required size.

[2.2.8]

• Improvements

  • Included stddef.h header file for MDK tool chain.

• New Features:

  • Added atomic modification macros.

[2.2.7]

• Other Change

  • Added MECC status group definition.

[2.2.6]

• Other Change

  • Added more status group definition.

• Bug Fixes

  • Undef __VECTOR_TABLE to avoid duplicate definition in cmsis_clang.h

[2.2.5]

• Bug Fixes

  • Fixed MISRA C-2012 rule-15.5.

[2.2.4]

• Bug Fixes

  • Fixed MISRA C-2012 rule-10.4.

[2.2.3]

• New Features

  • Provided better accuracy of SDK_DelayAtLeastUs with DWT, use macro SDK_DELAY_USE_DWT to enable this feature.

  • Modified the Cortex-M7 delay count divisor based on latest tests on RT series boards, this setting lets result be closer to actual delay time.

[2.2.2]

• New Features

  • Added include RTE_Components.h for CMSIS pack RTE.

[2.2.1]

• Bug Fixes

  • Fixed violation of MISRA C-2012 Rule 3.1, 10.1, 10.3, 10.4, 11.6, 11.9.

[2.2.0]

• New Features

  • Moved SDK_DelayAtLeastUs function from clock driver to common driver.

[2.1.4]

• New Features

  • Added OTFAD into status group.

[2.1.3]

• Bug Fixes

  • MISRA C-2012 issue fixed.

    • Fixed the rule: rule-10.3.

[2.1.2]

• Improvements

  • Add SUPPRESS_FALL_THROUGH_WARNING() macro for the usage of suppressing fallthrough warning.

[2.1.1]

• Bug Fixes

  • Deleted and optimized repeated macro.

[2.1.0]

• New Features

  • Added IRQ operation for XCC toolchain.

  • Added group IDs for newly supported drivers.

[2.0.2]

• Bug Fixes

  • MISRA C-2012 issue fixed.

    • Fixed the rule: rule-10.4.

[2.0.1]

• Improvements

  • Removed the implementation of LPC8XX Enable/DisableDeepSleepIRQ() function.

  • Added new feature macro switch “FSL_FEATURE_HAS_NO_NONCACHEABLE_SECTION” for specific SoCs which have no noncacheable sections, that helps avoid an unnecessary complex in link file and the startup file.

  • Updated the align(x) to attribute(aligned(x)) to support MDK v6 armclang compiler.

[2.0.0]

• Initial version.

---

CRC

[2.1.1]

• Fix MISRA issue.

[2.1.0]

• Add CRC_WriteSeed function.

[2.0.2]

• Fix MISRA issue.

[2.0.1]

• Fixed KPSDK-13362. MDK compiler issue when writing to WR_DATA with -O3 optimize for time.

[2.0.0]

• Initial version.

---

CTIMER

[2.3.3]

• Bug Fixes

  • Fix CERT INT30-C INT31-C issue.

  • Make API CTIMER_SetupPwm and CTIMER_UpdatePwmDutycycle return fail if pulse width register overflow.

[2.3.2]

• Bug Fixes

  • Clear unexpected DMA request generated by RESET_PeripheralReset in API CTIMER_Init to avoid trigger DMA by mistake.

[2.3.1]

• Bug Fixes

  • MISRA C-2012 issue fixed: rule 10.7 and 12.2.

[2.3.0]

• Improvements

  • Added the CTIMER_SetPrescale(), CTIMER_GetCaptureValue(), CTIMER_EnableResetMatchChannel(), CTIMER_EnableStopMatchChannel(), CTIMER_EnableRisingEdgeCapture(), CTIMER_EnableFallingEdgeCapture(), CTIMER_SetShadowValue(),APIs Interface to reduce code complexity.

[2.2.2]

• Bug Fixes

  • Fixed SetupPwm() API only can use match 3 as period channel issue.

[2.2.1]

• Bug Fixes

  • Fixed use specified channel to setting the PWM period in SetupPwmPeriod() API.

  • Fixed Coverity Out-of-bounds issue.

[2.2.0]

• Improvements

  • Updated three API Interface to support Users to flexibly configure the PWM period and PWM output.

• Bug Fixes

  • MISRA C-2012 issue fixed: rule 8.4.

[2.1.0]

• Improvements

  • Added the CTIMER_GetOutputMatchStatus() API Interface.

  • Added feature macro for FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2 and FSL_FEATURE_CTIMER_HAS_NO_IR_CR2INT.

[2.0.3]

• Bug Fixes

  • MISRA C-2012 issue fixed: rule 10.3, 10.4, 10.6, 10.7 and 11.9.

[2.0.2]

• New Features

  • Added new API “CTIMER_GetTimerCountValue” to get the current timer count value.

  • Added a control macro to enable/disable the RESET and CLOCK code in current driver.

  • Added a new feature macro to update the API of CTimer driver for lpc8n04.

[2.0.1]

• Improvements

  • API Interface Change

    • Changed API interface by adding CTIMER_SetupPwmPeriod API and CTIMER_UpdatePwmPulsePeriod API, which both can set up the right PWM with high resolution.

[2.0.0]

• Initial version.

---

LPC_DMA

[2.5.3]

• Improvements

  • Add assert in DMA_SetChannelXferConfig to prevent XFERCOUNT value overflow.

[2.5.2]

• Bug Fixes

  • Use separate “SET” and “CLR” registers to modify shared registers for all channels, in case of thread-safe issue.

[2.5.1]

• Bug Fixes

  • Fixed violation of the MISRA C-2012 rule 11.6.

[2.5.0]

• Improvements

  • Added a new api DMA_SetChannelXferConfig to set DMA xfer config.

[2.4.4]

• Bug Fixes

  • Fixed the issue that DMA_IRQHandle might generate redundant callbacks.

  • Fixed the issue that DMA driver cannot support channel bigger then 32.

  • Fixed violation of the MISRA C-2012 rule 13.5.

[2.4.3]

• Improvements

  • Added features FSL_FEATURE_DMA_DESCRIPTOR_ALIGN_SIZEn/FSL_FEATURE_DMA0_DESCRIPTOR_ALIGN_SIZE/FSL_FEATURE_DMA1_DESCRIPTOR_ALIGN_SIZE to support the descriptor align size not constant in the two instances.

[2.4.2]

• Bug Fixes

  • Fixed violation of the MISRA C-2012 rule 8.4.

[2.4.1]

• Bug Fixes

  • Fixed violations of the MISRA C-2012 rules 5.7, 8.3.

[2.4.0]

• Improvements

  • Added new APIs DMA_LoadChannelDescriptor/DMA_ChannelIsBusy to support polling transfer case.

• Bug Fixes

  • Added address alignment check for descriptor source and destination address.

  • Added DMA_ALLOCATE_DATA_TRANSFER_BUFFER for application buffer allocation.

  • Fixed the sign-compare warning.

  • Fixed violations of the MISRA C-2012 rules 18.1, 10.4, 11.6, 10.7, 14.4, 16.3, 20.7, 10.8, 16.1, 17.7, 10.3, 3.1, 18.1.

[2.3.0]

• Bug Fixes

  • Removed DMA_HandleIRQ prototype definition from header file.

  • Added DMA_IRQHandle prototype definition in header file.

[2.2.5]

• Improvements

  • Added new API DMA_SetupChannelDescriptor to support configuring wrap descriptor.

  • Added wrap support in function DMA_SubmitChannelTransfer.

[2.2.4]

• Bug Fixes

  • Fixed the issue that macro DMA_CHANNEL_CFER used wrong parameter to calculate DSTINC.

[2.2.3]

• Bug Fixes

  • Improved DMA driver Deinit function for correct logic order.

• Improvements

  • Added API DMA_SubmitChannelTransferParameter to support creating head descriptor directly.

  • Added API DMA_SubmitChannelDescriptor to support ping pong transfer.

  • Added macro DMA_ALLOCATE_HEAD_DESCRIPTOR/DMA_ALLOCATE_LINK_DESCRIPTOR to simplify DMA descriptor allocation.

[2.2.2]

• Bug Fixes

  • Do not use software trigger when hardware trigger is enabled.

[2.2.1]

• Bug Fixes

  • Fixed Coverity issue.

[2.2.0]

• Improvements

  • Changed API DMA_SetupDMADescriptor to non-static.

  • Marked APIs below as deprecated.

    • DMA_PrepareTransfer.

    • DMA_Submit transfer.

  • Added new APIs as below:

    • DMA_SetChannelConfig.

    • DMA_PrepareChannelTransfer.

    • DMA_InstallDescriptorMemory.

    • DMA_SubmitChannelTransfer.

    • DMA_SetChannelConfigValid.

    • DMA_DoChannelSoftwareTrigger.

    • DMA_LoadChannelTransferConfig.

[2.0.1]

• Improvements

  • Added volatile for DMA descriptor member xfercfg to avoid optimization.

[2.0.0]

• Initial version.

---

FLEXCOMM

[2.0.2]

• Bug Fixes

  • Fixed typos in FLEXCOMM15_DriverIRQHandler().

  • Fixed MISRA issues.

    • Fixed rules 10.1, 10.3, 10.4, 10.7, 10.8, 11.3, 11.6, 11.8, 11.9, 13.5.

• Improvements

  • Added instance calculation in FLEXCOMM16_DriverIRQHandler() to align with Flexcomm 14 and 15.

[2.0.1]

• Improvements

  • Added more IRQHandler code in drivers to adapt new devices.

[2.0.0]

• Initial version.

---

GINT

[2.1.1]

• Improvements

  • Added support for platforms with PORT_POL and PORT_ENA registers without arrays.

[2.1.0]

• Improvements

  • Updated for platforms which only has one port.

[2.0.3]

• Bug Fixes

  • MISRA C-2012 issue fixed: rule 10.8.

[2.0.2]

• Bug Fixes

  • Fixed issue for MISRA-2012 check.

    • Fixed rule 17.7.

[2.0.1]

• Added control macro to enable/disable the RESET and CLOCK code in current driver.

[2.0.0]

• Initial version.

---

GPIO

[2.1.7]

• Improvements

  • Enhanced GPIO_PinInit to enable clock internally.

[2.1.6]

• Bug Fixes

  • Clear bit before set it within GPIO_SetPinInterruptConfig() API.

[2.1.5]

• Bug Fixes

  • Fixed violations of the MISRA C-2012 rules 3.1, 10.6, 10.7, 17.7.

[2.1.4]

• Improvements

  • Added API GPIO_PortGetInterruptStatus to retrieve interrupt status for whole port.

  • Corrected typos in header file.

[2.1.3]

• Improvements

  • Updated “GPIO_PinInit” API. If it has DIRCLR and DIRSET registers, use them at set 1 or clean 0.

[2.1.2]

• Improvements

  • Removed deprecated APIs.

[2.1.1]

• Improvements

  • API interface changes:

    • Refined naming of APIs while keeping all original APIs, marking them as deprecated. Original APIs will be removed in next release. The mainin change is updating APIs with prefix of _PinXXX() and _PorortXXX

[2.1.0]

• New Features

  • Added GPIO initialize API.

[2.0.0]

• Initial version.

---

HASHCRYPT

[2.0.0]

• Initial version.

[2.0.1]

• Supported loading AES key from unaligned address.

[2.0.2]

• Supported loading AES key from unaligned address for different compiler and core variants.

[2.0.3]

• Remove SHA512 and AES ICB algorithm definitions

[2.0.4]

• Add SHA context switch support

[2.1.0]

• Update the register name and macro to align with new header.

• Fixed the sign-compare warning in hashcrypt_load_data.

[2.1.1]

• Fix MISRA C-2012.

[2.1.2]

• Support loading AES input data from unaligned address.

[2.1.3]

• Fix MISRA C-2012.

[2.1.4]

• Fix context switch cannot work when switching from AES.

[2.1.5]

• Add data synchronization barrier inside hashcrypt_sha_ldm_stm_16_words() to prevent possible optimization issue.

[2.2.0]

• Add AES-OFB and AES-CFB mixed IP/SW modes.

[2.2.1]

• Add data synchronization barrier inside hashcrypt_sha_ldm_stm_16_words() prevent compiler from reordering memory write when -O2 or higher is used.

[2.2.2]

• Add data synchronization barrier inside hashcrypt_sha_ldm_stm_16_words() to fix optimization issue

[2.2.3]

• Added check for size in hashcrypt_aes_one_block to prevent overflowing COUNT field in MEMCTRL register, if its bigger than COUNT field do a multiple runs.

[2.2.4]

• In all HASHCRYPT_AES_xx functions have been added setting CTRL_MODE bitfield to 0 after processing data, which decreases power consumption.

[2.2.5]

• Add data synchronization barrier and instruction synchronization barrier inside hashcrypt_sha_process_message_data() to fix optimization issue

[2.2.6]

• Add data synchronization barrier inside HASHCRYPT_SHA_Update() and hashcrypt_get_data() function to fix optimization issue on MDK and ARMGCC release targets

[2.2.7]

• Add data synchronization barrier inside HASHCRYPT_SHA_Update() to fix optimization issue on MCUX IDE release target

[2.2.8]

• Unify hashcrypt hashing behavior between aligned and unaligned input data

[2.2.9]

• Add handling of set ERROR bit in the STATUS register

[2.2.10]

• Fix missing error statement in hashcrypt_save_running_hash()

[2.2.11]

• Fix incorrect SHA-256 calculation for long messages with reload

[2.2.12]

• Fix hardfault issue on the Keil compiler due to unaligned memcpy() input on some optimization levels

[2.2.13]

• Added function hashcrypt_seed_prng() which loading random number into PRNG_SEED register before AES operation for SCA protection

[2.2.14]

• Modify function hashcrypt_get_data() to prevent issue with unaligned access

[2.2.15]

• Add wait on DIGEST BIT inside hashcrypt_sha_one_block() to fix issues with some optimization flags

[2.2.16]

• Add DSB instruction inside hashcrypt_sha_ldm_stm_16_words() to fix issues with some optimization flags

---

I2C

[2.3.3]

• Bug Fixes

  • Fixed violations of the MISRA C-2012 rules 10.1.

  • Fixed issue that if master only sends address without data during I2C interrupt transfer, address nack cannot be detected.

[2.3.2]

• Improvement

  • Enable or disable timeout option according to enableTimeout.

• Bug Fixes

  • Fixed timeout value calculation error.

  • Fixed bug that the interrupt transfer cannot recover from the timeout error.

[2.3.1]

• Improvement

  • Before master transfer with transactional APIs, enable master function while disable slave function and vise versa for slave transfer to avoid the one affecting the other.

• Bug Fixes

  • Fixed bug in I2C_SlaveEnable that the slave enable/disable should not affect the other register bits.

[2.3.0]

• Improvement

  • Added new return codes kStatus_I2C_EventTimeout and kStatus_I2C_SclLowTimeout, and added the check for event timeout and SCL timeout in I2C master transfer.

  • Fixed bug in slave transfer that the address match event should be invoked before not after slave transmit/receive event.

[2.2.0]

• New Features

  • Added enumeration _i2c_status_flags to include all previous master and slave status flags, and added missing status flags.

  • Modified I2C_GetStatusFlags to get all I2C flags.

  • Added API I2C_ClearStatusFlags to clear all clearable flags not just master flags.

  • Modified master transactional APIs to enable bus event timeout interrupt during transfer, to avoid glitch on bus causing transfer hangs indefinitely.

• Bug Fixes

  • Fixed bug that status flags and interrupt enable masks share the same enumerations by adding enumeration _i2c_interrupt_enable for all master and slave interrupt sources.

[2.1.0]

• Bug Fixes

  • Fixed bug that during master transfer, when master is nacked during slave probing or sending subaddress, the return status should be kStatus_I2C_Addr_Nak rather than kStatus_I2C_Nak.

• Bug Fixes

  • Fixed MISRA issues.

    • Fixed rules 10.1, 10.4, 13.5.

• New Features

  • Added macro I2C_MASTER_TRANSMIT_IGNORE_LAST_NACK, so that user can configure whether to ignore the last byte being nacked by slave during master transfer.

[2.0.8]

• Bug Fixes

  • Fixed I2C_MasterSetBaudRate issue that MSTSCLLOW and MSTSCLHIGH are incorrect when MSTTIME is odd.

[2.0.7]

• Bug Fixes

  • Two dividers, CLKDIV and MSTTIME are used to configure baudrate. According to reference manual, in order to generate 400kHz baudrate, the clock frequency after CLKDIV must be less than 2mHz. Fixed the bug that, the clock frequency after CLKDIV may be larger than 2mHz using the previous calculation method.

  • Fixed MISRA 10.1 issues.

  • Fixed wrong baudrate calculation when feature FSL_FEATURE_I2C_PREPCLKFRG_8MHZ is enabled.

[2.0.6]

• New Features

  • Added master timeout self-recovery support for feature FSL_FEATURE_I2C_TIMEOUT_RECOVERY.

• Bug Fixes

  • Eliminated IAR Pa082 warning.

  • Fixed MISRA issues.

    • Fixed rules 10.1, 10.3, 10.4, 10.7, 10.8, 11.3, 11.6, 11.8, 11.9, 13.5.

[2.0.5]

• Bug Fixes

  • Fixed wrong assignment for datasize in I2C_InitTransferStateMachineDMA.

  • Fixed wrong working flow in I2C_RunTransferStateMachineDMA to ensure master can work in no start flag and no stop flag mode.

  • Fixed wrong working flow in I2C_RunTransferStateMachine and added kReceiveDataBeginState in _i2c_transfer_states to ensure master can work in no start flag and no stop flag mode.

  • Fixed wrong handle state in I2C_MasterTransferDMAHandleIRQ. After all the data has been transfered or nak is returned, handle state should be changed to idle.

• Improvements

  • Rounded up the calculated divider value in I2C_MasterSetBaudRate.

[2.0.4]

• Improvements

  • Updated the I2C_WATI_TIMEOUT macro to unified name I2C_RETRY_TIMES

  • Updated the “I2C_MasterSetBaudRate” API to support baudrate configuration for feature QN9090.

• Bug Fixes

  • Fixed build warnning caused by uninitialized variable.

  • Fixed COVERITY issue of unchecked return value in I2C_RTOS_Transfer.

[2.0.3]

• Improvements

  • Unified the component full name to FLEXCOMM I2C(DMA/FREERTOS) driver.

[2.0.2]

• Improvements

  • In slave IRQ:

    1. Changed slave receive process to first set the I2C_SLVCTL_SLVCONTINUE_MASK to acknowledge the received data, then do data receive.

    2. Improved slave transmit process to set the I2C_SLVCTL_SLVCONTINUE_MASK immediately after writing the data.

[2.0.1]

• Improvements

  • Added I2C_WATI_TIMEOUT macro to allow users to specify the timeout times for waiting flags in functional API and blocking transfer API.

[2.0.0]

• Initial version.

---

INPUTMUX

[2.0.8]

• Improvements

  • Updated a feature macro usage for function INPUTMUX_EnableSignal.

[2.0.7]

• Improvements

  • Release peripheral from reset if necessary in init function.

[2.0.6]

• Bug Fixes

  • Fixed the documentation wrong in API INPUTMUX_AttachSignal.

[2.0.5]

• Bug Fixes

  • Fixed build error because some devices has no sct.

[2.0.4]

• Bug Fixes

  • Fixed violations of the MISRA C-2012 rule 10.4, 12.2 in INPUTMUX_EnableSignal() function.

[2.0.3]

• Bug Fixes

  • Fixed violations of the MISRA C-2012 rules 10.4, 10.7, 12.2.

[2.0.2]

• Bug Fixes

  • Fixed violations of the MISRA C-2012 rules 10.4, 12.2.

[2.0.1]

• Support channel mux setting in INPUTMUX_EnableSignal().

[2.0.0]

• Initial version.

---

IOCON

[2.2.0]

• Improvements

  • Removed duplicate macro defintions.

  • Renamed ‘IOCON_I2C_SLEW’ macro to ‘IOCON_I2C_MODE’ to match its companion ‘IOCON_GPIO_MODE’. The original is kept as a deprecated symbol.

[2.1.2]

• Bug Fixes

  • Fixed violations of the MISRA C-2012 rules 10.3.

[2.1.1]

• Updated left shift format with mask value instead of a constant value to automatically adapt to all platforms.

[2.1.0]

• Added a new IOCON_PinMuxSet() function with a feature IOCON_ONE_DIMENSION for LPC845MAX board.

[2.0.0]

• Initial version.

---

MAILBOX

[2.3.2]

• Improvements

  • Added support for the MCXN946 and MCXN546 series

[2.3.1]

• Improvements

  • Added support for the LPC55S66 series.

[2.3.0]

• Improvements

  • Added support for the MCXNx4x series with new value for kMAILBOX_CM33_Core0 or kMAILBOX_CM33_Core1.

[2.2.0]

• Improvements

  • Fixed missing conditional defines for the LPC5411x series.

[2.1.0]

• Improvements

  • Added support for the LPC55S69 series. cpu_id parameter can be newly assigned to kMAILBOX_CM33_Core0 or kMAILBOX_CM33_Core1.

[2.0.0]

• Initial version.

---

MRT

[2.0.4]

• Improvements

  • Don’t reset MRT when there is not system level MRT reset functions.

[2.0.3]

• Bug Fixes

  • Fixed violations of MISRA C-2012 rule 10.1 and 10.4.

  • Fixed the wrong count value assertion in MRT_StartTimer API.

[2.0.2]

• Bug Fixes

  • Fixed violations of MISRA C-2012 rule 10.4.

[2.0.1]

• Added control macro to enable/disable the RESET and CLOCK code in current driver.

[2.0.0]

• Initial version.

---

OSTIMER

[2.2.3]

• Improvements

  • Disable and clear pending interrupts before disabling the OSTIMER clock to avoid interrupts being executed when the clock is already disabled.

[2.2.2]

• Improvements

  • Support devices with different OSTIMER instance name.

[2.2.1]

• Improvements

  • Release peripheral from reset if necessary in init function.

[2.2.0]

• Improvements

  • Move the PMC operation out of the OSTIMER driver to board specific files.

  • Added low level APIs to control OSTIMER MATCH and interrupt.

[2.1.2]

• Bug Fixes

  • Fixed MISRA-2012 rule 10.8.

[2.1.1]

• Bug Fixes

  • removes the suffix ‘n’ for some register names and bit fields’ names

• Improvements

  • Added HW CODE GRAY feature supported by CODE GRAY in SYSCTRL register group.

[2.1.0]

• Bug Fixes

  • Added a workaround to fix the issue that no interrupt was reported when user set smaller period.

  • Fixed violation of MISRA C-2012 rule 10.3 and 11.9.

• Improvements

  • Added return value for the two APIs to set match value.

    • OSTIMER_SetMatchRawValue

    • OSTIMER_SetMatchValue

[2.0.3]

• Bug Fixes

  • Fixed violation of MISRA C-2012 rule 10.3, 14.4, 17.7.

[2.0.2]

• Improvements

  • Added support for OSTIMER0

[2.0.1]

• Improvements

  • Removed the software reset function out of the initialization API.

  • Enabled interrupt directly instead of enabling deep sleep interrupt. Users need to enable the deep sleep interrupt in application code if needed.

[2.0.0]

• Initial version.

---

PINT

[2.1.13]

• Improvements

  • Added instance array for PINT to adapt more devices.

  • Used release reset instead of reset PINT which may clear other related registers out of PINT.

[2.1.12]

• Bug Fixes

  • Fixed coverity issue.

[2.1.11]

• Bug Fixes

  • Fixed MISRA C-2012 rule 10.7 violation.

[2.1.10]

• New Features

  • Added the driver support for MCXN10 platform with combined interrupt handler.

[2.1.9]

• Bug Fixes

  • Fixed MISRA-2012 rule 8.4.

[2.1.8]

• Bug Fixes

  • Fixed MISRA-2012 rule 10.1 rule 10.4 rule 10.8 rule 18.1 rule 20.9.

[2.1.7]

• Improvements

  • Added fully support for the SECPINT, making it can be used just like PINT.

[2.1.6]

• Bug Fixes

  • Fixed the bug of not enabling common pint clock when enabling security pint clock.

[2.1.5]

• Bug Fixes

  • Fixed issue for MISRA-2012 check.

    • Fixed rule 10.1 rule 10.3 rule 10.4 rule 10.8 rule 14.4.

  • Changed interrupt init order to make pin interrupt configuration more reasonable.

[2.1.4]

• Improvements

  • Added feature to control distinguish PINT/SECPINT relevant interrupt/clock configurations for PINT_Init and PINT_Deinit API.

  • Swapped the order of clearing PIN interrupt status flag and clearing pending NVIC interrupt in PINT_EnableCallback and PINT_EnableCallbackByIndex function.

  • Bug Fixes

    • Fixed build issue caused by incorrect macro definitions.

[2.1.3]

• Bug fix:

  • Updated PINT_PinInterruptClrStatus to clear PINT interrupt status when the bit is asserted and check whether was triggered by edge-sensitive mode.

  • Write 1 to IST corresponding bit will clear interrupt status only in edge-sensitive mode and will switch the active level for this pin in level-sensitive mode.

  • Fixed MISRA c-2012 rule 10.1, rule 10.6, rule 10.7.

  • Added FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS to distinguish IRQ relevant array definitions for SECPINT/PINT on lpc55s69 board.

  • Fixed PINT driver c++ build error and remove index offset operation.

[2.1.2]

• Improvement:

  • Improved way of initialization for SECPINT/PINT in PINT_Init API.

[2.1.1]

• Improvement:

  • Enabled secure pint interrupt and add secure interrupt handle.

[2.1.0]

• Added PINT_EnableCallbackByIndex/PINT_DisableCallbackByIndex APIs to enable/disable callback by index.

[2.0.2]

• Added control macro to enable/disable the RESET and CLOCK code in current driver.

[2.0.1]

• Bug fix:

  • Updated PINT driver to clear interrupt only in Edge sensitive.

[2.0.0]

• Initial version.

---

PLU

[2.2.1]

• Bug Fixes

  • Fixed MISRA C-2012 rule 10.3 and rule 17.7.

[2.2.0]

• Bug Fixes

  • Fixed wrong parameter of the PLU_EnableWakeIntRequest function.

[2.1.0]

• New Features

  • Added 4 new APIs to support Niobe4’s wake-up/interrupt control feature, including PLU_GetDefaultWakeIntConfig() PLU_EnableWakeIntRequest(), PLU_LatchInterrupt() and PLU_ClearLatchedInterrupt().

• Other Changes

  • Changed the register name LUT_INP to LUT_INP_MUX due to register map update.

[2.0.1]

• New Features

  • Added control macro to enable/disable the RESET and CLOCK code in current driver.

[2.0.0]

• Initial version.

---

PUF

[2.1.6]

• Changed wait time in PUF_Init(), when initialization fails it will try PUF_Powercycle() with shorter time. If this shorter time will also fail, initialization will be tried with worst case time as before.

[2.1.5]

• Use common SDK delay in puf_wait_usec().

[2.1.4]

• Replace register uint32_t ticksCount with volatile uint32_t ticksCount in puf_wait_usec() to prevent optimization out delay loop.

[2.1.3]

• Fix MISRA C-2012 issue.

[2.1.2]

• Update: Add automatic big to little endian swap for user (pre-shared) keys destinated to secret hardware bus (PUF key index 0).

[2.1.1]

• Fix ARMGCC build warning .

[2.1.0]

• Align driver with PUF SRAM controller registers on LPCXpresso55s16.

• Update initizalition logic .

[2.0.3]

• Fix MISRA C-2012 issue.

[2.0.2]

• New feature:

  • Add PUF configuration structure and support for PUF SRAM controller.

• Improvements:

  • Remove magic constants.

[2.0.1]

• Bug Fixes:

  • Fixed puf_wait_usec function optimization issue.

[2.0.0]

• Initial version.

---

RESET

[2.0.1]

• Improvements

  • Add RESET_ReleasePeripheralReset API.

[2.0.0]

• Initial version.

---

RTC

[2.2.0]

• New Features

  • Created new APIs for the RTC driver.

    • RTC_EnableSubsecCounter

    • RTC_GetSubsecValue

[2.1.3]

• Bug Fixes

  • Fixed issue that RTC_GetWakeupCount may return wrong value.

[2.1.2]

• Bug Fixes

  • MISRA C-2012 issue fixed: rule 10.1, 10.4 and 10.7.

[2.1.1]

• Bug Fixes

  • MISRA C-2012 issue fixed: rule 10.3 and 11.9.

[2.1.0]

• Bug Fixes

  • Created new APIs for the RTC driver.

    • RTC_EnableTimer

    • RTC_EnableWakeUpTimerInterruptFromDPD

    • RTC_EnableAlarmTimerInterruptFromDPD

    • RTC_EnableWakeupTimer

    • RTC_GetEnabledWakeupTimer

    • RTC_SetSecondsTimerMatch

    • RTC_GetSecondsTimerMatch

    • RTC_SetSecondsTimerCount

    • RTC_GetSecondsTimerCount

  • deprecated legacy APIs for the RTC driver.

    • RTC_StartTimer

    • RTC_StopTimer

    • RTC_EnableInterrupts

    • RTC_DisableInterrupts

    • RTC_GetEnabledInterrupts

[2.0.0]

• Initial version.

---

SCTIMER

[2.5.1]

• Bug Fixes

  • Fixed bug in SCTIMER_SetupCaptureAction: When kSCTIMER_Counter_H is selected, events 12-15 and capture registers 12-15 CAPn_H field can’t be used.

[2.5.0]

• Improvements

  • Add SCTIMER_GetCaptureValue API to get capture value in capture registers.

[2.4.9]

• Improvements

  • Supported platforms which don’t have system level SCTIMER reset.

[2.4.8]

• Bug Fixes

  • Fixed the issue that the SCTIMER_UpdatePwmDutycycle() can’t writes MATCH_H bit and RELOADn_H.

[2.4.7]

• Bug Fixes

  • Fixed the issue that the SCTIMER_UpdatePwmDutycycle() can’t configure 100% duty cycle PWM.

[2.4.6]

• Bug Fixes

  • Fixed the issue where the H register was not written as a word along with the L register.

  • Fixed the issue that the SCTIMER_SetCOUNTValue() is not configured with high 16 bits in unify mode.

[2.4.5]

• Bug Fixes

  • Fix SCT_EV_STATE_STATEMSKn macro build error.

[2.4.4]

• Bug Fixes

  • Fix MISRA C-2012 issue 10.8.

[2.4.3]

• Bug Fixes

  • Fixed the wrong way of writing CAPCTRL and REGMODE registers in SCTIMER_SetupCaptureAction.

[2.4.2]

• Bug Fixes

  • Fixed SCTIMER_SetupPwm 100% duty cycle issue.

[2.4.1]

• Bug Fixes

  • Fixed the issue that MATCHn_H bit and RELOADn_H bit could not be written.

[2.4.0]

[2.3.0]

• Bug Fixes

  • Fixed the potential overflow issue of pulseperiod variable in SCTIMER_SetupPwm/SCTIMER_UpdatePwmDutycycle API.

  • Fixed the issue of SCTIMER_CreateAndScheduleEvent API does not correctly work with 32 bit unified counter.

  • Fixed the issue of position of clear counter operation in SCTIMER_Init API.

• Improvements

  • Update SCTIMER_SetupPwm/SCTIMER_UpdatePwmDutycycle to support generate 0% and 100% PWM signal.

  • Add SCTIMER_SetupEventActiveDirection API to configure event activity direction.

  • Update SCTIMER_StartTimer/SCTIMER_StopTimer API to support start/stop low counter and high counter at the same time.

  • Add SCTIMER_SetCounterState/SCTIMER_GetCounterState API to write/read counter current state value.

  • Update APIs to make it meaningful.

    • SCTIMER_SetEventInState

    • SCTIMER_ClearEventInState

    • SCTIMER_GetEventInState

[2.2.0]

• Improvements

  • Updated for 16-bit register access.

[2.1.3]

• Bug Fixes

  • Fixed the issue of uninitialized variables in SCTIMER_SetupPwm.

  • Fixed the issue that the Low 16-bit and high 16-bit work independently in SCTIMER driver.

• Improvements

  • Added an enumerable macro of unify counter for user.

    • kSCTIMER_Counter_U

  • Created new APIs for the RTC driver.

    • SCTIMER_SetupStateLdMethodAction

    • SCTIMER_SetupNextStateActionwithLdMethod

    • SCTIMER_SetCOUNTValue

    • SCTIMER_GetCOUNTValue

    • SCTIMER_SetEventInState

    • SCTIMER_ClearEventInState

    • SCTIMER_GetEventInState

  • Deprecated legacy APIs for the RTC driver.

    • SCTIMER_SetupNextStateAction

[2.1.2]

• Bug Fixes

  • MISRA C-2012 issue fixed: rule 10.3, 10.4, 10.6, 10.7, 11.9, 14.2 and 15.5.

[2.1.1]

• Improvements

  • Updated the register and macro names to align with the header of devices.

[2.1.0]

• Bug Fixes

  • Fixed issue where SCT application level Interrupt handler function is occupied by SCT driver.

  • Fixed issue where wrong value for INSYNC field inside SCTIMER_Init function.

  • Fixed issue to change Default value for INSYNC field inside SCTIMER_GetDefaultConfig.

[2.0.1]

• New Features

  • Added control macro to enable/disable the RESET and CLOCK code in current driver.

[2.0.0]

• Initial version.

---

SPI

[2.3.2]

• Bug Fixes

  • Fixed the txData from void * to const void * in transmit API

[2.3.1]

• Improvements

  • Changed SPI_DUMMYDATA to 0x00.

[2.3.0]

• Update version.

[2.2.2]

• Bug Fixes

  • Fixed violations of the MISRA C-2012 rules.

[2.2.1]

• Bug Fixes

  • Fixed MISRA 2012 10.4 issue.

  • Added code to clear FIFOs before transfer using DMA.

[2.2.0]

• Bug Fixes

  • Fixed bug that slave gets stuck during interrupt transfer.

[2.1.1]

• Improvements

  • Added timeout mechanism when waiting certain states in transfer driver.

• Bug Fixes

  • Fixed MISRA 10.1, 5.7 issues.

[2.1.0]

• Bug Fixes

  • Fixed Coverity issue of incrementing null pointer in SPI_TransferHandleIRQInternal.

  • Eliminated IAR Pa082 warnings.

  • Fixed MISRA issues.

    • Fixed rules 10.1, 10.3, 10.4, 10.7, 10.8, 11.3, 11.6, 11.8, 11.9, 13.5.

• New Features

  • Modified the definition of SPI_SSELPOL_MASK to support the socs that have only 3 SSEL pins.

[2.0.4]

• Bug Fixes

  • Fixed the bug of using read only mode in DMA transfer. In DMA transfer mode, if transfer->txData is NULL, code attempts to read data from the address of 0x0 for configuring the last frame.

  • Fixed wrong assignment of handle->state. During transfer handle->state should be kSPI_Busy rather than kStatus_SPI_Busy.

• Improvements

  • Rounded up the calculated divider value in SPI_MasterSetBaud.

[2.0.3]

• Improvements

  • Added “SPI_FIFO_DEPTH(base)” with more definition.

[2.0.2]

• Improvements

  • Unified the component full name to FLEXCOMM SPI(DMA/FREERTOS) driver.

[2.0.1]

• Changed the data buffer from uint32_t to uint8_t which matches the real applications for SPI DMA driver.

• Added dummy data setup API to allow users to configure the dummy data to be transferred.

• Added new APIs for half-duplex transfer function. Users can not only send and receive data by one API in polling/interrupt/DMA way, but choose either to transmit first or to receive first. Besides, the PCS pin can be configured as assert status in transmission (between transmit and receive) by setting the isPcsAssertInTransfer to true.

[2.0.0]

• Initial version.

---

SPI_DMA

[2.2.1]

• Bug Fixes

  • Fixed MISRA 2012 11.6 issue..

[2.2.0]

• Improvements

  • Supported dataSize larger than 1024 data transmit.

---

SPI Flash Interface

[2.0.3]

• Bug Fixes

• MISRA C-2012 issue fixed: rule 10.3, 10.4, and 14.4.

[2.0.2]

• Bug Fixes

  • Fixed the command function set issue. After the command being set, there will be no wait for the CMD flag, as it may have been cleared by CS deassert.

[2.0.1]

• New Features

  • Added an API to read/write 1/2 Bytes data from/to SPIFI. This interface is useful for flash command, which only needs 1/2 Bytes data. The previous driver needed users to make sure of the minimum length being 4, which might cause issues in some flash commands.

[2.0.0]

• Initial version.

---

TRNG

[2.0.18]

• Bug fix:

  • TRNG health checks now done in software on RT5xx and RT6xx.

[2.0.17]

• New features:

  • Add support for RT700.

[2.0.16]

• Improvements:

  • Added support for Dual oscillator mode.

[2.0.15]

• Other changes:

  • Changed TRNG_USER_CONFIG_DEFAULT_XXX values according to latest reccomended by design team.

[2.0.14]

• New features:

  • Add support for RW610 and RW612.

[2.0.13]

• Bug fix:

  • After deepsleep it might return error, added clearing bits in TRNG_GetRandomData() and generating new entropy.

  • Modified reloading entropy in TRNG_GetRandomData(), for some data length it doesn’t reloading entropy correctly.

[2.0.12]

• Bug fix:

  • For KW34A4_SERIES, KW35A4_SERIES, KW36A4_SERIES set TRNG_USER_CONFIG_DEFAULT_OSC_DIV to kTRNG_RingOscDiv8.

[2.0.11]

• Bug fix:

  • Add clearing pending errors in TRNG_Init().

[2.0.10]

• Bug Fix:

  • Fixed doxygen issues.

[2.0.9]

• Bug Fix:

  • Fix HIS_CCM metrics issues.

[2.0.8]

• Bug fix:

  • For K32L2A41A_SERIES set TRNG_USER_CONFIG_DEFAULT_OSC_DIV to kTRNG_RingOscDiv4.

[2.0.7]

• Bug fix:

  • Fix MISRA 2004 issue rule 12.5.

[2.0.6]

• Bug fix:

  • For KW35Z4_SERIES set TRNG_USER_CONFIG_DEFAULT_OSC_DIV to kTRNG_RingOscDiv8.

[2.0.5]

• Improvements:

  • For FRQMIN, FRQMAX and OSCDIV, add possibility to use device specific preprocessor macro to define default value in TRNG user configuration structure.

[2.0.4]

• Bug Fix:

  • Fix MISRA-2012 issues.

    • Rule 10.1, rule 10.3, rule 13.5, rule 16.1.

[2.0.3]

• Improvements:

  • update TRNG_Init to restart new entropy generation.

[2.0.2]

• Improvements:

  • fix MISRA issues

    • Rule 14.4.

[2.0.1]

• New features:

  • Set default OSCDIV for Kinetis devices KL8x and KL28Z.

• Other changes:

  • Changed default OSCDIV for K81 to divide by 2.

[2.0.0]

• Initial version.

---

USART

[2.8.5]

• Bug Fixes

  • Fixed race condition during call of USART_EnableTxDMA and USART_EnableRxDMA.

[2.8.4]

• Bug Fixes

  • Fixed exclusive access in USART_TransferReceiveNonBlocking and USART_TransferSendNonBlocking.

[2.8.3]

• Bug Fixes

  • Fixed violations of the MISRA C-2012 rules 10.3, 11.8.

[2.8.2]

• Bug Fixes

  • Fixed violations of the MISRA C-2012 rules 14.2.

[2.8.1]

• Bug Fixes

  • Fixed the Baud Rate Generator(BRG) configuration in 32kHz mode.

[2.8.0]

• New Features

  • Added the rx timeout interrupts and status flags of bus status.

  • Added new rx timeout configuration item in usart_config_t.

  • Added API USART_SetRxTimeoutConfig for rx timeout configuration.

• Improvements

  • When the calculated baudrate cannot meet user’s configuration, lower OSR value is allewed to use.

[2.7.0]

• New Features

  • Added the missing interrupts and status flags of bus status.

  • Added the check of tx error, noise error framing error and parity error in interrupt handler.

[2.6.0]

• Improvements

  • Used separate data for TX and RX in usart_transfer_t.

• Bug Fixes

  • Fixed bug that when ring buffer is used, if some data is received in ring buffer first before calling USART_TransferReceiveNonBlocking, the received data count returned by USART_TransferGetReceiveCount is wrong.

• New Features

  • Added missing API USART_TransferGetSendCountDMA get send count using DMA.

[2.5.0]

• New Features

  • Added APIs USART_GetRxFifoCount/USART_GetTxFifoCount to get rx/tx FIFO data count.

  • Added APIs USART_SetRxFifoWatermark/USART_SetTxFifoWatermark to set rx/tx FIFO water mark.

• Bug Fixes

  • Fixed DMA transfer blocking issue by enabling tx idle interrupt after DMA transmission finishes.

[2.4.0]

• New Features

  • Modified usart_config_t, USART_Init and USART_GetDefaultConfig APIs so that the hardware flow control can be enabled during module initialization.

• Bug Fixes

  • Fixed MISRA 10.4 violation.

[2.3.1]

• Bug Fixes

  • Fixed bug that operation on INTENSET, INTENCLR, FIFOINTENSET and FIFOINTENCLR should use bitwise operation not ‘or’ operation.

  • Fixed bug that if rx interrupt occurrs before TX interrupt is enabled and after txDataSize is configured, the data will be sent early by mistake, thus TX interrupt will be enabled after data is sent out.

• Improvements

  • Added check for baud rate’s accuracy that returns kStatus_USART_BaudrateNotSupport when the best achieved baud rate is not within 3% error of configured baud rate.

[2.3.0]

• New Features

  • Added APIs to configure 9-bit data mode, set slave address and send address.

  • Modified USART_TransferReceiveNonBlocking and USART_TransferHandleIRQ to use 9-bit mode in multi-slave system.

[2.2.0]

• New Features

  • Added the feature of supporting USART working at 32 kHz clocking mode.

• Improvements

  • Modified USART_TransferHandleIRQ so that txState will be set to idle only when all data has been sent out to bus.

  • Modified USART_TransferGetSendCount so that this API returns the real byte count that USART has sent out rather than the software buffer status.

  • Added timeout mechanism when waiting for certain states in transfer driver.

• Bug Fixes

  • Fixed MISRA 10.1 issues.

  • Fixed bug that operation on INTENSET, INTENCLR, FIFOINTENSET and FIFOINTENCLR should use bitwise operation not ‘or’ operation.

  • Fixed bug that if rx interrupt occurrs before TX interrupt is enabled and after txDataSize is configured, the data will be sent early by mistake, thus TX interrupt will be enabled after data is sent out.

[2.1.1]

• Improvements

  • Added check for transmitter idle in USART_TransferHandleIRQ and USART_TransferSendDMACallback to ensure all the data would be sent out to bus.

  • Modified USART_ReadBlocking so that if more than one receiver errors occur, all status flags will be cleared and the most severe error status will be returned.

• Bug Fixes

  • Eliminated IAR Pa082 warnings.

  • Fixed MISRA issues.

    • Fixed rules 10.1, 10.3, 10.4, 10.7, 10.8, 11.3, 11.6, 11.8, 11.9, 13.5.

[2.1.0]

• New Features

  • Added features to allow users to configure the USART to synchronous transfer(master and slave) mode.

• Bug Fixes

  • Modified USART_SetBaudRate to get more acurate configuration.

[2.0.3]

• New Features

  • Added new APIs to allow users to enable the CTS which determines whether CTS is used for flow control.

[2.0.2]

• Bug Fixes

  • Fixed the bug where transfer abort APIs could not disable the interrupts. The FIFOINTENSET register should not be used to disable the interrupts, so use the FIFOINTENCLR register instead.

[2.0.1]

• Improvements

  • Unified the component full name to FLEXCOMM USART (DMA/FREERTOS) driver.

[2.0.0]

• Initial version.

---

USART_DMA

[2.6.0]

• Refer USART driver change log 2.0.1 to 2.6.0

---

UTICK

[2.0.5]

• Improvements

  • Improved for SOC RW610.

[2.0.4]

• Bug Fixes

  • Fixed compile fail issue of no-supporting PD configuration in utick driver.

[2.0.3]

• Bug Fixes

  • Fixed violations of MISRA C-2012 rules: 8.4, 14.4, 17.7

[2.0.2]

• Added new feature definition macro to enable/disable power control in drivers for some devices have no power control function.

[2.0.1]

• Added control macro to enable/disable the CLOCK code in current driver.

[2.0.0]

• Initial version.

---

WWDT

[2.1.9]

• Bug Fixes

  • Fixed violation of the MISRA C-2012 rule 10.4.

[2.1.8]

• Improvements

  • Updated the “WWDT_Init” API to add wait operation. Which can avoid the TV value read by CPU still be 0xFF (reset value) after WWDT_Init function returns.

[2.1.7]

• Bug Fixes

  • Fixed the issue that the watchdog reset event affected the system from PMC.

  • Fixed the issue of setting watchdog WDPROTECT field without considering the backwards compatibility.

  • Fixed the issue of clearing bit fields by mistake in the function of WWDT_ClearStatusFlags.

[2.1.5]

• Bug Fixes

  • deprecated a unusable API in WWWDT driver.

    • WWDT_Disable

[2.1.4]

• Bug Fixes

  • Fixed violation of the MISRA C-2012 rules Rule 10.1, 10.3, 10.4 and 11.9.

  • Fixed the issue of the inseparable process interrupted by other interrupt source.

    • WWDT_Init

[2.1.3]

• Bug Fixes

  • Fixed legacy issue when initializing the MOD register.

[2.1.2]

• Improvements

  • Updated the “WWDT_ClearStatusFlags” API and “WWDT_GetStatusFlags” API to match QN9090. WDTOF is not set in case of WD reset. Get info from PMC instead.

[2.1.1]

• New Features

  • Added new feature definition macro for devices which have no LCOK control bit in MOD register.

  • Implemented delay/retry in WWDT driver.

[2.1.0]

• Improvements

  • Added new parameter in configuration when initializing WWDT module. This parameter, which must be set, allows the user to deliver the WWDT clock frequency.

[2.0.0]

• Initial version.

---