MCUXpresso SDK Changelog
CNS_ACOMP
[2.0.1]
Bug Fixes
Fixed violations of the MISRA C-2012 rules.
[2.0.0]
Initial version.
CNS_ADC
[2.2.0]
Improvements
Updated cns adc trigger sources.
Migrated cns adc trigger sources enumeration from cns_adc.h to device.h
Reserved single-end mode channel 15, differential mode channel 5, and channel 15.
[2.1.0]
Bug Fixes
Fixed temperature measurement error, and provided ‘enableChop’ member to control the ADC chop.
[2.0.2]
Bug Fixes
Fixed ADC scan channel misconfiguration issue.
Fixed violation of MISRA C-2012 rule 10.1 and rule 10.4.
Improvements
Added new member “enableInputBufferChop” into “adc_config_t” to enable/disable input buffer chopper.
[2.0.1]
Bug Fixes
Fixed MISRA-2012 rules.
Rule 14.2, rule 10.3.
[2.0.0]
Initial version.
CACHE64
[2.0.9]
Improvements
Removed assert(false) in CACHE64_GetInstanceByAddr.
[2.0.8]
Improvements
Updated function CACHE64_GetInstanceByAddr() to support some devices that provide alias of cacheable memory section.
[2.0.7]
Improvements
Check input parameter “size_byte” must be larger than 0.
[2.0.6]
Bug Fixes
Fixed overflow for CACHE64_GetInstanceByAddr()/CACHE64_CleanCacheByRange()/CACHE64_InvalidateCacheByRange() APIs.
[2.0.5]
Improvement
Made use of FSL_FEATURE_CACHE64_CTRL_HAS_NO_WRITE_BUF feature
[2.0.4]
Improvement
Disable cache policy feature on SoC without CACHE64_POLSEL IP.
Bug Fixes
Fixed doxygen issue.
[2.0.3]
Bug Fixes
Fixed violations of the MISRA C-2012 Rule 10.3.
[2.0.2]
Bug Fixes
Fixed violations of the MISRA C-2012 Rule 10.1, 10.3, 10.4 and 14.4.
Fixed doxygen issue.
[2.0.1]
Improvements
Moved CLCR register configuration out of the while loop, it’s unnecessary to repeat this operation.
[2.0.0]
Initial version.
CDOG
[2.1.3]
Re-design multiple instance IRQs and Clocks
Add fix for RESTART command errata
[2.1.2]
Support multiple IRQs
Fix default CONTROL values
[2.1.1]
Remove bit CONTROL[CONTROL_CTRL].
[2.1.0]
Rename CWT to CDOG.
[2.0.2]
Fix MISRA-2012 issues.
[2.0.1]
Fix doxygen issues.
[2.0.0]
Initial version.
CLOCK
[2.3.0]
Added CLOCK_GetFreq() API
Removed DTRNG flag wait in clock API to avoid unconditional delay. DTRNG will be reloaded in crypto init function.
[2.2.0]
Added els_gdet clock source enumeration
Fixed kMAIN_CLK_to_DMIC_CLK value
[2.1.4]
Added noinline attribute to CLOCK_Delay() to work around compiler optimization issue
[2.1.3]
Added delay for DTRNG busy flag before disabling T3 256M
[2.1.2]
Renamed kCLOCK_Css/kCLOCK_CssApb to kCLOCK_Els/kCLOCK_ElsApb
[2.1.1]
Added ANA_GRP XTL power control in USB PHY API
[2.1.0]
Added USIM_CLOCKS macro
Added CLOCK_DisableUsbhsPhyClock API
[2.0.1]
Moved g_clkinFreq and g_mclkinFreq inside extern “C”
[2.0.0]
initial version.
COMMON
[2.5.0]
New Features
Added new APIs InitCriticalSectionMeasurementContext, DisableGlobalIRQEx and EnableGlobalIRQEx so that user can measure the execution time of the protected sections.
[2.4.3]
Improvements
Enable irqs that mount under irqsteer interrupt extender.
[2.4.2]
Improvements
Add the macros to convert peripheral address to secure address or non-secure address.
[2.4.1]
Improvements
Improve for the macro redefinition error when integrated with zephyr.
[2.4.0]
New Features
Added EnableIRQWithPriority, IRQ_SetPriority, and IRQ_ClearPendingIRQ for ARM.
Added MSDK_EnableCpuCycleCounter, MSDK_GetCpuCycleCount for ARM.
[2.3.3]
New Features
Added NETC into status group.
[2.3.2]
Improvements
Make driver aarch64 compatible
[2.3.1]
Bug Fixes
Fixed MAKE_VERSION overflow on 16-bit platforms.
[2.3.0]
Improvements
Split the driver to common part and CPU architecture related part.
[2.2.10]
Bug Fixes
Fixed the ATOMIC macros build error in cpp files.
[2.2.9]
Bug Fixes
Fixed MISRA C-2012 issue, 5.6, 5.8, 8.4, 8.5, 8.6, 10.1, 10.4, 17.7, 21.3.
Fixed SDK_Malloc issue that not allocate memory with required size.
[2.2.8]
Improvements
Included stddef.h header file for MDK tool chain.
New Features:
Added atomic modification macros.
[2.2.7]
Other Change
Added MECC status group definition.
[2.2.6]
Other Change
Added more status group definition.
Bug Fixes
Undef __VECTOR_TABLE to avoid duplicate definition in cmsis_clang.h
[2.2.5]
Bug Fixes
Fixed MISRA C-2012 rule-15.5.
[2.2.4]
Bug Fixes
Fixed MISRA C-2012 rule-10.4.
[2.2.3]
New Features
Provided better accuracy of SDK_DelayAtLeastUs with DWT, use macro SDK_DELAY_USE_DWT to enable this feature.
Modified the Cortex-M7 delay count divisor based on latest tests on RT series boards, this setting lets result be closer to actual delay time.
[2.2.2]
New Features
Added include RTE_Components.h for CMSIS pack RTE.
[2.2.1]
Bug Fixes
Fixed violation of MISRA C-2012 Rule 3.1, 10.1, 10.3, 10.4, 11.6, 11.9.
[2.2.0]
New Features
Moved SDK_DelayAtLeastUs function from clock driver to common driver.
[2.1.4]
New Features
Added OTFAD into status group.
[2.1.3]
Bug Fixes
MISRA C-2012 issue fixed.
Fixed the rule: rule-10.3.
[2.1.2]
Improvements
Add SUPPRESS_FALL_THROUGH_WARNING() macro for the usage of suppressing fallthrough warning.
[2.1.1]
Bug Fixes
Deleted and optimized repeated macro.
[2.1.0]
New Features
Added IRQ operation for XCC toolchain.
Added group IDs for newly supported drivers.
[2.0.2]
Bug Fixes
MISRA C-2012 issue fixed.
Fixed the rule: rule-10.4.
[2.0.1]
Improvements
Removed the implementation of LPC8XX Enable/DisableDeepSleepIRQ() function.
Added new feature macro switch “FSL_FEATURE_HAS_NO_NONCACHEABLE_SECTION” for specific SoCs which have no noncacheable sections, that helps avoid an unnecessary complex in link file and the startup file.
Updated the align(x) to attribute(aligned(x)) to support MDK v6 armclang compiler.
[2.0.0]
Initial version.
CRC
[2.1.1]
Fix MISRA issue.
[2.1.0]
Add CRC_WriteSeed function.
[2.0.2]
Fix MISRA issue.
[2.0.1]
Fixed KPSDK-13362. MDK compiler issue when writing to WR_DATA with -O3 optimize for time.
[2.0.0]
Initial version.
CTIMER
[2.3.3]
Bug Fixes
Fix CERT INT30-C INT31-C issue.
Make API CTIMER_SetupPwm and CTIMER_UpdatePwmDutycycle return fail if pulse width register overflow.
[2.3.2]
Bug Fixes
Clear unexpected DMA request generated by RESET_PeripheralReset in API CTIMER_Init to avoid trigger DMA by mistake.
[2.3.1]
Bug Fixes
MISRA C-2012 issue fixed: rule 10.7 and 12.2.
[2.3.0]
Improvements
Added the CTIMER_SetPrescale(), CTIMER_GetCaptureValue(), CTIMER_EnableResetMatchChannel(), CTIMER_EnableStopMatchChannel(), CTIMER_EnableRisingEdgeCapture(), CTIMER_EnableFallingEdgeCapture(), CTIMER_SetShadowValue(),APIs Interface to reduce code complexity.
[2.2.2]
Bug Fixes
Fixed SetupPwm() API only can use match 3 as period channel issue.
[2.2.1]
Bug Fixes
Fixed use specified channel to setting the PWM period in SetupPwmPeriod() API.
Fixed Coverity Out-of-bounds issue.
[2.2.0]
Improvements
Updated three API Interface to support Users to flexibly configure the PWM period and PWM output.
Bug Fixes
MISRA C-2012 issue fixed: rule 8.4.
[2.1.0]
Improvements
Added the CTIMER_GetOutputMatchStatus() API Interface.
Added feature macro for FSL_FEATURE_CTIMER_HAS_NO_CCR_CAP2 and FSL_FEATURE_CTIMER_HAS_NO_IR_CR2INT.
[2.0.3]
Bug Fixes
MISRA C-2012 issue fixed: rule 10.3, 10.4, 10.6, 10.7 and 11.9.
[2.0.2]
New Features
Added new API “CTIMER_GetTimerCountValue” to get the current timer count value.
Added a control macro to enable/disable the RESET and CLOCK code in current driver.
Added a new feature macro to update the API of CTimer driver for lpc8n04.
[2.0.1]
Improvements
API Interface Change
Changed API interface by adding CTIMER_SetupPwmPeriod API and CTIMER_UpdatePwmPulsePeriod API, which both can set up the right PWM with high resolution.
[2.0.0]
Initial version.
CNS_DAC
[2.1.0]
Improvements
Updated cns dac trigger sources.
Migrated cns dac trigger sources enumeration from cns_dac.h to device.h
[2.0.1]
Bug Fixes
Fixed violations of the MISRA C-2012 rules.
[2.0.0]
Initial version.
LPC_DMA
[2.5.3]
Improvements
Add assert in DMA_SetChannelXferConfig to prevent XFERCOUNT value overflow.
[2.5.2]
Bug Fixes
Use separate “SET” and “CLR” registers to modify shared registers for all channels, in case of thread-safe issue.
[2.5.1]
Bug Fixes
Fixed violation of the MISRA C-2012 rule 11.6.
[2.5.0]
Improvements
Added a new api DMA_SetChannelXferConfig to set DMA xfer config.
[2.4.4]
Bug Fixes
Fixed the issue that DMA_IRQHandle might generate redundant callbacks.
Fixed the issue that DMA driver cannot support channel bigger then 32.
Fixed violation of the MISRA C-2012 rule 13.5.
[2.4.3]
Improvements
Added features FSL_FEATURE_DMA_DESCRIPTOR_ALIGN_SIZEn/FSL_FEATURE_DMA0_DESCRIPTOR_ALIGN_SIZE/FSL_FEATURE_DMA1_DESCRIPTOR_ALIGN_SIZE to support the descriptor align size not constant in the two instances.
[2.4.2]
Bug Fixes
Fixed violation of the MISRA C-2012 rule 8.4.
[2.4.1]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 5.7, 8.3.
[2.4.0]
Improvements
Added new APIs DMA_LoadChannelDescriptor/DMA_ChannelIsBusy to support polling transfer case.
Bug Fixes
Added address alignment check for descriptor source and destination address.
Added DMA_ALLOCATE_DATA_TRANSFER_BUFFER for application buffer allocation.
Fixed the sign-compare warning.
Fixed violations of the MISRA C-2012 rules 18.1, 10.4, 11.6, 10.7, 14.4, 16.3, 20.7, 10.8, 16.1, 17.7, 10.3, 3.1, 18.1.
[2.3.0]
Bug Fixes
Removed DMA_HandleIRQ prototype definition from header file.
Added DMA_IRQHandle prototype definition in header file.
[2.2.5]
Improvements
Added new API DMA_SetupChannelDescriptor to support configuring wrap descriptor.
Added wrap support in function DMA_SubmitChannelTransfer.
[2.2.4]
Bug Fixes
Fixed the issue that macro DMA_CHANNEL_CFER used wrong parameter to calculate DSTINC.
[2.2.3]
Bug Fixes
Improved DMA driver Deinit function for correct logic order.
Improvements
Added API DMA_SubmitChannelTransferParameter to support creating head descriptor directly.
Added API DMA_SubmitChannelDescriptor to support ping pong transfer.
Added macro DMA_ALLOCATE_HEAD_DESCRIPTOR/DMA_ALLOCATE_LINK_DESCRIPTOR to simplify DMA descriptor allocation.
[2.2.2]
Bug Fixes
Do not use software trigger when hardware trigger is enabled.
[2.2.1]
Bug Fixes
Fixed Coverity issue.
[2.2.0]
Improvements
Changed API DMA_SetupDMADescriptor to non-static.
Marked APIs below as deprecated.
DMA_PrepareTransfer.
DMA_Submit transfer.
Added new APIs as below:
DMA_SetChannelConfig.
DMA_PrepareChannelTransfer.
DMA_InstallDescriptorMemory.
DMA_SubmitChannelTransfer.
DMA_SetChannelConfigValid.
DMA_DoChannelSoftwareTrigger.
DMA_LoadChannelTransferConfig.
[2.0.1]
Improvements
Added volatile for DMA descriptor member xfercfg to avoid optimization.
[2.0.0]
Initial version.
DMIC
[2.3.2]
New Features
Supported 4 channels in driver.
[2.3.1]
Bug Fixes
Fixed the issue that DMIC_EnableChannelDma and DMIC_EnableChannelFifo did not clean relevant bits.
[2.3.0]
Improvements
Added new apis DMIC_ResetChannelDecimator/DMIC_EnableChannelGlobalSync/DMIC_DisableChannelGlobalSync.
[2.2.1]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 14.4, 17.7, 10.4, 10.3, 10.8, 14.3.
[2.2.0]
Bug Fixes
Corrected the usage of feature FSL_FEATURE_DMIC_IO_HAS_NO_BYPASS.
[2.1.1]
Improvements
Added feature FSL_FEATURE_DMIC_HAS_NO_IOCFG for IOCFG register.
[2.1.0]
New Features
Added API DMIC_EnbleChannelInterrupt/DMIC_EnbleChannelDma to replace API DMIC_SetOperationMode.
Added API DMIC_SetIOCFG and marked DMIC_ConfigIO as deprecated.
Added API DMIC_EnableChannelSignExtend to support sign extend feature.
[2.0.5]
Improvements
Changed some parameters’ value of DMIC_FifoChannel API, such as enable, resetn, and trig_level. This is not possible for the current code logic, so it improves the DMIC_FifoChannel logic and fixes incorrect math logic.
[2.0.4]
Bug Fixes
Fixed the issue that DMIC DMA driver(ver2.0.3) did not support calling DMIC_TransferReceiveDMA in DMA callback as it did before version 2.0.3. But calling DMIC_TransferReceiveDMA in callback is not recommended.
[2.0.3]
New Features
Supported linked transfer in DMIC DMA driver.
Added new API DMIC_EnableChannelFifo/DMIC_DoFifoReset/DMIC_InstallDMADescriptor.
[2.0.2]
New Features
Supported more channels in driver.
[2.0.1]
New Features
Added a control macro to enable/disable the RESET and CLOCK code in current driver.
[2.0.0]
Initial version.
DMIC_DMA
[2.4.0]
Bug Fixes
Fixed the issue that DMIC_TransferAbortReceiveDMA can not disable dmic and dma request issue.
[2.3.1]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 10.3.
[2.3.0]
Refer DMIC driver change log 2.0.1 to 2.3.0
ENET
[2.9.2]
Bug Fixes
RGMII mode is (temporarily) disabled before selecting between 10/100-Mbit/s and 1000-Mbit/s modes of operation. The bit RGMII_EN of RCR register must not be set while changing ECR register’s speed bit, otherwise there is a possibility of ENET IP ending in an incorrect state.
[2.9.1]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 8.4, 10.4.
[2.9.0]
Bug Fixes
Enabled collection of transfer statistics, so the function ENET_GetStatistics does not always return zeroes.
New Features
Added new function ENET_EnableStatistics to enable/disable collection of transfer statistics.
Added new function ENET_ResetStatistics to reset transfer statistics.
Improvements
Renamed the function ENET_ResetHareware to ENET_ResetHardware.
[2.8.0]
New Features
Added the function to reset hardware on certain devices.
[2.7.1]
Bug Fixes
Fixed the issue that free wrong buffer address when one frame stores in multiple buffers and memory pool is not enough to allocate these buffers to receive one complete frame.
[2.7.0]
Improvements
Deleted deprecated zero copy Tx/Rx functions and set callback function which can be configured in ENET_Init.
Moved the Rx zero copy buffer allocation to Rx BD initialization function to reduce unnecessary looping code.
Bug Fixes
Fixed the issue that predefined Rx buffers which should not be used when enabling Rx zero copy are still be handled by cache operation, it causes hardfault on some platforms.
Fixed the issue that zero-copy Rx function doesn’t check Rx length of 0 in the BD with EMPTY bit is 0, it may occur in the corner case reported by customer. Not sure how it turns out, consider it as an ENET IP issue and drop this abnormal BD.
[2.6.3]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 11.6.
[2.6.2]
Improvements
Changed ENET1_MAC0_Rx_Tx_Done0_DriverIRQHandler/ENET1_MAC0_Rx_Tx_Done1_DriverIRQHandler to ENET1_MAC0_Rx_Tx_Done1_DriverIRQHandler/ENET1_MAC0_Rx_Tx_Done2_DriverIRQHandler which represent ring 1 and ring 2.
[2.6.1]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 10.3, 10.4, 10.7, 11.6, 11.8.
[2.6.0]
Improvements
Added MDIO access wrapper APIs for ease of use.
Fixed the build warning introduced by 64-bit compatibility patch.
[2.5.4]
Improvements
Made the driver compatible with 64-bit platforms.
[2.5.3]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 11.6.
[2.5.2]
Improvements
Updated the TXIC/RXIC register handling code according to the new header file.
[2.5.1]
Bug Fixes
Fixed document typo.
[2.5.0]
Bug Fixes
Fixed the SendFrame/SendFrameZeroCopy functions issue with scattered buffers.
Updated the formula of MDC calculation.
Used a feature macro to distinguish the old IP design from the new design, because old IP design always reads a value zero from ATCR->CAPTURE bit. For old IP, driver caculates and wait the necessary delay cycles after setting ATCR->CAPTURE then gets the timestamp value.
New Features
Added new zero copy Tx/Rx function.
New zero copy Tx function combines scattered and contiguous Tx buffer in one API, it also supports more Tx featrues which buffer descriptor supports but previous Tx function doesn’t support.
New zero copy Rx function use dynamic buffer mechanism and simpler interface.
Improvements
Corrected the interrupt handler for PTP timestamp IRQ and PTP1588 event IRQ since platform difference.
Added missing IRQ handlers for PTP1588 events on some platforms.
Corrected the max Tx frame length verification, it will not depend on a fixed macro. The ENET_FRAME_MAX_FRAMELEN is only an default value for driver, application can configure it. Driver caculates the limitation with the max frame length in register which may takes extended 4 or 8 bytes VLAN tag if VLAN/SVLAN enables.
Deleted deprecated Clause 45 read/write legacy APIs.
[2.4.3]
Improvements
Aligned the IRQ handler name with header file.
[2.4.2]
Bug Fixes
Fixed the MISRA issue of speculative out-of-bounds access.
[2.4.1]
Bug Fixes
Fixed the PTP time capture issue.
[2.4.0]
Improvements
Exposed API ENET_ReclaimTxDescriptor for user application to relaim tx descriptors in their application.
Added counter to record multicast hash conflict in struct _enet_handle, improved the situation that one multicast group could be left by other conflict multicast address left operation.
Improved concurrent usage of relaim and send frame operation.
[2.3.4]
Bug Fixes
Fixed the issue that interrupt handler only checks the interrupt event flag but not checks interrupt mask flag.
[2.3.3]
Bug Fixes
Fixed the issue that some compilers may choose the memcpy with 4-bit aligned address limitation due to the type of address pointer is ‘unsigned int *’, the data address doesn’t have to be 4-bit aligned.
[2.3.2]
New Features
Added the feature that ENET driver can be used in the platform which integrates both 10/100M and 1G ENET IP.
Deleted duplicated code about ARM errata 838869 in first/second level IRQ handler.
[2.3.1]
Improvements
Added function pointer checking in IRQ handler to make sure code can be used even it runs into the interrupt when the second level interupt handler is NULL.
[2.3.0]
Bug Fixes
Fixed the issue that clause 45 MDIO read/write API doesn’t check the transmission over status between two transmissions.
Fixed violations of the MISRA C-2012 rules 2.2,10.3,10.4,10.7,11.6,11.8,13.5,14.4,15.7,17.7.
New Features
Added APIs to support send/receive frame with Zero-Copy.
Improvements
Separated the clock configuration from module configuration when init and deinit.
Added functions to set second level interrupt handler.
Provided new function to get 1588 timer count without disabling interrupt.
Improved timestamp controlling, deleted all old timestamp management APIs and data structures.
Merged the single/multiple ring(s) APIs, now these APIs can handle both.
Used base and index to control buffer descriptor, aligned with qos and lpc enet driver.
[2.2.6]
Bug Fixes
Updated MII speed formula referring to the manual.
[2.2.5]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 10.1, 10.3, 10.4, 10.6, 10.7, 11.6, 11.9, 13.5, 14.4, 16.4, 17.7, 21.15, 3.1, 8.4.
Changed to use ARRAY_SIZE(s_enetBases) as the array size for s_ENETHandle, fixed the hardfault issue for using some ENET instance when ARRAY_SIZE(s_enetBases) is not same as FSL_FEATURE_SOC_ENET_COUNT.
[2.2.4]
Improvements
Added call to Data Synchronization Barrier instruction before activating Tx/Rx buffer descriptor to ensure previous data update is completed.
Improved ENET_TransmitIRQHandler to store timestamps for multiple transmit buffer descriptors.
Bug Fixes
Fixed the issue that ENET_Ptp1588GetTimer did not handle the timer wrap situation.
[2.2.3]
Improvements
Improved data buffer cache maintenance in the ENET driver.
[2.2.2]
New Features
Added APIs for extended multi-ring support.
Added the AVB configure API for extended AVB feature support.
[2.2.1]
Improvements
Changed the input data pointer attribute to const in ENET_SendFrame().
[2.1.1]
New Features
Added the extended MDIO IEEE802.3 Clause 45 MDIO format SMI command APIs.
Added the extended interrupt coalescing feature.
Improvements
Combined all storage operations in the ENET_Init to ENET_SetHandler API.
[2.0.1]
Bug Fixes
Used direct transmit busy check when doing data transmit.
Miscellaneous Changes
Updated IRQ handler work flow.
Changed the TX/RX interrupt macro from kENET_RxByteInterrupt to kENET_RxBufferInterrupt, from kENET_TxByteInterrupt to kENET_TxBufferInterrupt.
Deleted unnecessary parameters in ENET handler.
[2.0.0]
Initial version.
FLEXCOMM
[2.0.2]
Bug Fixes
Fixed typos in FLEXCOMM15_DriverIRQHandler().
Fixed MISRA issues.
Fixed rules 10.1, 10.3, 10.4, 10.7, 10.8, 11.3, 11.6, 11.8, 11.9, 13.5.
Improvements
Added instance calculation in FLEXCOMM16_DriverIRQHandler() to align with Flexcomm 14 and 15.
[2.0.1]
Improvements
Added more IRQHandler code in drivers to adapt new devices.
[2.0.0]
Initial version.
FLEXSPI
[2.6.3]
Bug Fixes
Fixed an issue which cause IPCR1[IPAREN] cleared by mistake.
[2.6.2]
Bug Fixes
Wait Bus IDLE before operation of FLEXSPI_SoftwareReset(), FLEXSPI_TransferBlocking() and FLEXSPI_TransferNonBlocking().
[2.6.1]
Bug Fixes
Updated code of reset peripheral.
Updated FLEXSPI_UpdateLUT() to check if input lut address is not in Flexspi AMBA region.
Updated FLEXSPI_Init() to check if input AHB buffer size exceeded maximum AHB size.
[2.6.0]
New Features
Added new API to set AHB memory-mapped flash base address.
Added support of DLLxCR[REFPHASEGAP] bit field, it is recommended to set it as 0x2 if DLL calibration is enabled.
[2.5.1]
Bugfixes
Fixed handling of W1C bits in the INTR register
Removed FIFO resets from FLEXSPI_CheckAndClearError
FLEXSPI_TransferBlocking is observing IPCMDDONE and then fetches the final status of the transfer
Fixed issue that FLEXSPI2_DriverIRQHandler not defined.
[2.5.0]
Improvements
Supported word un-aligned access for write/read blocking/non-blocking API functions.
Fixed dead loop issue in DLL update function when using FRO clock source.
Fixed violations of the MISRA C-2012 Rule 10.3.
[2.4.0]
Improvements
Isolated IP command parallel mode and AHB command parallel mode using feature MACRO.
Supported new column address shift feature for external memory.
[2.3.5]
Bug Fixes
Fixed violations of the MISRA C-2012 Rule 14.2.
[2.3.4]
Bug Fixes
Updated flexspi_config_t structure and FlexSPI_Init to support new feature FSL_FEATURE_FLEXSPI_HAS_NO_MCR0_CONBINATION.
[2.3.3]
Bug Fixes
Removed feature FSL_FEATURE_FLEXSPI_DQS_DELAY_PS for DLL delay setting. Changed to use feature FSL_FEATURE_FLEXSPI_DQS_DELAY_MIN to set slave delay target as 0 for DLL enable and clock frequency higher than 100MHz.
[2.3.2]
Bug Fixes
Fixed violations of the MISRA C-2012 Rule 8.4, 8.5, 10.1, 10.3, 10.4, 11.6 and 14.4.
[2.3.1]
Bug Fixes
Wait for bus to be idle before using it as access to external flash with new setting in FLEXSPI_SetFlashConfig() API.
Fixed the potential buffer overread and Tx FIFO overwrite issue in FLEXSPI_WriteBlocking.
[2.3.0]
New Features
Added new API FLEXSPI_UpdateDllValue for users to update DLL value after updating flexspi root clock.
Corrected grammatical issues for comments.
Added support for new feature FSL_FEATURE_FLEXSPI_DQS_DELAY_PS in DLL configuration.
[2.2.2]
Bug Fixes
Fixed violations of the MISRA C-2012 Rule 10.1, 10.3 and 10.4.
Updated _flexspi_command from named enumerator into anonymous enumerator.
[2.2.1]
Bug Fixes
Fixed violations of the MISRA C-2012 Rule 10.1, 10.3, 10.4, 10.8, 11.9, 14.4, 15.7, 16.4, 17.7, 7.3.
Fixed IAR build warning Pe167.
Fixed the potential buffer overwrite and Rx FIFO overread issue in FLEXSPI_ReadBlocking.
[2.2.0]
Bug Fixes
Fixed flag name typos: kFLEXSPI_IpTxFifoWatermarkEmpltyFlag to kFLEXSPI_IpTxFifoWatermarkEmptyFlag; kFLEXSPI_IpCommandExcutionDoneFlag to kFLEXSPI_IpCommandExecutionDoneFlag.
Fixed comments typos such as sequencen->sequence, levle->level.
Fixed FLSHCR2[ARDSEQID] field clean issue.
Updated flexspi_config_t structure and FlexSPI_Init to support new feature FSL_FEATURE_FLEXSPI_HAS_NO_MCR0_ATDFEN and FSL_FEATURE_FLEXSPI_HAS_NO_MCR0_ARDFEN.
Updated flexspi_flags_t structure to support new feature FSL_FEATURE_FLEXSPI_HAS_INTEN_AHBBUSERROREN.
[2.1.1]
Improvements
Defaulted enable prefetch for AHB RX buffer configuration in FLEXSPI_GetDefaultConfig, which is align with the reset value in AHBRXBUFxCR0.
Added software workaround for ERR011377 in FLEXSPI_SetFlashConfig; added some delay after DLL lock status set to ensure correct data read/write.
[2.1.0]
New Features
Added new API FLEXSPI_UpdateRxSampleClock for users to update read sample clock source after initialization.
Added reset peripheral operation in FLEXSPI_Init if required.
[2.0.5]
Bug Fixes
Fixed FLEXSPI_UpdateLUT cannot do partial update issue.
[2.0.4]
Bug Fixes
Reset flash size to zero for all ports in FLEXSPI_Init; fixed the possible out-of-range flash access with no error reported.
[2.0.3]
Bug Fixes
Fixed AHB receive buffer size configuration issue. The FLEXSPI_AHBRXBUFCR0_BUFSZ field should configure 64 bits size, and currently the AHB receive buffer size is in bytes which means 8-bit, so the correct configuration should be config->ahbConfig.buffer[i].bufferSize / 8.
[2.0.2]
New Features
Supported DQS write mask enable/disable feature during set FLEXSPI configuration.
Provided new API FLEXSPI_TransferUpdateSizeEDMA for users to update eDMA transfer size(SSIZE/DSIZE) per DMA transfer.
Bug Fixes
Fixed invalid operation of FLEXSPI_Init to enable AHB bus Read Access to IP RX FIFO.
Fixed incorrect operation of FLEXSPI_Init to configure IP TX FIFO watermark.
[2.0.1]
Bug Fixes
Fixed the flag clear issue and AHB read Command index configuration issue in FLEXSPI_SetFlashConfig.
Updated FLEXSPI_UpdateLUT function to update LUT table from any index instead of previous command index.
Added bus idle wait in FLEXSPI_SetFlashConfig and FLEXSPI_UpdateLUT to ensure bus is idle before any change to FlexSPI controller.
Updated interrupt API FLEXSPI_TransferNonBlocking and interrupt handle flow FLEXSPI_TransferHandleIRQ.
Updated eDMA API FLEXSPI_TransferEDMA.
[2.0.0]
Initial version.
FLEXSPI DMA Driver
[2.2.1]
Bug Fixes
Fixed violations of the MISRA C-2012 Rule 10.1, 10.3, 10.4, 10.8.
[2.2.0]
Bug Fixes
Fixed violations of the MISRA C-2012 Rule 10.1, 10.3.
New Features
Updated name of FLEXSPI_TransferGetTransferCountDMA API.
[2.1.1]
New Features
Updated driver to support feature FSL_FEATURE_FLEXSPI_DMA_MULTIPLE_DES.
[2.1.0]
Bug Fixes
Updated enumaration flexspi_dma_transfer_nsize_t and remove the unsupported items.
New Features
Updated driver for deprecating the multiple linked descriptors inside FLEXSPI_TransferDMA, only up to one linked descriptor is needed according to hardware update.
[2.0.0]
Initial version.
FMEAS
[2.1.1]
Bug Fixes
MISRA C-2012 issues fixed: rule 10.4, rule 10.8.
[2.1.0]
Updated “FMEAS_GetFrequency”,”FMEAS_StartMeasure”,”FMEAS_IsMeasureComplete” API and add definition to match ASYNC_SYSCON.
[2.0.0]
Initial version ported from LPCOpen.
GDMA
[2.0.3]
Bug Fixes
Fixed MISRA C-2012 violation.
[2.0.2]
Improvements
Changed to use FSL_FEATURE_GDMA_CHANNEL_NUM defined by feature header.
[2.0.1]
Bug Fixes
Fixed MISRA C-2012 violation.
[2.0.0]
Initial version.
GPIO
[2.1.7]
Improvements
Enhanced GPIO_PinInit to enable clock internally.
[2.1.6]
Bug Fixes
Clear bit before set it within GPIO_SetPinInterruptConfig() API.
[2.1.5]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 3.1, 10.6, 10.7, 17.7.
[2.1.4]
Improvements
Added API GPIO_PortGetInterruptStatus to retrieve interrupt status for whole port.
Corrected typos in header file.
[2.1.3]
Improvements
Updated “GPIO_PinInit” API. If it has DIRCLR and DIRSET registers, use them at set 1 or clean 0.
[2.1.2]
Improvements
Removed deprecated APIs.
[2.1.1]
Improvements
API interface changes:
Refined naming of APIs while keeping all original APIs, marking them as deprecated. Original APIs will be removed in next release. The mainin change is updating APIs with prefix of _PinXXX() and _PorortXXX
[2.1.0]
New Features
Added GPIO initialize API.
[2.0.0]
Initial version.
I2C
[2.3.3]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 10.1.
Fixed issue that if master only sends address without data during I2C interrupt transfer, address nack cannot be detected.
[2.3.2]
Improvement
Enable or disable timeout option according to enableTimeout.
Bug Fixes
Fixed timeout value calculation error.
Fixed bug that the interrupt transfer cannot recover from the timeout error.
[2.3.1]
Improvement
Before master transfer with transactional APIs, enable master function while disable slave function and vise versa for slave transfer to avoid the one affecting the other.
Bug Fixes
Fixed bug in I2C_SlaveEnable that the slave enable/disable should not affect the other register bits.
[2.3.0]
Improvement
Added new return codes kStatus_I2C_EventTimeout and kStatus_I2C_SclLowTimeout, and added the check for event timeout and SCL timeout in I2C master transfer.
Fixed bug in slave transfer that the address match event should be invoked before not after slave transmit/receive event.
[2.2.0]
New Features
Added enumeration _i2c_status_flags to include all previous master and slave status flags, and added missing status flags.
Modified I2C_GetStatusFlags to get all I2C flags.
Added API I2C_ClearStatusFlags to clear all clearable flags not just master flags.
Modified master transactional APIs to enable bus event timeout interrupt during transfer, to avoid glitch on bus causing transfer hangs indefinitely.
Bug Fixes
Fixed bug that status flags and interrupt enable masks share the same enumerations by adding enumeration _i2c_interrupt_enable for all master and slave interrupt sources.
[2.1.0]
Bug Fixes
Fixed bug that during master transfer, when master is nacked during slave probing or sending subaddress, the return status should be kStatus_I2C_Addr_Nak rather than kStatus_I2C_Nak.
Bug Fixes
Fixed MISRA issues.
Fixed rules 10.1, 10.4, 13.5.
New Features
Added macro I2C_MASTER_TRANSMIT_IGNORE_LAST_NACK, so that user can configure whether to ignore the last byte being nacked by slave during master transfer.
[2.0.8]
Bug Fixes
Fixed I2C_MasterSetBaudRate issue that MSTSCLLOW and MSTSCLHIGH are incorrect when MSTTIME is odd.
[2.0.7]
Bug Fixes
Two dividers, CLKDIV and MSTTIME are used to configure baudrate. According to reference manual, in order to generate 400kHz baudrate, the clock frequency after CLKDIV must be less than 2mHz. Fixed the bug that, the clock frequency after CLKDIV may be larger than 2mHz using the previous calculation method.
Fixed MISRA 10.1 issues.
Fixed wrong baudrate calculation when feature FSL_FEATURE_I2C_PREPCLKFRG_8MHZ is enabled.
[2.0.6]
New Features
Added master timeout self-recovery support for feature FSL_FEATURE_I2C_TIMEOUT_RECOVERY.
Bug Fixes
Eliminated IAR Pa082 warning.
Fixed MISRA issues.
Fixed rules 10.1, 10.3, 10.4, 10.7, 10.8, 11.3, 11.6, 11.8, 11.9, 13.5.
[2.0.5]
Bug Fixes
Fixed wrong assignment for datasize in I2C_InitTransferStateMachineDMA.
Fixed wrong working flow in I2C_RunTransferStateMachineDMA to ensure master can work in no start flag and no stop flag mode.
Fixed wrong working flow in I2C_RunTransferStateMachine and added kReceiveDataBeginState in _i2c_transfer_states to ensure master can work in no start flag and no stop flag mode.
Fixed wrong handle state in I2C_MasterTransferDMAHandleIRQ. After all the data has been transfered or nak is returned, handle state should be changed to idle.
Improvements
Rounded up the calculated divider value in I2C_MasterSetBaudRate.
[2.0.4]
Improvements
Updated the I2C_WATI_TIMEOUT macro to unified name I2C_RETRY_TIMES
Updated the “I2C_MasterSetBaudRate” API to support baudrate configuration for feature QN9090.
Bug Fixes
Fixed build warnning caused by uninitialized variable.
Fixed COVERITY issue of unchecked return value in I2C_RTOS_Transfer.
[2.0.3]
Improvements
Unified the component full name to FLEXCOMM I2C(DMA/FREERTOS) driver.
[2.0.2]
Improvements
In slave IRQ:
Changed slave receive process to first set the I2C_SLVCTL_SLVCONTINUE_MASK to acknowledge the received data, then do data receive.
Improved slave transmit process to set the I2C_SLVCTL_SLVCONTINUE_MASK immediately after writing the data.
[2.0.1]
Improvements
Added I2C_WATI_TIMEOUT macro to allow users to specify the timeout times for waiting flags in functional API and blocking transfer API.
[2.0.0]
Initial version.
I2S
[2.3.2]
Bug Fixes
Fixed warning for comparison between pointer and integer.
[2.3.1]
Bug Fixes
Updated the value of TX/RX software transfer state machine after transfer contents are submitted to avoid race condition.
[2.3.0]
Improvements
Added api I2S_InstallDMADescriptorMemory/I2S_TransferSendLoopDMA/I2S_TransferReceiveLoopDMA to support loop transfer.
Added api I2S_EmptyTxFifo to support blocking flush tx fifo.
Updated api I2S_TransferAbortDMA by removed the blocking flush tx fifo from this function.
Bug Fixes
Removed the while loop in abort transfer function to fix the dead loop issue under specific user case.
[2.2.2]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 8.4.
[2.2.1]
Improvements
Added feature FSL_FEATURE_FLEXCOMM_INSTANCE_I2S_SUPPORT_SECONDARY_CHANNELn for the SOC has parts of instance support secondary channel.
Bug Fixes
Added volatile statement for the state variable of i2s_handle and enable the mainline channel pair before enable interrupt to avoid the issue of code excution reordering which may cause the interrupt generated unexpectedly.
[2.2.0]
Improvements
Added 8/16/24 bits mono data format transfer support in I2S driver.
Added new apis I2S_SetBitClockRate.
Bug Fixes
Fixed the PA082 build warning.
Fixed the sign-compare warning.
Fixed violations of the MISRA C-2012 rules 10.4, 10.8, 11.9, 10.1, 11.3, 13.5, 11.8, 10.3, 10.7.
Fixed the Operand don’t affect result Coverity issue.
[2.1.0]
Improvements
Added a feature for the FLEXCOMM which supports I2S and has interconnection with DMIC.
Used a feature to control PDMDATA instead of I2S_CFG1_PDMDATA.
Added member bytesPerFrame in i2s_dma_handle_t, used for DMA transfer width configure, instead of using sizeof(uint32_t) hardcode.
Used the macro provided by DMA driver to define the I2S DMA descriptor.
Bug Fixes
Fixed the issue that I2S DMA driver always generated duplicate callback.
[2.0.3]
New Features
Added a feature to remove configuration for the second channel on LPC51U68.
[2.0.2]
New Features
Added ENABLE_IRQ handle after register I2S interrupt handle.
[2.0.1]
Improvements
Unified the component full name to FLEXCOMM I2S (DMA) driver.
[2.0.0]
Initial version.
I2S_BRIDGE
[2.0.0]
initial version
I2S_DMA
[2.3.3]
Bug Fixes
Fixed data size limit does not match the macro DMA_MAX_TRANSFER_BYTES issue.
[2.3.2]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 10.3.
[2.3.1]
Refer I2S driver change log 2.0.1 to 2.3.1
IMU
[2.1.1]
Bug Fixes
Fix MISRA C-2012 violations.
Fixed IMU_GetStatusFlags bug that returns wrong RX FIFO status.
[2.1.0]
Improvements:
Updated API prototype, remove CIU2_Type from parameters.
[2.0.0]
Initial version.
INPUTMUX
[2.0.8]
Improvements
Updated a feature macro usage for function INPUTMUX_EnableSignal.
[2.0.7]
Improvements
Release peripheral from reset if necessary in init function.
[2.0.6]
Bug Fixes
Fixed the documentation wrong in API INPUTMUX_AttachSignal.
[2.0.5]
Bug Fixes
Fixed build error because some devices has no sct.
[2.0.4]
Bug Fixes
Fixed violations of the MISRA C-2012 rule 10.4, 12.2 in INPUTMUX_EnableSignal() function.
[2.0.3]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 10.4, 10.7, 12.2.
[2.0.2]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 10.4, 12.2.
[2.0.1]
Support channel mux setting in INPUTMUX_EnableSignal().
[2.0.0]
Initial version.
IO_MUX
[2.2.1]
Fixed component id.
[2.2.0]
Update io_mux signals according to data sheet.
[2.1.2]
Fixed misra issues
[2.1.1]
Added driver strength configuration
[2.1.0]
Added IO_MUX_SetPinOutLevelInSleep API
Added IO_MUX_SetRfPinOutLevelInSleep API
Added capture pulse macro IO_MUX_AON_CAPTURE
[2.0.0]
initial version.
IPED
[1.0.1]
Fixed component id.
[1.0.0]
initial version
ITRC
[2.0.0]
Initial version.
LCDIC
[2.1.0]
New Features
Add seperate APIs for send and receive data in non-blocking way.
Others
Return error status when sending or receiving data larger than 0x40000, current driver doesn’t support this.
[2.0.3]
Bug Fixes
Fixed potential issue that clock may not be send out when sending data array.
[2.0.2]
Bug Fixes
Fixed build error with MDK 5.37.
[2.0.1]
Bug Fixes
Added delay after setting LCDIC_EN to make sure LCDIC is out of reset.
[2.0.0]
Initial version.
LCDIC_DMA
[2.1.0]
New Features
Add seperate APIs for send and receive data.
Others
Return error status when sending or receiving data larger than 0x40000, current driver doesn’t support this.
[2.0.0]
Initial version.
MRT
[2.0.4]
Improvements
Don’t reset MRT when there is not system level MRT reset functions.
[2.0.3]
Bug Fixes
Fixed violations of MISRA C-2012 rule 10.1 and 10.4.
Fixed the wrong count value assertion in MRT_StartTimer API.
[2.0.2]
Bug Fixes
Fixed violations of MISRA C-2012 rule 10.4.
[2.0.1]
Added control macro to enable/disable the RESET and CLOCK code in current driver.
[2.0.0]
Initial version.
OCOTP
[2.2.2]
Fixed component id.
[2.2.1]
Removed reset on OTP init and deinit to keep OTP configuration on boot.
[2.2.0]
Added OCOTP_ReadPackage() API
Exposed OCOTP_ReadSocOtp() API
[2.1.0]
Added OCOTP_ReadSVC() API.
Avoid access OTP register before busy wait in OCOTP_OtpFuseRead()
[2.0.1]
Fixed an misra issue 10.1
[2.0.0]
initial version.
OSTIMER
[2.2.3]
Improvements
Disable and clear pending interrupts before disabling the OSTIMER clock to avoid interrupts being executed when the clock is already disabled.
[2.2.2]
Improvements
Support devices with different OSTIMER instance name.
[2.2.1]
Improvements
Release peripheral from reset if necessary in init function.
[2.2.0]
Improvements
Move the PMC operation out of the OSTIMER driver to board specific files.
Added low level APIs to control OSTIMER MATCH and interrupt.
[2.1.2]
Bug Fixes
Fixed MISRA-2012 rule 10.8.
[2.1.1]
Bug Fixes
removes the suffix ‘n’ for some register names and bit fields’ names
Improvements
Added HW CODE GRAY feature supported by CODE GRAY in SYSCTRL register group.
[2.1.0]
Bug Fixes
Added a workaround to fix the issue that no interrupt was reported when user set smaller period.
Fixed violation of MISRA C-2012 rule 10.3 and 11.9.
Improvements
Added return value for the two APIs to set match value.
OSTIMER_SetMatchRawValue
OSTIMER_SetMatchValue
[2.0.3]
Bug Fixes
Fixed violation of MISRA C-2012 rule 10.3, 14.4, 17.7.
[2.0.2]
Improvements
Added support for OSTIMER0
[2.0.1]
Improvements
Removed the software reset function out of the initialization API.
Enabled interrupt directly instead of enabling deep sleep interrupt. Users need to enable the deep sleep interrupt in application code if needed.
[2.0.0]
Initial version.
PINT
[2.1.13]
Improvements
Added instance array for PINT to adapt more devices.
Used release reset instead of reset PINT which may clear other related registers out of PINT.
[2.1.12]
Bug Fixes
Fixed coverity issue.
[2.1.11]
Bug Fixes
Fixed MISRA C-2012 rule 10.7 violation.
[2.1.10]
New Features
Added the driver support for MCXN10 platform with combined interrupt handler.
[2.1.9]
Bug Fixes
Fixed MISRA-2012 rule 8.4.
[2.1.8]
Bug Fixes
Fixed MISRA-2012 rule 10.1 rule 10.4 rule 10.8 rule 18.1 rule 20.9.
[2.1.7]
Improvements
Added fully support for the SECPINT, making it can be used just like PINT.
[2.1.6]
Bug Fixes
Fixed the bug of not enabling common pint clock when enabling security pint clock.
[2.1.5]
Bug Fixes
Fixed issue for MISRA-2012 check.
Fixed rule 10.1 rule 10.3 rule 10.4 rule 10.8 rule 14.4.
Changed interrupt init order to make pin interrupt configuration more reasonable.
[2.1.4]
Improvements
Added feature to control distinguish PINT/SECPINT relevant interrupt/clock configurations for PINT_Init and PINT_Deinit API.
Swapped the order of clearing PIN interrupt status flag and clearing pending NVIC interrupt in PINT_EnableCallback and PINT_EnableCallbackByIndex function.
Bug Fixes
Fixed build issue caused by incorrect macro definitions.
[2.1.3]
Bug fix:
Updated PINT_PinInterruptClrStatus to clear PINT interrupt status when the bit is asserted and check whether was triggered by edge-sensitive mode.
Write 1 to IST corresponding bit will clear interrupt status only in edge-sensitive mode and will switch the active level for this pin in level-sensitive mode.
Fixed MISRA c-2012 rule 10.1, rule 10.6, rule 10.7.
Added FSL_FEATURE_SECPINT_NUMBER_OF_CONNECTED_OUTPUTS to distinguish IRQ relevant array definitions for SECPINT/PINT on lpc55s69 board.
Fixed PINT driver c++ build error and remove index offset operation.
[2.1.2]
Improvement:
Improved way of initialization for SECPINT/PINT in PINT_Init API.
[2.1.1]
Improvement:
Enabled secure pint interrupt and add secure interrupt handle.
[2.1.0]
Added PINT_EnableCallbackByIndex/PINT_DisableCallbackByIndex APIs to enable/disable callback by index.
[2.0.2]
Added control macro to enable/disable the RESET and CLOCK code in current driver.
[2.0.1]
Bug fix:
Updated PINT driver to clear interrupt only in Edge sensitive.
[2.0.0]
Initial version.
POWER
[2.5.1]
Added new SVC trim equation for new samples
[2.5.0]
Added Power_InitLoadGdetCfg() API
Added bool return value for POWER_EnableGDetVSensors()
[2.4.0]
Added POWER_TrimSvc() API
Added pack parameter to POWER_InitVoltage() API
Moved POWER_DelayUs() to execute in SRAM
Added barriar around WFI
Tweaked SVC table
Fixed POWER_GetResetCause() to get correct cause
[2.3.0]
Added POWER_SetPowerSwitchCallback() API
Added POWER_InitVoltage() API
Remove PMIP_BUCK_LVL configuration from POWER_InitPowerConfig().
Fixed a potential compiling issue in Power_Delay()
[2.2.0]
Added POWER_DisableGDetVSensors() API
Added POWER_EnableGDetVSensors() API
Added GDET/VSensor setting around PM2 PM3
[2.1.1]
Renamed kPOWER_Pm2MemPuCss to kPOWER_Pm2MemPuEls
Supported PM3 wakeup on A1 device
[2.1.0]
Added PM3 wakeup support for A1 device.
Added POWER_ConfigCauInSleep() API. Remove pm3CauPd field from power_sleep_config_t structure.
Added power_init_config_t parameter in POWER_InitPowerConfig() API.
[2.0.1]
Improved power performance
Added return value for POWER_EnterPowerMode()
[2.0.0]
initial version.
POWERQUAD
[2.2.0]
New Features
Added new API PQ_Arctan2Fixed.
[2.1.1]
Bug Fixes
Remove PQ_WaitDone from PQ_ArctanFixed and PQ_ArctanhFixed because it is unnecessary.
[2.1.0]
Improvements
Fixed typo issue for biquad related function name.
Changed operator from “%” into “&” to reduce heavy cycle for biquad functions.
[2.0.5]
Improvements
Added a note in driver for FIR that powerquad has a hardware limitation, when using it for FIR increment calculation, the address of pSrc needs to be a continuous address.
[2.0.4]
Improvements
Supported the platforms which don’t have PowerQuad clock and reset control.
[2.0.3]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 8.4, 10.1, 10.3, 10.4, 10.6, and so on.
[2.0.2]
Bug Fixes
Fixed array size issue in fsl_powerquad_data.h file.
Fixed vector function pipeline issue.
[2.0.1]
Bug Fixes
Fixed build error in C++ mode.
[2.0.0]
Initial version.
RESET
[2.1.1]
Corrected XX_RSTS definitions.
Removed USDHC_RSTS.
[2.1.0]
Added RESET_ReleasePeripheralReset() API
[2.0.3]
Renamed CSS(Crypto subsystem) related macros to ELS(Edge lock security)
[2.0.2]
Added USIM_RSTS macro
[2.0.1]
Added kCSS_GDET_REF_RST_SHIFT_RSTn
[2.0.0]
initial version.
ROMAPI
[2.0.0]
initial version for A0.
RTC
[2.2.0]
New Features
Created new APIs for the RTC driver.
RTC_EnableSubsecCounter
RTC_GetSubsecValue
[2.1.3]
Bug Fixes
Fixed issue that RTC_GetWakeupCount may return wrong value.
[2.1.2]
Bug Fixes
MISRA C-2012 issue fixed: rule 10.1, 10.4 and 10.7.
[2.1.1]
Bug Fixes
MISRA C-2012 issue fixed: rule 10.3 and 11.9.
[2.1.0]
Bug Fixes
Created new APIs for the RTC driver.
RTC_EnableTimer
RTC_EnableWakeUpTimerInterruptFromDPD
RTC_EnableAlarmTimerInterruptFromDPD
RTC_EnableWakeupTimer
RTC_GetEnabledWakeupTimer
RTC_SetSecondsTimerMatch
RTC_GetSecondsTimerMatch
RTC_SetSecondsTimerCount
RTC_GetSecondsTimerCount
deprecated legacy APIs for the RTC driver.
RTC_StartTimer
RTC_StopTimer
RTC_EnableInterrupts
RTC_DisableInterrupts
RTC_GetEnabledInterrupts
[2.0.0]
Initial version.
SCTIMER
[2.5.1]
Bug Fixes
Fixed bug in SCTIMER_SetupCaptureAction: When kSCTIMER_Counter_H is selected, events 12-15 and capture registers 12-15 CAPn_H field can’t be used.
[2.5.0]
Improvements
Add SCTIMER_GetCaptureValue API to get capture value in capture registers.
[2.4.9]
Improvements
Supported platforms which don’t have system level SCTIMER reset.
[2.4.8]
Bug Fixes
Fixed the issue that the SCTIMER_UpdatePwmDutycycle() can’t writes MATCH_H bit and RELOADn_H.
[2.4.7]
Bug Fixes
Fixed the issue that the SCTIMER_UpdatePwmDutycycle() can’t configure 100% duty cycle PWM.
[2.4.6]
Bug Fixes
Fixed the issue where the H register was not written as a word along with the L register.
Fixed the issue that the SCTIMER_SetCOUNTValue() is not configured with high 16 bits in unify mode.
[2.4.5]
Bug Fixes
Fix SCT_EV_STATE_STATEMSKn macro build error.
[2.4.4]
Bug Fixes
Fix MISRA C-2012 issue 10.8.
[2.4.3]
Bug Fixes
Fixed the wrong way of writing CAPCTRL and REGMODE registers in SCTIMER_SetupCaptureAction.
[2.4.2]
Bug Fixes
Fixed SCTIMER_SetupPwm 100% duty cycle issue.
[2.4.1]
Bug Fixes
Fixed the issue that MATCHn_H bit and RELOADn_H bit could not be written.
[2.4.0]
[2.3.0]
Bug Fixes
Fixed the potential overflow issue of pulseperiod variable in SCTIMER_SetupPwm/SCTIMER_UpdatePwmDutycycle API.
Fixed the issue of SCTIMER_CreateAndScheduleEvent API does not correctly work with 32 bit unified counter.
Fixed the issue of position of clear counter operation in SCTIMER_Init API.
Improvements
Update SCTIMER_SetupPwm/SCTIMER_UpdatePwmDutycycle to support generate 0% and 100% PWM signal.
Add SCTIMER_SetupEventActiveDirection API to configure event activity direction.
Update SCTIMER_StartTimer/SCTIMER_StopTimer API to support start/stop low counter and high counter at the same time.
Add SCTIMER_SetCounterState/SCTIMER_GetCounterState API to write/read counter current state value.
Update APIs to make it meaningful.
SCTIMER_SetEventInState
SCTIMER_ClearEventInState
SCTIMER_GetEventInState
[2.2.0]
Improvements
Updated for 16-bit register access.
[2.1.3]
Bug Fixes
Fixed the issue of uninitialized variables in SCTIMER_SetupPwm.
Fixed the issue that the Low 16-bit and high 16-bit work independently in SCTIMER driver.
Improvements
Added an enumerable macro of unify counter for user.
kSCTIMER_Counter_U
Created new APIs for the RTC driver.
SCTIMER_SetupStateLdMethodAction
SCTIMER_SetupNextStateActionwithLdMethod
SCTIMER_SetCOUNTValue
SCTIMER_GetCOUNTValue
SCTIMER_SetEventInState
SCTIMER_ClearEventInState
SCTIMER_GetEventInState
Deprecated legacy APIs for the RTC driver.
SCTIMER_SetupNextStateAction
[2.1.2]
Bug Fixes
MISRA C-2012 issue fixed: rule 10.3, 10.4, 10.6, 10.7, 11.9, 14.2 and 15.5.
[2.1.1]
Improvements
Updated the register and macro names to align with the header of devices.
[2.1.0]
Bug Fixes
Fixed issue where SCT application level Interrupt handler function is occupied by SCT driver.
Fixed issue where wrong value for INSYNC field inside SCTIMER_Init function.
Fixed issue to change Default value for INSYNC field inside SCTIMER_GetDefaultConfig.
[2.0.1]
New Features
Added control macro to enable/disable the RESET and CLOCK code in current driver.
[2.0.0]
Initial version.
SDU
[1.0.0]
Initial version.
SMARTCARD
[2.3.0]
New features:
Added support for USIM
[2.2.2]
Bug fix:
Fixed MISRA C-2012 rule 10.4.
[2.2.1]
Bug fix:
Fixed IAR warnings Pa082 in smartcard_emvsim
Fixed MISRA issues
Fixed rules 10.1, 10.3, 10.4, 10.6, 10.7, 10.8, 14.4, 16.1, 16.3, 16.4, 17.7
[2.2.0]
New features:
Updated to use RX/TX FIFO
[2.1.2]
Provided time delay function which works in microseconds.
Bug fix:
Changed event to semaphore in RTOS driver (KPSDK-11634).
Added check if de-initialized variables are not null iSMARTCARD_RTOS_Deinit() (KPSDK-8788).
Changed deactivation sequence iSMARTCARD_PHY_TDA8035_Deactivate() to properly stop the clockPOSCR-35).
Fixed timing issue with VSEL0/1 signals in smartcard TDA803driver (KPSDK-10160)
[2.1.1]
New features:
Added default phy interface selection into smartcard RTOS drivers (KPSDK-9063).
Replaced smartcard_phy_ncn8025 driver by smartcard_phy_tda8035.
Bug fix:
Fixed protocol timers activation sequences in smartcard_emvsim and smartcard_phy_tda8035 drivers during emvl1 pre-certification tests (KPSDK-9170, KPSDK-9556).
[2.1.0]
Initial version.
SPI
[2.3.2]
Bug Fixes
Fixed the txData from void * to const void * in transmit API
[2.3.1]
Improvements
Changed SPI_DUMMYDATA to 0x00.
[2.3.0]
Update version.
[2.2.2]
Bug Fixes
Fixed violations of the MISRA C-2012 rules.
[2.2.1]
Bug Fixes
Fixed MISRA 2012 10.4 issue.
Added code to clear FIFOs before transfer using DMA.
[2.2.0]
Bug Fixes
Fixed bug that slave gets stuck during interrupt transfer.
[2.1.1]
Improvements
Added timeout mechanism when waiting certain states in transfer driver.
Bug Fixes
Fixed MISRA 10.1, 5.7 issues.
[2.1.0]
Bug Fixes
Fixed Coverity issue of incrementing null pointer in SPI_TransferHandleIRQInternal.
Eliminated IAR Pa082 warnings.
Fixed MISRA issues.
Fixed rules 10.1, 10.3, 10.4, 10.7, 10.8, 11.3, 11.6, 11.8, 11.9, 13.5.
New Features
Modified the definition of SPI_SSELPOL_MASK to support the socs that have only 3 SSEL pins.
[2.0.4]
Bug Fixes
Fixed the bug of using read only mode in DMA transfer. In DMA transfer mode, if transfer->txData is NULL, code attempts to read data from the address of 0x0 for configuring the last frame.
Fixed wrong assignment of handle->state. During transfer handle->state should be kSPI_Busy rather than kStatus_SPI_Busy.
Improvements
Rounded up the calculated divider value in SPI_MasterSetBaud.
[2.0.3]
Improvements
Added “SPI_FIFO_DEPTH(base)” with more definition.
[2.0.2]
Improvements
Unified the component full name to FLEXCOMM SPI(DMA/FREERTOS) driver.
[2.0.1]
Changed the data buffer from uint32_t to uint8_t which matches the real applications for SPI DMA driver.
Added dummy data setup API to allow users to configure the dummy data to be transferred.
Added new APIs for half-duplex transfer function. Users can not only send and receive data by one API in polling/interrupt/DMA way, but choose either to transmit first or to receive first. Besides, the PCS pin can be configured as assert status in transmission (between transmit and receive) by setting the isPcsAssertInTransfer to true.
[2.0.0]
Initial version.
SPI_DMA
[2.2.1]
Bug Fixes
Fixed MISRA 2012 11.6 issue..
[2.2.0]
Improvements
Supported dataSize larger than 1024 data transmit.
TRNG
[2.0.18]
Bug fix:
TRNG health checks now done in software on RT5xx and RT6xx.
[2.0.17]
New features:
Add support for RT700.
[2.0.16]
Improvements:
Added support for Dual oscillator mode.
[2.0.15]
Other changes:
Changed TRNG_USER_CONFIG_DEFAULT_XXX values according to latest reccomended by design team.
[2.0.14]
New features:
Add support for RW610 and RW612.
[2.0.13]
Bug fix:
After deepsleep it might return error, added clearing bits in TRNG_GetRandomData() and generating new entropy.
Modified reloading entropy in TRNG_GetRandomData(), for some data length it doesn’t reloading entropy correctly.
[2.0.12]
Bug fix:
For KW34A4_SERIES, KW35A4_SERIES, KW36A4_SERIES set TRNG_USER_CONFIG_DEFAULT_OSC_DIV to kTRNG_RingOscDiv8.
[2.0.11]
Bug fix:
Add clearing pending errors in TRNG_Init().
[2.0.10]
Bug Fix:
Fixed doxygen issues.
[2.0.9]
Bug Fix:
Fix HIS_CCM metrics issues.
[2.0.8]
Bug fix:
For K32L2A41A_SERIES set TRNG_USER_CONFIG_DEFAULT_OSC_DIV to kTRNG_RingOscDiv4.
[2.0.7]
Bug fix:
Fix MISRA 2004 issue rule 12.5.
[2.0.6]
Bug fix:
For KW35Z4_SERIES set TRNG_USER_CONFIG_DEFAULT_OSC_DIV to kTRNG_RingOscDiv8.
[2.0.5]
Improvements:
For FRQMIN, FRQMAX and OSCDIV, add possibility to use device specific preprocessor macro to define default value in TRNG user configuration structure.
[2.0.4]
Bug Fix:
Fix MISRA-2012 issues.
Rule 10.1, rule 10.3, rule 13.5, rule 16.1.
[2.0.3]
Improvements:
update TRNG_Init to restart new entropy generation.
[2.0.2]
Improvements:
fix MISRA issues
Rule 14.4.
[2.0.1]
New features:
Set default OSCDIV for Kinetis devices KL8x and KL28Z.
Other changes:
Changed default OSCDIV for K81 to divide by 2.
[2.0.0]
Initial version.
USART
[2.8.5]
Bug Fixes
Fixed race condition during call of USART_EnableTxDMA and USART_EnableRxDMA.
[2.8.4]
Bug Fixes
Fixed exclusive access in USART_TransferReceiveNonBlocking and USART_TransferSendNonBlocking.
[2.8.3]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 10.3, 11.8.
[2.8.2]
Bug Fixes
Fixed violations of the MISRA C-2012 rules 14.2.
[2.8.1]
Bug Fixes
Fixed the Baud Rate Generator(BRG) configuration in 32kHz mode.
[2.8.0]
New Features
Added the rx timeout interrupts and status flags of bus status.
Added new rx timeout configuration item in usart_config_t.
Added API USART_SetRxTimeoutConfig for rx timeout configuration.
Improvements
When the calculated baudrate cannot meet user’s configuration, lower OSR value is allewed to use.
[2.7.0]
New Features
Added the missing interrupts and status flags of bus status.
Added the check of tx error, noise error framing error and parity error in interrupt handler.
[2.6.0]
Improvements
Used separate data for TX and RX in usart_transfer_t.
Bug Fixes
Fixed bug that when ring buffer is used, if some data is received in ring buffer first before calling USART_TransferReceiveNonBlocking, the received data count returned by USART_TransferGetReceiveCount is wrong.
New Features
Added missing API USART_TransferGetSendCountDMA get send count using DMA.
[2.5.0]
New Features
Added APIs USART_GetRxFifoCount/USART_GetTxFifoCount to get rx/tx FIFO data count.
Added APIs USART_SetRxFifoWatermark/USART_SetTxFifoWatermark to set rx/tx FIFO water mark.
Bug Fixes
Fixed DMA transfer blocking issue by enabling tx idle interrupt after DMA transmission finishes.
[2.4.0]
New Features
Modified usart_config_t, USART_Init and USART_GetDefaultConfig APIs so that the hardware flow control can be enabled during module initialization.
Bug Fixes
Fixed MISRA 10.4 violation.
[2.3.1]
Bug Fixes
Fixed bug that operation on INTENSET, INTENCLR, FIFOINTENSET and FIFOINTENCLR should use bitwise operation not ‘or’ operation.
Fixed bug that if rx interrupt occurrs before TX interrupt is enabled and after txDataSize is configured, the data will be sent early by mistake, thus TX interrupt will be enabled after data is sent out.
Improvements
Added check for baud rate’s accuracy that returns kStatus_USART_BaudrateNotSupport when the best achieved baud rate is not within 3% error of configured baud rate.
[2.3.0]
New Features
Added APIs to configure 9-bit data mode, set slave address and send address.
Modified USART_TransferReceiveNonBlocking and USART_TransferHandleIRQ to use 9-bit mode in multi-slave system.
[2.2.0]
New Features
Added the feature of supporting USART working at 32 kHz clocking mode.
Improvements
Modified USART_TransferHandleIRQ so that txState will be set to idle only when all data has been sent out to bus.
Modified USART_TransferGetSendCount so that this API returns the real byte count that USART has sent out rather than the software buffer status.
Added timeout mechanism when waiting for certain states in transfer driver.
Bug Fixes
Fixed MISRA 10.1 issues.
Fixed bug that operation on INTENSET, INTENCLR, FIFOINTENSET and FIFOINTENCLR should use bitwise operation not ‘or’ operation.
Fixed bug that if rx interrupt occurrs before TX interrupt is enabled and after txDataSize is configured, the data will be sent early by mistake, thus TX interrupt will be enabled after data is sent out.
[2.1.1]
Improvements
Added check for transmitter idle in USART_TransferHandleIRQ and USART_TransferSendDMACallback to ensure all the data would be sent out to bus.
Modified USART_ReadBlocking so that if more than one receiver errors occur, all status flags will be cleared and the most severe error status will be returned.
Bug Fixes
Eliminated IAR Pa082 warnings.
Fixed MISRA issues.
Fixed rules 10.1, 10.3, 10.4, 10.7, 10.8, 11.3, 11.6, 11.8, 11.9, 13.5.
[2.1.0]
New Features
Added features to allow users to configure the USART to synchronous transfer(master and slave) mode.
Bug Fixes
Modified USART_SetBaudRate to get more acurate configuration.
[2.0.3]
New Features
Added new APIs to allow users to enable the CTS which determines whether CTS is used for flow control.
[2.0.2]
Bug Fixes
Fixed the bug where transfer abort APIs could not disable the interrupts. The FIFOINTENSET register should not be used to disable the interrupts, so use the FIFOINTENCLR register instead.
[2.0.1]
Improvements
Unified the component full name to FLEXCOMM USART (DMA/FREERTOS) driver.
[2.0.0]
Initial version.
USART_DMA
[2.6.0]
Refer USART driver change log 2.0.1 to 2.6.0
UTICK
[2.0.5]
Improvements
Improved for SOC RW610.
[2.0.4]
Bug Fixes
Fixed compile fail issue of no-supporting PD configuration in utick driver.
[2.0.3]
Bug Fixes
Fixed violations of MISRA C-2012 rules: 8.4, 14.4, 17.7
[2.0.2]
Added new feature definition macro to enable/disable power control in drivers for some devices have no power control function.
[2.0.1]
Added control macro to enable/disable the CLOCK code in current driver.
[2.0.0]
Initial version.
WWDT
[2.1.9]
Bug Fixes
Fixed violation of the MISRA C-2012 rule 10.4.
[2.1.8]
Improvements
Updated the “WWDT_Init” API to add wait operation. Which can avoid the TV value read by CPU still be 0xFF (reset value) after WWDT_Init function returns.
[2.1.7]
Bug Fixes
Fixed the issue that the watchdog reset event affected the system from PMC.
Fixed the issue of setting watchdog WDPROTECT field without considering the backwards compatibility.
Fixed the issue of clearing bit fields by mistake in the function of WWDT_ClearStatusFlags.
[2.1.5]
Bug Fixes
deprecated a unusable API in WWWDT driver.
WWDT_Disable
[2.1.4]
Bug Fixes
Fixed violation of the MISRA C-2012 rules Rule 10.1, 10.3, 10.4 and 11.9.
Fixed the issue of the inseparable process interrupted by other interrupt source.
WWDT_Init
[2.1.3]
Bug Fixes
Fixed legacy issue when initializing the MOD register.
[2.1.2]
Improvements
Updated the “WWDT_ClearStatusFlags” API and “WWDT_GetStatusFlags” API to match QN9090. WDTOF is not set in case of WD reset. Get info from PMC instead.
[2.1.1]
New Features
Added new feature definition macro for devices which have no LCOK control bit in MOD register.
Implemented delay/retry in WWDT driver.
[2.1.0]
Improvements
Added new parameter in configuration when initializing WWDT module. This parameter, which must be set, allows the user to deliver the WWDT clock frequency.
[2.0.0]
Initial version.