MIMX8UD5

ACMP: Analog Comparator Driver

void ACMP_Init(CMP_Type *base, const acmp_config_t *config)

Initializes the ACMP.

The default configuration can be got by calling ACMP_GetDefaultConfig().

Parameters:

base – ACMP peripheral base address.
config – Pointer to ACMP configuration structure.

void ACMP_Deinit(CMP_Type *base)

Deinitializes the ACMP.

Parameters:

base – ACMP peripheral base address.

void ACMP_GetDefaultConfig(acmp_config_t *config)

Gets the default configuration for ACMP.

This function initializes the user configuration structure to default value. The default value are:

Example:

config->enableHighSpeed = false;
config->enableInvertOutput = false;
config->useUnfilteredOutput = false;
config->enablePinOut = false;
config->enableHysteresisBothDirections = false;
config->hysteresisMode = kACMP_hysteresisMode0;

Parameters:

config – Pointer to ACMP configuration structure.

void ACMP_Enable(CMP_Type *base, bool enable)

Enables or disables the ACMP.

Parameters:

base – ACMP peripheral base address.
enable – True to enable the ACMP.

void ACMP_EnableLinkToDAC(CMP_Type *base, bool enable)

Enables the link from CMP to DAC enable.

When this bit is set, the DAC enable/disable is controlled by the bit CMP_C0[EN] instead of CMP_C1[DACEN].

Parameters:

base – ACMP peripheral base address.
enable – Enable the feature or not.

void ACMP_SetChannelConfig(CMP_Type *base, const acmp_channel_config_t *config)

Sets the channel configuration.

Note that the plus/minus mux’s setting is only valid when the positive/negative port’s input isn’t from DAC but from channel mux.

Example:

acmp_channel_config_t configStruct = {0};
configStruct.positivePortInput = kACMP_PortInputFromDAC;
configStruct.negativePortInput = kACMP_PortInputFromMux;
configStruct.minusMuxInput = 1U;
ACMP_SetChannelConfig(CMP0, &configStruct);

Parameters:

base – ACMP peripheral base address.
config – Pointer to channel configuration structure.

void ACMP_EnableDMA(CMP_Type *base, bool enable)

Enables or disables DMA.

Parameters:

base – ACMP peripheral base address.
enable – True to enable DMA.

void ACMP_EnableWindowMode(CMP_Type *base, bool enable)

Enables or disables window mode.

Parameters:

base – ACMP peripheral base address.
enable – True to enable window mode.

void ACMP_SetFilterConfig(CMP_Type *base, const acmp_filter_config_t *config)

Configures the filter.

The filter can be enabled when the filter count is bigger than 1, the filter period is greater than 0 and the sample clock is from divided bus clock or the filter is bigger than 1 and the sample clock is from external clock. Detailed usage can be got from the reference manual.

Example:

acmp_filter_config_t configStruct = {0};
configStruct.filterCount = 5U;
configStruct.filterPeriod = 200U;
configStruct.enableSample = false;
ACMP_SetFilterConfig(CMP0, &configStruct);

Parameters:

base – ACMP peripheral base address.
config – Pointer to filter configuration structure.

void ACMP_SetDACConfig(CMP_Type *base, const acmp_dac_config_t *config)

Configures the internal DAC.

Example:

acmp_dac_config_t configStruct = {0};
configStruct.referenceVoltageSource = kACMP_VrefSourceVin1;
configStruct.DACValue = 20U;
configStruct.enableOutput = false;
configStruct.workMode = kACMP_DACWorkLowSpeedMode;
ACMP_SetDACConfig(CMP0, &configStruct);

Parameters:

base – ACMP peripheral base address.
config – Pointer to DAC configuration structure. “NULL” is for disabling the feature.

void ACMP_SetRoundRobinConfig(CMP_Type *base, const acmp_round_robin_config_t *config)

Configures the round robin mode.

Example:

acmp_round_robin_config_t configStruct = {0};
configStruct.fixedPort = kACMP_FixedPlusPort;
configStruct.fixedChannelNumber = 3U;
configStruct.checkerChannelMask = 0xF7U;
configStruct.sampleClockCount = 0U;
configStruct.delayModulus = 0U;
ACMP_SetRoundRobinConfig(CMP0, &configStruct);

Parameters:

base – ACMP peripheral base address.
config – Pointer to round robin mode configuration structure. “NULL” is for disabling the feature.

void ACMP_SetRoundRobinPreState(CMP_Type *base, uint32_t mask)

Defines the pre-set state of channels in round robin mode.

Note: The pre-state has different circuit with get-round-robin-result in the SOC even though they are same bits. So get-round-robin-result can’t return the same value as the value are set by pre-state.

Parameters:

base – ACMP peripheral base address.
mask – Mask of round robin channel index. Available range is channel0:0x01 to channel7:0x80.

static inline uint32_t ACMP_GetRoundRobinStatusFlags(CMP_Type *base)

Gets the channel input changed flags in round robin mode.

Parameters:

base – ACMP peripheral base address.

Returns:

Mask of channel input changed asserted flags. Available range is channel0:0x01 to channel7:0x80.

void ACMP_ClearRoundRobinStatusFlags(CMP_Type *base, uint32_t mask)

Clears the channel input changed flags in round robin mode.

Parameters:

base – ACMP peripheral base address.
mask – Mask of channel index. Available range is channel0:0x01 to channel7:0x80.

static inline uint32_t ACMP_GetRoundRobinResult(CMP_Type *base)

Gets the round robin result.

Note that the set-pre-state has different circuit with get-round-robin-result in the SOC even though they are same bits. So ACMP_GetRoundRobinResult() can’t return the same value as the value are set by ACMP_SetRoundRobinPreState.

Parameters:

base – ACMP peripheral base address.

Returns:

Mask of round robin channel result. Available range is channel0:0x01 to channel7:0x80.

void ACMP_EnableInterrupts(CMP_Type *base, uint32_t mask)

Enables interrupts.

Parameters:

base – ACMP peripheral base address.
mask – Interrupts mask. See “_acmp_interrupt_enable”.

void ACMP_DisableInterrupts(CMP_Type *base, uint32_t mask)

Disables interrupts.

Parameters:

base – ACMP peripheral base address.
mask – Interrupts mask. See “_acmp_interrupt_enable”.

uint32_t ACMP_GetStatusFlags(CMP_Type *base)

Gets status flags.

Parameters:

base – ACMP peripheral base address.

Returns:

Status flags asserted mask. See “_acmp_status_flags”.

void ACMP_ClearStatusFlags(CMP_Type *base, uint32_t mask)

Clears status flags.

Parameters:

base – ACMP peripheral base address.
mask – Status flags mask. See “_acmp_status_flags”.

void ACMP_SetDiscreteModeConfig(CMP_Type *base, const acmp_discrete_mode_config_t *config)

Configure the discrete mode.

Configure the discrete mode when supporting 3V domain with 1.8V core.

Parameters:

base – ACMP peripheral base address.
config – Pointer to configuration structure. See “acmp_discrete_mode_config_t”.

void ACMP_GetDefaultDiscreteModeConfig(acmp_discrete_mode_config_t *config)

Get the default configuration for discrete mode setting.

Parameters:

config – Pointer to configuration structure to be restored with the setting values.

FSL_ACMP_DRIVER_VERSION: ACMP driver version 2.3.0.

enum _acmp_interrupt_enable

Interrupt enable/disable mask.

Values:

enumerator kACMP_OutputRisingInterruptEnable: Enable the interrupt when comparator outputs rising.

enumerator kACMP_OutputFallingInterruptEnable: Enable the interrupt when comparator outputs falling.

enumerator kACMP_RoundRobinInterruptEnable: Enable the Round-Robin interrupt.

enum _acmp_status_flags

Status flag mask.

Values:

enumerator kACMP_OutputRisingEventFlag: Rising-edge on compare output has occurred.

enumerator kACMP_OutputFallingEventFlag: Falling-edge on compare output has occurred.

enumerator kACMP_OutputAssertEventFlag: Return the current value of the analog comparator output.

enum _acmp_offset_mode

Comparator hard block offset control.

If OFFSET level is 1, then there is no hysteresis in the case of positive port input crossing negative port input in the positive direction (or negative port input crossing positive port input in the negative direction). Hysteresis still exists for positive port input crossing negative port input in the falling direction. If OFFSET level is 0, then the hysteresis selected by acmp_hysteresis_mode_t is valid for both directions.

Values:

enumerator kACMP_OffsetLevel0: The comparator hard block output has level 0 offset internally.

enumerator kACMP_OffsetLevel1: The comparator hard block output has level 1 offset internally.

enum _acmp_hysteresis_mode

Comparator hard block hysteresis control.

See chip data sheet to get the actual hysteresis value with each level.

Values:

enumerator kACMP_HysteresisLevel0: Offset is level 0 and Hysteresis is level 0.

enumerator kACMP_HysteresisLevel1: Offset is level 0 and Hysteresis is level 1.

enumerator kACMP_HysteresisLevel2: Offset is level 0 and Hysteresis is level 2.

enumerator kACMP_HysteresisLevel3: Offset is level 0 and Hysteresis is level 3.

enum _acmp_reference_voltage_source

CMP Voltage Reference source.

Values:

enumerator kACMP_VrefSourceVin1: Vin1 is selected as resistor ladder network supply reference Vin.

enumerator kACMP_VrefSourceVin2: Vin2 is selected as resistor ladder network supply reference Vin.

enum _acmp_port_input

Port input source.

Values:

enumerator kACMP_PortInputFromDAC: Port input from the 8-bit DAC output.

enumerator kACMP_PortInputFromMux: Port input from the analog 8-1 mux.

enum _acmp_fixed_port

Fixed mux port.

Values:

enumerator kACMP_FixedPlusPort: Only the inputs to the Minus port are swept in each round.

enumerator kACMP_FixedMinusPort: Only the inputs to the Plus port are swept in each round.

enum _acmp_dac_work_mode

Internal DAC’s work mode.

Values:

enumerator kACMP_DACWorkLowSpeedMode: DAC is selected to work in low speed and low power mode.

enumerator kACMP_DACWorkHighSpeedMode: DAC is selected to work in high speed high power mode.

typedef enum _acmp_offset_mode acmp_offset_mode_t

Comparator hard block offset control.

If OFFSET level is 1, then there is no hysteresis in the case of positive port input crossing negative port input in the positive direction (or negative port input crossing positive port input in the negative direction). Hysteresis still exists for positive port input crossing negative port input in the falling direction. If OFFSET level is 0, then the hysteresis selected by acmp_hysteresis_mode_t is valid for both directions.

typedef enum _acmp_hysteresis_mode acmp_hysteresis_mode_t

Comparator hard block hysteresis control.

See chip data sheet to get the actual hysteresis value with each level.

typedef enum _acmp_reference_voltage_source acmp_reference_voltage_source_t: CMP Voltage Reference source.

typedef enum _acmp_port_input acmp_port_input_t: Port input source.

typedef enum _acmp_fixed_port acmp_fixed_port_t: Fixed mux port.

typedef enum _acmp_dac_work_mode acmp_dac_work_mode_t: Internal DAC’s work mode.

typedef struct _acmp_config acmp_config_t: Configuration for ACMP.

typedef struct _acmp_channel_config acmp_channel_config_t

Configuration for channel.

The comparator’s port can be input from channel mux or DAC. If port input is from channel mux, detailed channel number for the mux should be configured.

typedef struct _acmp_filter_config acmp_filter_config_t: Configuration for filter.

typedef struct _acmp_dac_config acmp_dac_config_t: Configuration for DAC.

typedef struct _acmp_round_robin_config acmp_round_robin_config_t: Configuration for round robin mode.

typedef struct _acmp_discrete_mode_config acmp_discrete_mode_config_t: Configuration for discrete mode.

CMP_C0_CFx_MASK: The mask of status flags cleared by writing 1.

CMP_C1_CHNn_MASK

CMP_C2_CHnF_MASK

struct _acmp_config

#include <fsl_acmp.h>

Configuration for ACMP.

Public Members

acmp_offset_mode_t offsetMode: Offset mode.

acmp_hysteresis_mode_t hysteresisMode: Hysteresis mode.

bool enableHighSpeed: Enable High Speed (HS) comparison mode.

bool enableInvertOutput: Enable inverted comparator output.

bool useUnfilteredOutput: Set compare output(COUT) to equal COUTA(true) or COUT(false).

bool enablePinOut: The comparator output is available on the associated pin.

struct _acmp_channel_config

#include <fsl_acmp.h>

Configuration for channel.

The comparator’s port can be input from channel mux or DAC. If port input is from channel mux, detailed channel number for the mux should be configured.

Public Members

acmp_port_input_t positivePortInput: Input source of the comparator’s positive port.

uint32_t plusMuxInput: Plus mux input channel(0~7).

acmp_port_input_t negativePortInput: Input source of the comparator’s negative port.

uint32_t minusMuxInput: Minus mux input channel(0~7).

struct _acmp_filter_config

#include <fsl_acmp.h>

Configuration for filter.

Public Members

bool enableSample: Using external SAMPLE as sampling clock input, or using divided bus clock.

uint32_t filterCount: Filter Sample Count. Available range is 1-7, 0 would cause the filter disabled.

uint32_t filterPeriod: Filter Sample Period. The divider to bus clock. Available range is 0-255.

struct _acmp_dac_config

#include <fsl_acmp.h>

Configuration for DAC.

Public Members

acmp_reference_voltage_source_t referenceVoltageSource: Supply voltage reference source.

uint32_t DACValue: Value for DAC Output Voltage. Available range is 0-255.

bool enableOutput: Enable the DAC output.

struct _acmp_round_robin_config

#include <fsl_acmp.h>

Configuration for round robin mode.

Public Members

acmp_fixed_port_t fixedPort: Fixed mux port.

uint32_t fixedChannelNumber: Indicates which channel is fixed in the fixed mux port.

uint32_t checkerChannelMask: Mask of checker channel index. Available range is channel0:0x01 to channel7:0x80 for round-robin checker.

uint32_t sampleClockCount: Specifies how many round-robin clock cycles(0~3) later the sample takes place.

uint32_t delayModulus: Comparator and DAC initialization delay modulus.

struct _acmp_discrete_mode_config

#include <fsl_acmp.h>

Configuration for discrete mode.

Public Members

bool enablePositiveChannelDiscreteMode: Positive Channel Continuous Mode Enable. By default, the continuous mode is used.

bool enableNegativeChannelDiscreteMode: Negative Channel Continuous Mode Enable. By default, the continuous mode is used.

Battery-Backed Non-Secure Module

void BBNSM_Init(BBNSM_Type *base)

Init the BBNSM section.

Parameters:

base – BBNSM peripheral base address

void BBNSM_Deinit(BBNSM_Type *base)

Deinit the BBNSM section.

Parameters:

base – BBNSM peripheral base address

FSL_BBNSM_DRIVER_VERSION: Version 2.0.0

enum _bbnsm_interrupts

List of BBNSM interrupts.

Values:

enumerator kBBNSM_RTC_AlarmInterrupt: RTC time alarm interrupt

enumerator kBBNSM_RTC_RolloverInterrupt: RTC rollover interrupt

enum _bbnsm_status_flags

List of BBNSM flags.

Values:

enumerator kBBNSM_RTC_AlarmInterruptFlag: RTC time alarm interrupt flag

enumerator kBBNSM_RTC_RolloverInterruptFlag: RTC rollover interrupt flag

enumerator kBBNSM_PWR_ON_InterruptFlag: power on interrupt flag

enumerator kBBNSM_PWR_OFF_InterruptFlag: power off interrupt flag

enumerator kBBNSM_EMG_OFF_InterruptFlag: emergency power off interrupt flag

typedef enum _bbnsm_interrupts bbnsm_interrupts_t: List of BBNSM interrupts.

typedef enum _bbnsm_status_flags bbnsm_status_flags_t: List of BBNSM flags.

typedef struct _bbnsm_rtc_config bbnsm_rtc_config_t

BBNSM config structure.

This structure holds the configuration settings for the BBNSM peripheral. To initialize this structure to reasonable defaults, call the BBNSM_RTC_GetDefaultConfig() function and pass a pointer to your config structure instance.

The config struct can be made const so it resides in flash

void BBNSM_RTC_Init(BBNSM_Type *base, const bbnsm_rtc_config_t *config)

Ungates the BBNSM clock and configures the peripheral for basic operation.

Note

This API should be called at the beginning of the application using the BBNSM driver.

Parameters:

base – BBNSM peripheral base address
config – Pointer to the user’s BBNSM rtc configuration structure.

void BBNSM_RTC_Deinit(BBNSM_Type *base)

Stops the RTC timer.

Parameters:

base – BBNSM peripheral base address

void BBNSM_RTC_GetDefaultConfig(bbnsm_rtc_config_t *config)

Fills in the BBNSM RTC config struct with the default settings.

The default values are as follows.

config->rtccalenable = false;
config->rtccalvalue = 0U;

Parameters:

config – Pointer to the user’s BBNSM configuration structure.

status_t BBNSM_RTC_SetAlarm(BBNSM_Type *base, uint32_t alarmSeconds)

Sets the BBNSM RTC alarm time.

The function sets the RTC alarm. It also checks whether the specified alarm time is greater than the present time. If not, the function does not set the alarm and returns an error. Please note, that RTC alarm has limited resolution because only 32 most significant bits of RTC counter are compared to RTC Alarm register. If the alarm time is beyond RTC resolution, the function does not set the alarm and returns an error.

Parameters:

base – BBNSM peripheral base address
alarmSeconds –

Returns:

kStatus_Success: success in setting the BBNSM RTC alarm kStatus_InvalidArgument: Error because the alarm datetime format is incorrect kStatus_Fail: Error because the alarm time has already passed or is beyond resolution

uint32_t BBNSM_RTC_GetAlarm(BBNSM_Type *base)

Returns the BBNSM RTC alarm time.

Parameters:

base – BBNSM peripheral base address

struct _bbnsm_rtc_config

#include <fsl_bbnsm.h>

BBNSM config structure.

This structure holds the configuration settings for the BBNSM peripheral. To initialize this structure to reasonable defaults, call the BBNSM_RTC_GetDefaultConfig() function and pass a pointer to your config structure instance.

The config struct can be made const so it resides in flash

Public Members

bool rtcCalEnable: true: RTC calibration mechanism is enabled; false: No calibration is used

uint32_t rtcCalValue: Defines signed calibration value for RTC; This is a 5-bit 2’s complement value, range from -16 to +15

CACHE: CACHE Memory Controller

uint32_t CACHE64_GetInstanceByAddr(uint32_t address)

brief Returns an instance number given physical memory address.

param address The physical memory address.

Returns:: CACHE64_CTRL instance number starting from 0.

void CACHE64_EnableCache(CACHE64_CTRL_Type *base)

Enables the cache.

Parameters:

base – CACHE64_CTRL peripheral base address.

void CACHE64_DisableCache(CACHE64_CTRL_Type *base)

Disables the cache.

Parameters:

base – CACHE64_CTRL peripheral base address.

void CACHE64_InvalidateCache(CACHE64_CTRL_Type *base)

Invalidates the cache.

Parameters:

base – CACHE64_CTRL peripheral base address.

void CACHE64_InvalidateCacheByRange(uint32_t address, uint32_t size_byte)

Invalidates cache by range.

Note

Address and size should be aligned to “CACHE64_LINESIZE_BYTE”. The startAddr here will be forced to align to CACHE64_LINESIZE_BYTE if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address of cache.
size_byte – size of the memory to be invalidated, should be larger than 0.

void CACHE64_CleanCache(CACHE64_CTRL_Type *base)

Cleans the cache.

Parameters:

base – CACHE64_CTRL peripheral base address.

void CACHE64_CleanCacheByRange(uint32_t address, uint32_t size_byte)

Cleans cache by range.

Note

Address and size should be aligned to “CACHE64_LINESIZE_BYTE”. The startAddr here will be forced to align to CACHE64_LINESIZE_BYTE if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address of cache.
size_byte – size of the memory to be cleaned, should be larger than 0.

void CACHE64_CleanInvalidateCache(CACHE64_CTRL_Type *base)

Cleans and invalidates the cache.

Parameters:

base – CACHE64_CTRL peripheral base address.

void CACHE64_CleanInvalidateCacheByRange(uint32_t address, uint32_t size_byte)

Cleans and invalidate cache by range.

Note

Address and size should be aligned to “CACHE64_LINESIZE_BYTE”. The startAddr here will be forced to align to CACHE64_LINESIZE_BYTE if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address of cache.
size_byte – size of the memory to be Cleaned and Invalidated, should be larger than 0.

static inline void ICACHE_InvalidateByRange(uint32_t address, uint32_t size_byte)

Invalidates instruction cache by range.

Note

Address and size should be aligned to CACHE64_LINESIZE_BYTE due to the cache operation unit FSL_FEATURE_CACHE64_CTRL_LINESIZE_BYTE. The startAddr here will be forced to align to the cache line size if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address.
size_byte – size of the memory to be invalidated, should be larger than 0.

static inline void DCACHE_InvalidateByRange(uint32_t address, uint32_t size_byte)

Invalidates data cache by range.

Note

Address and size should be aligned to CACHE64_LINESIZE_BYTE due to the cache operation unit FSL_FEATURE_CACHE64_CTRL_LINESIZE_BYTE. The startAddr here will be forced to align to the cache line size if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address.
size_byte – size of the memory to be invalidated, should be larger than 0.

static inline void DCACHE_CleanByRange(uint32_t address, uint32_t size_byte)

Clean data cache by range.

Note

Address and size should be aligned to CACHE64_LINESIZE_BYTE due to the cache operation unit FSL_FEATURE_CACHE64_CTRL_LINESIZE_BYTE. The startAddr here will be forced to align to the cache line size if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address.
size_byte – size of the memory to be cleaned, should be larger than 0.

static inline void DCACHE_CleanInvalidateByRange(uint32_t address, uint32_t size_byte)

Cleans and Invalidates data cache by range.

Note

Address and size should be aligned to CACHE64_LINESIZE_BYTE due to the cache operation unit FSL_FEATURE_CACHE64_CTRL_LINESIZE_BYTE. The startAddr here will be forced to align to the cache line size if startAddr is not aligned. For the size_byte, application should make sure the alignment or make sure the right operation order if the size_byte is not aligned.

Parameters:

address – The physical address.
size_byte – size of the memory to be Cleaned and Invalidated, should be larger than 0.

FSL_CACHE_DRIVER_VERSION: cache driver version.

CACHE64_LINESIZE_BYTE: cache line size.

casper_driver

FSL_CASPER_DRIVER_VERSION

CASPER driver version. Version 2.2.4.

Current version: 2.2.4

Change log:

Version 2.0.0
- Initial version
Version 2.0.1
- Bug fix KPSDK-24531 double_scalar_multiplication() result may be all zeroes for some specific input
Version 2.0.2
- Bug fix KPSDK-25015 CASPER_MEMCPY hard-fault on LPC55xx when both source and destination buffers are outside of CASPER_RAM
Version 2.0.3
- Bug fix KPSDK-28107 RSUB, FILL and ZERO operations not implemented in enum _casper_operation.
Version 2.0.4
- For GCC compiler, enforce O1 optimize level, specifically to remove strict-aliasing option. This driver is very specific and requires -fno-strict-aliasing.
Version 2.0.5
- Fix sign-compare warning.
Version 2.0.6
- Fix IAR Pa082 warning.
Version 2.0.7
- Fix MISRA-C 2012 issue.
Version 2.0.8
- Add feature macro for CASPER_RAM_OFFSET.
Version 2.0.9
- Remove unused function Jac_oncurve().
- Fix ECC384 build.
Version 2.0.10
- Fix MISRA-C 2012 issue.
Version 2.1.0
- Add ECC NIST P-521 elliptic curve.
Version 2.2.0
- Rework driver to support multiple curves at once.
Version 2.2.1
- Fix MISRA-C 2012 issue.
Version 2.2.2
- Enable hardware interleaving to RAMX0 and RAMX1 for CASPER by feature macro FSL_FEATURE_CASPER_RAM_HW_INTERLEAVE
Version 2.2.3
- Added macro into CASPER_Init and CASPER_Deinit to support devices without clock and reset control.
Version 2.2.4
- Fix MISRA-C 2012 issue.

enum _casper_operation

CASPER operation.

Values:

enumerator kCASPER_OpMul6464NoSum

enumerator kCASPER_OpMul6464Sum: Walking 1 or more of J loop, doing r=a*b using 64x64=128

enumerator kCASPER_OpMul6464FullSum: Walking 1 or more of J loop, doing c,r=r+a*b using 64x64=128, but assume inner j loop

enumerator kCASPER_OpMul6464Reduce: Walking 1 or more of J loop, doing c,r=r+a*b using 64x64=128, but sum all of w.

enumerator kCASPER_OpAdd64: Walking 1 or more of J loop, doing c,r[-1]=r+a*b using 64x64=128, but skip 1st write

enumerator kCASPER_OpSub64: Walking add with off_AB, and in/out off_RES doing c,r=r+a+c using 64+64=65

enumerator kCASPER_OpDouble64: Walking subtract with off_AB, and in/out off_RES doing r=r-a using 64-64=64, with last borrow implicit if any

enumerator kCASPER_OpXor64: Walking add to self with off_RES doing c,r=r+r+c using 64+64=65

enumerator kCASPER_OpRSub64: Walking XOR with off_AB, and in/out off_RES doing r=r^a using 64^64=64

enumerator kCASPER_OpShiftLeft32: Walking subtract with off_AB, and in/out off_RES using r=a-r

enumerator kCASPER_OpShiftRight32: Walking shift left doing r1,r=(b*D)|r1, where D is 2^amt and is loaded by app (off_CD not used)

enumerator kCASPER_OpCopy: Walking shift right doing r,r1=(b*D)|r1, where D is 2^(32-amt) and is loaded by app (off_CD not used) and off_RES starts at MSW

enumerator kCASPER_OpRemask: Copy from ABoff to resoff, 64b at a time

enumerator kCASPER_OpFill: Copy and mask from ABoff to resoff, 64b at a time

enumerator kCASPER_OpZero: Fill RESOFF using 64 bits at a time with value in A and B

enumerator kCASPER_OpCompare: Fill RESOFF using 64 bits at a time of 0s

enumerator kCASPER_OpCompareFast: Compare two arrays, running all the way to the end

enum _casper_algo_t

Algorithm used for CASPER operation.

Values:

enumerator kCASPER_ECC_P256: ECC_P256

enumerator kCASPER_ECC_P384: ECC_P384

enumerator kCASPER_ECC_P521: ECC_P521

Values:

enumerator kCASPER_RamOffset_Result

enumerator kCASPER_RamOffset_Base

enumerator kCASPER_RamOffset_TempBase

enumerator kCASPER_RamOffset_Modulus

enumerator kCASPER_RamOffset_M64

typedef enum _casper_operation casper_operation_t: CASPER operation.

typedef enum _casper_algo_t casper_algo_t: Algorithm used for CASPER operation.

void CASPER_Init(CASPER_Type *base)

Enables clock and disables reset for CASPER peripheral.

Enable clock and disable reset for CASPER.

Parameters:

base – CASPER base address

void CASPER_Deinit(CASPER_Type *base)

Disables clock for CASPER peripheral.

Disable clock and enable reset.

Parameters:

base – CASPER base address

CASPER_CP

CASPER_CP_CTRL0

CASPER_CP_CTRL1

CASPER_CP_LOADER

CASPER_CP_STATUS

CASPER_CP_INTENSET

CASPER_CP_INTENCLR

CASPER_CP_INTSTAT

CASPER_CP_AREG

CASPER_CP_BREG

CASPER_CP_CREG

CASPER_CP_DREG

CASPER_CP_RES0

CASPER_CP_RES1

CASPER_CP_RES2

CASPER_CP_RES3

CASPER_CP_MASK

CASPER_CP_REMASK

CASPER_CP_LOCK

CASPER_CP_ID

CASPER_Wr32b(value, off)

CASPER_Wr64b(value, off)

CASPER_Rd32b(off)

N_wordlen_max

casper_driver_pkha

void CASPER_ModExp(CASPER_Type *base, const uint8_t *signature, const uint8_t *pubN, size_t wordLen, uint32_t pubE, uint8_t *plaintext)

Performs modular exponentiation - (A^E) mod N.

This function performs modular exponentiation.

Parameters:

base – CASPER base address
signature – first addend (in little endian format)
pubN – modulus (in little endian format)
wordLen – Size of pubN in bytes
pubE – exponent
plaintext – [out] Output array to store result of operation (in little endian format)

void CASPER_ecc_init(casper_algo_t curve)

Initialize prime modulus mod in Casper memory .

Set the prime modulus mod in Casper memory and set N_wordlen according to selected algorithm.

Parameters:

curve – elliptic curve algoritm

void CASPER_ECC_SECP256R1_Mul(CASPER_Type *base, uint32_t resX[8], uint32_t resY[8], uint32_t X[8], uint32_t Y[8], uint32_t scalar[8])

Performs ECC secp256r1 point single scalar multiplication.

This function performs ECC secp256r1 point single scalar multiplication [resX; resY] = scalar * [X; Y] Coordinates are affine in normal form, little endian. Scalars are little endian. All arrays are little endian byte arrays, uint32_t type is used only to enforce the 32-bit alignment (0-mod-4 address).

Parameters:

base – CASPER base address
resX – [out] Output X affine coordinate in normal form, little endian.
resY – [out] Output Y affine coordinate in normal form, little endian.
X – Input X affine coordinate in normal form, little endian.
Y – Input Y affine coordinate in normal form, little endian.
scalar – Input scalar integer, in normal form, little endian.

void CASPER_ECC_SECP256R1_MulAdd(CASPER_Type *base, uint32_t resX[8], uint32_t resY[8], uint32_t X1[8], uint32_t Y1[8], uint32_t scalar1[8], uint32_t X2[8], uint32_t Y2[8], uint32_t scalar2[8])

Performs ECC secp256r1 point double scalar multiplication.

This function performs ECC secp256r1 point double scalar multiplication [resX; resY] = scalar1 * [X1; Y1] + scalar2 * [X2; Y2] Coordinates are affine in normal form, little endian. Scalars are little endian. All arrays are little endian byte arrays, uint32_t type is used only to enforce the 32-bit alignment (0-mod-4 address).

Parameters:

base – CASPER base address
resX – [out] Output X affine coordinate.
resY – [out] Output Y affine coordinate.
X1 – Input X1 affine coordinate.
Y1 – Input Y1 affine coordinate.
scalar1 – Input scalar1 integer.
X2 – Input X2 affine coordinate.
Y2 – Input Y2 affine coordinate.
scalar2 – Input scalar2 integer.

void CASPER_ECC_SECP384R1_Mul(CASPER_Type *base, uint32_t resX[12], uint32_t resY[12], uint32_t X[12], uint32_t Y[12], uint32_t scalar[12])

Performs ECC secp384r1 point single scalar multiplication.

This function performs ECC secp384r1 point single scalar multiplication [resX; resY] = scalar * [X; Y] Coordinates are affine in normal form, little endian. Scalars are little endian. All arrays are little endian byte arrays, uint32_t type is used only to enforce the 32-bit alignment (0-mod-4 address).

Parameters:

base – CASPER base address
resX – [out] Output X affine coordinate in normal form, little endian.
resY – [out] Output Y affine coordinate in normal form, little endian.
X – Input X affine coordinate in normal form, little endian.
Y – Input Y affine coordinate in normal form, little endian.
scalar – Input scalar integer, in normal form, little endian.

void CASPER_ECC_SECP384R1_MulAdd(CASPER_Type *base, uint32_t resX[12], uint32_t resY[12], uint32_t X1[12], uint32_t Y1[12], uint32_t scalar1[12], uint32_t X2[12], uint32_t Y2[12], uint32_t scalar2[12])

Performs ECC secp384r1 point double scalar multiplication.

This function performs ECC secp384r1 point double scalar multiplication [resX; resY] = scalar1 * [X1; Y1] + scalar2 * [X2; Y2] Coordinates are affine in normal form, little endian. Scalars are little endian. All arrays are little endian byte arrays, uint32_t type is used only to enforce the 32-bit alignment (0-mod-4 address).

Parameters:

base – CASPER base address
resX – [out] Output X affine coordinate.
resY – [out] Output Y affine coordinate.
X1 – Input X1 affine coordinate.
Y1 – Input Y1 affine coordinate.
scalar1 – Input scalar1 integer.
X2 – Input X2 affine coordinate.
Y2 – Input Y2 affine coordinate.
scalar2 – Input scalar2 integer.

void CASPER_ECC_SECP521R1_Mul(CASPER_Type *base, uint32_t resX[18], uint32_t resY[18], uint32_t X[18], uint32_t Y[18], uint32_t scalar[18])

Performs ECC secp521r1 point single scalar multiplication.

This function performs ECC secp521r1 point single scalar multiplication [resX; resY] = scalar * [X; Y] Coordinates are affine in normal form, little endian. Scalars are little endian. All arrays are little endian byte arrays, uint32_t type is used only to enforce the 32-bit alignment (0-mod-4 address).

Parameters:

base – CASPER base address
resX – [out] Output X affine coordinate in normal form, little endian.
resY – [out] Output Y affine coordinate in normal form, little endian.
X – Input X affine coordinate in normal form, little endian.
Y – Input Y affine coordinate in normal form, little endian.
scalar – Input scalar integer, in normal form, little endian.

void CASPER_ECC_SECP521R1_MulAdd(CASPER_Type *base, uint32_t resX[18], uint32_t resY[18], uint32_t X1[18], uint32_t Y1[18], uint32_t scalar1[18], uint32_t X2[18], uint32_t Y2[18], uint32_t scalar2[18])

Performs ECC secp521r1 point double scalar multiplication.

This function performs ECC secp521r1 point double scalar multiplication [resX; resY] = scalar1 * [X1; Y1] + scalar2 * [X2; Y2] Coordinates are affine in normal form, little endian. Scalars are little endian. All arrays are little endian byte arrays, uint32_t type is used only to enforce the 32-bit alignment (0-mod-4 address).

Parameters:

base – CASPER base address
resX – [out] Output X affine coordinate.
resY – [out] Output Y affine coordinate.
X1 – Input X1 affine coordinate.
Y1 – Input Y1 affine coordinate.
scalar1 – Input scalar1 integer.
X2 – Input X2 affine coordinate.
Y2 – Input Y2 affine coordinate.
scalar2 – Input scalar2 integer.

void CASPER_ECC_equal(int *res, uint32_t *op1, uint32_t *op2)

void CASPER_ECC_equal_to_zero(int *res, uint32_t *op1)

CMC: Core Mode Controller Driver

void CMC_SetClockMode(CMC_Type *base, cmc_clock_mode_t mode)

Sets clock mode.

This function configs the amount of clock gating when the core asserts Sleeping due to WFI, WFE or SLEEPONEXIT.

Parameters:

base – CMC peripheral base address.
mode – System clock mode.

static inline void CMC_LockClockModeSetting(CMC_Type *base)

Locks the clock mode setting.

After invoking this function, any clock mode setting will be blocked.

Parameters:

base – CMC peripheral base address.

static inline cmc_core_clock_gate_status_t CMC_GetCoreClockGatedStatus(CMC_Type *base)

Gets the core clock gated status.

This function get the status to indicate whether the core clock is gated. The core clock gated status can be cleared by software.

Parameters:

base – CMC peripheral base address.

Returns:

The status to indicate whether the core clock is gated.

static inline void CMC_ClearCoreClockGatedStatus(CMC_Type *base)

Clears the core clock gated status.

This function clear clock status flag by software.

Parameters:

base – CMC peripheral base address.

static inline uint8_t CMC_GetWakeupSource(CMC_Type *base)

Gets the Wakeup Source.

This function gets the Wakeup sources from the previous low power mode entry.

Parameters:

base – CMC peripheral base address.

Returns:

The Wakeup sources from the previous low power mode entry. See _cmc_wakeup_sources for details.

static inline cmc_clock_mode_t CMC_GetClockMode(CMC_Type *base)

Gets the Clock mode.

This function gets the clock mode of the previous low power mode entry.

Parameters:

base – CMC peripheral base address.

Returns:

The Low Power status.

static inline uint32_t CMC_GetSystemResetStatus(CMC_Type *base)

Gets the System reset status.

This function returns the system reset status. Those status updates on every MAIN Warm Reset to indicate the type/source of the most recent reset.

Parameters:

base – CMC peripheral base address.

Returns:

The most recent system reset status. See _cmc_system_reset_sources for details.

static inline uint32_t CMC_GetStickySystemResetStatus(CMC_Type *base)

Gets the sticky system reset status since the last WAKE Cold Reset.

This function gets all source of system reset that have generated a system reset since the last WAKE Cold Reset, and that have not been cleared by software.

Parameters:

base – CMC peripheral base address.

Returns:

System reset status that have not been cleared by software. See _cmc_system_reset_sources for details.

static inline void CMC_ClearStickySystemResetStatus(CMC_Type *base, uint32_t mask)

Clears the sticky system reset status flags.

Parameters:

base – CMC peripheral base address.
mask – Bitmap of the sticky system reset status to be cleared.

static inline uint8_t CMC_GetResetCount(CMC_Type *base)

Gets the number of reset sequences completed since the last WAKE Cold Reset.

Parameters:

base – CMC peripheral base address.

Returns:

The number of reset sequences.

void CMC_SetPowerModeProtection(CMC_Type *base, uint32_t allowedModes)

Configures all power mode protection settings.

This function configures the power mode protection settings for supported power modes. This should be done before set the lowPower mode for each power doamin.

The allowed lowpower modes are passed as bit map. For example, to allow Sleep and DeepSleep, use CMC_SetPowerModeProtection(CMC_base, kCMC_AllowSleepMode|kCMC_AllowDeepSleepMode). To allow all low power modes, use CMC_SetPowerModeProtection(CMC_base, kCMC_AllowAllLowPowerModes).

Parameters:

base – CMC peripheral base address.
allowedModes – Bitmaps of the allowed power modes. See _cmc_power_mode_protection for details.

static inline void CMC_LockPowerModeProtectionSetting(CMC_Type *base)

Locks the power mode protection.

This function locks the power mode protection. After invoking this function, any power mode protection setting will be ignored.

Parameters:

base – CMC peripheral base address.

static inline void CMC_SetGlobalPowerMode(CMC_Type *base, cmc_low_power_mode_t lowPowerMode)

Config the same lowPower mode for all power domain.

This function configures the same low power mode for MAIN power domian and WAKE power domain.

Parameters:

base – CMC peripheral base address.
lowPowerMode – The desired lowPower mode. See cmc_low_power_mode_t for details.

static inline void CMC_SetMAINPowerMode(CMC_Type *base, cmc_low_power_mode_t lowPowerMode)

Configures entry into low power mode for the MAIN Power domain.

This function configures the low power mode for the MAIN power domian, when the core executes WFI/WFE instruction. The available lowPower modes are defined in the cmc_low_power_mode_t.

Parameters:

base – CMC peripheral base address.
lowPowerMode – The desired lowPower mode. See cmc_low_power_mode_t for details.

static inline cmc_low_power_mode_t CMC_GetMAINPowerMode(CMC_Type *base)

Gets the power mode of the MAIN Power domain.

Parameters:

base – CMC peripheral base address.

Returns:

The power mode of MAIN Power domain. See cmc_low_power_mode_t for details.

static inline void CMC_SetWAKEPowerMode(CMC_Type *base, cmc_low_power_mode_t lowPowerMode)

Configure entry into low power mode for the WAKE Power domain.

This function configures the low power mode for the WAKE power domian, when the core executes WFI/WFE instruction. The available lowPower mode are defined in the cmc_low_power_mode_t.

Note

The lowPower Mode for the WAKE domain must not be configured to a lower power mode than any other power domain.

Parameters:

base – CMC peripheral base address.
lowPowerMode – The desired lowPower mode. See cmc_low_power_mode_t for details.

static inline cmc_low_power_mode_t CMC_GetWAKEPowerMode(CMC_Type *base)

Gets the power mode of the WAKE Power domain.

Parameters:

base – CMC peripheral base address.

Returns:

The power mode of WAKE Power domain. See cmc_low_power_mode_t for details.

void CMC_ConfigResetPin(CMC_Type *base, const cmc_reset_pin_config_t *config)

Configure reset pin.

This function configures reset pin. When enabled, the low power filter is enabled in both Active and Low power modes, the reset filter is only enabled in Active mode. When both filers are enabled, they operate in series.

Parameters:

base – CMC peripheral base address.
config – Pointer to the reset pin config structure.

static inline void CMC_EnableSystemResetInterrupt(CMC_Type *base, uint32_t mask)

Enable system reset interrupts.

This function enables the system reset interrupts. The assertion of non-fatal warm reset can be delayed for 258 cycles of the 32K_CLK clock while an enabled interrupt is generated. Then Software can perform a graceful shutdown or abort the non-fatal warm reset provided the pending reset source is cleared by resetting the reset source and then clearing the pending flag.

Parameters:

base – CMC peripheral base address.
mask – System reset interrupts. See _cmc_system_reset_interrupt_enable for details.

static inline void CMC_DisableSystemResetInterrupt(CMC_Type *base, uint32_t mask)

Disable system reset interrupts.

This function disables the system reset interrupts.

Parameters:

base – CMC peripheral base address.
mask – System reset interrupts. See _cmc_system_reset_interrupt_enable for details.

static inline uint32_t CMC_GetSystemResetInterruptFlags(CMC_Type *base)

Gets System Reset interrupt flags.

This function returns the System reset interrupt flags.

Parameters:

base – CMC peripheral base address.

Returns:

System reset interrupt flags. See _cmc_system_reset_interrupt_flag for details.

static inline void CMC_ClearSystemResetInterruptFlags(CMC_Type *base, uint32_t mask)

Clears System Reset interrupt flags.

This function clears system reset interrupt flags. The pending reset source can be cleared by resetting the source of the reset and then clearing the pending flags.

Parameters:

base – CMC peripheral base address.
mask – System Reset interrupt flags. See _cmc_system_reset_interrupt_flag for details.

static inline void CMC_EnableNonMaskablePinInterrupt(CMC_Type *base, bool enable)

Enable/Disable Non maskable Pin interrupt.

Parameters:

base – CMC peripheral base address.
enable – Enable or disable Non maskable pin interrupt. true - enable Non-maskable pin interrupt. false - disable Non-maskable pin interupt.

static inline uint8_t CMC_GetISPMODEPinLogic(CMC_Type *base)

Gets the logic state of the ISPMODE_n pin.

This function returns the logic state of the ISPMODE_n pin on the last negation of RESET_b pin.

Parameters:

base – CMC peripheral base address.

Returns:

The logic state of the ISPMODE_n pin on the last negation of RESET_b pin.

static inline void CMC_ClearISPMODEPinLogic(CMC_Type *base)

Clears ISPMODE_n pin state.

Parameters:

base – CMC peripheral base address.

static inline void CMC_ForceBootConfiguration(CMC_Type *base, bool assert)

Set the logic state of the BOOT_CONFIGn pin.

This function force the logic state of the Boot_Confign pin to assert on next system reset.

Parameters:

base – CMC peripheral base address.
assert – Assert the corresponding pin or not. true - Assert corresponding pin on next system reset. false - No effect.

static inline void CMC_LockWriteOperationToBootRomStatusReg(CMC_Type *base, uint8_t index)

Lock write operation to BootROM status register and BootROM Lock register.

Note

If locked, BootROM status register cannot be written.

Note

Once locked, only cold reset can reset related register.

Parameters:

base – CMC peripheral base address.
index – The index of BootROM status register, ranges from 0.

static inline bool CMC_CheckBootRomStatusRegWriteLocked(CMC_Type *base, uint8_t index)

Check if BootROM status register can be written.

Parameters:

base – CMC peripheral base address.
index – The index of BootROM status register, ranges from 0.

Return values:

true – The selected BootRom status register is locked and cannot be written.
false – The selected BootRom Status register is unlocked and cannot be written.

static inline uint32_t CMC_GetBootRomStatus(CMC_Type *base, uint8_t index)

Gets the information written by the BootROM.

Parameters:

base – CMC peripheral base address.
index – The index of BootROM status register, ranges from 0.

Returns:

The status information written by the BootROM.

static inline void CMC_WriteBootRomStatusReg(CMC_Type *base, uint8_t index, uint32_t value)

Writes value to BootROM status register, in this way, BootROM status registers are used as general purpose register.

Note

Value in BootROM status registers are reset in cold reset.

Parameters:

base – CMC peripheral base address.
index – The index of BootROM status register, ranges from 0.
value – Value to write.

void CMC_PowerOffSRAMAllMode(CMC_Type *base, uint32_t mask)

Power off the selected system SRAM always.

This function power off the selected system SRAM always. The SRAM arrays should not be accessed while they are shut down. SRAM array contents are not retained if they are powered off.

Parameters:

base – CMC peripheral base address.
mask – Bitmap of the SRAM arrays to be powered off all modes. See _cmc_system_sram_arrays for details. Check Reference Manual for the SRAM region and mask bit relationship.

static inline void CMC_PowerOnSRAMAllMode(CMC_Type *base, uint32_t mask)

Power on SRAM during all mode.

Parameters:

base – CMC peripheral base address.
mask – Bitmap of the SRAM arrays to be powered on all modes. See _cmc_system_sram_arrays for details. Check Reference Manual for the SRAM region and mask bit relationship.

void CMC_PowerOffSRAMLowPowerOnly(CMC_Type *base, uint32_t mask)

Power off the selected system SRAM during low power mode only.

This function power off the selected system SRAM only during low power mode. SRAM array contents are not retained if they are power off.

Parameters:

base – CMC peripheral base address.
mask – Bitmap of the SRAM arrays to be power off during low power mode only. See _cmc_system_sram_arrays for details. Check Reference Manual for the SRAM region and mask bit relationship.

static inline void CMC_PowerOnSRAMLowPowerOnly(CMC_Type *base, uint32_t mask)

Power on the selected system SRAM during low power mode only.

This function power on the selected system SRAM. The SRAM arrray contents are retained in low power modes.

Parameters:

base – CMC peripheral base address.
mask – Bitmap of the SRAM arrays to be power on during low power mode only. See _cmc_system_sram_arrays for details. Check Reference Manual for the SRAM region and mask bit relationship.

void CMC_ConfigFlashMode(CMC_Type *base, bool wake, bool doze, bool disable)

Configs the low power mode of the on-chip flash memory.

This function configs the low power mode of the on-chip flash memory.

Parameters:

base – CMC peripheral base address.
wake – true: Flash will exit low power state during the flash memory accesses. false: No effect.
doze – true: Flash is disabled while core is sleeping false: No effect.
disable – true: Flash memory is placed in low power state. false: No effect.

static inline void CMC_EnableDebugOperation(CMC_Type *base, bool enable)

Enables/Disables debug Operation when the core sleep.

This function configs what happens to debug when core sleeps.

Parameters:

base – CMC peripheral base address.
enable – Enable or disable Debug when Core is sleeping. true - Debug remains enabled when the core is sleeping. false - Debug is disabled when the core is sleeping.

void CMC_PreEnterLowPowerMode(void)

Prepares to enter low power modes.

This function should be called before entering low power modes.

void CMC_PostExitLowPowerMode(void)

Recovers after wake up from low power modes.

This function should be called after wake up from low power modes. This function should be used with CMC_PreEnterLowPowerMode()

void CMC_GlobalEnterLowPowerMode(CMC_Type *base, cmc_low_power_mode_t lowPowerMode)

Configs the entry into the same low power mode for each power domains.

This function provides the feature to entry into the same low power mode for each power domains. Before invoking this function, please ensure the selected power mode have been allowed.

Parameters:

base – CMC peripheral base address.
lowPowerMode – The low power mode to be entered. See cmc_low_power_mode_t for the details.

void CMC_EnterLowPowerMode(CMC_Type *base, const cmc_power_domain_config_t *config)

Configs the entry into different low power modes for each power domains.

This function provides the feature to entry into different low power modes for each power domains. Before invoking this function please ensure the selected modes are allowed.

Parameters:

base – CMC peripheral base address.
config – Pointer to the cmc_power_domain_config_t structure.

FSL_CMC_DRIVER_VERSION: CMC driver version 2.4.1.

enum _cmc_power_mode_protection

CMC power mode Protection enumeration.

Values:

enumerator kCMC_AllowSleepMode: Allow Sleep mode.

enumerator kCMC_AllowDeepSleepMode: Allow Deep Sleep mode.

enumerator kCMC_AllowPowerDownMode: Allow Power Down mode.

enumerator kCMC_AllowDeepPowerDownMode: Allow Deep Power Down mode.

enumerator kCMC_AllowAllLowPowerModes: Allow all low power modes.

enum _cmc_wakeup_sources

Wake up sources from the previous low power mode entry.

Values:

enumerator kCMC_WakeupFromResetInterruptOrPowerDown: Wakeup source is reset interrupt, or wake up from [Deep] Power Down.

enumerator kCMC_WakeupFromDebugRequest: Wakeup source is debug request.

enumerator kCMC_WakeupFromInterrupt: Wakeup source is interrupt.

enumerator kCMC_WakeupFromDMAWakeup: Wakeup source is DMA Wakeup.

enumerator kCMC_WakeupFromWUURequest: Wakeup source is WUU request.

enumerator kCMC_WakeupFromBusMaster: Wakeup source is Bus master.

enum _cmc_system_reset_interrupt_enable

System Reset Interrupt enable enumeration.

Values:

enumerator kCMC_PinResetInterruptEnable: Pin Reset interrupt enable.

enumerator kCMC_DAPResetInterruptEnable: DAP Reset interrupt enable.

enumerator kCMC_LowPowerAcknowledgeTimeoutResetInterruptEnable: Low Power Acknowledge Timeout Reset interrupt enable.

enumerator kCMC_Watchdog0ResetInterruptEnable: Watchdog 0 Reset interrupt enable.

enumerator kCMC_SoftwareResetInterruptEnable: Software Reset interrupt enable.

enumerator kCMC_LockupResetInterruptEnable: Lockup Reset interrupt enable.

enumerator kCMC_Watchdog1ResetInterruptEnable: Watchdog 1 Reset interrupt enable

enum _cmc_system_reset_interrupt_flag

CMC System Reset Interrupt Status flag.

Values:

enumerator kCMC_PinResetInterruptFlag: Pin Reset interrupt flag.

enumerator kCMC_DAPResetInterruptFlag: DAP Reset interrupt flag.

enumerator kCMC_LowPowerAcknowledgeTimeoutResetFlag: Low Power Acknowledge Timeout Reset interrupt flag.

enumerator kCMC_Watchdog0ResetInterruptFlag: Watchdog 0 Reset interrupt flag.

enumerator kCMC_SoftwareResetInterruptFlag: Software Reset interrupt flag.

enumerator kCMC_LockupResetInterruptFlag: Lock up Reset interrupt flag.

enumerator kCMC_Watchdog1ResetInterruptFlag: Watchdog 1 Reset interrupt flag.

enum _cmc_system_sram_arrays

CMC System SRAM arrays low power mode enable enumeration.

Values:

enumerator kCMC_SRAMBank0: Power off SRAM Bank0, please refer to chip’s RM for the corresponding SRAM array.

enumerator kCMC_SRAMBank1: Power off SRAM Bank1, please refer to chip’s RM for the corresponding SRAM array.

enumerator kCMC_SRAMBank2: Power off SRAM Bank2, please refer to chip’s RM for the corresponding SRAM array.

enumerator kCMC_SRAMBank3: Power off SRAM Bank3, please refer to chip’s RM for the corresponding SRAM array.

enumerator kCMC_SRAMBank4: Power off SRAM Bank4, please refer to chip’s RM for the corresponding SRAM array.

enumerator kCMC_SRAMBank5: Power off SRAM Bank5, please refer to chip’s RM for the corresponding SRAM array.

enumerator kCMC_SRAMBank6: Power off SRAM Bank6, please refer to chip’s RM for the corresponding SRAM array.

enumerator kCMC_SRAMBank7: Power off SRAM Bank7, please refer to chip’s RM for the corresponding SRAM array.

enumerator kCMC_SRAMBank8: Power off SRAM Bank8, please refer to chip’s RM for the corresponding SRAM array.

enumerator kCMC_SRAMBank9: Power off SRAM Bank9, please refer to chip’s RM for the corresponding SRAM array.

enumerator kCMC_SRAMBank10: Power off SRAM Bank10, please refer to chip’s RM for the corresponding SRAM array.

enumerator kCMC_AllSramArrays: Mask of all system SRAM arrays.

enum _cmc_system_reset_sources

System reset sources enumeration.

Values:

enumerator kCMC_WakeUpReset: The reset caused by a wakeup from Power Down or Deep Power Down mode.

enumerator kCMC_PORReset: The reset caused by power on reset detection logic.

enumerator kCMC_LVDReset: The reset caused by a Low Voltage Detect.

enumerator kCMC_HVDReset: The reset caused by a High voltage Detect.

enumerator kCMC_WarmReset: The last reset source is a warm reset source.

enumerator kCMC_FatalReset: The last reset source is a fatal reset source.

enumerator kCMC_PinReset: The reset caused by the RESET_b pin.

enumerator kCMC_DAPReset: The reset caused by a reset request from the Debug Access port.

enumerator kCMC_ResetTimeout: The reset caused by a timeout or other error condition in the system reset generation.

enumerator kCMC_LowPowerAcknowledgeTimeoutReset: The reset caused by a timeout in low power mode entry logic.

enumerator kCMC_SCGReset: The reset caused by a loss of clock or loss of lock event in the SCG.

enumerator kCMC_Watchdog0Reset: The reset caused by a WatchDog 0 timeout.

enumerator kCMC_SoftwareReset: The reset caused by a software reset request.

enumerator kCMC_LockUpReset: The reset caused by the ARM core indication of a LOCKUP event.

enumerator kCMC_Watchdog1Reset: The reset caused by a WatchDog 1 timeout.

enumerator kCMC_SecurityViolationReset: The reset caused by a Security Violation logic.

enum _cmc_core_clock_gate_status

Indicate the core clock was gated.

Values:

enumerator kCMC_CoreClockNotGated: Core clock not gated.

enumerator kCMC_CoreClockGated: Core clock was gated due to low power mode entry.

enum _cmc_clock_mode

CMC clock mode enumeration.

Values:

enumerator kCMC_GateNoneClock: No clock gating.

enumerator kCMC_GateCoreClock: Gate Core clock.

enumerator kCMC_GateCorePlatformClock: Gate Core clock and platform clock.

enumerator kCMC_GateAllSystemClocks: Gate all System clocks, without getting core entering into low power mode.

enumerator kCMC_GateAllSystemClocksEnterLowPowerMode: Gate all System clocks, with core entering into low power mode.

enum _cmc_low_power_mode

CMC power mode enumeration.

Values:

enumerator kCMC_ActiveMode: Select Active mode.

enumerator kCMC_SleepMode: Select Sleep mode when a core executes WFI or WFE instruction.

enumerator kCMC_DeepSleepMode: Select Deep Sleep mode when a core executes WFI or WFE instruction.

enumerator kCMC_PowerDownMode: Select Power Down mode when a core executes WFI or WFE instruction.

enumerator kCMC_DeepPowerDown: Select Deep Power Down mode when a core executes WFI or WFE instruction.

typedef enum _cmc_core_clock_gate_status cmc_core_clock_gate_status_t: Indicate the core clock was gated.

typedef enum _cmc_clock_mode cmc_clock_mode_t: CMC clock mode enumeration.

typedef enum _cmc_low_power_mode cmc_low_power_mode_t: CMC power mode enumeration.

typedef struct _cmc_reset_pin_config cmc_reset_pin_config_t: CMC reset pin configuration.

typedef struct _cmc_power_domain_config cmc_power_domain_config_t: power mode configuration for each power domain.

CMC_BLR_LOCK_FIELD_WIDTH

CMC_BLR_LOCK_IDX_MASK(index)

CMC_BLR_LOCK_IDX_SHIFT(index)

CMC_BLR_LOCK_IDX(index, value)

struct _cmc_reset_pin_config

#include <fsl_cmc.h>

CMC reset pin configuration.

Public Members

bool lowpowerFilterEnable: Low Power Filter enable.

bool resetFilterEnable: Reset Filter enable.

uint8_t resetFilterWidth: Width of the Reset Filter.

struct _cmc_power_domain_config

#include <fsl_cmc.h>

power mode configuration for each power domain.

Public Members

cmc_clock_mode_t clock_mode: Clock mode for each power domain.

cmc_low_power_mode_t main_domain: The low power mode of the MAIN power domain.

cmc_low_power_mode_t wake_domain: The low power mode of the WAKE power domain.

MIPI CSI2 RX: MIPI CSI2 RX Driver

FSL_CSI2RX_DRIVER_VERSION: CSI2RX driver version.

enum _csi2rx_data_lane

CSI2RX data lanes.

Values:

enumerator kCSI2RX_DataLane0: Data lane 0.

enumerator kCSI2RX_DataLane1: Data lane 1.

enumerator kCSI2RX_DataLane2: Data lane 2.

enumerator kCSI2RX_DataLane3: Data lane 3.

enum _csi2rx_payload

CSI2RX payload type.

Values:

enumerator kCSI2RX_PayloadGroup0Null: NULL.

enumerator kCSI2RX_PayloadGroup0Blank: Blank.

enumerator kCSI2RX_PayloadGroup0Embedded: Embedded.

enumerator kCSI2RX_PayloadGroup0YUV420_8Bit: Legacy YUV420 8 bit.

enumerator kCSI2RX_PayloadGroup0YUV422_8Bit: YUV422 8 bit.

enumerator kCSI2RX_PayloadGroup0YUV422_10Bit: YUV422 10 bit.

enumerator kCSI2RX_PayloadGroup0RGB444: RGB444.

enumerator kCSI2RX_PayloadGroup0RGB555: RGB555.

enumerator kCSI2RX_PayloadGroup0RGB565: RGB565.

enumerator kCSI2RX_PayloadGroup0RGB666: RGB666.

enumerator kCSI2RX_PayloadGroup0RGB888: RGB888.

enumerator kCSI2RX_PayloadGroup0Raw6: Raw 6.

enumerator kCSI2RX_PayloadGroup0Raw7: Raw 7.

enumerator kCSI2RX_PayloadGroup0Raw8: Raw 8.

enumerator kCSI2RX_PayloadGroup0Raw10: Raw 10.

enumerator kCSI2RX_PayloadGroup0Raw12: Raw 12.

enumerator kCSI2RX_PayloadGroup0Raw14: Raw 14.

enumerator kCSI2RX_PayloadGroup1UserDefined1: User defined 8-bit data type 1, 0x30.

enumerator kCSI2RX_PayloadGroup1UserDefined2: User defined 8-bit data type 2, 0x31.

enumerator kCSI2RX_PayloadGroup1UserDefined3: User defined 8-bit data type 3, 0x32.

enumerator kCSI2RX_PayloadGroup1UserDefined4: User defined 8-bit data type 4, 0x33.

enumerator kCSI2RX_PayloadGroup1UserDefined5: User defined 8-bit data type 5, 0x34.

enumerator kCSI2RX_PayloadGroup1UserDefined6: User defined 8-bit data type 6, 0x35.

enumerator kCSI2RX_PayloadGroup1UserDefined7: User defined 8-bit data type 7, 0x36.

enumerator kCSI2RX_PayloadGroup1UserDefined8: User defined 8-bit data type 8, 0x37.

enum _csi2rx_bit_error

MIPI CSI2RX bit errors.

Values:

enumerator kCSI2RX_BitErrorEccTwoBit: ECC two bit error has occurred.

enumerator kCSI2RX_BitErrorEccOneBit: ECC one bit error has occurred.

enum _csi2rx_ppi_error

MIPI CSI2RX PPI error types.

Values:

enumerator kCSI2RX_PpiErrorSotHs: CSI2RX DPHY PPI error ErrSotHS.

enumerator kCSI2RX_PpiErrorSotSyncHs: CSI2RX DPHY PPI error ErrSotSync_HS.

enumerator kCSI2RX_PpiErrorEsc: CSI2RX DPHY PPI error ErrEsc.

enumerator kCSI2RX_PpiErrorSyncEsc: CSI2RX DPHY PPI error ErrSyncEsc.

enumerator kCSI2RX_PpiErrorControl: CSI2RX DPHY PPI error ErrControl.

enum _csi2rx_interrupt

MIPI CSI2RX interrupt.

Values:

enumerator kCSI2RX_InterruptCrcError

enumerator kCSI2RX_InterruptEccOneBitError

enumerator kCSI2RX_InterruptEccTwoBitError

enumerator kCSI2RX_InterruptUlpsStatusChange

enumerator kCSI2RX_InterruptErrorSotHs

enumerator kCSI2RX_InterruptErrorSotSyncHs

enumerator kCSI2RX_InterruptErrorEsc

enumerator kCSI2RX_InterruptErrorSyncEsc

enumerator kCSI2RX_InterruptErrorControl

enum _csi2rx_ulps_status

MIPI CSI2RX D-PHY ULPS state.

Values:

enumerator kCSI2RX_ClockLaneUlps: Clock lane is in ULPS state.

enumerator kCSI2RX_DataLane0Ulps: Data lane 0 is in ULPS state.

enumerator kCSI2RX_DataLane1Ulps: Data lane 1 is in ULPS state.

enumerator kCSI2RX_DataLane2Ulps: Data lane 2 is in ULPS state.

enumerator kCSI2RX_DataLane3Ulps: Data lane 3 is in ULPS state.

enumerator kCSI2RX_ClockLaneMark: Clock lane is in mark state.

enumerator kCSI2RX_DataLane0Mark: Data lane 0 is in mark state.

enumerator kCSI2RX_DataLane1Mark: Data lane 1 is in mark state.

enumerator kCSI2RX_DataLane2Mark: Data lane 2 is in mark state.

enumerator kCSI2RX_DataLane3Mark: Data lane 3 is in mark state.

typedef struct _csi2rx_config csi2rx_config_t: CSI2RX configuration.

typedef enum _csi2rx_ppi_error csi2rx_ppi_error_t: MIPI CSI2RX PPI error types.

void CSI2RX_Init(MIPI_CSI2RX_Type *base, const csi2rx_config_t *config)

Enables and configures the CSI2RX peripheral module.

Parameters:

base – CSI2RX peripheral address.
config – CSI2RX module configuration structure.

void CSI2RX_Deinit(MIPI_CSI2RX_Type *base)

Disables the CSI2RX peripheral module.

Parameters:

base – CSI2RX peripheral address.

static inline uint32_t CSI2RX_GetBitError(MIPI_CSI2RX_Type *base)

Gets the MIPI CSI2RX bit error status.

This function gets the RX bit error status, the return value could be compared with _csi2rx_bit_error. If one bit ECC error detected, the return value could be passed to the function CSI2RX_GetEccBitErrorPosition to get the position of the ECC error bit.

Example:

uint32_t bitError;
uint32_t bitErrorPosition;

bitError = CSI2RX_GetBitError(MIPI_CSI2RX);

if (kCSI2RX_BitErrorEccTwoBit & bitError)
{
    Two bits error;
}
else if (kCSI2RX_BitErrorEccOneBit & bitError)
{
    One bits error;
    bitErrorPosition = CSI2RX_GetEccBitErrorPosition(bitError);
}

Parameters:

base – CSI2RX peripheral address.

Returns:

The RX bit error status.

static inline uint32_t CSI2RX_GetEccBitErrorPosition(uint32_t bitError)

Get ECC one bit error bit position.

If CSI2RX_GetBitError detects ECC one bit error, this function could extract the error bit position from the return value of CSI2RX_GetBitError.

Parameters:

bitError – The bit error returned by CSI2RX_GetBitError.

Returns:

The position of error bit.

static inline uint32_t CSI2RX_GetUlpsStatus(MIPI_CSI2RX_Type *base)

Gets the MIPI CSI2RX D-PHY ULPS status.

Example to check whether data lane 0 is in ULPS status.

uint32_t status = CSI2RX_GetUlpsStatus(MIPI_CSI2RX);

if (kCSI2RX_DataLane0Ulps & status)
{
    Data lane 0 is in ULPS status.
}

Parameters:

base – CSI2RX peripheral address.

Returns:

The MIPI CSI2RX D-PHY ULPS status, it is OR’ed value or _csi2rx_ulps_status.

static inline uint32_t CSI2RX_GetPpiErrorDataLanes(MIPI_CSI2RX_Type *base, csi2rx_ppi_error_t errorType)

Gets the MIPI CSI2RX D-PHY PPI error lanes.

This function checks the PPI error occurred on which data lanes, the returned value is OR’ed value of csi2rx_ppi_error_t. For example, if the ErrSotHS is detected, to check the ErrSotHS occurred on which data lanes, use like this:

uint32_t errorDataLanes = CSI2RX_GetPpiErrorDataLanes(MIPI_CSI2RX, kCSI2RX_PpiErrorSotHs);

if (kCSI2RX_DataLane0 & errorDataLanes)
{
    ErrSotHS occurred on data lane 0.
}

if (kCSI2RX_DataLane1 & errorDataLanes)
{
    ErrSotHS occurred on data lane 1.
}

Parameters:

base – CSI2RX peripheral address.
errorType – What kind of error to check.

Returns:

The data lane mask that error errorType occurred.

static inline void CSI2RX_EnableInterrupts(MIPI_CSI2RX_Type *base, uint32_t mask)

Enable the MIPI CSI2RX interrupts.

This function enables the MIPI CSI2RX interrupts. The interrupts to enable are passed in as an OR’ed value of _csi2rx_interrupt. For example, to enable one bit and two bit ECC error interrupts, use like this:

CSI2RX_EnableInterrupts(MIPI_CSI2RX, kCSI2RX_InterruptEccOneBitError | kCSI2RX_InterruptEccTwoBitError);

Parameters:

base – CSI2RX peripheral address.
mask – OR’ed value of _csi2rx_interrupt.

static inline void CSI2RX_DisableInterrupts(MIPI_CSI2RX_Type *base, uint32_t mask)

Disable the MIPI CSI2RX interrupts.

This function disables the MIPI CSI2RX interrupts. The interrupts to disable are passed in as an OR’ed value of _csi2rx_interrupt. For example, to disable one bit and two bit ECC error interrupts, use like this:

CSI2RX_DisableInterrupts(MIPI_CSI2RX, kCSI2RX_InterruptEccOneBitError | kCSI2RX_InterruptEccTwoBitError);

Parameters:

base – CSI2RX peripheral address.
mask – OR’ed value of _csi2rx_interrupt.

static inline uint32_t CSI2RX_GetInterruptStatus(MIPI_CSI2RX_Type *base)

Get the MIPI CSI2RX interrupt status.

This function returns the MIPI CSI2RX interrupts status as an OR’ed value of _csi2rx_interrupt.

Parameters:

base – CSI2RX peripheral address.

Returns:

OR’ed value of _csi2rx_interrupt.

CSI2RX_REG_CFG_NUM_LANES(base)

CSI2RX_REG_CFG_DISABLE_DATA_LANES(base)

CSI2RX_REG_BIT_ERR(base)

CSI2RX_REG_IRQ_STATUS(base)

CSI2RX_REG_IRQ_MASK(base)

CSI2RX_REG_ULPS_STATUS(base)

CSI2RX_REG_PPI_ERRSOT_HS(base)

CSI2RX_REG_PPI_ERRSOTSYNC_HS(base)

CSI2RX_REG_PPI_ERRESC(base)

CSI2RX_REG_PPI_ERRSYNCESC(base)

CSI2RX_REG_PPI_ERRCONTROL(base)

CSI2RX_REG_CFG_DISABLE_PAYLOAD_0(base)

CSI2RX_REG_CFG_DISABLE_PAYLOAD_1(base)

CSI2RX_REG_CFG_IGNORE_VC(base)

CSI2RX_REG_CFG_VID_VC(base)

CSI2RX_REG_CFG_VID_P_FIFO_SEND_LEVEL(base)

CSI2RX_REG_CFG_VID_VSYNC(base)

CSI2RX_REG_CFG_VID_HSYNC_FP(base)

CSI2RX_REG_CFG_VID_HSYNC(base)

CSI2RX_REG_CFG_VID_HSYNC_BP(base)

MIPI_CSI2RX_CSI2RX_CFG_NUM_LANES_csi2rx_cfg_num_lanes_MASK

MIPI_CSI2RX_CSI2RX_IRQ_MASK_csi2rx_irq_mask_MASK

struct _csi2rx_config

#include <fsl_mipi_csi2rx.h>

CSI2RX configuration.

Public Members

uint8_t laneNum: Number of active lanes used for receiving data.

uint8_t tHsSettle_EscClk: Number of rx_clk_esc clock periods for T_HS_SETTLE. The T_HS_SETTLE should be in the range of 85ns + 6UI to 145ns + 10UI.

DAC12: 12-bit Digital-to-Analog Converter Driver

void DAC12_GetHardwareInfo(DAC_Type *base, dac12_hardware_info_t *info)

Get hardware information about this module.

Parameters:

base – DAC12 peripheral base address.
info – Pointer to info structure, see to dac12_hardware_info_t.

void DAC12_Init(DAC_Type *base, const dac12_config_t *config)

Initialize the DAC12 module.

Parameters:

base – DAC12 peripheral base address.
config – Pointer to configuration structure, see to dac12_config_t.

void DAC12_GetDefaultConfig(dac12_config_t *config)

Initializes the DAC12 user configuration structure.

This function initializes the user configuration structure to a default value. The default values are:

config->fifoWatermarkLevel = 0U;
config->fifoWorkMode = kDAC12_FIFODisabled;
config->referenceVoltageSource = kDAC12_ReferenceVoltageSourceAlt1;
config->fifoTriggerMode = kDAC12_FIFOTriggerByHardwareMode;
config->referenceCurrentSource = kDAC12_ReferenceCurrentSourceAlt0;
config->speedMode = kDAC12_SpeedLowMode;
config->speedMode = false;
config->currentReferenceInternalTrimValue = 0x4;

Parameters:

config – Pointer to the configuration structure. See “dac12_config_t”.

void DAC12_Deinit(DAC_Type *base)

De-initialize the DAC12 module.

Parameters:

base – DAC12 peripheral base address.

static inline void DAC12_Enable(DAC_Type *base, bool enable)

Enable the DAC12’s converter or not.

Parameters:

base – DAC12 peripheral base address.
enable – Enable the DAC12’s converter or not.

static inline void DAC12_ResetConfig(DAC_Type *base)

Reset all internal logic and registers.

Parameters:

base – DAC12 peripheral base address.

static inline void DAC12_ResetFIFO(DAC_Type *base)

Reset the FIFO pointers.

FIFO pointers should only be reset when the DAC12 is disabled. This function can be used to configure both pointers to the same address to reset the FIFO as empty.

Parameters:

base – DAC12 peripheral base address.

static inline uint32_t DAC12_GetStatusFlags(DAC_Type *base)

Get status flags.

Parameters:

base – DAC12 peripheral base address.

Returns:

Mask of current status flags. See to _dac12_status_flags.

static inline void DAC12_ClearStatusFlags(DAC_Type *base, uint32_t flags)

Clear status flags.

Note: Not all the flags can be cleared by this API. Several flags need special condition to clear them according to target chip’s reference manual document.

Parameters:

base – DAC12 peripheral base address.
flags – Mask of status flags to be cleared. See to _dac12_status_flags.

static inline void DAC12_EnableInterrupts(DAC_Type *base, uint32_t mask)

Enable interrupts.

Parameters:

base – DAC12 peripheral base address.
mask – Mask value of interrupts to be enabled. See to _dac12_interrupt_enable.

static inline void DAC12_DisableInterrupts(DAC_Type *base, uint32_t mask)

Disable interrupts.

Parameters:

base – DAC12 peripheral base address.
mask – Mask value of interrupts to be disabled. See to _dac12_interrupt_enable.

static inline void DAC12_EnableDMA(DAC_Type *base, bool enable)

Enable DMA or not.

When DMA is enabled, the DMA request will be generated by original interrupts. The interrupts will not be presented on this module at the same time.

static inline void DAC12_SetData(DAC_Type *base, uint32_t value)

Set data into the entry of FIFO buffer.

When the DAC FIFO is disabled, and the one entry buffer is enabled, the DAC converts the data in the buffer to analog output voltage. Any write to the DATA register will replace the data in the buffer and push data to analog conversion without trigger support. When the DAC FIFO is enabled. Writing data would increase the write pointer of FIFO. Also, the data would be restored into the FIFO buffer.

Parameters:

base – DAC12 peripheral base address.
value – Setting value into FIFO buffer.

static inline void DAC12_DoSoftwareTrigger(DAC_Type *base)

Do trigger the FIFO by software.

When the DAC FIFO is enabled, and software trigger is used. Doing trigger would increase the read pointer, and the data in the entry pointed by read pointer would be converted as new output.

Parameters:

base – DAC12 peripheral base address.

static inline uint32_t DAC12_GetFIFOReadPointer(DAC_Type *base)

Get the current read pointer of FIFO.

Parameters:

base – DAC12 peripheral base address.

Returns:

Read pointer index of FIFO buffer.

static inline uint32_t DAC12_GetFIFOWritePointer(DAC_Type *base)

Get the current write pointer of FIFO.

Parameters:

base – DAC12 peripheral base address.

Returns:

Write pointer index of FIFO buffer

FSL_DAC12_DRIVER_VERSION: DAC12 driver version 2.1.1.

enum _dac12_status_flags

DAC12 flags.

Values:

enumerator kDAC12_OverflowFlag: FIFO overflow status flag, which indicates that more data has been written into FIFO than it can hold.

enumerator kDAC12_UnderflowFlag: FIFO underflow status flag, which means that there is a new trigger after the FIFO is nearly empty.

enumerator kDAC12_WatermarkFlag: FIFO wartermark status flag, which indicates the remaining FIFO data is less than the watermark setting.

enumerator kDAC12_NearlyEmptyFlag: FIFO nearly empty flag, which means there is only one data remaining in FIFO.

enumerator kDAC12_FullFlag: FIFO full status flag, which means that the FIFO read pointer equals the write pointer, as the write pointer increase.

enum _dac12_interrupt_enable

DAC12 interrupts.

Values:

enumerator kDAC12_UnderOrOverflowInterruptEnable: Underflow and overflow interrupt enable.

enumerator kDAC12_WatermarkInterruptEnable: Watermark interrupt enable.

enumerator kDAC12_NearlyEmptyInterruptEnable: Nearly empty interrupt enable.

enumerator kDAC12_FullInterruptEnable: Full interrupt enable.

enum _dac12_fifo_size_info

DAC12 FIFO size information provided by hardware.

Values:

enumerator kDAC12_FIFOSize2: FIFO depth is 2.

enumerator kDAC12_FIFOSize4: FIFO depth is 4.

enumerator kDAC12_FIFOSize8: FIFO depth is 8.

enumerator kDAC12_FIFOSize16: FIFO depth is 16.

enumerator kDAC12_FIFOSize32: FIFO depth is 32.

enumerator kDAC12_FIFOSize64: FIFO depth is 64.

enumerator kDAC12_FIFOSize128: FIFO depth is 128.

enumerator kDAC12_FIFOSize256: FIFO depth is 256.

enum _dac12_fifo_work_mode

DAC12 FIFO work mode.

Values:

enumerator kDAC12_FIFODisabled: FIFO disabled and only one level buffer is enabled. Any data written from this buffer goes to conversion.

enumerator kDAC12_FIFOWorkAsNormalMode: Data will first read from FIFO to buffer then go to conversion.

enumerator kDAC12_FIFOWorkAsSwingMode: In Swing mode, the FIFO must be set up to be full. In Swing back mode, a trigger changes the read pointer to make it swing between the FIFO Full and Nearly Empty state. That is, the trigger increases the read pointer till FIFO is nearly empty and decreases the read pointer till the FIFO is full.

enum _dac12_reference_voltage_source

DAC12 reference voltage source.

Values:

enumerator kDAC12_ReferenceVoltageSourceAlt1: The DAC selects DACREF_1 as the reference voltage.

enumerator kDAC12_ReferenceVoltageSourceAlt2: The DAC selects DACREF_2 as the reference voltage.

enum _dac12_fifo_trigger_mode

DAC12 FIFO trigger mode.

Values:

enumerator kDAC12_FIFOTriggerByHardwareMode: Buffer would be triggered by hardware.

enumerator kDAC12_FIFOTriggerBySoftwareMode: Buffer would be triggered by software.

enum _dac12_reference_current_source

DAC internal reference current source.

Analog module needs reference current to keep working . Such reference current can generated by IP itself, or by on-chip PMC’s “reference part”. If no current reference be selected, analog module can’t working normally ,even when other register can still be assigned, DAC would waste current but no function. To make the DAC work, either kDAC12_ReferenceCurrentSourceAltx should be selected.

Values:

enumerator kDAC12_ReferenceCurrentSourceDisabled: None of reference current source is enabled.

enumerator kDAC12_ReferenceCurrentSourceAlt0: Use the internal reference current generated by the module itself.

enumerator kDAC12_ReferenceCurrentSourceAlt1: Use the ZTC(Zero Temperature Coefficient) reference current generated by on-chip power management module.

enumerator kDAC12_ReferenceCurrentSourceAlt2: Use the PTAT(Proportional To Absolution Temperature) reference current generated by power management module.

enum _dac12_speed_mode

DAC analog buffer speed mode for conversion.

Values:

enumerator kDAC12_SpeedLowMode: Low speed mode.

enumerator kDAC12_SpeedMiddleMode: Middle speed mode.

enumerator kDAC12_SpeedHighMode: High speed mode.

typedef enum _dac12_fifo_size_info dac12_fifo_size_info_t: DAC12 FIFO size information provided by hardware.

typedef enum _dac12_fifo_work_mode dac12_fifo_work_mode_t: DAC12 FIFO work mode.

typedef enum _dac12_reference_voltage_source dac12_reference_voltage_source_t: DAC12 reference voltage source.

typedef enum _dac12_fifo_trigger_mode dac12_fifo_trigger_mode_t: DAC12 FIFO trigger mode.

typedef enum _dac12_reference_current_source dac12_reference_current_source_t

DAC internal reference current source.

Analog module needs reference current to keep working . Such reference current can generated by IP itself, or by on-chip PMC’s “reference part”. If no current reference be selected, analog module can’t working normally ,even when other register can still be assigned, DAC would waste current but no function. To make the DAC work, either kDAC12_ReferenceCurrentSourceAltx should be selected.

typedef enum _dac12_speed_mode dac12_speed_mode_t: DAC analog buffer speed mode for conversion.

typedef struct _dac12_hardware_info dac12_hardware_info_t: DAC12 hardware information.

DAC12_CR_W1C_FLAGS_MASK: Define “write 1 to clear” flags.

DAC12_CR_ALL_FLAGS_MASK: Define all the flag bits in DACx_CR register.

struct _dac12_hardware_info

#include <fsl_dac12.h>

DAC12 hardware information.

Public Members

dac12_fifo_size_info_t fifoSizeInfo: The number of words in this device’s DAC buffer.

struct dac12_config_t

#include <fsl_dac12.h>

DAC12 module configuration.

Actually, the most fields are for FIFO buffer.

Public Members

uint32_t fifoWatermarkLevel: FIFO’s watermark, the max value can be the hardware FIFO size.

dac12_fifo_work_mode_t fifoWorkMode: FIFI’s work mode about pointers.

dac12_reference_voltage_source_t referenceVoltageSource: Select the reference voltage source.

dac12_reference_current_source_t referenceCurrentSource: Select the trigger mode for FIFO. Select the reference current source.

dac12_speed_mode_t speedMode: Select the speed mode for conversion.

bool enableAnalogBuffer: Enable analog buffer for high drive.

EDMA: Enhanced Direct Memory Access (eDMA) Controller Driver

void EDMA_AD_Init(DMA_AD_Type *base, const edma_config_t *config)

Initializes the eDMA peripheral.

This function ungates the eDMA clock and configures the eDMA peripheral according to the configuration structure.

Note

This function enables the minor loop map feature.

Parameters:

base – eDMA peripheral base address.
config – A pointer to the configuration structure, see “edma_config_t”.

void EDMA_AD_Deinit(DMA_AD_Type *base)

Deinitializes the eDMA peripheral.

This function gates the eDMA clock.

Parameters:

base – eDMA peripheral base address.

void EDMA_AD_InstallTCD(DMA_AD_Type *base, uint32_t channel, edma_tcd_t *tcd)

Push content of TCD structure into hardware TCD register.

Parameters:

base – EDMA peripheral base address.
channel – EDMA channel number.
tcd – Point to TCD structure.

void EDMA_AD_GetDefaultConfig(edma_config_t *config)

Gets the eDMA default configuration structure.

This function sets the configuration structure to default values. The default configuration is set to the following values:

config.enableMasterIdReplication = true;
config.enableHaltOnError = true;
config.enableRoundRobinArbitration = false;
config.enableDebugMode = false;
config.enableBufferedWrites = false;

Parameters:

config – A pointer to the eDMA configuration structure.

static inline void EDMA_AD_EnableAllChannelLink(DMA_AD_Type *base, bool enable)

Enables/disables all channel linking.

This function enables/disables all channel linking in the management page. For specific channel linking enablement & configuration, please refer to EDMA_SetChannelLink and EDMA_TcdSetChannelLink APIs.

For example, to disable all channel linking in the DMA0 management page:

EDMA_EnableAllChannelLink(DMA0, false);

Parameters:

base – eDMA peripheral base address.
enable – Switcher of the channel linking feature for all channels. “true” means to enable. “false” means not.

void EDMA_AD_ResetChannel(DMA_AD_Type *base, uint32_t channel)

Sets all TCD registers to default values.

This function sets TCD registers for this channel to default values.

Note

This function must not be called while the channel transfer is ongoing or it causes unpredictable results.

Note

This function enables the auto stop request feature.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

void EDMA_AD_SetTransferConfig(DMA_AD_Type *base, uint32_t channel, const edma_transfer_config_t *config, edma_tcd_t *nextTcd)

Configures the eDMA transfer attribute.

This function configures the transfer attribute, including source address, destination address, transfer size, address offset, and so on. It also configures the scatter gather feature if the user supplies the TCD address. Example:

edma_transfer_config_t config;
edma_tcd_t tcd;
config.srcAddr = ..;
config.destAddr = ..;
...
EDMA_AD_SetTransferConfig(DMA0, channel, &config, &stcd);

Note

If nextTcd is not NULL, it means scatter gather feature is enabled and DREQ bit is cleared in the previous transfer configuration, which is set in the eDMA_ResetChannel.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
config – Pointer to eDMA transfer configuration structure.
nextTcd – Point to TCD structure. It can be NULL if users do not want to enable scatter/gather feature.

void EDMA_AD_SetMinorOffsetConfig(DMA_AD_Type *base, uint32_t channel, const edma_minor_offset_config_t *config)

Configures the eDMA minor offset feature.

The minor offset means that the signed-extended value is added to the source address or destination address after each minor loop.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
config – A pointer to the minor offset configuration structure.

static inline void EDMA_AD_SetChannelArbitrationGroup(DMA_AD_Type *base, uint32_t channel, uint32_t group)

Configures the eDMA channel arbitration group.

This function configures the channel arbitration group. The arbitration group priorities are evaluated by numeric value from highest group number to lowest.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number
group – Fixed-priority arbitration group number for the channel.

static inline void EDMA_AD_SetChannelPreemptionConfig(DMA_AD_Type *base, uint32_t channel, const edma_channel_Preemption_config_t *config)

Configures the eDMA channel preemption feature.

This function configures the channel preemption attribute and the priority of the channel.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number
config – A pointer to the channel preemption configuration structure.

static inline uint32_t EDMA_AD_GetChannelSystemBusInformation(DMA_AD_Type *base, uint32_t channel)

Gets the eDMA channel identification and attribute information on the system bus interface.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

Returns:

The mask of the channel system bus information. Users need to use the _edma_channel_sys_bus_info type to decode the return variables.

void EDMA_AD_SetChannelLink(DMA_AD_Type *base, uint32_t channel, edma_channel_link_type_t type, uint32_t linkedChannel)

Sets the channel link for the eDMA transfer.

This function configures either the minor link or the major link mode. The minor link means that the channel link is triggered every time CITER decreases by 1. The major link means that the channel link is triggered when the CITER is exhausted.

Note

Users should ensure that DONE flag is cleared before calling this interface, or the configuration is invalid.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
type – A channel link type, which can be one of the following:
- kEDMA_LinkNone
- kEDMA_MinorLink
- kEDMA_MajorLink
linkedChannel – The linked channel number.

void EDMA_AD_SetBandWidth(DMA_AD_Type *base, uint32_t channel, edma_bandwidth_t bandWidth)

Sets the bandwidth for the eDMA transfer.

Because the eDMA processes the minor loop, it continuously generates read/write sequences until the minor count is exhausted. The bandwidth forces the eDMA to stall after the completion of each read/write access to control the bus request bandwidth seen by the crossbar switch.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
bandWidth – A bandwidth setting, which can be one of the following:
- kEDMABandwidthStallNone
- kEDMABandwidthStall4Cycle
- kEDMABandwidthStall8Cycle

void EDMA_AD_SetModulo(DMA_AD_Type *base, uint32_t channel, edma_modulo_t srcModulo, edma_modulo_t destModulo)

Sets the source modulo and the destination modulo for the eDMA transfer.

This function defines a specific address range specified to be the value after (SADDR + SOFF)/(DADDR + DOFF) calculation is performed or the original register value. It provides the ability to implement a circular data queue easily.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
srcModulo – A source modulo value.
destModulo – A destination modulo value.

static inline void EDMA_AD_EnableAsyncRequest(DMA_AD_Type *base, uint32_t channel, bool enable)

Enables an async request for the eDMA transfer.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
enable – The command to enable (true) or disable (false).

static inline void EDMA_AD_EnableAutoStopRequest(DMA_AD_Type *base, uint32_t channel, bool enable)

Enables an auto stop request for the eDMA transfer.

If enabling the auto stop request, the eDMA hardware automatically disables the hardware channel request.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
enable – The command to enable (true) or disable (false).

void EDMA_AD_EnableChannelInterrupts(DMA_AD_Type *base, uint32_t channel, uint32_t mask)

Enables the interrupt source for the eDMA transfer.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
mask – The mask of interrupt source to be set. Users need to use the defined edma_interrupt_enable_t type.

void EDMA_AD_DisableChannelInterrupts(DMA_AD_Type *base, uint32_t channel, uint32_t mask)

Disables the interrupt source for the eDMA transfer.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
mask – The mask of the interrupt source to be set. Use the defined edma_interrupt_enable_t type.

static inline void EDMA_AD_SetChannelMux(DMA_AD_Type *base, uint32_t channel, uint32_t mux)

Set channel mux source.

Note:When the peripheral is no longer needed, the mux configuration for that channel should be written to 0, thus releasing the resource.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
mux – the mux source value is SOC specific, please reference the SOC for detail.

void EDMA_AD_TcdReset(edma_tcd_t *tcd)

Sets all fields to default values for the TCD structure.

This function sets all fields for this TCD structure to default value.

Note

This function enables the auto stop request feature.

Parameters:

tcd – Pointer to the TCD structure.

void EDMA_AD_TcdSetTransferConfig(edma_tcd_t *tcd, const edma_transfer_config_t *config, edma_tcd_t *nextTcd)

Configures the eDMA TCD transfer attribute.

The TCD is a transfer control descriptor. The content of the TCD is the same as the hardware TCD registers. The STCD is used in the scatter-gather mode. This function configures the TCD transfer attribute, including source address, destination address, transfer size, address offset, and so on. It also configures the scatter gather feature if the user supplies the next TCD address. Example:

edma_transfer_config_t config = {
...
}
edma_tcd_t tcd __aligned(32);
edma_tcd_t nextTcd __aligned(32);
EDMA_TcdSetTransferConfig(&tcd, &config, &nextTcd);

Note

TCD address should be 32 bytes aligned or it causes an eDMA error.

Note

If the nextTcd is not NULL, the scatter gather feature is enabled and DREQ bit is cleared in the previous transfer configuration, which is set in the EDMA_TcdReset.

Parameters:

tcd – Pointer to the TCD structure.
config – Pointer to eDMA transfer configuration structure.
nextTcd – Pointer to the next TCD structure. It can be NULL if users do not want to enable scatter/gather feature.

void EDMA_AD_TcdSetMinorOffsetConfig(edma_tcd_t *tcd, const edma_minor_offset_config_t *config)

Configures the eDMA TCD minor offset feature.

A minor offset is a signed-extended value added to the source address or a destination address after each minor loop.

Parameters:

tcd – A point to the TCD structure.
config – A pointer to the minor offset configuration structure.

void EDMA_AD_TcdSetChannelLink(edma_tcd_t *tcd, edma_channel_link_type_t type, uint32_t linkedChannel)

Sets the channel link for the eDMA TCD.

This function configures either a minor link or a major link. The minor link means the channel link is triggered every time CITER decreases by 1. The major link means that the channel link is triggered when the CITER is exhausted.

Note

Users should ensure that DONE flag is cleared before calling this interface, or the configuration is invalid.

Parameters:

tcd – Point to the TCD structure.
type – Channel link type, it can be one of:
- kEDMA_LinkNone
- kEDMA_MinorLink
- kEDMA_MajorLink
linkedChannel – The linked channel number.

static inline void EDMA_AD_TcdSetBandWidth(edma_tcd_t *tcd, edma_bandwidth_t bandWidth)

Sets the bandwidth for the eDMA TCD.

Because the eDMA processes the minor loop, it continuously generates read/write sequences until the minor count is exhausted. The bandwidth forces the eDMA to stall after the completion of each read/write access to control the bus request bandwidth seen by the crossbar switch.

Parameters:

tcd – A pointer to the TCD structure.
bandWidth – A bandwidth setting, which can be one of the following:
- kEDMABandwidthStallNone
- kEDMABandwidthStall4Cycle
- kEDMABandwidthStall8Cycle

void EDMA_AD_TcdSetModulo(edma_tcd_t *tcd, edma_modulo_t srcModulo, edma_modulo_t destModulo)

Sets the source modulo and the destination modulo for the eDMA TCD.

This function defines a specific address range specified to be the value after (SADDR + SOFF)/(DADDR + DOFF) calculation is performed or the original register value. It provides the ability to implement a circular data queue easily.

Parameters:

tcd – A pointer to the TCD structure.
srcModulo – A source modulo value.
destModulo – A destination modulo value.

static inline void EDMA_AD_TcdEnableAutoStopRequest(edma_tcd_t *tcd, bool enable)

Sets the auto stop request for the eDMA TCD.

If enabling the auto stop request, the eDMA hardware automatically disables the hardware channel request.

Parameters:

tcd – A pointer to the TCD structure.
enable – The command to enable (true) or disable (false).

void EDMA_AD_TcdEnableInterrupts(edma_tcd_t *tcd, uint32_t mask)

Enables the interrupt source for the eDMA TCD.

Parameters:

tcd – Point to the TCD structure.
mask – The mask of interrupt source to be set. Users need to use the defined edma_interrupt_enable_t type.

void EDMA_AD_TcdDisableInterrupts(edma_tcd_t *tcd, uint32_t mask)

Disables the interrupt source for the eDMA TCD.

Parameters:

tcd – Point to the TCD structure.
mask – The mask of interrupt source to be set. Users need to use the defined edma_interrupt_enable_t type.

static inline void EDMA_AD_EnableChannelRequest(DMA_AD_Type *base, uint32_t channel)

Enables the eDMA hardware channel request.

This function enables the hardware channel request.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

static inline void EDMA_AD_DisableChannelRequest(DMA_AD_Type *base, uint32_t channel)

Disables the eDMA hardware channel request.

This function disables the hardware channel request.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

static inline void EDMA_AD_TriggerChannelStart(DMA_AD_Type *base, uint32_t channel)

Starts the eDMA transfer by using the software trigger.

This function starts a minor loop transfer.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

uint32_t EDMA_AD_GetRemainingMajorLoopCount(DMA_AD_Type *base, uint32_t channel)

Gets the Remaining major loop count from the eDMA current channel TCD.

This function checks the TCD (Task Control Descriptor) status for a specified eDMA channel and returns the number of major loop count that has not finished.

Note

1. This function can only be used to get unfinished major loop count of transfer without the next TCD, or it might be inaccuracy.

The unfinished/remaining transfer bytes cannot be obtained directly from registers while the channel is running. Because to calculate the remaining bytes, the initial NBYTES configured in DMA_TCDn_NBYTES_MLNO register is needed while the eDMA IP does not support getting it while a channel is active. In another word, the NBYTES value reading is always the actual (decrementing) NBYTES value the dma_engine is working with while a channel is running. Consequently, to get the remaining transfer bytes, a software-saved initial value of NBYTES (for example copied before enabling the channel) is needed. The formula to calculate it is shown below: RemainingBytes = RemainingMajorLoopCount * NBYTES(initially configured)

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

Returns:

Major loop count which has not been transferred yet for the current TCD.

static inline uint32_t EDMA_AD_GetErrorStatusFlags(DMA_AD_Type *base)

Gets the eDMA channel error status flags.

Parameters:

base – eDMA peripheral base address.

Returns:

The mask of error status flags. Users need to use the _edma_error_status_flags type to decode the return variables.

uint32_t EDMA_AD_GetChannelStatusFlags(DMA_AD_Type *base, uint32_t channel)

Gets the eDMA channel status flags.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

Returns:

The mask of channel status flags. Users need to use the _edma_channel_status_flags type to decode the return variables.

void EDMA_AD_ClearChannelStatusFlags(DMA_AD_Type *base, uint32_t channel, uint32_t mask)

Clears the eDMA channel status flags.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
mask – The mask of channel status to be cleared. Users need to use the defined _edma_channel_status_flags type.

void EDMA_AD_CreateHandle(edma_handle_t *handle, DMA_AD_Type *base, uint32_t channel)

Creates the eDMA handle.

This function is called if using the transactional API for eDMA. This function initializes the internal state of the eDMA handle.

Parameters:

handle – eDMA handle pointer. The eDMA handle stores callback function and parameters.
base – eDMA peripheral base address.
channel – eDMA channel number.

void EDMA_AD_InstallTCDMemory(edma_handle_t *handle, edma_tcd_t *tcdPool, uint32_t tcdSize)

Installs the TCDs memory pool into the eDMA handle.

This function is called after the EDMA_CreateHandle to use scatter/gather feature.

Parameters:

handle – eDMA handle pointer.
tcdPool – A memory pool to store TCDs. It must be 32 bytes aligned.
tcdSize – The number of TCD slots.

void EDMA_AD_SetCallback(edma_handle_t *handle, edma_callback callback, void *userData)

Installs a callback function for the eDMA transfer.

This callback is called in the eDMA IRQ handler. Use the callback to do something after the current major loop transfer completes.

Parameters:

handle – eDMA handle pointer.
callback – eDMA callback function pointer.
userData – A parameter for the callback function.

void EDMA_AD_PrepareTransferConfig(edma_transfer_config_t *config, void *srcAddr, uint32_t srcWidth, int16_t srcOffset, void *destAddr, uint32_t destWidth, int16_t destOffset, uint32_t bytesEachRequest, uint32_t transferBytes)

Prepares the eDMA transfer structure configurations.

This function prepares the transfer configuration structure according to the user input.

Note

The data address and the data width must be consistent. For example, if the SRC is 4 bytes, the source address must be 4 bytes aligned, or it results in source address error (SAE).

Parameters:

config – The user configuration structure of type edma_transfer_config_t.
srcAddr – eDMA transfer source address.
srcWidth – eDMA transfer source address width(bytes).
srcOffset – eDMA transfer source address offset
destAddr – eDMA transfer destination address.
destWidth – eDMA transfer destination address width(bytes).
destOffset – eDMA transfer destination address offset
bytesEachRequest – eDMA transfer bytes per channel request.
transferBytes – eDMA transfer bytes to be transferred.

void EDMA_AD_PrepareTransfer(edma_transfer_config_t *config, void *srcAddr, uint32_t srcWidth, void *destAddr, uint32_t destWidth, uint32_t bytesEachRequest, uint32_t transferBytes, edma_transfer_type_t transferType)

Prepares the eDMA transfer structure.

This function prepares the transfer configuration structure according to the user input.

Note

The data address and the data width must be consistent. For example, if the SRC is 4 bytes, the source address must be 4 bytes aligned, or it results in source address error (SAE).

Parameters:

config – The user configuration structure of type edma_transfer_config_t.
srcAddr – eDMA transfer source address.
srcWidth – eDMA transfer source address width(bytes).
destAddr – eDMA transfer destination address.
destWidth – eDMA transfer destination address width(bytes).
bytesEachRequest – eDMA transfer bytes per channel request.
transferBytes – eDMA transfer bytes to be transferred.
transferType – eDMA transfer type.

status_t EDMA_AD_SubmitTransfer(edma_handle_t *handle, const edma_transfer_config_t *config)

Submits the eDMA transfer request.

This function submits the eDMA transfer request according to the transfer configuration structure. If submitting the transfer request repeatedly, this function packs an unprocessed request as a TCD and enables scatter/gather feature to process it in the next time.

Parameters:

handle – eDMA handle pointer.
config – Pointer to eDMA transfer configuration structure.

Return values:

kStatus_EDMA_Success – It means submit transfer request succeed.
kStatus_EDMA_QueueFull – It means TCD queue is full. Submit transfer request is not allowed.
kStatus_EDMA_Busy – It means the given channel is busy, need to submit request later.

void EDMA_AD_StartTransfer(edma_handle_t *handle)

eDMA starts transfer.

This function enables the channel request. Users can call this function after submitting the transfer request or before submitting the transfer request.

Parameters:

handle – eDMA handle pointer.

void EDMA_AD_StopTransfer(edma_handle_t *handle)

eDMA stops transfer.

This function disables the channel request to pause the transfer. Users can call EDMA_StartTransfer() again to resume the transfer.

Parameters:

handle – eDMA handle pointer.

void EDMA_AD_AbortTransfer(edma_handle_t *handle)

eDMA aborts transfer.

This function disables the channel request and clear transfer status bits. Users can submit another transfer after calling this API.

Parameters:

handle – DMA handle pointer.

static inline uint32_t EDMA_AD_GetUnusedTCDNumber(edma_handle_t *handle)

Get unused TCD slot number.

This function gets current tcd index which is run. If the TCD pool pointer is NULL, it will return 0.

Parameters:

handle – DMA handle pointer.

Returns:

The unused tcd slot number.

static inline uint32_t EDMA_AD_GetNextTCDAddress(edma_handle_t *handle)

Get the next tcd address.

This function gets the next tcd address. If this is last TCD, return 0.

Parameters:

handle – DMA handle pointer.

Returns:

The next TCD address.

void EDMA_AD_HandleIRQ(edma_handle_t *handle)

eDMA IRQ handler for the current major loop transfer completion.

This function clears the channel major interrupt flag and calls the callback function if it is not NULL.

Parameters:

handle – eDMA handle pointer.

void EDMA_Init(DMA_Type *base, const edma_config_t *config)

Initializes the eDMA peripheral.

This function ungates the eDMA clock and configures the eDMA peripheral according to the configuration structure.

Note

This function enables the minor loop map feature.

Parameters:

base – eDMA peripheral base address.
config – A pointer to the configuration structure, see “edma_config_t”.

void EDMA_Deinit(DMA_Type *base)

Deinitializes the eDMA peripheral.

This function gates the eDMA clock.

Parameters:

base – eDMA peripheral base address.

void EDMA_InstallTCD(DMA_Type *base, uint32_t channel, edma_tcd_t *tcd)

Push content of TCD structure into hardware TCD register.

Parameters:

base – EDMA peripheral base address.
channel – EDMA channel number.
tcd – Point to TCD structure.

void EDMA_GetDefaultConfig(edma_config_t *config)

Gets the eDMA default configuration structure.

This function sets the configuration structure to default values. The default configuration is set to the following values:

config.enableMasterIdReplication = true;
config.enableHaltOnError = true;
config.enableRoundRobinArbitration = false;
config.enableDebugMode = false;
config.enableBufferedWrites = false;

Parameters:

config – A pointer to the eDMA configuration structure.

static inline void EDMA_EnableAllChannelLink(DMA_Type *base, bool enable)

Enables/disables all channel linking.

This function enables/disables all channel linking in the management page. For specific channel linking enablement & configuration, please refer to EDMA_SetChannelLink and EDMA_TcdSetChannelLink APIs.

For example, to disable all channel linking in the DMA0 management page:

EDMA_EnableAllChannelLink(DMA0, false);

Parameters:

base – eDMA peripheral base address.
enable – Switcher of the channel linking feature for all channels. “true” means to enable. “false” means not.

void EDMA_ResetChannel(DMA_Type *base, uint32_t channel)

Sets all TCD registers to default values.

This function sets TCD registers for this channel to default values.

Note

This function must not be called while the channel transfer is ongoing or it causes unpredictable results.

Note

This function enables the auto stop request feature.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

void EDMA_SetTransferConfig(DMA_Type *base, uint32_t channel, const edma_transfer_config_t *config, edma_tcd_t *nextTcd)

Configures the eDMA transfer attribute.

This function configures the transfer attribute, including source address, destination address, transfer size, address offset, and so on. It also configures the scatter gather feature if the user supplies the TCD address. Example:

edma_transfer_config_t config;
edma_tcd_t tcd;
config.srcAddr = ..;
config.destAddr = ..;
...
EDMA_SetTransferConfig(DMA0, channel, &config, &stcd);

Note

If nextTcd is not NULL, it means scatter gather feature is enabled and DREQ bit is cleared in the previous transfer configuration, which is set in the eDMA_ResetChannel.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
config – Pointer to eDMA transfer configuration structure.
nextTcd – Point to TCD structure. It can be NULL if users do not want to enable scatter/gather feature.

void EDMA_SetMinorOffsetConfig(DMA_Type *base, uint32_t channel, const edma_minor_offset_config_t *config)

Configures the eDMA minor offset feature.

The minor offset means that the signed-extended value is added to the source address or destination address after each minor loop.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
config – A pointer to the minor offset configuration structure.

static inline void EDMA_SetChannelArbitrationGroup(DMA_Type *base, uint32_t channel, uint32_t group)

Configures the eDMA channel arbitration group.

This function configures the channel arbitration group. The arbitration group priorities are evaluated by numeric value from highest group number to lowest.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number
group – Fixed-priority arbitration group number for the channel.

static inline void EDMA_SetChannelPreemptionConfig(DMA_Type *base, uint32_t channel, const edma_channel_Preemption_config_t *config)

Configures the eDMA channel preemption feature.

This function configures the channel preemption attribute and the priority of the channel.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number
config – A pointer to the channel preemption configuration structure.

static inline uint32_t EDMA_GetChannelSystemBusInformation(DMA_Type *base, uint32_t channel)

Gets the eDMA channel identification and attribute information on the system bus interface.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

Returns:

The mask of the channel system bus information. Users need to use the _edma_channel_sys_bus_info type to decode the return variables.

void EDMA_SetChannelLink(DMA_Type *base, uint32_t channel, edma_channel_link_type_t type, uint32_t linkedChannel)

Sets the channel link for the eDMA transfer.

This function configures either the minor link or the major link mode. The minor link means that the channel link is triggered every time CITER decreases by 1. The major link means that the channel link is triggered when the CITER is exhausted.

Note

Users should ensure that DONE flag is cleared before calling this interface, or the configuration is invalid.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
type – A channel link type, which can be one of the following:
- kEDMA_LinkNone
- kEDMA_MinorLink
- kEDMA_MajorLink
linkedChannel – The linked channel number.

void EDMA_SetBandWidth(DMA_Type *base, uint32_t channel, edma_bandwidth_t bandWidth)

Sets the bandwidth for the eDMA transfer.

Because the eDMA processes the minor loop, it continuously generates read/write sequences until the minor count is exhausted. The bandwidth forces the eDMA to stall after the completion of each read/write access to control the bus request bandwidth seen by the crossbar switch.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
bandWidth – A bandwidth setting, which can be one of the following:
- kEDMABandwidthStallNone
- kEDMABandwidthStall4Cycle
- kEDMABandwidthStall8Cycle

void EDMA_SetModulo(DMA_Type *base, uint32_t channel, edma_modulo_t srcModulo, edma_modulo_t destModulo)

Sets the source modulo and the destination modulo for the eDMA transfer.

This function defines a specific address range specified to be the value after (SADDR + SOFF)/(DADDR + DOFF) calculation is performed or the original register value. It provides the ability to implement a circular data queue easily.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
srcModulo – A source modulo value.
destModulo – A destination modulo value.

static inline void EDMA_EnableAsyncRequest(DMA_Type *base, uint32_t channel, bool enable)

Enables an async request for the eDMA transfer.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
enable – The command to enable (true) or disable (false).

static inline void EDMA_EnableAutoStopRequest(DMA_Type *base, uint32_t channel, bool enable)

Enables an auto stop request for the eDMA transfer.

If enabling the auto stop request, the eDMA hardware automatically disables the hardware channel request.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
enable – The command to enable (true) or disable (false).

void EDMA_EnableChannelInterrupts(DMA_Type *base, uint32_t channel, uint32_t mask)

Enables the interrupt source for the eDMA transfer.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
mask – The mask of interrupt source to be set. Users need to use the defined edma_interrupt_enable_t type.

void EDMA_DisableChannelInterrupts(DMA_Type *base, uint32_t channel, uint32_t mask)

Disables the interrupt source for the eDMA transfer.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
mask – The mask of the interrupt source to be set. Use the defined edma_interrupt_enable_t type.

static inline void EDMA_SetChannelMux(DMA_Type *base, uint32_t channel, uint32_t mux)

Set channel mux source.

Note:When the peripheral is no longer needed, the mux configuration for that channel should be written to 0, thus releasing the resource.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
mux – the mux source value is SOC specific, please reference the SOC for detail.

void EDMA_TcdReset(edma_tcd_t *tcd)

Sets all fields to default values for the TCD structure.

This function sets all fields for this TCD structure to default value.

Note

This function enables the auto stop request feature.

Parameters:

tcd – Pointer to the TCD structure.

void EDMA_TcdSetTransferConfig(edma_tcd_t *tcd, const edma_transfer_config_t *config, edma_tcd_t *nextTcd)

Configures the eDMA TCD transfer attribute.

The TCD is a transfer control descriptor. The content of the TCD is the same as the hardware TCD registers. The STCD is used in the scatter-gather mode. This function configures the TCD transfer attribute, including source address, destination address, transfer size, address offset, and so on. It also configures the scatter gather feature if the user supplies the next TCD address. Example:

edma_transfer_config_t config = {
...
}
edma_tcd_t tcd __aligned(32);
edma_tcd_t nextTcd __aligned(32);
EDMA_TcdSetTransferConfig(&tcd, &config, &nextTcd);

Note

TCD address should be 32 bytes aligned or it causes an eDMA error.

Note

If the nextTcd is not NULL, the scatter gather feature is enabled and DREQ bit is cleared in the previous transfer configuration, which is set in the EDMA_TcdReset.

Parameters:

tcd – Pointer to the TCD structure.
config – Pointer to eDMA transfer configuration structure.
nextTcd – Pointer to the next TCD structure. It can be NULL if users do not want to enable scatter/gather feature.

void EDMA_TcdSetMinorOffsetConfig(edma_tcd_t *tcd, const edma_minor_offset_config_t *config)

Configures the eDMA TCD minor offset feature.

A minor offset is a signed-extended value added to the source address or a destination address after each minor loop.

Parameters:

tcd – A point to the TCD structure.
config – A pointer to the minor offset configuration structure.

void EDMA_TcdSetChannelLink(edma_tcd_t *tcd, edma_channel_link_type_t type, uint32_t linkedChannel)

Sets the channel link for the eDMA TCD.

This function configures either a minor link or a major link. The minor link means the channel link is triggered every time CITER decreases by 1. The major link means that the channel link is triggered when the CITER is exhausted.

Note

Users should ensure that DONE flag is cleared before calling this interface, or the configuration is invalid.

Parameters:

tcd – Point to the TCD structure.
type – Channel link type, it can be one of:
- kEDMA_LinkNone
- kEDMA_MinorLink
- kEDMA_MajorLink
linkedChannel – The linked channel number.

static inline void EDMA_TcdSetBandWidth(edma_tcd_t *tcd, edma_bandwidth_t bandWidth)

Sets the bandwidth for the eDMA TCD.

Because the eDMA processes the minor loop, it continuously generates read/write sequences until the minor count is exhausted. The bandwidth forces the eDMA to stall after the completion of each read/write access to control the bus request bandwidth seen by the crossbar switch.

Parameters:

tcd – A pointer to the TCD structure.
bandWidth – A bandwidth setting, which can be one of the following:
- kEDMABandwidthStallNone
- kEDMABandwidthStall4Cycle
- kEDMABandwidthStall8Cycle

void EDMA_TcdSetModulo(edma_tcd_t *tcd, edma_modulo_t srcModulo, edma_modulo_t destModulo)

Sets the source modulo and the destination modulo for the eDMA TCD.

This function defines a specific address range specified to be the value after (SADDR + SOFF)/(DADDR + DOFF) calculation is performed or the original register value. It provides the ability to implement a circular data queue easily.

Parameters:

tcd – A pointer to the TCD structure.
srcModulo – A source modulo value.
destModulo – A destination modulo value.

static inline void EDMA_TcdEnableAutoStopRequest(edma_tcd_t *tcd, bool enable)

Sets the auto stop request for the eDMA TCD.

If enabling the auto stop request, the eDMA hardware automatically disables the hardware channel request.

Parameters:

tcd – A pointer to the TCD structure.
enable – The command to enable (true) or disable (false).

void EDMA_TcdEnableInterrupts(edma_tcd_t *tcd, uint32_t mask)

Enables the interrupt source for the eDMA TCD.

Parameters:

tcd – Point to the TCD structure.
mask – The mask of interrupt source to be set. Users need to use the defined edma_interrupt_enable_t type.

void EDMA_TcdDisableInterrupts(edma_tcd_t *tcd, uint32_t mask)

Disables the interrupt source for the eDMA TCD.

Parameters:

tcd – Point to the TCD structure.
mask – The mask of interrupt source to be set. Users need to use the defined edma_interrupt_enable_t type.

static inline void EDMA_EnableChannelRequest(DMA_Type *base, uint32_t channel)

Enables the eDMA hardware channel request.

This function enables the hardware channel request.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

static inline void EDMA_DisableChannelRequest(DMA_Type *base, uint32_t channel)

Disables the eDMA hardware channel request.

This function disables the hardware channel request.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

static inline void EDMA_TriggerChannelStart(DMA_Type *base, uint32_t channel)

Starts the eDMA transfer by using the software trigger.

This function starts a minor loop transfer.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

uint32_t EDMA_GetRemainingMajorLoopCount(DMA_Type *base, uint32_t channel)

Gets the Remaining major loop count from the eDMA current channel TCD.

This function checks the TCD (Task Control Descriptor) status for a specified eDMA channel and returns the number of major loop count that has not finished.

Note

1. This function can only be used to get unfinished major loop count of transfer without the next TCD, or it might be inaccuracy.

The unfinished/remaining transfer bytes cannot be obtained directly from registers while the channel is running. Because to calculate the remaining bytes, the initial NBYTES configured in DMA_TCDn_NBYTES_MLNO register is needed while the eDMA IP does not support getting it while a channel is active. In another word, the NBYTES value reading is always the actual (decrementing) NBYTES value the dma_engine is working with while a channel is running. Consequently, to get the remaining transfer bytes, a software-saved initial value of NBYTES (for example copied before enabling the channel) is needed. The formula to calculate it is shown below: RemainingBytes = RemainingMajorLoopCount * NBYTES(initially configured)

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

Returns:

Major loop count which has not been transferred yet for the current TCD.

static inline uint32_t EDMA_GetErrorStatusFlags(DMA_Type *base)

Gets the eDMA channel error status flags.

Parameters:

base – eDMA peripheral base address.

Returns:

The mask of error status flags. Users need to use the _edma_error_status_flags type to decode the return variables.

uint32_t EDMA_GetChannelStatusFlags(DMA_Type *base, uint32_t channel)

Gets the eDMA channel status flags.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.

Returns:

The mask of channel status flags. Users need to use the _edma_channel_status_flags type to decode the return variables.

void EDMA_ClearChannelStatusFlags(DMA_Type *base, uint32_t channel, uint32_t mask)

Clears the eDMA channel status flags.

Parameters:

base – eDMA peripheral base address.
channel – eDMA channel number.
mask – The mask of channel status to be cleared. Users need to use the defined _edma_channel_status_flags type.

void EDMA_CreateHandle(edma_handle_t *handle, DMA_Type *base, uint32_t channel)

Creates the eDMA handle.

This function is called if using the transactional API for eDMA. This function initializes the internal state of the eDMA handle.

Parameters:

handle – eDMA handle pointer. The eDMA handle stores callback function and parameters.
base – eDMA peripheral base address.
channel – eDMA channel number.

void EDMA_InstallTCDMemory(edma_handle_t *handle, edma_tcd_t *tcdPool, uint32_t tcdSize)

Installs the TCDs memory pool into the eDMA handle.

This function is called after the EDMA_CreateHandle to use scatter/gather feature.

Parameters:

handle – eDMA handle pointer.
tcdPool – A memory pool to store TCDs. It must be 32 bytes aligned.
tcdSize – The number of TCD slots.

void EDMA_SetCallback(edma_handle_t *handle, edma_callback callback, void *userData)

Installs a callback function for the eDMA transfer.

This callback is called in the eDMA IRQ handler. Use the callback to do something after the current major loop transfer completes.

Parameters:

handle – eDMA handle pointer.
callback – eDMA callback function pointer.
userData – A parameter for the callback function.

void EDMA_PrepareTransferConfig(edma_transfer_config_t *config, void *srcAddr, uint32_t srcWidth, int16_t srcOffset, void *destAddr, uint32_t destWidth, int16_t destOffset, uint32_t bytesEachRequest, uint32_t transferBytes)

Prepares the eDMA transfer structure configurations.

This function prepares the transfer configuration structure according to the user input.

Note

The data address and the data width must be consistent. For example, if the SRC is 4 bytes, the source address must be 4 bytes aligned, or it results in source address error (SAE).

Parameters:

config – The user configuration structure of type edma_transfer_config_t.
srcAddr – eDMA transfer source address.
srcWidth – eDMA transfer source address width(bytes).
srcOffset – eDMA transfer source address offset
destAddr – eDMA transfer destination address.
destWidth – eDMA transfer destination address width(bytes).
destOffset – eDMA transfer destination address offset
bytesEachRequest – eDMA transfer bytes per channel request.
transferBytes – eDMA transfer bytes to be transferred.

void EDMA_PrepareTransfer(edma_transfer_config_t *config, void *srcAddr, uint32_t srcWidth, void *destAddr, uint32_t destWidth, uint32_t bytesEachRequest, uint32_t transferBytes, edma_transfer_type_t transferType)

Prepares the eDMA transfer structure.

This function prepares the transfer configuration structure according to the user input.

Note

The data address and the data width must be consistent. For example, if the SRC is 4 bytes, the source address must be 4 bytes aligned, or it results in source address error (SAE).

Parameters:

config – The user configuration structure of type edma_transfer_config_t.
srcAddr – eDMA transfer source address.
srcWidth – eDMA transfer source address width(bytes).
destAddr – eDMA transfer destination address.
destWidth – eDMA transfer destination address width(bytes).
bytesEachRequest – eDMA transfer bytes per channel request.
transferBytes – eDMA transfer bytes to be transferred.
transferType – eDMA transfer type.

status_t EDMA_SubmitTransfer(edma_handle_t *handle, const edma_transfer_config_t *config)

Submits the eDMA transfer request.

This function submits the eDMA transfer request according to the transfer configuration structure. If submitting the transfer request repeatedly, this function packs an unprocessed request as a TCD and enables scatter/gather feature to process it in the next time.

Parameters:

handle – eDMA handle pointer.
config – Pointer to eDMA transfer configuration structure.

Return values:

kStatus_EDMA_Success – It means submit transfer request succeed.
kStatus_EDMA_QueueFull – It means TCD queue is full. Submit transfer request is not allowed.
kStatus_EDMA_Busy – It means the given channel is busy, need to submit request later.

void EDMA_StartTransfer(edma_handle_t *handle)

eDMA starts transfer.

This function enables the channel request. Users can call this function after submitting the transfer request or before submitting the transfer request.

Parameters:

handle – eDMA handle pointer.

void EDMA_StopTransfer(edma_handle_t *handle)

eDMA stops transfer.

This function disables the channel request to pause the transfer. Users can call EDMA_StartTransfer() again to resume the transfer.

Parameters:

handle – eDMA handle pointer.

void EDMA_AbortTransfer(edma_handle_t *handle)

eDMA aborts transfer.

This function disables the channel request and clear transfer status bits. Users can submit another transfer after calling this API.

Parameters:

handle – DMA handle pointer.

static inline uint32_t EDMA_GetUnusedTCDNumber(edma_handle_t *handle)

Get unused TCD slot number.

This function gets current tcd index which is run. If the TCD pool pointer is NULL, it will return 0.

Parameters:

handle – DMA handle pointer.

Returns:

The unused tcd slot number.

static inline uint32_t EDMA_GetNextTCDAddress(edma_handle_t *handle)

Get the next tcd address.

This function gets the next tcd address. If this is last TCD, return 0.

Parameters:

handle – DMA handle pointer.

Returns:

The next TCD address.

void EDMA_HandleIRQ(edma_handle_t *handle)

eDMA IRQ handler for the current major loop transfer completion.

This function clears the channel major interrupt flag and calls the callback function if it is not NULL.

Parameters:

handle – eDMA handle pointer.

FSL_EDMA_DRIVER_VERSION

eDMA driver version

Version 2.3.0.

Version 2.3.2.

FSL_EDMA_DRIVER_VERSION

eDMA driver version

Version 2.3.2.

enum _edma_transfer_size

eDMA transfer configuration

Values:

enumerator kEDMA_TransferSize1Bytes: Source/Destination data transfer size is 1 byte every time

enumerator kEDMA_TransferSize2Bytes: Source/Destination data transfer size is 2 bytes every time

enumerator kEDMA_TransferSize4Bytes: Source/Destination data transfer size is 4 bytes every time

enumerator kEDMA_TransferSize8Bytes: Source/Destination data transfer size is 8 bytes every time

enumerator kEDMA_TransferSize16Bytes: Source/Destination data transfer size is 16 bytes every time

enumerator kEDMA_TransferSize32Bytes: Source/Destination data transfer size is 32 bytes every time

enumerator kEDMA_TransferSize64Bytes: Source/Destination data transfer size is 64 bytes every time

enum _edma_modulo

eDMA modulo configuration

Values:

enumerator kEDMA_ModuloDisable: Disable modulo

enumerator kEDMA_Modulo2bytes: Circular buffer size is 2 bytes.

enumerator kEDMA_Modulo4bytes: Circular buffer size is 4 bytes.

enumerator kEDMA_Modulo8bytes: Circular buffer size is 8 bytes.

enumerator kEDMA_Modulo16bytes: Circular buffer size is 16 bytes.

enumerator kEDMA_Modulo32bytes: Circular buffer size is 32 bytes.

enumerator kEDMA_Modulo64bytes: Circular buffer size is 64 bytes.

enumerator kEDMA_Modulo128bytes: Circular buffer size is 128 bytes.

enumerator kEDMA_Modulo256bytes: Circular buffer size is 256 bytes.

enumerator kEDMA_Modulo512bytes: Circular buffer size is 512 bytes.

enumerator kEDMA_Modulo1Kbytes: Circular buffer size is 1 K bytes.

enumerator kEDMA_Modulo2Kbytes: Circular buffer size is 2 K bytes.

enumerator kEDMA_Modulo4Kbytes: Circular buffer size is 4 K bytes.

enumerator kEDMA_Modulo8Kbytes: Circular buffer size is 8 K bytes.

enumerator kEDMA_Modulo16Kbytes: Circular buffer size is 16 K bytes.

enumerator kEDMA_Modulo32Kbytes: Circular buffer size is 32 K bytes.

enumerator kEDMA_Modulo64Kbytes: Circular buffer size is 64 K bytes.

enumerator kEDMA_Modulo128Kbytes: Circular buffer size is 128 K bytes.

enumerator kEDMA_Modulo256Kbytes: Circular buffer size is 256 K bytes.

enumerator kEDMA_Modulo512Kbytes: Circular buffer size is 512 K bytes.

enumerator kEDMA_Modulo1Mbytes: Circular buffer size is 1 M bytes.

enumerator kEDMA_Modulo2Mbytes: Circular buffer size is 2 M bytes.

enumerator kEDMA_Modulo4Mbytes: Circular buffer size is 4 M bytes.

enumerator kEDMA_Modulo8Mbytes: Circular buffer size is 8 M bytes.

enumerator kEDMA_Modulo16Mbytes: Circular buffer size is 16 M bytes.

enumerator kEDMA_Modulo32Mbytes: Circular buffer size is 32 M bytes.

enumerator kEDMA_Modulo64Mbytes: Circular buffer size is 64 M bytes.

enumerator kEDMA_Modulo128Mbytes: Circular buffer size is 128 M bytes.

enumerator kEDMA_Modulo256Mbytes: Circular buffer size is 256 M bytes.

enumerator kEDMA_Modulo512Mbytes: Circular buffer size is 512 M bytes.

enumerator kEDMA_Modulo1Gbytes: Circular buffer size is 1 G bytes.

enumerator kEDMA_Modulo2Gbytes: Circular buffer size is 2 G bytes.

enum _edma_bandwidth

Bandwidth control.

Values:

enumerator kEDMA_BandwidthStallNone: No eDMA engine stalls.

enumerator kEDMA_BandwidthStall4Cycle: eDMA engine stalls for 4 cycles after each read/write.

enumerator kEDMA_BandwidthStall8Cycle: eDMA engine stalls for 8 cycles after each read/write.

enum _edma_channel_link_type

Channel link type.

Values:

enumerator kEDMA_LinkNone: No channel link

enumerator kEDMA_MinorLink: Channel link after each minor loop

enumerator kEDMA_MajorLink: Channel link while major loop count exhausted

eDMA channel status flags, _edma_channel_status_flags

Values:

enumerator kEDMA_DoneFlag: DONE flag, set while transfer finished, CITER value exhausted

enumerator kEDMA_ErrorFlag: eDMA error flag, an error occurred in a transfer

enumerator kEDMA_InterruptFlag: eDMA interrupt flag, set while an interrupt occurred of this channel

eDMA channel error status flags, _edma_error_status_flags

Values:

enumerator kEDMA_DestinationBusErrorFlag: Bus error on destination address

enumerator kEDMA_SourceBusErrorFlag: Bus error on the source address

enumerator kEDMA_ScatterGatherErrorFlag: Error on the Scatter/Gather address, not 32byte aligned.

enumerator kEDMA_NbytesErrorFlag: NBYTES/CITER configuration error

enumerator kEDMA_DestinationOffsetErrorFlag: Destination offset not aligned with destination size

enumerator kEDMA_DestinationAddressErrorFlag: Destination address not aligned with destination size

enumerator kEDMA_SourceOffsetErrorFlag: Source offset not aligned with source size

enumerator kEDMA_SourceAddressErrorFlag: Source address not aligned with source size

enumerator kEDMA_TransferCanceledFlag: Transfer cancelled

enumerator kEDMA_ErrorChannelFlag: Error channel number of the cancelled channel number

enumerator kEDMA_ValidFlag: No error occurred, this bit is 0. Otherwise, it is 1.

eDMA channel system bus information, _edma_channel_sys_bus_info

Values:

enumerator kEDMA_PrivilegedAccessLevel: Privileged Access Level for DMA transfers. 0b - User protection level; 1b - Privileged protection level.

enumerator kEDMA_MasterId: DMA’s master ID when channel is active and master ID replication is enabled.

enum _edma_interrupt_enable

eDMA interrupt source

Values:

enumerator kEDMA_ErrorInterruptEnable: Enable interrupt while channel error occurs.

enumerator kEDMA_MajorInterruptEnable: Enable interrupt while major count exhausted.

enumerator kEDMA_HalfInterruptEnable: Enable interrupt while major count to half value.

enum _edma_transfer_type

eDMA transfer type

Values:

enumerator kEDMA_MemoryToMemory: Transfer from memory to memory

enumerator kEDMA_PeripheralToMemory: Transfer from peripheral to memory

enumerator kEDMA_MemoryToPeripheral: Transfer from memory to peripheral

eDMA transfer status, _edma_transfer_status

Values:

enumerator kStatus_EDMA_QueueFull: TCD queue is full.

enumerator kStatus_EDMA_Busy: Channel is busy and can’t handle the transfer request.

enum _edma_transfer_size

eDMA transfer configuration

Values:

enumerator kEDMA_TransferSize1Bytes: Source/Destination data transfer size is 1 byte every time

enumerator kEDMA_TransferSize2Bytes: Source/Destination data transfer size is 2 bytes every time

enumerator kEDMA_TransferSize4Bytes: Source/Destination data transfer size is 4 bytes every time

enumerator kEDMA_TransferSize8Bytes: Source/Destination data transfer size is 8 bytes every time

enumerator kEDMA_TransferSize16Bytes: Source/Destination data transfer size is 16 bytes every time

enumerator kEDMA_TransferSize32Bytes: Source/Destination data transfer size is 32 bytes every time

enumerator kEDMA_TransferSize64Bytes: Source/Destination data transfer size is 64 bytes every time

enum _edma_modulo

eDMA modulo configuration

Values:

enumerator kEDMA_ModuloDisable: Disable modulo

enumerator kEDMA_Modulo2bytes: Circular buffer size is 2 bytes.

enumerator kEDMA_Modulo4bytes: Circular buffer size is 4 bytes.

enumerator kEDMA_Modulo8bytes: Circular buffer size is 8 bytes.

enumerator kEDMA_Modulo16bytes: Circular buffer size is 16 bytes.

enumerator kEDMA_Modulo32bytes: Circular buffer size is 32 bytes.

enumerator kEDMA_Modulo64bytes: Circular buffer size is 64 bytes.

enumerator kEDMA_Modulo128bytes: Circular buffer size is 128 bytes.

enumerator kEDMA_Modulo256bytes: Circular buffer size is 256 bytes.

enumerator kEDMA_Modulo512bytes: Circular buffer size is 512 bytes.

enumerator kEDMA_Modulo1Kbytes: Circular buffer size is 1 K bytes.

enumerator kEDMA_Modulo2Kbytes: Circular buffer size is 2 K bytes.

enumerator kEDMA_Modulo4Kbytes: Circular buffer size is 4 K bytes.

enumerator kEDMA_Modulo8Kbytes: Circular buffer size is 8 K bytes.

enumerator kEDMA_Modulo16Kbytes: Circular buffer size is 16 K bytes.

enumerator kEDMA_Modulo32Kbytes: Circular buffer size is 32 K bytes.

enumerator kEDMA_Modulo64Kbytes: Circular buffer size is 64 K bytes.

enumerator kEDMA_Modulo128Kbytes: Circular buffer size is 128 K bytes.

enumerator kEDMA_Modulo256Kbytes: Circular buffer size is 256 K bytes.

enumerator kEDMA_Modulo512Kbytes: Circular buffer size is 512 K bytes.

enumerator kEDMA_Modulo1Mbytes: Circular buffer size is 1 M bytes.

enumerator kEDMA_Modulo2Mbytes: Circular buffer size is 2 M bytes.

enumerator kEDMA_Modulo4Mbytes: Circular buffer size is 4 M bytes.

enumerator kEDMA_Modulo8Mbytes: Circular buffer size is 8 M bytes.

enumerator kEDMA_Modulo16Mbytes: Circular buffer size is 16 M bytes.

enumerator kEDMA_Modulo32Mbytes: Circular buffer size is 32 M bytes.

enumerator kEDMA_Modulo64Mbytes: Circular buffer size is 64 M bytes.

enumerator kEDMA_Modulo128Mbytes: Circular buffer size is 128 M bytes.

enumerator kEDMA_Modulo256Mbytes: Circular buffer size is 256 M bytes.

enumerator kEDMA_Modulo512Mbytes: Circular buffer size is 512 M bytes.

enumerator kEDMA_Modulo1Gbytes: Circular buffer size is 1 G bytes.

enumerator kEDMA_Modulo2Gbytes: Circular buffer size is 2 G bytes.

enum _edma_bandwidth

Bandwidth control.

Values:

enumerator kEDMA_BandwidthStallNone: No eDMA engine stalls.

enumerator kEDMA_BandwidthStall4Cycle: eDMA engine stalls for 4 cycles after each read/write.

enumerator kEDMA_BandwidthStall8Cycle: eDMA engine stalls for 8 cycles after each read/write.

enum _edma_channel_link_type

Channel link type.

Values:

enumerator kEDMA_LinkNone: No channel link

enumerator kEDMA_MinorLink: Channel link after each minor loop

enumerator kEDMA_MajorLink: Channel link while major loop count exhausted

eDMA channel status flags, _edma_channel_status_flags

Values:

enumerator kEDMA_DoneFlag: DONE flag, set while transfer finished, CITER value exhausted

enumerator kEDMA_ErrorFlag: eDMA error flag, an error occurred in a transfer

enumerator kEDMA_InterruptFlag: eDMA interrupt flag, set while an interrupt occurred of this channel

eDMA channel error status flags, _edma_error_status_flags

Values:

enumerator kEDMA_DestinationBusErrorFlag: Bus error on destination address

enumerator kEDMA_SourceBusErrorFlag: Bus error on the source address

enumerator kEDMA_ScatterGatherErrorFlag: Error on the Scatter/Gather address, not 32byte aligned.

enumerator kEDMA_NbytesErrorFlag: NBYTES/CITER configuration error

enumerator kEDMA_DestinationOffsetErrorFlag: Destination offset not aligned with destination size

enumerator kEDMA_DestinationAddressErrorFlag: Destination address not aligned with destination size

enumerator kEDMA_SourceOffsetErrorFlag: Source offset not aligned with source size

enumerator kEDMA_SourceAddressErrorFlag: Source address not aligned with source size

enumerator kEDMA_TransferCanceledFlag: Transfer cancelled

enumerator kEDMA_ErrorChannelFlag: Error channel number of the cancelled channel number

enumerator kEDMA_ValidFlag: No error occurred, this bit is 0. Otherwise, it is 1.

eDMA channel system bus information, _edma_channel_sys_bus_info

Values:

enumerator kEDMA_PrivilegedAccessLevel: Privileged Access Level for DMA transfers. 0b - User protection level; 1b - Privileged protection level.

enumerator kEDMA_MasterId: DMA’s master ID when channel is active and master ID replication is enabled.

enum _edma_interrupt_enable

eDMA interrupt source

Values:

enumerator kEDMA_ErrorInterruptEnable: Enable interrupt while channel error occurs.

enumerator kEDMA_MajorInterruptEnable: Enable interrupt while major count exhausted.

enumerator kEDMA_HalfInterruptEnable: Enable interrupt while major count to half value.

enum _edma_transfer_type

eDMA transfer type

Values:

enumerator kEDMA_MemoryToMemory: Transfer from memory to memory

enumerator kEDMA_PeripheralToMemory: Transfer from peripheral to memory

enumerator kEDMA_MemoryToPeripheral: Transfer from memory to peripheral

eDMA transfer status, _edma_transfer_status

Values:

enumerator kStatus_EDMA_QueueFull: TCD queue is full.

enumerator kStatus_EDMA_Busy: Channel is busy and can’t handle the transfer request.

typedef enum _edma_transfer_size edma_transfer_size_t: eDMA transfer configuration

typedef enum _edma_modulo edma_modulo_t: eDMA modulo configuration

typedef enum _edma_bandwidth edma_bandwidth_t: Bandwidth control.

typedef enum _edma_channel_link_type edma_channel_link_type_t: Channel link type.

typedef enum _edma_interrupt_enable edma_interrupt_enable_t: eDMA interrupt source

typedef enum _edma_transfer_type edma_transfer_type_t: eDMA transfer type

typedef struct _edma_config edma_config_t: eDMA global configuration structure.

typedef struct _edma_transfer_config edma_transfer_config_t

eDMA transfer configuration

This structure configures the source/destination transfer attribute.

typedef struct _edma_channel_Preemption_config edma_channel_Preemption_config_t: eDMA channel priority configuration

typedef struct _edma_minor_offset_config edma_minor_offset_config_t: eDMA minor offset configuration

typedef struct _edma_tcd edma_tcd_t

eDMA TCD.

This structure is same as TCD register which is described in reference manual, and is used to configure the scatter/gather feature as a next hardware TCD.

typedef void (*edma_callback)(struct _edma_handle *handle, void *userData, bool transferDone, uint32_t tcds): Define callback function for eDMA.

typedef uint32_t (*edma_memorymap_callback)(uint32_t addr): Memroy map function callback for DMA.

typedef struct _edma_handle edma_handle_t: eDMA transfer handle structure

typedef enum _edma_transfer_size edma_transfer_size_t: eDMA transfer configuration

typedef enum _edma_modulo edma_modulo_t: eDMA modulo configuration

typedef enum _edma_bandwidth edma_bandwidth_t: Bandwidth control.

typedef enum _edma_channel_link_type edma_channel_link_type_t: Channel link type.

typedef enum _edma_interrupt_enable edma_interrupt_enable_t: eDMA interrupt source

typedef enum _edma_transfer_type edma_transfer_type_t: eDMA transfer type

typedef struct _edma_config edma_config_t: eDMA global configuration structure.

typedef struct _edma_transfer_config edma_transfer_config_t

eDMA transfer configuration

This structure configures the source/destination transfer attribute.

typedef struct _edma_channel_Preemption_config edma_channel_Preemption_config_t: eDMA channel priority configuration

typedef struct _edma_minor_offset_config edma_minor_offset_config_t: eDMA minor offset configuration

typedef struct _edma_tcd edma_tcd_t

eDMA TCD.

This structure is same as TCD register which is described in reference manual, and is used to configure the scatter/gather feature as a next hardware TCD.

typedef void (*edma_callback)(struct _edma_handle *handle, void *userData, bool transferDone, uint32_t tcds): Define callback function for eDMA.

typedef uint32_t (*edma_memorymap_callback)(uint32_t addr): Memroy map function callback for DMA.

typedef struct _edma_handle edma_handle_t: eDMA transfer handle structure

struct _edma_config

#include <fsl_ad_edma.h>

eDMA global configuration structure.

Public Members

bool enableMasterIdReplication: Enable (true) master ID replication. If Master ID replication is disabled, the privileged protection level (supervisor mode) for DMA transfers is used.

bool enableHaltOnError: Enable (true) transfer halt on error. Any error causes the HALT bit to set. Subsequently, all service requests are ignored until the HALT bit is cleared.

bool enableRoundRobinArbitration: Enable (true) round robin channel arbitration method or fixed priority arbitration is used for channel selection

bool enableDebugMode: Enable(true) eDMA debug mode. When in debug mode, the eDMA stalls the start of a new channel. Executing channels are allowed to complete.

struct _edma_transfer_config

#include <fsl_ad_edma.h>

eDMA transfer configuration

This structure configures the source/destination transfer attribute.

Public Members

uint32_t srcAddr: Source data address.

uint32_t destAddr: Destination data address.

edma_transfer_size_t srcTransferSize: Source data transfer size.

edma_transfer_size_t destTransferSize: Destination data transfer size.

int16_t srcOffset: Sign-extended offset applied to the current source address to form the next-state value as each source read is completed.

int16_t destOffset: Sign-extended offset applied to the current destination address to form the next-state value as each destination write is completed.

uint32_t minorLoopBytes: Bytes to transfer in a minor loop

uint32_t majorLoopCounts: Major loop iteration count.

struct _edma_channel_Preemption_config

#include <fsl_ad_edma.h>

eDMA channel priority configuration

Public Members

bool enableChannelPreemption: If true: a channel can be suspended by other channel with higher priority

bool enablePreemptAbility: If true: a channel can suspend other channel with low priority

uint8_t channelPriority: Channel priority

struct _edma_minor_offset_config

#include <fsl_ad_edma.h>

eDMA minor offset configuration

Public Members

bool enableSrcMinorOffset: Enable(true) or Disable(false) source minor loop offset.

bool enableDestMinorOffset: Enable(true) or Disable(false) destination minor loop offset.

uint32_t minorOffset: Offset for a minor loop mapping.

struct _edma_tcd

#include <fsl_ad_edma.h>

eDMA TCD.

This structure is same as TCD register which is described in reference manual, and is used to configure the scatter/gather feature as a next hardware TCD.

Public Members

__IO uint32_t SADDR: SADDR register, used to save source address

__IO uint16_t SOFF: SOFF register, save offset bytes every transfer

__IO uint16_t ATTR: ATTR register, source/destination transfer size and modulo

__IO uint32_t NBYTES: Nbytes register, minor loop length in bytes

__IO uint32_t SLAST: SLAST register

__IO uint32_t DADDR: DADDR register, used for destination address

__IO uint16_t DOFF: DOFF register, used for destination offset

__IO uint16_t CITER: CITER register, current minor loop numbers, for unfinished minor loop.

__IO uint32_t DLAST_SGA: DLASTSGA register, next stcd address used in scatter-gather mode

__IO uint16_t CSR: CSR register, for TCD control status

__IO uint16_t BITER: BITER register, begin minor loop count.

struct _edma_handle

#include <fsl_ad_edma.h>

eDMA transfer handle structure

Public Members

edma_callback callback: Callback function for major count exhausted.

void *userData: Callback function parameter.

DMA_AD_Type *base: eDMA peripheral base address.

edma_tcd_t *tcdPool: Pointer to memory stored TCDs.

uint8_t channel: eDMA channel number.

volatile int8_t header: The first TCD index.

volatile int8_t tail: The last TCD index.

volatile int8_t tcdUsed: The number of used TCD slots.

volatile int8_t tcdSize: The total number of TCD slots in the queue.

uint8_t flags: The status of the current channel.

DMA_Type *base: eDMA peripheral base address.

ENET: Ethernet MAC Driver

void ENET_GetDefaultConfig(enet_config_t *config)

Gets the ENET default configuration structure.

The purpose of this API is to get the default ENET MAC controller configure structure for ENET_Init(). User may use the initialized structure unchanged in ENET_Init(), or modify some fields of the structure before calling ENET_Init(). Example:

enet_config_t config;
ENET_GetDefaultConfig(&config);

Parameters:

config – The ENET mac controller configuration structure pointer.

status_t ENET_Up(ENET_Type *base, enet_handle_t *handle, const enet_config_t *config, const enet_buffer_config_t *bufferConfig, uint8_t *macAddr, uint32_t srcClock_Hz)

Initializes the ENET module.

This function initializes the module with the ENET configuration.

Note

ENET has two buffer descriptors legacy buffer descriptors and enhanced IEEE 1588 buffer descriptors. The legacy descriptor is used by default. To use the IEEE 1588 feature, use the enhanced IEEE 1588 buffer descriptor by defining “ENET_ENHANCEDBUFFERDESCRIPTOR_MODE” and calling ENET_Ptp1588Configure() to configure the 1588 feature and related buffers after calling ENET_Up().

Parameters:

base – ENET peripheral base address.
handle – ENET handler pointer.
config – ENET mac configuration structure pointer. The “enet_config_t” type mac configuration return from ENET_GetDefaultConfig can be used directly. It is also possible to verify the Mac configuration using other methods.
bufferConfig – ENET buffer configuration structure pointer. The buffer configuration should be prepared for ENET Initialization. It is the start address of “ringNum” enet_buffer_config structures. To support added multi-ring features in some soc and compatible with the previous enet driver version. For single ring supported, this bufferConfig is a buffer configure structure pointer, for multi-ring supported and used case, this bufferConfig pointer should be a buffer configure structure array pointer.
macAddr – ENET mac address of Ethernet device. This MAC address should be provided.
srcClock_Hz – The internal module clock source for MII clock.

Return values:

kStatus_Success – Succeed to initialize the ethernet driver.
kStatus_ENET_InitMemoryFail – Init fails since buffer memory is not enough.

status_t ENET_Init(ENET_Type *base, enet_handle_t *handle, const enet_config_t *config, const enet_buffer_config_t *bufferConfig, uint8_t *macAddr, uint32_t srcClock_Hz)

Initializes the ENET module.

This function ungates the module clock and initializes it with the ENET configuration.

Note

ENET has two buffer descriptors legacy buffer descriptors and enhanced IEEE 1588 buffer descriptors. The legacy descriptor is used by default. To use the IEEE 1588 feature, use the enhanced IEEE 1588 buffer descriptor by defining “ENET_ENHANCEDBUFFERDESCRIPTOR_MODE” and calling ENET_Ptp1588Configure() to configure the 1588 feature and related buffers after calling ENET_Init().

Parameters:

base – ENET peripheral base address.
handle – ENET handler pointer.
config – ENET mac configuration structure pointer. The “enet_config_t” type mac configuration return from ENET_GetDefaultConfig can be used directly. It is also possible to verify the Mac configuration using other methods.
bufferConfig – ENET buffer configuration structure pointer. The buffer configuration should be prepared for ENET Initialization. It is the start address of “ringNum” enet_buffer_config structures. To support added multi-ring features in some soc and compatible with the previous enet driver version. For single ring supported, this bufferConfig is a buffer configure structure pointer, for multi-ring supported and used case, this bufferConfig pointer should be a buffer configure structure array pointer.
macAddr – ENET mac address of Ethernet device. This MAC address should be provided.
srcClock_Hz – The internal module clock source for MII clock.

Return values:

kStatus_Success – Succeed to initialize the ethernet driver.
kStatus_ENET_InitMemoryFail – Init fails since buffer memory is not enough.

void ENET_Down(ENET_Type *base)

Stops the ENET module.

This function disables the ENET module.

Parameters:

base – ENET peripheral base address.

void ENET_Deinit(ENET_Type *base)

Deinitializes the ENET module.

This function gates the module clock, clears ENET interrupts, and disables the ENET module.

Parameters:

base – ENET peripheral base address.

static inline void ENET_Reset(ENET_Type *base)

Resets the ENET module.

This function restores the ENET module to reset state. Note that this function sets all registers to reset state. As a result, the ENET module can’t work after calling this function.

Parameters:

base – ENET peripheral base address.

void ENET_ResetHardware(void)

Resets the ENET hardware.

This function resets ENET related resources in the hardware.

void ENET_SetMII(ENET_Type *base, enet_mii_speed_t speed, enet_mii_duplex_t duplex)

Sets the ENET MII speed and duplex.

This API is provided to dynamically change the speed and dulpex for MAC.

Parameters:

base – ENET peripheral base address.
speed – The speed of the RMII mode.
duplex – The duplex of the RMII mode.

void ENET_SetSMI(ENET_Type *base, uint32_t srcClock_Hz, bool isPreambleDisabled)

Sets the ENET SMI(serial management interface)- MII management interface.

Parameters:

base – ENET peripheral base address.
srcClock_Hz – This is the ENET module clock frequency. See clock distribution.
isPreambleDisabled – The preamble disable flag.
- true Enables the preamble.
- false Disables the preamble.

static inline bool ENET_GetSMI(ENET_Type *base)

Gets the ENET SMI- MII management interface configuration.

This API is used to get the SMI configuration to check whether the MII management interface has been set.

Parameters:

base – ENET peripheral base address.

Returns:

The SMI setup status true or false.

static inline uint32_t ENET_ReadSMIData(ENET_Type *base)

Reads data from the PHY register through an SMI interface.

Parameters:

base – ENET peripheral base address.

Returns:

The data read from PHY

static inline void ENET_StartSMIWrite(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, enet_mii_write_t operation, uint16_t data)

Sends the MDIO IEEE802.3 Clause 22 format write command.

After calling this function, need to check whether the transmission is over then do next MDIO operation. For ease of use, encapsulated ENET_MDIOWrite() can be called. For customized requirements, implement with combining separated APIs.

Parameters:

base – ENET peripheral base address.
phyAddr – The PHY address. Range from 0 ~ 31.
regAddr – The PHY register address. Range from 0 ~ 31.
operation – The write operation.
data – The data written to PHY.

static inline void ENET_StartSMIRead(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, enet_mii_read_t operation)

Sends the MDIO IEEE802.3 Clause 22 format read command.

After calling this function, need to check whether the transmission is over then do next MDIO operation. For ease of use, encapsulated ENET_MDIORead() can be called. For customized requirements, implement with combining separated APIs.

Parameters:

base – ENET peripheral base address.
phyAddr – The PHY address. Range from 0 ~ 31.
regAddr – The PHY register address. Range from 0 ~ 31.
operation – The read operation.

status_t ENET_MDIOWrite(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, uint16_t data)

MDIO write with IEEE802.3 Clause 22 format.

Parameters:

base – ENET peripheral base address.
phyAddr – The PHY address. Range from 0 ~ 31.
regAddr – The PHY register. Range from 0 ~ 31.
data – The data written to PHY.

Returns:

kStatus_Success MDIO access succeeds.

Returns:

kStatus_Timeout MDIO access timeout.

status_t ENET_MDIORead(ENET_Type *base, uint8_t phyAddr, uint8_t regAddr, uint16_t *pData)

MDIO read with IEEE802.3 Clause 22 format.

Parameters:

base – ENET peripheral base address.
phyAddr – The PHY address. Range from 0 ~ 31.
regAddr – The PHY register. Range from 0 ~ 31.
pData – The data read from PHY.

Returns:

kStatus_Success MDIO access succeeds.

Returns:

kStatus_Timeout MDIO access timeout.

static inline void ENET_StartExtC45SMIWriteReg(ENET_Type *base, uint8_t portAddr, uint8_t devAddr, uint16_t regAddr)

Sends the MDIO IEEE802.3 Clause 45 format write register command.

After calling this function, need to check whether the transmission is over then do next MDIO operation. For ease of use, encapsulated ENET_MDIOC45Write()/ENET_MDIOC45Read() can be called. For customized requirements, implement with combining separated APIs.

Parameters:

base – ENET peripheral base address.
portAddr – The MDIO port address(PHY address).
devAddr – The device address.
regAddr – The PHY register address.

static inline void ENET_StartExtC45SMIWriteData(ENET_Type *base, uint8_t portAddr, uint8_t devAddr, uint16_t data)

Sends the MDIO IEEE802.3 Clause 45 format write data command.

After calling this function, need to check whether the transmission is over then do next MDIO operation. For ease of use, encapsulated ENET_MDIOC45Write() can be called. For customized requirements, implement with combining separated APIs.

Parameters:

base – ENET peripheral base address.
portAddr – The MDIO port address(PHY address).
devAddr – The device address.
data – The data written to PHY.

static inline void ENET_StartExtC45SMIReadData(ENET_Type *base, uint8_t portAddr, uint8_t devAddr)

Sends the MDIO IEEE802.3 Clause 45 format read data command.

After calling this function, need to check whether the transmission is over then do next MDIO operation. For ease of use, encapsulated ENET_MDIOC45Read() can be called. For customized requirements, implement with combining separated APIs.

Parameters:

base – ENET peripheral base address.
portAddr – The MDIO port address(PHY address).
devAddr – The device address.

status_t ENET_MDIOC45Write(ENET_Type *base, uint8_t portAddr, uint8_t devAddr, uint16_t regAddr, uint16_t data)

MDIO write with IEEE802.3 Clause 45 format.

Parameters:

base – ENET peripheral base address.
portAddr – The MDIO port address(PHY address).
devAddr – The device address.
regAddr – The PHY register address.
data – The data written to PHY.

Returns:

kStatus_Success MDIO access succeeds.

Returns:

kStatus_Timeout MDIO access timeout.

status_t ENET_MDIOC45Read(ENET_Type *base, uint8_t portAddr, uint8_t devAddr, uint16_t regAddr, uint16_t *pData)

MDIO read with IEEE802.3 Clause 45 format.

Parameters:

base – ENET peripheral base address.
portAddr – The MDIO port address(PHY address).
devAddr – The device address.
regAddr – The PHY register address.
pData – The data read from PHY.

Returns:

kStatus_Success MDIO access succeeds.

Returns:

kStatus_Timeout MDIO access timeout.

static inline void ENET_SetRGMIIClockDelay(ENET_Type *base, bool txEnabled, bool rxEnabled)

Control the usage of the delayed tx/rx RGMII clock.

Parameters:

base – ENET peripheral base address.
txEnabled – Enable or disable to generate the delayed version of RGMII_TXC.
rxEnabled – Enable or disable to use the delayed version of RGMII_RXC.

void ENET_SetMacAddr(ENET_Type *base, uint8_t *macAddr)

Sets the ENET module Mac address.

Parameters:

base – ENET peripheral base address.
macAddr – The six-byte Mac address pointer. The pointer is allocated by application and input into the API.

void ENET_GetMacAddr(ENET_Type *base, uint8_t *macAddr)

Gets the ENET module Mac address.

Parameters:

base – ENET peripheral base address.
macAddr – The six-byte Mac address pointer. The pointer is allocated by application and input into the API.

void ENET_AddMulticastGroup(ENET_Type *base, uint8_t *address)

Adds the ENET device to a multicast group.

Parameters:

base – ENET peripheral base address.
address – The six-byte multicast group address which is provided by application.

void ENET_LeaveMulticastGroup(ENET_Type *base, uint8_t *address)

Moves the ENET device from a multicast group.

Parameters:

base – ENET peripheral base address.
address – The six-byte multicast group address which is provided by application.

static inline void ENET_ActiveRead(ENET_Type *base)

Activates frame reception for multiple rings.

This function is to active the enet read process.

Note

This must be called after the MAC configuration and state are ready. It must be called after the ENET_Init(). This should be called when the frame reception is required.

Parameters:

base – ENET peripheral base address.

static inline void ENET_EnableSleepMode(ENET_Type *base, bool enable)

Enables/disables the MAC to enter sleep mode. This function is used to set the MAC enter sleep mode. When entering sleep mode, the magic frame wakeup interrupt should be enabled to wake up MAC from the sleep mode and reset it to normal mode.

Parameters:

base – ENET peripheral base address.
enable – True enable sleep mode, false disable sleep mode.

static inline void ENET_GetAccelFunction(ENET_Type *base, uint32_t *txAccelOption, uint32_t *rxAccelOption)

Gets ENET transmit and receive accelerator functions from MAC controller.

Parameters:

base – ENET peripheral base address.
txAccelOption – The transmit accelerator option. The “enet_tx_accelerator_t” is recommended to be used to as the mask to get the exact the accelerator option.
rxAccelOption – The receive accelerator option. The “enet_rx_accelerator_t” is recommended to be used to as the mask to get the exact the accelerator option.

static inline void ENET_EnableInterrupts(ENET_Type *base, uint32_t mask)

Enables the ENET interrupt.

This function enables the ENET interrupt according to the provided mask. The mask is a logical OR of enumeration members. See enet_interrupt_enable_t. For example, to enable the TX frame interrupt and RX frame interrupt, do the following.

ENET_EnableInterrupts(ENET, kENET_TxFrameInterrupt | kENET_RxFrameInterrupt);

Parameters:

base – ENET peripheral base address.
mask – ENET interrupts to enable. This is a logical OR of the enumeration enet_interrupt_enable_t.

static inline void ENET_DisableInterrupts(ENET_Type *base, uint32_t mask)

Disables the ENET interrupt.

This function disables the ENET interrupts according to the provided mask. The mask is a logical OR of enumeration members. See enet_interrupt_enable_t. For example, to disable the TX frame interrupt and RX frame interrupt, do the following.

ENET_DisableInterrupts(ENET, kENET_TxFrameInterrupt | kENET_RxFrameInterrupt);

Parameters:

base – ENET peripheral base address.
mask – ENET interrupts to disable. This is a logical OR of the enumeration enet_interrupt_enable_t.

static inline uint32_t ENET_GetInterruptStatus(ENET_Type *base)

Gets the ENET interrupt status flag.

Parameters:

base – ENET peripheral base address.

Returns:

The event status of the interrupt source. This is the logical OR of members of the enumeration enet_interrupt_enable_t.

static inline void ENET_ClearInterruptStatus(ENET_Type *base, uint32_t mask)

Clears the ENET interrupt events status flag.

This function clears enabled ENET interrupts according to the provided mask. The mask is a logical OR of enumeration members. See the enet_interrupt_enable_t. For example, to clear the TX frame interrupt and RX frame interrupt, do the following.

ENET_ClearInterruptStatus(ENET, kENET_TxFrameInterrupt | kENET_RxFrameInterrupt);

Parameters:

base – ENET peripheral base address.
mask – ENET interrupt source to be cleared. This is the logical OR of members of the enumeration enet_interrupt_enable_t.

void ENET_SetRxISRHandler(ENET_Type *base, enet_isr_t ISRHandler)

Set the second level Rx IRQ handler.

Parameters:

base – ENET peripheral base address.
ISRHandler – The handler to install.

void ENET_SetTxISRHandler(ENET_Type *base, enet_isr_t ISRHandler)

Set the second level Tx IRQ handler.

Parameters:

base – ENET peripheral base address.
ISRHandler – The handler to install.

void ENET_SetErrISRHandler(ENET_Type *base, enet_isr_t ISRHandler)

Set the second level Err IRQ handler.

Parameters:

base – ENET peripheral base address.
ISRHandler – The handler to install.

void ENET_GetRxErrBeforeReadFrame(enet_handle_t *handle, enet_data_error_stats_t *eErrorStatic, uint8_t ringId)

Gets the error statistics of a received frame for ENET specified ring.

This API must be called after the ENET_GetRxFrameSize and before the ENET_ReadFrame(). If the ENET_GetRxFrameSize returns kStatus_ENET_RxFrameError, the ENET_GetRxErrBeforeReadFrame can be used to get the exact error statistics. This is an example.

status = ENET_GetRxFrameSize(&g_handle, &length, 0);
if (status == kStatus_ENET_RxFrameError)
{
    Comments: Get the error information of the received frame.
    ENET_GetRxErrBeforeReadFrame(&g_handle, &eErrStatic, 0);
    Comments: update the receive buffer.
    ENET_ReadFrame(EXAMPLE_ENET, &g_handle, NULL, 0);
}

Parameters:

handle – The ENET handler structure pointer. This is the same handler pointer used in the ENET_Init.
eErrorStatic – The error statistics structure pointer.
ringId – The ring index, range from 0 ~ (FSL_FEATURE_ENET_INSTANCE_QUEUEn(x) - 1).

void ENET_EnableStatistics(ENET_Type *base, bool enable)

Enables/disables collection of transfer statistics.

Note that this function does not reset any of the already collected data, use the function ENET_ResetStatistics to clear the transfer statistics if needed.

Parameters:

base – ENET peripheral base address.
enable – True enable statistics collection, false disable statistics collection.

void ENET_GetStatistics(ENET_Type *base, enet_transfer_stats_t *statistics)

Gets transfer statistics.

Copies the actual value of hardware counters into the provided structure. Calling this function does not reset the counters in hardware.

Parameters:

base – ENET peripheral base address.
statistics – The statistics structure pointer.

void ENET_ResetStatistics(ENET_Type *base)

Resets transfer statistics.

Sets the value of hardware transfer counters to zero.

Parameters:

base – ENET peripheral base address.

status_t ENET_GetRxFrameSize(enet_handle_t *handle, uint32_t *length, uint8_t ringId)

Gets the size of the read frame for specified ring.

This function gets a received frame size from the ENET buffer descriptors.

Note

The FCS of the frame is automatically removed by MAC and the size is the length without the FCS. After calling ENET_GetRxFrameSize, ENET_ReadFrame() should be called to receive frame and update the BD if the result is not “kStatus_ENET_RxFrameEmpty”.

Parameters:

handle – The ENET handler structure. This is the same handler pointer used in the ENET_Init.
length – The length of the valid frame received.
ringId – The ring index or ring number.

Return values:

kStatus_ENET_RxFrameEmpty – No frame received. Should not call ENET_ReadFrame to read frame.
kStatus_ENET_RxFrameError – Data error happens. ENET_ReadFrame should be called with NULL data and NULL length to update the receive buffers.
kStatus_Success – Receive a frame Successfully then the ENET_ReadFrame should be called with the right data buffer and the captured data length input.

status_t ENET_ReadFrame(ENET_Type *base, enet_handle_t *handle, uint8_t *data, uint32_t length, uint8_t ringId, uint32_t *ts)

Reads a frame from the ENET device. This function reads a frame (both the data and the length) from the ENET buffer descriptors. User can get timestamp through ts pointer if the ts is not NULL.

Note

It doesn’t store the timestamp in the receive timestamp queue. The ENET_GetRxFrameSize should be used to get the size of the prepared data buffer. This API uses memcpy to copy data from DMA buffer to application buffer, 4 bytes aligned data buffer in 32 bits platforms provided by user may let compiler use optimization instruction to reduce time consumption. This is an example:

uint32_t length;
enet_handle_t g_handle;
Comments: Get the received frame size firstly.
status = ENET_GetRxFrameSize(&g_handle, &length, 0);
if (length != 0)
{
    Comments: Allocate memory here with the size of "length"
    uint8_t *data = memory allocate interface;
    if (!data)
    {
        ENET_ReadFrame(ENET, &g_handle, NULL, 0, 0, NULL);
        Comments: Add the console warning log.
    }
    else
    {
        status = ENET_ReadFrame(ENET, &g_handle, data, length, 0, NULL);
        Comments: Call stack input API to deliver the data to stack
    }
}
else if (status == kStatus_ENET_RxFrameError)
{
    Comments: Update the received buffer when a error frame is received.
    ENET_ReadFrame(ENET, &g_handle, NULL, 0, 0, NULL);
}

Parameters:

base – ENET peripheral base address.
handle – The ENET handler structure. This is the same handler pointer used in the ENET_Init.
data – The data buffer provided by user to store the frame which memory size should be at least “length”.
length – The size of the data buffer which is still the length of the received frame.
ringId – The ring index or ring number.
ts – The timestamp address to store received timestamp.

Returns:

The execute status, successful or failure.

status_t ENET_SendFrame(ENET_Type *base, enet_handle_t *handle, const uint8_t *data, uint32_t length, uint8_t ringId, bool tsFlag, void *context)

Transmits an ENET frame for specified ring.

Note

The CRC is automatically appended to the data. Input the data to send without the CRC. This API uses memcpy to copy data from DMA buffer to application buffer, 4 bytes aligned data buffer in 32 bits platforms provided by user may let compiler use optimization instruction to reduce time consumption.

Parameters:

base – ENET peripheral base address.
handle – The ENET handler pointer. This is the same handler pointer used in the ENET_Init.
data – The data buffer provided by user to send.
length – The length of the data to send.
ringId – The ring index or ring number.
tsFlag – Timestamp enable flag.
context – Used by user to handle some events after transmit over.

Return values:

kStatus_Success – Send frame succeed.
kStatus_ENET_TxFrameBusy – Transmit buffer descriptor is busy under transmission. The transmit busy happens when the data send rate is over the MAC capacity. The waiting mechanism is recommended to be added after each call return with kStatus_ENET_TxFrameBusy.

status_t ENET_SetTxReclaim(enet_handle_t *handle, bool isEnable, uint8_t ringId)

Enable or disable tx descriptors reclaim mechanism.

Note

This function must be called when no pending send frame action. Set enable if you want to reclaim context or timestamp in interrupt.

Parameters:

handle – The ENET handler pointer. This is the same handler pointer used in the ENET_Init.
isEnable – Enable or disable flag.
ringId – The ring index or ring number.

Return values:

kStatus_Success – Succeed to enable/disable Tx reclaim.
kStatus_Fail – Fail to enable/disable Tx reclaim.

void ENET_ReclaimTxDescriptor(ENET_Type *base, enet_handle_t *handle, uint8_t ringId)

Reclaim tx descriptors. This function is used to update the tx descriptor status and store the tx timestamp when the 1588 feature is enabled. This is called by the transmit interupt IRQ handler after the complete of a frame transmission.

Parameters:

base – ENET peripheral base address.
handle – The ENET handler pointer. This is the same handler pointer used in the ENET_Init.
ringId – The ring index or ring number.

status_t ENET_GetRxFrame(ENET_Type *base, enet_handle_t *handle, enet_rx_frame_struct_t *rxFrame, uint8_t ringId)

Receives one frame in specified BD ring with zero copy.

This function uses the user-defined allocation and free callbacks. Every time application gets one frame through this function, driver stores the buffer address(es) in enet_buffer_struct_t and allocate new buffer(s) for the BD(s). If there’s no memory buffer in the pool, this function drops current one frame to keep the Rx frame in BD ring is as fresh as possible.

Note

Application must provide a memory pool including at least BD number + n buffers in order for this function to work properly, because each BD must always take one buffer while driver is running, then other extra n buffer(s) can be taken by application. Here n is the ceil(max_frame_length(set by RCR) / bd_rx_size(set by MRBR)). Application must also provide an array structure in rxFrame->rxBuffArray with n index to receive one complete frame in any case.

Parameters:

base – ENET peripheral base address.
handle – The ENET handler pointer. This is the same handler pointer used in the ENET_Init.
rxFrame – The received frame information structure provided by user.
ringId – The ring index or ring number.

Return values:

kStatus_Success – Succeed to get one frame and allocate new memory for Rx buffer.
kStatus_ENET_RxFrameEmpty – There’s no Rx frame in the BD.
kStatus_ENET_RxFrameError – There’s issue in this receiving.
kStatus_ENET_RxFrameDrop – There’s no new buffer memory for BD, drop this frame.

status_t ENET_StartTxFrame(ENET_Type *base, enet_handle_t *handle, enet_tx_frame_struct_t *txFrame, uint8_t ringId)

Sends one frame in specified BD ring with zero copy.

This function supports scattered buffer transmit, user needs to provide the buffer array.

Note

Tx reclaim should be enabled to ensure the Tx buffer ownership can be given back to application after Tx is over.

Parameters:

base – ENET peripheral base address.
handle – The ENET handler pointer. This is the same handler pointer used in the ENET_Init.
txFrame – The Tx frame structure.
ringId – The ring index or ring number.

Return values:

kStatus_Success – Succeed to send one frame.
kStatus_ENET_TxFrameBusy – The BD is not ready for Tx or the reclaim operation still not finishs.
kStatus_ENET_TxFrameOverLen – The Tx frame length is over max ethernet frame length.

void ENET_TransmitIRQHandler(ENET_Type *base, enet_handle_t *handle)

The transmit IRQ handler.

Parameters:

base – ENET peripheral base address.
handle – The ENET handler pointer.

void ENET_ReceiveIRQHandler(ENET_Type *base, enet_handle_t *handle)

The receive IRQ handler.

Parameters:

base – ENET peripheral base address.
handle – The ENET handler pointer.

void ENET_ErrorIRQHandler(ENET_Type *base, enet_handle_t *handle)

Some special IRQ handler including the error, mii, wakeup irq handler.

Parameters:

base – ENET peripheral base address.
handle – The ENET handler pointer.

void ENET_Ptp1588IRQHandler(ENET_Type *base)

the common IRQ handler for the 1588 irq handler.

This is used for the 1588 timer interrupt.

Parameters:

base – ENET peripheral base address.

void ENET_CommonFrame0IRQHandler(ENET_Type *base)

the common IRQ handler for the tx/rx/error etc irq handler.

This is used for the combined tx/rx/error interrupt for single/mutli-ring (frame 0).

Parameters:

base – ENET peripheral base address.

FSL_ENET_DRIVER_VERSION: Defines the driver version.

ENET_BUFFDESCRIPTOR_RX_EMPTY_MASK: Empty bit mask.

ENET_BUFFDESCRIPTOR_RX_SOFTOWNER1_MASK: Software owner one mask.

ENET_BUFFDESCRIPTOR_RX_WRAP_MASK: Next buffer descriptor is the start address.

ENET_BUFFDESCRIPTOR_RX_SOFTOWNER2_Mask: Software owner two mask.

ENET_BUFFDESCRIPTOR_RX_LAST_MASK: Last BD of the frame mask.

ENET_BUFFDESCRIPTOR_RX_MISS_MASK: Received because of the promiscuous mode.

ENET_BUFFDESCRIPTOR_RX_BROADCAST_MASK: Broadcast packet mask.

ENET_BUFFDESCRIPTOR_RX_MULTICAST_MASK: Multicast packet mask.

ENET_BUFFDESCRIPTOR_RX_LENVLIOLATE_MASK: Length violation mask.

ENET_BUFFDESCRIPTOR_RX_NOOCTET_MASK: Non-octet aligned frame mask.

ENET_BUFFDESCRIPTOR_RX_CRC_MASK: CRC error mask.

ENET_BUFFDESCRIPTOR_RX_OVERRUN_MASK: FIFO overrun mask.

ENET_BUFFDESCRIPTOR_RX_TRUNC_MASK: Frame is truncated mask.

ENET_BUFFDESCRIPTOR_TX_READY_MASK: Ready bit mask.

ENET_BUFFDESCRIPTOR_TX_SOFTOWENER1_MASK: Software owner one mask.

ENET_BUFFDESCRIPTOR_TX_WRAP_MASK: Wrap buffer descriptor mask.

ENET_BUFFDESCRIPTOR_TX_SOFTOWENER2_MASK: Software owner two mask.

ENET_BUFFDESCRIPTOR_TX_LAST_MASK: Last BD of the frame mask.

ENET_BUFFDESCRIPTOR_TX_TRANMITCRC_MASK: Transmit CRC mask.

ENET_FRAME_MAX_FRAMELEN: Default maximum Ethernet frame size without VLAN tag.

ENET_FRAME_VLAN_TAGLEN: Ethernet single VLAN tag size.

ENET_FRAME_CRC_LEN: CRC size in a frame.

ENET_FRAME_TX_LEN_LIMITATION(x)

ENET_FIFO_MIN_RX_FULL: ENET minimum receive FIFO full.

ENET_RX_MIN_BUFFERSIZE: ENET minimum buffer size.

ENET_PHY_MAXADDRESS: Maximum PHY address.

ENET_TX_INTERRUPT: Enet Tx interrupt flag.

ENET_RX_INTERRUPT: Enet Rx interrupt flag.

ENET_TS_INTERRUPT: Enet timestamp interrupt flag.

ENET_ERR_INTERRUPT: Enet error interrupt flag.

Defines the status return codes for transaction.

Values:

enumerator kStatus_ENET_InitMemoryFail: Init fails since buffer memory is not enough.

enumerator kStatus_ENET_RxFrameError: A frame received but data error happen.

enumerator kStatus_ENET_RxFrameFail: Failed to receive a frame.

enumerator kStatus_ENET_RxFrameEmpty: No frame arrive.

enumerator kStatus_ENET_RxFrameDrop: Rx frame is dropped since no buffer memory.

enumerator kStatus_ENET_TxFrameOverLen: Tx frame over length.

enumerator kStatus_ENET_TxFrameBusy: Tx buffer descriptors are under process.

enumerator kStatus_ENET_TxFrameFail: Transmit frame fail.

enum _enet_mii_mode

Defines the MII/RMII/RGMII mode for data interface between the MAC and the PHY.

Values:

enumerator kENET_MiiMode: MII mode for data interface.

enumerator kENET_RmiiMode: RMII mode for data interface.

enumerator kENET_RgmiiMode: RGMII mode for data interface.

enum _enet_mii_speed

Defines the 10/100/1000 Mbps speed for the MII data interface.

Notice: “kENET_MiiSpeed1000M” only supported when mii mode is “kENET_RgmiiMode”.

Values:

enumerator kENET_MiiSpeed10M: Speed 10 Mbps.

enumerator kENET_MiiSpeed100M: Speed 100 Mbps.

enumerator kENET_MiiSpeed1000M: Speed 1000M bps.

enum _enet_mii_duplex

Defines the half or full duplex for the MII data interface.

Values:

enumerator kENET_MiiHalfDuplex: Half duplex mode.

enumerator kENET_MiiFullDuplex: Full duplex mode.

enum _enet_mii_write

Define the MII opcode for normal MDIO_CLAUSES_22 Frame.

Values:

enumerator kENET_MiiWriteNoCompliant: Write frame operation, but not MII-compliant.

enumerator kENET_MiiWriteValidFrame: Write frame operation for a valid MII management frame.

enum _enet_mii_read

Defines the read operation for the MII management frame.

Values:

enumerator kENET_MiiReadValidFrame: Read frame operation for a valid MII management frame.

enumerator kENET_MiiReadNoCompliant: Read frame operation, but not MII-compliant.

enum _enet_mii_extend_opcode

Define the MII opcode for extended MDIO_CLAUSES_45 Frame.

Values:

enumerator kENET_MiiAddrWrite_C45: Address Write operation.

enumerator kENET_MiiWriteFrame_C45: Write frame operation for a valid MII management frame.

enumerator kENET_MiiReadFrame_C45: Read frame operation for a valid MII management frame.

enum _enet_special_control_flag

Defines a special configuration for ENET MAC controller.

These control flags are provided for special user requirements. Normally, these control flags are unused for ENET initialization. For special requirements, set the flags to macSpecialConfig in the enet_config_t. The kENET_ControlStoreAndFwdDisable is used to disable the FIFO store and forward. FIFO store and forward means that the FIFO read/send is started when a complete frame is stored in TX/RX FIFO. If this flag is set, configure rxFifoFullThreshold and txFifoWatermark in the enet_config_t.

Values:

enumerator kENET_ControlFlowControlEnable: Enable ENET flow control: pause frame.

enumerator kENET_ControlRxPayloadCheckEnable: Enable ENET receive payload length check.

enumerator kENET_ControlRxPadRemoveEnable: Padding is removed from received frames.

enumerator kENET_ControlRxBroadCastRejectEnable: Enable broadcast frame reject.

enumerator kENET_ControlMacAddrInsert: Enable MAC address insert.

enumerator kENET_ControlStoreAndFwdDisable: Enable FIFO store and forward.

enumerator kENET_ControlSMIPreambleDisable: Enable SMI preamble.

enumerator kENET_ControlPromiscuousEnable: Enable promiscuous mode.

enumerator kENET_ControlMIILoopEnable: Enable ENET MII loop back.

enumerator kENET_ControlVLANTagEnable: Enable normal VLAN (single vlan tag).

enumerator kENET_ControlSVLANEnable: Enable S-VLAN.

enumerator kENET_ControlVLANUseSecondTag: Enable extracting the second vlan tag for further processing.

enum _enet_interrupt_enable

List of interrupts supported by the peripheral. This enumeration uses one-bit encoding to allow a logical OR of multiple members. Members usually map to interrupt enable bits in one or more peripheral registers.

Values:

enumerator kENET_BabrInterrupt: Babbling receive error interrupt source

enumerator kENET_BabtInterrupt: Babbling transmit error interrupt source

enumerator kENET_GraceStopInterrupt: Graceful stop complete interrupt source

enumerator kENET_TxFrameInterrupt: TX FRAME interrupt source

enumerator kENET_TxBufferInterrupt: TX BUFFER interrupt source

enumerator kENET_RxFrameInterrupt: RX FRAME interrupt source

enumerator kENET_RxBufferInterrupt: RX BUFFER interrupt source

enumerator kENET_MiiInterrupt: MII interrupt source

enumerator kENET_EBusERInterrupt: Ethernet bus error interrupt source

enumerator kENET_LateCollisionInterrupt: Late collision interrupt source

enumerator kENET_RetryLimitInterrupt: Collision Retry Limit interrupt source

enumerator kENET_UnderrunInterrupt: Transmit FIFO underrun interrupt source

enumerator kENET_PayloadRxInterrupt: Payload Receive error interrupt source

enumerator kENET_WakeupInterrupt: WAKEUP interrupt source

enumerator kENET_TsAvailInterrupt: TS AVAIL interrupt source for PTP

enumerator kENET_TsTimerInterrupt: TS WRAP interrupt source for PTP

enum _enet_event

Defines the common interrupt event for callback use.

Values:

enumerator kENET_RxEvent: Receive event.

enumerator kENET_TxEvent: Transmit event.

enumerator kENET_ErrEvent: Error event: BABR/BABT/EBERR/LC/RL/UN/PLR .

enumerator kENET_WakeUpEvent: Wake up from sleep mode event.

enumerator kENET_TimeStampEvent: Time stamp event.

enumerator kENET_TimeStampAvailEvent: Time stamp available event.

enum _enet_idle_slope

Defines certain idle slope for bandwidth fraction.

Values:

enumerator kENET_IdleSlope1: The bandwidth fraction is about 0.002.

enumerator kENET_IdleSlope2: The bandwidth fraction is about 0.003.

enumerator kENET_IdleSlope4: The bandwidth fraction is about 0.008.

enumerator kENET_IdleSlope8: The bandwidth fraction is about 0.02.

enumerator kENET_IdleSlope16: The bandwidth fraction is about 0.03.

enumerator kENET_IdleSlope32: The bandwidth fraction is about 0.06.

enumerator kENET_IdleSlope64: The bandwidth fraction is about 0.11.

enumerator kENET_IdleSlope128: The bandwidth fraction is about 0.20.

enumerator kENET_IdleSlope256: The bandwidth fraction is about 0.33.

enumerator kENET_IdleSlope384: The bandwidth fraction is about 0.43.

enumerator kENET_IdleSlope512: The bandwidth fraction is about 0.50.

enumerator kENET_IdleSlope640: The bandwidth fraction is about 0.56.

enumerator kENET_IdleSlope768: The bandwidth fraction is about 0.60.

enumerator kENET_IdleSlope896: The bandwidth fraction is about 0.64.

enumerator kENET_IdleSlope1024: The bandwidth fraction is about 0.67.

enumerator kENET_IdleSlope1152: The bandwidth fraction is about 0.69.

enumerator kENET_IdleSlope1280: The bandwidth fraction is about 0.71.

enumerator kENET_IdleSlope1408: The bandwidth fraction is about 0.73.

enumerator kENET_IdleSlope1536: The bandwidth fraction is about 0.75.

enum _enet_tx_accelerator

Defines the transmit accelerator configuration.

Note that the hardware does not insert ICMPv6 protocol checksums as mentioned in errata ERR052152.

Values:

enumerator kENET_TxAccelIsShift16Enabled: Transmit FIFO shift-16.

enumerator kENET_TxAccelIpCheckEnabled: Insert IP header checksum.

enumerator kENET_TxAccelProtoCheckEnabled: Insert protocol checksum (TCP, UDP, ICMPv4).

enum _enet_rx_accelerator

Defines the receive accelerator configuration.

Note that the hardware does not validate ICMPv6 protocol checksums as mentioned in errata ERR052152.

Values:

enumerator kENET_RxAccelPadRemoveEnabled: Padding removal for short IP frames.

enumerator kENET_RxAccelIpCheckEnabled: Discard with wrong IP header checksum.

enumerator kENET_RxAccelProtoCheckEnabled: Discard with wrong protocol checksum (TCP, UDP, ICMPv4).

enumerator kENET_RxAccelMacCheckEnabled: Discard with Mac layer errors.

enumerator kENET_RxAccelisShift16Enabled: Receive FIFO shift-16.

typedef enum _enet_mii_mode enet_mii_mode_t: Defines the MII/RMII/RGMII mode for data interface between the MAC and the PHY.

typedef enum _enet_mii_speed enet_mii_speed_t

Defines the 10/100/1000 Mbps speed for the MII data interface.

Notice: “kENET_MiiSpeed1000M” only supported when mii mode is “kENET_RgmiiMode”.

typedef enum _enet_mii_duplex enet_mii_duplex_t: Defines the half or full duplex for the MII data interface.

typedef enum _enet_mii_write enet_mii_write_t: Define the MII opcode for normal MDIO_CLAUSES_22 Frame.

typedef enum _enet_mii_read enet_mii_read_t: Defines the read operation for the MII management frame.

typedef enum _enet_mii_extend_opcode enet_mii_extend_opcode: Define the MII opcode for extended MDIO_CLAUSES_45 Frame.

typedef enum _enet_special_control_flag enet_special_control_flag_t

Defines a special configuration for ENET MAC controller.

These control flags are provided for special user requirements. Normally, these control flags are unused for ENET initialization. For special requirements, set the flags to macSpecialConfig in the enet_config_t. The kENET_ControlStoreAndFwdDisable is used to disable the FIFO store and forward. FIFO store and forward means that the FIFO read/send is started when a complete frame is stored in TX/RX FIFO. If this flag is set, configure rxFifoFullThreshold and txFifoWatermark in the enet_config_t.

typedef enum _enet_interrupt_enable enet_interrupt_enable_t: List of interrupts supported by the peripheral. This enumeration uses one-bit encoding to allow a logical OR of multiple members. Members usually map to interrupt enable bits in one or more peripheral registers.

typedef enum _enet_event enet_event_t: Defines the common interrupt event for callback use.

typedef enum _enet_idle_slope enet_idle_slope_t: Defines certain idle slope for bandwidth fraction.

typedef enum _enet_tx_accelerator enet_tx_accelerator_t

Defines the transmit accelerator configuration.

Note that the hardware does not insert ICMPv6 protocol checksums as mentioned in errata ERR052152.

typedef enum _enet_rx_accelerator enet_rx_accelerator_t

Defines the receive accelerator configuration.

Note that the hardware does not validate ICMPv6 protocol checksums as mentioned in errata ERR052152.

typedef struct _enet_rx_bd_struct enet_rx_bd_struct_t: Defines the receive buffer descriptor structure for the little endian system.

typedef struct _enet_tx_bd_struct enet_tx_bd_struct_t: Defines the enhanced transmit buffer descriptor structure for the little endian system.

typedef struct _enet_data_error_stats enet_data_error_stats_t: Defines the ENET data error statistics structure.

typedef struct _enet_rx_frame_error enet_rx_frame_error_t: Defines the Rx frame error structure.

typedef struct _enet_transfer_stats enet_transfer_stats_t: Defines the ENET transfer statistics structure.

typedef struct enet_frame_info enet_frame_info_t: Defines the frame info structure.

typedef struct _enet_tx_dirty_ring enet_tx_dirty_ring_t: Defines the ENET transmit dirty addresses ring/queue structure.

typedef void *(*enet_rx_alloc_callback_t)(ENET_Type *base, void *userData, uint8_t ringId): Defines the ENET Rx memory buffer alloc function pointer.

typedef void (*enet_rx_free_callback_t)(ENET_Type *base, void *buffer, void *userData, uint8_t ringId): Defines the ENET Rx memory buffer free function pointer.

typedef struct _enet_buffer_config enet_buffer_config_t

Defines the receive buffer descriptor configuration structure.

Note that for the internal DMA requirements, the buffers have a corresponding alignment requirements.

The aligned receive and transmit buffer size must be evenly divisible by ENET_BUFF_ALIGNMENT. when the data buffers are in cacheable region when cache is enabled, all those size should be aligned to the maximum value of “ENET_BUFF_ALIGNMENT” and the cache line size.
The aligned transmit and receive buffer descriptor start address must be at least 64 bit aligned. However, it’s recommended to be evenly divisible by ENET_BUFF_ALIGNMENT. buffer descriptors should be put in non-cacheable region when cache is enabled.
The aligned transmit and receive data buffer start address must be evenly divisible by ENET_BUFF_ALIGNMENT. Receive buffers should be continuous with the total size equal to “rxBdNumber * rxBuffSizeAlign”. Transmit buffers should be continuous with the total size equal to “txBdNumber * txBuffSizeAlign”. when the data buffers are in cacheable region when cache is enabled, all those size should be aligned to the maximum value of “ENET_BUFF_ALIGNMENT” and the cache line size.

typedef struct _enet_intcoalesce_config enet_intcoalesce_config_t: Defines the interrupt coalescing configure structure.

typedef struct _enet_avb_config enet_avb_config_t

Defines the ENET AVB Configure structure.

This is used for to configure the extended ring 1 and ring 2.

The classification match format is (CMP3 << 12) | (CMP2 << 8) | (CMP1 << 4) | CMP0. composed of four 3-bit compared VLAN priority field cmp0~cmp3, cm0 ~ cmp3 are used in parallel.

If CMP1,2,3 are not unused, please set them to the same value as CMP0.

The idleSlope is used to calculate the Band Width fraction, BW fraction = 1 / (1 + 512/idleSlope). For avb configuration, the BW fraction of Class 1 and Class 2 combined must not exceed 0.75.

typedef struct _enet_handle enet_handle_t

typedef void (*enet_callback_t)(ENET_Type *base, enet_handle_t *handle, enet_event_t event, enet_frame_info_t *frameInfo, void *userData): ENET callback function.

typedef struct _enet_config enet_config_t

Defines the basic configuration structure for the ENET device.

Note:

macSpecialConfig is used for a special control configuration, A logical OR of “enet_special_control_flag_t”. For a special configuration for MAC, set this parameter to 0.
txWatermark is used for a cut-through operation. It is in steps of 64 bytes: 0/1 - 64 bytes written to TX FIFO before transmission of a frame begins. 2 - 128 bytes written to TX FIFO …. 3 - 192 bytes written to TX FIFO …. The maximum of txWatermark is 0x2F - 4032 bytes written to TX FIFO …. txWatermark allows minimizing the transmit latency to set the txWatermark to 0 or 1 or for larger bus access latency 3 or larger due to contention for the system bus.
rxFifoFullThreshold is similar to the txWatermark for cut-through operation in RX. It is in 64-bit words. The minimum is ENET_FIFO_MIN_RX_FULL and the maximum is 0xFF. If the end of the frame is stored in FIFO and the frame size if smaller than the txWatermark, the frame is still transmitted. The rule is the same for rxFifoFullThreshold in the receive direction.
When “kENET_ControlFlowControlEnable” is set in the macSpecialConfig, ensure that the pauseDuration, rxFifoEmptyThreshold, and rxFifoStatEmptyThreshold are set for flow control enabled case.
When “kENET_ControlStoreAndFwdDisabled” is set in the macSpecialConfig, ensure that the rxFifoFullThreshold and txFifoWatermark are set for store and forward disable.
The rxAccelerConfig and txAccelerConfig default setting with 0 - accelerator are disabled. The “enet_tx_accelerator_t” and “enet_rx_accelerator_t” are recommended to be used to enable the transmit and receive accelerator. After the accelerators are enabled, the store and forward feature should be enabled. As a result, kENET_ControlStoreAndFwdDisabled should not be set.
The intCoalesceCfg can be used in the rx or tx enabled cases to decrese the CPU loading.

typedef struct _enet_tx_bd_ring enet_tx_bd_ring_t: Defines the ENET transmit buffer descriptor ring/queue structure.

typedef struct _enet_rx_bd_ring enet_rx_bd_ring_t: Defines the ENET receive buffer descriptor ring/queue structure.

typedef struct _enet_buffer_struct enet_buffer_struct_t

typedef struct _enet_rx_frame_attribute_struct enet_rx_frame_attribute_t

typedef struct _enet_rx_frame_struct enet_rx_frame_struct_t

typedef struct _enet_tx_frame_struct enet_tx_frame_struct_t

typedef void (*enet_isr_t)(ENET_Type *base, enet_handle_t *handle): Define interrupt IRQ handler.

const clock_ip_name_t s_enetClock[]: Pointers to enet clocks for each instance.

const clock_ip_name_t s_enetExtraClock[]

uint32_t ENET_GetInstance(ENET_Type *base)

Get the ENET instance from peripheral base address.

Parameters:

base – ENET peripheral base address.

Returns:

ENET instance.

ENET_BUFFDESCRIPTOR_RX_ERR_MASK: Defines the receive error status flag mask.

struct _enet_rx_bd_struct

#include <fsl_enet.h>

Defines the receive buffer descriptor structure for the little endian system.

Public Members

uint16_t length: Buffer descriptor data length.

uint16_t control: Buffer descriptor control and status.

uint32_t buffer: Data buffer pointer.

struct _enet_tx_bd_struct

#include <fsl_enet.h>

Defines the enhanced transmit buffer descriptor structure for the little endian system.

Public Members

uint16_t length: Buffer descriptor data length.

uint16_t control: Buffer descriptor control and status.

uint32_t buffer: Data buffer pointer.

struct _enet_data_error_stats

#include <fsl_enet.h>

Defines the ENET data error statistics structure.

Public Members

uint32_t statsRxLenGreaterErr: Receive length greater than RCR[MAX_FL].

uint32_t statsRxAlignErr: Receive non-octet alignment/

uint32_t statsRxFcsErr: Receive CRC error.

uint32_t statsRxOverRunErr: Receive over run.

uint32_t statsRxTruncateErr: Receive truncate.

struct _enet_rx_frame_error

#include <fsl_enet.h>

Defines the Rx frame error structure.

Public Members

bool statsRxTruncateErr: Receive truncate.

bool statsRxOverRunErr: Receive over run.

bool statsRxFcsErr: Receive CRC error.

bool statsRxAlignErr: Receive non-octet alignment.

bool statsRxLenGreaterErr: Receive length greater than RCR[MAX_FL].

struct _enet_transfer_stats

#include <fsl_enet.h>

Defines the ENET transfer statistics structure.

Public Members

uint32_t statsRxFrameCount: Rx frame number.

uint32_t statsRxFrameOk: Good Rx frame number.

uint32_t statsRxCrcErr: Rx frame number with CRC error.

uint32_t statsRxAlignErr: Rx frame number with alignment error.

uint32_t statsRxDropInvalidSFD: Dropped frame number due to invalid SFD.

uint32_t statsRxFifoOverflowErr: Rx FIFO overflow count.

uint32_t statsTxFrameCount: Tx frame number.

uint32_t statsTxFrameOk: Good Tx frame number.

uint32_t statsTxCrcAlignErr: The transmit frame is error.

uint32_t statsTxFifoUnderRunErr: Tx FIFO underrun count.

struct enet_frame_info

#include <fsl_enet.h>

Defines the frame info structure.

Public Members

void *context: User specified data

struct _enet_tx_dirty_ring

#include <fsl_enet.h>

Defines the ENET transmit dirty addresses ring/queue structure.

Public Members

enet_frame_info_t *txDirtyBase: Dirty buffer descriptor base address pointer.

uint16_t txGenIdx: tx generate index.

uint16_t txConsumIdx: tx consume index.

uint16_t txRingLen: tx ring length.

bool isFull: tx ring is full flag.

struct _enet_buffer_config

#include <fsl_enet.h>

Defines the receive buffer descriptor configuration structure.

Note that for the internal DMA requirements, the buffers have a corresponding alignment requirements.

The aligned receive and transmit buffer size must be evenly divisible by ENET_BUFF_ALIGNMENT. when the data buffers are in cacheable region when cache is enabled, all those size should be aligned to the maximum value of “ENET_BUFF_ALIGNMENT” and the cache line size.
The aligned transmit and receive buffer descriptor start address must be at least 64 bit aligned. However, it’s recommended to be evenly divisible by ENET_BUFF_ALIGNMENT. buffer descriptors should be put in non-cacheable region when cache is enabled.
The aligned transmit and receive data buffer start address must be evenly divisible by ENET_BUFF_ALIGNMENT. Receive buffers should be continuous with the total size equal to “rxBdNumber * rxBuffSizeAlign”. Transmit buffers should be continuous with the total size equal to “txBdNumber * txBuffSizeAlign”. when the data buffers are in cacheable region when cache is enabled, all those size should be aligned to the maximum value of “ENET_BUFF_ALIGNMENT” and the cache line size.

Public Members

uint16_t rxBdNumber: Receive buffer descriptor number.

uint16_t txBdNumber: Transmit buffer descriptor number.

uint16_t rxBuffSizeAlign: Aligned receive data buffer size.

uint16_t txBuffSizeAlign: Aligned transmit data buffer size.

volatile enet_rx_bd_struct_t *rxBdStartAddrAlign: Aligned receive buffer descriptor start address: should be non-cacheable.

volatile enet_tx_bd_struct_t *txBdStartAddrAlign: Aligned transmit buffer descriptor start address: should be non-cacheable.

uint8_t *rxBufferAlign: Receive data buffer start address.

uint8_t *txBufferAlign: Transmit data buffer start address.

bool rxMaintainEnable: Receive buffer cache maintain.

bool txMaintainEnable: Transmit buffer cache maintain.

enet_frame_info_t *txFrameInfo: Transmit frame information start address.

struct _enet_intcoalesce_config

#include <fsl_enet.h>

Defines the interrupt coalescing configure structure.

Public Members

uint8_t txCoalesceFrameCount[1]: Transmit interrupt coalescing frame count threshold.

uint16_t txCoalesceTimeCount[1]: Transmit interrupt coalescing timer count threshold.

uint8_t rxCoalesceFrameCount[1]: Receive interrupt coalescing frame count threshold.

uint16_t rxCoalesceTimeCount[1]: Receive interrupt coalescing timer count threshold.

struct _enet_avb_config

#include <fsl_enet.h>

Defines the ENET AVB Configure structure.

This is used for to configure the extended ring 1 and ring 2.

The classification match format is (CMP3 << 12) | (CMP2 << 8) | (CMP1 << 4) | CMP0. composed of four 3-bit compared VLAN priority field cmp0~cmp3, cm0 ~ cmp3 are used in parallel.

If CMP1,2,3 are not unused, please set them to the same value as CMP0.

The idleSlope is used to calculate the Band Width fraction, BW fraction = 1 / (1 + 512/idleSlope). For avb configuration, the BW fraction of Class 1 and Class 2 combined must not exceed 0.75.

Public Members

uint16_t rxClassifyMatch[1 - 1]: The classification match value for the ring.

enet_idle_slope_t idleSlope[1 - 1]: The idle slope for certian bandwidth fraction.

struct _enet_config

#include <fsl_enet.h>

Defines the basic configuration structure for the ENET device.

Note:

macSpecialConfig is used for a special control configuration, A logical OR of “enet_special_control_flag_t”. For a special configuration for MAC, set this parameter to 0.
txWatermark is used for a cut-through operation. It is in steps of 64 bytes: 0/1 - 64 bytes written to TX FIFO before transmission of a frame begins. 2 - 128 bytes written to TX FIFO …. 3 - 192 bytes written to TX FIFO …. The maximum of txWatermark is 0x2F - 4032 bytes written to TX FIFO …. txWatermark allows minimizing the transmit latency to set the txWatermark to 0 or 1 or for larger bus access latency 3 or larger due to contention for the system bus.
rxFifoFullThreshold is similar to the txWatermark for cut-through operation in RX. It is in 64-bit words. The minimum is ENET_FIFO_MIN_RX_FULL and the maximum is 0xFF. If the end of the frame is stored in FIFO and the frame size if smaller than the txWatermark, the frame is still transmitted. The rule is the same for rxFifoFullThreshold in the receive direction.
When “kENET_ControlFlowControlEnable” is set in the macSpecialConfig, ensure that the pauseDuration, rxFifoEmptyThreshold, and rxFifoStatEmptyThreshold are set for flow control enabled case.
When “kENET_ControlStoreAndFwdDisabled” is set in the macSpecialConfig, ensure that the rxFifoFullThreshold and txFifoWatermark are set for store and forward disable.
The rxAccelerConfig and txAccelerConfig default setting with 0 - accelerator are disabled. The “enet_tx_accelerator_t” and “enet_rx_accelerator_t” are recommended to be used to enable the transmit and receive accelerator. After the accelerators are enabled, the store and forward feature should be enabled. As a result, kENET_ControlStoreAndFwdDisabled should not be set.
The intCoalesceCfg can be used in the rx or tx enabled cases to decrese the CPU loading.

Public Members

uint32_t macSpecialConfig: Mac special configuration. A logical OR of “enet_special_control_flag_t”.

uint32_t interrupt: Mac interrupt source. A logical OR of “enet_interrupt_enable_t”.

uint16_t rxMaxFrameLen: Receive maximum frame length.

enet_mii_mode_t miiMode: MII mode.

enet_mii_speed_t miiSpeed: MII Speed.

enet_mii_duplex_t miiDuplex: MII duplex.

uint8_t rxAccelerConfig: Receive accelerator, A logical OR of “enet_rx_accelerator_t”.

uint8_t txAccelerConfig: Transmit accelerator, A logical OR of “enet_rx_accelerator_t”.

uint16_t pauseDuration: For flow control enabled case: Pause duration.

uint8_t rxFifoEmptyThreshold: For flow control enabled case: when RX FIFO level reaches this value, it makes MAC generate XOFF pause frame.

uint8_t rxFifoStatEmptyThreshold: For flow control enabled case: number of frames in the receive FIFO, independent of size, that can be accept. If the limit is reached, reception continues and a pause frame is triggered.

uint8_t rxFifoFullThreshold: For store and forward disable case, the data required in RX FIFO to notify the MAC receive ready status.

uint8_t txFifoWatermark: For store and forward disable case, the data required in TX FIFO before a frame transmit start.

enet_intcoalesce_config_t *intCoalesceCfg: If the interrupt coalsecence is not required in the ring n(0,1,2), please set to NULL.

uint8_t ringNum: Number of used rings. default with 1 — single ring.

enet_rx_alloc_callback_t rxBuffAlloc: Callback function to alloc memory, must be provided for zero-copy Rx.

enet_rx_free_callback_t rxBuffFree: Callback function to free memory, must be provided for zero-copy Rx.

enet_callback_t callback: General callback function.

void *userData: Callback function parameter.

struct _enet_tx_bd_ring

#include <fsl_enet.h>

Defines the ENET transmit buffer descriptor ring/queue structure.

Public Members

volatile enet_tx_bd_struct_t *txBdBase: Buffer descriptor base address pointer.

uint16_t txGenIdx: The current available transmit buffer descriptor pointer.

uint16_t txConsumIdx: Transmit consume index.

volatile uint16_t txDescUsed: Transmit descriptor used number.

uint16_t txRingLen: Transmit ring length.

struct _enet_rx_bd_ring

#include <fsl_enet.h>

Defines the ENET receive buffer descriptor ring/queue structure.

Public Members

volatile enet_rx_bd_struct_t *rxBdBase: Buffer descriptor base address pointer.

uint16_t rxGenIdx: The current available receive buffer descriptor pointer.

uint16_t rxRingLen: Receive ring length.

struct _enet_handle

#include <fsl_enet.h>

Defines the ENET handler structure.

Public Members

enet_rx_bd_ring_t rxBdRing[1]: Receive buffer descriptor.

enet_tx_bd_ring_t txBdRing[1]: Transmit buffer descriptor.

uint16_t rxBuffSizeAlign[1]: Receive buffer size alignment.

uint16_t txBuffSizeAlign[1]: Transmit buffer size alignment.

bool rxMaintainEnable[1]: Receive buffer cache maintain.

bool txMaintainEnable[1]: Transmit buffer cache maintain.

uint8_t ringNum: Number of used rings.

enet_callback_t callback: Callback function.

void *userData: Callback function parameter.

enet_tx_dirty_ring_t txDirtyRing[1]: Ring to store tx frame information.

bool txReclaimEnable[1]: Tx reclaim enable flag.

enet_rx_alloc_callback_t rxBuffAlloc: Callback function to alloc memory for zero copy Rx.

enet_rx_free_callback_t rxBuffFree: Callback function to free memory for zero copy Rx.

uint8_t multicastCount[64]: Multicast collisions counter

uint32_t enetClock: The clock of enet peripheral, to caculate core cycles for PTP timestamp.

uint32_t tsDelayCount: The count of core cycles for PTP timestamp capture delay.

struct _enet_buffer_struct

#include <fsl_enet.h>

Public Members

void *buffer: The buffer store the whole or partial frame.

uint16_t length: The byte length of this buffer.

struct _enet_rx_frame_attribute_struct

#include <fsl_enet.h>

Public Members

bool promiscuous: This frame is received because of promiscuous mode.

struct _enet_rx_frame_struct

#include <fsl_enet.h>

Public Members

enet_buffer_struct_t *rxBuffArray: Rx frame buffer structure.

uint16_t totLen: Rx frame total length.

enet_rx_frame_attribute_t rxAttribute: Rx frame attribute structure.

enet_rx_frame_error_t rxFrameError: Rx frame error.

struct _enet_tx_frame_struct

#include <fsl_enet.h>

Public Members

enet_buffer_struct_t *txBuffArray: Tx frame buffer structure.

uint32_t txBuffNum: Buffer number of this Tx frame.

void *context: Driver reclaims and gives it in Tx over callback, usually store network packet header.

EWM: External Watchdog Monitor Driver

void EWM_Init(EWM_Type *base, const ewm_config_t *config)

Initializes the EWM peripheral.

This function is used to initialize the EWM. After calling, the EWM runs immediately according to the configuration. Note that, except for the interrupt enable control bit, other control bits and registers are write once after a CPU reset. Modifying them more than once generates a bus transfer error.

This is an example.

ewm_config_t config;
EWM_GetDefaultConfig(&config);
config.compareHighValue = 0xAAU;
EWM_Init(ewm_base,&config);

Parameters:

base – EWM peripheral base address
config – The configuration of the EWM

void EWM_Deinit(EWM_Type *base)

Deinitializes the EWM peripheral.

This function is used to shut down the EWM.

Parameters:

base – EWM peripheral base address

void EWM_GetDefaultConfig(ewm_config_t *config)

Initializes the EWM configuration structure.

This function initializes the EWM configuration structure to default values. The default values are as follows.

ewmConfig->enableEwm = true;
ewmConfig->enableEwmInput = false;
ewmConfig->setInputAssertLogic = false;
ewmConfig->enableInterrupt = false;
ewmConfig->ewm_lpo_clock_source_t = kEWM_LpoClockSource0;
ewmConfig->prescaler = 0;
ewmConfig->compareLowValue = 0;
ewmConfig->compareHighValue = 0xFEU;

FGPIO Driver

FlexCAN: Flex Controller Area Network Driver

FlexCAN Driver

bool FLEXCAN_IsInstanceHasFDMode(CAN_Type *base)

Determine whether the FlexCAN instance support CAN FD mode at run time.

Note

Use this API only if different soc parts share the SOC part name macro define. Otherwise, a different SOC part name can be used to determine at compile time whether the FlexCAN instance supports CAN FD mode or not. If need use this API to determine if CAN FD mode is supported, the FLEXCAN_Init function needs to be executed first, and then call this API and use the return to value determines whether to supports CAN FD mode, if return true, continue calling FLEXCAN_FDInit to enable CAN FD mode.

Parameters:

base – FlexCAN peripheral base address.

Returns:

return TRUE if instance support CAN FD mode, FALSE if instance only support classic CAN (2.0) mode.

void FLEXCAN_EnterFreezeMode(CAN_Type *base)

Enter FlexCAN Freeze Mode.

This function makes the FlexCAN work under Freeze Mode.

Parameters:

base – FlexCAN peripheral base address.

void FLEXCAN_ExitFreezeMode(CAN_Type *base)

Exit FlexCAN Freeze Mode.

This function makes the FlexCAN leave Freeze Mode.

Parameters:

base – FlexCAN peripheral base address.

uint32_t FLEXCAN_GetInstance(CAN_Type *base)

Get the FlexCAN instance from peripheral base address.

Parameters:

base – FlexCAN peripheral base address.

Returns:

FlexCAN instance.

bool FLEXCAN_CalculateImprovedTimingValues(CAN_Type *base, uint32_t bitRate, uint32_t sourceClock_Hz, flexcan_timing_config_t *pTimingConfig)

Calculates the improved timing values by specific bit Rates for classical CAN.

This function use to calculates the Classical CAN timing values according to the given bit rate. The Calculated timing values will be set in CTRL1/CBT/ENCBT register. The calculation is based on the recommendation of the CiA 301 v4.2.0 and previous version document.

Parameters:

base – FlexCAN peripheral base address.
bitRate – The classical CAN speed in bps defined by user, should be less than or equal to 1Mbps.
sourceClock_Hz – The Source clock frequency in Hz.
pTimingConfig – Pointer to the FlexCAN timing configuration structure.

Returns:

TRUE if timing configuration found, FALSE if failed to find configuration.

void FLEXCAN_Init(CAN_Type *base, const flexcan_config_t *pConfig, uint32_t sourceClock_Hz)

Initializes a FlexCAN instance.

This function initializes the FlexCAN module with user-defined settings. This example shows how to set up the flexcan_config_t parameters and how to call the FLEXCAN_Init function by passing in these parameters.

flexcan_config_t flexcanConfig;
flexcanConfig.clkSrc               = kFLEXCAN_ClkSrc0;
flexcanConfig.bitRate              = 1000000U;
flexcanConfig.maxMbNum             = 16;
flexcanConfig.enableLoopBack       = false;
flexcanConfig.enableSelfWakeup     = false;
flexcanConfig.enableIndividMask    = false;
flexcanConfig.enableDoze           = false;
flexcanConfig.disableSelfReception = false;
flexcanConfig.enableListenOnlyMode = false;
flexcanConfig.timingConfig         = timingConfig;
FLEXCAN_Init(CAN0, &flexcanConfig, 40000000UL);

Parameters:

base – FlexCAN peripheral base address.
pConfig – Pointer to the user-defined configuration structure.
sourceClock_Hz – FlexCAN Protocol Engine clock source frequency in Hz.

bool FLEXCAN_FDCalculateImprovedTimingValues(CAN_Type *base, uint32_t bitRate, uint32_t bitRateFD, uint32_t sourceClock_Hz, flexcan_timing_config_t *pTimingConfig)

Calculates the improved timing values by specific bit rates for CANFD.

This function use to calculates the CANFD timing values according to the given nominal phase bit rate and data phase bit rate. The Calculated timing values will be set in CBT/ENCBT and FDCBT/EDCBT registers. The calculation is based on the recommendation of the CiA 1301 v1.0.0 document.

Parameters:

base – FlexCAN peripheral base address.
bitRate – The CANFD bus control speed in bps defined by user.
bitRateFD – The CAN FD data phase speed in bps defined by user. Equal to bitRate means disable bit rate switching.
sourceClock_Hz – The Source clock frequency in Hz.
pTimingConfig – Pointer to the FlexCAN timing configuration structure.

Returns:

TRUE if timing configuration found, FALSE if failed to find configuration

void FLEXCAN_FDInit(CAN_Type *base, const flexcan_config_t *pConfig, uint32_t sourceClock_Hz, flexcan_mb_size_t dataSize, bool brs)

Initializes a FlexCAN instance.

This function initializes the FlexCAN module with user-defined settings. This example shows how to set up the flexcan_config_t parameters and how to call the FLEXCAN_FDInit function by passing in these parameters.

flexcan_config_t flexcanConfig;
flexcanConfig.clkSrc               = kFLEXCAN_ClkSrc0;
flexcanConfig.bitRate              = 1000000U;
flexcanConfig.bitRateFD            = 2000000U;
flexcanConfig.maxMbNum             = 16;
flexcanConfig.enableLoopBack       = false;
flexcanConfig.enableSelfWakeup     = false;
flexcanConfig.enableIndividMask    = false;
flexcanConfig.disableSelfReception = false;
flexcanConfig.enableListenOnlyMode = false;
flexcanConfig.enableDoze           = false;
flexcanConfig.timingConfig         = timingConfig;
FLEXCAN_FDInit(CAN0, &flexcanConfig, 80000000UL, kFLEXCAN_16BperMB, true);

Parameters:

base – FlexCAN peripheral base address.
pConfig – Pointer to the user-defined configuration structure.
sourceClock_Hz – FlexCAN Protocol Engine clock source frequency in Hz.
dataSize – FlexCAN Message Buffer payload size. The actual transmitted or received CAN FD frame data size needs to be less than or equal to this value.
brs – True if bit rate switch is enabled in FD mode.

void FLEXCAN_Deinit(CAN_Type *base)

De-initializes a FlexCAN instance.

This function disables the FlexCAN module clock and sets all register values to the reset value.

Parameters:

base – FlexCAN peripheral base address.

void FLEXCAN_GetDefaultConfig(flexcan_config_t *pConfig)

Gets the default configuration structure.

This function initializes the FlexCAN configuration structure to default values. The default values are as follows. flexcanConfig->clkSrc = kFLEXCAN_ClkSrc0; flexcanConfig->bitRate = 1000000U; flexcanConfig->bitRateFD = 2000000U; flexcanConfig->maxMbNum = 16; flexcanConfig->enableLoopBack = false; flexcanConfig->enableSelfWakeup = false; flexcanConfig->enableIndividMask = false; flexcanConfig->disableSelfReception = false; flexcanConfig->enableListenOnlyMode = false; flexcanConfig->enableDoze = false; flexcanConfig->enablePretendedeNetworking = false; flexcanConfig->enableMemoryErrorControl = true; flexcanConfig->enableNonCorrectableErrorEnterFreeze = true; flexcanConfig->enableTransceiverDelayMeasure = true; flexcanConfig->enableRemoteRequestFrameStored = true; flexcanConfig->payloadEndianness = kFLEXCAN_bigEndian; flexcanConfig.timingConfig = timingConfig;

Parameters:

pConfig – Pointer to the FlexCAN configuration structure.

void FLEXCAN_SetTimingConfig(CAN_Type *base, const flexcan_timing_config_t *pConfig)

Sets the FlexCAN classical CAN protocol timing characteristic.

This function gives user settings to classical CAN or CAN FD nominal phase timing characteristic. The function is for an experienced user. For less experienced users, call the FLEXCAN_SetBitRate() instead.

Note

Calling FLEXCAN_SetTimingConfig() overrides the bit rate set in FLEXCAN_Init() or FLEXCAN_SetBitRate().

Parameters:

base – FlexCAN peripheral base address.
pConfig – Pointer to the timing configuration structure.

status_t FLEXCAN_SetBitRate(CAN_Type *base, uint32_t sourceClock_Hz, uint32_t bitRate_Bps)

Set bit rate of FlexCAN classical CAN frame or CAN FD frame nominal phase.

This function set the bit rate of classical CAN frame or CAN FD frame nominal phase base on FLEXCAN_CalculateImprovedTimingValues() API calculated timing values.

Note

Calling FLEXCAN_SetBitRate() overrides the bit rate set in FLEXCAN_Init().

Parameters:

base – FlexCAN peripheral base address.
sourceClock_Hz – Source Clock in Hz.
bitRate_Bps – Bit rate in Bps.

Returns:

kStatus_Success - Set CAN baud rate (only Nominal phase) successfully.

void FLEXCAN_SetFDTimingConfig(CAN_Type *base, const flexcan_timing_config_t *pConfig)

Sets the FlexCAN CANFD data phase timing characteristic.

This function gives user settings to CANFD data phase timing characteristic. The function is for an experienced user. For less experienced users, call the FLEXCAN_SetFDBitRate() to set both Nominal/Data bit Rate instead.

Note

Calling FLEXCAN_SetFDTimingConfig() overrides the data phase bit rate set in FLEXCAN_FDInit()/FLEXCAN_SetFDBitRate().

Parameters:

base – FlexCAN peripheral base address.
pConfig – Pointer to the timing configuration structure.

status_t FLEXCAN_SetFDBitRate(CAN_Type *base, uint32_t sourceClock_Hz, uint32_t bitRateN_Bps, uint32_t bitRateD_Bps)

Set bit rate of FlexCAN FD frame.

This function set the baud rate of FLEXCAN FD base on FLEXCAN_FDCalculateImprovedTimingValues() API calculated timing values.

Parameters:

base – FlexCAN peripheral base address.
sourceClock_Hz – Source Clock in Hz.
bitRateN_Bps – Nominal bit Rate in Bps.
bitRateD_Bps – Data bit Rate in Bps.

Returns:

kStatus_Success - Set CAN FD bit rate (include Nominal and Data phase) successfully.

void FLEXCAN_SetRxMbGlobalMask(CAN_Type *base, uint32_t mask)

Sets the FlexCAN receive message buffer global mask.

This function sets the global mask for the FlexCAN message buffer in a matching process. The configuration is only effective when the Rx individual mask is disabled in the FLEXCAN_Init().

Parameters:

base – FlexCAN peripheral base address.
mask – Rx Message Buffer Global Mask value.

void FLEXCAN_SetRxFifoGlobalMask(CAN_Type *base, uint32_t mask)

Sets the FlexCAN receive FIFO global mask.

This function sets the global mask for FlexCAN FIFO in a matching process.

Parameters:

base – FlexCAN peripheral base address.
mask – Rx Fifo Global Mask value.

void FLEXCAN_SetRxIndividualMask(CAN_Type *base, uint8_t maskIdx, uint32_t mask)

Sets the FlexCAN receive individual mask.

This function sets the individual mask for the FlexCAN matching process. The configuration is only effective when the Rx individual mask is enabled in the FLEXCAN_Init(). If the Rx FIFO is disabled, the individual mask is applied to the corresponding Message Buffer. If the Rx FIFO is enabled, the individual mask for Rx FIFO occupied Message Buffer is applied to the Rx Filter with the same index. Note that only the first 32 individual masks can be used as the Rx FIFO filter mask.

Parameters:

base – FlexCAN peripheral base address.
maskIdx – The Index of individual Mask.
mask – Rx Individual Mask value.

void FLEXCAN_SetTxMbConfig(CAN_Type *base, uint8_t mbIdx, bool enable)

Configures a FlexCAN transmit message buffer.

This function aborts the previous transmission, cleans the Message Buffer, and configures it as a Transmit Message Buffer.

Parameters:

base – FlexCAN peripheral base address.
mbIdx – The Message Buffer index.
enable – Enable/disable Tx Message Buffer.
- true: Enable Tx Message Buffer.
- false: Disable Tx Message Buffer.

void FLEXCAN_SetRxMbConfig(CAN_Type *base, uint8_t mbIdx, const flexcan_rx_mb_config_t *pRxMbConfig, bool enable)

Configures a FlexCAN Receive Message Buffer.

This function cleans a FlexCAN build-in Message Buffer and configures it as a Receive Message Buffer. User should invoke this API when CTRL2[RRS]=1. When CTRL2[RRS]=1, frame’s ID is compared to the IDs of the receive mailboxes with the CODE field configured as kFLEXCAN_RxMbEmpty, kFLEXCAN_RxMbFull or kFLEXCAN_RxMbOverrun. Message buffer will store the remote frame in the same fashion of a data frame. No automatic remote response frame will be generated. User need to setup another message buffer to respond remote request.

Parameters:

base – FlexCAN peripheral base address.
mbIdx – The Message Buffer index.
pRxMbConfig – Pointer to the FlexCAN Message Buffer configuration structure.
enable – Enable/disable Rx Message Buffer.
- true: Enable Rx Message Buffer.
- false: Disable Rx Message Buffer.

void FLEXCAN_SetFDTxMbConfig(CAN_Type *base, uint8_t mbIdx, bool enable)

Configures a FlexCAN transmit message buffer.

This function aborts the previous transmission, cleans the Message Buffer, and configures it as a Transmit Message Buffer.

Parameters:

base – FlexCAN peripheral base address.
mbIdx – The Message Buffer index.
enable – Enable/disable Tx Message Buffer.
- true: Enable Tx Message Buffer.
- false: Disable Tx Message Buffer.

void FLEXCAN_SetFDRxMbConfig(CAN_Type *base, uint8_t mbIdx, const flexcan_rx_mb_config_t *pRxMbConfig, bool enable)

Configures a FlexCAN Receive Message Buffer.

This function cleans a FlexCAN build-in Message Buffer and configures it as a Receive Message Buffer.

Parameters:

base – FlexCAN peripheral base address.
mbIdx – The Message Buffer index.
pRxMbConfig – Pointer to the FlexCAN Message Buffer configuration structure.
enable – Enable/disable Rx Message Buffer.
- true: Enable Rx Message Buffer.
- false: Disable Rx Message Buffer.

void FLEXCAN_SetRemoteResponseMbConfig(CAN_Type *base, uint8_t mbIdx, const flexcan_frame_t *pFrame)

Configures a FlexCAN Remote Response Message Buffer.

User should invoke this API when CTRL2[RRS]=0. When CTRL2[RRS]=0, frame’s ID is compared to the IDs of the receive mailboxes with the CODE field configured as kFLEXCAN_RxMbRanswer. If there is a matching ID, then this mailbox content will be transmitted as response. The received remote request frame is not stored in receive buffer. It is only used to trigger a transmission of a frame in response.

Parameters:

base – FlexCAN peripheral base address.
mbIdx – The Message Buffer index.
pFrame – Pointer to CAN message frame structure for response.

void FLEXCAN_SetRxFifoConfig(CAN_Type *base, const flexcan_rx_fifo_config_t *pRxFifoConfig, bool enable)

Configures the FlexCAN Legacy Rx FIFO.

This function configures the FlexCAN Rx FIFO with given configuration.

Note

Legacy Rx FIFO only can receive classic CAN message.

Parameters:

base – FlexCAN peripheral base address.
pRxFifoConfig – Pointer to the FlexCAN Legacy Rx FIFO configuration structure. Can be NULL when enable parameter is false.
enable – Enable/disable Legacy Rx FIFO.
- true: Enable Legacy Rx FIFO.
- false: Disable Legacy Rx FIFO.

void FLEXCAN_SetEnhancedRxFifoConfig(CAN_Type *base, const flexcan_enhanced_rx_fifo_config_t *pConfig, bool enable)

Configures the FlexCAN Enhanced Rx FIFO.

This function configures the Enhanced Rx FIFO with given configuration.

Note

Enhanced Rx FIFO support receive classic CAN or CAN FD messages, Legacy Rx FIFO and Enhanced Rx FIFO cannot be enabled at the same time.

Parameters:

base – FlexCAN peripheral base address.
pConfig – Pointer to the FlexCAN Enhanced Rx FIFO configuration structure. Can be NULL when enable parameter is false.
enable – Enable/disable Enhanced Rx FIFO.
- true: Enable Enhanced Rx FIFO.
- false: Disable Enhanced Rx FIFO.

void FLEXCAN_SetPNConfig(CAN_Type *base, const flexcan_pn_config_t *pConfig)

Configures the FlexCAN Pretended Networking mode.

This function configures the FlexCAN Pretended Networking mode with given configuration.

Parameters:

base – FlexCAN peripheral base address.
pConfig – Pointer to the FlexCAN Rx FIFO configuration structure.

static inline uint64_t FLEXCAN_GetStatusFlags(CAN_Type *base)

Gets the FlexCAN module interrupt flags.

This function gets all FlexCAN status flags. The flags are returned as the logical OR value of the enumerators _flexcan_flags. To check the specific status, compare the return value with enumerators in _flexcan_flags.

Parameters:

base – FlexCAN peripheral base address.

Returns:

FlexCAN status flags which are ORed by the enumerators in the _flexcan_flags.

static inline void FLEXCAN_ClearStatusFlags(CAN_Type *base, uint64_t mask)

Clears status flags with the provided mask.

This function clears the FlexCAN status flags with a provided mask. An automatically cleared flag can’t be cleared by this function.

Parameters:

base – FlexCAN peripheral base address.
mask – The status flags to be cleared, it is logical OR value of _flexcan_flags.

static inline void FLEXCAN_GetBusErrCount(CAN_Type *base, uint8_t *txErrBuf, uint8_t *rxErrBuf)

Gets the FlexCAN Bus Error Counter value.

This function gets the FlexCAN Bus Error Counter value for both Tx and Rx direction. These values may be needed in the upper layer error handling.

Parameters:

base – FlexCAN peripheral base address.
txErrBuf – Buffer to store Tx Error Counter value.
rxErrBuf – Buffer to store Rx Error Counter value.

static inline uint64_t FLEXCAN_GetMbStatusFlags(CAN_Type *base, uint64_t mask)

Gets the FlexCAN Message Buffer interrupt flags.

This function gets the interrupt flags of a given Message Buffers.

Parameters:

base – FlexCAN peripheral base address.
mask – The ORed FlexCAN Message Buffer mask.

Returns:

The status of given Message Buffers.

static inline uint64_t FLEXCAN_GetHigh64MbStatusFlags(CAN_Type *base, uint64_t mask)

Gets the FlexCAN High 64 Message Buffer interrupt flags.

Valid only if the number of available MBs exceeds 64.

Parameters:

base – FlexCAN peripheral base address.
mask – The ORed FlexCAN Message Buffer mask.

Returns:

The status of given Message Buffers.

static inline void FLEXCAN_ClearMbStatusFlags(CAN_Type *base, uint64_t mask)

Clears the FlexCAN Message Buffer interrupt flags.

This function clears the interrupt flags of a given Message Buffers.

Parameters:

base – FlexCAN peripheral base address.
mask – The ORed FlexCAN Message Buffer mask.

static inline void FLEXCAN_ClearHigh64MbStatusFlags(CAN_Type *base, uint64_t mask)

Clears the FlexCAN High 64 Message Buffer interrupt flags.

Valid only if the number of available MBs exceeds 64.

Parameters:

base – FlexCAN peripheral base address.
mask – The ORed FlexCAN Message Buffer mask.

void FLEXCAN_GetMemoryErrorReportStatus(CAN_Type *base, flexcan_memory_error_report_status_t *errorStatus)

Gets the FlexCAN Memory Error Report registers status.

This function gets the FlexCAN Memory Error Report registers status.

Parameters:

base – FlexCAN peripheral base address.
errorStatus – Pointer to FlexCAN Memory Error Report registers status structure.

static inline uint8_t FLEXCAN_GetPNMatchCount(CAN_Type *base)

Gets the FlexCAN Number of Matches when in Pretended Networking.

This function gets the number of times a given message has matched the predefined filtering criteria for ID and/or PL before a wakeup event.

Parameters:

base – FlexCAN peripheral base address.

Returns:

The number of received wake up msessages.

static inline uint32_t FLEXCAN_GetEnhancedFifoDataCount(CAN_Type *base)

Gets the number of FlexCAN Enhanced Rx FIFO available frames.

This function gets the number of CAN messages stored in the Enhanced Rx FIFO.

Parameters:

base – FlexCAN peripheral base address.

Returns:

The number of available CAN messages stored in the Enhanced Rx FIFO.

static inline void FLEXCAN_EnableInterrupts(CAN_Type *base, uint64_t mask)

Enables FlexCAN interrupts according to the provided mask.

This function enables the FlexCAN interrupts according to the provided mask. The mask is a logical OR of enumeration members, see _flexcan_interrupt_enable.

Parameters:

base – FlexCAN peripheral base address.
mask – The interrupts to enable. Logical OR of _flexcan_interrupt_enable.

static inline void FLEXCAN_DisableInterrupts(CAN_Type *base, uint64_t mask)

Disables FlexCAN interrupts according to the provided mask.

This function disables the FlexCAN interrupts according to the provided mask. The mask is a logical OR of enumeration members, see _flexcan_interrupt_enable.

Parameters:

base – FlexCAN peripheral base address.
mask – The interrupts to disable. Logical OR of _flexcan_interrupt_enable.

static inline void FLEXCAN_EnableMbInterrupts(CAN_Type *base, uint64_t mask)

Enables FlexCAN Message Buffer interrupts.

This function enables the interrupts of given Message Buffers.

Parameters:

base – FlexCAN peripheral base address.
mask – The ORed FlexCAN Message Buffer mask.

static inline void FLEXCAN_EnableHigh64MbInterrupts(CAN_Type *base, uint64_t mask)

Enables FlexCAN high 64 Message Buffer interrupts.

Valid only if the number of available MBs exceeds 64.

Parameters:

base – FlexCAN peripheral base address.
mask – The ORed FlexCAN Message Buffer mask.

static inline void FLEXCAN_DisableMbInterrupts(CAN_Type *base, uint64_t mask)

Disables FlexCAN Message Buffer interrupts.

This function disables the interrupts of given Message Buffers.

Parameters:

base – FlexCAN peripheral base address.
mask – The ORed FlexCAN Message Buffer mask.

static inline void FLEXCAN_DisableHigh64MbInterrupts(CAN_Type *base, uint64_t mask)

Disables FlexCAN high 64 Message Buffer interrupts.

Valid only if the number of available MBs exceeds 64.

Parameters:

base – FlexCAN peripheral base address.
mask – The ORed FlexCAN Message Buffer mask.

void FLEXCAN_EnableRxFifoDMA(CAN_Type *base, bool enable)

Enables or disables the FlexCAN Rx FIFO DMA request.

This function enables or disables the DMA feature of FlexCAN build-in Rx FIFO.

Parameters:

base – FlexCAN peripheral base address.
enable – true to enable, false to disable.

static inline uintptr_t FLEXCAN_GetRxFifoHeadAddr(CAN_Type *base)

Gets the Rx FIFO Head address.

This function returns the FlexCAN Rx FIFO Head address, which is mainly used for the DMA/eDMA use case.

Parameters:

base – FlexCAN peripheral base address.

Returns:

FlexCAN Rx FIFO Head address.

static inline void FLEXCAN_Enable(CAN_Type *base, bool enable)

Enables or disables the FlexCAN module operation.

This function enables or disables the FlexCAN module.

Parameters:

base – FlexCAN base pointer.
enable – true to enable, false to disable.

status_t FLEXCAN_WriteTxMb(CAN_Type *base, uint8_t mbIdx, const flexcan_frame_t *pTxFrame)

Writes a FlexCAN Message to the Transmit Message Buffer.

This function writes a CAN Message to the specified Transmit Message Buffer and changes the Message Buffer state to start CAN Message transmit. After that the function returns immediately.

Parameters:

base – FlexCAN peripheral base address.
mbIdx – The FlexCAN Message Buffer index.
pTxFrame – Pointer to CAN message frame to be sent.

Return values:

kStatus_Success – - Write Tx Message Buffer Successfully.
kStatus_Fail – - Tx Message Buffer is currently in use.

status_t FLEXCAN_ReadRxMb(CAN_Type *base, uint8_t mbIdx, flexcan_frame_t *pRxFrame)

Reads a FlexCAN Message from Receive Message Buffer.

This function reads a CAN message from a specified Receive Message Buffer. The function fills a receive CAN message frame structure with just received data and activates the Message Buffer again. The function returns immediately.

Parameters:

base – FlexCAN peripheral base address.
mbIdx – The FlexCAN Message Buffer index.
pRxFrame – Pointer to CAN message frame structure for reception.

Return values:

kStatus_Success – - Rx Message Buffer is full and has been read successfully.
kStatus_FLEXCAN_RxOverflow – - Rx Message Buffer is already overflowed and has been read successfully.
kStatus_Fail – - Rx Message Buffer is empty.

status_t FLEXCAN_WriteFDTxMb(CAN_Type *base, uint8_t mbIdx, const flexcan_fd_frame_t *pTxFrame)

Writes a FlexCAN FD Message to the Transmit Message Buffer.

This function writes a CAN FD Message to the specified Transmit Message Buffer and changes the Message Buffer state to start CAN FD Message transmit. After that the function returns immediately.

Parameters:

base – FlexCAN peripheral base address.
mbIdx – The FlexCAN FD Message Buffer index.
pTxFrame – Pointer to CAN FD message frame to be sent.

Return values:

kStatus_Success – - Write Tx Message Buffer Successfully.
kStatus_Fail – - Tx Message Buffer is currently in use.

status_t FLEXCAN_ReadFDRxMb(CAN_Type *base, uint8_t mbIdx, flexcan_fd_frame_t *pRxFrame)

Reads a FlexCAN FD Message from Receive Message Buffer.

This function reads a CAN FD message from a specified Receive Message Buffer. The function fills a receive CAN FD message frame structure with just received data and activates the Message Buffer again. The function returns immediately.

Parameters:

base – FlexCAN peripheral base address.
mbIdx – The FlexCAN FD Message Buffer index.
pRxFrame – Pointer to CAN FD message frame structure for reception.

Return values:

kStatus_Success – - Rx Message Buffer is full and has been read successfully.
kStatus_FLEXCAN_RxOverflow – - Rx Message Buffer is already overflowed and has been read successfully.
kStatus_Fail – - Rx Message Buffer is empty.

status_t FLEXCAN_ReadRxFifo(CAN_Type *base, flexcan_frame_t *pRxFrame)

Reads a FlexCAN Message from Legacy Rx FIFO.

This function reads a CAN message from the FlexCAN Legacy Rx FIFO.

Parameters:

base – FlexCAN peripheral base address.
pRxFrame – Pointer to CAN message frame structure for reception.

Return values:

kStatus_Success – - Read Message from Rx FIFO successfully.
kStatus_Fail – - Rx FIFO is not enabled.

status_t FLEXCAN_ReadEnhancedRxFifo(CAN_Type *base, flexcan_fd_frame_t *pRxFrame)

Reads a FlexCAN Message from Enhanced Rx FIFO.

This function reads a CAN or CAN FD message from the FlexCAN Enhanced Rx FIFO.

Parameters:

base – FlexCAN peripheral base address.
pRxFrame – Pointer to CAN FD message frame structure for reception.

Return values:

kStatus_Success – - Read Message from Rx FIFO successfully.
kStatus_Fail – - Rx FIFO is not enabled.

status_t FLEXCAN_ReadPNWakeUpMB(CAN_Type *base, uint8_t mbIdx, flexcan_frame_t *pRxFrame)

Reads a FlexCAN Message from Wake Up MB.

This function reads a CAN message from the FlexCAN Wake up Message Buffers. There are four Wake up Message Buffers (WMBs) used to store incoming messages in Pretended Networking mode. The WMB index indicates the arrival order. The last message is stored in WMB3.

Parameters:

base – FlexCAN peripheral base address.
pRxFrame – Pointer to CAN message frame structure for reception.
mbIdx – The FlexCAN Wake up Message Buffer index. Range in 0x0 ~ 0x3.

Return values:

kStatus_Success – - Read Message from Wake up Message Buffer successfully.
kStatus_Fail – - Wake up Message Buffer has no valid content.

status_t FLEXCAN_TransferFDSendBlocking(CAN_Type *base, uint8_t mbIdx, flexcan_fd_frame_t *pTxFrame)

Performs a polling send transaction on the CAN bus.

Note

A transfer handle does not need to be created before calling this API.

Parameters:

base – FlexCAN peripheral base pointer.
mbIdx – The FlexCAN FD Message Buffer index.
pTxFrame – Pointer to CAN FD message frame to be sent.

Return values:

kStatus_Success – - Write Tx Message Buffer Successfully.
kStatus_Fail – - Tx Message Buffer is currently in use.

status_t FLEXCAN_TransferFDReceiveBlocking(CAN_Type *base, uint8_t mbIdx, flexcan_fd_frame_t *pRxFrame)

Performs a polling receive transaction on the CAN bus.

Note

A transfer handle does not need to be created before calling this API.

Parameters:

base – FlexCAN peripheral base pointer.
mbIdx – The FlexCAN FD Message Buffer index.
pRxFrame – Pointer to CAN FD message frame structure for reception.

Return values:

kStatus_Success – - Rx Message Buffer is full and has been read successfully.
kStatus_FLEXCAN_RxOverflow – - Rx Message Buffer is already overflowed and has been read successfully.
kStatus_Fail – - Rx Message Buffer is empty.

status_t FLEXCAN_TransferFDSendNonBlocking(CAN_Type *base, flexcan_handle_t *handle, flexcan_mb_transfer_t *pMbXfer)

Sends a message using IRQ.

This function sends a message using IRQ. This is a non-blocking function, which returns right away. When messages have been sent out, the send callback function is called.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
pMbXfer – FlexCAN FD Message Buffer transfer structure. See the flexcan_mb_transfer_t.

Return values:

kStatus_Success – Start Tx Message Buffer sending process successfully.
kStatus_Fail – Write Tx Message Buffer failed.
kStatus_FLEXCAN_TxBusy – Tx Message Buffer is in use.

status_t FLEXCAN_TransferFDReceiveNonBlocking(CAN_Type *base, flexcan_handle_t *handle, flexcan_mb_transfer_t *pMbXfer)

Receives a message using IRQ.

This function receives a message using IRQ. This is non-blocking function, which returns right away. When the message has been received, the receive callback function is called.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
pMbXfer – FlexCAN FD Message Buffer transfer structure. See the flexcan_mb_transfer_t.

Return values:

kStatus_Success – - Start Rx Message Buffer receiving process successfully.
kStatus_FLEXCAN_RxBusy – - Rx Message Buffer is in use.

void FLEXCAN_TransferFDAbortSend(CAN_Type *base, flexcan_handle_t *handle, uint8_t mbIdx)

Aborts the interrupt driven message send process.

This function aborts the interrupt driven message send process.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
mbIdx – The FlexCAN FD Message Buffer index.

void FLEXCAN_TransferFDAbortReceive(CAN_Type *base, flexcan_handle_t *handle, uint8_t mbIdx)

Aborts the interrupt driven message receive process.

This function aborts the interrupt driven message receive process.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
mbIdx – The FlexCAN FD Message Buffer index.

status_t FLEXCAN_TransferSendBlocking(CAN_Type *base, uint8_t mbIdx, flexcan_frame_t *pTxFrame)

Performs a polling send transaction on the CAN bus.

Note

A transfer handle does not need to be created before calling this API.

Parameters:

base – FlexCAN peripheral base pointer.
mbIdx – The FlexCAN Message Buffer index.
pTxFrame – Pointer to CAN message frame to be sent.

Return values:

kStatus_Success – - Write Tx Message Buffer Successfully.
kStatus_Fail – - Tx Message Buffer is currently in use.

status_t FLEXCAN_TransferReceiveBlocking(CAN_Type *base, uint8_t mbIdx, flexcan_frame_t *pRxFrame)

Performs a polling receive transaction on the CAN bus.

Note

A transfer handle does not need to be created before calling this API.

Parameters:

base – FlexCAN peripheral base pointer.
mbIdx – The FlexCAN Message Buffer index.
pRxFrame – Pointer to CAN message frame structure for reception.

Return values:

kStatus_Success – - Rx Message Buffer is full and has been read successfully.
kStatus_FLEXCAN_RxOverflow – - Rx Message Buffer is already overflowed and has been read successfully.
kStatus_Fail – - Rx Message Buffer is empty.

status_t FLEXCAN_TransferReceiveFifoBlocking(CAN_Type *base, flexcan_frame_t *pRxFrame)

Performs a polling receive transaction from Legacy Rx FIFO on the CAN bus.

Note

A transfer handle does not need to be created before calling this API.

Parameters:

base – FlexCAN peripheral base pointer.
pRxFrame – Pointer to CAN message frame structure for reception.

Return values:

kStatus_Success – - Read Message from Rx FIFO successfully.
kStatus_Fail – - Rx FIFO is not enabled.

status_t FLEXCAN_TransferReceiveEnhancedFifoBlocking(CAN_Type *base, flexcan_fd_frame_t *pRxFrame)

Performs a polling receive transaction from Enhanced Rx FIFO on the CAN bus.

Note

A transfer handle does not need to be created before calling this API.

Parameters:

base – FlexCAN peripheral base pointer.
pRxFrame – Pointer to CAN FD message frame structure for reception.

Return values:

kStatus_Success – - Read Message from Rx FIFO successfully.
kStatus_Fail – - Rx FIFO is not enabled.

void FLEXCAN_TransferCreateHandle(CAN_Type *base, flexcan_handle_t *handle, flexcan_transfer_callback_t callback, void *userData)

Initializes the FlexCAN handle.

This function initializes the FlexCAN handle, which can be used for other FlexCAN transactional APIs. Usually, for a specified FlexCAN instance, call this API once to get the initialized handle.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
callback – The callback function.
userData – The parameter of the callback function.

status_t FLEXCAN_TransferSendNonBlocking(CAN_Type *base, flexcan_handle_t *handle, flexcan_mb_transfer_t *pMbXfer)

Sends a message using IRQ.

This function sends a message using IRQ. This is a non-blocking function, which returns right away. When messages have been sent out, the send callback function is called.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
pMbXfer – FlexCAN Message Buffer transfer structure. See the flexcan_mb_transfer_t.

Return values:

kStatus_Success – Start Tx Message Buffer sending process successfully.
kStatus_Fail – Write Tx Message Buffer failed.
kStatus_FLEXCAN_TxBusy – Tx Message Buffer is in use.

status_t FLEXCAN_TransferReceiveNonBlocking(CAN_Type *base, flexcan_handle_t *handle, flexcan_mb_transfer_t *pMbXfer)

Receives a message using IRQ.

This function receives a message using IRQ. This is non-blocking function, which returns right away. When the message has been received, the receive callback function is called.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
pMbXfer – FlexCAN Message Buffer transfer structure. See the flexcan_mb_transfer_t.

Return values:

kStatus_Success – - Start Rx Message Buffer receiving process successfully.
kStatus_FLEXCAN_RxBusy – - Rx Message Buffer is in use.

status_t FLEXCAN_TransferReceiveFifoNonBlocking(CAN_Type *base, flexcan_handle_t *handle, flexcan_fifo_transfer_t *pFifoXfer)

Receives a message from Rx FIFO using IRQ.

This function receives a message using IRQ. This is a non-blocking function, which returns right away. When all messages have been received, the receive callback function is called.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
pFifoXfer – FlexCAN Rx FIFO transfer structure. See the flexcan_fifo_transfer_t.

Return values:

kStatus_Success – - Start Rx FIFO receiving process successfully.
kStatus_FLEXCAN_RxFifoBusy – - Rx FIFO is currently in use.

status_t FLEXCAN_TransferGetReceiveFifoCount(CAN_Type *base, flexcan_handle_t *handle, size_t *count)

Gets the Legacy Rx Fifo transfer status during a interrupt non-blocking receive.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
count – Number of CAN messages receive so far by the non-blocking transaction.

Return values:

kStatus_InvalidArgument – count is Invalid.
kStatus_Success – Successfully return the count.

status_t FLEXCAN_TransferReceiveEnhancedFifoNonBlocking(CAN_Type *base, flexcan_handle_t *handle, flexcan_fifo_transfer_t *pFifoXfer)

Receives a message from Enhanced Rx FIFO using IRQ.

This function receives a message using IRQ. This is a non-blocking function, which returns right away. When all messages have been received, the receive callback function is called.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
pFifoXfer – FlexCAN Rx FIFO transfer structure. See the ref flexcan_fifo_transfer_t.@

Return values:

kStatus_Success – - Start Rx FIFO receiving process successfully.
kStatus_FLEXCAN_RxFifoBusy – - Rx FIFO is currently in use.

static inline status_t FLEXCAN_TransferGetReceiveEnhancedFifoCount(CAN_Type *base, flexcan_handle_t *handle, size_t *count)

Gets the Enhanced Rx Fifo transfer status during a interrupt non-blocking receive.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
count – Number of CAN messages receive so far by the non-blocking transaction.

Return values:

kStatus_InvalidArgument – count is Invalid.
kStatus_Success – Successfully return the count.

uint32_t FLEXCAN_GetTimeStamp(flexcan_handle_t *handle, uint8_t mbIdx)

Gets the detail index of Mailbox’s Timestamp by handle.

Then function can only be used when calling non-blocking Data transfer (TX/RX) API, After TX/RX data transfer done (User can get the status by handler’s callback function), we can get the detail index of Mailbox’s timestamp by handle, Detail non-blocking data transfer API (TX/RX) contain. -FLEXCAN_TransferSendNonBlocking -FLEXCAN_TransferFDSendNonBlocking -FLEXCAN_TransferReceiveNonBlocking -FLEXCAN_TransferFDReceiveNonBlocking -FLEXCAN_TransferReceiveFifoNonBlocking

Parameters:

handle – FlexCAN handle pointer.
mbIdx – The FlexCAN Message Buffer index.

Return values:

the – index of mailbox ‘s timestamp stored in the handle.

void FLEXCAN_TransferAbortSend(CAN_Type *base, flexcan_handle_t *handle, uint8_t mbIdx)

Aborts the interrupt driven message send process.

This function aborts the interrupt driven message send process.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
mbIdx – The FlexCAN Message Buffer index.

void FLEXCAN_TransferAbortReceive(CAN_Type *base, flexcan_handle_t *handle, uint8_t mbIdx)

Aborts the interrupt driven message receive process.

This function aborts the interrupt driven message receive process.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
mbIdx – The FlexCAN Message Buffer index.

void FLEXCAN_TransferAbortReceiveFifo(CAN_Type *base, flexcan_handle_t *handle)

Aborts the interrupt driven message receive from Rx FIFO process.

This function aborts the interrupt driven message receive from Rx FIFO process.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.

void FLEXCAN_TransferAbortReceiveEnhancedFifo(CAN_Type *base, flexcan_handle_t *handle)

Aborts the interrupt driven message receive from Enhanced Rx FIFO process.

This function aborts the interrupt driven message receive from Enhanced Rx FIFO process.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.

void FLEXCAN_TransferHandleIRQ(CAN_Type *base, flexcan_handle_t *handle)

FlexCAN IRQ handle function.

This function handles the FlexCAN Error, the Message Buffer, and the Rx FIFO IRQ request.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.

FSL_FLEXCAN_DRIVER_VERSION: FlexCAN driver version.

FlexCAN transfer status.

Values:

enumerator kStatus_FLEXCAN_TxBusy: Tx Message Buffer is Busy.

enumerator kStatus_FLEXCAN_TxIdle: Tx Message Buffer is Idle.

enumerator kStatus_FLEXCAN_TxSwitchToRx: Remote Message is send out and Message buffer changed to Receive one.

enumerator kStatus_FLEXCAN_RxBusy: Rx Message Buffer is Busy.

enumerator kStatus_FLEXCAN_RxIdle: Rx Message Buffer is Idle.

enumerator kStatus_FLEXCAN_RxOverflow: Rx Message Buffer is Overflowed.

enumerator kStatus_FLEXCAN_RxFifoBusy: Rx Message FIFO is Busy.

enumerator kStatus_FLEXCAN_RxFifoIdle: Rx Message FIFO is Idle.

enumerator kStatus_FLEXCAN_RxFifoOverflow: Rx Message FIFO is overflowed.

enumerator kStatus_FLEXCAN_RxFifoWarning: Rx Message FIFO is almost overflowed.

enumerator kStatus_FLEXCAN_RxFifoDisabled: Rx Message FIFO is disabled during reading.

enumerator kStatus_FLEXCAN_ErrorStatus: FlexCAN Module Error and Status.

enumerator kStatus_FLEXCAN_WakeUp: FlexCAN is waken up from STOP mode.

enumerator kStatus_FLEXCAN_UnHandled: UnHadled Interrupt asserted.

enumerator kStatus_FLEXCAN_RxRemote: Rx Remote Message Received in Mail box.

enumerator kStatus_FLEXCAN_RxFifoUnderflow: Enhanced Rx Message FIFO is underflow.

enum _flexcan_frame_format

FlexCAN frame format.

Values:

enumerator kFLEXCAN_FrameFormatStandard: Standard frame format attribute.

enumerator kFLEXCAN_FrameFormatExtend: Extend frame format attribute.

enum _flexcan_frame_type

FlexCAN frame type.

Values:

enumerator kFLEXCAN_FrameTypeData: Data frame type attribute.

enumerator kFLEXCAN_FrameTypeRemote: Remote frame type attribute.

enum _flexcan_clock_source

FlexCAN clock source.

Deprecated:

Do not use the kFLEXCAN_ClkSrcOs. It has been superceded kFLEXCAN_ClkSrc0

Do not use the kFLEXCAN_ClkSrcPeri. It has been superceded kFLEXCAN_ClkSrc1

Values:

enumerator kFLEXCAN_ClkSrcOsc: FlexCAN Protocol Engine clock from Oscillator.

enumerator kFLEXCAN_ClkSrcPeri: FlexCAN Protocol Engine clock from Peripheral Clock.

enumerator kFLEXCAN_ClkSrc0: FlexCAN Protocol Engine clock selected by user as SRC == 0.

enumerator kFLEXCAN_ClkSrc1: FlexCAN Protocol Engine clock selected by user as SRC == 1.

enum _flexcan_wake_up_source

FlexCAN wake up source.

Values:

enumerator kFLEXCAN_WakeupSrcUnfiltered: FlexCAN uses unfiltered Rx input to detect edge.

enumerator kFLEXCAN_WakeupSrcFiltered: FlexCAN uses filtered Rx input to detect edge.

enum _flexcan_rx_fifo_filter_type

FlexCAN Rx Fifo Filter type.

Values:

enumerator kFLEXCAN_RxFifoFilterTypeA: One full ID (standard and extended) per ID Filter element.

enumerator kFLEXCAN_RxFifoFilterTypeB: Two full standard IDs or two partial 14-bit ID slices per ID Filter Table element.

enumerator kFLEXCAN_RxFifoFilterTypeC: Four partial 8-bit Standard or extended ID slices per ID Filter Table element.

enumerator kFLEXCAN_RxFifoFilterTypeD: All frames rejected.

enum _flexcan_mb_size

FlexCAN Message Buffer Payload size.

Values:

enumerator kFLEXCAN_8BperMB: Selects 8 bytes per Message Buffer.

enumerator kFLEXCAN_16BperMB: Selects 16 bytes per Message Buffer.

enumerator kFLEXCAN_32BperMB: Selects 32 bytes per Message Buffer.

enumerator kFLEXCAN_64BperMB: Selects 64 bytes per Message Buffer.

enum _flexcan_fd_frame_length

FlexCAN CAN FD frame supporting data length (available DLC values).

For Tx, when the Data size corresponding to DLC value stored in the MB selected for transmission is larger than the MB Payload size, FlexCAN adds the necessary number of bytes with constant 0xCC pattern to complete the expected DLC. For Rx, when the Data size corresponding to DLC value received from the CAN bus is larger than the MB Payload size, the high order bytes that do not fit the Payload size will lose.

Values:

enumerator kFLEXCAN_0BperFrame: Frame contains 0 valid data bytes.

enumerator kFLEXCAN_1BperFrame: Frame contains 1 valid data bytes.

enumerator kFLEXCAN_2BperFrame: Frame contains 2 valid data bytes.

enumerator kFLEXCAN_3BperFrame: Frame contains 3 valid data bytes.

enumerator kFLEXCAN_4BperFrame: Frame contains 4 valid data bytes.

enumerator kFLEXCAN_5BperFrame: Frame contains 5 valid data bytes.

enumerator kFLEXCAN_6BperFrame: Frame contains 6 valid data bytes.

enumerator kFLEXCAN_7BperFrame: Frame contains 7 valid data bytes.

enumerator kFLEXCAN_8BperFrame: Frame contains 8 valid data bytes.

enumerator kFLEXCAN_12BperFrame: Frame contains 12 valid data bytes.

enumerator kFLEXCAN_16BperFrame: Frame contains 16 valid data bytes.

enumerator kFLEXCAN_20BperFrame: Frame contains 20 valid data bytes.

enumerator kFLEXCAN_24BperFrame: Frame contains 24 valid data bytes.

enumerator kFLEXCAN_32BperFrame: Frame contains 32 valid data bytes.

enumerator kFLEXCAN_48BperFrame: Frame contains 48 valid data bytes.

enumerator kFLEXCAN_64BperFrame: Frame contains 64 valid data bytes.

enum _flexcan_efifo_dma_per_read_length

FlexCAN Enhanced Rx Fifo DMA transfer per read length enumerations.

Values:

enumerator kFLEXCAN_1WordPerRead: Transfer 1 32-bit words (CS).

enumerator kFLEXCAN_2WordPerRead: Transfer 2 32-bit words (CS + ID).

enumerator kFLEXCAN_3WordPerRead: Transfer 3 32-bit words (CS + ID + 1~4 bytes data).

enumerator kFLEXCAN_4WordPerRead: Transfer 4 32-bit words (CS + ID + 5~8 bytes data).

enumerator kFLEXCAN_5WordPerRead: Transfer 5 32-bit words (CS + ID + 9~12 bytes data).

enumerator kFLEXCAN_6WordPerRead: Transfer 6 32-bit words (CS + ID + 13~16 bytes data).

enumerator kFLEXCAN_7WordPerRead: Transfer 7 32-bit words (CS + ID + 17~20 bytes data).

enumerator kFLEXCAN_8WordPerRead: Transfer 8 32-bit words (CS + ID + 21~24 bytes data).

enumerator kFLEXCAN_9WordPerRead: Transfer 9 32-bit words (CS + ID + 25~28 bytes data).

enumerator kFLEXCAN_10WordPerRead: Transfer 10 32-bit words (CS + ID + 29~32 bytes data).

enumerator kFLEXCAN_11WordPerRead: Transfer 11 32-bit words (CS + ID + 33~36 bytes data).

enumerator kFLEXCAN_12WordPerRead: Transfer 12 32-bit words (CS + ID + 37~40 bytes data).

enumerator kFLEXCAN_13WordPerRead: Transfer 13 32-bit words (CS + ID + 41~44 bytes data).

enumerator kFLEXCAN_14WordPerRead: Transfer 14 32-bit words (CS + ID + 45~48 bytes data).

enumerator kFLEXCAN_15WordPerRead: Transfer 15 32-bit words (CS + ID + 49~52 bytes data).

enumerator kFLEXCAN_16WordPerRead: Transfer 16 32-bit words (CS + ID + 53~56 bytes data).

enumerator kFLEXCAN_17WordPerRead: Transfer 17 32-bit words (CS + ID + 57~60 bytes data).

enumerator kFLEXCAN_18WordPerRead: Transfer 18 32-bit words (CS + ID + 61~64 bytes data).

enumerator kFLEXCAN_19WordPerRead: Transfer 19 32-bit words (CS + ID + 64 bytes data + ID HIT).

enum _flexcan_rx_fifo_priority

FlexCAN Enhanced/Legacy Rx FIFO priority.

The matching process starts from the Rx MB(or Enhanced/Legacy Rx FIFO) with higher priority. If no MB(or Enhanced/Legacy Rx FIFO filter) is satisfied, the matching process goes on with the Enhanced/Legacy Rx FIFO(or Rx MB) with lower priority.

Values:

enumerator kFLEXCAN_RxFifoPrioLow: Matching process start from Rx Message Buffer first.

enumerator kFLEXCAN_RxFifoPrioHigh: Matching process start from Enhanced/Legacy Rx FIFO first.

enum _flexcan_interrupt_enable

FlexCAN interrupt enable enumerations.

This provides constants for the FlexCAN interrupt enable enumerations for use in the FlexCAN functions.

Note

FlexCAN Message Buffers and Legacy Rx FIFO interrupts not included in.

Values:

enumerator kFLEXCAN_BusOffInterruptEnable: Bus Off interrupt, use bit 15.

enumerator kFLEXCAN_ErrorInterruptEnable: CAN Error interrupt, use bit 14.

enumerator kFLEXCAN_TxWarningInterruptEnable: Tx Warning interrupt, use bit 11.

enumerator kFLEXCAN_RxWarningInterruptEnable: Rx Warning interrupt, use bit 10.

enumerator kFLEXCAN_WakeUpInterruptEnable: Self Wake Up interrupt, use bit 26.

enumerator kFLEXCAN_FDErrorInterruptEnable: CAN FD Error interrupt, use bit 31.

enumerator kFLEXCAN_PNMatchWakeUpInterruptEnable: PN Match Wake Up interrupt, use high word bit 17.

enumerator kFLEXCAN_PNTimeoutWakeUpInterruptEnable: PN Timeout Wake Up interrupt, use high word bit 16. Enhanced Rx FIFO Underflow interrupt, use high word bit 31.

enumerator kFLEXCAN_ERxFifoUnderflowInterruptEnable: Enhanced Rx FIFO Overflow interrupt, use high word bit 30.

enumerator kFLEXCAN_ERxFifoOverflowInterruptEnable: Enhanced Rx FIFO Watermark interrupt, use high word bit 29.

enumerator kFLEXCAN_ERxFifoWatermarkInterruptEnable: Enhanced Rx FIFO Data Avilable interrupt, use high word bit 28.

enumerator kFLEXCAN_ERxFifoDataAvlInterruptEnable

enumerator kFLEXCAN_HostAccessNCErrorInterruptEnable: Host Access With Non-Correctable Errors interrupt, use high word bit 0.

enumerator kFLEXCAN_FlexCanAccessNCErrorInterruptEnable: FlexCAN Access With Non-Correctable Errors interrupt, use high word bit 2.

enumerator kFLEXCAN_HostOrFlexCanCErrorInterruptEnable: Host or FlexCAN Access With Correctable Errors interrupt, use high word bit 3.

enum _flexcan_flags

FlexCAN status flags.

This provides constants for the FlexCAN status flags for use in the FlexCAN functions.

Note

The CPU read action clears the bits corresponding to the FlEXCAN_ErrorFlag macro, therefore user need to read status flags and distinguish which error is occur using _flexcan_error_flags enumerations.

Values:

enumerator kFLEXCAN_ErrorOverrunFlag: Error Overrun Status.

enumerator kFLEXCAN_FDErrorIntFlag: CAN FD Error Interrupt Flag.

enumerator kFLEXCAN_BusoffDoneIntFlag: Bus Off process completed Interrupt Flag.

enumerator kFLEXCAN_SynchFlag: CAN Synchronization Status.

enumerator kFLEXCAN_TxWarningIntFlag: Tx Warning Interrupt Flag.

enumerator kFLEXCAN_RxWarningIntFlag: Rx Warning Interrupt Flag.

enumerator kFLEXCAN_IdleFlag: FlexCAN In IDLE Status.

enumerator kFLEXCAN_FaultConfinementFlag: FlexCAN Fault Confinement State.

enumerator kFLEXCAN_TransmittingFlag: FlexCAN In Transmission Status.

enumerator kFLEXCAN_ReceivingFlag: FlexCAN In Reception Status.

enumerator kFLEXCAN_BusOffIntFlag: Bus Off Interrupt Flag.

enumerator kFLEXCAN_ErrorIntFlag: CAN Error Interrupt Flag.

enumerator kFLEXCAN_WakeUpIntFlag: Self Wake-Up Interrupt Flag.

enumerator kFLEXCAN_ErrorFlag

enumerator kFLEXCAN_PNMatchIntFlag: PN Matching Event Interrupt Flag.

enumerator kFLEXCAN_PNTimeoutIntFlag: PN Timeout Event Interrupt Flag.

enumerator kFLEXCAN_ERxFifoUnderflowIntFlag: Enhanced Rx FIFO underflow Interrupt Flag.

enumerator kFLEXCAN_ERxFifoOverflowIntFlag: Enhanced Rx FIFO overflow Interrupt Flag.

enumerator kFLEXCAN_ERxFifoWatermarkIntFlag: Enhanced Rx FIFO watermark Interrupt Flag.

enumerator kFLEXCAN_ERxFifoDataAvlIntFlag: Enhanced Rx FIFO data available Interrupt Flag.

enumerator kFLEXCAN_ERxFifoEmptyFlag: Enhanced Rx FIFO empty status.

enumerator kFLEXCAN_ERxFifoFullFlag: Enhanced Rx FIFO full status.

enumerator kFLEXCAN_HostAccessNonCorrectableErrorIntFlag: Host Access With Non-Correctable Error Interrupt Flag.

enumerator kFLEXCAN_FlexCanAccessNonCorrectableErrorIntFlag: FlexCAN Access With Non-Correctable Error Interrupt Flag.

enumerator kFLEXCAN_CorrectableErrorIntFlag: Correctable Error Interrupt Flag.

enumerator kFLEXCAN_HostAccessNonCorrectableErrorOverrunFlag: Host Access With Non-Correctable Error Interrupt Overrun Flag.

enumerator kFLEXCAN_FlexCanAccessNonCorrectableErrorOverrunFlag: FlexCAN Access With Non-Correctable Error Interrupt Overrun Flag.

enumerator kFLEXCAN_CorrectableErrorOverrunFlag: Correctable Error Interrupt Overrun Flag.

enumerator kFLEXCAN_AllMemoryErrorFlag: All Memory Error Flags.

enum _flexcan_error_flags

FlexCAN error status flags.

The FlexCAN Error Status enumerations is used to report current error of the FlexCAN bus. This enumerations should be used with KFLEXCAN_ErrorFlag in _flexcan_flags enumerations to ditermine which error is generated.

Values:

enumerator kFLEXCAN_FDStuffingError: Stuffing Error.

enumerator kFLEXCAN_FDFormError: Form Error.

enumerator kFLEXCAN_FDCrcError: Cyclic Redundancy Check Error.

enumerator kFLEXCAN_FDBit0Error: Unable to send dominant bit.

enumerator kFLEXCAN_FDBit1Error: Unable to send recessive bit.

enumerator kFLEXCAN_TxErrorWarningFlag: Tx Error Warning Status.

enumerator kFLEXCAN_RxErrorWarningFlag: Rx Error Warning Status.

enumerator kFLEXCAN_StuffingError: Stuffing Error.

enumerator kFLEXCAN_FormError: Form Error.

enumerator kFLEXCAN_CrcError: Cyclic Redundancy Check Error.

enumerator kFLEXCAN_AckError: Received no ACK on transmission.

enumerator kFLEXCAN_Bit0Error: Unable to send dominant bit.

enumerator kFLEXCAN_Bit1Error: Unable to send recessive bit.

FlexCAN Legacy Rx FIFO status flags.

The FlexCAN Legacy Rx FIFO Status enumerations are used to determine the status of the Rx FIFO. Because Rx FIFO occupy the MB0 ~ MB7 (Rx Fifo filter also occupies more Message Buffer space), Rx FIFO status flags are mapped to the corresponding Message Buffer status flags.

Values:

enumerator kFLEXCAN_RxFifoOverflowFlag: Rx FIFO overflow flag.

enumerator kFLEXCAN_RxFifoWarningFlag: Rx FIFO almost full flag.

enumerator kFLEXCAN_RxFifoFrameAvlFlag: Frames available in Rx FIFO flag.

enum _flexcan_memory_error_type

FlexCAN Memory Error Type.

Values:

enumerator kFLEXCAN_CorrectableError: The memory error is correctable which means on bit error.

enumerator kFLEXCAN_NonCorrectableError: The memory error is non-correctable which means two bit errors.

enum _flexcan_memory_access_type

FlexCAN Memory Access Type.

Values:

enumerator kFLEXCAN_MoveOutFlexCanAccess: The memory error was detected during move-out FlexCAN access.

enumerator kFLEXCAN_MoveInAccess: The memory error was detected during move-in FlexCAN access.

enumerator kFLEXCAN_TxArbitrationAccess: The memory error was detected during Tx Arbitration FlexCAN access.

enumerator kFLEXCAN_RxMatchingAccess: The memory error was detected during Rx Matching FlexCAN access.

enumerator kFLEXCAN_MoveOutHostAccess: The memory error was detected during Rx Matching Host (CPU) access.

enum _flexcan_byte_error_syndrome

FlexCAN Memory Error Byte Syndrome.

Values:

enumerator kFLEXCAN_NoError: No bit error in this byte.

enumerator kFLEXCAN_ParityBits0Error: Parity bit 0 error in this byte.

enumerator kFLEXCAN_ParityBits1Error: Parity bit 1 error in this byte.

enumerator kFLEXCAN_ParityBits2Error: Parity bit 2 error in this byte.

enumerator kFLEXCAN_ParityBits3Error: Parity bit 3 error in this byte.

enumerator kFLEXCAN_ParityBits4Error: Parity bit 4 error in this byte.

enumerator kFLEXCAN_DataBits0Error: Data bit 0 error in this byte.

enumerator kFLEXCAN_DataBits1Error: Data bit 1 error in this byte.

enumerator kFLEXCAN_DataBits2Error: Data bit 2 error in this byte.

enumerator kFLEXCAN_DataBits3Error: Data bit 3 error in this byte.

enumerator kFLEXCAN_DataBits4Error: Data bit 4 error in this byte.

enumerator kFLEXCAN_DataBits5Error: Data bit 5 error in this byte.

enumerator kFLEXCAN_DataBits6Error: Data bit 6 error in this byte.

enumerator kFLEXCAN_DataBits7Error: Data bit 7 error in this byte.

enumerator kFLEXCAN_AllZeroError: All-zeros non-correctable error in this byte.

enumerator kFLEXCAN_AllOneError: All-ones non-correctable error in this byte.

enumerator kFLEXCAN_NonCorrectableErrors: Non-correctable error in this byte.

enum _flexcan_pn_match_source

FlexCAN Pretended Networking match source selection.

Values:

enumerator kFLEXCAN_PNMatSrcID: Message match with ID filtering.

enumerator kFLEXCAN_PNMatSrcIDAndData: Message match with ID filtering and payload filtering.

enum _flexcan_pn_match_mode

FlexCAN Pretended Networking mode match type.

Values:

enumerator kFLEXCAN_PNMatModeEqual: Match upon ID/Payload contents against an exact target value.

enumerator kFLEXCAN_PNMatModeGreater: Match upon an ID/Payload value greater than or equal to a specified target value.

enumerator kFLEXCAN_PNMatModeSmaller: Match upon an ID/Payload value smaller than or equal to a specified target value.

enumerator kFLEXCAN_PNMatModeRange: Match upon an ID/Payload value inside a range, greater than or equal to a specified lower limit, and smaller than or equal to a specified upper limit

typedef enum _flexcan_frame_format flexcan_frame_format_t: FlexCAN frame format.

typedef enum _flexcan_frame_type flexcan_frame_type_t: FlexCAN frame type.

typedef enum _flexcan_clock_source flexcan_clock_source_t

FlexCAN clock source.

Deprecated:

Do not use the kFLEXCAN_ClkSrcOs. It has been superceded kFLEXCAN_ClkSrc0

Do not use the kFLEXCAN_ClkSrcPeri. It has been superceded kFLEXCAN_ClkSrc1

typedef enum _flexcan_wake_up_source flexcan_wake_up_source_t: FlexCAN wake up source.

typedef enum _flexcan_rx_fifo_filter_type flexcan_rx_fifo_filter_type_t: FlexCAN Rx Fifo Filter type.

typedef enum _flexcan_mb_size flexcan_mb_size_t: FlexCAN Message Buffer Payload size.

typedef enum _flexcan_efifo_dma_per_read_length flexcan_efifo_dma_per_read_length_t: FlexCAN Enhanced Rx Fifo DMA transfer per read length enumerations.

typedef enum _flexcan_rx_fifo_priority flexcan_rx_fifo_priority_t

FlexCAN Enhanced/Legacy Rx FIFO priority.

The matching process starts from the Rx MB(or Enhanced/Legacy Rx FIFO) with higher priority. If no MB(or Enhanced/Legacy Rx FIFO filter) is satisfied, the matching process goes on with the Enhanced/Legacy Rx FIFO(or Rx MB) with lower priority.

typedef enum _flexcan_memory_error_type flexcan_memory_error_type_t: FlexCAN Memory Error Type.

typedef enum _flexcan_memory_access_type flexcan_memory_access_type_t: FlexCAN Memory Access Type.

typedef enum _flexcan_byte_error_syndrome flexcan_byte_error_syndrome_t: FlexCAN Memory Error Byte Syndrome.

typedef struct _flexcan_memory_error_report_status flexcan_memory_error_report_status_t

FlexCAN memory error register status structure.

This structure contains the memory access properties that caused a memory error access. It is used as the parameter of FLEXCAN_GetMemoryErrorReportStatus() function. And user can use FLEXCAN_GetMemoryErrorReportStatus to get the status of the last memory error access.

typedef struct _flexcan_frame flexcan_frame_t: FlexCAN message frame structure.

typedef struct _flexcan_fd_frame flexcan_fd_frame_t

CAN FD message frame structure.

The CAN FD message supporting up to sixty four bytes can be used for a data frame, depending on the length selected for the message buffers. The length should be a enumeration member, see _flexcan_fd_frame_length.

typedef struct _flexcan_timing_config flexcan_timing_config_t: FlexCAN protocol timing characteristic configuration structure.

typedef struct _flexcan_config flexcan_config_t

FlexCAN module configuration structure.

Deprecated:

Do not use the baudRate. It has been superceded bitRate

Do not use the baudRateFD. It has been superceded bitRateFD

typedef struct _flexcan_rx_mb_config flexcan_rx_mb_config_t

FlexCAN Receive Message Buffer configuration structure.

This structure is used as the parameter of FLEXCAN_SetRxMbConfig() function. The FLEXCAN_SetRxMbConfig() function is used to configure FlexCAN Receive Message Buffer. The function abort previous receiving process, clean the Message Buffer and activate the Rx Message Buffer using given Message Buffer setting.

typedef enum _flexcan_pn_match_source flexcan_pn_match_source_t: FlexCAN Pretended Networking match source selection.

typedef enum _flexcan_pn_match_mode flexcan_pn_match_mode_t: FlexCAN Pretended Networking mode match type.

typedef struct _flexcan_pn_config flexcan_pn_config_t

FlexCAN Pretended Networking configuration structure.

This structure is used as the parameter of FLEXCAN_SetPNConfig() function. The FLEXCAN_SetPNConfig() function is used to configure FlexCAN Networking work mode.

typedef struct _flexcan_rx_fifo_config flexcan_rx_fifo_config_t: FlexCAN Legacy Rx FIFO configuration structure.

typedef struct _flexcan_enhanced_rx_fifo_std_id_filter flexcan_enhanced_rx_fifo_std_id_filter_t: FlexCAN Enhanced Rx FIFO Standard ID filter element structure.

typedef struct _flexcan_enhanced_rx_fifo_ext_id_filter flexcan_enhanced_rx_fifo_ext_id_filter_t: FlexCAN Enhanced Rx FIFO Extended ID filter element structure.

typedef struct _flexcan_enhanced_rx_fifo_config flexcan_enhanced_rx_fifo_config_t: FlexCAN Enhanced Rx FIFO configuration structure.

typedef struct _flexcan_mb_transfer flexcan_mb_transfer_t: FlexCAN Message Buffer transfer.

typedef struct _flexcan_fifo_transfer flexcan_fifo_transfer_t: FlexCAN Rx FIFO transfer.

typedef struct _flexcan_handle flexcan_handle_t: FlexCAN handle structure definition.

typedef void (*flexcan_transfer_callback_t)(CAN_Type *base, flexcan_handle_t *handle, status_t status, uint64_t result, void *userData)

FLEXCAN_WAIT_TIMEOUT

DLC_LENGTH_DECODE(dlc): FlexCAN frame length helper macro.

FLEXCAN_ID_STD(id)

FlexCAN Frame ID helper macro.

Standard Frame ID helper macro.

FLEXCAN_ID_EXT(id): Extend Frame ID helper macro.

FLEXCAN_RX_MB_STD_MASK(id, rtr, ide)

FlexCAN Rx Message Buffer Mask helper macro.

Standard Rx Message Buffer Mask helper macro.

FLEXCAN_RX_MB_EXT_MASK(id, rtr, ide): Extend Rx Message Buffer Mask helper macro.

FLEXCAN_RX_FIFO_STD_MASK_TYPE_A(id, rtr, ide)

FlexCAN Legacy Rx FIFO Mask helper macro.

Standard Rx FIFO Mask helper macro Type A helper macro.

FLEXCAN_RX_FIFO_STD_MASK_TYPE_B_HIGH(id, rtr, ide): Standard Rx FIFO Mask helper macro Type B upper part helper macro.

FLEXCAN_RX_FIFO_STD_MASK_TYPE_B_LOW(id, rtr, ide): Standard Rx FIFO Mask helper macro Type B lower part helper macro.

FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_HIGH(id): Standard Rx FIFO Mask helper macro Type C upper part helper macro.

FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_MID_HIGH(id): Standard Rx FIFO Mask helper macro Type C mid-upper part helper macro.

FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_MID_LOW(id): Standard Rx FIFO Mask helper macro Type C mid-lower part helper macro.

FLEXCAN_RX_FIFO_STD_MASK_TYPE_C_LOW(id): Standard Rx FIFO Mask helper macro Type C lower part helper macro.

FLEXCAN_RX_FIFO_EXT_MASK_TYPE_A(id, rtr, ide): Extend Rx FIFO Mask helper macro Type A helper macro.

FLEXCAN_RX_FIFO_EXT_MASK_TYPE_B_HIGH(id, rtr, ide): Extend Rx FIFO Mask helper macro Type B upper part helper macro.

FLEXCAN_RX_FIFO_EXT_MASK_TYPE_B_LOW(id, rtr, ide): Extend Rx FIFO Mask helper macro Type B lower part helper macro.

FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_HIGH(id): Extend Rx FIFO Mask helper macro Type C upper part helper macro.

FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_MID_HIGH(id): Extend Rx FIFO Mask helper macro Type C mid-upper part helper macro.

FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_MID_LOW(id): Extend Rx FIFO Mask helper macro Type C mid-lower part helper macro.

FLEXCAN_RX_FIFO_EXT_MASK_TYPE_C_LOW(id): Extend Rx FIFO Mask helper macro Type C lower part helper macro.

FLEXCAN_RX_FIFO_STD_FILTER_TYPE_A(id, rtr, ide)

FlexCAN Rx FIFO Filter helper macro.

Standard Rx FIFO Filter helper macro Type A helper macro.

FLEXCAN_RX_FIFO_STD_FILTER_TYPE_B_HIGH(id, rtr, ide): Standard Rx FIFO Filter helper macro Type B upper part helper macro.

FLEXCAN_RX_FIFO_STD_FILTER_TYPE_B_LOW(id, rtr, ide): Standard Rx FIFO Filter helper macro Type B lower part helper macro.

FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_HIGH(id): Standard Rx FIFO Filter helper macro Type C upper part helper macro.

FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_MID_HIGH(id): Standard Rx FIFO Filter helper macro Type C mid-upper part helper macro.

FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_MID_LOW(id): Standard Rx FIFO Filter helper macro Type C mid-lower part helper macro.

FLEXCAN_RX_FIFO_STD_FILTER_TYPE_C_LOW(id): Standard Rx FIFO Filter helper macro Type C lower part helper macro.

FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_A(id, rtr, ide): Extend Rx FIFO Filter helper macro Type A helper macro.

FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_B_HIGH(id, rtr, ide): Extend Rx FIFO Filter helper macro Type B upper part helper macro.

FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_B_LOW(id, rtr, ide): Extend Rx FIFO Filter helper macro Type B lower part helper macro.

FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_HIGH(id): Extend Rx FIFO Filter helper macro Type C upper part helper macro.

FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_MID_HIGH(id): Extend Rx FIFO Filter helper macro Type C mid-upper part helper macro.

FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_MID_LOW(id): Extend Rx FIFO Filter helper macro Type C mid-lower part helper macro.

FLEXCAN_RX_FIFO_EXT_FILTER_TYPE_C_LOW(id): Extend Rx FIFO Filter helper macro Type C lower part helper macro.

ENHANCED_RX_FIFO_FSCH(x): FlexCAN Enhanced Rx FIFO Filter and Mask helper macro.

RTR_STD_HIGH(x)

RTR_STD_LOW(x)

RTR_EXT(x)

ID_STD_LOW(id)

ID_STD_HIGH(id)

ID_EXT(id)

FLEXCAN_ENHANCED_RX_FIFO_STD_MASK_AND_FILTER(id, rtr, id_mask, rtr_mask): Standard ID filter element with filter + mask scheme.

FLEXCAN_ENHANCED_RX_FIFO_STD_FILTER_WITH_RANGE(id_upper, rtr, id_lower, rtr_mask): Standard ID filter element with filter range.

FLEXCAN_ENHANCED_RX_FIFO_STD_TWO_FILTERS(id1, rtr1, id2, rtr2): Standard ID filter element with two filters without masks.

FLEXCAN_ENHANCED_RX_FIFO_EXT_MASK_AND_FILTER_LOW(id, rtr): Extended ID filter element with filter + mask scheme low word.

FLEXCAN_ENHANCED_RX_FIFO_EXT_MASK_AND_FILTER_HIGH(id_mask, rtr_mask): Extended ID filter element with filter + mask scheme high word.

FLEXCAN_ENHANCED_RX_FIFO_EXT_FILTER_WITH_RANGE_LOW(id_upper, rtr): Extended ID filter element with range scheme low word.

FLEXCAN_ENHANCED_RX_FIFO_EXT_FILTER_WITH_RANGE_HIGH(id_lower, rtr_mask): Extended ID filter element with range scheme high word.

FLEXCAN_ENHANCED_RX_FIFO_EXT_TWO_FILTERS_LOW(id2, rtr2): Extended ID filter element with two filters without masks low word.

FLEXCAN_ENHANCED_RX_FIFO_EXT_TWO_FILTERS_HIGH(id1, rtr1): Extended ID filter element with two filters without masks high word.

FLEXCAN_PN_STD_MASK(id, rtr)

FlexCAN Pretended Networking ID Mask helper macro.

Standard Rx Message Buffer Mask helper macro.

FLEXCAN_PN_EXT_MASK(id, rtr): Extend Rx Message Buffer Mask helper macro.

FLEXCAN_PN_INT_MASK(x): FlexCAN interrupt/status flag helper macro.

FLEXCAN_PN_INT_UNMASK(x)

FLEXCAN_PN_STATUS_MASK(x)

FLEXCAN_PN_STATUS_UNMASK(x)

FLEXCAN_EFIFO_INT_MASK(x)

FLEXCAN_EFIFO_INT_UNMASK(x)

FLEXCAN_EFIFO_STATUS_MASK(x)

FLEXCAN_EFIFO_STATUS_UNMASK(x)

FLEXCAN_MECR_INT_MASK(x)

FLEXCAN_MECR_INT_UNMASK(x)

FLEXCAN_MECR_STATUS_MASK(x)

FLEXCAN_MECR_STATUS_UNMASK(x)

FLEXCAN_ERROR_AND_STATUS_INIT_FLAG

FLEXCAN_WAKE_UP_FLAG

FLEXCAN_MEMORY_ERROR_INIT_FLAG

FLEXCAN_MEMORY_ENHANCED_RX_FIFO_INIT_FLAG

E_RX_FIFO(base): FlexCAN Enhanced Rx FIFO base address helper macro.

FLEXCAN_CALLBACK(x)

FlexCAN transfer callback function.

The FlexCAN transfer callback returns a value from the underlying layer. If the status equals to kStatus_FLEXCAN_ErrorStatus, the result parameter is the Content of FlexCAN status register which can be used to get the working status(or error status) of FlexCAN module. If the status equals to other FlexCAN Message Buffer transfer status, the result is the index of Message Buffer that generate transfer event. If the status equals to other FlexCAN Message Buffer transfer status, the result is meaningless and should be Ignored.

struct _flexcan_memory_error_report_status

#include <fsl_flexcan.h>

FlexCAN memory error register status structure.

This structure contains the memory access properties that caused a memory error access. It is used as the parameter of FLEXCAN_GetMemoryErrorReportStatus() function. And user can use FLEXCAN_GetMemoryErrorReportStatus to get the status of the last memory error access.

Public Members

flexcan_memory_error_type_t errorType: The type of memory error that giving rise to the report.

flexcan_memory_access_type_t accessType: The type of memory access that giving rise to the memory error.

uint16_t accessAddress: The address where memory error detected.

uint32_t errorData: The raw data word read from memory with error.

struct _flexcan_frame: #include <fsl_flexcan.h>

FlexCAN message frame structure.

struct _flexcan_fd_frame

#include <fsl_flexcan.h>

CAN FD message frame structure.

The CAN FD message supporting up to sixty four bytes can be used for a data frame, depending on the length selected for the message buffers. The length should be a enumeration member, see _flexcan_fd_frame_length.

Public Members

uint32_t idhit: Note

ID HIT offset is changed dynamically according to data length code (DLC), when DLC is 15, they will be located below. Using FLEXCAN_FixEnhancedRxFifoFrameIdHit API is recommended to ensure this idhit value is correct. CAN Enhanced Rx FIFO filter hit id (This value is only used in Enhanced Rx FIFO receive mode).

struct _flexcan_timing_config

#include <fsl_flexcan.h>

FlexCAN protocol timing characteristic configuration structure.

Public Members

uint16_t preDivider: Classic CAN or CAN FD nominal phase bit rate prescaler.

uint8_t rJumpwidth: Classic CAN or CAN FD nominal phase Re-sync Jump Width.

uint8_t phaseSeg1: Classic CAN or CAN FD nominal phase Segment 1.

uint8_t phaseSeg2: Classic CAN or CAN FD nominal phase Segment 2.

uint8_t propSeg: Classic CAN or CAN FD nominal phase Propagation Segment.

uint16_t fpreDivider: CAN FD data phase bit rate prescaler.

uint8_t frJumpwidth: CAN FD data phase Re-sync Jump Width.

uint8_t fphaseSeg1: CAN FD data phase Phase Segment 1.

uint8_t fphaseSeg2: CAN FD data phase Phase Segment 2.

uint8_t fpropSeg: CAN FD data phase Propagation Segment.

struct _flexcan_config

#include <fsl_flexcan.h>

FlexCAN module configuration structure.

Deprecated:

Do not use the baudRate. It has been superceded bitRate

Do not use the baudRateFD. It has been superceded bitRateFD

Public Members

flexcan_clock_source_t clkSrc: Clock source for FlexCAN Protocol Engine.

flexcan_wake_up_source_t wakeupSrc: Wake up source selection.

uint8_t maxMbNum: The maximum number of Message Buffers used by user.

bool enableLoopBack: Enable or Disable Loop Back Self Test Mode.

bool enableTimerSync: Enable or Disable Timer Synchronization.

bool enableSelfWakeup: Enable or Disable Self Wakeup Mode.

bool enableIndividMask: Enable or Disable Rx Individual Mask and Queue feature.

bool disableSelfReception: Enable or Disable Self Reflection.

bool enableListenOnlyMode: Enable or Disable Listen Only Mode.

bool enableDoze: Enable or Disable Doze Mode.

bool enablePretendedeNetworking: Enable or Disable the Pretended Networking mode.

bool enableMemoryErrorControl: Enable or Disable the memory errors detection and correction mechanism.

bool enableNonCorrectableErrorEnterFreeze: Enable or Disable Non-Correctable Errors In FlexCAN Access Put Device In Freeze Mode.

bool enableTransceiverDelayMeasure: Enable or Disable the transceiver delay measurement, when it is enabled, then the secondary sample point position is determined by the sum of the transceiver delay measurement plus the enhanced TDC offset.

bool enableRemoteRequestFrameStored: true: Store Remote Request Frame in the same fashion of data frame. false: Generate an automatic Remote Response Frame.

struct _flexcan_rx_mb_config

#include <fsl_flexcan.h>

FlexCAN Receive Message Buffer configuration structure.

This structure is used as the parameter of FLEXCAN_SetRxMbConfig() function. The FLEXCAN_SetRxMbConfig() function is used to configure FlexCAN Receive Message Buffer. The function abort previous receiving process, clean the Message Buffer and activate the Rx Message Buffer using given Message Buffer setting.

Public Members

uint32_t id: CAN Message Buffer Frame Identifier, should be set using FLEXCAN_ID_EXT() or FLEXCAN_ID_STD() macro.

flexcan_frame_format_t format: CAN Frame Identifier format(Standard of Extend).

flexcan_frame_type_t type: CAN Frame Type(Data or Remote).

struct _flexcan_pn_config

#include <fsl_flexcan.h>

FlexCAN Pretended Networking configuration structure.

This structure is used as the parameter of FLEXCAN_SetPNConfig() function. The FLEXCAN_SetPNConfig() function is used to configure FlexCAN Networking work mode.

Public Members

bool enableTimeout: Enable or Disable timeout event trigger wakeup.

uint16_t timeoutValue: The timeout value that generates a wakeup event, the counter timer is incremented based on 64 times the CAN Bit Time unit.

bool enableMatch: Enable or Disable match event trigger wakeup.

flexcan_pn_match_source_t matchSrc: Selects the match source (ID and/or data match) to trigger wakeup.

uint8_t matchNum: The number of times a given message must match the predefined ID and/or data before generating a wakeup event, range in 0x1 ~ 0xFF.

flexcan_pn_match_mode_t idMatchMode: The ID match type.

flexcan_pn_match_mode_t dataMatchMode: The data match type.

uint32_t idLower: The ID target values 1 which used either for ID match “equal to”, “smaller than”, “greater than” comparisons, or as the lower limit value in ID match “range detection”.

uint32_t idUpper

The ID target values 2 which used only as the upper limit value in ID match “range

detection” or used to store the ID mask in “equal to”.

uint8_t lengthLower

The lower limit for length of data bytes which used only in data match “range

detection”. Range in 0x0 ~ 0x8.

uint8_t lengthUpper

The upper limit for length of data bytes which used only in data match “range

detection”. Range in 0x0 ~ 0x8.

struct _flexcan_rx_fifo_config

#include <fsl_flexcan.h>

FlexCAN Legacy Rx FIFO configuration structure.

Public Members

uint32_t *idFilterTable: Pointer to the FlexCAN Legacy Rx FIFO identifier filter table.

uint8_t idFilterNum: The FlexCAN Legacy Rx FIFO Filter elements quantity.

flexcan_rx_fifo_filter_type_t idFilterType: The FlexCAN Legacy Rx FIFO Filter type.

flexcan_rx_fifo_priority_t priority: The FlexCAN Legacy Rx FIFO receive priority.

struct _flexcan_enhanced_rx_fifo_std_id_filter

#include <fsl_flexcan.h>

FlexCAN Enhanced Rx FIFO Standard ID filter element structure.

Public Members

uint32_t filterType: FlexCAN internal Free-Running Counter Time Stamp.

uint32_t rtr1: CAN FD frame data length code (DLC), range see _flexcan_fd_frame_length, When the length <= 8, it equal to the data length, otherwise the number of valid frame data is not equal to the length value. user can use DLC_LENGTH_DECODE(length) macro to get the number of valid data bytes.

uint32_t std1: CAN Frame Type(DATA or REMOTE).

uint32_t rtr2: CAN Frame Identifier(STD or EXT format).

uint32_t std2: Substitute Remote request.

struct _flexcan_enhanced_rx_fifo_ext_id_filter

#include <fsl_flexcan.h>

FlexCAN Enhanced Rx FIFO Extended ID filter element structure.

Public Members

uint32_t filterType: FlexCAN internal Free-Running Counter Time Stamp.

uint32_t rtr1: CAN FD frame data length code (DLC), range see _flexcan_fd_frame_length, When the length <= 8, it equal to the data length, otherwise the number of valid frame data is not equal to the length value. user can use DLC_LENGTH_DECODE(length) macro to get the number of valid data bytes.

uint32_t std1: CAN Frame Type(DATA or REMOTE).

uint32_t rtr2: CAN Frame Identifier(STD or EXT format).

uint32_t std2: Substitute Remote request.

struct _flexcan_enhanced_rx_fifo_config

#include <fsl_flexcan.h>

FlexCAN Enhanced Rx FIFO configuration structure.

Public Members

uint32_t *idFilterTable: Pointer to the FlexCAN Enhanced Rx FIFO identifier filter table, each table member occupies 32 bit word, table size should be equal to idFilterNum. There are two types of Enhanced Rx FIFO filter elements that can be stored in table : extended-ID filter element (1 word, occupie 1 table members) and standard-ID filter element (2 words, occupies 2 table members), the extended-ID filter element needs to be placed in front of the table.

uint8_t idFilterPairNum: idFilterPairNum is the Enhanced Rx FIFO identifier filter element pair numbers, each pair of filter elements occupies 2 words and can consist of one extended ID filter element or two standard ID filter elements.

uint8_t extendIdFilterNum: The number of extended ID filter element items in the FlexCAN enhanced Rx FIFO identifier filter table, each extended-ID filter element occupies 2 words, extendIdFilterNum need less than or equal to idFilterPairNum.

uint8_t fifoWatermark: (fifoWatermark + 1) is the minimum number of CAN messages stored in the Enhanced RX FIFO which can trigger FIFO watermark interrupt or a DMA request.

flexcan_efifo_dma_per_read_length_t dmaPerReadLength: Define the length of each read of the Enhanced RX FIFO element by the DAM, see _flexcan_fd_frame_length.

flexcan_rx_fifo_priority_t priority: The FlexCAN Enhanced Rx FIFO receive priority.

struct _flexcan_mb_transfer

#include <fsl_flexcan.h>

FlexCAN Message Buffer transfer.

Public Members

flexcan_frame_t *frame: The buffer of CAN Message to be transfer.

uint8_t mbIdx: The index of Message buffer used to transfer Message.

struct _flexcan_fifo_transfer

#include <fsl_flexcan.h>

FlexCAN Rx FIFO transfer.

Public Members

flexcan_fd_frame_t *framefd: The buffer of CAN Message to be received from Enhanced Rx FIFO.

flexcan_frame_t *frame: The buffer of CAN Message to be received from Legacy Rx FIFO.

size_t frameNum: Number of CAN Message need to be received from Legacy or Ehanced Rx FIFO.

struct _flexcan_handle

#include <fsl_flexcan.h>

FlexCAN handle structure.

Public Members

flexcan_transfer_callback_t callback: Callback function.

void *userData: FlexCAN callback function parameter.

flexcan_frame_t *volatile mbFrameBuf[CAN_WORD1_COUNT]: The buffer for received CAN data from Message Buffers.

flexcan_fd_frame_t *volatile mbFDFrameBuf[CAN_WORD1_COUNT]: The buffer for received CAN FD data from Message Buffers.

flexcan_frame_t *volatile rxFifoFrameBuf: The buffer for received CAN data from Legacy Rx FIFO.

flexcan_fd_frame_t *volatile rxFifoFDFrameBuf: The buffer for received CAN FD data from Ehanced Rx FIFO.

size_t rxFifoFrameNum: The number of CAN messages remaining to be received from Legacy or Ehanced Rx FIFO.

size_t rxFifoTransferTotalNum: Total CAN Message number need to be received from Legacy or Ehanced Rx FIFO.

volatile uint8_t mbState[CAN_WORD1_COUNT]: Message Buffer transfer state.

volatile uint8_t rxFifoState: Rx FIFO transfer state.

volatile uint32_t timestamp[CAN_WORD1_COUNT]: Mailbox transfer timestamp.

struct byteStatus

Public Members

bool byteIsRead: The byte n (0~3) was read or not. The type of error and which bit in byte (n) is affected by the error.

struct __unnamed15__

Public Members

uint32_t timestamp: FlexCAN internal Free-Running Counter Time Stamp.

uint32_t length: CAN frame data length in bytes (Range: 0~8).

uint32_t type: CAN Frame Type(DATA or REMOTE).

uint32_t format: CAN Frame Identifier(STD or EXT format).

uint32_t __pad0__: Reserved.

uint32_t idhit: CAN Rx FIFO filter hit id(This value is only used in Rx FIFO receive mode).

struct __unnamed17__

Public Members

uint32_t id: CAN Frame Identifier, should be set using FLEXCAN_ID_EXT() or FLEXCAN_ID_STD() macro.

uint32_t __pad0__: Reserved.

union __unnamed19__

Public Members

struct _flexcan_frame

struct _flexcan_frame

struct __unnamed21__

Public Members

uint32_t dataWord0: CAN Frame payload word0.

uint32_t dataWord1: CAN Frame payload word1.

struct __unnamed23__

Public Members

uint8_t dataByte3: CAN Frame payload byte3.

uint8_t dataByte2: CAN Frame payload byte2.

uint8_t dataByte1: CAN Frame payload byte1.

uint8_t dataByte0: CAN Frame payload byte0.

uint8_t dataByte7: CAN Frame payload byte7.

uint8_t dataByte6: CAN Frame payload byte6.

uint8_t dataByte5: CAN Frame payload byte5.

uint8_t dataByte4: CAN Frame payload byte4.

struct __unnamed25__

Public Members

uint32_t timestamp: FlexCAN internal Free-Running Counter Time Stamp.

uint32_t length: CAN FD frame data length code (DLC), range see _flexcan_fd_frame_length, When the length <= 8, it equal to the data length, otherwise the number of valid frame data is not equal to the length value. user can use DLC_LENGTH_DECODE(length) macro to get the number of valid data bytes.

uint32_t type: CAN Frame Type(DATA or REMOTE).

uint32_t format: CAN Frame Identifier(STD or EXT format).

uint32_t srr: Substitute Remote request.

uint32_t esi: Error State Indicator.

uint32_t brs: Bit Rate Switch.

uint32_t edl: Extended Data Length.

struct __unnamed27__

Public Members

uint32_t id: CAN Frame Identifier, should be set using FLEXCAN_ID_EXT() or FLEXCAN_ID_STD() macro.

uint32_t __pad0__: Reserved.

union __unnamed29__

Public Members

struct _flexcan_fd_frame

struct _flexcan_fd_frame

struct __unnamed31__

Public Members

uint32_t dataWord[16]: CAN FD Frame payload, 16 double word maximum.

struct __unnamed33__

Public Members

uint8_t dataByte3: CAN Frame payload byte3.

uint8_t dataByte2: CAN Frame payload byte2.

uint8_t dataByte1: CAN Frame payload byte1.

uint8_t dataByte0: CAN Frame payload byte0.

uint8_t dataByte7: CAN Frame payload byte7.

uint8_t dataByte6: CAN Frame payload byte6.

uint8_t dataByte5: CAN Frame payload byte5.

uint8_t dataByte4: CAN Frame payload byte4.

union __unnamed35__

Public Members

struct _flexcan_config

struct _flexcan_config

struct __unnamed37__

Public Members

uint32_t baudRate: FlexCAN bit rate in bps, for classical CAN or CANFD nominal phase.

uint32_t baudRateFD: FlexCAN FD bit rate in bps, for CANFD data phase.

struct __unnamed39__

Public Members

uint32_t bitRate: FlexCAN bit rate in bps, for classical CAN or CANFD nominal phase.

uint32_t bitRateFD: FlexCAN FD bit rate in bps, for CANFD data phase.

union __unnamed41__

Public Members

struct _flexcan_pn_config

< The data target values 1 which used either for data match “equal to”, “smaller than”, “greater than” comparisons, or as the lower limit value in data match “range

detection”.

struct _flexcan_pn_config

struct __unnamed45__

< The data target values 1 which used either for data match “equal to”, “smaller than”, “greater than” comparisons, or as the lower limit value in data match “range

detection”.

Public Members

uint32_t lowerWord0: CAN Frame payload word0.

uint32_t lowerWord1: CAN Frame payload word1.

struct __unnamed47__

Public Members

uint8_t lowerByte3: CAN Frame payload byte3.

uint8_t lowerByte2: CAN Frame payload byte2.

uint8_t lowerByte1: CAN Frame payload byte1.

uint8_t lowerByte0: CAN Frame payload byte0.

uint8_t lowerByte7: CAN Frame payload byte7.

uint8_t lowerByte6: CAN Frame payload byte6.

uint8_t lowerByte5: CAN Frame payload byte5.

uint8_t lowerByte4: CAN Frame payload byte4.

union __unnamed43__

Public Members

struct _flexcan_pn_config

< The data target values 2 which used only as the upper limit value in data match “range

detection” or used to store the data mask in “equal to”.

struct _flexcan_pn_config

struct __unnamed49__

< The data target values 2 which used only as the upper limit value in data match “range

detection” or used to store the data mask in “equal to”.

Public Members

uint32_t upperWord0: CAN Frame payload word0.

uint32_t upperWord1: CAN Frame payload word1.

struct __unnamed51__

Public Members

uint8_t upperByte3: CAN Frame payload byte3.

uint8_t upperByte2: CAN Frame payload byte2.

uint8_t upperByte1: CAN Frame payload byte1.

uint8_t upperByte0: CAN Frame payload byte0.

uint8_t upperByte7: CAN Frame payload byte7.

uint8_t upperByte6: CAN Frame payload byte6.

uint8_t upperByte5: CAN Frame payload byte5.

uint8_t upperByte4: CAN Frame payload byte4.

FlexCAN eDMA Driver

void FLEXCAN_TransferCreateHandleEDMA(CAN_Type *base, flexcan_edma_handle_t *handle, flexcan_edma_transfer_callback_t callback, void *userData, edma_handle_t *rxFifoEdmaHandle)

Initializes the FlexCAN handle, which is used in transactional functions.

Parameters:

base – FlexCAN peripheral base address.
handle – Pointer to flexcan_edma_handle_t structure.
callback – The callback function.
userData – The parameter of the callback function.
rxFifoEdmaHandle – User-requested DMA handle for Rx FIFO DMA transfer.

void FLEXCAN_PrepareTransfConfiguration(CAN_Type *base, flexcan_fifo_transfer_t *pFifoXfer, edma_transfer_config_t *pEdmaConfig)

Prepares the eDMA transfer configuration for FLEXCAN Legacy RX FIFO.

This function prepares the eDMA transfer configuration structure according to FLEXCAN Legacy RX FIFO.

Parameters:

base – FlexCAN peripheral base address.
pFifoXfer – FlexCAN Rx FIFO EDMA transfer structure, see flexcan_fifo_transfer_t.
pEdmaConfig – The user configuration structure of type edma_transfer_t.

status_t FLEXCAN_StartTransferDatafromRxFIFO(CAN_Type *base, flexcan_edma_handle_t *handle, edma_transfer_config_t *pEdmaConfig)

Start Transfer Data from the FLEXCAN Legacy Rx FIFO using eDMA.

This function to Update edma transfer confiugration and Start eDMA transfer

Parameters:

base – FlexCAN peripheral base address.
handle – Pointer to flexcan_edma_handle_t structure.
pEdmaConfig – The user configuration structure of type edma_transfer_t.

Return values:

kStatus_Success – if succeed, others failed.
kStatus_FLEXCAN_RxFifoBusy – Previous transfer ongoing.

status_t FLEXCAN_TransferReceiveFifoEDMA(CAN_Type *base, flexcan_edma_handle_t *handle, flexcan_fifo_transfer_t *pFifoXfer)

Receives the CAN Message from the Legacy Rx FIFO using eDMA.

This function receives the CAN Message using eDMA. This is a non-blocking function, which returns right away. After the CAN Message is received, the receive callback function is called.

Parameters:

base – FlexCAN peripheral base address.
handle – Pointer to flexcan_edma_handle_t structure.
pFifoXfer – FlexCAN Rx FIFO EDMA transfer structure, see flexcan_fifo_transfer_t.

Return values:

kStatus_Success – if succeed, others failed.
kStatus_FLEXCAN_RxFifoBusy – Previous transfer ongoing.

status_t FLEXCAN_TransferGetReceiveFifoCountEMDA(CAN_Type *base, flexcan_edma_handle_t *handle, size_t *count)

Gets the Legacy Rx Fifo transfer status during a interrupt non-blocking receive.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
count – Number of CAN messages receive so far by the non-blocking transaction.

Return values:

kStatus_InvalidArgument – count is Invalid.
kStatus_Success – Successfully return the count.

void FLEXCAN_TransferAbortReceiveFifoEDMA(CAN_Type *base, flexcan_edma_handle_t *handle)

Aborts the receive Legacy/Enhanced Rx FIFO process which used eDMA.

This function aborts the receive Legacy/Enhanced Rx FIFO process which used eDMA.

Parameters:

base – FlexCAN peripheral base address.
handle – Pointer to flexcan_edma_handle_t structure.

status_t FLEXCAN_TransferReceiveEnhancedFifoEDMA(CAN_Type *base, flexcan_edma_handle_t *handle, flexcan_fifo_transfer_t *pFifoXfer)

Receives the CAN FD Message from the Enhanced Rx FIFO using eDMA.

This function receives the CAN FD Message using eDMA. This is a non-blocking function, which returns right away. After the CAN Message is received, the receive callback function is called.

Parameters:

base – FlexCAN peripheral base address.
handle – Pointer to flexcan_edma_handle_t structure.
pFifoXfer – FlexCAN Rx FIFO EDMA transfer structure, see flexcan_fifo_transfer_t.

Return values:

kStatus_Success – if succeed, others failed.
kStatus_FLEXCAN_RxFifoBusy – Previous transfer ongoing.

static inline status_t FLEXCAN_TransferGetReceiveEnhancedFifoCountEMDA(CAN_Type *base, flexcan_edma_handle_t *handle, size_t *count)

Gets the Enhanced Rx Fifo transfer status during a interrupt non-blocking receive.

Parameters:

base – FlexCAN peripheral base address.
handle – FlexCAN handle pointer.
count – Number of CAN messages receive so far by the non-blocking transaction.

Return values:

kStatus_InvalidArgument – count is Invalid.
kStatus_Success – Successfully return the count.

FSL_FLEXCAN_EDMA_DRIVER_VERSION: FlexCAN EDMA driver version.

typedef struct _flexcan_edma_handle flexcan_edma_handle_t

typedef void (*flexcan_edma_transfer_callback_t)(CAN_Type *base, flexcan_edma_handle_t *handle, status_t status, void *userData): FlexCAN transfer callback function.

struct _flexcan_edma_handle

#include <fsl_flexcan_edma.h>

FlexCAN eDMA handle.

Public Members

flexcan_edma_transfer_callback_t callback: Callback function.

void *userData: FlexCAN callback function parameter.

edma_handle_t *rxFifoEdmaHandle: The EDMA handler for Rx FIFO.

volatile uint8_t rxFifoState: Rx FIFO transfer state.

size_t frameNum: The number of messages that need to be received.

flexcan_fd_frame_t *framefd: Point to the buffer of CAN Message to be received from Enhanced Rx FIFO.

FlexIO: FlexIO Driver

FlexIO Driver

void FLEXIO_GetDefaultConfig(flexio_config_t *userConfig)

Gets the default configuration to configure the FlexIO module. The configuration can used directly to call the FLEXIO_Configure().

Example:

flexio_config_t config;
FLEXIO_GetDefaultConfig(&config);

Parameters:

userConfig – pointer to flexio_config_t structure

void FLEXIO_Init(FLEXIO_Type *base, const flexio_config_t *userConfig)

Configures the FlexIO with a FlexIO configuration. The configuration structure can be filled by the user or be set with default values by FLEXIO_GetDefaultConfig().

Example

flexio_config_t config = {
.enableFlexio = true,
.enableInDoze = false,
.enableInDebug = true,
.enableFastAccess = false
};
FLEXIO_Configure(base, &config);

Parameters:

base – FlexIO peripheral base address
userConfig – pointer to flexio_config_t structure

void FLEXIO_Deinit(FLEXIO_Type *base)

Gates the FlexIO clock. Call this API to stop the FlexIO clock.

Note

After calling this API, call the FLEXO_Init to use the FlexIO module.

Parameters:

base – FlexIO peripheral base address

uint32_t FLEXIO_GetInstance(FLEXIO_Type *base)

Get instance number for FLEXIO module.

Parameters:

base – FLEXIO peripheral base address.

void FLEXIO_Reset(FLEXIO_Type *base)

Resets the FlexIO module.

Parameters:

base – FlexIO peripheral base address

static inline void FLEXIO_Enable(FLEXIO_Type *base, bool enable)

Enables the FlexIO module operation.

Parameters:

base – FlexIO peripheral base address
enable – true to enable, false to disable.

static inline uint32_t FLEXIO_ReadPinInput(FLEXIO_Type *base)

Reads the input data on each of the FlexIO pins.

Parameters:

base – FlexIO peripheral base address

Returns:

FlexIO pin input data

static inline uint8_t FLEXIO_GetShifterState(FLEXIO_Type *base)

Gets the current state pointer for state mode use.

Parameters:

base – FlexIO peripheral base address

Returns:

current State pointer

void FLEXIO_SetShifterConfig(FLEXIO_Type *base, uint8_t index, const flexio_shifter_config_t *shifterConfig)

Configures the shifter with the shifter configuration. The configuration structure covers both the SHIFTCTL and SHIFTCFG registers. To configure the shifter to the proper mode, select which timer controls the shifter to shift, whether to generate start bit/stop bit, and the polarity of start bit and stop bit.

Example

flexio_shifter_config_t config = {
.timerSelect = 0,
.timerPolarity = kFLEXIO_ShifterTimerPolarityOnPositive,
.pinConfig = kFLEXIO_PinConfigOpenDrainOrBidirection,
.pinPolarity = kFLEXIO_PinActiveLow,
.shifterMode = kFLEXIO_ShifterModeTransmit,
.inputSource = kFLEXIO_ShifterInputFromPin,
.shifterStop = kFLEXIO_ShifterStopBitHigh,
.shifterStart = kFLEXIO_ShifterStartBitLow
};
FLEXIO_SetShifterConfig(base, &config);

Parameters:

base – FlexIO peripheral base address
index – Shifter index
shifterConfig – Pointer to flexio_shifter_config_t structure

void FLEXIO_SetTimerConfig(FLEXIO_Type *base, uint8_t index, const flexio_timer_config_t *timerConfig)

Configures the timer with the timer configuration. The configuration structure covers both the TIMCTL and TIMCFG registers. To configure the timer to the proper mode, select trigger source for timer and the timer pin output and the timing for timer.

Example

flexio_timer_config_t config = {
.triggerSelect = FLEXIO_TIMER_TRIGGER_SEL_SHIFTnSTAT(0),
.triggerPolarity = kFLEXIO_TimerTriggerPolarityActiveLow,
.triggerSource = kFLEXIO_TimerTriggerSourceInternal,
.pinConfig = kFLEXIO_PinConfigOpenDrainOrBidirection,
.pinSelect = 0,
.pinPolarity = kFLEXIO_PinActiveHigh,
.timerMode = kFLEXIO_TimerModeDual8BitBaudBit,
.timerOutput = kFLEXIO_TimerOutputZeroNotAffectedByReset,
.timerDecrement = kFLEXIO_TimerDecSrcOnFlexIOClockShiftTimerOutput,
.timerReset = kFLEXIO_TimerResetOnTimerPinEqualToTimerOutput,
.timerDisable = kFLEXIO_TimerDisableOnTimerCompare,
.timerEnable = kFLEXIO_TimerEnableOnTriggerHigh,
.timerStop = kFLEXIO_TimerStopBitEnableOnTimerDisable,
.timerStart = kFLEXIO_TimerStartBitEnabled
};
FLEXIO_SetTimerConfig(base, &config);

Parameters:

base – FlexIO peripheral base address
index – Timer index
timerConfig – Pointer to the flexio_timer_config_t structure

static inline void FLEXIO_SetClockMode(FLEXIO_Type *base, uint8_t index, flexio_timer_decrement_source_t clocksource)

This function set the value of the prescaler on flexio channels.

Parameters:

base – Pointer to the FlexIO simulated peripheral type.
index – Timer index
clocksource – Set clock value

static inline void FLEXIO_EnableShifterStatusInterrupts(FLEXIO_Type *base, uint32_t mask)

Enables the shifter status interrupt. The interrupt generates when the corresponding SSF is set.

Note

For multiple shifter status interrupt enable, for example, two shifter status enable, can calculate the mask by using ((1 << shifter index0) | (1 << shifter index1))

Parameters:

base – FlexIO peripheral base address
mask – The shifter status mask which can be calculated by (1 << shifter index)

static inline void FLEXIO_DisableShifterStatusInterrupts(FLEXIO_Type *base, uint32_t mask)

Disables the shifter status interrupt. The interrupt won’t generate when the corresponding SSF is set.

Note

For multiple shifter status interrupt enable, for example, two shifter status enable, can calculate the mask by using ((1 << shifter index0) | (1 << shifter index1))

Parameters:

base – FlexIO peripheral base address
mask – The shifter status mask which can be calculated by (1 << shifter index)

static inline void FLEXIO_EnableShifterErrorInterrupts(FLEXIO_Type *base, uint32_t mask)

Enables the shifter error interrupt. The interrupt generates when the corresponding SEF is set.

Note

For multiple shifter error interrupt enable, for example, two shifter error enable, can calculate the mask by using ((1 << shifter index0) | (1 << shifter index1))

Parameters:

base – FlexIO peripheral base address
mask – The shifter error mask which can be calculated by (1 << shifter index)

static inline void FLEXIO_DisableShifterErrorInterrupts(FLEXIO_Type *base, uint32_t mask)

Disables the shifter error interrupt. The interrupt won’t generate when the corresponding SEF is set.

Note

For multiple shifter error interrupt enable, for example, two shifter error enable, can calculate the mask by using ((1 << shifter index0) | (1 << shifter index1))

Parameters:

base – FlexIO peripheral base address
mask – The shifter error mask which can be calculated by (1 << shifter index)

static inline void FLEXIO_EnableTimerStatusInterrupts(FLEXIO_Type *base, uint32_t mask)

Enables the timer status interrupt. The interrupt generates when the corresponding SSF is set.

Note

For multiple timer status interrupt enable, for example, two timer status enable, can calculate the mask by using ((1 << timer index0) | (1 << timer index1))

Parameters:

base – FlexIO peripheral base address
mask – The timer status mask which can be calculated by (1 << timer index)

static inline void FLEXIO_DisableTimerStatusInterrupts(FLEXIO_Type *base, uint32_t mask)

Disables the timer status interrupt. The interrupt won’t generate when the corresponding SSF is set.

Note

For multiple timer status interrupt enable, for example, two timer status enable, can calculate the mask by using ((1 << timer index0) | (1 << timer index1))

Parameters:

base – FlexIO peripheral base address
mask – The timer status mask which can be calculated by (1 << timer index)

static inline uint32_t FLEXIO_GetShifterStatusFlags(FLEXIO_Type *base)

Gets the shifter status flags.

Parameters:

base – FlexIO peripheral base address

Returns:

Shifter status flags

static inline void FLEXIO_ClearShifterStatusFlags(FLEXIO_Type *base, uint32_t mask)

Clears the shifter status flags.

Note

For clearing multiple shifter status flags, for example, two shifter status flags, can calculate the mask by using ((1 << shifter index0) | (1 << shifter index1))

Parameters:

base – FlexIO peripheral base address
mask – The shifter status mask which can be calculated by (1 << shifter index)

static inline uint32_t FLEXIO_GetShifterErrorFlags(FLEXIO_Type *base)

Gets the shifter error flags.

Parameters:

base – FlexIO peripheral base address

Returns:

Shifter error flags

static inline void FLEXIO_ClearShifterErrorFlags(FLEXIO_Type *base, uint32_t mask)

Clears the shifter error flags.

Note

For clearing multiple shifter error flags, for example, two shifter error flags, can calculate the mask by using ((1 << shifter index0) | (1 << shifter index1))

Parameters:

base – FlexIO peripheral base address
mask – The shifter error mask which can be calculated by (1 << shifter index)

static inline uint32_t FLEXIO_GetTimerStatusFlags(FLEXIO_Type *base)

Gets the timer status flags.

Parameters:

base – FlexIO peripheral base address

Returns:

Timer status flags

static inline void FLEXIO_ClearTimerStatusFlags(FLEXIO_Type *base, uint32_t mask)

Clears the timer status flags.

Note

For clearing multiple timer status flags, for example, two timer status flags, can calculate the mask by using ((1 << timer index0) | (1 << timer index1))

Parameters:

base – FlexIO peripheral base address
mask – The timer status mask which can be calculated by (1 << timer index)

static inline void FLEXIO_EnableShifterStatusDMA(FLEXIO_Type *base, uint32_t mask, bool enable)

Enables/disables the shifter status DMA. The DMA request generates when the corresponding SSF is set.

Note

For multiple shifter status DMA enables, for example, calculate the mask by using ((1 << shifter index0) | (1 << shifter index1))

Parameters:

base – FlexIO peripheral base address
mask – The shifter status mask which can be calculated by (1 << shifter index)
enable – True to enable, false to disable.

uint32_t FLEXIO_GetShifterBufferAddress(FLEXIO_Type *base, flexio_shifter_buffer_type_t type, uint8_t index)

Gets the shifter buffer address for the DMA transfer usage.

Parameters:

base – FlexIO peripheral base address
type – Shifter type of flexio_shifter_buffer_type_t
index – Shifter index

Returns:

Corresponding shifter buffer index

status_t FLEXIO_RegisterHandleIRQ(void *base, void *handle, flexio_isr_t isr)

Registers the handle and the interrupt handler for the FlexIO-simulated peripheral.

Parameters:

base – Pointer to the FlexIO simulated peripheral type.
handle – Pointer to the handler for FlexIO simulated peripheral.
isr – FlexIO simulated peripheral interrupt handler.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_OutOfRange – The FlexIO type/handle/ISR table out of range.

status_t FLEXIO_UnregisterHandleIRQ(void *base)

Unregisters the handle and the interrupt handler for the FlexIO-simulated peripheral.

Parameters:

base – Pointer to the FlexIO simulated peripheral type.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_OutOfRange – The FlexIO type/handle/ISR table out of range.

static inline void FLEXIO_ClearPortOutput(FLEXIO_Type *base, uint32_t mask)

Sets the output level of the multiple FLEXIO pins to the logic 0.

Parameters:

base – FlexIO peripheral base address
mask – FLEXIO pin number mask

static inline void FLEXIO_SetPortOutput(FLEXIO_Type *base, uint32_t mask)

Sets the output level of the multiple FLEXIO pins to the logic 1.

Parameters:

base – FlexIO peripheral base address
mask – FLEXIO pin number mask

static inline void FLEXIO_TogglePortOutput(FLEXIO_Type *base, uint32_t mask)

Reverses the current output logic of the multiple FLEXIO pins.

Parameters:

base – FlexIO peripheral base address
mask – FLEXIO pin number mask

static inline void FLEXIO_PinWrite(FLEXIO_Type *base, uint32_t pin, uint8_t output)

Sets the output level of the FLEXIO pins to the logic 1 or 0.

Parameters:

base – FlexIO peripheral base address
pin – FLEXIO pin number.
output – FLEXIO pin output logic level.
- 0: corresponding pin output low-logic level.
- 1: corresponding pin output high-logic level.

static inline void FLEXIO_EnablePinOutput(FLEXIO_Type *base, uint32_t pin)

Enables the FLEXIO output pin function.

Parameters:

base – FlexIO peripheral base address
pin – FLEXIO pin number.

static inline uint32_t FLEXIO_PinRead(FLEXIO_Type *base, uint32_t pin)

Reads the current input value of the FLEXIO pin.

Parameters:

base – FlexIO peripheral base address
pin – FLEXIO pin number.

Return values:

FLEXIO – port input value

0: corresponding pin input low-logic level.
1: corresponding pin input high-logic level.

static inline uint32_t FLEXIO_GetPinStatus(FLEXIO_Type *base, uint32_t pin)

Gets the FLEXIO input pin status.

Parameters:

base – FlexIO peripheral base address
pin – FLEXIO pin number.

Return values:

FLEXIO – port input status

0: corresponding pin input capture no status.
1: corresponding pin input capture rising or falling edge.

static inline void FLEXIO_ClearPortStatus(FLEXIO_Type *base, uint32_t mask)

Clears the multiple FLEXIO input pins status.

Parameters:

base – FlexIO peripheral base address
mask – FLEXIO pin number mask

FSL_FLEXIO_DRIVER_VERSION: FlexIO driver version.

enum _flexio_timer_trigger_polarity

Define time of timer trigger polarity.

Values:

enumerator kFLEXIO_TimerTriggerPolarityActiveHigh: Active high.

enumerator kFLEXIO_TimerTriggerPolarityActiveLow: Active low.

enum _flexio_timer_trigger_source

Define type of timer trigger source.

Values:

enumerator kFLEXIO_TimerTriggerSourceExternal: External trigger selected.

enumerator kFLEXIO_TimerTriggerSourceInternal: Internal trigger selected.

enum _flexio_pin_config

Define type of timer/shifter pin configuration.

Values:

enumerator kFLEXIO_PinConfigOutputDisabled: Pin output disabled.

enumerator kFLEXIO_PinConfigOpenDrainOrBidirection: Pin open drain or bidirectional output enable.

enumerator kFLEXIO_PinConfigBidirectionOutputData: Pin bidirectional output data.

enumerator kFLEXIO_PinConfigOutput: Pin output.

enum _flexio_pin_polarity

Definition of pin polarity.

Values:

enumerator kFLEXIO_PinActiveHigh: Active high.

enumerator kFLEXIO_PinActiveLow: Active low.

enum _flexio_timer_mode

Define type of timer work mode.

Values:

enumerator kFLEXIO_TimerModeDisabled: Timer Disabled.

enumerator kFLEXIO_TimerModeDual8BitBaudBit: Dual 8-bit counters baud/bit mode.

enumerator kFLEXIO_TimerModeDual8BitPWM: Dual 8-bit counters PWM mode.

enumerator kFLEXIO_TimerModeSingle16Bit: Single 16-bit counter mode.

enum _flexio_timer_output

Define type of timer initial output or timer reset condition.

Values:

enumerator kFLEXIO_TimerOutputOneNotAffectedByReset: Logic one when enabled and is not affected by timer reset.

enumerator kFLEXIO_TimerOutputZeroNotAffectedByReset: Logic zero when enabled and is not affected by timer reset.

enumerator kFLEXIO_TimerOutputOneAffectedByReset: Logic one when enabled and on timer reset.

enumerator kFLEXIO_TimerOutputZeroAffectedByReset: Logic zero when enabled and on timer reset.

enum _flexio_timer_decrement_source

Define type of timer decrement.

Values:

enumerator kFLEXIO_TimerDecSrcOnFlexIOClockShiftTimerOutput: Decrement counter on FlexIO clock, Shift clock equals Timer output.

enumerator kFLEXIO_TimerDecSrcOnTriggerInputShiftTimerOutput: Decrement counter on Trigger input (both edges), Shift clock equals Timer output.

enumerator kFLEXIO_TimerDecSrcOnPinInputShiftPinInput: Decrement counter on Pin input (both edges), Shift clock equals Pin input.

enumerator kFLEXIO_TimerDecSrcOnTriggerInputShiftTriggerInput: Decrement counter on Trigger input (both edges), Shift clock equals Trigger input.

enum _flexio_timer_reset_condition

Define type of timer reset condition.

Values:

enumerator kFLEXIO_TimerResetNever: Timer never reset.

enumerator kFLEXIO_TimerResetOnTimerPinEqualToTimerOutput: Timer reset on Timer Pin equal to Timer Output.

enumerator kFLEXIO_TimerResetOnTimerTriggerEqualToTimerOutput: Timer reset on Timer Trigger equal to Timer Output.

enumerator kFLEXIO_TimerResetOnTimerPinRisingEdge: Timer reset on Timer Pin rising edge.

enumerator kFLEXIO_TimerResetOnTimerTriggerRisingEdge: Timer reset on Trigger rising edge.

enumerator kFLEXIO_TimerResetOnTimerTriggerBothEdge: Timer reset on Trigger rising or falling edge.

enum _flexio_timer_disable_condition

Define type of timer disable condition.

Values:

enumerator kFLEXIO_TimerDisableNever: Timer never disabled.

enumerator kFLEXIO_TimerDisableOnPreTimerDisable: Timer disabled on Timer N-1 disable.

enumerator kFLEXIO_TimerDisableOnTimerCompare: Timer disabled on Timer compare.

enumerator kFLEXIO_TimerDisableOnTimerCompareTriggerLow: Timer disabled on Timer compare and Trigger Low.

enumerator kFLEXIO_TimerDisableOnPinBothEdge: Timer disabled on Pin rising or falling edge.

enumerator kFLEXIO_TimerDisableOnPinBothEdgeTriggerHigh: Timer disabled on Pin rising or falling edge provided Trigger is high.

enumerator kFLEXIO_TimerDisableOnTriggerFallingEdge: Timer disabled on Trigger falling edge.

enum _flexio_timer_enable_condition

Define type of timer enable condition.

Values:

enumerator kFLEXIO_TimerEnabledAlways: Timer always enabled.

enumerator kFLEXIO_TimerEnableOnPrevTimerEnable: Timer enabled on Timer N-1 enable.

enumerator kFLEXIO_TimerEnableOnTriggerHigh: Timer enabled on Trigger high.

enumerator kFLEXIO_TimerEnableOnTriggerHighPinHigh: Timer enabled on Trigger high and Pin high.

enumerator kFLEXIO_TimerEnableOnPinRisingEdge: Timer enabled on Pin rising edge.

enumerator kFLEXIO_TimerEnableOnPinRisingEdgeTriggerHigh: Timer enabled on Pin rising edge and Trigger high.

enumerator kFLEXIO_TimerEnableOnTriggerRisingEdge: Timer enabled on Trigger rising edge.

enumerator kFLEXIO_TimerEnableOnTriggerBothEdge: Timer enabled on Trigger rising or falling edge.

enum _flexio_timer_stop_bit_condition

Define type of timer stop bit generate condition.

Values:

enumerator kFLEXIO_TimerStopBitDisabled: Stop bit disabled.

enumerator kFLEXIO_TimerStopBitEnableOnTimerCompare: Stop bit is enabled on timer compare.

enumerator kFLEXIO_TimerStopBitEnableOnTimerDisable: Stop bit is enabled on timer disable.

enumerator kFLEXIO_TimerStopBitEnableOnTimerCompareDisable: Stop bit is enabled on timer compare and timer disable.

enum _flexio_timer_start_bit_condition

Define type of timer start bit generate condition.

Values:

enumerator kFLEXIO_TimerStartBitDisabled: Start bit disabled.

enumerator kFLEXIO_TimerStartBitEnabled: Start bit enabled.

enum _flexio_timer_output_state

FlexIO as PWM channel output state.

Values:

enumerator kFLEXIO_PwmLow: The output state of PWM channel is low

enumerator kFLEXIO_PwmHigh: The output state of PWM channel is high

enum _flexio_shifter_timer_polarity

Define type of timer polarity for shifter control.

Values:

enumerator kFLEXIO_ShifterTimerPolarityOnPositive: Shift on positive edge of shift clock.

enumerator kFLEXIO_ShifterTimerPolarityOnNegitive: Shift on negative edge of shift clock.

enum _flexio_shifter_mode

Define type of shifter working mode.

Values:

enumerator kFLEXIO_ShifterDisabled: Shifter is disabled.

enumerator kFLEXIO_ShifterModeReceive: Receive mode.

enumerator kFLEXIO_ShifterModeTransmit: Transmit mode.

enumerator kFLEXIO_ShifterModeMatchStore: Match store mode.

enumerator kFLEXIO_ShifterModeMatchContinuous: Match continuous mode.

enumerator kFLEXIO_ShifterModeState: SHIFTBUF contents are used for storing programmable state attributes.

enumerator kFLEXIO_ShifterModeLogic: SHIFTBUF contents are used for implementing programmable logic look up table.

enum _flexio_shifter_input_source

Define type of shifter input source.

Values:

enumerator kFLEXIO_ShifterInputFromPin: Shifter input from pin.

enumerator kFLEXIO_ShifterInputFromNextShifterOutput: Shifter input from Shifter N+1.

enum _flexio_shifter_stop_bit

Define of STOP bit configuration.

Values:

enumerator kFLEXIO_ShifterStopBitDisable: Disable shifter stop bit.

enumerator kFLEXIO_ShifterStopBitLow: Set shifter stop bit to logic low level.

enumerator kFLEXIO_ShifterStopBitHigh: Set shifter stop bit to logic high level.

enum _flexio_shifter_start_bit

Define type of START bit configuration.

Values:

enumerator kFLEXIO_ShifterStartBitDisabledLoadDataOnEnable: Disable shifter start bit, transmitter loads data on enable.

enumerator kFLEXIO_ShifterStartBitDisabledLoadDataOnShift: Disable shifter start bit, transmitter loads data on first shift.

enumerator kFLEXIO_ShifterStartBitLow: Set shifter start bit to logic low level.

enumerator kFLEXIO_ShifterStartBitHigh: Set shifter start bit to logic high level.

enum _flexio_shifter_buffer_type

Define FlexIO shifter buffer type.

Values:

enumerator kFLEXIO_ShifterBuffer: Shifter Buffer N Register.

enumerator kFLEXIO_ShifterBufferBitSwapped: Shifter Buffer N Bit Byte Swapped Register.

enumerator kFLEXIO_ShifterBufferByteSwapped: Shifter Buffer N Byte Swapped Register.

enumerator kFLEXIO_ShifterBufferBitByteSwapped: Shifter Buffer N Bit Swapped Register.

enumerator kFLEXIO_ShifterBufferNibbleByteSwapped: Shifter Buffer N Nibble Byte Swapped Register.

enumerator kFLEXIO_ShifterBufferHalfWordSwapped: Shifter Buffer N Half Word Swapped Register.

enumerator kFLEXIO_ShifterBufferNibbleSwapped: Shifter Buffer N Nibble Swapped Register.

enum _flexio_gpio_direction

FLEXIO gpio direction definition.

Values:

enumerator kFLEXIO_DigitalInput: Set current pin as digital input

enumerator kFLEXIO_DigitalOutput: Set current pin as digital output

enum _flexio_pin_input_config

FLEXIO gpio input config.

Values:

enumerator kFLEXIO_InputInterruptDisabled: Interrupt request is disabled.

enumerator kFLEXIO_InputInterruptEnable: Interrupt request is enable.

enumerator kFLEXIO_FlagRisingEdgeEnable: Input pin flag on rising edge.

enumerator kFLEXIO_FlagFallingEdgeEnable: Input pin flag on falling edge.

typedef enum _flexio_timer_trigger_polarity flexio_timer_trigger_polarity_t: Define time of timer trigger polarity.

typedef enum _flexio_timer_trigger_source flexio_timer_trigger_source_t: Define type of timer trigger source.

typedef enum _flexio_pin_config flexio_pin_config_t: Define type of timer/shifter pin configuration.

typedef enum _flexio_pin_polarity flexio_pin_polarity_t: Definition of pin polarity.

typedef enum _flexio_timer_mode flexio_timer_mode_t: Define type of timer work mode.

typedef enum _flexio_timer_output flexio_timer_output_t: Define type of timer initial output or timer reset condition.

typedef enum _flexio_timer_decrement_source flexio_timer_decrement_source_t: Define type of timer decrement.

typedef enum _flexio_timer_reset_condition flexio_timer_reset_condition_t: Define type of timer reset condition.

typedef enum _flexio_timer_disable_condition flexio_timer_disable_condition_t: Define type of timer disable condition.

typedef enum _flexio_timer_enable_condition flexio_timer_enable_condition_t: Define type of timer enable condition.

typedef enum _flexio_timer_stop_bit_condition flexio_timer_stop_bit_condition_t: Define type of timer stop bit generate condition.

typedef enum _flexio_timer_start_bit_condition flexio_timer_start_bit_condition_t: Define type of timer start bit generate condition.

typedef enum _flexio_timer_output_state flexio_timer_output_state_t: FlexIO as PWM channel output state.

typedef enum _flexio_shifter_timer_polarity flexio_shifter_timer_polarity_t: Define type of timer polarity for shifter control.

typedef enum _flexio_shifter_mode flexio_shifter_mode_t: Define type of shifter working mode.

typedef enum _flexio_shifter_input_source flexio_shifter_input_source_t: Define type of shifter input source.

typedef enum _flexio_shifter_stop_bit flexio_shifter_stop_bit_t: Define of STOP bit configuration.

typedef enum _flexio_shifter_start_bit flexio_shifter_start_bit_t: Define type of START bit configuration.

typedef enum _flexio_shifter_buffer_type flexio_shifter_buffer_type_t: Define FlexIO shifter buffer type.

typedef struct _flexio_config_ flexio_config_t: Define FlexIO user configuration structure.

typedef struct _flexio_timer_config flexio_timer_config_t: Define FlexIO timer configuration structure.

typedef struct _flexio_shifter_config flexio_shifter_config_t: Define FlexIO shifter configuration structure.

typedef enum _flexio_gpio_direction flexio_gpio_direction_t: FLEXIO gpio direction definition.

typedef enum _flexio_pin_input_config flexio_pin_input_config_t: FLEXIO gpio input config.

typedef struct _flexio_gpio_config flexio_gpio_config_t

The FLEXIO pin configuration structure.

Each pin can only be configured as either an output pin or an input pin at a time. If configured as an input pin, use inputConfig param. If configured as an output pin, use outputLogic.

typedef void (*flexio_isr_t)(void *base, void *handle): typedef for FlexIO simulated driver interrupt handler.

FLEXIO_Type *const s_flexioBases[]: Pointers to flexio bases for each instance.

const clock_ip_name_t s_flexioClocks[]: Pointers to flexio clocks for each instance.

void FLEXIO_SetPinConfig(FLEXIO_Type *base, uint32_t pin, flexio_gpio_config_t *config)

Configure a FLEXIO pin used by the board.

To Config the FLEXIO PIN, define a pin configuration, as either input or output, in the user file. Then, call the FLEXIO_SetPinConfig() function.

This is an example to define an input pin or an output pin configuration.

Define a digital input pin configuration,
flexio_gpio_config_t config =
{
  kFLEXIO_DigitalInput,
  0U,
  kFLEXIO_FlagRisingEdgeEnable | kFLEXIO_InputInterruptEnable,
}
Define a digital output pin configuration,
flexio_gpio_config_t config =
{
  kFLEXIO_DigitalOutput,
  0U,
  0U
}

Parameters:

base – FlexIO peripheral base address
pin – FLEXIO pin number.
config – FLEXIO pin configuration pointer.

FLEXIO_TIMER_TRIGGER_SEL_PININPUT(x): Calculate FlexIO timer trigger.

FLEXIO_TIMER_TRIGGER_SEL_SHIFTnSTAT(x)

FLEXIO_TIMER_TRIGGER_SEL_TIMn(x)

struct _flexio_config_

#include <fsl_flexio.h>

Define FlexIO user configuration structure.

Public Members

bool enableFlexio: Enable/disable FlexIO module

bool enableInDoze: Enable/disable FlexIO operation in doze mode

bool enableInDebug: Enable/disable FlexIO operation in debug mode

bool enableFastAccess: Enable/disable fast access to FlexIO registers, fast access requires the FlexIO clock to be at least twice the frequency of the bus clock.

struct _flexio_timer_config

#include <fsl_flexio.h>

Define FlexIO timer configuration structure.

Public Members

uint32_t triggerSelect: The internal trigger selection number using MACROs.

flexio_timer_trigger_polarity_t triggerPolarity: Trigger Polarity.

flexio_timer_trigger_source_t triggerSource: Trigger Source, internal (see ‘trgsel’) or external.

flexio_pin_config_t pinConfig: Timer Pin Configuration.

uint32_t pinSelect: Timer Pin number Select.

flexio_pin_polarity_t pinPolarity: Timer Pin Polarity.

flexio_timer_mode_t timerMode: Timer work Mode.

flexio_timer_output_t timerOutput: Configures the initial state of the Timer Output and whether it is affected by the Timer reset.

flexio_timer_decrement_source_t timerDecrement: Configures the source of the Timer decrement and the source of the Shift clock.

flexio_timer_reset_condition_t timerReset: Configures the condition that causes the timer counter (and optionally the timer output) to be reset.

flexio_timer_disable_condition_t timerDisable: Configures the condition that causes the Timer to be disabled and stop decrementing.

flexio_timer_enable_condition_t timerEnable: Configures the condition that causes the Timer to be enabled and start decrementing.

flexio_timer_stop_bit_condition_t timerStop: Timer STOP Bit generation.

flexio_timer_start_bit_condition_t timerStart: Timer STRAT Bit generation.

uint32_t timerCompare: Value for Timer Compare N Register.

struct _flexio_shifter_config

#include <fsl_flexio.h>

Define FlexIO shifter configuration structure.

Public Members

uint32_t timerSelect: Selects which Timer is used for controlling the logic/shift register and generating the Shift clock.

flexio_shifter_timer_polarity_t timerPolarity: Timer Polarity.

flexio_pin_config_t pinConfig: Shifter Pin Configuration.

uint32_t pinSelect: Shifter Pin number Select.

flexio_pin_polarity_t pinPolarity: Shifter Pin Polarity.

flexio_shifter_mode_t shifterMode: Configures the mode of the Shifter.

uint32_t parallelWidth: Configures the parallel width when using parallel mode.

flexio_shifter_input_source_t inputSource: Selects the input source for the shifter.

flexio_shifter_stop_bit_t shifterStop: Shifter STOP bit.

flexio_shifter_start_bit_t shifterStart: Shifter START bit.

struct _flexio_gpio_config

#include <fsl_flexio.h>

The FLEXIO pin configuration structure.

Each pin can only be configured as either an output pin or an input pin at a time. If configured as an input pin, use inputConfig param. If configured as an output pin, use outputLogic.

Public Members

flexio_gpio_direction_t pinDirection: FLEXIO pin direction, input or output

uint8_t outputLogic: Set a default output logic, which has no use in input

uint8_t inputConfig: Set an input config

FlexIO eDMA SPI Driver

status_t FLEXIO_SPI_MasterTransferCreateHandleEDMA(FLEXIO_SPI_Type *base, flexio_spi_master_edma_handle_t *handle, flexio_spi_master_edma_transfer_callback_t callback, void *userData, edma_handle_t *txHandle, edma_handle_t *rxHandle)

Initializes the FlexIO SPI master eDMA handle.

This function initializes the FlexIO SPI master eDMA handle which can be used for other FlexIO SPI master transactional APIs. For a specified FlexIO SPI instance, call this API once to get the initialized handle.

Parameters:

base – Pointer to FLEXIO_SPI_Type structure.
handle – Pointer to flexio_spi_master_edma_handle_t structure to store the transfer state.
callback – SPI callback, NULL means no callback.
userData – callback function parameter.
txHandle – User requested eDMA handle for FlexIO SPI RX eDMA transfer.
rxHandle – User requested eDMA handle for FlexIO SPI TX eDMA transfer.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_OutOfRange – The FlexIO SPI eDMA type/handle table out of range.

status_t FLEXIO_SPI_MasterTransferEDMA(FLEXIO_SPI_Type *base, flexio_spi_master_edma_handle_t *handle, flexio_spi_transfer_t *xfer)

Performs a non-blocking FlexIO SPI transfer using eDMA.

Note

This interface returns immediately after transfer initiates. Call FLEXIO_SPI_MasterGetTransferCountEDMA to poll the transfer status and check whether the FlexIO SPI transfer is finished.

Parameters:

base – Pointer to FLEXIO_SPI_Type structure.
handle – Pointer to flexio_spi_master_edma_handle_t structure to store the transfer state.
xfer – Pointer to FlexIO SPI transfer structure.

Return values:

kStatus_Success – Successfully start a transfer.
kStatus_InvalidArgument – Input argument is invalid.
kStatus_FLEXIO_SPI_Busy – FlexIO SPI is not idle, is running another transfer.

void FLEXIO_SPI_MasterTransferAbortEDMA(FLEXIO_SPI_Type *base, flexio_spi_master_edma_handle_t *handle)

Aborts a FlexIO SPI transfer using eDMA.

Parameters:

base – Pointer to FLEXIO_SPI_Type structure.
handle – FlexIO SPI eDMA handle pointer.

status_t FLEXIO_SPI_MasterTransferGetCountEDMA(FLEXIO_SPI_Type *base, flexio_spi_master_edma_handle_t *handle, size_t *count)

Gets the number of bytes transferred so far using FlexIO SPI master eDMA.

Parameters:

base – Pointer to FLEXIO_SPI_Type structure.
handle – FlexIO SPI eDMA handle pointer.
count – Number of bytes transferred so far by the non-blocking transaction.

static inline void FLEXIO_SPI_SlaveTransferCreateHandleEDMA(FLEXIO_SPI_Type *base, flexio_spi_slave_edma_handle_t *handle, flexio_spi_slave_edma_transfer_callback_t callback, void *userData, edma_handle_t *txHandle, edma_handle_t *rxHandle)

Initializes the FlexIO SPI slave eDMA handle.

This function initializes the FlexIO SPI slave eDMA handle.

Parameters:

base – Pointer to FLEXIO_SPI_Type structure.
handle – Pointer to flexio_spi_slave_edma_handle_t structure to store the transfer state.
callback – SPI callback, NULL means no callback.
userData – callback function parameter.
txHandle – User requested eDMA handle for FlexIO SPI TX eDMA transfer.
rxHandle – User requested eDMA handle for FlexIO SPI RX eDMA transfer.

status_t FLEXIO_SPI_SlaveTransferEDMA(FLEXIO_SPI_Type *base, flexio_spi_slave_edma_handle_t *handle, flexio_spi_transfer_t *xfer)

Performs a non-blocking FlexIO SPI transfer using eDMA.

Note

This interface returns immediately after transfer initiates. Call FLEXIO_SPI_SlaveGetTransferCountEDMA to poll the transfer status and check whether the FlexIO SPI transfer is finished.

Parameters:

base – Pointer to FLEXIO_SPI_Type structure.
handle – Pointer to flexio_spi_slave_edma_handle_t structure to store the transfer state.
xfer – Pointer to FlexIO SPI transfer structure.

Return values:

kStatus_Success – Successfully start a transfer.
kStatus_InvalidArgument – Input argument is invalid.
kStatus_FLEXIO_SPI_Busy – FlexIO SPI is not idle, is running another transfer.

static inline void FLEXIO_SPI_SlaveTransferAbortEDMA(FLEXIO_SPI_Type *base, flexio_spi_slave_edma_handle_t *handle)

Aborts a FlexIO SPI transfer using eDMA.

Parameters:

base – Pointer to FLEXIO_SPI_Type structure.
handle – Pointer to flexio_spi_slave_edma_handle_t structure to store the transfer state.

static inline status_t FLEXIO_SPI_SlaveTransferGetCountEDMA(FLEXIO_SPI_Type *base, flexio_spi_slave_edma_handle_t *handle, size_t *count)

Gets the number of bytes transferred so far using FlexIO SPI slave eDMA.

Parameters:

base – Pointer to FLEXIO_SPI_Type structure.
handle – FlexIO SPI eDMA handle pointer.
count – Number of bytes transferred so far by the non-blocking transaction.

FSL_FLEXIO_SPI_EDMA_DRIVER_VERSION: FlexIO SPI EDMA driver version.

typedef struct _flexio_spi_master_edma_handle flexio_spi_master_edma_handle_t: typedef for flexio_spi_master_edma_handle_t in advance.

typedef flexio_spi_master_edma_handle_t flexio_spi_slave_edma_handle_t: Slave handle is the same with master handle.

typedef void (*flexio_spi_master_edma_transfer_callback_t)(FLEXIO_SPI_Type *base, flexio_spi_master_edma_handle_t *handle, status_t status, void *userData): FlexIO SPI master callback for finished transmit.

typedef void (*flexio_spi_slave_edma_transfer_callback_t)(FLEXIO_SPI_Type *base, flexio_spi_slave_edma_handle_t *handle, status_t status, void *userData): FlexIO SPI slave callback for finished transmit.

struct _flexio_spi_master_edma_handle

#include <fsl_flexio_spi_edma.h>

FlexIO SPI eDMA transfer handle, users should not touch the content of the handle.

Public Members

size_t transferSize: Total bytes to be transferred.

uint8_t nbytes: eDMA minor byte transfer count initially configured.

bool txInProgress: Send transfer in progress

bool rxInProgress: Receive transfer in progress

edma_handle_t *txHandle: DMA handler for SPI send

edma_handle_t *rxHandle: DMA handler for SPI receive

flexio_spi_master_edma_transfer_callback_t callback: Callback for SPI DMA transfer

void *userData: User Data for SPI DMA callback

FlexIO eDMA UART Driver

status_t FLEXIO_UART_TransferCreateHandleEDMA(FLEXIO_UART_Type *base, flexio_uart_edma_handle_t *handle, flexio_uart_edma_transfer_callback_t callback, void *userData, edma_handle_t *txEdmaHandle, edma_handle_t *rxEdmaHandle)

Initializes the UART handle which is used in transactional functions.

Parameters:

base – Pointer to FLEXIO_UART_Type.
handle – Pointer to flexio_uart_edma_handle_t structure.
callback – The callback function.
userData – The parameter of the callback function.
rxEdmaHandle – User requested DMA handle for RX DMA transfer.
txEdmaHandle – User requested DMA handle for TX DMA transfer.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_OutOfRange – The FlexIO SPI eDMA type/handle table out of range.

status_t FLEXIO_UART_TransferSendEDMA(FLEXIO_UART_Type *base, flexio_uart_edma_handle_t *handle, flexio_uart_transfer_t *xfer)

Sends data using eDMA.

This function sends data using eDMA. This is a non-blocking function, which returns right away. When all data is sent out, the send callback function is called.

Parameters:

base – Pointer to FLEXIO_UART_Type
handle – UART handle pointer.
xfer – UART eDMA transfer structure, see flexio_uart_transfer_t.

Return values:

kStatus_Success – if succeed, others failed.
kStatus_FLEXIO_UART_TxBusy – Previous transfer on going.

status_t FLEXIO_UART_TransferReceiveEDMA(FLEXIO_UART_Type *base, flexio_uart_edma_handle_t *handle, flexio_uart_transfer_t *xfer)

Receives data using eDMA.

This function receives data using eDMA. This is a non-blocking function, which returns right away. When all data is received, the receive callback function is called.

Parameters:

base – Pointer to FLEXIO_UART_Type
handle – Pointer to flexio_uart_edma_handle_t structure
xfer – UART eDMA transfer structure, see flexio_uart_transfer_t.

Return values:

kStatus_Success – if succeed, others failed.
kStatus_UART_RxBusy – Previous transfer on going.

void FLEXIO_UART_TransferAbortSendEDMA(FLEXIO_UART_Type *base, flexio_uart_edma_handle_t *handle)

Aborts the sent data which using eDMA.

This function aborts sent data which using eDMA.

Parameters:

base – Pointer to FLEXIO_UART_Type
handle – Pointer to flexio_uart_edma_handle_t structure

void FLEXIO_UART_TransferAbortReceiveEDMA(FLEXIO_UART_Type *base, flexio_uart_edma_handle_t *handle)

Aborts the receive data which using eDMA.

This function aborts the receive data which using eDMA.

Parameters:

base – Pointer to FLEXIO_UART_Type
handle – Pointer to flexio_uart_edma_handle_t structure

status_t FLEXIO_UART_TransferGetSendCountEDMA(FLEXIO_UART_Type *base, flexio_uart_edma_handle_t *handle, size_t *count)

Gets the number of bytes sent out.

This function gets the number of bytes sent out.

Parameters:

base – Pointer to FLEXIO_UART_Type
handle – Pointer to flexio_uart_edma_handle_t structure
count – Number of bytes sent so far by the non-blocking transaction.

Return values:

kStatus_NoTransferInProgress – transfer has finished or no transfer in progress.
kStatus_Success – Successfully return the count.

status_t FLEXIO_UART_TransferGetReceiveCountEDMA(FLEXIO_UART_Type *base, flexio_uart_edma_handle_t *handle, size_t *count)

Gets the number of bytes received.

This function gets the number of bytes received.

Parameters:

base – Pointer to FLEXIO_UART_Type
handle – Pointer to flexio_uart_edma_handle_t structure
count – Number of bytes received so far by the non-blocking transaction.

Return values:

kStatus_NoTransferInProgress – transfer has finished or no transfer in progress.
kStatus_Success – Successfully return the count.

FSL_FLEXIO_UART_EDMA_DRIVER_VERSION: FlexIO UART EDMA driver version.

typedef struct _flexio_uart_edma_handle flexio_uart_edma_handle_t

typedef void (*flexio_uart_edma_transfer_callback_t)(FLEXIO_UART_Type *base, flexio_uart_edma_handle_t *handle, status_t status, void *userData): UART transfer callback function.

struct _flexio_uart_edma_handle

#include <fsl_flexio_uart_edma.h>

UART eDMA handle.

Public Members

flexio_uart_edma_transfer_callback_t callback: Callback function.

void *userData: UART callback function parameter.

size_t txDataSizeAll: Total bytes to be sent.

size_t rxDataSizeAll: Total bytes to be received.

edma_handle_t *txEdmaHandle: The eDMA TX channel used.

edma_handle_t *rxEdmaHandle: The eDMA RX channel used.

uint8_t nbytes: eDMA minor byte transfer count initially configured.

volatile uint8_t txState: TX transfer state.

volatile uint8_t rxState: RX transfer state

FlexIO I2C Master Driver

status_t FLEXIO_I2C_CheckForBusyBus(FLEXIO_I2C_Type *base)

Make sure the bus isn’t already pulled down.

Check the FLEXIO pin status to see whether either of SDA and SCL pin is pulled down.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure..

Return values:

kStatus_Success –
kStatus_FLEXIO_I2C_Busy –

status_t FLEXIO_I2C_MasterInit(FLEXIO_I2C_Type *base, flexio_i2c_master_config_t *masterConfig, uint32_t srcClock_Hz)

Ungates the FlexIO clock, resets the FlexIO module, and configures the FlexIO I2C hardware configuration.

Example

FLEXIO_I2C_Type base = {
.flexioBase = FLEXIO,
.SDAPinIndex = 0,
.SCLPinIndex = 1,
.shifterIndex = {0,1},
.timerIndex = {0,1}
};
flexio_i2c_master_config_t config = {
.enableInDoze = false,
.enableInDebug = true,
.enableFastAccess = false,
.baudRate_Bps = 100000
};
FLEXIO_I2C_MasterInit(base, &config, srcClock_Hz);

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
masterConfig – Pointer to flexio_i2c_master_config_t structure.
srcClock_Hz – FlexIO source clock in Hz.

Return values:

kStatus_Success – Initialization successful
kStatus_InvalidArgument – The source clock exceed upper range limitation

void FLEXIO_I2C_MasterDeinit(FLEXIO_I2C_Type *base)

De-initializes the FlexIO I2C master peripheral. Calling this API Resets the FlexIO I2C master shifer and timer config, module can’t work unless the FLEXIO_I2C_MasterInit is called.

Parameters:

base – pointer to FLEXIO_I2C_Type structure.

void FLEXIO_I2C_MasterGetDefaultConfig(flexio_i2c_master_config_t *masterConfig)

Gets the default configuration to configure the FlexIO module. The configuration can be used directly for calling the FLEXIO_I2C_MasterInit().

Example:

flexio_i2c_master_config_t config;
FLEXIO_I2C_MasterGetDefaultConfig(&config);

Parameters:

masterConfig – Pointer to flexio_i2c_master_config_t structure.

static inline void FLEXIO_I2C_MasterEnable(FLEXIO_I2C_Type *base, bool enable)

Enables/disables the FlexIO module operation.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
enable – Pass true to enable module, false does not have any effect.

uint32_t FLEXIO_I2C_MasterGetStatusFlags(FLEXIO_I2C_Type *base)

Gets the FlexIO I2C master status flags.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure

Returns:

Status flag, use status flag to AND _flexio_i2c_master_status_flags can get the related status.

void FLEXIO_I2C_MasterClearStatusFlags(FLEXIO_I2C_Type *base, uint32_t mask)

Clears the FlexIO I2C master status flags.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
mask – Status flag. The parameter can be any combination of the following values:
- kFLEXIO_I2C_RxFullFlag
- kFLEXIO_I2C_ReceiveNakFlag

void FLEXIO_I2C_MasterEnableInterrupts(FLEXIO_I2C_Type *base, uint32_t mask)

Enables the FlexIO i2c master interrupt requests.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
mask – Interrupt source. Currently only one interrupt request source:
- kFLEXIO_I2C_TransferCompleteInterruptEnable

void FLEXIO_I2C_MasterDisableInterrupts(FLEXIO_I2C_Type *base, uint32_t mask)

Disables the FlexIO I2C master interrupt requests.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
mask – Interrupt source.

void FLEXIO_I2C_MasterSetBaudRate(FLEXIO_I2C_Type *base, uint32_t baudRate_Bps, uint32_t srcClock_Hz)

Sets the FlexIO I2C master transfer baudrate.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure
baudRate_Bps – the baud rate value in HZ
srcClock_Hz – source clock in HZ

void FLEXIO_I2C_MasterStart(FLEXIO_I2C_Type *base, uint8_t address, flexio_i2c_direction_t direction)

Sends START + 7-bit address to the bus.

Note

This API should be called when the transfer configuration is ready to send a START signal and 7-bit address to the bus. This is a non-blocking API, which returns directly after the address is put into the data register but the address transfer is not finished on the bus. Ensure that the kFLEXIO_I2C_RxFullFlag status is asserted before calling this API.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
address – 7-bit address.
direction – transfer direction. This parameter is one of the values in flexio_i2c_direction_t:
- kFLEXIO_I2C_Write: Transmit
- kFLEXIO_I2C_Read: Receive

void FLEXIO_I2C_MasterStop(FLEXIO_I2C_Type *base)

Sends the stop signal on the bus.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.

void FLEXIO_I2C_MasterRepeatedStart(FLEXIO_I2C_Type *base)

Sends the repeated start signal on the bus.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.

void FLEXIO_I2C_MasterAbortStop(FLEXIO_I2C_Type *base)

Sends the stop signal when transfer is still on-going.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.

void FLEXIO_I2C_MasterEnableAck(FLEXIO_I2C_Type *base, bool enable)

Configures the sent ACK/NAK for the following byte.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
enable – True to configure send ACK, false configure to send NAK.

status_t FLEXIO_I2C_MasterSetTransferCount(FLEXIO_I2C_Type *base, uint16_t count)

Sets the number of bytes to be transferred from a start signal to a stop signal.

Note

Call this API before a transfer begins because the timer generates a number of clocks according to the number of bytes that need to be transferred.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
count – Number of bytes need to be transferred from a start signal to a re-start/stop signal

Return values:

kStatus_Success – Successfully configured the count.
kStatus_InvalidArgument – Input argument is invalid.

static inline void FLEXIO_I2C_MasterWriteByte(FLEXIO_I2C_Type *base, uint32_t data)

Writes one byte of data to the I2C bus.

Note

This is a non-blocking API, which returns directly after the data is put into the data register but the data transfer is not finished on the bus. Ensure that the TxEmptyFlag is asserted before calling this API.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
data – a byte of data.

static inline uint8_t FLEXIO_I2C_MasterReadByte(FLEXIO_I2C_Type *base)

Reads one byte of data from the I2C bus.

Note

This is a non-blocking API, which returns directly after the data is read from the data register. Ensure that the data is ready in the register.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.

Returns:

data byte read.

status_t FLEXIO_I2C_MasterWriteBlocking(FLEXIO_I2C_Type *base, const uint8_t *txBuff, uint8_t txSize)

Sends a buffer of data in bytes.

Note

This function blocks via polling until all bytes have been sent.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
txBuff – The data bytes to send.
txSize – The number of data bytes to send.

Return values:

kStatus_Success – Successfully write data.
kStatus_FLEXIO_I2C_Nak – Receive NAK during writing data.
kStatus_FLEXIO_I2C_Timeout – Timeout polling status flags.

status_t FLEXIO_I2C_MasterReadBlocking(FLEXIO_I2C_Type *base, uint8_t *rxBuff, uint8_t rxSize)

Receives a buffer of bytes.

Note

This function blocks via polling until all bytes have been received.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
rxBuff – The buffer to store the received bytes.
rxSize – The number of data bytes to be received.

Return values:

kStatus_Success – Successfully read data.
kStatus_FLEXIO_I2C_Timeout – Timeout polling status flags.

status_t FLEXIO_I2C_MasterTransferBlocking(FLEXIO_I2C_Type *base, flexio_i2c_master_transfer_t *xfer)

Performs a master polling transfer on the I2C bus.

Note

The API does not return until the transfer succeeds or fails due to receiving NAK.

Parameters:

base – pointer to FLEXIO_I2C_Type structure.
xfer – pointer to flexio_i2c_master_transfer_t structure.

Returns:

status of status_t.

status_t FLEXIO_I2C_MasterTransferCreateHandle(FLEXIO_I2C_Type *base, flexio_i2c_master_handle_t *handle, flexio_i2c_master_transfer_callback_t callback, void *userData)

Initializes the I2C handle which is used in transactional functions.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
handle – Pointer to flexio_i2c_master_handle_t structure to store the transfer state.
callback – Pointer to user callback function.
userData – User param passed to the callback function.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_OutOfRange – The FlexIO type/handle/isr table out of range.

status_t FLEXIO_I2C_MasterTransferNonBlocking(FLEXIO_I2C_Type *base, flexio_i2c_master_handle_t *handle, flexio_i2c_master_transfer_t *xfer)

Performs a master interrupt non-blocking transfer on the I2C bus.

Note

The API returns immediately after the transfer initiates. Call FLEXIO_I2C_MasterTransferGetCount to poll the transfer status to check whether the transfer is finished. If the return status is not kStatus_FLEXIO_I2C_Busy, the transfer is finished.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure
handle – Pointer to flexio_i2c_master_handle_t structure which stores the transfer state
xfer – pointer to flexio_i2c_master_transfer_t structure

Return values:

kStatus_Success – Successfully start a transfer.
kStatus_FLEXIO_I2C_Busy – FlexIO I2C is not idle, is running another transfer.

status_t FLEXIO_I2C_MasterTransferGetCount(FLEXIO_I2C_Type *base, flexio_i2c_master_handle_t *handle, size_t *count)

Gets the master transfer status during a interrupt non-blocking transfer.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure.
handle – Pointer to flexio_i2c_master_handle_t structure which stores the transfer state.
count – Number of bytes transferred so far by the non-blocking transaction.

Return values:

kStatus_InvalidArgument – count is Invalid.
kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.
kStatus_Success – Successfully return the count.

void FLEXIO_I2C_MasterTransferAbort(FLEXIO_I2C_Type *base, flexio_i2c_master_handle_t *handle)

Aborts an interrupt non-blocking transfer early.

Note

This API can be called at any time when an interrupt non-blocking transfer initiates to abort the transfer early.

Parameters:

base – Pointer to FLEXIO_I2C_Type structure
handle – Pointer to flexio_i2c_master_handle_t structure which stores the transfer state

void FLEXIO_I2C_MasterTransferHandleIRQ(void *i2cType, void *i2cHandle)

Master interrupt handler.

Parameters:

i2cType – Pointer to FLEXIO_I2C_Type structure
i2cHandle – Pointer to flexio_i2c_master_transfer_t structure

FSL_FLEXIO_I2C_MASTER_DRIVER_VERSION

FlexIO I2C transfer status.

Values:

enumerator kStatus_FLEXIO_I2C_Busy: I2C is busy doing transfer.

enumerator kStatus_FLEXIO_I2C_Idle: I2C is busy doing transfer.

enumerator kStatus_FLEXIO_I2C_Nak: NAK received during transfer.

enumerator kStatus_FLEXIO_I2C_Timeout: Timeout polling status flags.

enum _flexio_i2c_master_interrupt

Define FlexIO I2C master interrupt mask.

Values:

enumerator kFLEXIO_I2C_TxEmptyInterruptEnable: Tx buffer empty interrupt enable.

enumerator kFLEXIO_I2C_RxFullInterruptEnable: Rx buffer full interrupt enable.

enum _flexio_i2c_master_status_flags

Define FlexIO I2C master status mask.

Values:

enumerator kFLEXIO_I2C_TxEmptyFlag: Tx shifter empty flag.

enumerator kFLEXIO_I2C_RxFullFlag: Rx shifter full/Transfer complete flag.

enumerator kFLEXIO_I2C_ReceiveNakFlag: Receive NAK flag.

enum _flexio_i2c_direction

Direction of master transfer.

Values:

enumerator kFLEXIO_I2C_Write: Master send to slave.

enumerator kFLEXIO_I2C_Read: Master receive from slave.

typedef enum _flexio_i2c_direction flexio_i2c_direction_t: Direction of master transfer.

typedef struct _flexio_i2c_type FLEXIO_I2C_Type: Define FlexIO I2C master access structure typedef.

typedef struct _flexio_i2c_master_config flexio_i2c_master_config_t: Define FlexIO I2C master user configuration structure.

typedef struct _flexio_i2c_master_transfer flexio_i2c_master_transfer_t: Define FlexIO I2C master transfer structure.

typedef struct _flexio_i2c_master_handle flexio_i2c_master_handle_t: FlexIO I2C master handle typedef.

typedef void (*flexio_i2c_master_transfer_callback_t)(FLEXIO_I2C_Type *base, flexio_i2c_master_handle_t *handle, status_t status, void *userData): FlexIO I2C master transfer callback typedef.

I2C_RETRY_TIMES: Retry times for waiting flag.

struct _flexio_i2c_type

#include <fsl_flexio_i2c_master.h>

Define FlexIO I2C master access structure typedef.

Public Members

FLEXIO_Type *flexioBase: FlexIO base pointer.

uint8_t SDAPinIndex: Pin select for I2C SDA.

uint8_t SCLPinIndex: Pin select for I2C SCL.

uint8_t shifterIndex[2]: Shifter index used in FlexIO I2C.

uint8_t timerIndex[3]: Timer index used in FlexIO I2C.

uint32_t baudrate: Master transfer baudrate, used to calculate delay time.

struct _flexio_i2c_master_config

#include <fsl_flexio_i2c_master.h>

Define FlexIO I2C master user configuration structure.

Public Members

bool enableMaster: Enables the FlexIO I2C peripheral at initialization time.

bool enableInDoze: Enable/disable FlexIO operation in doze mode.

bool enableInDebug: Enable/disable FlexIO operation in debug mode.

bool enableFastAccess: Enable/disable fast access to FlexIO registers, fast access requires the FlexIO clock to be at least twice the frequency of the bus clock.

uint32_t baudRate_Bps: Baud rate in Bps.

struct _flexio_i2c_master_transfer

#include <fsl_flexio_i2c_master.h>

Define FlexIO I2C master transfer structure.

Public Members

uint32_t flags: Transfer flag which controls the transfer, reserved for FlexIO I2C.

uint8_t slaveAddress: 7-bit slave address.

flexio_i2c_direction_t direction: Transfer direction, read or write.

uint32_t subaddress: Sub address. Transferred MSB first.

uint8_t subaddressSize: Size of command buffer.

uint8_t volatile *data: Transfer buffer.

volatile size_t dataSize: Transfer size.

struct _flexio_i2c_master_handle

#include <fsl_flexio_i2c_master.h>

Define FlexIO I2C master handle structure.

Public Members

flexio_i2c_master_transfer_t transfer: FlexIO I2C master transfer copy.

size_t transferSize: Total bytes to be transferred.

uint8_t state: Transfer state maintained during transfer.

flexio_i2c_master_transfer_callback_t completionCallback: Callback function called at transfer event. Callback function called at transfer event.

void *userData: Callback parameter passed to callback function.

bool needRestart: Whether master needs to send re-start signal.

FlexIO I2S Driver

void FLEXIO_I2S_Init(FLEXIO_I2S_Type *base, const flexio_i2s_config_t *config)

Initializes the FlexIO I2S.

This API configures FlexIO pins and shifter to I2S and configures the FlexIO I2S with a configuration structure. The configuration structure can be filled by the user, or be set with default values by FLEXIO_I2S_GetDefaultConfig().

Note

This API should be called at the beginning of the application to use the FlexIO I2S driver. Otherwise, any access to the FlexIO I2S module can cause hard fault because the clock is not enabled.

Parameters:

base – FlexIO I2S base pointer
config – FlexIO I2S configure structure.

void FLEXIO_I2S_GetDefaultConfig(flexio_i2s_config_t *config)

Sets the FlexIO I2S configuration structure to default values.

The purpose of this API is to get the configuration structure initialized for use in FLEXIO_I2S_Init(). Users may use the initialized structure unchanged in FLEXIO_I2S_Init() or modify some fields of the structure before calling FLEXIO_I2S_Init().

Parameters:

config – pointer to master configuration structure

void FLEXIO_I2S_Deinit(FLEXIO_I2S_Type *base)

De-initializes the FlexIO I2S.

Calling this API resets the FlexIO I2S shifter and timer config. After calling this API, call the FLEXO_I2S_Init to use the FlexIO I2S module.

Parameters:

base – FlexIO I2S base pointer

static inline void FLEXIO_I2S_Enable(FLEXIO_I2S_Type *base, bool enable)

Enables/disables the FlexIO I2S module operation.

Parameters:

base – Pointer to FLEXIO_I2S_Type
enable – True to enable, false dose not have any effect.

uint32_t FLEXIO_I2S_GetStatusFlags(FLEXIO_I2S_Type *base)

Gets the FlexIO I2S status flags.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure

Returns:

Status flag, which are ORed by the enumerators in the _flexio_i2s_status_flags.

void FLEXIO_I2S_EnableInterrupts(FLEXIO_I2S_Type *base, uint32_t mask)

Enables the FlexIO I2S interrupt.

This function enables the FlexIO UART interrupt.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure
mask – interrupt source

void FLEXIO_I2S_DisableInterrupts(FLEXIO_I2S_Type *base, uint32_t mask)

Disables the FlexIO I2S interrupt.

This function enables the FlexIO UART interrupt.

Parameters:

base – pointer to FLEXIO_I2S_Type structure
mask – interrupt source

static inline void FLEXIO_I2S_TxEnableDMA(FLEXIO_I2S_Type *base, bool enable)

Enables/disables the FlexIO I2S Tx DMA requests.

Parameters:

base – FlexIO I2S base pointer
enable – True means enable DMA, false means disable DMA.

static inline void FLEXIO_I2S_RxEnableDMA(FLEXIO_I2S_Type *base, bool enable)

Enables/disables the FlexIO I2S Rx DMA requests.

Parameters:

base – FlexIO I2S base pointer
enable – True means enable DMA, false means disable DMA.

static inline uint32_t FLEXIO_I2S_TxGetDataRegisterAddress(FLEXIO_I2S_Type *base)

Gets the FlexIO I2S send data register address.

This function returns the I2S data register address, mainly used by DMA/eDMA.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure

Returns:

FlexIO i2s send data register address.

static inline uint32_t FLEXIO_I2S_RxGetDataRegisterAddress(FLEXIO_I2S_Type *base)

Gets the FlexIO I2S receive data register address.

This function returns the I2S data register address, mainly used by DMA/eDMA.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure

Returns:

FlexIO i2s receive data register address.

void FLEXIO_I2S_MasterSetFormat(FLEXIO_I2S_Type *base, flexio_i2s_format_t *format, uint32_t srcClock_Hz)

Configures the FlexIO I2S audio format in master mode.

Audio format can be changed in run-time of FlexIO I2S. This function configures the sample rate and audio data format to be transferred.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure
format – Pointer to FlexIO I2S audio data format structure.
srcClock_Hz – I2S master clock source frequency in Hz.

void FLEXIO_I2S_SlaveSetFormat(FLEXIO_I2S_Type *base, flexio_i2s_format_t *format)

Configures the FlexIO I2S audio format in slave mode.

Audio format can be changed in run-time of FlexIO I2S. This function configures the sample rate and audio data format to be transferred.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure
format – Pointer to FlexIO I2S audio data format structure.

status_t FLEXIO_I2S_WriteBlocking(FLEXIO_I2S_Type *base, uint8_t bitWidth, uint8_t *txData, size_t size)

Sends data using a blocking method.

Note

This function blocks via polling until data is ready to be sent.

Parameters:

base – FlexIO I2S base pointer.
bitWidth – How many bits in a audio word, usually 8/16/24/32 bits.
txData – Pointer to the data to be written.
size – Bytes to be written.

Return values:

kStatus_Success – Successfully write data.
kStatus_FLEXIO_I2C_Timeout – Timeout polling status flags.

static inline void FLEXIO_I2S_WriteData(FLEXIO_I2S_Type *base, uint8_t bitWidth, uint32_t data)

Writes data into a data register.

Parameters:

base – FlexIO I2S base pointer.
bitWidth – How many bits in a audio word, usually 8/16/24/32 bits.
data – Data to be written.

status_t FLEXIO_I2S_ReadBlocking(FLEXIO_I2S_Type *base, uint8_t bitWidth, uint8_t *rxData, size_t size)

Receives a piece of data using a blocking method.

Note

This function blocks via polling until data is ready to be sent.

Parameters:

base – FlexIO I2S base pointer
bitWidth – How many bits in a audio word, usually 8/16/24/32 bits.
rxData – Pointer to the data to be read.
size – Bytes to be read.

Return values:

kStatus_Success – Successfully read data.
kStatus_FLEXIO_I2C_Timeout – Timeout polling status flags.

static inline uint32_t FLEXIO_I2S_ReadData(FLEXIO_I2S_Type *base)

Reads a data from the data register.

Parameters:

base – FlexIO I2S base pointer

Returns:

Data read from data register.

void FLEXIO_I2S_TransferTxCreateHandle(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, flexio_i2s_callback_t callback, void *userData)

Initializes the FlexIO I2S handle.

This function initializes the FlexIO I2S handle which can be used for other FlexIO I2S transactional APIs. Call this API once to get the initialized handle.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure
handle – Pointer to flexio_i2s_handle_t structure to store the transfer state.
callback – FlexIO I2S callback function, which is called while finished a block.
userData – User parameter for the FlexIO I2S callback.

void FLEXIO_I2S_TransferSetFormat(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, flexio_i2s_format_t *format, uint32_t srcClock_Hz)

Configures the FlexIO I2S audio format.

Audio format can be changed at run-time of FlexIO I2S. This function configures the sample rate and audio data format to be transferred.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure.
handle – FlexIO I2S handle pointer.
format – Pointer to audio data format structure.
srcClock_Hz – FlexIO I2S bit clock source frequency in Hz. This parameter should be 0 while in slave mode.

void FLEXIO_I2S_TransferRxCreateHandle(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, flexio_i2s_callback_t callback, void *userData)

Initializes the FlexIO I2S receive handle.

This function initializes the FlexIO I2S handle which can be used for other FlexIO I2S transactional APIs. Call this API once to get the initialized handle.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure.
handle – Pointer to flexio_i2s_handle_t structure to store the transfer state.
callback – FlexIO I2S callback function, which is called while finished a block.
userData – User parameter for the FlexIO I2S callback.

status_t FLEXIO_I2S_TransferSendNonBlocking(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, flexio_i2s_transfer_t *xfer)

Performs an interrupt non-blocking send transfer on FlexIO I2S.

Note

The API returns immediately after transfer initiates. Call FLEXIO_I2S_GetRemainingBytes to poll the transfer status and check whether the transfer is finished. If the return status is 0, the transfer is finished.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure.
handle – Pointer to flexio_i2s_handle_t structure which stores the transfer state
xfer – Pointer to flexio_i2s_transfer_t structure

Return values:

kStatus_Success – Successfully start the data transmission.
kStatus_FLEXIO_I2S_TxBusy – Previous transmission still not finished, data not all written to TX register yet.
kStatus_InvalidArgument – The input parameter is invalid.

status_t FLEXIO_I2S_TransferReceiveNonBlocking(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, flexio_i2s_transfer_t *xfer)

Performs an interrupt non-blocking receive transfer on FlexIO I2S.

Note

The API returns immediately after transfer initiates. Call FLEXIO_I2S_GetRemainingBytes to poll the transfer status to check whether the transfer is finished. If the return status is 0, the transfer is finished.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure.
handle – Pointer to flexio_i2s_handle_t structure which stores the transfer state
xfer – Pointer to flexio_i2s_transfer_t structure

Return values:

kStatus_Success – Successfully start the data receive.
kStatus_FLEXIO_I2S_RxBusy – Previous receive still not finished.
kStatus_InvalidArgument – The input parameter is invalid.

void FLEXIO_I2S_TransferAbortSend(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle)

Aborts the current send.

Note

This API can be called at any time when interrupt non-blocking transfer initiates to abort the transfer in a early time.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure.
handle – Pointer to flexio_i2s_handle_t structure which stores the transfer state

void FLEXIO_I2S_TransferAbortReceive(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle)

Aborts the current receive.

Note

This API can be called at any time when interrupt non-blocking transfer initiates to abort the transfer in a early time.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure.
handle – Pointer to flexio_i2s_handle_t structure which stores the transfer state

status_t FLEXIO_I2S_TransferGetSendCount(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, size_t *count)

Gets the remaining bytes to be sent.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure.
handle – Pointer to flexio_i2s_handle_t structure which stores the transfer state
count – Bytes sent.

Return values:

kStatus_Success – Succeed get the transfer count.
kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.

status_t FLEXIO_I2S_TransferGetReceiveCount(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, size_t *count)

Gets the remaining bytes to be received.

Parameters:

base – Pointer to FLEXIO_I2S_Type structure.
handle – Pointer to flexio_i2s_handle_t structure which stores the transfer state
count – Bytes recieved.

Return values:

kStatus_Success – Succeed get the transfer count.
kStatus_NoTransferInProgress – There is not a non-blocking transaction currently in progress.

Returns:

count Bytes received.

void FLEXIO_I2S_TransferTxHandleIRQ(void *i2sBase, void *i2sHandle)

Tx interrupt handler.

Parameters:

i2sBase – Pointer to FLEXIO_I2S_Type structure.
i2sHandle – Pointer to flexio_i2s_handle_t structure

void FLEXIO_I2S_TransferRxHandleIRQ(void *i2sBase, void *i2sHandle)

Rx interrupt handler.

Parameters:

i2sBase – Pointer to FLEXIO_I2S_Type structure.
i2sHandle – Pointer to flexio_i2s_handle_t structure.

FSL_FLEXIO_I2S_DRIVER_VERSION: FlexIO I2S driver version 2.2.0.

FlexIO I2S transfer status.

Values:

enumerator kStatus_FLEXIO_I2S_Idle: FlexIO I2S is in idle state

enumerator kStatus_FLEXIO_I2S_TxBusy: FlexIO I2S Tx is busy

enumerator kStatus_FLEXIO_I2S_RxBusy: FlexIO I2S Tx is busy

enumerator kStatus_FLEXIO_I2S_Error: FlexIO I2S error occurred

enumerator kStatus_FLEXIO_I2S_QueueFull: FlexIO I2S transfer queue is full.

enumerator kStatus_FLEXIO_I2S_Timeout: FlexIO I2S timeout polling status flags.

enum _flexio_i2s_master_slave

Master or slave mode.

Values:

enumerator kFLEXIO_I2S_Master: Master mode

enumerator kFLEXIO_I2S_Slave: Slave mode

_flexio_i2s_interrupt_enable Define FlexIO FlexIO I2S interrupt mask.

Values:

enumerator kFLEXIO_I2S_TxDataRegEmptyInterruptEnable: Transmit buffer empty interrupt enable.

enumerator kFLEXIO_I2S_RxDataRegFullInterruptEnable: Receive buffer full interrupt enable.

_flexio_i2s_status_flags Define FlexIO FlexIO I2S status mask.

Values:

enumerator kFLEXIO_I2S_TxDataRegEmptyFlag: Transmit buffer empty flag.

enumerator kFLEXIO_I2S_RxDataRegFullFlag: Receive buffer full flag.

enum _flexio_i2s_sample_rate

Audio sample rate.

Values:

enumerator kFLEXIO_I2S_SampleRate8KHz: Sample rate 8000Hz

enumerator kFLEXIO_I2S_SampleRate11025Hz: Sample rate 11025Hz

enumerator kFLEXIO_I2S_SampleRate12KHz: Sample rate 12000Hz

enumerator kFLEXIO_I2S_SampleRate16KHz: Sample rate 16000Hz

enumerator kFLEXIO_I2S_SampleRate22050Hz: Sample rate 22050Hz

enumerator kFLEXIO_I2S_SampleRate24KHz: Sample rate 24000Hz

enumerator kFLEXIO_I2S_SampleRate32KHz: Sample rate 32000Hz

enumerator kFLEXIO_I2S_SampleRate44100Hz: Sample rate 44100Hz

enumerator kFLEXIO_I2S_SampleRate48KHz: Sample rate 48000Hz

enumerator kFLEXIO_I2S_SampleRate96KHz: Sample rate 96000Hz

enum _flexio_i2s_word_width

Audio word width.

Values:

enumerator kFLEXIO_I2S_WordWidth8bits: Audio data width 8 bits

enumerator kFLEXIO_I2S_WordWidth16bits: Audio data width 16 bits

enumerator kFLEXIO_I2S_WordWidth24bits: Audio data width 24 bits

enumerator kFLEXIO_I2S_WordWidth32bits: Audio data width 32 bits

typedef struct _flexio_i2s_type FLEXIO_I2S_Type: Define FlexIO I2S access structure typedef.

typedef enum _flexio_i2s_master_slave flexio_i2s_master_slave_t: Master or slave mode.

typedef struct _flexio_i2s_config flexio_i2s_config_t: FlexIO I2S configure structure.

typedef struct _flexio_i2s_format flexio_i2s_format_t: FlexIO I2S audio format, FlexIO I2S only support the same format in Tx and Rx.

typedef enum _flexio_i2s_sample_rate flexio_i2s_sample_rate_t: Audio sample rate.

typedef enum _flexio_i2s_word_width flexio_i2s_word_width_t: Audio word width.

typedef struct _flexio_i2s_transfer flexio_i2s_transfer_t: Define FlexIO I2S transfer structure.

typedef struct _flexio_i2s_handle flexio_i2s_handle_t

typedef void (*flexio_i2s_callback_t)(FLEXIO_I2S_Type *base, flexio_i2s_handle_t *handle, status_t status, void *userData): FlexIO I2S xfer callback prototype.

I2S_RETRY_TIMES: Retry times for waiting flag.

FLEXIO_I2S_XFER_QUEUE_SIZE: FlexIO I2S transfer queue size, user can refine it according to use case.

struct _flexio_i2s_type

#include <fsl_flexio_i2s.h>

Define FlexIO I2S access structure typedef.

Public Members

FLEXIO_Type *flexioBase: FlexIO base pointer

uint8_t txPinIndex: Tx data pin index in FlexIO pins

uint8_t rxPinIndex: Rx data pin index

uint8_t bclkPinIndex: Bit clock pin index

uint8_t fsPinIndex: Frame sync pin index

uint8_t txShifterIndex: Tx data shifter index

uint8_t rxShifterIndex: Rx data shifter index

uint8_t bclkTimerIndex: Bit clock timer index

uint8_t fsTimerIndex: Frame sync timer index

struct _flexio_i2s_config

#include <fsl_flexio_i2s.h>

FlexIO I2S configure structure.

Public Members

bool enableI2S: Enable FlexIO I2S

flexio_i2s_master_slave_t masterSlave: Master or slave

flexio_pin_polarity_t txPinPolarity: Tx data pin polarity, active high or low

flexio_pin_polarity_t rxPinPolarity: Rx data pin polarity

flexio_pin_polarity_t bclkPinPolarity: Bit clock pin polarity

flexio_pin_polarity_t fsPinPolarity: Frame sync pin polarity

flexio_shifter_timer_polarity_t txTimerPolarity: Tx data valid on bclk rising or falling edge

flexio_shifter_timer_polarity_t rxTimerPolarity: Rx data valid on bclk rising or falling edge

struct _flexio_i2s_format

#include <fsl_flexio_i2s.h>

FlexIO I2S audio format, FlexIO I2S only support the same format in Tx and Rx.

Public Members

uint8_t bitWidth: Bit width of audio data, always 8/16/24/32 bits

uint32_t sampleRate_Hz: Sample rate of the audio data

struct _flexio_i2s_transfer

#include <fsl_flexio_i2s.h>

Define FlexIO I2S transfer structure.

Public Members

uint8_t *data: Data buffer start pointer

size_t dataSize: Bytes to be transferred.

struct _flexio_i2s_handle

#include <fsl_flexio_i2s.h>

Define FlexIO I2S handle structure.

Public Members

uint32_t state: Internal state

flexio_i2s_callback_t callback: Callback function called at transfer event

void *userData: Callback parameter passed to callback function

uint8_t bitWidth: Bit width for transfer, 8/16/24/32bits

flexio_i2s_transfer_t queue[(4U)]: Transfer queue storing queued transfer

size_t transferSize[(4U)]: Data bytes need to transfer

volatile uint8_t queueUser: Index for user to queue transfer

volatile uint8_t queueDriver: Index for driver to get the transfer data and size

FlexIO SPI Driver

void FLEXIO_SPI_MasterInit(FLEXIO_SPI_Type *base, flexio_spi_master_config_t *masterConfig, uint32_t srcClock_Hz)

Ungates the FlexIO clock, resets the FlexIO module, configures the FlexIO SPI master hardware, and configures the FlexIO SPI with FlexIO SPI master configuration. The configuration structure can be filled by the user, or be set with default values by the FLEXIO_SPI_MasterGetDefaultConfig().

Example

FLEXIO_SPI_Type spiDev = {
.flexioBase = FLEXIO,
.SDOPinIndex = 0,
.SDIPinIndex = 1,
.SCKPinIndex = 2,
.CSnPinIndex = 3,
.shifterIndex = {0,1},
.timerIndex = {0,1}
};
flexio_spi_master_config_t config = {
.enableMaster = true,
.enableInDoze = false,
.enableInDebug = true,
.enableFastAccess = false,
.baudRate_Bps = 500000,
.phase = kFLEXIO_SPI_ClockPhaseFirstEdge,
.direction = kFLEXIO_SPI_MsbFirst,
.dataMode = kFLEXIO_SPI_8BitMode
};
FLEXIO_SPI_MasterInit(&spiDev, &config, srcClock_Hz);

Note

1.FlexIO SPI master only support CPOL = 0, which means clock inactive low. 2.For FlexIO SPI master, the input valid time is 1.5 clock cycles, for slave the output valid time is 2.5 clock cycles. So if FlexIO SPI master communicates with other spi IPs, the maximum baud rate is FlexIO clock frequency divided by 2*2=4. If FlexIO SPI master communicates with FlexIO SPI slave, the maximum baud rate is FlexIO clock frequency divided by (1.5+2.5)*2=8.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
masterConfig – Pointer to the flexio_spi_master_config_t structure.
srcClock_Hz – FlexIO source clock in Hz.

void FLEXIO_SPI_MasterDeinit(FLEXIO_SPI_Type *base)

Resets the FlexIO SPI timer and shifter config.

Parameters:

base – Pointer to the FLEXIO_SPI_Type.

void FLEXIO_SPI_MasterGetDefaultConfig(flexio_spi_master_config_t *masterConfig)

Gets the default configuration to configure the FlexIO SPI master. The configuration can be used directly by calling the FLEXIO_SPI_MasterConfigure(). Example:

flexio_spi_master_config_t masterConfig;
FLEXIO_SPI_MasterGetDefaultConfig(&masterConfig);

Parameters:

masterConfig – Pointer to the flexio_spi_master_config_t structure.

void FLEXIO_SPI_SlaveInit(FLEXIO_SPI_Type *base, flexio_spi_slave_config_t *slaveConfig)

Ungates the FlexIO clock, resets the FlexIO module, configures the FlexIO SPI slave hardware configuration, and configures the FlexIO SPI with FlexIO SPI slave configuration. The configuration structure can be filled by the user, or be set with default values by the FLEXIO_SPI_SlaveGetDefaultConfig().

Note

1.Only one timer is needed in the FlexIO SPI slave. As a result, the second timer index is ignored. 2.FlexIO SPI slave only support CPOL = 0, which means clock inactive low. 3.For FlexIO SPI master, the input valid time is 1.5 clock cycles, for slave the output valid time is 2.5 clock cycles. So if FlexIO SPI slave communicates with other spi IPs, the maximum baud rate is FlexIO clock frequency divided by 3*2=6. If FlexIO SPI slave communicates with FlexIO SPI master, the maximum baud rate is FlexIO clock frequency divided by (1.5+2.5)*2=8. Example

FLEXIO_SPI_Type spiDev = {
.flexioBase = FLEXIO,
.SDOPinIndex = 0,
.SDIPinIndex = 1,
.SCKPinIndex = 2,
.CSnPinIndex = 3,
.shifterIndex = {0,1},
.timerIndex = {0}
};
flexio_spi_slave_config_t config = {
.enableSlave = true,
.enableInDoze = false,
.enableInDebug = true,
.enableFastAccess = false,
.phase = kFLEXIO_SPI_ClockPhaseFirstEdge,
.direction = kFLEXIO_SPI_MsbFirst,
.dataMode = kFLEXIO_SPI_8BitMode
};
FLEXIO_SPI_SlaveInit(&spiDev, &config);

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
slaveConfig – Pointer to the flexio_spi_slave_config_t structure.

void FLEXIO_SPI_SlaveDeinit(FLEXIO_SPI_Type *base)

Gates the FlexIO clock.

Parameters:

base – Pointer to the FLEXIO_SPI_Type.

void FLEXIO_SPI_SlaveGetDefaultConfig(flexio_spi_slave_config_t *slaveConfig)

Gets the default configuration to configure the FlexIO SPI slave. The configuration can be used directly for calling the FLEXIO_SPI_SlaveConfigure(). Example:

flexio_spi_slave_config_t slaveConfig;
FLEXIO_SPI_SlaveGetDefaultConfig(&slaveConfig);

Parameters:

slaveConfig – Pointer to the flexio_spi_slave_config_t structure.

uint32_t FLEXIO_SPI_GetStatusFlags(FLEXIO_SPI_Type *base)

Gets FlexIO SPI status flags.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.

Returns:

status flag; Use the status flag to AND the following flag mask and get the status.

kFLEXIO_SPI_TxEmptyFlag
kFLEXIO_SPI_RxEmptyFlag

void FLEXIO_SPI_ClearStatusFlags(FLEXIO_SPI_Type *base, uint32_t mask)

Clears FlexIO SPI status flags.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
mask – status flag The parameter can be any combination of the following values:
- kFLEXIO_SPI_TxEmptyFlag
- kFLEXIO_SPI_RxEmptyFlag

void FLEXIO_SPI_EnableInterrupts(FLEXIO_SPI_Type *base, uint32_t mask)

Enables the FlexIO SPI interrupt.

This function enables the FlexIO SPI interrupt.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
mask – interrupt source. The parameter can be any combination of the following values:
- kFLEXIO_SPI_RxFullInterruptEnable
- kFLEXIO_SPI_TxEmptyInterruptEnable

void FLEXIO_SPI_DisableInterrupts(FLEXIO_SPI_Type *base, uint32_t mask)

Disables the FlexIO SPI interrupt.

This function disables the FlexIO SPI interrupt.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
mask – interrupt source The parameter can be any combination of the following values:
- kFLEXIO_SPI_RxFullInterruptEnable
- kFLEXIO_SPI_TxEmptyInterruptEnable

void FLEXIO_SPI_EnableDMA(FLEXIO_SPI_Type *base, uint32_t mask, bool enable)

Enables/disables the FlexIO SPI transmit DMA. This function enables/disables the FlexIO SPI Tx DMA, which means that asserting the kFLEXIO_SPI_TxEmptyFlag does/doesn’t trigger the DMA request.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
mask – SPI DMA source.
enable – True means enable DMA, false means disable DMA.

static inline uint32_t FLEXIO_SPI_GetTxDataRegisterAddress(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction)

Gets the FlexIO SPI transmit data register address for MSB first transfer.

This function returns the SPI data register address, which is mainly used by DMA/eDMA.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
direction – Shift direction of MSB first or LSB first.

Returns:

FlexIO SPI transmit data register address.

static inline uint32_t FLEXIO_SPI_GetRxDataRegisterAddress(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction)

Gets the FlexIO SPI receive data register address for the MSB first transfer.

This function returns the SPI data register address, which is mainly used by DMA/eDMA.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
direction – Shift direction of MSB first or LSB first.

Returns:

FlexIO SPI receive data register address.

static inline void FLEXIO_SPI_Enable(FLEXIO_SPI_Type *base, bool enable)

Enables/disables the FlexIO SPI module operation.

Parameters:

base – Pointer to the FLEXIO_SPI_Type.
enable – True to enable, false does not have any effect.

void FLEXIO_SPI_MasterSetBaudRate(FLEXIO_SPI_Type *base, uint32_t baudRate_Bps, uint32_t srcClockHz)

Sets baud rate for the FlexIO SPI transfer, which is only used for the master.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
baudRate_Bps – Baud Rate needed in Hz.
srcClockHz – SPI source clock frequency in Hz.

static inline void FLEXIO_SPI_WriteData(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction, uint32_t data)

Writes one byte of data, which is sent using the MSB method.

Note

This is a non-blocking API, which returns directly after the data is put into the data register but the data transfer is not finished on the bus. Ensure that the TxEmptyFlag is asserted before calling this API.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
direction – Shift direction of MSB first or LSB first.
data – 8/16/32 bit data.

static inline uint32_t FLEXIO_SPI_ReadData(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction)

Reads 8 bit/16 bit data.

Note

This is a non-blocking API, which returns directly after the data is read from the data register. Ensure that the RxFullFlag is asserted before calling this API.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
direction – Shift direction of MSB first or LSB first.

Returns:

8 bit/16 bit data received.

status_t FLEXIO_SPI_WriteBlocking(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction, const uint8_t *buffer, size_t size)

Sends a buffer of data bytes.

Note

This function blocks using the polling method until all bytes have been sent.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
direction – Shift direction of MSB first or LSB first.
buffer – The data bytes to send.
size – The number of data bytes to send.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_FLEXIO_SPI_Timeout – The transfer timed out and was aborted.

status_t FLEXIO_SPI_ReadBlocking(FLEXIO_SPI_Type *base, flexio_spi_shift_direction_t direction, uint8_t *buffer, size_t size)

Receives a buffer of bytes.

Note

This function blocks using the polling method until all bytes have been received.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
direction – Shift direction of MSB first or LSB first.
buffer – The buffer to store the received bytes.
size – The number of data bytes to be received.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_FLEXIO_SPI_Timeout – The transfer timed out and was aborted.

status_t FLEXIO_SPI_MasterTransferBlocking(FLEXIO_SPI_Type *base, flexio_spi_transfer_t *xfer)

Receives a buffer of bytes.

Note

This function blocks via polling until all bytes have been received.

Parameters:

base – pointer to FLEXIO_SPI_Type structure
xfer – FlexIO SPI transfer structure, see flexio_spi_transfer_t.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_FLEXIO_SPI_Timeout – The transfer timed out and was aborted.

void FLEXIO_SPI_FlushShifters(FLEXIO_SPI_Type *base)

Flush tx/rx shifters.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.

status_t FLEXIO_SPI_MasterTransferCreateHandle(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle, flexio_spi_master_transfer_callback_t callback, void *userData)

Initializes the FlexIO SPI Master handle, which is used in transactional functions.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
handle – Pointer to the flexio_spi_master_handle_t structure to store the transfer state.
callback – The callback function.
userData – The parameter of the callback function.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_OutOfRange – The FlexIO type/handle/ISR table out of range.

status_t FLEXIO_SPI_MasterTransferNonBlocking(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle, flexio_spi_transfer_t *xfer)

Master transfer data using IRQ.

This function sends data using IRQ. This is a non-blocking function, which returns right away. When all data is sent out/received, the callback function is called.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
handle – Pointer to the flexio_spi_master_handle_t structure to store the transfer state.
xfer – FlexIO SPI transfer structure. See flexio_spi_transfer_t.

Return values:

kStatus_Success – Successfully start a transfer.
kStatus_InvalidArgument – Input argument is invalid.
kStatus_FLEXIO_SPI_Busy – SPI is not idle, is running another transfer.

void FLEXIO_SPI_MasterTransferAbort(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle)

Aborts the master data transfer, which used IRQ.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
handle – Pointer to the flexio_spi_master_handle_t structure to store the transfer state.

status_t FLEXIO_SPI_MasterTransferGetCount(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle, size_t *count)

Gets the data transfer status which used IRQ.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
handle – Pointer to the flexio_spi_master_handle_t structure to store the transfer state.
count – Number of bytes transferred so far by the non-blocking transaction.

Return values:

kStatus_InvalidArgument – count is Invalid.
kStatus_Success – Successfully return the count.

void FLEXIO_SPI_MasterTransferHandleIRQ(void *spiType, void *spiHandle)

FlexIO SPI master IRQ handler function.

Parameters:

spiType – Pointer to the FLEXIO_SPI_Type structure.
spiHandle – Pointer to the flexio_spi_master_handle_t structure to store the transfer state.

status_t FLEXIO_SPI_SlaveTransferCreateHandle(FLEXIO_SPI_Type *base, flexio_spi_slave_handle_t *handle, flexio_spi_slave_transfer_callback_t callback, void *userData)

Initializes the FlexIO SPI Slave handle, which is used in transactional functions.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
handle – Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.
callback – The callback function.
userData – The parameter of the callback function.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_OutOfRange – The FlexIO type/handle/ISR table out of range.

status_t FLEXIO_SPI_SlaveTransferNonBlocking(FLEXIO_SPI_Type *base, flexio_spi_slave_handle_t *handle, flexio_spi_transfer_t *xfer)

Slave transfer data using IRQ.

This function sends data using IRQ. This is a non-blocking function, which returns right away. When all data is sent out/received, the callback function is called.

Parameters:

handle – Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.
base – Pointer to the FLEXIO_SPI_Type structure.
xfer – FlexIO SPI transfer structure. See flexio_spi_transfer_t.

Return values:

kStatus_Success – Successfully start a transfer.
kStatus_InvalidArgument – Input argument is invalid.
kStatus_FLEXIO_SPI_Busy – SPI is not idle; it is running another transfer.

static inline void FLEXIO_SPI_SlaveTransferAbort(FLEXIO_SPI_Type *base, flexio_spi_slave_handle_t *handle)

Aborts the slave data transfer which used IRQ, share same API with master.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
handle – Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.

static inline status_t FLEXIO_SPI_SlaveTransferGetCount(FLEXIO_SPI_Type *base, flexio_spi_slave_handle_t *handle, size_t *count)

Gets the data transfer status which used IRQ, share same API with master.

Parameters:

base – Pointer to the FLEXIO_SPI_Type structure.
handle – Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.
count – Number of bytes transferred so far by the non-blocking transaction.

Return values:

kStatus_InvalidArgument – count is Invalid.
kStatus_Success – Successfully return the count.

void FLEXIO_SPI_SlaveTransferHandleIRQ(void *spiType, void *spiHandle)

FlexIO SPI slave IRQ handler function.

Parameters:

spiType – Pointer to the FLEXIO_SPI_Type structure.
spiHandle – Pointer to the flexio_spi_slave_handle_t structure to store the transfer state.

FSL_FLEXIO_SPI_DRIVER_VERSION: FlexIO SPI driver version.

Error codes for the FlexIO SPI driver.

Values:

enumerator kStatus_FLEXIO_SPI_Busy: FlexIO SPI is busy.

enumerator kStatus_FLEXIO_SPI_Idle: SPI is idle

enumerator kStatus_FLEXIO_SPI_Error: FlexIO SPI error.

enumerator kStatus_FLEXIO_SPI_Timeout: FlexIO SPI timeout polling status flags.

enum _flexio_spi_clock_phase

FlexIO SPI clock phase configuration.

Values:

enumerator kFLEXIO_SPI_ClockPhaseFirstEdge: First edge on SPSCK occurs at the middle of the first cycle of a data transfer.

enumerator kFLEXIO_SPI_ClockPhaseSecondEdge: First edge on SPSCK occurs at the start of the first cycle of a data transfer.

enum _flexio_spi_shift_direction

FlexIO SPI data shifter direction options.

Values:

enumerator kFLEXIO_SPI_MsbFirst: Data transfers start with most significant bit.

enumerator kFLEXIO_SPI_LsbFirst: Data transfers start with least significant bit.

enum _flexio_spi_data_bitcount_mode

FlexIO SPI data length mode options.

Values:

enumerator kFLEXIO_SPI_8BitMode: 8-bit data transmission mode.

enumerator kFLEXIO_SPI_16BitMode: 16-bit data transmission mode.

enumerator kFLEXIO_SPI_32BitMode: 32-bit data transmission mode.

enum _flexio_spi_interrupt_enable

Define FlexIO SPI interrupt mask.

Values:

enumerator kFLEXIO_SPI_TxEmptyInterruptEnable: Transmit buffer empty interrupt enable.

enumerator kFLEXIO_SPI_RxFullInterruptEnable: Receive buffer full interrupt enable.

enum _flexio_spi_status_flags

Define FlexIO SPI status mask.

Values:

enumerator kFLEXIO_SPI_TxBufferEmptyFlag: Transmit buffer empty flag.

enumerator kFLEXIO_SPI_RxBufferFullFlag: Receive buffer full flag.

enum _flexio_spi_dma_enable

Define FlexIO SPI DMA mask.

Values:

enumerator kFLEXIO_SPI_TxDmaEnable: Tx DMA request source

enumerator kFLEXIO_SPI_RxDmaEnable: Rx DMA request source

enumerator kFLEXIO_SPI_DmaAllEnable: All DMA request source

enum _flexio_spi_transfer_flags

Define FlexIO SPI transfer flags.

Note

Use kFLEXIO_SPI_csContinuous and one of the other flags to OR together to form the transfer flag.

Values:

enumerator kFLEXIO_SPI_8bitMsb: FlexIO SPI 8-bit MSB first

enumerator kFLEXIO_SPI_8bitLsb: FlexIO SPI 8-bit LSB first

enumerator kFLEXIO_SPI_16bitMsb: FlexIO SPI 16-bit MSB first

enumerator kFLEXIO_SPI_16bitLsb: FlexIO SPI 16-bit LSB first

enumerator kFLEXIO_SPI_32bitMsb: FlexIO SPI 32-bit MSB first

enumerator kFLEXIO_SPI_32bitLsb: FlexIO SPI 32-bit LSB first

enumerator kFLEXIO_SPI_csContinuous: Enable the CS signal continuous mode

typedef enum _flexio_spi_clock_phase flexio_spi_clock_phase_t: FlexIO SPI clock phase configuration.

typedef enum _flexio_spi_shift_direction flexio_spi_shift_direction_t: FlexIO SPI data shifter direction options.

typedef enum _flexio_spi_data_bitcount_mode flexio_spi_data_bitcount_mode_t: FlexIO SPI data length mode options.

typedef struct _flexio_spi_type FLEXIO_SPI_Type: Define FlexIO SPI access structure typedef.

typedef struct _flexio_spi_master_config flexio_spi_master_config_t: Define FlexIO SPI master configuration structure.

typedef struct _flexio_spi_slave_config flexio_spi_slave_config_t: Define FlexIO SPI slave configuration structure.

typedef struct _flexio_spi_transfer flexio_spi_transfer_t: Define FlexIO SPI transfer structure.

typedef struct _flexio_spi_master_handle flexio_spi_master_handle_t: typedef for flexio_spi_master_handle_t in advance.

typedef flexio_spi_master_handle_t flexio_spi_slave_handle_t: Slave handle is the same with master handle.

typedef void (*flexio_spi_master_transfer_callback_t)(FLEXIO_SPI_Type *base, flexio_spi_master_handle_t *handle, status_t status, void *userData): FlexIO SPI master callback for finished transmit.

typedef void (*flexio_spi_slave_transfer_callback_t)(FLEXIO_SPI_Type *base, flexio_spi_slave_handle_t *handle, status_t status, void *userData): FlexIO SPI slave callback for finished transmit.

FLEXIO_SPI_DUMMYDATA: FlexIO SPI dummy transfer data, the data is sent while txData is NULL.

SPI_RETRY_TIMES: Retry times for waiting flag.

FLEXIO_SPI_XFER_DATA_FORMAT(flag): Get the transfer data format of width and bit order.

struct _flexio_spi_type

#include <fsl_flexio_spi.h>

Define FlexIO SPI access structure typedef.

Public Members

FLEXIO_Type *flexioBase: FlexIO base pointer.

uint8_t SDOPinIndex: Pin select for data output. To set SDO pin in Hi-Z state, user needs to mux the pin as GPIO input and disable all pull up/down in application.

uint8_t SDIPinIndex: Pin select for data input.

uint8_t SCKPinIndex: Pin select for clock.

uint8_t CSnPinIndex: Pin select for enable.

uint8_t shifterIndex[2]: Shifter index used in FlexIO SPI.

uint8_t timerIndex[2]: Timer index used in FlexIO SPI.

struct _flexio_spi_master_config

#include <fsl_flexio_spi.h>

Define FlexIO SPI master configuration structure.

Public Members

bool enableMaster: Enable/disable FlexIO SPI master after configuration.

bool enableInDoze: Enable/disable FlexIO operation in doze mode.

bool enableInDebug: Enable/disable FlexIO operation in debug mode.

bool enableFastAccess: Enable/disable fast access to FlexIO registers, fast access requires the FlexIO clock to be at least twice the frequency of the bus clock.

uint32_t baudRate_Bps: Baud rate in Bps.

flexio_spi_clock_phase_t phase: Clock phase.

flexio_spi_data_bitcount_mode_t dataMode: 8bit or 16bit mode.

struct _flexio_spi_slave_config

#include <fsl_flexio_spi.h>

Define FlexIO SPI slave configuration structure.

Public Members

bool enableSlave: Enable/disable FlexIO SPI slave after configuration.

bool enableInDoze: Enable/disable FlexIO operation in doze mode.

bool enableInDebug: Enable/disable FlexIO operation in debug mode.

bool enableFastAccess: Enable/disable fast access to FlexIO registers, fast access requires the FlexIO clock to be at least twice the frequency of the bus clock.

flexio_spi_clock_phase_t phase: Clock phase.

flexio_spi_data_bitcount_mode_t dataMode: 8bit or 16bit mode.

struct _flexio_spi_transfer

#include <fsl_flexio_spi.h>

Define FlexIO SPI transfer structure.

Public Members

const uint8_t *txData: Send buffer.

uint8_t *rxData: Receive buffer.

size_t dataSize: Transfer bytes.

uint8_t flags: FlexIO SPI control flag, MSB first or LSB first.

struct _flexio_spi_master_handle

#include <fsl_flexio_spi.h>

Define FlexIO SPI handle structure.

Public Members

const uint8_t *txData: Transfer buffer.

uint8_t *rxData: Receive buffer.

size_t transferSize: Total bytes to be transferred.

volatile size_t txRemainingBytes: Send data remaining in bytes.

volatile size_t rxRemainingBytes: Receive data remaining in bytes.

volatile uint32_t state: FlexIO SPI internal state.

uint8_t bytePerFrame: SPI mode, 2bytes or 1byte in a frame

flexio_spi_shift_direction_t direction: Shift direction.

flexio_spi_master_transfer_callback_t callback: FlexIO SPI callback.

void *userData: Callback parameter.

FlexIO UART Driver

status_t FLEXIO_UART_Init(FLEXIO_UART_Type *base, const flexio_uart_config_t *userConfig, uint32_t srcClock_Hz)

Ungates the FlexIO clock, resets the FlexIO module, configures FlexIO UART hardware, and configures the FlexIO UART with FlexIO UART configuration. The configuration structure can be filled by the user or be set with default values by FLEXIO_UART_GetDefaultConfig().

Example

FLEXIO_UART_Type base = {
.flexioBase = FLEXIO,
.TxPinIndex = 0,
.RxPinIndex = 1,
.shifterIndex = {0,1},
.timerIndex = {0,1}
};
flexio_uart_config_t config = {
.enableInDoze = false,
.enableInDebug = true,
.enableFastAccess = false,
.baudRate_Bps = 115200U,
.bitCountPerChar = 8
};
FLEXIO_UART_Init(base, &config, srcClock_Hz);

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
userConfig – Pointer to the flexio_uart_config_t structure.
srcClock_Hz – FlexIO source clock in Hz.

Return values:

kStatus_Success – Configuration success.
kStatus_FLEXIO_UART_BaudrateNotSupport – Baudrate is not supported for current clock source frequency.

void FLEXIO_UART_Deinit(FLEXIO_UART_Type *base)

Resets the FlexIO UART shifter and timer config.

Note

After calling this API, call the FLEXO_UART_Init to use the FlexIO UART module.

Parameters:

base – Pointer to FLEXIO_UART_Type structure

void FLEXIO_UART_GetDefaultConfig(flexio_uart_config_t *userConfig)

Gets the default configuration to configure the FlexIO UART. The configuration can be used directly for calling the FLEXIO_UART_Init(). Example:

flexio_uart_config_t config;
FLEXIO_UART_GetDefaultConfig(&userConfig);

Parameters:

userConfig – Pointer to the flexio_uart_config_t structure.

uint32_t FLEXIO_UART_GetStatusFlags(FLEXIO_UART_Type *base)

Gets the FlexIO UART status flags.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.

Returns:

FlexIO UART status flags.

void FLEXIO_UART_ClearStatusFlags(FLEXIO_UART_Type *base, uint32_t mask)

Gets the FlexIO UART status flags.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
mask – Status flag. The parameter can be any combination of the following values:
- kFLEXIO_UART_TxDataRegEmptyFlag
- kFLEXIO_UART_RxEmptyFlag
- kFLEXIO_UART_RxOverRunFlag

void FLEXIO_UART_EnableInterrupts(FLEXIO_UART_Type *base, uint32_t mask)

Enables the FlexIO UART interrupt.

This function enables the FlexIO UART interrupt.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
mask – Interrupt source.

void FLEXIO_UART_DisableInterrupts(FLEXIO_UART_Type *base, uint32_t mask)

Disables the FlexIO UART interrupt.

This function disables the FlexIO UART interrupt.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
mask – Interrupt source.

static inline uint32_t FLEXIO_UART_GetTxDataRegisterAddress(FLEXIO_UART_Type *base)

Gets the FlexIO UARt transmit data register address.

This function returns the UART data register address, which is mainly used by DMA/eDMA.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.

Returns:

FlexIO UART transmit data register address.

static inline uint32_t FLEXIO_UART_GetRxDataRegisterAddress(FLEXIO_UART_Type *base)

Gets the FlexIO UART receive data register address.

This function returns the UART data register address, which is mainly used by DMA/eDMA.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.

Returns:

FlexIO UART receive data register address.

static inline void FLEXIO_UART_EnableTxDMA(FLEXIO_UART_Type *base, bool enable)

Enables/disables the FlexIO UART transmit DMA. This function enables/disables the FlexIO UART Tx DMA, which means asserting the kFLEXIO_UART_TxDataRegEmptyFlag does/doesn’t trigger the DMA request.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
enable – True to enable, false to disable.

static inline void FLEXIO_UART_EnableRxDMA(FLEXIO_UART_Type *base, bool enable)

Enables/disables the FlexIO UART receive DMA. This function enables/disables the FlexIO UART Rx DMA, which means asserting kFLEXIO_UART_RxDataRegFullFlag does/doesn’t trigger the DMA request.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
enable – True to enable, false to disable.

static inline void FLEXIO_UART_Enable(FLEXIO_UART_Type *base, bool enable)

Enables/disables the FlexIO UART module operation.

Parameters:

base – Pointer to the FLEXIO_UART_Type.
enable – True to enable, false does not have any effect.

static inline void FLEXIO_UART_WriteByte(FLEXIO_UART_Type *base, const uint8_t *buffer)

Writes one byte of data.

Note

This is a non-blocking API, which returns directly after the data is put into the data register. Ensure that the TxEmptyFlag is asserted before calling this API.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
buffer – The data bytes to send.

static inline void FLEXIO_UART_ReadByte(FLEXIO_UART_Type *base, uint8_t *buffer)

Reads one byte of data.

Note

This is a non-blocking API, which returns directly after the data is read from the data register. Ensure that the RxFullFlag is asserted before calling this API.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
buffer – The buffer to store the received bytes.

status_t FLEXIO_UART_WriteBlocking(FLEXIO_UART_Type *base, const uint8_t *txData, size_t txSize)

Sends a buffer of data bytes.

Note

This function blocks using the polling method until all bytes have been sent.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
txData – The data bytes to send.
txSize – The number of data bytes to send.

Return values:

kStatus_FLEXIO_UART_Timeout – Transmission timed out and was aborted.
kStatus_Success – Successfully wrote all data.

status_t FLEXIO_UART_ReadBlocking(FLEXIO_UART_Type *base, uint8_t *rxData, size_t rxSize)

Receives a buffer of bytes.

Note

This function blocks using the polling method until all bytes have been received.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
rxData – The buffer to store the received bytes.
rxSize – The number of data bytes to be received.

Return values:

kStatus_FLEXIO_UART_Timeout – Transmission timed out and was aborted.
kStatus_Success – Successfully received all data.

status_t FLEXIO_UART_TransferCreateHandle(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle, flexio_uart_transfer_callback_t callback, void *userData)

Initializes the UART handle.

This function initializes the FlexIO UART handle, which can be used for other FlexIO UART transactional APIs. Call this API once to get the initialized handle.

The UART driver supports the “background” receiving, which means that users can set up a RX ring buffer optionally. Data received is stored into the ring buffer even when the user doesn’t call the FLEXIO_UART_TransferReceiveNonBlocking() API. If there is already data received in the ring buffer, users can get the received data from the ring buffer directly. The ring buffer is disabled if passing NULL as ringBuffer.

Parameters:

base – to FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.
callback – The callback function.
userData – The parameter of the callback function.

Return values:

kStatus_Success – Successfully create the handle.
kStatus_OutOfRange – The FlexIO type/handle/ISR table out of range.

void FLEXIO_UART_TransferStartRingBuffer(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle, uint8_t *ringBuffer, size_t ringBufferSize)

Sets up the RX ring buffer.

This function sets up the RX ring buffer to a specific UART handle.

When the RX ring buffer is used, data received is stored into the ring buffer even when the user doesn’t call the UART_ReceiveNonBlocking() API. If there is already data received in the ring buffer, users can get the received data from the ring buffer directly.

Note

When using the RX ring buffer, one byte is reserved for internal use. In other words, if ringBufferSize is 32, only 31 bytes are used for saving data.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.
ringBuffer – Start address of ring buffer for background receiving. Pass NULL to disable the ring buffer.
ringBufferSize – Size of the ring buffer.

void FLEXIO_UART_TransferStopRingBuffer(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle)

Aborts the background transfer and uninstalls the ring buffer.

This function aborts the background transfer and uninstalls the ring buffer.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.

status_t FLEXIO_UART_TransferSendNonBlocking(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle, flexio_uart_transfer_t *xfer)

Transmits a buffer of data using the interrupt method.

This function sends data using an interrupt method. This is a non-blocking function, which returns directly without waiting for all data to be written to the TX register. When all data is written to the TX register in ISR, the FlexIO UART driver calls the callback function and passes the kStatus_FLEXIO_UART_TxIdle as status parameter.

Note

The kStatus_FLEXIO_UART_TxIdle is passed to the upper layer when all data is written to the TX register. However, it does not ensure that all data is sent out.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.
xfer – FlexIO UART transfer structure. See flexio_uart_transfer_t.

Return values:

kStatus_Success – Successfully starts the data transmission.
kStatus_UART_TxBusy – Previous transmission still not finished, data not written to the TX register.

void FLEXIO_UART_TransferAbortSend(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle)

Aborts the interrupt-driven data transmit.

This function aborts the interrupt-driven data sending. Get the remainBytes to find out how many bytes are still not sent out.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.

status_t FLEXIO_UART_TransferGetSendCount(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle, size_t *count)

Gets the number of bytes sent.

This function gets the number of bytes sent driven by interrupt.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.
count – Number of bytes sent so far by the non-blocking transaction.

Return values:

kStatus_NoTransferInProgress – transfer has finished or no transfer in progress.
kStatus_Success – Successfully return the count.

status_t FLEXIO_UART_TransferReceiveNonBlocking(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle, flexio_uart_transfer_t *xfer, size_t *receivedBytes)

Receives a buffer of data using the interrupt method.

This function receives data using the interrupt method. This is a non-blocking function, which returns without waiting for all data to be received. If the RX ring buffer is used and not empty, the data in ring buffer is copied and the parameter receivedBytes shows how many bytes are copied from the ring buffer. After copying, if the data in ring buffer is not enough to read, the receive request is saved by the UART driver. When new data arrives, the receive request is serviced first. When all data is received, the UART driver notifies the upper layer through a callback function and passes the status parameter kStatus_UART_RxIdle. For example, if the upper layer needs 10 bytes but there are only 5 bytes in the ring buffer, the 5 bytes are copied to xfer->data. This function returns with the parameter receivedBytes set to 5. For the last 5 bytes, newly arrived data is saved from the xfer->data[5]. When 5 bytes are received, the UART driver notifies upper layer. If the RX ring buffer is not enabled, this function enables the RX and RX interrupt to receive data to xfer->data. When all data is received, the upper layer is notified.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.
xfer – UART transfer structure. See flexio_uart_transfer_t.
receivedBytes – Bytes received from the ring buffer directly.

Return values:

kStatus_Success – Successfully queue the transfer into the transmit queue.
kStatus_FLEXIO_UART_RxBusy – Previous receive request is not finished.

void FLEXIO_UART_TransferAbortReceive(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle)

Aborts the receive data which was using IRQ.

This function aborts the receive data which was using IRQ.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.

status_t FLEXIO_UART_TransferGetReceiveCount(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle, size_t *count)

Gets the number of bytes received.

This function gets the number of bytes received driven by interrupt.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.
handle – Pointer to the flexio_uart_handle_t structure to store the transfer state.
count – Number of bytes received so far by the non-blocking transaction.

Return values:

kStatus_NoTransferInProgress – transfer has finished or no transfer in progress.
kStatus_Success – Successfully return the count.

void FLEXIO_UART_TransferHandleIRQ(void *uartType, void *uartHandle)

FlexIO UART IRQ handler function.

This function processes the FlexIO UART transmit and receives the IRQ request.

Parameters:

uartType – Pointer to the FLEXIO_UART_Type structure.
uartHandle – Pointer to the flexio_uart_handle_t structure to store the transfer state.

void FLEXIO_UART_FlushShifters(FLEXIO_UART_Type *base)

Flush tx/rx shifters.

Parameters:

base – Pointer to the FLEXIO_UART_Type structure.

FSL_FLEXIO_UART_DRIVER_VERSION: FlexIO UART driver version.

Error codes for the UART driver.

Values:

enumerator kStatus_FLEXIO_UART_TxBusy: Transmitter is busy.

enumerator kStatus_FLEXIO_UART_RxBusy: Receiver is busy.

enumerator kStatus_FLEXIO_UART_TxIdle: UART transmitter is idle.

enumerator kStatus_FLEXIO_UART_RxIdle: UART receiver is idle.

enumerator kStatus_FLEXIO_UART_ERROR: ERROR happens on UART.

enumerator kStatus_FLEXIO_UART_RxRingBufferOverrun: UART RX software ring buffer overrun.

enumerator kStatus_FLEXIO_UART_RxHardwareOverrun: UART RX receiver overrun.

enumerator kStatus_FLEXIO_UART_Timeout: UART times out.

enumerator kStatus_FLEXIO_UART_BaudrateNotSupport: Baudrate is not supported in current clock source

enum _flexio_uart_bit_count_per_char

FlexIO UART bit count per char.

Values:

enumerator kFLEXIO_UART_7BitsPerChar: 7-bit data characters

enumerator kFLEXIO_UART_8BitsPerChar: 8-bit data characters

enumerator kFLEXIO_UART_9BitsPerChar: 9-bit data characters

enum _flexio_uart_interrupt_enable

Define FlexIO UART interrupt mask.

Values:

enumerator kFLEXIO_UART_TxDataRegEmptyInterruptEnable: Transmit buffer empty interrupt enable.

enumerator kFLEXIO_UART_RxDataRegFullInterruptEnable: Receive buffer full interrupt enable.

enum _flexio_uart_status_flags

Define FlexIO UART status mask.

Values:

enumerator kFLEXIO_UART_TxDataRegEmptyFlag: Transmit buffer empty flag.

enumerator kFLEXIO_UART_RxDataRegFullFlag: Receive buffer full flag.

enumerator kFLEXIO_UART_RxOverRunFlag: Receive buffer over run flag.

typedef enum _flexio_uart_bit_count_per_char flexio_uart_bit_count_per_char_t: FlexIO UART bit count per char.

typedef struct _flexio_uart_type FLEXIO_UART_Type: Define FlexIO UART access structure typedef.

typedef struct _flexio_uart_config flexio_uart_config_t: Define FlexIO UART user configuration structure.

typedef struct _flexio_uart_transfer flexio_uart_transfer_t: Define FlexIO UART transfer structure.

typedef struct _flexio_uart_handle flexio_uart_handle_t

typedef void (*flexio_uart_transfer_callback_t)(FLEXIO_UART_Type *base, flexio_uart_handle_t *handle, status_t status, void *userData): FlexIO UART transfer callback function.

UART_RETRY_TIMES: Retry times for waiting flag.

struct _flexio_uart_type

#include <fsl_flexio_uart.h>

Define FlexIO UART access structure typedef.

Public Members

FLEXIO_Type *flexioBase: FlexIO base pointer.

uint8_t TxPinIndex: Pin select for UART_Tx.

uint8_t RxPinIndex: Pin select for UART_Rx.

uint8_t shifterIndex[2]: Shifter index used in FlexIO UART.

uint8_t timerIndex[2]: Timer index used in FlexIO UART.

struct _flexio_uart_config

#include <fsl_flexio_uart.h>

Define FlexIO UART user configuration structure.

Public Members

bool enableUart: Enable/disable FlexIO UART TX & RX.

bool enableInDoze: Enable/disable FlexIO operation in doze mode

bool enableInDebug: Enable/disable FlexIO operation in debug mode

bool enableFastAccess: Enable/disable fast access to FlexIO registers, fast access requires the FlexIO clock to be at least twice the frequency of the bus clock.

uint32_t baudRate_Bps: Baud rate in Bps.

flexio_uart_bit_count_per_char_t bitCountPerChar: number of bits, 7/8/9 -bit

struct _flexio_uart_transfer

#include <fsl_flexio_uart.h>

Define FlexIO UART transfer structure.

Public Members

size_t dataSize: Transfer size

struct _flexio_uart_handle

#include <fsl_flexio_uart.h>

Define FLEXIO UART handle structure.

Public Members

const uint8_t *volatile txData: Address of remaining data to send.

volatile size_t txDataSize: Size of the remaining data to send.

uint8_t *volatile rxData: Address of remaining data to receive.

volatile size_t rxDataSize: Size of the remaining data to receive.

size_t txDataSizeAll: Total bytes to be sent.

size_t rxDataSizeAll: Total bytes to be received.

uint8_t *rxRingBuffer: Start address of the receiver ring buffer.

size_t rxRingBufferSize: Size of the ring buffer.

volatile uint16_t rxRingBufferHead: Index for the driver to store received data into ring buffer.

volatile uint16_t rxRingBufferTail: Index for the user to get data from the ring buffer.

flexio_uart_transfer_callback_t callback: Callback function.

void *userData: UART callback function parameter.

volatile uint8_t txState: TX transfer state.

volatile uint8_t rxState: RX transfer state

union __unnamed117__

Public Members

uint8_t *data: The buffer of data to be transfer.

uint8_t *rxData: The buffer to receive data.

const uint8_t *txData: The buffer of data to be sent.

FLEXSPI: Flexible Serial Peripheral Interface Driver

uint32_t FLEXSPI_GetInstance(FLEXSPI_Type *base)

Get the instance number for FLEXSPI.

Parameters:

base – FLEXSPI base pointer.

status_t FLEXSPI_CheckAndClearError(FLEXSPI_Type *base, uint32_t status)

Check and clear IP command execution errors.

Parameters:

base – FLEXSPI base pointer.
status – interrupt status.

void FLEXSPI_Init(FLEXSPI_Type *base, const flexspi_config_t *config)

Initializes the FLEXSPI module and internal state.

This function enables the clock for FLEXSPI and also configures the FLEXSPI with the input configure parameters. Users should call this function before any FLEXSPI operations.

Parameters:

base – FLEXSPI peripheral base address.
config – FLEXSPI configure structure.

void FLEXSPI_GetDefaultConfig(flexspi_config_t *config)

Gets default settings for FLEXSPI.

Parameters:

config – FLEXSPI configuration structure.

void FLEXSPI_Deinit(FLEXSPI_Type *base)

Deinitializes the FLEXSPI module.

Clears the FLEXSPI state and FLEXSPI module registers.

Parameters:

base – FLEXSPI peripheral base address.

void FLEXSPI_UpdateDllValue(FLEXSPI_Type *base, flexspi_device_config_t *config, flexspi_port_t port)

Update FLEXSPI DLL value depending on currently flexspi root clock.

Parameters:

base – FLEXSPI peripheral base address.
config – Flash configuration parameters.
port – FLEXSPI Operation port.

void FLEXSPI_SetFlashConfig(FLEXSPI_Type *base, flexspi_device_config_t *config, flexspi_port_t port)

Configures the connected device parameter.

This function configures the connected device relevant parameters, such as the size, command, and so on. The flash configuration value cannot have a default value. The user needs to configure it according to the connected device.

Parameters:

base – FLEXSPI peripheral base address.
config – Flash configuration parameters.
port – FLEXSPI Operation port.

void FLEXSPI_SoftwareReset(FLEXSPI_Type *base)

Software reset for the FLEXSPI logic.

This function sets the software reset flags for both AHB and buffer domain and resets both AHB buffer and also IP FIFOs.

Parameters:

base – FLEXSPI peripheral base address.

static inline void FLEXSPI_Enable(FLEXSPI_Type *base, bool enable)

Enables or disables the FLEXSPI module.

Parameters:

base – FLEXSPI peripheral base address.
enable – True means enable FLEXSPI, false means disable.

static inline void FLEXSPI_EnableInterrupts(FLEXSPI_Type *base, uint32_t mask)

Enables the FLEXSPI interrupts.

Parameters:

base – FLEXSPI peripheral base address.
mask – FLEXSPI interrupt source.

static inline void FLEXSPI_DisableInterrupts(FLEXSPI_Type *base, uint32_t mask)

Disable the FLEXSPI interrupts.

Parameters:

base – FLEXSPI peripheral base address.
mask – FLEXSPI interrupt source.

static inline void FLEXSPI_EnableTxDMA(FLEXSPI_Type *base, bool enable)

Enables or disables FLEXSPI IP Tx FIFO DMA requests.

Parameters:

base – FLEXSPI peripheral base address.
enable – Enable flag for transmit DMA request. Pass true for enable, false for disable.

static inline void FLEXSPI_EnableRxDMA(FLEXSPI_Type *base, bool enable)

Enables or disables FLEXSPI IP Rx FIFO DMA requests.

Parameters:

base – FLEXSPI peripheral base address.
enable – Enable flag for receive DMA request. Pass true for enable, false for disable.

static inline uint32_t FLEXSPI_GetTxFifoAddress(FLEXSPI_Type *base)

Gets FLEXSPI IP tx fifo address for DMA transfer.

Parameters:

base – FLEXSPI peripheral base address.

Return values:

The – tx fifo address.

static inline uint32_t FLEXSPI_GetRxFifoAddress(FLEXSPI_Type *base)

Gets FLEXSPI IP rx fifo address for DMA transfer.

Parameters:

base – FLEXSPI peripheral base address.

Return values:

The – rx fifo address.

static inline void FLEXSPI_ResetFifos(FLEXSPI_Type *base, bool txFifo, bool rxFifo)

Clears the FLEXSPI IP FIFO logic.

Parameters:

base – FLEXSPI peripheral base address.
txFifo – Pass true to reset TX FIFO.
rxFifo – Pass true to reset RX FIFO.

static inline void FLEXSPI_GetFifoCounts(FLEXSPI_Type *base, size_t *txCount, size_t *rxCount)

Gets the valid data entries in the FLEXSPI FIFOs.

Parameters:

base – FLEXSPI peripheral base address.
txCount – [out] Pointer through which the current number of bytes in the transmit FIFO is returned. Pass NULL if this value is not required.
rxCount – [out] Pointer through which the current number of bytes in the receive FIFO is returned. Pass NULL if this value is not required.

static inline uint32_t FLEXSPI_GetInterruptStatusFlags(FLEXSPI_Type *base)

Get the FLEXSPI interrupt status flags.

Parameters:

base – FLEXSPI peripheral base address.

Return values:

interrupt – status flag, use status flag to AND flexspi_flags_t could get the related status.

static inline void FLEXSPI_ClearInterruptStatusFlags(FLEXSPI_Type *base, uint32_t mask)

Get the FLEXSPI interrupt status flags.

Parameters:

base – FLEXSPI peripheral base address.
mask – FLEXSPI interrupt source.

static inline void FLEXSPI_GetDataLearningPhase(FLEXSPI_Type *base, uint8_t *portAPhase, uint8_t *portBPhase)

Gets the sampling clock phase selection after Data Learning.

Parameters:

base – FLEXSPI peripheral base address.
portAPhase – Pointer to a uint8_t type variable to receive the selected clock phase on PORTA.
portBPhase – Pointer to a uint8_t type variable to receive the selected clock phase on PORTB.

static inline flexspi_arb_command_source_t FLEXSPI_GetArbitratorCommandSource(FLEXSPI_Type *base)

Gets the trigger source of current command sequence granted by arbitrator.

Parameters:

base – FLEXSPI peripheral base address.

Return values:

trigger – source of current command sequence.

static inline flexspi_ip_error_code_t FLEXSPI_GetIPCommandErrorCode(FLEXSPI_Type *base, uint8_t *index)

Gets the error code when IP command error detected.

Parameters:

base – FLEXSPI peripheral base address.
index – Pointer to a uint8_t type variable to receive the sequence index when error detected.

Return values:

error – code when IP command error detected.

static inline flexspi_ahb_error_code_t FLEXSPI_GetAHBCommandErrorCode(FLEXSPI_Type *base, uint8_t *index)

Gets the error code when AHB command error detected.

Parameters:

base – FLEXSPI peripheral base address.
index – Pointer to a uint8_t type variable to receive the sequence index when error detected.

Return values:

error – code when AHB command error detected.

static inline bool FLEXSPI_GetBusIdleStatus(FLEXSPI_Type *base)

Returns whether the bus is idle.

Parameters:

base – FLEXSPI peripheral base address.

Return values:

true – Bus is idle.
false – Bus is busy.

void FLEXSPI_UpdateRxSampleClock(FLEXSPI_Type *base, flexspi_read_sample_clock_t clockSource)

Update read sample clock source.

Parameters:

base – FLEXSPI peripheral base address.
clockSource – clockSource of type flexspi_read_sample_clock_t

static inline void FLEXSPI_EnableIPParallelMode(FLEXSPI_Type *base, bool enable)

Enables/disables the FLEXSPI IP command parallel mode.

Parameters:

base – FLEXSPI peripheral base address.
enable – True means enable parallel mode, false means disable parallel mode.

static inline void FLEXSPI_EnableAHBParallelMode(FLEXSPI_Type *base, bool enable)

Enables/disables the FLEXSPI AHB command parallel mode.

Parameters:

base – FLEXSPI peripheral base address.
enable – True means enable parallel mode, false means disable parallel mode.

void FLEXSPI_UpdateLUT(FLEXSPI_Type *base, uint32_t index, const uint32_t *cmd, uint32_t count)

Updates the LUT table.

Parameters:

base – FLEXSPI peripheral base address.
index – From which index start to update. It could be any index of the LUT table, which also allows user to update command content inside a command. Each command consists of up to 8 instructions and occupy 4*32-bit memory.
cmd – Command sequence array.
count – Number of sequences.

static inline void FLEXSPI_WriteData(FLEXSPI_Type *base, uint32_t data, uint8_t fifoIndex)

Writes data into FIFO.

Parameters:

base – FLEXSPI peripheral base address
data – The data bytes to send
fifoIndex – Destination fifo index.

static inline uint32_t FLEXSPI_ReadData(FLEXSPI_Type *base, uint8_t fifoIndex)

Receives data from data FIFO.

Parameters:

base – FLEXSPI peripheral base address
fifoIndex – Source fifo index.

Returns:

The data in the FIFO.

status_t FLEXSPI_WriteBlocking(FLEXSPI_Type *base, uint8_t *buffer, size_t size)

Sends a buffer of data bytes using blocking method.

Note

This function blocks via polling until all bytes have been sent.

Parameters:

base – FLEXSPI peripheral base address
buffer – The data bytes to send
size – The number of data bytes to send

Return values:

kStatus_Success – write success without error
kStatus_FLEXSPI_SequenceExecutionTimeout – sequence execution timeout
kStatus_FLEXSPI_IpCommandSequenceError – IP command sequence error detected
kStatus_FLEXSPI_IpCommandGrantTimeout – IP command grant timeout detected

status_t FLEXSPI_ReadBlocking(FLEXSPI_Type *base, uint8_t *buffer, size_t size)

Receives a buffer of data bytes using a blocking method.

Note

This function blocks via polling until all bytes have been sent.

Parameters:

base – FLEXSPI peripheral base address
buffer – The data bytes to send
size – The number of data bytes to receive

Return values:

kStatus_Success – read success without error
kStatus_FLEXSPI_SequenceExecutionTimeout – sequence execution timeout
kStatus_FLEXSPI_IpCommandSequenceError – IP command sequencen error detected
kStatus_FLEXSPI_IpCommandGrantTimeout – IP command grant timeout detected

status_t FLEXSPI_TransferBlocking(FLEXSPI_Type *base, flexspi_transfer_t *xfer)

Execute command to transfer a buffer data bytes using a blocking method.

Parameters:

base – FLEXSPI peripheral base address
xfer – pointer to the transfer structure.

Return values:

kStatus_Success – command transfer success without error
kStatus_FLEXSPI_SequenceExecutionTimeout – sequence execution timeout
kStatus_FLEXSPI_IpCommandSequenceError – IP command sequence error detected
kStatus_FLEXSPI_IpCommandGrantTimeout – IP command grant timeout detected

void FLEXSPI_TransferCreateHandle(FLEXSPI_Type *base, flexspi_handle_t *handle, flexspi_transfer_callback_t callback, void *userData)

Initializes the FLEXSPI handle which is used in transactional functions.

Parameters:

base – FLEXSPI peripheral base address.
handle – pointer to flexspi_handle_t structure to store the transfer state.
callback – pointer to user callback function.
userData – user parameter passed to the callback function.

status_t FLEXSPI_TransferNonBlocking(FLEXSPI_Type *base, flexspi_handle_t *handle, flexspi_transfer_t *xfer)

Performs a interrupt non-blocking transfer on the FLEXSPI bus.

Note

Calling the API returns immediately after transfer initiates. The user needs to call FLEXSPI_GetTransferCount to poll the transfer status to check whether the transfer is finished. If the return status is not kStatus_FLEXSPI_Busy, the transfer is finished. For FLEXSPI_Read, the dataSize should be multiple of rx watermark level, or FLEXSPI could not read data properly.

Parameters:

base – FLEXSPI peripheral base address.
handle – pointer to flexspi_handle_t structure which stores the transfer state.
xfer – pointer to flexspi_transfer_t structure.

Return values:

kStatus_Success – Successfully start the data transmission.
kStatus_FLEXSPI_Busy – Previous transmission still not finished.

status_t FLEXSPI_TransferGetCount(FLEXSPI_Type *base, flexspi_handle_t *handle, size_t *count)

Gets the master transfer status during a interrupt non-blocking transfer.

Parameters:

base – FLEXSPI peripheral base address.
handle – pointer to flexspi_handle_t structure which stores the transfer state.
count – Number of bytes transferred so far by the non-blocking transaction.

Return values:

kStatus_InvalidArgument – count is Invalid.
kStatus_Success – Successfully return the count.

void FLEXSPI_TransferAbort(FLEXSPI_Type *base, flexspi_handle_t *handle)

Aborts an interrupt non-blocking transfer early.

Note

This API can be called at any time when an interrupt non-blocking transfer initiates to abort the transfer early.

Parameters:

base – FLEXSPI peripheral base address.
handle – pointer to flexspi_handle_t structure which stores the transfer state

void FLEXSPI_TransferHandleIRQ(FLEXSPI_Type *base, flexspi_handle_t *handle)

Master interrupt handler.

Parameters:

base – FLEXSPI peripheral base address.
handle – pointer to flexspi_handle_t structure.

FSL_FLEXSPI_DRIVER_VERSION: FLEXSPI driver version.

Status structure of FLEXSPI.

Values:

enumerator kStatus_FLEXSPI_Busy: FLEXSPI is busy

enumerator kStatus_FLEXSPI_SequenceExecutionTimeout: Sequence execution timeout error occurred during FLEXSPI transfer.

enumerator kStatus_FLEXSPI_IpCommandSequenceError: IP command Sequence execution timeout error occurred during FLEXSPI transfer.

enumerator kStatus_FLEXSPI_IpCommandGrantTimeout: IP command grant timeout error occurred during FLEXSPI transfer.

CMD definition of FLEXSPI, use to form LUT instruction, _flexspi_command.

Values:

enumerator kFLEXSPI_Command_STOP: Stop execution, deassert CS.

enumerator kFLEXSPI_Command_SDR: Transmit Command code to Flash, using SDR mode.

enumerator kFLEXSPI_Command_RADDR_SDR: Transmit Row Address to Flash, using SDR mode.

enumerator kFLEXSPI_Command_CADDR_SDR: Transmit Column Address to Flash, using SDR mode.

enumerator kFLEXSPI_Command_MODE1_SDR: Transmit 1-bit Mode bits to Flash, using SDR mode.

enumerator kFLEXSPI_Command_MODE2_SDR: Transmit 2-bit Mode bits to Flash, using SDR mode.

enumerator kFLEXSPI_Command_MODE4_SDR: Transmit 4-bit Mode bits to Flash, using SDR mode.

enumerator kFLEXSPI_Command_MODE8_SDR: Transmit 8-bit Mode bits to Flash, using SDR mode.

enumerator kFLEXSPI_Command_WRITE_SDR: Transmit Programming Data to Flash, using SDR mode.

enumerator kFLEXSPI_Command_READ_SDR: Receive Read Data from Flash, using SDR mode.

enumerator kFLEXSPI_Command_LEARN_SDR: Receive Read Data or Preamble bit from Flash, SDR mode.

enumerator kFLEXSPI_Command_DATSZ_SDR: Transmit Read/Program Data size (byte) to Flash, SDR mode.

enumerator kFLEXSPI_Command_DUMMY_SDR: Leave data lines undriven by FlexSPI controller.

enumerator kFLEXSPI_Command_DUMMY_RWDS_SDR: Leave data lines undriven by FlexSPI controller, dummy cycles decided by RWDS.

enumerator kFLEXSPI_Command_DDR: Transmit Command code to Flash, using DDR mode.

enumerator kFLEXSPI_Command_RADDR_DDR: Transmit Row Address to Flash, using DDR mode.

enumerator kFLEXSPI_Command_CADDR_DDR: Transmit Column Address to Flash, using DDR mode.

enumerator kFLEXSPI_Command_MODE1_DDR: Transmit 1-bit Mode bits to Flash, using DDR mode.

enumerator kFLEXSPI_Command_MODE2_DDR: Transmit 2-bit Mode bits to Flash, using DDR mode.

enumerator kFLEXSPI_Command_MODE4_DDR: Transmit 4-bit Mode bits to Flash, using DDR mode.

enumerator kFLEXSPI_Command_MODE8_DDR: Transmit 8-bit Mode bits to Flash, using DDR mode.

enumerator kFLEXSPI_Command_WRITE_DDR: Transmit Programming Data to Flash, using DDR mode.

enumerator kFLEXSPI_Command_READ_DDR: Receive Read Data from Flash, using DDR mode.

enumerator kFLEXSPI_Command_LEARN_DDR: Receive Read Data or Preamble bit from Flash, DDR mode.

enumerator kFLEXSPI_Command_DATSZ_DDR: Transmit Read/Program Data size (byte) to Flash, DDR mode.

enumerator kFLEXSPI_Command_DUMMY_DDR: Leave data lines undriven by FlexSPI controller.

enumerator kFLEXSPI_Command_DUMMY_RWDS_DDR: Leave data lines undriven by FlexSPI controller, dummy cycles decided by RWDS.

enumerator kFLEXSPI_Command_JUMP_ON_CS: Stop execution, deassert CS and save operand[7:0] as the instruction start pointer for next sequence

enum _flexspi_pad

pad definition of FLEXSPI, use to form LUT instruction.

Values:

enumerator kFLEXSPI_1PAD: Transmit command/address and transmit/receive data only through DATA0/DATA1.

enumerator kFLEXSPI_2PAD: Transmit command/address and transmit/receive data only through DATA[1:0].

enumerator kFLEXSPI_4PAD: Transmit command/address and transmit/receive data only through DATA[3:0].

enumerator kFLEXSPI_8PAD: Transmit command/address and transmit/receive data only through DATA[7:0].

enum _flexspi_flags

FLEXSPI interrupt status flags.

Values:

enumerator kFLEXSPI_SequenceExecutionTimeoutFlag: Sequence execution timeout.

enumerator kFLEXSPI_AhbBusTimeoutFlag: AHB Bus timeout.

enumerator kFLEXSPI_SckStoppedBecauseTxEmptyFlag: SCK is stopped during command sequence because Async TX FIFO empty.

enumerator kFLEXSPI_SckStoppedBecauseRxFullFlag: SCK is stopped during command sequence because Async RX FIFO full.

enumerator kFLEXSPI_DataLearningFailedFlag: Data learning failed.

enumerator kFLEXSPI_IpTxFifoWatermarkEmptyFlag: IP TX FIFO WaterMark empty.

enumerator kFLEXSPI_IpRxFifoWatermarkAvailableFlag: IP RX FIFO WaterMark available.

enumerator kFLEXSPI_AhbCommandSequenceErrorFlag: AHB triggered Command Sequences Error.

enumerator kFLEXSPI_IpCommandSequenceErrorFlag: IP triggered Command Sequences Error.

enumerator kFLEXSPI_AhbCommandGrantTimeoutFlag: AHB triggered Command Sequences Grant Timeout.

enumerator kFLEXSPI_IpCommandGrantTimeoutFlag: IP triggered Command Sequences Grant Timeout.

enumerator kFLEXSPI_IpCommandExecutionDoneFlag: IP triggered Command Sequences Execution finished.

enumerator kFLEXSPI_AllInterruptFlags: All flags.

enum _flexspi_read_sample_clock

FLEXSPI sample clock source selection for Flash Reading.

Values:

enumerator kFLEXSPI_ReadSampleClkLoopbackInternally: Dummy Read strobe generated by FlexSPI Controller and loopback internally.

enumerator kFLEXSPI_ReadSampleClkLoopbackFromDqsPad: Dummy Read strobe generated by FlexSPI Controller and loopback from DQS pad.

enumerator kFLEXSPI_ReadSampleClkLoopbackFromSckPad: SCK output clock and loopback from SCK pad.

enumerator kFLEXSPI_ReadSampleClkExternalInputFromDqsPad: Flash provided Read strobe and input from DQS pad.

enum _flexspi_cs_interval_cycle_unit

FLEXSPI interval unit for flash device select.

Values:

enumerator kFLEXSPI_CsIntervalUnit1SckCycle: Chip selection interval: CSINTERVAL * 1 serial clock cycle.

enumerator kFLEXSPI_CsIntervalUnit256SckCycle: Chip selection interval: CSINTERVAL * 256 serial clock cycle.

enum _flexspi_ahb_write_wait_unit

FLEXSPI AHB wait interval unit for writing.

Values:

enumerator kFLEXSPI_AhbWriteWaitUnit2AhbCycle: AWRWAIT unit is 2 ahb clock cycle.

enumerator kFLEXSPI_AhbWriteWaitUnit8AhbCycle: AWRWAIT unit is 8 ahb clock cycle.

enumerator kFLEXSPI_AhbWriteWaitUnit32AhbCycle: AWRWAIT unit is 32 ahb clock cycle.

enumerator kFLEXSPI_AhbWriteWaitUnit128AhbCycle: AWRWAIT unit is 128 ahb clock cycle.

enumerator kFLEXSPI_AhbWriteWaitUnit512AhbCycle: AWRWAIT unit is 512 ahb clock cycle.

enumerator kFLEXSPI_AhbWriteWaitUnit2048AhbCycle: AWRWAIT unit is 2048 ahb clock cycle.

enumerator kFLEXSPI_AhbWriteWaitUnit8192AhbCycle: AWRWAIT unit is 8192 ahb clock cycle.

enumerator kFLEXSPI_AhbWriteWaitUnit32768AhbCycle: AWRWAIT unit is 32768 ahb clock cycle.

enum _flexspi_ip_error_code

Error Code when IP command Error detected.

Values:

enumerator kFLEXSPI_IpCmdErrorNoError: No error.

enumerator kFLEXSPI_IpCmdErrorJumpOnCsInIpCmd: IP command with JMP_ON_CS instruction used.

enumerator kFLEXSPI_IpCmdErrorUnknownOpCode: Unknown instruction opcode in the sequence.

enumerator kFLEXSPI_IpCmdErrorSdrDummyInDdrSequence: Instruction DUMMY_SDR/DUMMY_RWDS_SDR used in DDR sequence.

enumerator kFLEXSPI_IpCmdErrorDdrDummyInSdrSequence: Instruction DUMMY_DDR/DUMMY_RWDS_DDR used in SDR sequence.

enumerator kFLEXSPI_IpCmdErrorInvalidAddress: Flash access start address exceed the whole flash address range (A1/A2/B1/B2).

enumerator kFLEXSPI_IpCmdErrorSequenceExecutionTimeout: Sequence execution timeout.

enumerator kFLEXSPI_IpCmdErrorFlashBoundaryAcrosss: Flash boundary crossed.

enum _flexspi_ahb_error_code

Error Code when AHB command Error detected.

Values:

enumerator kFLEXSPI_AhbCmdErrorNoError: No error.

enumerator kFLEXSPI_AhbCmdErrorJumpOnCsInWriteCmd: AHB Write command with JMP_ON_CS instruction used in the sequence.

enumerator kFLEXSPI_AhbCmdErrorUnknownOpCode: Unknown instruction opcode in the sequence.

enumerator kFLEXSPI_AhbCmdErrorSdrDummyInDdrSequence: Instruction DUMMY_SDR/DUMMY_RWDS_SDR used in DDR sequence.

enumerator kFLEXSPI_AhbCmdErrorDdrDummyInSdrSequence: Instruction DUMMY_DDR/DUMMY_RWDS_DDR used in SDR sequence.

enumerator kFLEXSPI_AhbCmdSequenceExecutionTimeout: Sequence execution timeout.

enum _flexspi_port

FLEXSPI operation port select.

Values:

enumerator kFLEXSPI_PortA1: Access flash on A1 port.

enumerator kFLEXSPI_PortA2: Access flash on A2 port.

enumerator kFLEXSPI_PortB1: Access flash on B1 port.

enumerator kFLEXSPI_PortB2: Access flash on B2 port.

enumerator kFLEXSPI_PortCount

enum _flexspi_arb_command_source

Trigger source of current command sequence granted by arbitrator.

Values:

enumerator kFLEXSPI_AhbReadCommand

enumerator kFLEXSPI_AhbWriteCommand

enumerator kFLEXSPI_IpCommand

enumerator kFLEXSPI_SuspendedCommand

enum _flexspi_command_type

Command type.

Values:

enumerator kFLEXSPI_Command: FlexSPI operation: Only command, both TX and Rx buffer are ignored.

enumerator kFLEXSPI_Config: FlexSPI operation: Configure device mode, the TX fifo size is fixed in LUT.

enumerator kFLEXSPI_Read

enumerator kFLEXSPI_Write

typedef enum _flexspi_pad flexspi_pad_t: pad definition of FLEXSPI, use to form LUT instruction.

typedef enum _flexspi_flags flexspi_flags_t: FLEXSPI interrupt status flags.

typedef enum _flexspi_read_sample_clock flexspi_read_sample_clock_t: FLEXSPI sample clock source selection for Flash Reading.

typedef enum _flexspi_cs_interval_cycle_unit flexspi_cs_interval_cycle_unit_t: FLEXSPI interval unit for flash device select.

typedef enum _flexspi_ahb_write_wait_unit flexspi_ahb_write_wait_unit_t: FLEXSPI AHB wait interval unit for writing.

typedef enum _flexspi_ip_error_code flexspi_ip_error_code_t: Error Code when IP command Error detected.

typedef enum _flexspi_ahb_error_code flexspi_ahb_error_code_t: Error Code when AHB command Error detected.

typedef enum _flexspi_port flexspi_port_t: FLEXSPI operation port select.

typedef enum _flexspi_arb_command_source flexspi_arb_command_source_t: Trigger source of current command sequence granted by arbitrator.

typedef enum _flexspi_command_type flexspi_command_type_t: Command type.

typedef struct _flexspi_ahbBuffer_config flexspi_ahbBuffer_config_t

typedef struct _flexspi_config flexspi_config_t: FLEXSPI configuration structure.

typedef struct _flexspi_device_config flexspi_device_config_t: External device configuration items.

typedef struct _flexspi_transfer flexspi_transfer_t: Transfer structure for FLEXSPI.

typedef struct _flexspi_handle flexspi_handle_t

typedef void (*flexspi_transfer_callback_t)(FLEXSPI_Type *base, flexspi_handle_t *handle, status_t status, void *userData): FLEXSPI transfer callback function.

FSL_FEATURE_FLEXSPI_AHB_BUFFER_COUNT

FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1): Formula to form FLEXSPI instructions in LUT table.

struct _flexspi_ahbBuffer_config

#include <fsl_flexspi.h>

Public Members

uint8_t priority: This priority for AHB Master Read which this AHB RX Buffer is assigned.

uint8_t masterIndex: AHB Master ID the AHB RX Buffer is assigned.

uint16_t bufferSize: AHB buffer size in byte.

bool enablePrefetch: AHB Read Prefetch Enable for current AHB RX Buffer corresponding Master, allows prefetch disable/enable separately for each master.

struct _flexspi_config

#include <fsl_flexspi.h>

FLEXSPI configuration structure.

Public Members

flexspi_read_sample_clock_t rxSampleClock: Sample Clock source selection for Flash Reading.

bool enableSckFreeRunning: Enable/disable SCK output free-running.

bool enableCombination: Enable/disable combining PORT A and B Data Pins (SIOA[3:0] and SIOB[3:0]) to support Flash Octal mode.

bool enableDoze: Enable/disable doze mode support.

bool enableHalfSpeedAccess: Enable/disable divide by 2 of the clock for half speed commands.

bool enableSckBDiffOpt: Enable/disable SCKB pad use as SCKA differential clock output, when enable, Port B flash access is not available.

bool enableSameConfigForAll: Enable/disable same configuration for all connected devices when enabled, same configuration in FLASHA1CRx is applied to all.

uint16_t seqTimeoutCycle: Timeout wait cycle for command sequence execution, timeout after ahbGrantTimeoutCyle*1024 serial root clock cycles.

uint8_t ipGrantTimeoutCycle: Timeout wait cycle for IP command grant, timeout after ipGrantTimeoutCycle*1024 AHB clock cycles.

uint8_t txWatermark: FLEXSPI IP transmit watermark value.

uint8_t rxWatermark: FLEXSPI receive watermark value.

struct _flexspi_device_config

#include <fsl_flexspi.h>

External device configuration items.

Public Members

uint32_t flexspiRootClk: FLEXSPI serial root clock.

bool isSck2Enabled: FLEXSPI use SCK2.

uint32_t flashSize: Flash size in KByte.

flexspi_cs_interval_cycle_unit_t CSIntervalUnit: CS interval unit, 1 or 256 cycle.

uint16_t CSInterval: CS line assert interval, multiply CS interval unit to get the CS line assert interval cycles.

uint8_t CSHoldTime: CS line hold time.

uint8_t CSSetupTime: CS line setup time.

uint8_t dataValidTime: Data valid time for external device.

uint8_t columnspace: Column space size.

bool enableWordAddress: If enable word address.

uint8_t AWRSeqIndex: Sequence ID for AHB write command.

uint8_t AWRSeqNumber: Sequence number for AHB write command.

uint8_t ARDSeqIndex: Sequence ID for AHB read command.

uint8_t ARDSeqNumber: Sequence number for AHB read command.

flexspi_ahb_write_wait_unit_t AHBWriteWaitUnit: AHB write wait unit.

uint16_t AHBWriteWaitInterval: AHB write wait interval, multiply AHB write interval unit to get the AHB write wait cycles.

bool enableWriteMask: Enable/Disable FLEXSPI drive DQS pin as write mask when writing to external device.

struct _flexspi_transfer

#include <fsl_flexspi.h>

Transfer structure for FLEXSPI.

Public Members

uint32_t deviceAddress: Operation device address.

flexspi_port_t port: Operation port.

flexspi_command_type_t cmdType: Execution command type.

uint8_t seqIndex: Sequence ID for command.

uint8_t SeqNumber: Sequence number for command.

uint32_t *data: Data buffer.

size_t dataSize: Data size in bytes.

struct _flexspi_handle

#include <fsl_flexspi.h>

Transfer handle structure for FLEXSPI.

Public Members

uint32_t state: Internal state for FLEXSPI transfer

uint8_t *data: Data buffer.

size_t dataSize: Remaining Data size in bytes.

size_t transferTotalSize: Total Data size in bytes.

flexspi_transfer_callback_t completionCallback: Callback for users while transfer finish or error occurred

void *userData: FLEXSPI callback function parameter.

struct ahbConfig

Public Members

uint8_t ahbGrantTimeoutCycle: Timeout wait cycle for AHB command grant, timeout after ahbGrantTimeoutCyle*1024 AHB clock cycles.

uint16_t ahbBusTimeoutCycle: Timeout wait cycle for AHB read/write access, timeout after ahbBusTimeoutCycle*1024 AHB clock cycles.

uint8_t resumeWaitCycle: Wait cycle for idle state before suspended command sequence resume, timeout after ahbBusTimeoutCycle AHB clock cycles.

flexspi_ahbBuffer_config_t buffer[FSL_FEATURE_FLEXSPI_AHB_BUFFER_COUNTn(0)]: AHB buffer size.

bool enableClearAHBBufferOpt: Enable/disable automatically clean AHB RX Buffer and TX Buffer when FLEXSPI returns STOP mode ACK.

bool enableReadAddressOpt: Enable/disable remove AHB read burst start address alignment limitation. when enable, there is no AHB read burst start address alignment limitation.

bool enableAHBPrefetch: Enable/disable AHB read prefetch feature, when enabled, FLEXSPI will fetch more data than current AHB burst.

bool enableAHBBufferable: Enable/disable AHB bufferable write access support, when enabled, FLEXSPI return before waiting for command execution finished.

bool enableAHBCachable: Enable AHB bus cachable read access support.

FLEXSPI eDMA Driver

void FLEXSPI_TransferCreateHandleEDMA(FLEXSPI_Type *base, flexspi_edma_handle_t *handle, flexspi_edma_callback_t callback, void *userData, edma_handle_t *txDmaHandle, edma_handle_t *rxDmaHandle)

Initializes the FLEXSPI handle for transfer which is used in transactional functions and set the callback.

Parameters:

base – FLEXSPI peripheral base address
handle – Pointer to flexspi_edma_handle_t structure
callback – FLEXSPI callback, NULL means no callback.
userData – User callback function data.
txDmaHandle – User requested DMA handle for TX DMA transfer.
rxDmaHandle – User requested DMA handle for RX DMA transfer.

void FLEXSPI_TransferUpdateSizeEDMA(FLEXSPI_Type *base, flexspi_edma_handle_t *handle, flexspi_edma_transfer_nsize_t nsize)

Update FLEXSPI EDMA transfer source data transfer size(SSIZE) and destination data transfer size(DSIZE).

I3C: I3C Driver

FSL_I3C_DRIVER_VERSION: I3C driver version.

I3C status return codes.

Values:

enumerator kStatus_I3C_Busy: The master is already performing a transfer.

enumerator kStatus_I3C_Idle: The slave driver is idle.

enumerator kStatus_I3C_Nak: The slave device sent a NAK in response to an address.

enumerator kStatus_I3C_WriteAbort: The slave device sent a NAK in response to a write.

enumerator kStatus_I3C_Term: The master terminates slave read.

enumerator kStatus_I3C_HdrParityError: Parity error from DDR read.

enumerator kStatus_I3C_CrcError: CRC error from DDR read.

enumerator kStatus_I3C_ReadFifoError: Read from M/SRDATAB register when FIFO empty.

enumerator kStatus_I3C_WriteFifoError: Write to M/SWDATAB register when FIFO full.

enumerator kStatus_I3C_MsgError: Message SDR/DDR mismatch or read/write message in wrong state

enumerator kStatus_I3C_InvalidReq: Invalid use of request.

enumerator kStatus_I3C_Timeout: The module has stalled too long in a frame.

enumerator kStatus_I3C_SlaveCountExceed: The I3C slave count has exceed the definition in I3C_MAX_DEVCNT.

enumerator kStatus_I3C_IBIWon: The I3C slave event IBI or MR or HJ won the arbitration on a header address.

enumerator kStatus_I3C_OverrunError: Slave internal from-bus buffer/FIFO overrun.

enumerator kStatus_I3C_UnderrunError: Slave internal to-bus buffer/FIFO underrun

enumerator kStatus_I3C_UnderrunNak: Slave internal from-bus buffer/FIFO underrun and NACK error

enumerator kStatus_I3C_InvalidStart: Slave invalid start flag

enumerator kStatus_I3C_SdrParityError: SDR parity error

enumerator kStatus_I3C_S0S1Error: S0 or S1 error

enum _i3c_hdr_mode

I3C HDR modes.

Values:

enumerator kI3C_HDRModeNone

enumerator kI3C_HDRModeDDR

enumerator kI3C_HDRModeTSP

enumerator kI3C_HDRModeTSL

typedef enum _i3c_hdr_mode i3c_hdr_mode_t: I3C HDR modes.

typedef struct _i3c_device_info i3c_device_info_t: I3C device information.

I3C_RETRY_TIMES: Timeout times for waiting flag.

I3C_MAX_DEVCNT

I3C_IBI_BUFF_SIZE

struct _i3c_device_info

#include <fsl_i3c.h>

I3C device information.

Public Members

uint8_t dynamicAddr: Device dynamic address.

uint8_t staticAddr: Static address.

uint8_t dcr: Device characteristics register information.

uint8_t bcr: Bus characteristics register information.

uint16_t vendorID: Device vendor ID(manufacture ID).

uint32_t partNumber: Device part number info

uint16_t maxReadLength: Maximum read length.

uint16_t maxWriteLength: Maximum write length.

uint8_t hdrMode: Support hdr mode, could be OR logic in i3c_hdr_mode.

I3C Common Driver

typedef struct _i3c_config i3c_config_t

Structure with settings to initialize the I3C module, could both initialize master and slave functionality.

This structure holds configuration settings for the I3C peripheral. To initialize this structure to reasonable defaults, call the I3C_GetDefaultConfig() function and pass a pointer to your configuration structure instance.

The configuration structure can be made constant so it resides in flash.

uint32_t I3C_GetInstance(I3C_Type *base)

Get which instance current I3C is used.

Parameters:

base – The I3C peripheral base address.

void I3C_GetDefaultConfig(i3c_config_t *config)

Provides a default configuration for the I3C peripheral, the configuration covers both master functionality and slave functionality.

This function provides the following default configuration for I3C:

config->disableTimeout config->hKeep config->enableOpenDrainStop config->enableOpenDrainHigh config->baudRate_Hzconfig->baudRate_Hzconfig->baudRate_Hzconfig->masterDynamicAddress config->slowClock_Hz config->enableSlave config->vendorID config->enableRandomPart config->partNumber config->dcr config->bcr config->hdrMode config->nakAllRequest config->ignoreS0S1Error config->offline config->matchSlaveStartStop 

notranslate">

config->enableMaster                 = kI3C_MasterCapable; = false; = kI3C_MasterHighKeeperNone; = true; = true; class="o">.i2cBaud          = 400000U; class="o">.i3cPushPullBaud  = 12500000U; class="o">.i3cOpenDrainBaud = 2500000U; = 0x0AU; = 1000000U; = true; = 0x11BU; = false; = 0; = 0; = 0; = (uint8_t)kI3C_HDRModeDDR; = false; = false; = false; = false;
After calling this function, you can override any settings in order to customize the configuration, prior to initializing the common I3C driver with I3C_Init().

Parameters:

config – [out] User provided configuration structure for default values. Refer to i3c_config_t. 







void I3C_Init(I3C_Type *base, const i3c_config_t *config, uint32_t sourceClock_Hz)

Initializes the I3C peripheral. This function enables the peripheral clock and initializes the I3C peripheral as described by the user provided configuration. This will initialize both the master peripheral and slave peripheral so that I3C module could work as pure master, pure slave or secondary master, etc. A software reset is performed prior to configuration. 

Parameters:

base – The I3C peripheral base address. 
config – User provided peripheral configuration. Use I3C_GetDefaultConfig() to get a set of defaults that you can override. 
sourceClock_Hz – Frequency in Hertz of the I3C functional clock. Used to calculate the baud rate divisors, filter widths, and timeout periods. 







struct _i3c_config


#include <fsl_i3c.h>
Structure with settings to initialize the I3C module, could both initialize master and slave functionality. 
This structure holds configuration settings for the I3C peripheral. To initialize this structure to reasonable defaults, call the I3C_GetDefaultConfig() function and pass a pointer to your configuration structure instance.
The configuration structure can be made constant so it resides in flash. 

Public Members


i3c_master_enable_t enableMaster

Enable master mode. 




bool disableTimeout

Whether to disable timeout to prevent the ERRWARN. 




i3c_master_hkeep_t hKeep

High keeper mode setting. 




bool enableOpenDrainStop

Whether to emit open-drain speed STOP. 




bool enableOpenDrainHigh

Enable Open-Drain High to be 1 PPBAUD count for i3c messages, or 1 ODBAUD. 




i3c_baudrate_hz_t baudRate_Hz

Desired baud rate settings. 




i3c_start_scl_delay_t startSclDelay

I3C SCL delay after START. 




i3c_start_scl_delay_t restartSclDelay

I3C SCL delay after Repeated START. 




uint8_t masterDynamicAddress

Main master dynamic address configuration. 




uint32_t maxWriteLength

Maximum write length. 




uint32_t maxReadLength

Maximum read length. 




bool enableSlave

Whether to enable slave. 




uint8_t staticAddr

Static address. 




uint16_t vendorID

Device vendor ID(manufacture ID). 




uint32_t partNumber

Device part number info 




uint8_t dcr

Device characteristics register information. 




uint8_t bcr

Bus characteristics register information. 




uint8_t hdrMode

Support hdr mode, could be OR logic in enumeration:i3c_hdr_mode_t. 




bool nakAllRequest

Whether to reply NAK to all requests except broadcast CCC. 




bool ignoreS0S1Error

Whether to ignore S0/S1 error in SDR mode. 




bool offline

Whether to wait 60 us of bus quiet or HDR request to ensure slave track SDR mode safely. 




bool matchSlaveStartStop

Whether to assert start/stop status only the time slave is addressed.

Act2	Act1	Comment	31-28	27-12
0	0	No op	Don’t care
0	1	Set data length	0000	Data Length
1	0	Transfer data	Data address
1	1	Link descriptor	Descriptor address

Act2	Act1	Comment	Operation
0	0	No op	Don’t care
0	1	Reserved	Read this line and go to next one
1	0	Transfer data	Transfer data with address and length set in this descriptor line
1	1	Link descriptor	Link to another descriptor

MIMX8UD5

ACMP: Analog Comparator Driver

Battery-Backed Non-Secure Module

CACHE: CACHE Memory Controller

CASPER: The Cryptographic Accelerator and Signal Processing Engine with RAM sharing

casper_driver

casper_driver_pkha

CMC: Core Mode Controller Driver

MIPI CSI2 RX: MIPI CSI2 RX Driver

DAC12: 12-bit Digital-to-Analog Converter Driver

EDMA: Enhanced Direct Memory Access (eDMA) Controller Driver

ENET: Ethernet MAC Driver

EWM: External Watchdog Monitor Driver

FGPIO Driver

FlexCAN: Flex Controller Area Network Driver

FlexCAN Driver

FlexCAN eDMA Driver

FlexIO: FlexIO Driver

FlexIO Driver

FlexIO eDMA SPI Driver

FlexIO eDMA UART Driver

FlexIO I2C Master Driver

FlexIO I2S Driver

FlexIO SPI Driver

FlexIO UART Driver

FLEXSPI: Flexible Serial Peripheral Interface Driver

FLEXSPI eDMA Driver

I3C: I3C Driver

I3C Common Driver

I3C Master Driver

I3C Slave Driver

ISI: Image Sensing Interface

Common Driver

LCDIF: LCD interface

Lin_lpuart_driver

LPADC: 12-bit SAR Analog-to-Digital Converter Driver

LPI2C: Low Power Inter-Integrated Circuit Driver

LPI2C Master Driver

LPI2C Master DMA Driver

LPI2C Slave Driver

LPIT: Low-Power Interrupt Timer

LPSPI: Low Power Serial Peripheral Interface

LPSPI Peripheral driver

LPSPI eDMA Driver

LPTMR: Low-Power Timer

LPUART: Low Power Universal Asynchronous Receiver/Transmitter Driver

LPUART Driver

LPUART eDMA Driver

MCM: Miscellaneous Control Module

MIPI DSI Driver

MIPI_DSI: MIPI DSI Host Controller

MRT: Multi-Rate Timer

MU: Messaging Unit

PDM: Microphone Interface

PDM Driver

PDM EDMA Driver

POWERQUAD: PowerQuad hardware accelerator

PXP: Pixel Pipeline

RGPIO: Rapid General-Purpose Input/Output Driver

RGPIO Driver

RTD_CMC: Real Time Domain Core Mode Controller Driver

SAI: Serial Audio Interface

SAI Driver

SAI EDMA Driver

SEMA42: Hardware Semaphores Driver

SFA: Signal Frequency Analyser

SIM: System Integration Module Driver

SPDIF: Sony/Philips Digital Interface

SPDIF eDMA Driver

SYSPM: System Performance Monitor

TPM: Timer PWM Module

TRDC: Trusted Resource Domain Controller

TRGMUX: Trigger Mux Driver

TSTMR: Timestamp Timer Driver

USDHC: Ultra Secured Digital Host Controller Driver

WDOG32: 32-bit Watchdog Timer

WUU: Wakeup Unit driver

XRDC: Extended Resource Domain Controller