ISSDK  1.8
IoT Sensing Software Development Kit
pin_mux.c
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1 /*
2  * Copyright (c) 2015, Freescale Semiconductor, Inc.
3  * Copyright 2016-2017 NXP
4  * All rights reserved.
5  *
6  * SPDX-License-Identifier: BSD-3-Clause
7  */
8 
9 /*
10  * TEXT BELOW IS USED AS SETTING FOR THE PINS TOOL *****************************
11 PinsProfile:
12 - !!product 'Pins v2.0'
13 - !!processor 'MK22FN512xxx12'
14 - !!package 'MK22FN512VLH12'
15 - !!mcu_data 'ksdk2_0'
16 - !!processor_version '1.0.15'
17  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE PINS TOOL ***
18  */
19 
20 #include "fsl_common.h"
21 #include "fsl_port.h"
22 #include "pin_mux.h"
23 
24 
25 #define PIN0_IDX 0u /*!< Pin number for pin 0 in a port */
26 
27 #define PIN1_IDX 1u /*!< Pin number for pin 1 in a port */
28 
29 #define SOPT5_UART1TXSRC_UART_TX 0x00u /*!< UART 1 transmit data source select: UART1_TX pin */
30 
31 /*
32  * TEXT BELOW IS USED AS SETTING FOR THE PINS TOOL *****************************
33 BOARD_InitPins:
34 - options: {coreID: singlecore, enableClock: 'true'}
35 - pin_list:
36  - {pin_num: '1', peripheral: UART1, signal: TX, pin_signal: ADC1_SE4a/PTE0/CLKOUT32K/SPI1_PCS1/UART1_TX/I2C1_SDA/RTC_CLKOUT}
37  - {pin_num: '2', peripheral: UART1, signal: RX, pin_signal: ADC1_SE5a/PTE1/LLWU_P0/SPI1_SOUT/UART1_RX/I2C1_SCL/SPI1_SIN}
38  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE PINS TOOL ***
39  */
40 
41 /*FUNCTION**********************************************************************
42  *
43  * Function Name : BOARD_InitPins
44  * Description : Configures pin routing and optionally pin electrical features.
45  *
46  *END**************************************************************************/
47 void BOARD_InitPins(void) {
48  CLOCK_EnableClock(kCLOCK_PortE); /* Port E Clock Gate Control: Clock enabled */
49 
50  PORT_SetPinMux(PORTE, PIN0_IDX, kPORT_MuxAlt3); /* PORTE0 (pin 1) is configured as UART1_TX */
51  PORT_SetPinMux(PORTE, PIN1_IDX, kPORT_MuxAlt3); /* PORTE1 (pin 2) is configured as UART1_RX */
52  SIM->SOPT5 = ((SIM->SOPT5 &
53  (~(SIM_SOPT5_UART1TXSRC_MASK))) /* Mask bits to zero which are setting */
54  | SIM_SOPT5_UART1TXSRC(SOPT5_UART1TXSRC_UART_TX) /* UART 1 transmit data source select: UART1_TX pin */
55  );
56 }
57 
58 
59 
60 #define PIN2_IDX 2u /*!< Pin number for pin 2 in a port */
61 
62 #define PIN3_IDX 3u /*!< Pin number for pin 3 in a port */
63 
64 /*
65  * TEXT BELOW IS USED AS SETTING FOR THE PINS TOOL *****************************
66 I2C0_InitPins:
67 - options: {coreID: singlecore, enableClock: 'true'}
68 - pin_list:
69  - {pin_num: '37', peripheral: I2C0, signal: SCL, pin_signal: ADC0_SE12/PTB2/I2C0_SCL/UART0_RTS_b/FTM0_FLT3, slew_rate: fast, open_drain: enable, pull_select: up,
70  pull_enable: enable}
71  - {pin_num: '38', peripheral: I2C0, signal: SDA, pin_signal: ADC0_SE13/PTB3/I2C0_SDA/UART0_CTS_b/FTM0_FLT0, slew_rate: fast, open_drain: enable, pull_select: up,
72  pull_enable: enable}
73  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE PINS TOOL ***
74  */
75 
76 /*FUNCTION**********************************************************************
77  *
78  * Function Name : I2C0_InitPins
79  * Description : Configures pin routing and optionally pin electrical features.
80  *
81  *END**************************************************************************/
82 void I2C0_InitPins(void) {
83  CLOCK_EnableClock(kCLOCK_PortB); /* Port B Clock Gate Control: Clock enabled */
84 
85  const port_pin_config_t portb2_pin37_config = {
86  kPORT_PullUp, /* Internal pull-up resistor is enabled */
87  kPORT_FastSlewRate, /* Fast slew rate is configured */
88  kPORT_PassiveFilterDisable, /* Passive filter is disabled */
89  kPORT_OpenDrainEnable, /* Open drain is enabled */
90  kPORT_LowDriveStrength, /* Low drive strength is configured */
91  kPORT_MuxAlt2, /* Pin is configured as I2C0_SCL */
92  kPORT_UnlockRegister /* Pin Control Register fields [15:0] are not locked */
93  };
94  PORT_SetPinConfig(PORTB, PIN2_IDX, &portb2_pin37_config); /* PORTB2 (pin 37) is configured as I2C0_SCL */
95  const port_pin_config_t portb3_pin38_config = {
96  kPORT_PullUp, /* Internal pull-up resistor is enabled */
97  kPORT_FastSlewRate, /* Fast slew rate is configured */
98  kPORT_PassiveFilterDisable, /* Passive filter is disabled */
99  kPORT_OpenDrainEnable, /* Open drain is enabled */
100  kPORT_LowDriveStrength, /* Low drive strength is configured */
101  kPORT_MuxAlt2, /* Pin is configured as I2C0_SDA */
102  kPORT_UnlockRegister /* Pin Control Register fields [15:0] are not locked */
103  };
104  PORT_SetPinConfig(PORTB, PIN3_IDX, &portb3_pin38_config); /* PORTB3 (pin 38) is configured as I2C0_SDA */
105 }
106 
107 
108 
109 #define PIN2_IDX 2u /*!< Pin number for pin 2 in a port */
110 
111 #define PIN3_IDX 3u /*!< Pin number for pin 3 in a port */
112 /*
113  * TEXT BELOW IS USED AS SETTING FOR THE PINS TOOL *****************************
114 I2C0_DeinitPins:
115 - options: {coreID: singlecore, enableClock: 'false'}
116 - pin_list:
117  - {pin_num: '37', peripheral: ADC0, signal: 'SE, 12', pin_signal: ADC0_SE12/PTB2/I2C0_SCL/UART0_RTS_b/FTM0_FLT3}
118  - {pin_num: '38', peripheral: ADC0, signal: 'SE, 13', pin_signal: ADC0_SE13/PTB3/I2C0_SDA/UART0_CTS_b/FTM0_FLT0}
119  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE PINS TOOL ***
120  */
121 
122 /*FUNCTION**********************************************************************
123  *
124  * Function Name : I2C0_DeinitPins
125  * Description : Configures pin routing and optionally pin electrical features.
126  *
127  *END**************************************************************************/
128 void I2C0_DeinitPins(void) {
129  PORT_SetPinMux(PORTB, PIN2_IDX, kPORT_PinDisabledOrAnalog); /* PORTB2 (pin 37) is configured as ADC0_SE12 */
130  PORT_SetPinMux(PORTB, PIN3_IDX, kPORT_PinDisabledOrAnalog); /* PORTB3 (pin 38) is configured as ADC0_SE13 */
131 }
132 
133 
134 
135 #define PIN10_IDX 10u /*!< Pin number for pin 10 in a port */
136 
137 #define PIN11_IDX 11u /*!< Pin number for pin 11 in a port */
138 
139 /*
140  * TEXT BELOW IS USED AS SETTING FOR THE PINS TOOL *****************************
141 I2C1_InitPins:
142 - options: {coreID: singlecore, enableClock: 'true'}
143 - pin_list:
144  - {pin_num: '55', peripheral: I2C1, signal: SCL, pin_signal: ADC1_SE6b/PTC10/I2C1_SCL/FTM3_CH6/I2S0_RX_FS/FB_AD5, slew_rate: fast, open_drain: enable, pull_select: up,
145  pull_enable: enable}
146  - {pin_num: '56', peripheral: I2C1, signal: SDA, pin_signal: ADC1_SE7b/PTC11/LLWU_P11/I2C1_SDA/FTM3_CH7/FB_RW_b, slew_rate: fast, open_drain: enable, pull_select: up,
147  pull_enable: enable}
148  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE PINS TOOL ***
149  */
150 
151 /*FUNCTION**********************************************************************
152  *
153  * Function Name : I2C1_InitPins
154  * Description : Configures pin routing and optionally pin electrical features.
155  *
156  *END**************************************************************************/
157 void I2C1_InitPins(void) {
158  CLOCK_EnableClock(kCLOCK_PortC); /* Port C Clock Gate Control: Clock enabled */
159 
160  const port_pin_config_t portc10_pin55_config = {
161  kPORT_PullUp, /* Internal pull-up resistor is enabled */
162  kPORT_FastSlewRate, /* Fast slew rate is configured */
163  kPORT_PassiveFilterDisable, /* Passive filter is disabled */
164  kPORT_OpenDrainEnable, /* Open drain is enabled */
165  kPORT_LowDriveStrength, /* Low drive strength is configured */
166  kPORT_MuxAlt2, /* Pin is configured as I2C1_SCL */
167  kPORT_UnlockRegister /* Pin Control Register fields [15:0] are not locked */
168  };
169  PORT_SetPinConfig(PORTC, PIN10_IDX, &portc10_pin55_config); /* PORTC10 (pin 55) is configured as I2C1_SCL */
170  const port_pin_config_t portc11_pin56_config = {
171  kPORT_PullUp, /* Internal pull-up resistor is enabled */
172  kPORT_FastSlewRate, /* Fast slew rate is configured */
173  kPORT_PassiveFilterDisable, /* Passive filter is disabled */
174  kPORT_OpenDrainEnable, /* Open drain is enabled */
175  kPORT_LowDriveStrength, /* Low drive strength is configured */
176  kPORT_MuxAlt2, /* Pin is configured as I2C1_SDA */
177  kPORT_UnlockRegister /* Pin Control Register fields [15:0] are not locked */
178  };
179  PORT_SetPinConfig(PORTC, PIN11_IDX, &portc11_pin56_config); /* PORTC11 (pin 56) is configured as I2C1_SDA */
180 }
181 
182 
183 
184 #define PIN10_IDX 10u /*!< Pin number for pin 10 in a port */
185 
186 #define PIN11_IDX 11u /*!< Pin number for pin 11 in a port */
187 /*
188  * TEXT BELOW IS USED AS SETTING FOR THE PINS TOOL *****************************
189 I2C1_DeinitPins:
190 - options: {coreID: singlecore, enableClock: 'true'}
191 - pin_list:
192  - {pin_num: '55', peripheral: ADC1, signal: 'SE, 6b', pin_signal: ADC1_SE6b/PTC10/I2C1_SCL/FTM3_CH6/I2S0_RX_FS/FB_AD5}
193  - {pin_num: '56', peripheral: ADC1, signal: 'SE, 7b', pin_signal: ADC1_SE7b/PTC11/LLWU_P11/I2C1_SDA/FTM3_CH7/FB_RW_b}
194  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE PINS TOOL ***
195  */
196 
197 /*FUNCTION**********************************************************************
198  *
199  * Function Name : I2C1_DeinitPins
200  * Description : Configures pin routing and optionally pin electrical features.
201  *
202  *END**************************************************************************/
203 void I2C1_DeinitPins(void) {
204  CLOCK_EnableClock(kCLOCK_PortC); /* Port C Clock Gate Control: Clock enabled */
205 
206  PORT_SetPinMux(PORTC, PIN10_IDX, kPORT_PinDisabledOrAnalog); /* PORTC10 (pin 55) is configured as ADC1_SE6b */
207  PORT_SetPinMux(PORTC, PIN11_IDX, kPORT_PinDisabledOrAnalog); /* PORTC11 (pin 56) is configured as ADC1_SE7b */
208 }
209 
210 
211 
212 #define PIN5_IDX 5u /*!< Pin number for pin 5 in a port */
213 
214 #define PIN6_IDX 6u /*!< Pin number for pin 6 in a port */
215 
216 #define PIN7_IDX 7u /*!< Pin number for pin 7 in a port */
217 
218 /*
219  * TEXT BELOW IS USED AS SETTING FOR THE PINS TOOL *****************************
220 DSPI0_InitPins:
221 - options: {coreID: singlecore, enableClock: 'true'}
222 - pin_list:
223  - {pin_num: '50', peripheral: SPI0, signal: SCK, pin_signal: PTC5/LLWU_P9/SPI0_SCK/LPTMR0_ALT2/I2S0_RXD0/FB_AD10/CMP0_OUT/FTM0_CH2}
224  - {pin_num: '51', peripheral: SPI0, signal: SOUT, pin_signal: CMP0_IN0/PTC6/LLWU_P10/SPI0_SOUT/PDB0_EXTRG/I2S0_RX_BCLK/FB_AD9/I2S0_MCLK}
225  - {pin_num: '52', peripheral: SPI0, signal: SIN, pin_signal: CMP0_IN1/PTC7/SPI0_SIN/USB_SOF_OUT/I2S0_RX_FS/FB_AD8}
226  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE PINS TOOL ***
227  */
228 
229 /*FUNCTION**********************************************************************
230  *
231  * Function Name : DSPI0_InitPins
232  * Description : Configures pin routing and optionally pin electrical features.
233  *
234  *END**************************************************************************/
235 void DSPI0_InitPins(void) {
236  CLOCK_EnableClock(kCLOCK_PortC); /* Port C Clock Gate Control: Clock enabled */
237 
238  PORT_SetPinMux(PORTC, PIN5_IDX, kPORT_MuxAlt2); /* PORTC5 (pin 50) is configured as SPI0_SCK */
239  PORT_SetPinMux(PORTC, PIN6_IDX, kPORT_MuxAlt2); /* PORTC6 (pin 51) is configured as SPI0_SOUT */
240  PORT_SetPinMux(PORTC, PIN7_IDX, kPORT_MuxAlt2); /* PORTC7 (pin 52) is configured as SPI0_SIN */
241 }
242 
243 
244 
245 #define PIN5_IDX 5u /*!< Pin number for pin 5 in a port */
246 
247 #define PIN6_IDX 6u /*!< Pin number for pin 6 in a port */
248 
249 #define PIN7_IDX 7u /*!< Pin number for pin 7 in a port */
250 /*
251  * TEXT BELOW IS USED AS SETTING FOR THE PINS TOOL *****************************
252 DSPI0_DeinitPins:
253 - options: {coreID: singlecore, enableClock: 'false'}
254 - pin_list:
255  - {pin_num: '50', peripheral: n/a, signal: disabled, pin_signal: PTC5/LLWU_P9/SPI0_SCK/LPTMR0_ALT2/I2S0_RXD0/FB_AD10/CMP0_OUT/FTM0_CH2}
256  - {pin_num: '51', peripheral: CMP0, signal: 'IN, 0', pin_signal: CMP0_IN0/PTC6/LLWU_P10/SPI0_SOUT/PDB0_EXTRG/I2S0_RX_BCLK/FB_AD9/I2S0_MCLK}
257  - {pin_num: '52', peripheral: CMP0, signal: 'IN, 1', pin_signal: CMP0_IN1/PTC7/SPI0_SIN/USB_SOF_OUT/I2S0_RX_FS/FB_AD8}
258  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE PINS TOOL ***
259  */
260 
261 /*FUNCTION**********************************************************************
262  *
263  * Function Name : DSPI0_DeinitPins
264  * Description : Configures pin routing and optionally pin electrical features.
265  *
266  *END**************************************************************************/
267 void DSPI0_DeinitPins(void) {
268  PORT_SetPinMux(PORTC, PIN5_IDX, kPORT_PinDisabledOrAnalog); /* PORTC5 (pin 50) is disabled */
269  PORT_SetPinMux(PORTC, PIN6_IDX, kPORT_PinDisabledOrAnalog); /* PORTC6 (pin 51) is configured as CMP0_IN0 */
270  PORT_SetPinMux(PORTC, PIN7_IDX, kPORT_PinDisabledOrAnalog); /* PORTC7 (pin 52) is configured as CMP0_IN1 */
271 }
272 
273 
274 
275 #define PIN5_IDX 5u /*!< Pin number for pin 5 in a port */
276 
277 #define PIN6_IDX 6u /*!< Pin number for pin 6 in a port */
278 
279 #define PIN7_IDX 7u /*!< Pin number for pin 7 in a port */
280 /*
281  * TEXT BELOW IS USED AS SETTING FOR THE PINS TOOL *****************************
282 DSPI1_InitPins:
283 - options: {coreID: singlecore, enableClock: 'true'}
284 - pin_list:
285  - {pin_num: '62', peripheral: SPI1, signal: SCK, pin_signal: ADC0_SE6b/PTD5/SPI0_PCS2/UART0_CTS_b/FTM0_CH5/FB_AD1/EWM_OUT_b/SPI1_SCK}
286  - {pin_num: '63', peripheral: SPI1, signal: SOUT, pin_signal: ADC0_SE7b/PTD6/LLWU_P15/SPI0_PCS3/UART0_RX/FTM0_CH6/FB_AD0/FTM0_FLT0/SPI1_SOUT}
287  - {pin_num: '64', peripheral: SPI1, signal: SIN, pin_signal: PTD7/UART0_TX/FTM0_CH7/FTM0_FLT1/SPI1_SIN}
288  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE PINS TOOL ***
289  */
290 
291 /*FUNCTION**********************************************************************
292  *
293  * Function Name : DSPI1_InitPins
294  * Description : Configures pin routing and optionally pin electrical features.
295  *
296  *END**************************************************************************/
297 void DSPI1_InitPins(void) {
298  CLOCK_EnableClock(kCLOCK_PortD); /* Port D Clock Gate Control: Clock enabled */
299 
300  PORT_SetPinMux(PORTD, PIN5_IDX, kPORT_MuxAlt7); /* PORTD5 (pin 62) is configured as SPI1_SCK */
301  PORT_SetPinMux(PORTD, PIN6_IDX, kPORT_MuxAlt7); /* PORTD6 (pin 63) is configured as SPI1_SOUT */
302  PORT_SetPinMux(PORTD, PIN7_IDX, kPORT_MuxAlt7); /* PORTD7 (pin 64) is configured as SPI1_SIN */
303 }
304 
305 
306 
307 #define PIN5_IDX 5u /*!< Pin number for pin 5 in a port */
308 
309 #define PIN6_IDX 6u /*!< Pin number for pin 6 in a port */
310 
311 #define PIN7_IDX 7u /*!< Pin number for pin 7 in a port */
312 /*
313  * TEXT BELOW IS USED AS SETTING FOR THE PINS TOOL *****************************
314 DSPI1_DeinitPins:
315 - options: {coreID: singlecore, enableClock: 'false'}
316 - pin_list:
317  - {pin_num: '62', peripheral: ADC0, signal: 'SE, 6b', pin_signal: ADC0_SE6b/PTD5/SPI0_PCS2/UART0_CTS_b/FTM0_CH5/FB_AD1/EWM_OUT_b/SPI1_SCK}
318  - {pin_num: '63', peripheral: ADC0, signal: 'SE, 7b', pin_signal: ADC0_SE7b/PTD6/LLWU_P15/SPI0_PCS3/UART0_RX/FTM0_CH6/FB_AD0/FTM0_FLT0/SPI1_SOUT}
319  - {pin_num: '64', peripheral: n/a, signal: disabled, pin_signal: PTD7/UART0_TX/FTM0_CH7/FTM0_FLT1/SPI1_SIN}
320  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE PINS TOOL ***
321  */
322 
323 /*FUNCTION**********************************************************************
324  *
325  * Function Name : DSPI1_DeinitPins
326  * Description : Configures pin routing and optionally pin electrical features.
327  *
328  *END**************************************************************************/
329 void DSPI1_DeinitPins(void) {
330  PORT_SetPinMux(PORTD, PIN5_IDX, kPORT_PinDisabledOrAnalog); /* PORTD5 (pin 62) is configured as ADC0_SE6b */
331  PORT_SetPinMux(PORTD, PIN6_IDX, kPORT_PinDisabledOrAnalog); /* PORTD6 (pin 63) is configured as ADC0_SE7b */
332  PORT_SetPinMux(PORTD, PIN7_IDX, kPORT_PinDisabledOrAnalog); /* PORTD7 (pin 64) is disabled */
333 }
334 
335 
336 
337 #define PIN1_IDX 1u /*!< Pin number for pin 1 in a port */
338 
339 #define PIN2_IDX 2u /*!< Pin number for pin 2 in a port */
340 
341 #define SOPT5_UART0TXSRC_UART_TX 0x00u /*!< UART 0 transmit data source select: UART0_TX pin */
342 
343 /*
344  * TEXT BELOW IS USED AS SETTING FOR THE PINS TOOL *****************************
345 UART0_InitPins:
346 - options: {coreID: singlecore, enableClock: 'true'}
347 - pin_list:
348  - {pin_num: '23', peripheral: UART0, signal: RX, pin_signal: PTA1/UART0_RX/FTM0_CH6/JTAG_TDI/EZP_DI}
349  - {pin_num: '24', peripheral: UART0, signal: TX, pin_signal: PTA2/UART0_TX/FTM0_CH7/JTAG_TDO/TRACE_SWO/EZP_DO}
350  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE PINS TOOL ***
351  */
352 
353 /*FUNCTION**********************************************************************
354  *
355  * Function Name : UART0_InitPins
356  * Description : Configures pin routing and optionally pin electrical features.
357  *
358  *END**************************************************************************/
359 void UART0_InitPins(void) {
360  CLOCK_EnableClock(kCLOCK_PortA); /* Port A Clock Gate Control: Clock enabled */
361 
362  PORT_SetPinMux(PORTA, PIN1_IDX, kPORT_MuxAlt2); /* PORTA1 (pin 23) is configured as UART0_RX */
363  PORT_SetPinMux(PORTA, PIN2_IDX, kPORT_MuxAlt2); /* PORTA2 (pin 24) is configured as UART0_TX */
364  SIM->SOPT5 = ((SIM->SOPT5 &
365  (~(SIM_SOPT5_UART0TXSRC_MASK))) /* Mask bits to zero which are setting */
366  | SIM_SOPT5_UART0TXSRC(SOPT5_UART0TXSRC_UART_TX) /* UART 0 transmit data source select: UART0_TX pin */
367  );
368 }
369 
370 
371 
372 #define PIN1_IDX 1u /*!< Pin number for pin 1 in a port */
373 
374 #define PIN2_IDX 2u /*!< Pin number for pin 2 in a port */
375 /*
376  * TEXT BELOW IS USED AS SETTING FOR THE PINS TOOL *****************************
377 UART0_DeinitPins:
378 - options: {coreID: singlecore, enableClock: 'false'}
379 - pin_list:
380  - {pin_num: '23', peripheral: n/a, signal: disabled, pin_signal: PTA1/UART0_RX/FTM0_CH6/JTAG_TDI/EZP_DI}
381  - {pin_num: '24', peripheral: n/a, signal: disabled, pin_signal: PTA2/UART0_TX/FTM0_CH7/JTAG_TDO/TRACE_SWO/EZP_DO}
382  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE PINS TOOL ***
383  */
384 
385 /*FUNCTION**********************************************************************
386  *
387  * Function Name : UART0_DeinitPins
388  * Description : Configures pin routing and optionally pin electrical features.
389  *
390  *END**************************************************************************/
391 void UART0_DeinitPins(void) {
392  PORT_SetPinMux(PORTA, PIN1_IDX, kPORT_PinDisabledOrAnalog); /* PORTA1 (pin 23) is disabled */
393  PORT_SetPinMux(PORTA, PIN2_IDX, kPORT_PinDisabledOrAnalog); /* PORTA2 (pin 24) is disabled */
394 }
395 
396 
397 
398 #define PIN0_IDX 0u /*!< Pin number for pin 0 in a port */
399 
400 #define PIN1_IDX 1u /*!< Pin number for pin 1 in a port */
401 
402 #define SOPT5_UART1TXSRC_UART_TX 0x00u /*!< UART 1 transmit data source select: UART1_TX pin */
403 /*
404  * TEXT BELOW IS USED AS SETTING FOR THE PINS TOOL *****************************
405 UART1_InitPins:
406 - options: {coreID: singlecore, enableClock: 'true'}
407 - pin_list:
408  - {pin_num: '1', peripheral: UART1, signal: TX, pin_signal: ADC1_SE4a/PTE0/CLKOUT32K/SPI1_PCS1/UART1_TX/I2C1_SDA/RTC_CLKOUT}
409  - {pin_num: '2', peripheral: UART1, signal: RX, pin_signal: ADC1_SE5a/PTE1/LLWU_P0/SPI1_SOUT/UART1_RX/I2C1_SCL/SPI1_SIN}
410  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE PINS TOOL ***
411  */
412 
413 /*FUNCTION**********************************************************************
414  *
415  * Function Name : UART1_InitPins
416  * Description : Configures pin routing and optionally pin electrical features.
417  *
418  *END**************************************************************************/
419 void UART1_InitPins(void) {
420  CLOCK_EnableClock(kCLOCK_PortE); /* Port E Clock Gate Control: Clock enabled */
421 
422  PORT_SetPinMux(PORTE, PIN0_IDX, kPORT_MuxAlt3); /* PORTE0 (pin 1) is configured as UART1_TX */
423  PORT_SetPinMux(PORTE, PIN1_IDX, kPORT_MuxAlt3); /* PORTE1 (pin 2) is configured as UART1_RX */
424  SIM->SOPT5 = ((SIM->SOPT5 &
425  (~(SIM_SOPT5_UART1TXSRC_MASK))) /* Mask bits to zero which are setting */
426  | SIM_SOPT5_UART1TXSRC(SOPT5_UART1TXSRC_UART_TX) /* UART 1 transmit data source select: UART1_TX pin */
427  );
428 }
429 
430 
431 
432 #define PIN0_IDX 0u /*!< Pin number for pin 0 in a port */
433 
434 #define PIN1_IDX 1u /*!< Pin number for pin 1 in a port */
435 /*
436  * TEXT BELOW IS USED AS SETTING FOR THE PINS TOOL *****************************
437 UART1_DeinitPins:
438 - options: {coreID: singlecore, enableClock: 'false'}
439 - pin_list:
440  - {pin_num: '1', peripheral: ADC1, signal: 'SE, 4a', pin_signal: ADC1_SE4a/PTE0/CLKOUT32K/SPI1_PCS1/UART1_TX/I2C1_SDA/RTC_CLKOUT}
441  - {pin_num: '2', peripheral: ADC1, signal: 'SE, 5a', pin_signal: ADC1_SE5a/PTE1/LLWU_P0/SPI1_SOUT/UART1_RX/I2C1_SCL/SPI1_SIN}
442  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE PINS TOOL ***
443  */
444 
445 /*FUNCTION**********************************************************************
446  *
447  * Function Name : UART1_DeinitPins
448  * Description : Configures pin routing and optionally pin electrical features.
449  *
450  *END**************************************************************************/
451 void UART1_DeinitPins(void) {
452  PORT_SetPinMux(PORTE, PIN0_IDX, kPORT_PinDisabledOrAnalog); /* PORTE0 (pin 1) is configured as ADC1_SE4a */
453  PORT_SetPinMux(PORTE, PIN1_IDX, kPORT_PinDisabledOrAnalog); /* PORTE1 (pin 2) is configured as ADC1_SE5a */
454 }
455 
456 
457 
458 #define PIN2_IDX 2u /*!< Pin number for pin 2 in a port */
459 
460 #define PIN3_IDX 3u /*!< Pin number for pin 3 in a port */
461 /*
462  * TEXT BELOW IS USED AS SETTING FOR THE PINS TOOL *****************************
463 UART2_InitPins:
464 - options: {coreID: singlecore, enableClock: 'true'}
465 - pin_list:
466  - {pin_num: '59', peripheral: UART2, signal: RX, pin_signal: PTD2/LLWU_P13/SPI0_SOUT/UART2_RX/FTM3_CH2/FB_AD4/LPUART0_RX/I2C0_SCL}
467  - {pin_num: '60', peripheral: UART2, signal: TX, pin_signal: PTD3/SPI0_SIN/UART2_TX/FTM3_CH3/FB_AD3/LPUART0_TX/I2C0_SDA}
468  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE PINS TOOL ***
469  */
470 
471 /*FUNCTION**********************************************************************
472  *
473  * Function Name : UART2_InitPins
474  * Description : Configures pin routing and optionally pin electrical features.
475  *
476  *END**************************************************************************/
477 void UART2_InitPins(void) {
478  CLOCK_EnableClock(kCLOCK_PortD); /* Port D Clock Gate Control: Clock enabled */
479 
480  PORT_SetPinMux(PORTD, PIN2_IDX, kPORT_MuxAlt3); /* PORTD2 (pin 59) is configured as UART2_RX */
481  PORT_SetPinMux(PORTD, PIN3_IDX, kPORT_MuxAlt3); /* PORTD3 (pin 60) is configured as UART2_TX */
482 }
483 
484 
485 
486 #define PIN2_IDX 2u /*!< Pin number for pin 2 in a port */
487 
488 #define PIN3_IDX 3u /*!< Pin number for pin 3 in a port */
489 /*
490  * TEXT BELOW IS USED AS SETTING FOR THE PINS TOOL *****************************
491 UART2_DeinitPins:
492 - options: {coreID: singlecore, enableClock: 'false'}
493 - pin_list:
494  - {pin_num: '59', peripheral: n/a, signal: disabled, pin_signal: PTD2/LLWU_P13/SPI0_SOUT/UART2_RX/FTM3_CH2/FB_AD4/LPUART0_RX/I2C0_SCL}
495  - {pin_num: '60', peripheral: n/a, signal: disabled, pin_signal: PTD3/SPI0_SIN/UART2_TX/FTM3_CH3/FB_AD3/LPUART0_TX/I2C0_SDA}
496  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR THE PINS TOOL ***
497  */
498 
499 /*FUNCTION**********************************************************************
500  *
501  * Function Name : UART2_DeinitPins
502  * Description : Configures pin routing and optionally pin electrical features.
503  *
504  *END**************************************************************************/
505 void UART2_DeinitPins(void) {
506  PORT_SetPinMux(PORTD, PIN2_IDX, kPORT_PinDisabledOrAnalog); /* PORTD2 (pin 59) is disabled */
507  PORT_SetPinMux(PORTD, PIN3_IDX, kPORT_PinDisabledOrAnalog); /* PORTD3 (pin 60) is disabled */
508 }
509 
510 /*******************************************************************************
511  * EOF
512  ******************************************************************************/
#define PIN0_IDX
Definition: pin_mux.c:432
#define PIN3_IDX
Definition: pin_mux.c:488
void DSPI0_DeinitPins(void)
Configures pin routing and optionally pin electrical features.
Definition: pin_mux.c:623
#define PIN6_IDX
Definition: pin_mux.c:309
#define PIN1_IDX
Definition: pin_mux.c:434
void I2C0_InitPins(void)
Configures pin routing and optionally pin electrical features.
Definition: pin_mux.c:366
void DSPI0_InitPins(void)
Configures pin routing and optionally pin electrical features.
Definition: pin_mux.c:591
#define SOPT5_UART0TXSRC_UART_TX
Definition: pin_mux.c:341
void DSPI1_DeinitPins(void)
Configures pin routing and optionally pin electrical features.
Definition: pin_mux.c:686
void I2C1_DeinitPins(void)
Configures pin routing and optionally pin electrical features.
Definition: pin_mux.c:487
#define PIN10_IDX
Definition: pin_mux.c:184
#define PIN5_IDX
Definition: pin_mux.c:307
void UART2_DeinitPins(void)
Configures pin routing and optionally pin electrical features.
Definition: pin_mux.c:229
void UART2_InitPins(void)
Configures pin routing and optionally pin electrical features.
Definition: pin_mux.c:201
void DSPI1_InitPins(void)
Configures pin routing and optionally pin electrical features.
Definition: pin_mux.c:654
#define PIN11_IDX
Definition: pin_mux.c:186
void I2C0_DeinitPins(void)
Configures pin routing and optionally pin electrical features.
Definition: pin_mux.c:412
#define PIN2_IDX
Definition: pin_mux.c:486
void I2C1_InitPins(void)
Configures pin routing and optionally pin electrical features.
Definition: pin_mux.c:441
#define SOPT5_UART1TXSRC_UART_TX
Definition: pin_mux.c:402
void UART1_DeinitPins(void)
Configures pin routing and optionally pin electrical features.
Definition: pin_mux.c:174
void UART0_InitPins(void)
Configures pin routing and optionally pin electrical features.
Definition: pin_mux.c:81
void BOARD_InitPins(void)
Configures pin routing and optionally pin electrical features.
Definition: pin_mux.c:47
void UART0_DeinitPins(void)
Configures pin routing and optionally pin electrical features.
Definition: pin_mux.c:113
#define PIN7_IDX
Definition: pin_mux.c:311
void UART1_InitPins(void)
Configures pin routing and optionally pin electrical features.
Definition: pin_mux.c:142