ISSDK  1.8
IoT Sensing Software Development Kit
pin_mux.c
Go to the documentation of this file.
1 /*
2  * Copyright 2019 NXP
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 
8 /***********************************************************************************************************************
9  * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
10  * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
11  **********************************************************************************************************************/
12 
13 /* clang-format off */
14 /*
15  * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
16 !!GlobalInfo
17 product: Pins v6.0
18 processor: MIMXRT595S
19 package_id: MIMXRT595SFFOB
20 mcu_data: ksdk2_0
21 processor_version: 0.0.0
22 board: MIMXRT595-EVK
23  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
24  */
25 /* clang-format on */
26 
27 #include "fsl_common.h"
28 #include "board.h"
29 #include "fsl_iopctl.h"
30 #include "pin_mux.h"
31 
32 /* FUNCTION ************************************************************************************************************
33  *
34  * Function Name : BOARD_InitBootPins
35  * Description : Calls initialization functions.
36  *
37  * END ****************************************************************************************************************/
38 void BOARD_InitBootPins(void)
39 {
40  BOARD_InitPins();
41 }
42 
43 /* clang-format off */
44 /*
45  * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
46 BOARD_InitPins:
47 - options: {callFromInitBoot: 'true', coreID: cm33, enableClock: 'true'}
48 - pin_list:
49  - {pin_num: H16, peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_2/FC0_RXD_SDA_MOSI_DATA/CTIMER0_MAT2/SEC_PIO0_2, ibena: enabled}
50  - {pin_num: G16, peripheral: FLEXCOMM0, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_1/FC0_TXD_SCL_MISO_WS/CTIMER0_MAT1/SEC_PIO0_1}
51  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
52  */
53 /* clang-format on */
54 
55 /* FUNCTION ************************************************************************************************************
56  *
57  * Function Name : BOARD_InitPins
58  * Description : Configures pin routing and optionally pin electrical features.
59  *
60  * END ****************************************************************************************************************/
61 /* Function assigned for the Cortex-M33 */
62 void BOARD_InitPins(void)
63 {
64 
65  const uint32_t port0_pin1_config = (/* Pin is configured as FC0_TXD_SCL_MISO_WS */
66  IOPCTL_PIO_FUNC1 |
67  /* Disable pull-up / pull-down function */
68  IOPCTL_PIO_PUPD_DI |
69  /* Enable pull-down function */
70  IOPCTL_PIO_PULLDOWN_EN |
71  /* Disable input buffer function */
72  IOPCTL_PIO_INBUF_DI |
73  /* Normal mode */
74  IOPCTL_PIO_SLEW_RATE_NORMAL |
75  /* Normal drive */
76  IOPCTL_PIO_FULLDRIVE_DI |
77  /* Analog mux is disabled */
78  IOPCTL_PIO_ANAMUX_DI |
79  /* Pseudo Output Drain is disabled */
80  IOPCTL_PIO_PSEDRAIN_DI |
81  /* Input function is not inverted */
82  IOPCTL_PIO_INV_DI);
83  /* PORT0 PIN1 (coords: G2) is configured as FC0_TXD_SCL_MISO_WS */
84  IOPCTL_PinMuxSet(IOPCTL, 0U, 1U, port0_pin1_config);
85 
86  const uint32_t port0_pin2_config = (/* Pin is configured as FC0_RXD_SDA_MOSI_DATA */
87  IOPCTL_PIO_FUNC1 |
88  /* Disable pull-up / pull-down function */
89  IOPCTL_PIO_PUPD_DI |
90  /* Enable pull-down function */
91  IOPCTL_PIO_PULLDOWN_EN |
92  /* Enables input buffer function */
93  IOPCTL_PIO_INBUF_EN |
94  /* Normal mode */
95  IOPCTL_PIO_SLEW_RATE_NORMAL |
96  /* Normal drive */
97  IOPCTL_PIO_FULLDRIVE_DI |
98  /* Analog mux is disabled */
99  IOPCTL_PIO_ANAMUX_DI |
100  /* Pseudo Output Drain is disabled */
101  IOPCTL_PIO_PSEDRAIN_DI |
102  /* Input function is not inverted */
103  IOPCTL_PIO_INV_DI);
104  /* PORT0 PIN2 (coords: G4) is configured as FC0_RXD_SDA_MOSI_DATA */
105  IOPCTL_PinMuxSet(IOPCTL, 0U, 2U, port0_pin2_config);
106 }
107 
108 /* clang-format off */
109 /*
110  * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
111 I2C11_InitPins:
112 - options: {callFromInitBoot: 'false', coreID: cm33, enableClock: 'true'}
113 - pin_list:
114  - {pin_num: P10, peripheral: FLEXCOMM11, signal: TXD_SCL_MISO, pin_signal: PIO4_21/LCD_BUSY/SD1_D7/FC11_TXD_SCL_MISO/FLEXIO_D1, identifier: '', ibena: enabled,
115  drive: full, odena: enabled}
116  - {pin_num: U10, peripheral: FLEXCOMM11, signal: RXD_SDA_MOSI, pin_signal: PIO4_22/LCD_RS/SD1_CARD_DET_N/FC11_RXD_SDA_MOSI/FLEXIO_D2, identifier: '', ibena: enabled,
117  drive: full, odena: enabled}
118  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
119  */
120 /* clang-format on */
121 
122 /* FUNCTION ************************************************************************************************************
123  *
124  * Function Name : I2C11_InitPins
125  * Description : Configures pin routing and optionally pin electrical features.
126  *
127  * END ****************************************************************************************************************/
128 /* Function assigned for the Cortex-M33 */
129 void I2C11_InitPins(void)
130 {
131 
132  const uint32_t port4_pin21_config = (/* Pin is configured as FC11_TXD_SCL_MISO */
133  IOPCTL_PIO_FUNC6 |
134  /* Disable pull-up / pull-down function */
135  IOPCTL_PIO_PUPD_DI |
136  /* Enable pull-down function */
137  IOPCTL_PIO_PULLDOWN_EN |
138  /* Enables input buffer function */
139  IOPCTL_PIO_INBUF_EN |
140  /* Normal mode */
141  IOPCTL_PIO_SLEW_RATE_NORMAL |
142  /* Full drive enable */
143  IOPCTL_PIO_FULLDRIVE_EN |
144  /* Analog mux is disabled */
145  IOPCTL_PIO_ANAMUX_DI |
146  /* Pseudo Output Drain is enabled */
147  IOPCTL_PIO_PSEDRAIN_EN |
148  /* Input function is not inverted */
149  IOPCTL_PIO_INV_DI);
150  /* PORT4 PIN21 (coords: P10) is configured as FC11_TXD_SCL_MISO */
151  IOPCTL_PinMuxSet(IOPCTL, 4U, 21U, port4_pin21_config);
152 
153  const uint32_t port4_pin22_config = (/* Pin is configured as FC11_RXD_SDA_MOSI */
154  IOPCTL_PIO_FUNC6 |
155  /* Disable pull-up / pull-down function */
156  IOPCTL_PIO_PUPD_DI |
157  /* Enable pull-down function */
158  IOPCTL_PIO_PULLDOWN_EN |
159  /* Enables input buffer function */
160  IOPCTL_PIO_INBUF_EN |
161  /* Normal mode */
162  IOPCTL_PIO_SLEW_RATE_NORMAL |
163  /* Full drive enable */
164  IOPCTL_PIO_FULLDRIVE_EN |
165  /* Analog mux is disabled */
166  IOPCTL_PIO_ANAMUX_DI |
167  /* Pseudo Output Drain is enabled */
168  IOPCTL_PIO_PSEDRAIN_EN |
169  /* Input function is not inverted */
170  IOPCTL_PIO_INV_DI);
171  /* PORT4 PIN22 (coords: U10) is configured as FC11_RXD_SDA_MOSI */
172  IOPCTL_PinMuxSet(IOPCTL, 4U, 22U, port4_pin22_config);
173 
174  /* Use 48 MHz clock for the FLEXCOMM11 */
175  CLOCK_AttachClk(kFRO48M_to_FLEXCOMM11);
176 }
177 
178 /* clang-format off */
179 /*
180  * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
181 I2C11_DeinitPins:
182 - options: {callFromInitBoot: 'false', coreID: cm33, enableClock: 'true'}
183 - pin_list:
184  - {pin_num: P10, peripheral: GPIO, signal: 'PIO4, 21', pin_signal: PIO4_21/LCD_BUSY/SD1_D7/FC11_TXD_SCL_MISO/FLEXIO_D1, identifier: ''}
185  - {pin_num: U10, peripheral: GPIO, signal: 'PIO4, 22', pin_signal: PIO4_22/LCD_RS/SD1_CARD_DET_N/FC11_RXD_SDA_MOSI/FLEXIO_D2, identifier: ''}
186  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
187  */
188 /* clang-format on */
189 
190 /* FUNCTION ************************************************************************************************************
191  *
192  * Function Name : I2C11_DeinitPins
193  * Description : Configures pin routing and optionally pin electrical features.
194  *
195  * END ****************************************************************************************************************/
196 /* Function assigned for the Cortex-M33 */
197 void I2C11_DeinitPins(void)
198 {
199 
200  const uint32_t port4_pin21_config = (/* Pin is configured as PIO4_21 */
201  IOPCTL_PIO_FUNC0 |
202  /* Disable pull-up / pull-down function */
203  IOPCTL_PIO_PUPD_DI |
204  /* Enable pull-down function */
205  IOPCTL_PIO_PULLDOWN_EN |
206  /* Disable input buffer function */
207  IOPCTL_PIO_INBUF_DI |
208  /* Normal mode */
209  IOPCTL_PIO_SLEW_RATE_NORMAL |
210  /* Normal drive */
211  IOPCTL_PIO_FULLDRIVE_DI |
212  /* Analog mux is disabled */
213  IOPCTL_PIO_ANAMUX_DI |
214  /* Pseudo Output Drain is disabled */
215  IOPCTL_PIO_PSEDRAIN_DI |
216  /* Input function is not inverted */
217  IOPCTL_PIO_INV_DI);
218  /* PORT4 PIN21 (coords: P10) is configured as PIO4_21 */
219  IOPCTL_PinMuxSet(IOPCTL, 4U, 21U, port4_pin21_config);
220 
221  const uint32_t port4_pin22_config = (/* Pin is configured as PIO4_22 */
222  IOPCTL_PIO_FUNC0 |
223  /* Disable pull-up / pull-down function */
224  IOPCTL_PIO_PUPD_DI |
225  /* Enable pull-down function */
226  IOPCTL_PIO_PULLDOWN_EN |
227  /* Disable input buffer function */
228  IOPCTL_PIO_INBUF_DI |
229  /* Normal mode */
230  IOPCTL_PIO_SLEW_RATE_NORMAL |
231  /* Normal drive */
232  IOPCTL_PIO_FULLDRIVE_DI |
233  /* Analog mux is disabled */
234  IOPCTL_PIO_ANAMUX_DI |
235  /* Pseudo Output Drain is disabled */
236  IOPCTL_PIO_PSEDRAIN_DI |
237  /* Input function is not inverted */
238  IOPCTL_PIO_INV_DI);
239  /* PORT4 PIN22 (coords: U10) is configured as PIO4_22 */
240  IOPCTL_PinMuxSet(IOPCTL, 4U, 22U, port4_pin22_config);
241 }
242 
243 /* clang-format off */
244 /*
245  * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
246 SPI5_InitPins:
247 - options: {callFromInitBoot: 'false', coreID: cm33, enableClock: 'true'}
248 - pin_list:
249  - {pin_num: K2, peripheral: FLEXCOMM5, signal: SCK, pin_signal: PIO1_3/FC5_SCK/HS_SPI1_SCK, ibena: enabled}
250  - {pin_num: N4, peripheral: FLEXCOMM5, signal: CTS_SDA_SSEL0, pin_signal: PIO1_6/FC5_CTS_SDA_SSEL0/SCT0_GPI4/SCT0_OUT4/FC4_SSEL2/HS_SPI1_SSELN0, ibena: enabled}
251  - {pin_num: L2, peripheral: FLEXCOMM5, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO1_5/FC5_RXD_SDA_MOSI_DATA/HS_SPI1_MOSI, ibena: enabled}
252  - {pin_num: K1, peripheral: FLEXCOMM5, signal: TXD_SCL_MISO_WS, pin_signal: PIO1_4/FC5_TXD_SCL_MISO_WS/HS_SPI1_MISO, ibena: enabled}
253  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
254  */
255 /* clang-format on */
256 
257 /* FUNCTION ************************************************************************************************************
258  *
259  * Function Name : SPI5_InitPins
260  * Description : Configures pin routing and optionally pin electrical features.
261  *
262  * END ****************************************************************************************************************/
263 /* Function assigned for the Cortex-M33 */
264 void SPI5_InitPins(void)
265 {
266 
267  const uint32_t port1_pin3_config = (/* Pin is configured as FC5_SCK */
268  IOPCTL_PIO_FUNC1 |
269  /* Disable pull-up / pull-down function */
270  IOPCTL_PIO_PUPD_DI |
271  /* Enable pull-down function */
272  IOPCTL_PIO_PULLDOWN_EN |
273  /* Enables input buffer function */
274  IOPCTL_PIO_INBUF_EN |
275  /* Normal mode */
276  IOPCTL_PIO_SLEW_RATE_NORMAL |
277  /* Normal drive */
278  IOPCTL_PIO_FULLDRIVE_DI |
279  /* Analog mux is disabled */
280  IOPCTL_PIO_ANAMUX_DI |
281  /* Pseudo Output Drain is disabled */
282  IOPCTL_PIO_PSEDRAIN_DI |
283  /* Input function is not inverted */
284  IOPCTL_PIO_INV_DI);
285  /* PORT1 PIN3 (coords: K2) is configured as FC5_SCK */
286  IOPCTL_PinMuxSet(IOPCTL, 1U, 3U, port1_pin3_config);
287 
288  const uint32_t port1_pin4_config = (/* Pin is configured as FC5_TXD_SCL_MISO_WS */
289  IOPCTL_PIO_FUNC1 |
290  /* Disable pull-up / pull-down function */
291  IOPCTL_PIO_PUPD_DI |
292  /* Enable pull-down function */
293  IOPCTL_PIO_PULLDOWN_EN |
294  /* Enables input buffer function */
295  IOPCTL_PIO_INBUF_EN |
296  /* Normal mode */
297  IOPCTL_PIO_SLEW_RATE_NORMAL |
298  /* Normal drive */
299  IOPCTL_PIO_FULLDRIVE_DI |
300  /* Analog mux is disabled */
301  IOPCTL_PIO_ANAMUX_DI |
302  /* Pseudo Output Drain is disabled */
303  IOPCTL_PIO_PSEDRAIN_DI |
304  /* Input function is not inverted */
305  IOPCTL_PIO_INV_DI);
306  /* PORT1 PIN4 (coords: K1) is configured as FC5_TXD_SCL_MISO_WS */
307  IOPCTL_PinMuxSet(IOPCTL, 1U, 4U, port1_pin4_config);
308 
309  const uint32_t port1_pin5_config = (/* Pin is configured as FC5_RXD_SDA_MOSI_DATA */
310  IOPCTL_PIO_FUNC1 |
311  /* Disable pull-up / pull-down function */
312  IOPCTL_PIO_PUPD_DI |
313  /* Enable pull-down function */
314  IOPCTL_PIO_PULLDOWN_EN |
315  /* Enables input buffer function */
316  IOPCTL_PIO_INBUF_EN |
317  /* Normal mode */
318  IOPCTL_PIO_SLEW_RATE_NORMAL |
319  /* Normal drive */
320  IOPCTL_PIO_FULLDRIVE_DI |
321  /* Analog mux is disabled */
322  IOPCTL_PIO_ANAMUX_DI |
323  /* Pseudo Output Drain is disabled */
324  IOPCTL_PIO_PSEDRAIN_DI |
325  /* Input function is not inverted */
326  IOPCTL_PIO_INV_DI);
327  /* PORT1 PIN5 (coords: L2) is configured as FC5_RXD_SDA_MOSI_DATA */
328  IOPCTL_PinMuxSet(IOPCTL, 1U, 5U, port1_pin5_config);
329 
330  const uint32_t port1_pin6_config = (/* Pin is configured as FC5_CTS_SDA_SSEL0 */
331  IOPCTL_PIO_FUNC1 |
332  /* Disable pull-up / pull-down function */
333  IOPCTL_PIO_PUPD_DI |
334  /* Enable pull-down function */
335  IOPCTL_PIO_PULLDOWN_EN |
336  /* Enables input buffer function */
337  IOPCTL_PIO_INBUF_EN |
338  /* Normal mode */
339  IOPCTL_PIO_SLEW_RATE_NORMAL |
340  /* Normal drive */
341  IOPCTL_PIO_FULLDRIVE_DI |
342  /* Analog mux is disabled */
343  IOPCTL_PIO_ANAMUX_DI |
344  /* Pseudo Output Drain is disabled */
345  IOPCTL_PIO_PSEDRAIN_DI |
346  /* Input function is not inverted */
347  IOPCTL_PIO_INV_DI);
348  /* PORT1 PIN6 (coords: N4) is configured as FC5_CTS_SDA_SSEL0 */
349  IOPCTL_PinMuxSet(IOPCTL, 1U, 6U, port1_pin6_config);
350 
351  /* Use 48 MHz clock for the FLEXCOMM5 */
352  CLOCK_AttachClk(kFRO48M_to_FLEXCOMM5);
353 }
354 
355 /* clang-format off */
356 /*
357  * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
358 SPI5_DeinitPins:
359 - options: {callFromInitBoot: 'false', coreID: cm33, enableClock: 'true'}
360 - pin_list:
361  - {pin_num: K1, peripheral: GPIO, signal: 'PIO1, 4', pin_signal: PIO1_4/FC5_TXD_SCL_MISO_WS/HS_SPI1_MISO}
362  - {pin_num: L2, peripheral: GPIO, signal: 'PIO1, 5', pin_signal: PIO1_5/FC5_RXD_SDA_MOSI_DATA/HS_SPI1_MOSI}
363  - {pin_num: N4, peripheral: GPIO, signal: 'PIO1, 6', pin_signal: PIO1_6/FC5_CTS_SDA_SSEL0/SCT0_GPI4/SCT0_OUT4/FC4_SSEL2/HS_SPI1_SSELN0}
364  - {pin_num: K2, peripheral: GPIO, signal: 'PIO1, 3', pin_signal: PIO1_3/FC5_SCK/HS_SPI1_SCK}
365  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
366  */
367 /* clang-format on */
368 
369 /* FUNCTION ************************************************************************************************************
370  *
371  * Function Name : SPI5_DeinitPins
372  * Description : Configures pin routing and optionally pin electrical features.
373  *
374  * END ****************************************************************************************************************/
375 /* Function assigned for the Cortex-M33 */
376 void SPI5_DeinitPins(void)
377 {
378 
379  const uint32_t port1_pin3_config = (/* Pin is configured as PIO1_3 */
380  IOPCTL_PIO_FUNC0 |
381  /* Disable pull-up / pull-down function */
382  IOPCTL_PIO_PUPD_DI |
383  /* Enable pull-down function */
384  IOPCTL_PIO_PULLDOWN_EN |
385  /* Disable input buffer function */
386  IOPCTL_PIO_INBUF_DI |
387  /* Normal mode */
388  IOPCTL_PIO_SLEW_RATE_NORMAL |
389  /* Normal drive */
390  IOPCTL_PIO_FULLDRIVE_DI |
391  /* Analog mux is disabled */
392  IOPCTL_PIO_ANAMUX_DI |
393  /* Pseudo Output Drain is disabled */
394  IOPCTL_PIO_PSEDRAIN_DI |
395  /* Input function is not inverted */
396  IOPCTL_PIO_INV_DI);
397  /* PORT1 PIN3 (coords: K2) is configured as PIO1_3 */
398  IOPCTL_PinMuxSet(IOPCTL, 1U, 3U, port1_pin3_config);
399 
400  const uint32_t port1_pin4_config = (/* Pin is configured as PIO1_4 */
401  IOPCTL_PIO_FUNC0 |
402  /* Disable pull-up / pull-down function */
403  IOPCTL_PIO_PUPD_DI |
404  /* Enable pull-down function */
405  IOPCTL_PIO_PULLDOWN_EN |
406  /* Disable input buffer function */
407  IOPCTL_PIO_INBUF_DI |
408  /* Normal mode */
409  IOPCTL_PIO_SLEW_RATE_NORMAL |
410  /* Normal drive */
411  IOPCTL_PIO_FULLDRIVE_DI |
412  /* Analog mux is disabled */
413  IOPCTL_PIO_ANAMUX_DI |
414  /* Pseudo Output Drain is disabled */
415  IOPCTL_PIO_PSEDRAIN_DI |
416  /* Input function is not inverted */
417  IOPCTL_PIO_INV_DI);
418  /* PORT1 PIN4 (coords: K1) is configured as PIO1_4 */
419  IOPCTL_PinMuxSet(IOPCTL, 1U, 4U, port1_pin4_config);
420 
421  const uint32_t port1_pin5_config = (/* Pin is configured as PIO1_5 */
422  IOPCTL_PIO_FUNC0 |
423  /* Disable pull-up / pull-down function */
424  IOPCTL_PIO_PUPD_DI |
425  /* Enable pull-down function */
426  IOPCTL_PIO_PULLDOWN_EN |
427  /* Disable input buffer function */
428  IOPCTL_PIO_INBUF_DI |
429  /* Normal mode */
430  IOPCTL_PIO_SLEW_RATE_NORMAL |
431  /* Normal drive */
432  IOPCTL_PIO_FULLDRIVE_DI |
433  /* Analog mux is disabled */
434  IOPCTL_PIO_ANAMUX_DI |
435  /* Pseudo Output Drain is disabled */
436  IOPCTL_PIO_PSEDRAIN_DI |
437  /* Input function is not inverted */
438  IOPCTL_PIO_INV_DI);
439  /* PORT1 PIN5 (coords: L2) is configured as PIO1_5 */
440  IOPCTL_PinMuxSet(IOPCTL, 1U, 5U, port1_pin5_config);
441 
442  const uint32_t port1_pin6_config = (/* Pin is configured as PIO1_6 */
443  IOPCTL_PIO_FUNC0 |
444  /* Disable pull-up / pull-down function */
445  IOPCTL_PIO_PUPD_DI |
446  /* Enable pull-down function */
447  IOPCTL_PIO_PULLDOWN_EN |
448  /* Disable input buffer function */
449  IOPCTL_PIO_INBUF_DI |
450  /* Normal mode */
451  IOPCTL_PIO_SLEW_RATE_NORMAL |
452  /* Normal drive */
453  IOPCTL_PIO_FULLDRIVE_DI |
454  /* Analog mux is disabled */
455  IOPCTL_PIO_ANAMUX_DI |
456  /* Pseudo Output Drain is disabled */
457  IOPCTL_PIO_PSEDRAIN_DI |
458  /* Input function is not inverted */
459  IOPCTL_PIO_INV_DI);
460  /* PORT1 PIN6 (coords: N4) is configured as PIO1_6 */
461  IOPCTL_PinMuxSet(IOPCTL, 1U, 6U, port1_pin6_config);
462 }
463 
464 /* clang-format off */
465 /*
466  * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
467 USART0_InitPins:
468 - options: {callFromInitBoot: 'false', coreID: cm33, enableClock: 'true'}
469 - pin_list:
470  - {pin_num: H16, peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_2/FC0_RXD_SDA_MOSI_DATA/CTIMER0_MAT2/SEC_PIO0_2, ibena: enabled}
471  - {pin_num: G16, peripheral: FLEXCOMM0, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_1/FC0_TXD_SCL_MISO_WS/CTIMER0_MAT1/SEC_PIO0_1, pupdena: disabled, pupdsel: pullDown,
472  ibena: disabled, slew_rate: normal, drive: normal, amena: disabled, odena: disabled, iiena: disabled}
473  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
474  */
475 /* clang-format on */
476 
477 /* FUNCTION ************************************************************************************************************
478  *
479  * Function Name : USART0_InitPins
480  * Description : Configures pin routing and optionally pin electrical features.
481  *
482  * END ****************************************************************************************************************/
483 /* Function assigned for the Cortex-M33 */
484 void USART0_InitPins(void)
485 {
486 
487  const uint32_t port0_pin1_config = (/* Pin is configured as FC0_TXD_SCL_MISO_WS */
488  IOPCTL_PIO_FUNC1 |
489  /* Disable pull-up / pull-down function */
490  IOPCTL_PIO_PUPD_DI |
491  /* Enable pull-down function */
492  IOPCTL_PIO_PULLDOWN_EN |
493  /* Disable input buffer function */
494  IOPCTL_PIO_INBUF_DI |
495  /* Normal mode */
496  IOPCTL_PIO_SLEW_RATE_NORMAL |
497  /* Normal drive */
498  IOPCTL_PIO_FULLDRIVE_DI |
499  /* Analog mux is disabled */
500  IOPCTL_PIO_ANAMUX_DI |
501  /* Pseudo Output Drain is disabled */
502  IOPCTL_PIO_PSEDRAIN_DI |
503  /* Input function is not inverted */
504  IOPCTL_PIO_INV_DI);
505  /* PORT0 PIN1 (coords: G16) is configured as FC0_TXD_SCL_MISO_WS */
506  IOPCTL_PinMuxSet(IOPCTL, 0U, 1U, port0_pin1_config);
507 
508  const uint32_t port0_pin2_config = (/* Pin is configured as FC0_RXD_SDA_MOSI_DATA */
509  IOPCTL_PIO_FUNC1 |
510  /* Disable pull-up / pull-down function */
511  IOPCTL_PIO_PUPD_DI |
512  /* Enable pull-down function */
513  IOPCTL_PIO_PULLDOWN_EN |
514  /* Enables input buffer function */
515  IOPCTL_PIO_INBUF_EN |
516  /* Normal mode */
517  IOPCTL_PIO_SLEW_RATE_NORMAL |
518  /* Normal drive */
519  IOPCTL_PIO_FULLDRIVE_DI |
520  /* Analog mux is disabled */
521  IOPCTL_PIO_ANAMUX_DI |
522  /* Pseudo Output Drain is disabled */
523  IOPCTL_PIO_PSEDRAIN_DI |
524  /* Input function is not inverted */
525  IOPCTL_PIO_INV_DI);
526  /* PORT0 PIN2 (coords: H16) is configured as FC0_RXD_SDA_MOSI_DATA */
527  IOPCTL_PinMuxSet(IOPCTL, 0U, 2U, port0_pin2_config);
528 
529  /* attach FRG0 clock to FLEXCOMM0 (debug console) */
530  CLOCK_SetFRGClock(BOARD_DEBUG_UART_FRG_CLK);
531  CLOCK_AttachClk(BOARD_DEBUG_UART_CLK_ATTACH);
532 }
533 
534 /* clang-format off */
535 /*
536  * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
537 USART0_DeinitPins:
538 - options: {callFromInitBoot: 'false', coreID: cm33, enableClock: 'true'}
539 - pin_list:
540  - {pin_num: H16, peripheral: GPIO, signal: 'PIO0, 2', pin_signal: PIO0_2/FC0_RXD_SDA_MOSI_DATA/CTIMER0_MAT2/SEC_PIO0_2}
541  - {pin_num: G16, peripheral: GPIO, signal: 'PIO0, 1', pin_signal: PIO0_1/FC0_TXD_SCL_MISO_WS/CTIMER0_MAT1/SEC_PIO0_1, pupdena: disabled, pupdsel: pullDown, ibena: disabled,
542  slew_rate: normal, drive: normal, amena: disabled, odena: disabled, iiena: disabled}
543  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
544  */
545 /* clang-format on */
546 
547 /* FUNCTION ************************************************************************************************************
548  *
549  * Function Name : USART0_DeinitPins
550  * Description : Configures pin routing and optionally pin electrical features.
551  *
552  * END ****************************************************************************************************************/
553 /* Function assigned for the Cortex-M33 */
554 void USART0_DeinitPins(void)
555 {
556 
557  const uint32_t port0_pin1_config = (/* Pin is configured as PIO0_1 */
558  IOPCTL_PIO_FUNC0 |
559  /* Disable pull-up / pull-down function */
560  IOPCTL_PIO_PUPD_DI |
561  /* Enable pull-down function */
562  IOPCTL_PIO_PULLDOWN_EN |
563  /* Disable input buffer function */
564  IOPCTL_PIO_INBUF_DI |
565  /* Normal mode */
566  IOPCTL_PIO_SLEW_RATE_NORMAL |
567  /* Normal drive */
568  IOPCTL_PIO_FULLDRIVE_DI |
569  /* Analog mux is disabled */
570  IOPCTL_PIO_ANAMUX_DI |
571  /* Pseudo Output Drain is disabled */
572  IOPCTL_PIO_PSEDRAIN_DI |
573  /* Input function is not inverted */
574  IOPCTL_PIO_INV_DI);
575  /* PORT0 PIN1 (coords: G16) is configured as PIO0_1 */
576  IOPCTL_PinMuxSet(IOPCTL, 0U, 1U, port0_pin1_config);
577 
578  const uint32_t port0_pin2_config = (/* Pin is configured as PIO0_2 */
579  IOPCTL_PIO_FUNC0 |
580  /* Disable pull-up / pull-down function */
581  IOPCTL_PIO_PUPD_DI |
582  /* Enable pull-down function */
583  IOPCTL_PIO_PULLDOWN_EN |
584  /* Disable input buffer function */
585  IOPCTL_PIO_INBUF_DI |
586  /* Normal mode */
587  IOPCTL_PIO_SLEW_RATE_NORMAL |
588  /* Normal drive */
589  IOPCTL_PIO_FULLDRIVE_DI |
590  /* Analog mux is disabled */
591  IOPCTL_PIO_ANAMUX_DI |
592  /* Pseudo Output Drain is disabled */
593  IOPCTL_PIO_PSEDRAIN_DI |
594  /* Input function is not inverted */
595  IOPCTL_PIO_INV_DI);
596  /* PORT0 PIN2 (coords: H16) is configured as PIO0_2 */
597  IOPCTL_PinMuxSet(IOPCTL, 0U, 2U, port0_pin2_config);
598 }
599 /***********************************************************************************************************************
600  * EOF
601  **********************************************************************************************************************/
I2C11_InitPins
void I2C11_InitPins(void)
Configures pin routing and optionally pin electrical features.
Definition: pin_mux.c:129
IOPCTL_PIO_FULLDRIVE_DI
#define IOPCTL_PIO_FULLDRIVE_DI
Normal drive.
Definition: pin_mux.h:142
IOPCTL_PIO_PULLDOWN_EN
#define IOPCTL_PIO_PULLDOWN_EN
Enable pull-down function.
Definition: pin_mux.h:147
IOPCTL_PIO_INBUF_DI
#define IOPCTL_PIO_INBUF_DI
Disable input buffer function.
Definition: pin_mux.h:144
IOPCTL_PIO_FUNC1
#define IOPCTL_PIO_FUNC1
Selects pin function 1.
Definition: pin_mux.h:126
IOPCTL_PIO_PSEDRAIN_DI
#define IOPCTL_PIO_PSEDRAIN_DI
Pseudo Output Drain is disabled.
Definition: pin_mux.h:146
SPI5_InitPins
void SPI5_InitPins(void)
Configures pin routing and optionally pin electrical features.
Definition: pin_mux.c:570
BOARD_DEBUG_UART_CLK_ATTACH
#define BOARD_DEBUG_UART_CLK_ATTACH
Definition: board.h:28
IOPCTL_PIO_INV_DI
#define IOPCTL_PIO_INV_DI
Input function is not inverted.
Definition: pin_mux.h:145
IOPCTL_PIO_FUNC0
#define IOPCTL_PIO_FUNC0
Selects pin function 0.
Definition: pin_mux.h:143
IOPCTL_PIO_FULLDRIVE_EN
#define IOPCTL_PIO_FULLDRIVE_EN
Full drive enable.
Definition: pin_mux.h:61
IOPCTL_PIO_ANAMUX_DI
#define IOPCTL_PIO_ANAMUX_DI
Analog mux is disabled.
Definition: pin_mux.h:141
I2C11_DeinitPins
void I2C11_DeinitPins(void)
Configures pin routing and optionally pin electrical features.
Definition: pin_mux.c:197
IOPCTL_PIO_PSEDRAIN_EN
#define IOPCTL_PIO_PSEDRAIN_EN
Pseudo Output Drain is enabled.
Definition: pin_mux.h:65
IOPCTL_PIO_PUPD_DI
#define IOPCTL_PIO_PUPD_DI
Disable pull-up / pull-down function.
Definition: pin_mux.h:148
IOPCTL_PIO_FUNC6
#define IOPCTL_PIO_FUNC6
Selects pin function 6.
Definition: pin_mux.h:62
IOPCTL_PIO_SLEW_RATE_NORMAL
#define IOPCTL_PIO_SLEW_RATE_NORMAL
Normal mode.
Definition: pin_mux.h:149
BOARD_InitBootPins
void BOARD_InitBootPins(void)
Calls initialization functions.
Definition: pin_mux.c:36
USART0_DeinitPins
void USART0_DeinitPins(void)
Configures pin routing and optionally pin electrical features.
Definition: pin_mux.c:157
IOPCTL_PIO_INBUF_EN
#define IOPCTL_PIO_INBUF_EN
Enables input buffer function.
Definition: pin_mux.h:128
BOARD_DEBUG_UART_FRG_CLK
#define BOARD_DEBUG_UART_FRG_CLK
Definition: board.h:29
BOARD_InitPins
void BOARD_InitPins(void)
Configures pin routing and optionally pin electrical features.
Definition: pin_mux.c:47
SPI5_DeinitPins
void SPI5_DeinitPins(void)
Configures pin routing and optionally pin electrical features.
Definition: pin_mux.c:654
USART0_InitPins
void USART0_InitPins(void)
Configures pin routing and optionally pin electrical features.
Definition: pin_mux.c:110
© Copyright 2016-2020 NXP. All Rights Reserved.