MCUXpresso SDK API Reference Manual  Rev. 0
NXP Semiconductors
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Files

file  fsl_spi.h
 

Data Structures

struct  spi_delay_config_t
 SPI delay time configure structure. More...
 
struct  spi_master_config_t
 SPI master user configure structure. More...
 
struct  spi_slave_config_t
 SPI slave user configure structure. More...
 
struct  spi_transfer_t
 SPI transfer structure. More...
 
struct  spi_half_duplex_transfer_t
 SPI half-duplex(master only) transfer structure. More...
 
struct  spi_config_t
 Internal configuration structure used in 'spi' and 'spi_dma' driver. More...
 
struct  spi_master_handle_t
 SPI transfer handle structure. More...
 

Macros

#define SPI_DUMMYDATA   (0xFFU)
 SPI dummy transfer data, the data is sent while txBuff is NULL. More...
 

Typedefs

typedef spi_master_handle_t spi_slave_handle_t
 Slave handle type.
 
typedef void(* spi_master_callback_t )(SPI_Type *base, spi_master_handle_t *handle, status_t status, void *userData)
 SPI master callback for finished transmit.
 
typedef void(* spi_slave_callback_t )(SPI_Type *base, spi_slave_handle_t *handle, status_t status, void *userData)
 SPI slave callback for finished transmit.
 
typedef void(* flexcomm_spi_master_irq_handler_t )(SPI_Type *base, spi_master_handle_t *handle)
 Typedef for master interrupt handler. More...
 
typedef void(* flexcomm_spi_slave_irq_handler_t )(SPI_Type *base, spi_slave_handle_t *handle)
 Typedef for slave interrupt handler. More...
 

Enumerations

enum  spi_xfer_option_t {
  kSPI_FrameDelay = (SPI_FIFOWR_EOF_MASK),
  kSPI_FrameAssert = (SPI_FIFOWR_EOT_MASK)
}
 SPI transfer option. More...
 
enum  spi_shift_direction_t {
  kSPI_MsbFirst = 0U,
  kSPI_LsbFirst = 1U
}
 SPI data shifter direction options. More...
 
enum  spi_clock_polarity_t {
  kSPI_ClockPolarityActiveHigh = 0x0U,
  kSPI_ClockPolarityActiveLow
}
 SPI clock polarity configuration. More...
 
enum  spi_clock_phase_t {
  kSPI_ClockPhaseFirstEdge = 0x0U,
  kSPI_ClockPhaseSecondEdge
}
 SPI clock phase configuration. More...
 
enum  spi_txfifo_watermark_t {
  kSPI_TxFifo0 = 0,
  kSPI_TxFifo1 = 1,
  kSPI_TxFifo2 = 2,
  kSPI_TxFifo3 = 3,
  kSPI_TxFifo4 = 4,
  kSPI_TxFifo5 = 5,
  kSPI_TxFifo6 = 6,
  kSPI_TxFifo7 = 7
}
 txFIFO watermark values More...
 
enum  spi_rxfifo_watermark_t {
  kSPI_RxFifo1 = 0,
  kSPI_RxFifo2 = 1,
  kSPI_RxFifo3 = 2,
  kSPI_RxFifo4 = 3,
  kSPI_RxFifo5 = 4,
  kSPI_RxFifo6 = 5,
  kSPI_RxFifo7 = 6,
  kSPI_RxFifo8 = 7
}
 rxFIFO watermark values More...
 
enum  spi_data_width_t {
  kSPI_Data4Bits = 3,
  kSPI_Data5Bits = 4,
  kSPI_Data6Bits = 5,
  kSPI_Data7Bits = 6,
  kSPI_Data8Bits = 7,
  kSPI_Data9Bits = 8,
  kSPI_Data10Bits = 9,
  kSPI_Data11Bits = 10,
  kSPI_Data12Bits = 11,
  kSPI_Data13Bits = 12,
  kSPI_Data14Bits = 13,
  kSPI_Data15Bits = 14,
  kSPI_Data16Bits = 15
}
 Transfer data width. More...
 
enum  spi_ssel_t {
  kSPI_Ssel0 = 0,
  kSPI_Ssel1 = 1,
  kSPI_Ssel2 = 2,
  kSPI_Ssel3 = 3
}
 Slave select. More...
 
enum  spi_spol_t
 ssel polarity
 
enum  {
  kStatus_SPI_Busy = MAKE_STATUS(kStatusGroup_LPC_SPI, 0),
  kStatus_SPI_Idle = MAKE_STATUS(kStatusGroup_LPC_SPI, 1),
  kStatus_SPI_Error = MAKE_STATUS(kStatusGroup_LPC_SPI, 2),
  kStatus_SPI_BaudrateNotSupport
}
 SPI transfer status. More...
 
enum  _spi_interrupt_enable {
  kSPI_RxLvlIrq = SPI_FIFOINTENSET_RXLVL_MASK,
  kSPI_TxLvlIrq = SPI_FIFOINTENSET_TXLVL_MASK
}
 SPI interrupt sources. More...
 
enum  _spi_statusflags {
  kSPI_TxEmptyFlag = SPI_FIFOSTAT_TXEMPTY_MASK,
  kSPI_TxNotFullFlag = SPI_FIFOSTAT_TXNOTFULL_MASK,
  kSPI_RxNotEmptyFlag = SPI_FIFOSTAT_RXNOTEMPTY_MASK,
  kSPI_RxFullFlag = SPI_FIFOSTAT_RXFULL_MASK
}
 SPI status flags. More...
 

Variables

volatile uint8_t s_dummyData []
 Global variable for dummy data value setting. More...
 

Driver version

#define FSL_SPI_DRIVER_VERSION   (MAKE_VERSION(2, 1, 0))
 SPI driver version 2.1.0. More...
 

Detailed Description

This section describes the programming interface of the SPI DMA driver.


Data Structure Documentation

struct spi_delay_config_t

Note: The DLY register controls several programmable delays related to SPI signalling, it stands for how many SPI clock time will be inserted. The maxinun value of these delay time is 15.

Data Fields

uint8_t preDelay
 Delay between SSEL assertion and the beginning of transfer. More...
 
uint8_t postDelay
 Delay between the end of transfer and SSEL deassertion. More...
 
uint8_t frameDelay
 Delay between frame to frame. More...
 
uint8_t transferDelay
 Delay between transfer to transfer. More...
 

Field Documentation

uint8_t spi_delay_config_t::preDelay
uint8_t spi_delay_config_t::postDelay
uint8_t spi_delay_config_t::frameDelay
uint8_t spi_delay_config_t::transferDelay
struct spi_master_config_t

Data Fields

bool enableLoopback
 Enable loopback for test purpose.
 
bool enableMaster
 Enable SPI at initialization time.
 
spi_clock_polarity_t polarity
 Clock polarity.
 
spi_clock_phase_t phase
 Clock phase.
 
spi_shift_direction_t direction
 MSB or LSB.
 
uint32_t baudRate_Bps
 Baud Rate for SPI in Hz.
 
spi_data_width_t dataWidth
 Width of the data.
 
spi_ssel_t sselNum
 Slave select number.
 
spi_spol_t sselPol
 Configure active CS polarity.
 
uint8_t txWatermark
 txFIFO watermark
 
uint8_t rxWatermark
 rxFIFO watermark
 
spi_delay_config_t delayConfig
 Delay configuration. More...
 

Field Documentation

spi_delay_config_t spi_master_config_t::delayConfig
struct spi_slave_config_t

Data Fields

bool enableSlave
 Enable SPI at initialization time.
 
spi_clock_polarity_t polarity
 Clock polarity.
 
spi_clock_phase_t phase
 Clock phase.
 
spi_shift_direction_t direction
 MSB or LSB.
 
spi_data_width_t dataWidth
 Width of the data.
 
spi_spol_t sselPol
 Configure active CS polarity.
 
uint8_t txWatermark
 txFIFO watermark
 
uint8_t rxWatermark
 rxFIFO watermark
 
struct spi_transfer_t

Data Fields

uint8_t * txData
 Send buffer.
 
uint8_t * rxData
 Receive buffer.
 
uint32_t configFlags
 Additional option to control transfer, spi_xfer_option_t. More...
 
size_t dataSize
 Transfer bytes.
 

Field Documentation

uint32_t spi_transfer_t::configFlags
struct spi_half_duplex_transfer_t

Data Fields

uint8_t * txData
 Send buffer.
 
uint8_t * rxData
 Receive buffer.
 
size_t txDataSize
 Transfer bytes for transmit.
 
size_t rxDataSize
 Transfer bytes.
 
uint32_t configFlags
 Transfer configuration flags, spi_xfer_option_t. More...
 
bool isPcsAssertInTransfer
 If PCS pin keep assert between transmit and receive. More...
 
bool isTransmitFirst
 True for transmit first and false for receive first. More...
 

Field Documentation

uint32_t spi_half_duplex_transfer_t::configFlags
bool spi_half_duplex_transfer_t::isPcsAssertInTransfer

true for assert and false for deassert.

bool spi_half_duplex_transfer_t::isTransmitFirst
struct spi_config_t
struct _spi_master_handle

Master handle type.

Data Fields

uint8_t *volatile txData
 Transfer buffer.
 
uint8_t *volatile rxData
 Receive buffer.
 
volatile size_t txRemainingBytes
 Number of data to be transmitted [in bytes].
 
volatile size_t rxRemainingBytes
 Number of data to be received [in bytes].
 
volatile size_t toReceiveCount
 Receive data remaining in bytes.
 
size_t totalByteCount
 A number of transfer bytes.
 
volatile uint32_t state
 SPI internal state.
 
spi_master_callback_t callback
 SPI callback.
 
void * userData
 Callback parameter.
 
uint8_t dataWidth
 Width of the data [Valid values: 1 to 16].
 
uint8_t sselNum
 Slave select number to be asserted when transferring data [Valid values: 0 to 3].
 
uint32_t configFlags
 Additional option to control transfer.
 
uint8_t txWatermark
 txFIFO watermark
 
uint8_t rxWatermark
 rxFIFO watermark
 

Macro Definition Documentation

#define FSL_SPI_DRIVER_VERSION   (MAKE_VERSION(2, 1, 0))
#define SPI_DUMMYDATA   (0xFFU)

Typedef Documentation

typedef void(* flexcomm_spi_master_irq_handler_t)(SPI_Type *base, spi_master_handle_t *handle)
typedef void(* flexcomm_spi_slave_irq_handler_t)(SPI_Type *base, spi_slave_handle_t *handle)

Enumeration Type Documentation

Enumerator
kSPI_FrameDelay 

A delay may be inserted, defined in the DLY register.

kSPI_FrameAssert 

SSEL will be deasserted at the end of a transfer.

Enumerator
kSPI_MsbFirst 

Data transfers start with most significant bit.

kSPI_LsbFirst 

Data transfers start with least significant bit.

Enumerator
kSPI_ClockPolarityActiveHigh 

Active-high SPI clock (idles low).

kSPI_ClockPolarityActiveLow 

Active-low SPI clock (idles high).

Enumerator
kSPI_ClockPhaseFirstEdge 

First edge on SCK occurs at the middle of the first cycle of a data transfer.

kSPI_ClockPhaseSecondEdge 

First edge on SCK occurs at the start of the first cycle of a data transfer.

Enumerator
kSPI_TxFifo0 

SPI tx watermark is empty.

kSPI_TxFifo1 

SPI tx watermark at 1 item.

kSPI_TxFifo2 

SPI tx watermark at 2 items.

kSPI_TxFifo3 

SPI tx watermark at 3 items.

kSPI_TxFifo4 

SPI tx watermark at 4 items.

kSPI_TxFifo5 

SPI tx watermark at 5 items.

kSPI_TxFifo6 

SPI tx watermark at 6 items.

kSPI_TxFifo7 

SPI tx watermark at 7 items.

Enumerator
kSPI_RxFifo1 

SPI rx watermark at 1 item.

kSPI_RxFifo2 

SPI rx watermark at 2 items.

kSPI_RxFifo3 

SPI rx watermark at 3 items.

kSPI_RxFifo4 

SPI rx watermark at 4 items.

kSPI_RxFifo5 

SPI rx watermark at 5 items.

kSPI_RxFifo6 

SPI rx watermark at 6 items.

kSPI_RxFifo7 

SPI rx watermark at 7 items.

kSPI_RxFifo8 

SPI rx watermark at 8 items.

Enumerator
kSPI_Data4Bits 

4 bits data width

kSPI_Data5Bits 

5 bits data width

kSPI_Data6Bits 

6 bits data width

kSPI_Data7Bits 

7 bits data width

kSPI_Data8Bits 

8 bits data width

kSPI_Data9Bits 

9 bits data width

kSPI_Data10Bits 

10 bits data width

kSPI_Data11Bits 

11 bits data width

kSPI_Data12Bits 

12 bits data width

kSPI_Data13Bits 

13 bits data width

kSPI_Data14Bits 

14 bits data width

kSPI_Data15Bits 

15 bits data width

kSPI_Data16Bits 

16 bits data width

enum spi_ssel_t
Enumerator
kSPI_Ssel0 

Slave select 0.

kSPI_Ssel1 

Slave select 1.

kSPI_Ssel2 

Slave select 2.

kSPI_Ssel3 

Slave select 3.

anonymous enum
Enumerator
kStatus_SPI_Busy 

SPI bus is busy.

kStatus_SPI_Idle 

SPI is idle.

kStatus_SPI_Error 

SPI error.

kStatus_SPI_BaudrateNotSupport 

Baudrate is not support in current clock source.

Enumerator
kSPI_RxLvlIrq 

Rx level interrupt.

kSPI_TxLvlIrq 

Tx level interrupt.

Enumerator
kSPI_TxEmptyFlag 

txFifo is empty

kSPI_TxNotFullFlag 

txFifo is not full

kSPI_RxNotEmptyFlag 

rxFIFO is not empty

kSPI_RxFullFlag 

rxFIFO is full

Variable Documentation

volatile uint8_t s_dummyData[]