MCUXpresso SDK API Reference Manual  Rev. 0
NXP Semiconductors
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Overview

The MCUXpresso SDK provides a peripheral clock driver for the SYSCON module of MCUXpresso SDK devices.

Function description

Clock driver provides these functions:

SYSCON Clock frequency functions

SYSCON clock module provides clocks, such as MCLKCLK, ADCCLK, DMICCLK, MCGFLLCLK, FXCOMCLK, WDTOSC, RTCOSC, and USBCLK. The functions CLOCK_EnableClock() and CLOCK_DisableClock() enables and disables the various clocks. The SYSCON clock driver provides functions to receive the frequency of these clocks, such as CLOCK_GetFreq().

SYSCON clock Selection Muxes

The SYSCON clock driver provides the function to configure the clock selected. The function CLOCK_AttachClk() is implemented for this. The function selects the clock source for a particular peripheral like MAINCLK, DMIC, FLEXCOMM, USB, ADC, and PLL.

SYSCON clock dividers

The SYSCON clock module provides the function to setup the peripheral clock dividers. The function CLOCK_SetClkDiv() configures the CLKDIV registers for various periperals like USB, DMIC, SYSTICK, AHB, and also for CLKOUT functions.

Typical use case

/* when CLK_XTAL_SEL is set to 1(means 32M xtal is used), XTAL_DIV is valid  

Files

file  fsl_clock.h
 

Macros

#define FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL   0
 Configure whether driver controls clock. More...
 
#define LPUART_CLOCKS
 Clock ip name array for LPUART. More...
 
#define BI2C_CLOCKS
 Clock ip name array for BI2C. More...
 
#define FLEXCOMM_CLOCKS
 Clock ip name array for FLEXCOMM. More...
 
#define CRC_CLOCKS
 Clock ip name array for CRC. More...
 
#define CTIMER_CLOCKS
 Clock ip name array for CTIMER. More...
 
#define SCT_CLOCKS
 Clock ip name array for SCTimer. More...
 
#define GPIO_CLOCKS
 Clock ip name array for GPIO. More...
 
#define CAL_CLOCKS
 Clock ip name array for Calibration. More...
 
#define USBD_CLOCKS
 Clock ip name array for USBD. More...
 
#define WDT_CLOCKS
 Clock ip name array for WDT. More...
 
#define BIV_CLOCKS
 Clock ip name array for BIV(including RTC and SYSCON clock). More...
 
#define ADC_CLOCKS
 Clock ip name array for ADC. More...
 
#define DAC_CLOCKS
 Clock ip name array for DAC. More...
 
#define CS_CLOCKS
 Clock ip name array for CS. More...
 
#define FSP_CLOCKS
 Clock ip name array for FSP. More...
 
#define DMA_CLOCKS
 Clock ip name array for DMA. More...
 
#define QDEC_CLOCKS
 Clock ip name array for QDEC. More...
 
#define DP_CLOCKS
 Clock ip name array for DP. More...
 
#define SPIFI_CLOCKS
 Clock ip name array for SPIFI. More...
 
#define BLE_CLOCKS
 Clock ip name array for BLE. More...
 
#define PROP_CLOCKS
 Clock ip name array for PROP. More...
 
#define MUX_A(m, choice)   (((m) << 0) | ((choice + 1) << 8))
 Clock Mux Switches. More...
 

Enumerations

enum  clock_ip_name_t
 Clock gate name used for CLOCK_EnableClock/CLOCK_DisableClock. More...
 
enum  clock_name_t {
  kCLOCK_CoreSysClk,
  kCLOCK_BusClk,
  kCLOCK_ApbClk,
  kCLOCK_WdtClk,
  kCLOCK_FroHf,
  kCLOCK_Xin,
  kCLOCK_32KClk
}
 Clock name used to get clock frequency. More...
 
enum  clock_attach_id_t {
  kXTAL32K_to_32K_CLK = MUX_A(CM_32KCLKSEL, 0),
  kRCO32K_to_32K_CLK = MUX_A(CM_32KCLKSEL, 1),
  kOSC32M_to_SYS_CLK = MUX_A(CM_SYSCLKSEL, 0),
  kXTAL_to_SYS_CLK = MUX_A(CM_SYSCLKSEL, 1),
  k32K_to_SYS_CLK = MUX_A(CM_SYSCLKSEL, 2),
  k32K_to_WDT_CLK = MUX_A(CM_WDTCLKSEL, 0),
  kAPB_to_WDT_CLK = MUX_A(CM_WDTCLKSEL, 1),
  k8M_to_BLE_CLK = MUX_A(CM_BLECLKSEL, 0),
  k16M_to_BLE_CLK = MUX_A(CM_BLECLKSEL, 1),
  k16M_to_XTAL_CLK = MUX_A(CM_XTALCLKSEL, 0),
  k32M_to_XTAL_CLK = MUX_A(CM_XTALCLKSEL, 1)
}
 
enum  clock_usb_src_t { kCLOCK_UsbSrcFro }
 USB clock source definition. More...
 
enum  clock_clkout_src_t {
  kCLOCK_Clkout_32K = SYSCON_CLK_CTRL_CLK_32K_OE_MASK,
  kCLOCK_Clkout_XTAL = SYSCON_CLK_CTRL_CLK_XTAL_OE_MASK
}
 

Functions

void CLOCK_EnableClock (clock_ip_name_t clk)
 Enable the specified peripheral clock.
 
void CLOCK_DisableClock (clock_ip_name_t clk)
 Disable the specified peripheral clock.
 
void CLOCK_AttachClk (clock_attach_id_t connection)
 Configure the clock selection muxes. More...
 
void CLOCK_SetClkDiv (clock_div_name_t div_name, uint32_t divided_by_value)
 Setup peripheral clock dividers. More...
 
uint32_t CLOCK_GetFreq (clock_name_t clk)
 Get frequency of selected clock. More...
 
static void CLOCK_DisableUsbfs0Clock (void)
 Disable USB FS clock. More...
 
void CLOCK_EnableClkoutSource (uint32_t mask, bool enable)
 Enable/Disable clock out source. More...
 
void CLOCK_EnableClkoutPin (uint32_t mask, bool enable)
 Enable/Disable clock out pin. More...
 
uint32_t CLOCK_GetFRGInputClock (void)
 Return Input frequency for the Fractional baud rate generator. More...
 
uint32_t CLOCK_SetFRGClock (clock_div_name_t div_name, uint32_t freq)
 Set output of the Fractional baud rate generator. More...
 

Macro Definition Documentation

#define FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL   0

When set to 0, peripheral drivers will enable clock in initialize function and disable clock in de-initialize function. When set to 1, peripheral driver will not control the clock, application could contol the clock out of the driver.

Note
All drivers share this feature switcher. If it is set to 1, application should handle clock enable and disable for all drivers.
#define LPUART_CLOCKS
Value:
{ \
kCLOCK_Flexcomm0, kCLOCK_Flexcomm1 \
}
#define BI2C_CLOCKS
Value:
{ \
kCLOCK_Flexcomm1, kCLOCK_Flexcomm2 \
}
#define FLEXCOMM_CLOCKS
Value:
{ \
kCLOCK_Flexcomm0, kCLOCK_Flexcomm1, kCLOCK_Flexcomm2, kCLOCK_Flexcomm3 \
}
#define CRC_CLOCKS
Value:
{ \
kCLOCK_Crc \
}
#define CTIMER_CLOCKS
Value:
{ \
kCLOCK_Ctimer0, kCLOCK_Ctimer1, kCLOCK_Ctimer2, kCLOCK_Ctimer3 \
}
#define SCT_CLOCKS
Value:
{ \
kCLOCK_Sct0 \
}
#define GPIO_CLOCKS
Value:
{ \
kCLOCK_Gpio \
}
#define CAL_CLOCKS
Value:
{ \
kCLOCK_Cal \
}
#define USBD_CLOCKS
Value:
{ \
kCLOCK_Usbd0 \
}
#define WDT_CLOCKS
Value:
{ \
kCLOCK_Wdt \
}
#define BIV_CLOCKS
Value:
{ \
kCLOCK_Biv \
}

Enabled as default

#define ADC_CLOCKS
Value:
{ \
kCLOCK_Adc \
}
#define DAC_CLOCKS
Value:
{ \
kCLOCK_Dac \
}
#define CS_CLOCKS
Value:
{ \
kCLOCK_Cs \
}
#define FSP_CLOCKS
Value:
{ \
kCLOCK_Fsp \
}
#define DMA_CLOCKS
Value:
{ \
kCLOCK_Dma \
}
#define QDEC_CLOCKS
Value:
{ \
kCLOCK_Qdec0, kCLOCK_Qdec1 \
}
#define DP_CLOCKS
Value:
{ \
kCLOCK_Dp \
}
#define SPIFI_CLOCKS
Value:
{ \
kCLOCK_Spifi \
}
#define BLE_CLOCKS
Value:
{ \
kCLOCK_Ble \
}
#define PROP_CLOCKS
Value:
{ \
kCLOCK_Prop \
}
#define MUX_A (   m,
  choice 
)    (((m) << 0) | ((choice + 1) << 8))

[4 bits for choice] [8 bits mux ID]

Enumeration Type Documentation

Clock gate name used for CLOCK_EnableClock/CLOCK_DisableClock.

Enumerator
kCLOCK_CoreSysClk 

Core/system clock (aka MAIN_CLK)

kCLOCK_BusClk 

Bus clock (AHB clock)

kCLOCK_ApbClk 

Apb clock.

kCLOCK_WdtClk 

Wdt clock.

kCLOCK_FroHf 

FRO.

kCLOCK_Xin 

16/32 MHz XIN

kCLOCK_32KClk 

32K clock

Enumerator
kXTAL32K_to_32K_CLK 

XTAL 32K clock.

kRCO32K_to_32K_CLK 

RCO 32KHz clock.

kOSC32M_to_SYS_CLK 

OSC 32MHz clock.

kXTAL_to_SYS_CLK 

XTAL 16MHz/32MHz clock.

k32K_to_SYS_CLK 

32KHz clock

k32K_to_WDT_CLK 

32KHz clock

kAPB_to_WDT_CLK 

APB clock.

k8M_to_BLE_CLK 

8M CLOCK

k16M_to_BLE_CLK 

16M CLOCK

k16M_to_XTAL_CLK 

16M XTAL

k32M_to_XTAL_CLK 

32M XTAL

Enumerator
kCLOCK_UsbSrcFro 

Fake USB src clock, temporary fix until USB clock control is done properly.

Enumerator
kCLOCK_Clkout_32K 

32KHz clock out

kCLOCK_Clkout_XTAL 

XTAL clock out.

Function Documentation

void CLOCK_AttachClk ( clock_attach_id_t  connection)
Parameters
connection,:Clock to be configured.
void CLOCK_SetClkDiv ( clock_div_name_t  div_name,
uint32_t  divided_by_value 
)
Parameters
div_name,:Clock divider name
divided_by_value,:Value to be divided
uint32_t CLOCK_GetFreq ( clock_name_t  clk)
Returns
Frequency of selected clock
static void CLOCK_DisableUsbfs0Clock ( void  )
inlinestatic

Disable USB FS clock.

void CLOCK_EnableClkoutSource ( uint32_t  mask,
bool  enable 
)
Parameters
maskMask value for the clock source, See "clock_clkout_src_t".
enableEnable/Disable the clock out source.
void CLOCK_EnableClkoutPin ( uint32_t  mask,
bool  enable 
)
Parameters
maskMask value for the clock source, See "clock_clkout_pin_t".
enableEnable/Disable the clock out pin.
uint32_t CLOCK_GetFRGInputClock ( void  )
Returns
Input Frequency for FRG
uint32_t CLOCK_SetFRGClock ( clock_div_name_t  div_name,
uint32_t  freq 
)
Parameters
div_name,:Clock divider name: kCLOCK_DivFrg0 and kCLOCK_DivFrg1
freq,:Desired output frequency
Returns
Error Code 0 - fail 1 - success