MCUXpresso SDK API Reference Manual  Rev. 0
NXP Semiconductors
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Clock Driver

Read Guidance

The clock module is used to help software to configure the MCU OCCS and relevant field in SIM module, to provide proper clock to MCU core and its peripherals.

Driver Overview

 Driver Change Log
 Current CLOCK driver version is 2.0.0.
 

Data Structures

struct  clock_protection_config_t
 Clock register protection configuration. More...
 
struct  clock_output_config_t
 Clock output configuration. More...
 
struct  clock_config_t
 mcu clock configuration structure. More...
 

Macros

#define FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL   0
 Configure whether driver controls clock. More...
 
#define SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY   (100000000UL)
 Definition for delay API in clock driver, users can redefine it to the real application. More...
 
#define GPIO_CLOCKS
 Clock ip name array for GPIO. More...
 
#define TMR_CLOCKS
 Clock ip name array for quad timer. More...
 
#define FLEXCAN_CLOCKS
 Clock ip name array for FLEXCAN. More...
 
#define I2C_CLOCKS
 Clock ip name array for I2C. More...
 
#define QSPI_CLOCKS
 Clock ip name array for queued SPI. More...
 
#define QSCI_CLOCKS
 Clock ip name array for queued SCI. More...
 
#define DAC_CLOCKS
 Clock ip name array for DAC. More...
 
#define PIT_CLOCKS
 Clock ip name array for PIT. More...
 
#define CRC_CLOCKS
 Clock ip name array for CRC. More...
 
#define CADC_CLOCKS
 Clock ip name array for cyclic ADC. More...
 
#define CMP_CLOCKS
 Clock ip name array for CMP. More...
 
#define PWM_CLOCKS
 Clock ip name array for PWM. More...
 
#define USB_CLOCKS
 Clock ip name array for USB. More...
 
#define ROM_CLOCKS
 Clock ip name array for ROM. More...
 
#define EDMA_CLOCKS
 Clock ip name array for EDMA. More...
 
#define EWM_CLOCKS
 Clock ip name array for EWM. More...
 
#define XBARA_CLOCKS
 Clock ip name array for XBARA. More...
 

Enumerations

enum  clock_ip_name_t {
  kCLOCK_GPIOG = 0U,
  kCLOCK_GPIOF = 1U,
  kCLOCK_GPIOE = 2U,
  kCLOCK_GPIOD = 3U,
  kCLOCK_GPIOC = 4U,
  kCLOCK_GPIOB = 5U,
  kCLOCK_GPIOA = 6U,
  kCLOCK_TB3 = 8U,
  kCLOCK_TB2 = 9U,
  kCLOCK_TB1 = 10U,
  kCLOCK_TB0 = 11U,
  kCLOCK_TA3 = 12U,
  kCLOCK_TA2 = 13U,
  kCLOCK_TA1 = 14U,
  kCLOCK_TA0 = 15U,
  kCLOCK_FLEXCAN = 16U,
  kCLOCK_I2C1 = 21U,
  kCLOCK_I2C0 = 22U,
  kCLOCK_QSPI1 = 24U,
  kCLOCK_QSPI0 = 25U,
  kCLOCK_QSCI2 = 26U,
  kCLOCK_QSCI1 = 27U,
  kCLOCK_QSCI0 = 28U,
  kCLOCK_DACA = 29U,
  kCLOCK_DACB = 30U,
  kCLOCK_PIT1 = 34U,
  kCLOCK_PIT0 = 35U,
  kCLOCK_CRC = 37U,
  kCLOCK_CYCADC = 39U,
  kCLOCK_CMPD = 41U,
  kCLOCK_CMPC = 42U,
  kCLOCK_CMPB = 43U,
  kCLOCK_CMPA = 44U,
  kCLOCK_PWMBCH3 = 48U,
  kCLOCK_PWMBCH2 = 49U,
  kCLOCK_PWMBCH1 = 50U,
  kCLOCK_PWMBCH0 = 51U,
  kCLOCK_PWMACH3 = 52U,
  kCLOCK_PWMACH2 = 53U,
  kCLOCK_PWMACH1 = 54U,
  kCLOCK_PWMACH0 = 55U,
  kCLOCK_USB = 56U,
  kCLOCK_ROM = 57U,
  kCLOCK_NOGATE = 58U ,
  kCLOCK_NUM = 59U
}
 List of IP clock name. More...
 
enum  clock_name_t {
  kCLOCK_Mstr2xClk = 0,
  kCLOCK_SysClk = 1,
  kCLOCK_BusClk = 2,
  kCLOCK_Bus2xClk = 3,
  kCLOCK_FlashClk = 4,
  kCLOCK_FastIrcClk = 10,
  kCLOCK_FastIrcDiv6Clk = 11,
  kCLOCK_SlowIrcClk = 12,
  kCLOCK_CrystalOscClk = 13,
  kCLOCK_ExtClk = 20,
  kCLOCK_MstrOscClk = 21,
  kCLOCK_PllDiv2Clk = 22
}
 List of system-level clock name. More...
 
enum  clock_crystal_osc_mode_t {
  kCLOCK_CrystalOscModeFSP = 0,
  kCLOCK_CrystalOscModeLCP = 1
}
 Crystal oscillator mode. More...
 
enum  clock_ext_clk_src_t {
  kCLOCK_ExtClkSrcCrystalOsc = 0,
  kCLOCK_ExtClkSrcClkin = 1
}
 List of external clock source. More...
 
enum  clock_ext_clkin_sel_t {
  kCLOCK_SelClkIn0 = 0,
  kCLOCK_SelClkIn1 = 1
}
 List of clock-in source. More...
 
enum  clock_mstr_osc_clk_src_t {
  kCLOCK_MstrOscClkSrcFircDiv6 = 0U,
  kCLOCK_MstrOscClkSrcExt = 1U,
  kCLOCK_MstrOscClkSrcSirc = 2U,
  kCLOCK_MstrOscClkSrcFirc = 3U
}
 List of master oscillator source. More...
 
enum  clock_mstr_2x_clk_src_t {
  kCLOCK_Mstr2xClkSrcMstrOsc = 0U,
  kCLOCK_Mstr2xClkSrcPllDiv2 = 1U
}
 List of master 2x clock source. More...
 
enum  clock_output_clk_src_t {
  kCLOCK_OutputClkSrc_Bus = 0U,
  kCLOCK_OutputClkSrc_Bus2x = 1U,
  kCLOCK_OutputClkSrc_BusDiv4 = 2U,
  kCLOCK_OutputClkSrc_MstrOSC = 3U,
  kCLOCK_OutputClkSrc_FircDiv6 = 4U,
  kCLOCK_OutputClkSrc_Sirc = 5U
}
 List of output clock source. More...
 
enum  clock_output_clk_div_t {
  kCLOCK_OutputDiv1 = 0U,
  kCLOCK_OutputDiv2 = 1U,
  kCLOCK_OutputDiv4 = 2U,
  kCLOCK_OutputDiv8 = 3U,
  kCLOCK_OutputDiv16 = 4U,
  kCLOCK_OutputDiv32 = 5U,
  kCLOCK_OutputDiv64 = 6U,
  kCLOCK_OutputDiv128 = 7U
}
 List of output clock divider. More...
 
enum  clock_protection_t {
  kCLOCK_Protection_Off = 0U,
  kCLOCK_Protection_On = 1U,
  kCLOCK_Protection_OffLock = 2U,
  kCLOCK_Protection_OnLock = 3U
}
 List of clock register protection mode. More...
 
enum  clock_ip_clk_src_t {
  kCLOCK_IPClkSrc_BusClk = 0U,
  kCLOCK_IPClkSrc_Bus2xClk = 1U
}
 List of specific IP's clock source. More...
 
enum  clock_postscale_t {
  kCLOCK_PostscaleDiv1 = 0,
  kCLOCK_PostscaleDiv2 = 1,
  kCLOCK_PostscaleDiv4 = 2,
  kCLOCK_PostscaleDiv8 = 3,
  kCLOCK_PostscaleDiv16 = 4,
  kCLOCK_PostscaleDiv32 = 5,
  kCLOCK_PostscaleDiv64 = 6,
  kCLOCK_PostscaleDiv128 = 7,
  kCLOCK_PostscaleDiv256 = 8
}
 Mstr 2x clock postscale divider. More...
 
enum  clock_pll_monitor_type_t {
  kCLOCK_PllMonitorUnLockCoarse,
  kCLOCK_PllMonitorUnLockFine,
  kCLOCK_PllMonitorLostofReferClk,
  kCLOCK_PllMonitorAll
}
 PLL monitor type structure. More...
 
enum  pit_count_clock_source_t {
  kPIT_CountClockSource0 = 0U,
  kPIT_CountClockSource1 = 1U,
  kPIT_CountClockSource2 = 2U,
  kPIT_CountClockSource3 = 3U,
  kPIT_CountBusClock = kPIT_CountClockSource0,
  kPIT_CountCrystalClock = kPIT_CountClockSource1,
  kPIT_Count8MHzIRCClock = kPIT_CountClockSource2,
  kPIT_Count200KHzIRCClock = kPIT_CountClockSource3
}
 Describes PIT clock source. More...
 
enum  ewm_lpo_clock_source_t {
  kEWM_LpoClockSource0 = 0U,
  kEWM_LpoClockSource1 = 1U,
  kEWM_LpoClockSource2 = 2U,
  kEWM_LpoClockSource3 = 3U,
  kEWM_Lpo8MHzIRCClock = kEWM_LpoClockSource0,
  kEWM_LpoCrystalClock = kEWM_LpoClockSource1,
  kEWM_LpoBusClock = kEWM_LpoClockSource2,
  kEWM_Lpo200KHzIRCClock = kEWM_LpoClockSource3
}
 Describes EWM clock source. More...
 

Functions

static void CLOCK_EnableClock (clock_ip_name_t eIpClkName)
 Enable IPs clock. More...
 
static void CLOCK_DisableClock (clock_ip_name_t eIpClkName)
 Disable IPs clock. More...
 
static void CLOCK_EnableClockInStopMode (clock_ip_name_t eIpClkName)
 Enable IPs clock in STOP mode. More...
 
static void CLOCK_DisableClockInStopMode (clock_ip_name_t eIpClkName)
 Disable IPs clock in STOP mode. More...
 
static void CLOCK_ConfigQsciClockSrc (clock_ip_name_t eQsciClkName, clock_ip_clk_src_t eClkSrc)
 Configure QSCI clock source. More...
 
static void CLOCK_ConfigI2cFilterClockSrc (clock_ip_name_t eI2cClkName, clock_ip_clk_src_t eClkSrc)
 Configure I2C filter clock source. More...
 
static void CLOCK_SetSlowIrcTrim (uint16_t u16Trim)
 Set trim value to 200K slow internal RC oscillator. More...
 
static bool CLOCK_GetCrystalOscFailureStatus (void)
 Get crystal oscillator failure status. More...
 
static void CLOCK_SetPllLossofRefererntTripPoint (uint8_t u8Trip)
 Set PLL loss of reference trip point. More...
 
static void CLOCK_ClearPLLMonitorFlag (clock_pll_monitor_type_t eType)
 Clear PLL monitor flag. More...
 
uint32_t CLOCK_GetFreq (clock_name_t eClkName)
 Get system-level clock frequency. More...
 
uint32_t CLOCK_GetIpClkSrcFreq (clock_ip_name_t eIpClkName)
 Get IP clock frequency. More...
 
void CLOCK_SetClkin0Freq (uint32_t u32Freq)
 Set Clock IN 0 frequency. More...
 
void CLOCK_SetClkin1Freq (uint32_t u32Freq)
 Set Clock IN 1 frequency. More...
 
void CLOCK_SetXtalFreq (uint32_t u32Freq)
 Set crystal oscillator frequency. More...
 
void CLOCK_SetProtectionConfig (clock_protection_config_t *psConfig)
 Config clock register access protection mode. More...
 
void CLOCK_SetOutputClockConfig (clock_output_config_t *psConfig)
 Config output clock. More...
 
void CLOCK_SetClkConfig (clock_config_t *psConfig)
 Config mcu operation clock. More...
 
void CLOCK_EnableUsbfs0Clock (void)
 Enable USB FS clock.
 
uint32_t CLOCK_EvaluateExtClkFreq (void)
 Evaluate external clock frequency and return its frequency in Hz. More...
 
void CLOCK_EnablePLLMonitorInterrupt (clock_pll_monitor_type_t eType, bool bEnable)
 Enable/Disable PLL monitor interrupt. More...
 

Driver version

#define FSL_CLOCK_DRIVER_VERSION   (MAKE_VERSION(2, 0, 1))
 CLOCK driver version 2.0.1. More...
 

Data Structure Documentation

struct clock_protection_config_t

Data Fields

clock_protection_t eFrqEP
 FRQEP bit field in OCCS PROT register, protect COD & ZSRC. More...
 
clock_protection_t eOscEP
 OSCEP bit field in OCCS PROT register, protect OSCTL1, OSCTL2, PRECS. More...
 
clock_protection_t ePllEP
 PLLEP bit field in OCCS PROT register, protect PLLDP, LOCIE, LORTP, PLLDB bitfield. More...
 

Field Documentation

clock_protection_t clock_protection_config_t::eFrqEP
clock_protection_t clock_protection_config_t::eOscEP
clock_protection_t clock_protection_config_t::ePllEP
struct clock_output_config_t

Data Fields

bool bClkOut0En
 Clock output 0 enable, CLKDIS0 bit field in SIM CLKOUT register.
 
bool bClkOut1En
 Clock output 1 enable, CLKDIS1 bit field in SIM CLKOUT register.
 
clock_output_clk_src_t eClkOut0Src
 Clock output 0 clock source, CLKOSEL0 bit field in SIM CLKOUT register.
 
clock_output_clk_src_t eClkOut1Src
 Clock output 1 clock source, CLKOSEL1 bit field in SIM CLKOUT register.
 
clock_output_clk_div_t eClkDiv
 Clock output divider, CLKODIV bit field in SIM CLKOUT register ,it apply to clkout0 & clkout1.
 
struct clock_config_t

This is the key configuration structure of clock driver, which define the system clock behavior. The function CLOCK_SetClkConfig deploy this configuration structure onto SOC.

Data Fields

bool bCrystalOscEnable
 Crystal oscillator enable, COPD bit field in OCCS OSCTL2 register.
 
bool bFircEnable
 Fast internal RC oscillator enable, IRC48M_EN bit field in SIM MISC0 register.
 
bool bSircEnable
 Slow internal RC oscillator enable, ROPD200K bit field in OCCS OSCTL2 register.
 
bool bPllEnable
 PLL enable, PLLPD bit field in OCCS CTRL register.
 
bool bCrystalOscMonitorEnable
 Crystal oscillator monitor enable, MON_ENABLE bit field in OCCS OSCTL2 register.
 
clock_crystal_osc_mode_t eCrystalOscMode
 Crystal oscillator mode, COHL bit field in OCCS OSCTL1 register.
 
clock_ext_clk_src_t eExtClkSrc
 External clock source, EXT_SEL bit field in OCCS OSCTL1 register.
 
clock_ext_clkin_sel_t eClkInSel
 Clock IN selection(0 or 1), CLKINSEL bit field in SIM MISC0 register.
 
clock_mstr_osc_clk_src_t eMstrOscClkSrc
 Master oscillator selection, PRECS bit field in OCCS CTRL register. More...
 
clock_mstr_2x_clk_src_t eMstr2xClkSrc
 Master 2x clock selection, ZSRC bit field in OCCS CTRL register.
 
clock_postscale_t eMstr2xClkPostScale
 Master 2x clock post scale, COD bit field in OCCS DIVBY register.
 
uint32_t u32PllClkFreq
 Required PLL output frequency before divide 2.
 

Field Documentation

clock_mstr_osc_clk_src_t clock_config_t::eMstrOscClkSrc

When selected kCLOCK_MstrOscClkSrcExt, make sure corresponding pins(crystal osc or clkin pin) has been configured.

Macro Definition Documentation

#define FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL   0

When set to 0, peripheral drivers will enable clock in initialize function and disable clock in de-initialize function. When set to 1, peripheral driver will not control the clock, application could control the clock out of the driver.

Note
All drivers share this feature switcher. If it is set to 1, application should handle clock enable and disable for all drivers.
#define FSL_CLOCK_DRIVER_VERSION   (MAKE_VERSION(2, 0, 1))
#define SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY   (100000000UL)
#define GPIO_CLOCKS
Value:
{ \
}
GPIOG clock.
Definition: fsl_clock.h:73
GPIOB clock.
Definition: fsl_clock.h:78
GPIOC clock.
Definition: fsl_clock.h:77
GPIOF clock.
Definition: fsl_clock.h:74
GPIOD clock.
Definition: fsl_clock.h:76
GPIOE clock.
Definition: fsl_clock.h:75
GPIOA clock.
Definition: fsl_clock.h:79
#define TMR_CLOCKS
Value:
{ \
}
Timer B1 clock.
Definition: fsl_clock.h:82
Timer A3 clock.
Definition: fsl_clock.h:84
Timer B3 clock.
Definition: fsl_clock.h:80
Timer A1 clock.
Definition: fsl_clock.h:86
Timer A2 clock.
Definition: fsl_clock.h:85
Timer B2 clock.
Definition: fsl_clock.h:81
Timer A0 clock.
Definition: fsl_clock.h:87
Timer B0 clock.
Definition: fsl_clock.h:83
#define FLEXCAN_CLOCKS
Value:
{ \
}
Flex CAN clock.
Definition: fsl_clock.h:90
#define I2C_CLOCKS
Value:
{ \
}
I2C0 clock.
Definition: fsl_clock.h:92
I2C1 clock.
Definition: fsl_clock.h:91
#define QSPI_CLOCKS
Value:
{ \
}
QSPI0 clock.
Definition: fsl_clock.h:94
QSPI1 clock.
Definition: fsl_clock.h:93
#define QSCI_CLOCKS
Value:
{ \
}
QSCI1 clock.
Definition: fsl_clock.h:96
QSCI0 clock.
Definition: fsl_clock.h:97
QSCI2 clock.
Definition: fsl_clock.h:95
#define DAC_CLOCKS
Value:
{ \
}
DAC B clock.
Definition: fsl_clock.h:99
DAC A clock.
Definition: fsl_clock.h:98
#define PIT_CLOCKS
Value:
{ \
}
PIT 0 clock.
Definition: fsl_clock.h:103
PIT 1 clock.
Definition: fsl_clock.h:102
#define CRC_CLOCKS
Value:
{ \
}
CRC clock.
Definition: fsl_clock.h:104
#define CADC_CLOCKS
Value:
{ \
}
Cyclic ADC clock.
Definition: fsl_clock.h:105
#define CMP_CLOCKS
Value:
{ \
}
Comparator C clock.
Definition: fsl_clock.h:107
Comparator D clock.
Definition: fsl_clock.h:106
Comparator A clock.
Definition: fsl_clock.h:109
Comparator B clock.
Definition: fsl_clock.h:108
#define PWM_CLOCKS
Value:
{ \
}
Enhanced Flexible PWM A1 clock.
Definition: fsl_clock.h:118
Enhanced Flexible PWM B0 clock.
Definition: fsl_clock.h:115
Enhanced Flexible PWM B2 clock.
Definition: fsl_clock.h:113
Enhanced Flexible PWM A0 clock.
Definition: fsl_clock.h:119
Enhanced Flexible PWM B1 clock.
Definition: fsl_clock.h:114
Enhanced Flexible PWM A2 clock.
Definition: fsl_clock.h:117
Enhanced Flexible PWM A3 clock.
Definition: fsl_clock.h:116
Enhanced Flexible PWM B3 clock.
Definition: fsl_clock.h:112
#define USB_CLOCKS
Value:
{ \
}
USB clock.
Definition: fsl_clock.h:120
#define ROM_CLOCKS
Value:
{ \
}
ROM clock.
Definition: fsl_clock.h:121
#define EDMA_CLOCKS
Value:
{ \
kCLOCK_EDMA \
}
#define EWM_CLOCKS
Value:
{ \
kCLOCK_EWM \
}
#define XBARA_CLOCKS
Value:
{ \
kCLOCK_XBARA \
}

Enumeration Type Documentation

Enumerator
kCLOCK_GPIOG 

GPIOG clock.

kCLOCK_GPIOF 

GPIOF clock.

kCLOCK_GPIOE 

GPIOE clock.

kCLOCK_GPIOD 

GPIOD clock.

kCLOCK_GPIOC 

GPIOC clock.

kCLOCK_GPIOB 

GPIOB clock.

kCLOCK_GPIOA 

GPIOA clock.

kCLOCK_TB3 

Timer B3 clock.

kCLOCK_TB2 

Timer B2 clock.

kCLOCK_TB1 

Timer B1 clock.

kCLOCK_TB0 

Timer B0 clock.

kCLOCK_TA3 

Timer A3 clock.

kCLOCK_TA2 

Timer A2 clock.

kCLOCK_TA1 

Timer A1 clock.

kCLOCK_TA0 

Timer A0 clock.

kCLOCK_FLEXCAN 

Flex CAN clock.

kCLOCK_I2C1 

I2C1 clock.

kCLOCK_I2C0 

I2C0 clock.

kCLOCK_QSPI1 

QSPI1 clock.

kCLOCK_QSPI0 

QSPI0 clock.

kCLOCK_QSCI2 

QSCI2 clock.

kCLOCK_QSCI1 

QSCI1 clock.

kCLOCK_QSCI0 

QSCI0 clock.

kCLOCK_DACA 

DAC A clock.

kCLOCK_DACB 

DAC B clock.

kCLOCK_PIT1 

PIT 1 clock.

kCLOCK_PIT0 

PIT 0 clock.

kCLOCK_CRC 

CRC clock.

kCLOCK_CYCADC 

Cyclic ADC clock.

kCLOCK_CMPD 

Comparator D clock.

kCLOCK_CMPC 

Comparator C clock.

kCLOCK_CMPB 

Comparator B clock.

kCLOCK_CMPA 

Comparator A clock.

kCLOCK_PWMBCH3 

Enhanced Flexible PWM B3 clock.

kCLOCK_PWMBCH2 

Enhanced Flexible PWM B2 clock.

kCLOCK_PWMBCH1 

Enhanced Flexible PWM B1 clock.

kCLOCK_PWMBCH0 

Enhanced Flexible PWM B0 clock.

kCLOCK_PWMACH3 

Enhanced Flexible PWM A3 clock.

kCLOCK_PWMACH2 

Enhanced Flexible PWM A2 clock.

kCLOCK_PWMACH1 

Enhanced Flexible PWM A1 clock.

kCLOCK_PWMACH0 

Enhanced Flexible PWM A0 clock.

kCLOCK_USB 

USB clock.

kCLOCK_ROM 

ROM clock.

kCLOCK_NOGATE 

No clock gate for the IP.

kCLOCK_NUM 

Total IP clock number.

Enumerator
kCLOCK_Mstr2xClk 

Master 2x clock which feed to core and peripheral.

kCLOCK_SysClk 

MCU system/core clock.

kCLOCK_BusClk 

Bus clock.

kCLOCK_Bus2xClk 

Bus 2x clock.

kCLOCK_FlashClk 

Flash clock.

kCLOCK_FastIrcClk 

Fast internal RC oscillator, 48M.

kCLOCK_FastIrcDiv6Clk 

ROSC 8M, derived from kCLOCK_FastIrcClk div 6.

kCLOCK_SlowIrcClk 

Slow internal RC oscillator, 200K.

kCLOCK_CrystalOscClk 

Crystal oscillator.

kCLOCK_ExtClk 

The selected external clock, it could be crystal oscillator, clkin0, clkin1.

kCLOCK_MstrOscClk 

The selected master oscillator clock.

kCLOCK_PllDiv2Clk 

PLL output divide 2.

Enumerator
kCLOCK_CrystalOscModeFSP 

Full swing pierce, high power mode.

kCLOCK_CrystalOscModeLCP 

Loop controlled pierce, low power mode.

Enumerator
kCLOCK_ExtClkSrcCrystalOsc 

External clock source is crystal oscillator.

kCLOCK_ExtClkSrcClkin 

External clock source is clock in.

Enumerator
kCLOCK_SelClkIn0 

Clock in 0 is selected as CLKIN.

kCLOCK_SelClkIn1 

Clock in 1 is selected as CLKIN.

Enumerator
kCLOCK_MstrOscClkSrcFircDiv6 

8M, fast internal RC oscillator divide 6

kCLOCK_MstrOscClkSrcExt 

External clock.

kCLOCK_MstrOscClkSrcSirc 

200K, slow internal RC oscillator

kCLOCK_MstrOscClkSrcFirc 

48M, fast internal RC oscillator

Enumerator
kCLOCK_Mstr2xClkSrcMstrOsc 

Master oscillator clock.

kCLOCK_Mstr2xClkSrcPllDiv2 

PLL output divide 2.

Enumerator
kCLOCK_OutputClkSrc_Bus 

Bus clock.

kCLOCK_OutputClkSrc_Bus2x 

Bus 2x clock.

kCLOCK_OutputClkSrc_BusDiv4 

Bus clock div 4.

kCLOCK_OutputClkSrc_MstrOSC 

Master oscillator clock.

kCLOCK_OutputClkSrc_FircDiv6 

8M clock, FIRC/6

kCLOCK_OutputClkSrc_Sirc 

200K clock, SIRC

Enumerator
kCLOCK_OutputDiv1 

output clock = selectedClock/1U

kCLOCK_OutputDiv2 

output clock = selectedClock/2U

kCLOCK_OutputDiv4 

output clock = selectedClock/4U

kCLOCK_OutputDiv8 

output clock = selectedClock/8U

kCLOCK_OutputDiv16 

output clock = selectedClock/16U

kCLOCK_OutputDiv32 

output clock = selectedClock/32U

kCLOCK_OutputDiv64 

output clock = selectedClock/64U

kCLOCK_OutputDiv128 

output clock = selectedClock/128U

Enumerator
kCLOCK_Protection_Off 

No protection, and could be changed any time.

kCLOCK_Protection_On 

Protected, and could be changed any time.

kCLOCK_Protection_OffLock 

No protection and get locked until chip reset.

kCLOCK_Protection_OnLock 

Protected and get locked until chip reset.

Enumerator
kCLOCK_IPClkSrc_BusClk 

Bus clock.

kCLOCK_IPClkSrc_Bus2xClk 

Bus 2x clock.

Enumerator
kCLOCK_PostscaleDiv1 

Mast 2X clock = clkSrc / 1.

kCLOCK_PostscaleDiv2 

Mast 2X clock = clkSrc / 2.

kCLOCK_PostscaleDiv4 

Mast 2X clock = clkSrc / 4.

kCLOCK_PostscaleDiv8 

Mast 2X clock = clkSrc / 8.

kCLOCK_PostscaleDiv16 

Mast 2X clock = clkSrc / 16.

kCLOCK_PostscaleDiv32 

Mast 2X clock = clkSrc / 32.

kCLOCK_PostscaleDiv64 

Mast 2X clock = clkSrc / 64.

kCLOCK_PostscaleDiv128 

Mast 2X clock = clkSrc / 128.

kCLOCK_PostscaleDiv256 

Mast 2X clock = clkSrc / 256.

Enumerator
kCLOCK_PllMonitorUnLockCoarse 

PLL coarse unlock, due to loss of reference clock, power unstable...etc.

kCLOCK_PllMonitorUnLockFine 

PLL fine unlock, due to loss of reference clock, power unstable...etc.

kCLOCK_PllMonitorLostofReferClk 

PLL lost reference clock.

kCLOCK_PllMonitorAll 

All PLL monitor type.

Enumerator
kPIT_CountClockSource0 

PIT count clock sourced from IP bus clock.

kPIT_CountClockSource1 

PIT count clock sourced from alternate clock 1.

kPIT_CountClockSource2 

PIT count clock sourced from alternate clock 2.

kPIT_CountClockSource3 

PIT count clock sourced from alternate clock 3.

kPIT_CountBusClock 

PIT count clock sourced from IP bus clock.

kPIT_CountCrystalClock 

PIT count clock sourced from crystal clock.

kPIT_Count8MHzIRCClock 

PIT count clock sourced from 8MHz IRC clock.

kPIT_Count200KHzIRCClock 

PIT count clock sourced from 200KHz IRC clock.

Enumerator
kEWM_LpoClockSource0 

EWM clock sourced from lpo_clk[0].

kEWM_LpoClockSource1 

EWM clock sourced from lpo_clk[1].

kEWM_LpoClockSource2 

EWM clock sourced from lpo_clk[2].

kEWM_LpoClockSource3 

EWM clock sourced from lpo_clk[3].

kEWM_Lpo8MHzIRCClock 

EWM clock sourced from 48 MHz IRC div6 clock.

kEWM_LpoCrystalClock 

EWM clock sourced from crystal clock.

kEWM_LpoBusClock 

EWM clock sourced from IPS Bus clock.

kEWM_Lpo200KHzIRCClock 

EWM clock sourced from 200KHz IRC clock.

Function Documentation

static void CLOCK_EnableClock ( clock_ip_name_t  eIpClkName)
inlinestatic
Parameters
eIpClkNameIP clock name.
static void CLOCK_DisableClock ( clock_ip_name_t  eIpClkName)
inlinestatic
Parameters
eIpClkNameIP clock name.
static void CLOCK_EnableClockInStopMode ( clock_ip_name_t  eIpClkName)
inlinestatic
Parameters
eIpClkNameIP clock name.
static void CLOCK_DisableClockInStopMode ( clock_ip_name_t  eIpClkName)
inlinestatic
Parameters
eIpClkNameIP clock name.
static void CLOCK_ConfigQsciClockSrc ( clock_ip_name_t  eQsciClkName,
clock_ip_clk_src_t  eClkSrc 
)
inlinestatic

QSCI clock could be bus or bus_2x clock. Default is bus clock.

Parameters
eQsciClkNameIP(only QSCI is valid) clock name.
eClkSrcClock source.
static void CLOCK_ConfigI2cFilterClockSrc ( clock_ip_name_t  eI2cClkName,
clock_ip_clk_src_t  eClkSrc 
)
inlinestatic

I2C filter clock could be bus or bus_2x clock. Default is bus clock.

Parameters
eI2cClkNameIP(only I2C is valid) clock name.
eClkSrcClock source.
static void CLOCK_SetSlowIrcTrim ( uint16_t  u16Trim)
inlinestatic

The factory trim value is loaded during reset. User may call this function to fine tune the 200K IRC oscillator.

Parameters
u16TrimSlow internal RC oscillator trim value.
static bool CLOCK_GetCrystalOscFailureStatus ( void  )
inlinestatic

This function should be called only when crystal osc is on and its monitor(MON_ENABLE in OSCTL2 register) is enabled.

Returns
Crystal oscillator status. true: Crystal oscillator frequency is below 680KHz(typical). false: No clock failure or crystal oscillator is off.
static void CLOCK_SetPllLossofRefererntTripPoint ( uint8_t  u8Trip)
inlinestatic

The trip point default value is 2.

Parameters
u8TripTrip point for loss of reference.
static void CLOCK_ClearPLLMonitorFlag ( clock_pll_monitor_type_t  eType)
inlinestatic
Parameters
eTypePLL monitor type.
uint32_t CLOCK_GetFreq ( clock_name_t  eClkName)
Parameters
eClkNameSystem-level clock name.
Returns
The required clock's frequency in Hz.
uint32_t CLOCK_GetIpClkSrcFreq ( clock_ip_name_t  eIpClkName)
Parameters
eIpClkNameIP clock name.
Returns
The required IP clock's frequency in Hz.
void CLOCK_SetClkin0Freq ( uint32_t  u32Freq)

It is a must to call this function in advance if system is operated by clkin0.

Parameters
u32FreqClock IN 0 frequency in Hz.
void CLOCK_SetClkin1Freq ( uint32_t  u32Freq)

It is a must to call this function in advance if system is operated by clkin1.

Parameters
u32FreqClock IN 1 frequency in Hz.
void CLOCK_SetXtalFreq ( uint32_t  u32Freq)

It is a must to call this function in advance if system is operated by crystal oscillator.

Parameters
u32FreqCrystal oscillator frequency in Hz.
void CLOCK_SetProtectionConfig ( clock_protection_config_t psConfig)
Parameters
psConfigPointer for protection configuration.
void CLOCK_SetOutputClockConfig ( clock_output_config_t psConfig)
Parameters
psConfigPointer for clock output configuration.
void CLOCK_SetClkConfig ( clock_config_t psConfig)
Parameters
psConfigPointer for clock configuration.
uint32_t CLOCK_EvaluateExtClkFreq ( void  )

This function should be called only when internal FIRC(48M) is on. The evaluated result accuracy depends on:

  1. FIRC accuracy, now it is +/-1%.
  2. Truncation error, because the external clock and FIRC is not synchronised.
  3. External clock frequency, low accuracy for lower external clock frequency.
  4. MCU mstr 2x clock.

For example, for namely 8M external clock, evaluated result may be range in 8M+/-5%.

Returns
Evaluated external frequency in Hz.
void CLOCK_EnablePLLMonitorInterrupt ( clock_pll_monitor_type_t  eType,
bool  bEnable 
)

This function should be called only when PLL is on and its reference clock is external clock. This function is for safety purpose when external clock is lost due to HW failure. The normal flow to call this function:

  1. Call CLOCK_SetClkConfig to enable PLL and external clock to feed the PLL.
  2. Call CLOCK_ClearPLLMonitorFlag.
  3. Call CLOCK_SetPllLossofRefererntTripPoint (optional, setting value is for kCLOCK_PllMonitorLostofReferClk type).
  4. Call this function.
  5. Enable OCCS interrupt with highest priority 3.
  6. When OCCS interrupt occurs, recover clock from the disaster in OCCS_DriveISRHandler function. Such kind of clock recovery is application dependent, and a demo OCCS_DriveISRHandler has been shown in fsl_clock.c
Parameters
eTypePLL monitor type.
bEnableEnable or disable.