IOMUXC driver provides APIs for pin configuration. It also supports the miscellaneous functions integrated in IOMUXC.
The MCUXpresso SDK provides a peripheral driver for the Input/Output Multiplexing Controller.
The IOMUXC, working in conjunction with the IOMUX, enables the chip to share one pad for multiple signals from different peripheral interfaces.
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| enum | _iomuxc_pull {
kIOMUXC_PullDisable = 0U,
kIOMUXC_PullDown = 2U,
kIOMUXC_PullUp = 3U
} |
| | Internal resistor pull feature selection. More...
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| enum | _iomuxc_slew_rate {
kIOMUXC_StandardSlewRate = 0U,
kIOMUXC_SlowSlewRate = 1U
} |
| | Slew rate selection. More...
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| |
| enum | _iomuxc_open_drain_enable {
kIOMUXC_OpenDrainDisable = 0U,
kIOMUXC_OpenDrainEnable = 1U
} |
| | Internal resistor pull feature enable/disable. More...
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| enum | _iomuxc_drive_strength {
kIOMUXC_StandardDriveStrength = 0U,
kIOMUXC_HighDriveStrength = 1U
} |
| | Configures the drive strength. More...
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| enum | _iomuxc_mux {
kIOMUXC_MuxAlt0 = 0U,
kIOMUXC_MuxAlt1 = 1U,
kIOMUXC_MuxAlt2 = 2U,
kIOMUXC_MuxAlt3 = 3U,
kIOMUXC_MuxAlt4 = 4U,
kIOMUXC_MuxAlt5 = 5U,
kIOMUXC_MuxAlt6 = 6U,
kIOMUXC_MuxAlt7 = 7U,
kIOMUXC_MuxAlt8 = 8U,
kIOMUXC_MuxAlt9 = 9U,
kIOMUXC_MuxAlt10 = 10U,
kIOMUXC_MuxAlt11 = 11U,
kIOMUXC_MuxAlt12 = 12U,
kIOMUXC_MuxAlt13 = 13U,
kIOMUXC_MuxAlt14 = 14U,
kIOMUXC_MuxAlt15 = 15U
} |
| | Pin mux selection. More...
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| |
| enum | _iomuxc_lock_register {
kIOMUXC_UnlockRegister = 0U,
kIOMUXC_LockRegister = 1U
} |
| | Unlock/lock the pin control register field[15:0]. More...
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| enum | _iomuxc_input_buffer_enable {
kIOMUXC_InputBufferDisable = 0U,
kIOMUXC_InputBufferEnable = 1U
} |
| | Input buffer feature enable/disable. More...
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| |
| enum | _iomuxc_output_buffer_enable {
kIOMUXC_outputBufferDisable = 0U,
kIOMUXC_outputBufferEnable = 1U
} |
| | output buffer feature enable/disable More...
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| |
| enum | iomux_digital_filter_clock_select_t {
kIOMUXC_IPGClock = 0U,
kIOMUXC_1KhzClock = 1U
} |
| | Digital filter clock selection. More...
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| |
| enum | _iomuxc_inputpin_mux {
kIOMUXC_InputMuxAlt0 = 0u,
kIOMUXC_InputMuxAlt1 = 1U,
kIOMUXC_InputMuxAlt2 = 2U,
kIOMUXC_InputMuxAlt3 = 3U
} |
| | Input pin mux selection(DAISY). More...
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| |
| enum | _iomuxc_input_inversion_enable {
kIOMUXC_InputInversionDisable = 0U,
kIOMUXC_InputInversionEnable = 1U
} |
| | Input inversion feature enable/disable. More...
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| |
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| #define | IOMUXC_SET_MUX_CONTROL_PAD(instance, iomuxc_port, pin, config) (instance)->SW_MUX_CTL_PAD[(iomuxc_port)*32U + (pin)] = *((const uint32_t *)(&config)); |
| | Sets the IOMUXC SW MUX Control Register. More...
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| |
| #define | IOMUXC_SET_INPUTPIN_CONFIG(instance, index, config) (instance)->SELECT_INPUT[index] = *((const uint32_t *)(&config)); |
| | Sets the IOMUXC input function pin configuration: the N_SELECT_INPUT_DAISY_Register. More...
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| |
| #define | IOMUXC_SET_MUX_CONTROL_PAD_RESET(instance, config) |
| | Sets the reset value for IOMUXC0 SW MUX Control Register. More...
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| |
| struct iomux_pin_config_t |
- Note
- for i.MX7ULP, the SW_MUX_CTL_PAD of IOMUXC0 and IOMUXC1 is a little different in the digital filter feature. The SW_MUX_CTL_PAD of IOMUXC1 has no digital filter feature. For this case, just ignore the digital filter fields.
| uint32_t iomux_pin_config_t::inputBufferEnable |
| uint32_t iomux_pin_config_t::outputBufferEnable |
| uint32_t iomux_pin_config_t::digitalFilterEnable |
| struct iomuxc_input_pin_config_t |
Data Fields |
| uint32_t | daisy: 2 |
| | Selects source pad for Module Input Function. More...
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uint32_t | inversion: 1 |
| | Controls the inversion of the pad->module input to instance.
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| uint32_t iomuxc_input_pin_config_t::daisy |
Refer to "Input SSS" column from "Input Mux" IOMUX Sheet.
| struct iomux_pin_reset_config_t |
Data Fields |
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uint32_t | pullSelect: 2 |
| | No-pull/pull-down/pull-up select.
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uint32_t | slewRate: 1 |
| | Standard/slow slew rate Configure.
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uint32_t | openDrainEnable: 1 |
| | Open drain enable/disable.
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uint32_t | driveStrength: 1 |
| | Standard/slow drive strength configure.
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uint32_t | lockRegister: 1 |
| | Lock/unlock the PCR field[15:0].
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| |
| #define IOMUXC_SET_MUX_CONTROL_PAD |
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instance, |
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iomuxc_port, |
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pin, |
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config |
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) |
| (instance)->SW_MUX_CTL_PAD[(iomuxc_port)*32U + (pin)] = *((const uint32_t *)(&config)); |
- Note
- Uses macro instead of inline function is to avoid the parameter type check, because the IOMUXC0 and IOMUXC1 is differnt.
- Parameters
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| instance | IOMUXC instance. It's pointer to IOMUXC0_Type or IOMUXC1_Type in the soc head file. |
| iomuxc_port | IOMUXC PORT name, please refer the enum iomuxc0_port_t and iomuxc1_port_t. |
| pin | pin number. |
| config | structure object of iomux_pin_config_t, not a pointer. |
| #define IOMUXC_SET_INPUTPIN_CONFIG |
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instance, |
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index, |
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config |
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) |
| (instance)->SELECT_INPUT[index] = *((const uint32_t *)(&config)); |
- Parameters
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| instance | IOMUXC instance. It's pointer to IOMUXC0_Type or IOMUXC1_Type in the soc head file. |
| index | register index, please refer the iomuxc0_select_input_t and iomuxc1_select_input_t. |
| config | structure object of iomuxc_input_pin_config_t, not a pointer. |
| #define IOMUXC_SET_MUX_CONTROL_PAD_RESET |
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instance, |
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config |
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Value:if ((uint32_t)instance == IOMUXC0_BASE) \
{ \
((IOMUXC0_Type *)instance)->SW_MUX_CTL_PAD_RESET0_b = *((const uint32_t *)(&config)); \
} \
else \
{ \
((IOMUXC1_Type *)instance)->SW_MUX_CTL_PAD_RESET1_b = *((const uint32_t *)(&config)); \
}
- Parameters
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| instance | IOMUXC instance. It's pointer to IOMUXC0_Type or IOMUXC1_Type in the soc head file. |
| config | structure object of iomux_pin_config_t, not a pointer. |
| Enumerator |
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| kIOMUXC_PullDisable |
Internal pull-up/down resistor is disabled.
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| kIOMUXC_PullDown |
Internal pull-down resistor is enabled.
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| kIOMUXC_PullUp |
Internal pull-up resistor is enabled.
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| Enumerator |
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| kIOMUXC_StandardSlewRate |
Standard slew rate is configured.
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| kIOMUXC_SlowSlewRate |
Slow slew rate is configured.
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| Enumerator |
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| kIOMUXC_OpenDrainDisable |
Internal pull-down resistor is disabled.
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| kIOMUXC_OpenDrainEnable |
Internal pull-up resistor is enabled.
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| Enumerator |
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| kIOMUXC_StandardDriveStrength |
Standard-drive strength is configured.
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| kIOMUXC_HighDriveStrength |
High-drive strength is configured.
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| Enumerator |
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| kIOMUXC_MuxAlt0 |
Chip-specific.
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| kIOMUXC_MuxAlt1 |
Chip-specific.
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| kIOMUXC_MuxAlt2 |
Chip-specific.
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| kIOMUXC_MuxAlt3 |
Chip-specific.
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| kIOMUXC_MuxAlt4 |
Chip-specific.
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| kIOMUXC_MuxAlt5 |
Chip-specific.
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| kIOMUXC_MuxAlt6 |
Chip-specific.
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| kIOMUXC_MuxAlt7 |
Chip-specific.
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| kIOMUXC_MuxAlt8 |
Chip-specific.
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| kIOMUXC_MuxAlt9 |
Chip-specific.
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| kIOMUXC_MuxAlt10 |
Chip-specific.
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| kIOMUXC_MuxAlt11 |
Chip-specific.
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| kIOMUXC_MuxAlt12 |
Chip-specific.
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| kIOMUXC_MuxAlt13 |
Chip-specific.
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| kIOMUXC_MuxAlt14 |
Chip-specific.
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| kIOMUXC_MuxAlt15 |
Chip-specific.
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| Enumerator |
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| kIOMUXC_UnlockRegister |
Pin Control Register fields [15:0] are not locked.
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| kIOMUXC_LockRegister |
Pin Control Register fields [15:0] are locked.
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| Enumerator |
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| kIOMUXC_InputBufferDisable |
Input buffer is disabled.
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| kIOMUXC_InputBufferEnable |
Output buffer is enabled.
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| Enumerator |
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| kIOMUXC_outputBufferDisable |
Output buffer is disabled.
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| kIOMUXC_outputBufferEnable |
Output buffer is enabled.
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| Enumerator |
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| kIOMUXC_IPGClock |
Digital filters are clocked by the IPG clock.
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| kIOMUXC_1KhzClock |
Digital filters are clocked by the 1kHz clock.
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Refer to "Input SSS" column from "Input Mux" IOMUX Sheet.
| Enumerator |
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| kIOMUXC_InputMuxAlt0 |
Chip-specific.
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| kIOMUXC_InputMuxAlt1 |
Chip-specific.
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| kIOMUXC_InputMuxAlt2 |
Chip-specific.
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| kIOMUXC_InputMuxAlt3 |
Chip-specific.
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| Enumerator |
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| kIOMUXC_InputInversionDisable |
Input inversion is disabled.
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| kIOMUXC_InputInversionEnable |
Output inversion is enabled.
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