Power Driver

Overview

Power driver provides APIs to control peripherals power and control the system power mode.

Functions
void	POWER_EnterSleep (void)
	Configures and enters in SLEEP low power mode. More...
void	POWER_EnterDeepSleep (uint32_t exclude_from_pd, uint32_t sram_retention_ctrl, uint64_t wakeup_interrupts, uint32_t hardware_wake_ctrl)
	Configures and enters in DEEP-SLEEP low power mode. More...
void	POWER_EnterPowerDown (uint32_t exclude_from_pd, uint32_t sram_retention_ctrl, uint64_t wakeup_interrupts, uint32_t cpu_retention_ctrl)
	Configures and enters in POWERDOWN low power mode. More...
void	POWER_EnterDeepPowerDown (uint32_t exclude_from_pd, uint32_t sram_retention_ctrl, uint64_t wakeup_interrupts, uint32_t wakeup_io_ctrl)
	Configures and enters in DEEPPOWERDOWN low power mode. More...
void	POWER_SetVoltageForFreq (uint32_t system_freq_hz)
	Power Library API to choose normal regulation and set the voltage for the desired operating frequency. More...

Driver version
#define	FSL_POWER_DRIVER_VERSION   (MAKE_VERSION(1, 0, 0))
	power driver version 1.0.0. More...

Macro Definition Documentation

#define FSL_POWER_DRIVER_VERSION   (MAKE_VERSION(1, 0, 0))

Function Documentation

void POWER_EnterSleep

(

void

)

Parameters

:

Returns

Nothing

void POWER_EnterDeepSleep	(	uint32_t	exclude_from_pd,
		uint32_t	sram_retention_ctrl,
		uint64_t	wakeup_interrupts,
		uint32_t	hardware_wake_ctrl
	)

Parameters

exclude_from_pd,:
sram_retention_ctrl,:
wakeup_interrupts,:
hardware_wake_ctrl,:

Returns

Nothing

     !!! IMPORTANT NOTES :

0 - CPU0 & System CLock frequency is switched to FRO12MHz and is NOT restored back by the API. 1 - CPU0 Interrupt Enable registers (NVIC->ISER) are modified by this function. They are restored back in case of CPU retention or if POWERDOWN is not taken (for instance because an interrupt is pending). 2 - The Non Maskable Interrupt (NMI) is disabled and its configuration before calling this function will be restored back if POWERDOWN is not taken (for instance because an RTC or OSTIMER interrupt is pending). 3 - The HARD FAULT handler should execute from SRAM. (The Hard fault handler should initiate a full chip reset) reset)

void POWER_EnterPowerDown	(	uint32_t	exclude_from_pd,
		uint32_t	sram_retention_ctrl,
		uint64_t	wakeup_interrupts,
		uint32_t	cpu_retention_ctrl
	)

Parameters

exclude_from_pd,:
sram_retention_ctrl,:
wakeup_interrupts,:
cpu_retention_ctrl,:	0 = CPU retention is disable / 1 = CPU retention is enabled, all other values are RESERVED.

Returns

Nothing

     !!! IMPORTANT NOTES :

0 - CPU0 & System CLock frequency is switched to FRO12MHz and is NOT restored back by the API. 1 - CPU0 Interrupt Enable registers (NVIC->ISER) are modified by this function. They are restored back in case of CPU retention or if POWERDOWN is not taken (for instance because an interrupt is pending). 2 - The Non Maskable Interrupt (NMI) is disabled and its configuration before calling this function will be restored back if POWERDOWN is not taken (for instance because an RTC or OSTIMER interrupt is pending). 3 - In case of CPU retention, it is the responsability of the user to make sure that SRAM instance containing the stack used to call this function WILL BE preserved during low power (via parameter "sram_retention_ctrl") 4 - The HARD FAULT handler should execute from SRAM. (The Hard fault handler should initiate a full chip reset) reset)

void POWER_EnterDeepPowerDown	(	uint32_t	exclude_from_pd,
		uint32_t	sram_retention_ctrl,
		uint64_t	wakeup_interrupts,
		uint32_t	wakeup_io_ctrl
	)

Parameters

exclude_from_pd,:
sram_retention_ctrl,:
wakeup_interrupts,:
wakeup_io_ctrl,:

Returns

Nothing

     !!! IMPORTANT NOTES :

0 - CPU0 & System CLock frequency is switched to FRO12MHz and is NOT restored back by the API. 1 - CPU0 Interrupt Enable registers (NVIC->ISER) are modified by this function. They are restored back if DEEPPOWERDOWN is not taken (for instance because an RTC or OSTIMER interrupt is pending). 2 - The Non Maskable Interrupt (NMI) is disabled and its configuration before calling this function will be restored back if DEEPPOWERDOWN is not taken (for instance because an RTC or OSTIMER interrupt is pending). 3 - The HARD FAULT handler should execute from SRAM. (The Hard fault handler should initiate a full chip reset)

void POWER_SetVoltageForFreq

(

uint32_t

system_freq_hz

)

Parameters

system_freq_hz

- The desired frequency (in Hertz) at which the part would like to operate, note that the voltage and flash wait states should be set before changing frequency

Returns

none