MCUXpresso SDK API Reference Manual  Rev 2.16.000
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INPUTMUX: Input Multiplexing Driver

Overview

The MCUXpresso SDK provides a driver for the Input multiplexing (INPUTMUX).
It configures the inputs to the pin interrupt block, DMA trigger, and frequency measure function. Once configured, the clock is not needed for the inputmux.

Input Multiplexing Driver operation

INPUTMUX_AttachSignal function configures the specified input

Typical use case

Refer to the driver examples codes located at <SDK_ROOT>/boards/<BOARD>/driver_examples/inputmux

Files

file  fsl_inputmux.h
 
file  fsl_inputmux_connections.h
 

Functions

void INPUTMUX_Init (INPUTMUX_Type *base)
 Initialize INPUTMUX peripheral. More...
 
void INPUTMUX_AttachSignal (INPUTMUX_Type *base, uint32_t index, inputmux_connection_t connection)
 Attaches a signal. More...
 
void INPUTMUX_EnableSignal (INPUTMUX_Type *base, inputmux_signal_t signal, bool enable)
 Enable/disable a signal. More...
 
void INPUTMUX_Deinit (INPUTMUX_Type *base)
 Deinitialize INPUTMUX peripheral. More...
 

Input multiplexing connections

enum  inputmux_connection_t {
  kINPUTMUX_Sct0In0ToSct0 = 0U + (SCT0_INMUX0 << PMUX_SHIFT) ,
  kINPUTMUX_Sai1RxBclkToSct0 = 76U + (SCT0_INMUX0 << PMUX_SHIFT) ,
  kINPUTMUX_Sai1RxSyncOutToTimer0Captsel = 64U + (TIMER0CAPTSEL0 << PMUX_SHIFT) ,
  kINPUTMUX_Sai1RxSyncOutToTimer1Captsel = 64U + (TIMER1CAPTSEL0 << PMUX_SHIFT) ,
  kINPUTMUX_Sai1RxSyncOutToTimer2Captsel = 64U + (TIMER2CAPTSEL0 << PMUX_SHIFT) ,
  kINPUTMUX_Sai1RxSyncOutToTimer3Captsel = 64U + (TIMER3CAPTSEL0 << PMUX_SHIFT) ,
  kINPUTMUX_Sai1RxSyncOutToTimer4Captsel = 64U + (TIMER4CAPTSEL0 << PMUX_SHIFT) ,
  kINPUTMUX_Sai1RxSyncOutToTimer0Trigger = 64U + (TIMER0TRIGIN << PMUX_SHIFT) ,
  kINPUTMUX_Sai1RxSyncOutToTimer1Trigger = 64U + (TIMER1TRIGIN << PMUX_SHIFT) ,
  kINPUTMUX_Sai1RxSyncOutToTimer2Trigger = 64U + (TIMER2TRIGIN << PMUX_SHIFT) ,
  kINPUTMUX_Sai1RxSyncOutToTimer3Trigger = 64U + (TIMER3TRIGIN << PMUX_SHIFT) ,
  kINPUTMUX_Sai1RxSyncOutToTimer4Trigger = 64U + (TIMER4TRIGIN << PMUX_SHIFT) ,
  kINPUTMUX_Gpio3PinEventTrig1ToSmartDma = 70U + (SMARTDMAARCHB_INMUX0 << PMUX_SHIFT) ,
  kINPUTMUX_GpioPort1Pin31ToPintsel = 63U + (PINTSEL0 << PMUX_SHIFT) ,
  kINPUTMUX_EvtgOut1AToFreqmeasRef = 9u + (FREQMEAS_REF_REG << PMUX_SHIFT) ,
  kINPUTMUX_EvtgOut1AToFreqmeasTar = 9u + (FREQMEAS_TAR_REG << PMUX_SHIFT) ,
  kINPUTMUX_Gpio3PinEventTrig1ToCmp0Trigger = 40U + (CMP0_TRIG_REG << PMUX_SHIFT) ,
  kINPUTMUX_Gpio3PinEventTrig1ToCmp1Trigger = 40U + (CMP1_TRIG_REG << PMUX_SHIFT) ,
  kINPUTMUX_Gpio3PinEventTrig1ToCmp2Trigger = 40U + (CMP2_TRIG_REG << PMUX_SHIFT) ,
  kINPUTMUX_WuuToAdc0Trigger = 65U + (ADC0_TRIG0 << PMUX_SHIFT) ,
  kINPUTMUX_WuuToAdc1Trigger = 65U + (ADC1_TRIG0 << PMUX_SHIFT) ,
  kINPUTMUX_Gpio3PinEventTrig1ToDac0Trigger = 31U + (DAC0_TRIG_REG << PMUX_SHIFT) ,
  kINPUTMUX_Gpio3PinEventTrig1ToDac1Trigger = 31U + (DAC1_TRIG_REG << PMUX_SHIFT) ,
  kINPUTMUX_Gpio3PinEventTrig1ToDac2Trigger = 31U + (DAC2_TRIG_REG << PMUX_SHIFT) ,
  kINPUTMUX_TrigIn9ToQdc0Trigger = 51U + (QDC0_TRIG_REG << PMUX_SHIFT) ,
  kINPUTMUX_TrigIn9ToQdc0Home = 51U + (QDC0_HOME_REG << PMUX_SHIFT) ,
  kINPUTMUX_TrigIn9ToQdc0Index = 51U + (QDC0_INDEX_REG << PMUX_SHIFT) ,
  kINPUTMUX_TrigIn9ToQdc0Phaseb = 51U + (QDC0_PHASEB_REG << PMUX_SHIFT) ,
  kINPUTMUX_TrigIn9ToQdc0Phasea = 51U + (QDC0_PHASEA_REG << PMUX_SHIFT) ,
  kINPUTMUX_TrigIn9ToQdc1Trigger = 51U + (QDC1_TRIG_REG << PMUX_SHIFT) ,
  kINPUTMUX_TrigIn9ToQdc1Home = 51U + (QDC1_HOME_REG << PMUX_SHIFT) ,
  kINPUTMUX_TrigIn9ToQdc1Index = 51U + (QDC1_INDEX_REG << PMUX_SHIFT) ,
  kINPUTMUX_TrigIn9ToQdc1Phaseb = 51U + (QDC1_PHASEB_REG << PMUX_SHIFT) ,
  kINPUTMUX_TrigIn9ToQdc1Phasea = 51U + (QDC1_PHASEA_REG << PMUX_SHIFT) ,
  kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm0Sm0ExtSync = 60U + (FlexPWM0_SM0_EXTSYNC_REG << PMUX_SHIFT) ,
  kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm0Sm1ExtSync = 60U + (FlexPWM0_SM1_EXTSYNC_REG << PMUX_SHIFT) ,
  kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm0Sm2ExtSync = 60U + (FlexPWM0_SM2_EXTSYNC_REG << PMUX_SHIFT) ,
  kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm0Sm3ExtSync = 60U + (FlexPWM0_SM3_EXTSYNC_REG << PMUX_SHIFT) ,
  kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm0Sm0Exta = 60U + (FlexPWM0_SM0_EXTA_REG << PMUX_SHIFT) ,
  kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm0Sm1Exta = 60U + (FlexPWM0_SM1_EXTA_REG << PMUX_SHIFT) ,
  kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm0Sm2Exta = 60U + (FlexPWM0_SM2_EXTA_REG << PMUX_SHIFT) ,
  kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm0Sm3Exta = 60U + (FlexPWM0_SM3_EXTA_REG << PMUX_SHIFT) ,
  kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm0ExtForce = 60U + (FlexPWM0_EXTFORCE_REG << PMUX_SHIFT) ,
  kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm0Fault0 = 60U + (FlexPWM0_FAULT0_REG << PMUX_SHIFT) ,
  kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm0Fault1 = 60U + (FlexPWM0_FAULT1_REG << PMUX_SHIFT) ,
  kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm0Fault2 = 60U + (FlexPWM0_FAULT2_REG << PMUX_SHIFT) ,
  kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm0Fault3 = 60U + (FlexPWM0_FAULT3_REG << PMUX_SHIFT) ,
  kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm1Sm0ExtSync = 60U + (FlexPWM1_SM0_EXTSYNC_REG << PMUX_SHIFT) ,
  kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm1Sm1ExtSync = 60U + (FlexPWM1_SM1_EXTSYNC_REG << PMUX_SHIFT) ,
  kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm1Sm2ExtSync = 60U + (FlexPWM1_SM2_EXTSYNC_REG << PMUX_SHIFT) ,
  kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm1Sm3ExtSync = 60U + (FlexPWM1_SM3_EXTSYNC_REG << PMUX_SHIFT) ,
  kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm1Sm0Exta = 60U + (FlexPWM1_SM0_EXTA_REG << PMUX_SHIFT) ,
  kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm1Sm1Exta = 60U + (FlexPWM1_SM1_EXTA_REG << PMUX_SHIFT) ,
  kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm1Sm2Exta = 60U + (FlexPWM1_SM2_EXTA_REG << PMUX_SHIFT) ,
  kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm1Sm3Exta = 60U + (FlexPWM1_SM3_EXTA_REG << PMUX_SHIFT) ,
  kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm1ExtForce = 60U + (FlexPWM1_EXTFORCE_REG << PMUX_SHIFT) ,
  kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm1Fault0 = 60U + (FlexPWM1_FAULT0_REG << PMUX_SHIFT) ,
  kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm1Fault1 = 60U + (FlexPWM1_FAULT1_REG << PMUX_SHIFT) ,
  kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm1Fault2 = 60U + (FlexPWM1_FAULT2_REG << PMUX_SHIFT) ,
  kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm1Fault3 = 60U + (FlexPWM1_FAULT3_REG << PMUX_SHIFT) ,
  kINPUTMUX_ExttrigIn1ToPwm0ExtClk = 5U + (PWM0_EXT_CLK_REG << PMUX_SHIFT) ,
  kINPUTMUX_ExttrigIn1ToPwm1ExtClk = 5U + (PWM1_EXT_CLK_REG << PMUX_SHIFT) ,
  kINPUTMUX_SincFilterCh4ToEvtgTrigger = 55U + (EVTG_TRIG0_REG << PMUX_SHIFT) ,
  kINPUTMUX_Lpflexcomm9Trig3ToUsbfsTrigger = 9U + (USBFS_TRIG_REG << PMUX_SHIFT) ,
  kINPUTMUX_Lptmr1ToTsiTrigger = 1U + (TSI_TRIG_REG << PMUX_SHIFT) ,
  kINPUTMUX_EnetPpsOut0ToExtTrigger = 47U + (EXT_TRIG0_REG << PMUX_SHIFT) ,
  kINPUTMUX_WuuToSincFilterChTrigger = 56U + (SINC_FILTER_CH0_REG << PMUX_SHIFT) ,
  kINPUTMUX_FlexioCh7ToOpamp0Trigger = 54U + (OPAMP0_TRIG_REG << PMUX_SHIFT) ,
  kINPUTMUX_FlexioCh7ToOpamp1Trigger = 54U + (OPAMP1_TRIG_REG << PMUX_SHIFT) ,
  kINPUTMUX_FlexioCh7ToOpamp2Trigger = 54U + (OPAMP2_TRIG_REG << PMUX_SHIFT) ,
  kINPUTMUX_WuuToFlexcomm0Trigger = 42U + (FLEXCOMM0_TRIG_REG << PMUX_SHIFT) ,
  kINPUTMUX_WuuToFlexcomm1Trigger = 42U + (FLEXCOMM1_TRIG_REG << PMUX_SHIFT) ,
  kINPUTMUX_WuuToFlexcomm2Trigger = 42U + (FLEXCOMM2_TRIG_REG << PMUX_SHIFT) ,
  kINPUTMUX_WuuToFlexcomm3Trigger = 42U + (FLEXCOMM3_TRIG_REG << PMUX_SHIFT) ,
  kINPUTMUX_WuuToFlexcomm4Trigger = 42U + (FLEXCOMM4_TRIG_REG << PMUX_SHIFT) ,
  kINPUTMUX_WuuToFlexcomm5Trigger = 42U + (FLEXCOMM5_TRIG_REG << PMUX_SHIFT) ,
  kINPUTMUX_WuuToFlexcomm6Trigger = 42U + (FLEXCOMM6_TRIG_REG << PMUX_SHIFT) ,
  kINPUTMUX_WuuToFlexcomm7Trigger = 42U + (FLEXCOMM7_TRIG_REG << PMUX_SHIFT) ,
  kINPUTMUX_WuuToFlexcomm8Trigger = 42U + (FLEXCOMM8_TRIG_REG << PMUX_SHIFT) ,
  kINPUTMUX_WuuToFlexcomm9Trigger = 42U + (FLEXCOMM9_TRIG_REG << PMUX_SHIFT)
}
 INPUTMUX connections type. More...
 
enum  inputmux_signal_t {
  kINPUTMUX_FlexSpi0RxToDma0Ch1Ena = 1U + (DMA0_REQ_ENABLE0_REG << ENA_SHIFT) ,
  kINPUTMUX_Evtg0Out0AToDma0Ch31Ena = 31U + (DMA0_REQ_ENABLE0_REG << ENA_SHIFT) ,
  kINPUTMUX_FlexIO0ShiftRegister2RequestToDma0Ch63Ena = 31U + (DMA0_REQ_ENABLE1_REG << ENA_SHIFT) ,
  kINPUTMUX_I3c0RxToDma0Ch95Ena = 31U + (DMA0_REQ_ENABLE2_REG << ENA_SHIFT) ,
  kINPUTMUX_Tsi0OutOfRangeToDma0Ch121Ena = 25U + (DMA0_REQ_ENABLE3_REG << ENA_SHIFT) ,
  kINPUTMUX_Evtg0Out0AToDma1Ch31Ena = 31U + (DMA1_REQ_ENABLE0_REG << ENA_SHIFT) ,
  kINPUTMUX_FlexIO0ShiftRegister2RequestToDma1Ch63Ena = 31U + (DMA1_REQ_ENABLE1_REG << ENA_SHIFT) ,
  kINPUTMUX_I3c0RxToDma1Ch95Ena = 31U + (DMA1_REQ_ENABLE2_REG << ENA_SHIFT)
}
 INPUTMUX signal enable/disable type. More...
 
#define SCT0_INMUX0   0x00U
 Periphinmux IDs.
 
#define TIMER0CAPTSEL0   0x20U
 
#define TIMER0TRIGIN   0x30U
 
#define TIMER1CAPTSEL0   0x40U
 
#define TIMER1TRIGIN   0x50U
 
#define TIMER2CAPTSEL0   0x60U
 
#define TIMER2TRIGIN   0x70U
 
#define SMARTDMAARCHB_INMUX0   0xA0U
 
#define PINTSEL0   0xC0U
 
#define FREQMEAS_REF_REG   0x180U
 
#define FREQMEAS_TAR_REG   0x184U
 
#define TIMER3CAPTSEL0   0x1A0U
 
#define TIMER3TRIGIN   0x1B0U
 
#define TIMER4CAPTSEL0   0x1C0U
 
#define TIMER4TRIGIN   0x1D0U
 
#define CMP0_TRIG_REG   0x260U
 
#define ADC0_TRIG0   0x280U
 
#define ADC1_TRIG0   0x2C0U
 
#define DAC0_TRIG_REG   0x300U
 
#define DAC1_TRIG_REG   0x320U
 
#define DAC2_TRIG_REG   0x340U
 
#define QDC0_TRIG_REG   0x360U
 
#define QDC0_HOME_REG   0x364U
 
#define QDC0_INDEX_REG   0x368U
 
#define QDC0_PHASEB_REG   0x36CU
 
#define QDC0_PHASEA_REG   0x370U
 
#define QDC1_TRIG_REG   0x380U
 
#define QDC1_HOME_REG   0x384U
 
#define QDC1_INDEX_REG   0x388U
 
#define QDC1_PHASEB_REG   0x38CU
 
#define QDC1_PHASEA_REG   0x390U
 
#define FlexPWM0_SM0_EXTSYNC_REG   0x3A0U
 
#define FlexPWM0_SM1_EXTSYNC_REG   0x3A4U
 
#define FlexPWM0_SM2_EXTSYNC_REG   0x3A8U
 
#define FlexPWM0_SM3_EXTSYNC_REG   0x3ACU
 
#define FlexPWM0_SM0_EXTA_REG   0x3B0U
 
#define FlexPWM0_SM1_EXTA_REG   0x3B4U
 
#define FlexPWM0_SM2_EXTA_REG   0x3B8U
 
#define FlexPWM0_SM3_EXTA_REG   0x3BCU
 
#define FlexPWM0_EXTFORCE_REG   0x3C0U
 
#define FlexPWM0_FAULT0_REG   0x3C4U
 
#define FlexPWM0_FAULT1_REG   0x3C8U
 
#define FlexPWM0_FAULT2_REG   0x3CCU
 
#define FlexPWM0_FAULT3_REG   0x3D0U
 
#define FlexPWM1_SM0_EXTSYNC_REG   0x3E0U
 
#define FlexPWM1_SM1_EXTSYNC_REG   0x3E4U
 
#define FlexPWM1_SM2_EXTSYNC_REG   0x3E8U
 
#define FlexPWM1_SM3_EXTSYNC_REG   0x3ECU
 
#define FlexPWM1_SM0_EXTA_REG   0x3F0U
 
#define FlexPWM1_SM1_EXTA_REG   0x3F4U
 
#define FlexPWM1_SM2_EXTA_REG   0x3F8U
 
#define FlexPWM1_SM3_EXTA_REG   0x3FCU
 
#define FlexPWM1_EXTFORCE_REG   0x400U
 
#define FlexPWM1_FAULT0_REG   0x404U
 
#define FlexPWM1_FAULT1_REG   0x408U
 
#define FlexPWM1_FAULT2_REG   0x40CU
 
#define FlexPWM1_FAULT3_REG   0x410U
 
#define PWM0_EXT_CLK_REG   0x420U
 
#define PWM1_EXT_CLK_REG   0x424U
 
#define EVTG_TRIG0_REG   0x440U
 
#define USBFS_TRIG_REG   0x480U
 
#define TSI_TRIG_REG   0x4A0U
 
#define EXT_TRIG0_REG   0x4C0U
 
#define CMP1_TRIG_REG   0x4E0U
 
#define CMP2_TRIG_REG   0x500U
 
#define SINC_FILTER_CH0_REG   0x520U
 
#define OPAMP0_TRIG_REG   0x580U
 
#define OPAMP1_TRIG_REG   0x584U
 
#define OPAMP2_TRIG_REG   0x588U
 
#define FLEXCOMM0_TRIG_REG   0x5A0U
 
#define FLEXCOMM1_TRIG_REG   0x5C0U
 
#define FLEXCOMM2_TRIG_REG   0x5E0U
 
#define FLEXCOMM3_TRIG_REG   0x600U
 
#define FLEXCOMM4_TRIG_REG   0x620U
 
#define FLEXCOMM5_TRIG_REG   0x640U
 
#define FLEXCOMM6_TRIG_REG   0x660U
 
#define FLEXCOMM7_TRIG_REG   0x680U
 
#define FLEXCOMM8_TRIG_REG   0x6A0U
 
#define FLEXCOMM9_TRIG_REG   0x6C0U
 
#define FLEXIO_TRIG0_REG   0x6E0U
 
#define DMA0_REQ_ENABLE0_REG   0x700U
 
#define DMA0_REQ_ENABLE1_REG   0x710U
 
#define DMA0_REQ_ENABLE2_REG   0x720U
 
#define DMA0_REQ_ENABLE3_REG   0x730U
 
#define DMA1_REQ_ENABLE0_REG   0x780U
 
#define DMA1_REQ_ENABLE1_REG   0x790U
 
#define DMA1_REQ_ENABLE2_REG   0x7A0U
 
#define DMA1_REQ_ENABLE3_REG   0x7B0U
 
#define ENA_SHIFT   8U
 
#define PMUX_SHIFT   20U
 

Driver version

#define FSL_INPUTMUX_DRIVER_VERSION   (MAKE_VERSION(2, 0, 7))
 Group interrupt driver version for SDK.
 

Enumeration Type Documentation

enum inputmux_connection_t
Enumerator
kINPUTMUX_Sct0In0ToSct0 

SCT0 INMUX.

kINPUTMUX_Sai1RxBclkToSct0 

TIMER0 CAPTSEL.

kINPUTMUX_Sai1RxSyncOutToTimer0Captsel 

TIMER1 CAPTSEL.

kINPUTMUX_Sai1RxSyncOutToTimer1Captsel 

TIMER2 CAPTSEL.

kINPUTMUX_Sai1RxSyncOutToTimer2Captsel 

TIMER3 CAPTSEL.

kINPUTMUX_Sai1RxSyncOutToTimer3Captsel 

Timer4 CAPTSEL.

kINPUTMUX_Sai1RxSyncOutToTimer4Captsel 

TIMER0 Trigger.

kINPUTMUX_Sai1RxSyncOutToTimer0Trigger 

TIMER1 Trigger.

kINPUTMUX_Sai1RxSyncOutToTimer1Trigger 

TIMER2 Trigger.

kINPUTMUX_Sai1RxSyncOutToTimer2Trigger 

TIMER3 Trigger.

kINPUTMUX_Sai1RxSyncOutToTimer3Trigger 

TIMER4 Trigger.

kINPUTMUX_Sai1RxSyncOutToTimer4Trigger 

SMARTDMA arch B inputs.

kINPUTMUX_Gpio3PinEventTrig1ToSmartDma 

Pin interrupt select.

kINPUTMUX_GpioPort1Pin31ToPintsel 

Selection for frequency measurement reference clock.

kINPUTMUX_EvtgOut1AToFreqmeasRef 

Selection for frequency measurement target clock.

kINPUTMUX_EvtgOut1AToFreqmeasTar 

Cmp0 Trigger.

kINPUTMUX_Gpio3PinEventTrig1ToCmp0Trigger 

Cmp1 Trigger.

kINPUTMUX_Gpio3PinEventTrig1ToCmp1Trigger 

Cmp2 Trigger.

kINPUTMUX_Gpio3PinEventTrig1ToCmp2Trigger 

Adc0 Trigger.

kINPUTMUX_WuuToAdc0Trigger 

Adc1 Trigger.

kINPUTMUX_WuuToAdc1Trigger 

Dac0 Trigger.

kINPUTMUX_Gpio3PinEventTrig1ToDac0Trigger 

Dac1 Trigger.

kINPUTMUX_Gpio3PinEventTrig1ToDac1Trigger 

Dac2 Trigger.

kINPUTMUX_Gpio3PinEventTrig1ToDac2Trigger 

QDC0 Trigger Input Connections.

kINPUTMUX_TrigIn9ToQdc0Trigger 

QDC0 Home Input Connections.

kINPUTMUX_TrigIn9ToQdc0Home 

QDC0 Index Input Connections.

kINPUTMUX_TrigIn9ToQdc0Index 

QDC0 Phaseb Input Connections.

kINPUTMUX_TrigIn9ToQdc0Phaseb 

QDC0 Phasea Input Connections.

kINPUTMUX_TrigIn9ToQdc0Phasea 

QDC1 Trigger Input Connections.

kINPUTMUX_TrigIn9ToQdc1Trigger 

QDC1 Home Input Connections.

kINPUTMUX_TrigIn9ToQdc1Home 

QDC1 Index Input Connections.

kINPUTMUX_TrigIn9ToQdc1Index 

QDC1 Phaseb Input Connections.

kINPUTMUX_TrigIn9ToQdc1Phaseb 

QDC1 Phasea Input Connections.

kINPUTMUX_TrigIn9ToQdc1Phasea 

FlexPWM0_SM0_EXTSYNC input trigger connections.

kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm0Sm0ExtSync 

FlexPWM0_SM1_EXTSYNC input trigger connections.

kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm0Sm1ExtSync 

FlexPWM0_SM2_EXTSYNC2 input trigger connections.

kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm0Sm2ExtSync 

FlexPWM0_SM3_EXTSYNC input trigger connections.

kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm0Sm3ExtSync 

FlexPWM0_SM0_EXTA input trigger connections.

kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm0Sm0Exta 

FlexPWM0_SM1_EXTA input trigger connections.

kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm0Sm1Exta 

FlexPWM0_SM2_EXTA input trigger connections.

kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm0Sm2Exta 

FlexPWM0_SM3_EXTA input trigger connections.

kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm0Sm3Exta 

FlexPWM0_EXTFORCE input trigger connections.

kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm0ExtForce 

FlexPWM0_FAULT0 input trigger connections.

kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm0Fault0 

FlexPWM0_FAULT1 input trigger connections.

kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm0Fault1 

FlexPWM0_FAULT2 input trigger connections.

kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm0Fault2 

FlexPWM0_FAULT3 input trigger connections.

kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm0Fault3 

FlexPWM1_SM0_EXTSYNC input trigger connections.

kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm1Sm0ExtSync 

FlexPWM1_SM1_EXTSYNC input trigger connections.

kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm1Sm1ExtSync 

FlexPWM1_SM2_EXTSYNC2 input trigger connections.

kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm1Sm2ExtSync 

FlexPWM1_SM3_EXTSYNC input trigger connections.

kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm1Sm3ExtSync 

FlexPWM1_SM0_EXTA input trigger connections.

kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm1Sm0Exta 

FlexPWM1_SM1_EXTA input trigger connections.

kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm1Sm1Exta 

FlexPWM1_SM2_EXTA input trigger connections.

kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm1Sm2Exta 

FlexPWM1_SM3_EXTA input trigger connections.

kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm1Sm3Exta 

FlexPWM1_EXTFORCE input trigger connections.

kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm1ExtForce 

FlexPWM1_FAULT0 input trigger connections.

kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm1Fault0 

FlexPWM1_FAULT1 input trigger connections.

kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm1Fault1 

FlexPWM1_FAULT2 input trigger connections.

kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm1Fault2 

FlexPWM1_FAULT3 input trigger connections.

kINPUTMUX_Gpio3PinEventTrig1ToFlexPwm1Fault3 

PWM0 external clock trigger.

kINPUTMUX_ExttrigIn1ToPwm0ExtClk 

PWM1 external clock trigger.

kINPUTMUX_ExttrigIn1ToPwm1ExtClk 

EVTG trigger input connections.

kINPUTMUX_SincFilterCh4ToEvtgTrigger 

USB-FS trigger input connections.

kINPUTMUX_Lpflexcomm9Trig3ToUsbfsTrigger 

TSI trigger input connections.

kINPUTMUX_Lptmr1ToTsiTrigger 

EXT trigger connections.

kINPUTMUX_EnetPpsOut0ToExtTrigger 

SINC Filter channel trigger input connections.

kINPUTMUX_WuuToSincFilterChTrigger 

OPAMP0 trigger input connections.

kINPUTMUX_FlexioCh7ToOpamp0Trigger 

OPAMP1 trigger input connections.

kINPUTMUX_FlexioCh7ToOpamp1Trigger 

OPAMP2 trigger input connections.

kINPUTMUX_FlexioCh7ToOpamp2Trigger 

FLEXCOMM0 trigger input connections.

kINPUTMUX_WuuToFlexcomm0Trigger 

FLEXCOMM1 trigger input connections.

kINPUTMUX_WuuToFlexcomm1Trigger 

FLEXCOMM2 trigger input connections.

kINPUTMUX_WuuToFlexcomm2Trigger 

FLEXCOMM3 trigger input connections.

kINPUTMUX_WuuToFlexcomm3Trigger 

FLEXCOMM4 trigger input connections.

kINPUTMUX_WuuToFlexcomm4Trigger 

FLEXCOMM5 trigger input connections.

kINPUTMUX_WuuToFlexcomm5Trigger 

FLEXCOMM6 trigger input connections.

kINPUTMUX_WuuToFlexcomm6Trigger 

FLEXCOMM7 trigger input connections.

kINPUTMUX_WuuToFlexcomm7Trigger 

FLEXCOMM8 trigger input connections.

kINPUTMUX_WuuToFlexcomm8Trigger 

FLEXCOMM9 trigger input connections.

kINPUTMUX_WuuToFlexcomm9Trigger 

FlexIO trigger input connections.

enum inputmux_signal_t
Enumerator
kINPUTMUX_FlexSpi0RxToDma0Ch1Ena 

DMA0 REQ ENABLE0 signal.

kINPUTMUX_Evtg0Out0AToDma0Ch31Ena 

DMA0 REQ ENABLE1 signal.

kINPUTMUX_FlexIO0ShiftRegister2RequestToDma0Ch63Ena 

DMA0 REQ ENABLE2 signal.

kINPUTMUX_I3c0RxToDma0Ch95Ena 

DMA0 REQ ENABLE3 signal.

kINPUTMUX_Tsi0OutOfRangeToDma0Ch121Ena 

DMA1 REQ ENABLE0 signal.

kINPUTMUX_Evtg0Out0AToDma1Ch31Ena 

DMA1 REQ ENABLE1 signal.

kINPUTMUX_FlexIO0ShiftRegister2RequestToDma1Ch63Ena 

DMA1 REQ ENABLE2 signal.

kINPUTMUX_I3c0RxToDma1Ch95Ena 

DMA1 REQ ENABLE3 signal.

Function Documentation

void INPUTMUX_Init ( INPUTMUX_Type *  base)

This function enables the INPUTMUX clock.

Parameters
baseBase address of the INPUTMUX peripheral.
Return values
None.
void INPUTMUX_AttachSignal ( INPUTMUX_Type *  base,
uint32_t  index,
inputmux_connection_t  connection 
)

This function attaches multiplexed signals from INPUTMUX to target signals. For example, to attach GPIO PORT0 Pin 5 to PINT peripheral, do the following:

* INPUTMUX_AttachSignal(INPUTMUX, 2, kINPUTMUX_GpioPort0Pin5ToPintsel);
*

In this example, INTMUX has 8 registers for PINT, PINT_SEL0~PINT_SEL7. With parameter index specified as 2, this function configures register PINT_SEL2.

Parameters
baseBase address of the INPUTMUX peripheral.
indexThe serial number of destination register in the group of INPUTMUX registers with same name.
connectionApplies signal from source signals collection to target signal.
Return values
None.
void INPUTMUX_EnableSignal ( INPUTMUX_Type *  base,
inputmux_signal_t  signal,
bool  enable 
)

This function gates the INPUTPMUX clock.

Parameters
baseBase address of the INPUTMUX peripheral.
signalEnable signal register id and bit offset.
enableSelects enable or disable.
Return values
None.
void INPUTMUX_Deinit ( INPUTMUX_Type *  base)

This function disables the INPUTMUX clock.

Parameters
baseBase address of the INPUTMUX peripheral.
Return values
None.