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MCUXpresso SDK API Reference Manual
Rev 2.16.000
NXP Semiconductors
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This section describes the programming interface of the SPI DMA driver.
Files | |
file | fsl_spi.h |
Data Structures | |
struct | _spi_delay_config |
SPI delay time configure structure. More... | |
struct | _spi_master_config |
SPI master user configure structure. More... | |
struct | _spi_slave_config |
SPI slave user configure structure. More... | |
struct | _spi_transfer |
SPI transfer structure. More... | |
struct | _spi_half_duplex_transfer |
SPI half-duplex(master only) transfer structure. More... | |
struct | _spi_config |
Internal configuration structure used in 'spi' and 'spi_dma' driver. More... | |
struct | _spi_master_handle |
SPI transfer handle structure. More... | |
Macros | |
#define | SPI_DUMMYDATA (0x00U) |
SPI dummy transfer data, the data is sent while txBuff is NULL. More... | |
#define | SPI_RETRY_TIMES 0U /* Define to zero means keep waiting until the flag is assert/deassert. */ |
Retry times for waiting flag. More... | |
Typedefs | |
typedef enum _spi_xfer_option | spi_xfer_option_t |
SPI transfer option. More... | |
typedef enum _spi_shift_direction | spi_shift_direction_t |
SPI data shifter direction options. More... | |
typedef enum _spi_clock_polarity | spi_clock_polarity_t |
SPI clock polarity configuration. More... | |
typedef enum _spi_clock_phase | spi_clock_phase_t |
SPI clock phase configuration. More... | |
typedef enum _spi_txfifo_watermark | spi_txfifo_watermark_t |
txFIFO watermark values | |
typedef enum _spi_rxfifo_watermark | spi_rxfifo_watermark_t |
rxFIFO watermark values | |
typedef enum _spi_data_width | spi_data_width_t |
Transfer data width. | |
typedef enum _spi_ssel | spi_ssel_t |
Slave select. | |
typedef enum _spi_spol | spi_spol_t |
ssel polarity | |
typedef struct _spi_delay_config | spi_delay_config_t |
SPI delay time configure structure. More... | |
typedef struct _spi_master_config | spi_master_config_t |
SPI master user configure structure. More... | |
typedef struct _spi_slave_config | spi_slave_config_t |
SPI slave user configure structure. More... | |
typedef struct _spi_transfer | spi_transfer_t |
SPI transfer structure. | |
typedef struct _spi_half_duplex_transfer | spi_half_duplex_transfer_t |
SPI half-duplex(master only) transfer structure. | |
typedef struct _spi_config | spi_config_t |
Internal configuration structure used in 'spi' and 'spi_dma' driver. | |
typedef struct _spi_master_handle | spi_master_handle_t |
Master handle type. | |
typedef spi_master_handle_t | spi_slave_handle_t |
Slave handle type. | |
typedef void(* | spi_master_callback_t )(SPI_Type *base, spi_master_handle_t *handle, status_t status, void *userData) |
SPI master callback for finished transmit. | |
typedef void(* | spi_slave_callback_t )(SPI_Type *base, spi_slave_handle_t *handle, status_t status, void *userData) |
SPI slave callback for finished transmit. | |
typedef void(* | flexcomm_spi_master_irq_handler_t )(SPI_Type *base, spi_master_handle_t *handle) |
Typedef for master interrupt handler. More... | |
typedef void(* | flexcomm_spi_slave_irq_handler_t )(SPI_Type *base, spi_slave_handle_t *handle) |
Typedef for slave interrupt handler. More... | |
Enumerations | |
enum | _spi_xfer_option { kSPI_FrameDelay = (SPI_FIFOWR_EOF_MASK), kSPI_FrameAssert = (SPI_FIFOWR_EOT_MASK) } |
SPI transfer option. More... | |
enum | _spi_shift_direction { kSPI_MsbFirst = 0U, kSPI_LsbFirst = 1U } |
SPI data shifter direction options. More... | |
enum | _spi_clock_polarity { kSPI_ClockPolarityActiveHigh = 0x0U, kSPI_ClockPolarityActiveLow } |
SPI clock polarity configuration. More... | |
enum | _spi_clock_phase { kSPI_ClockPhaseFirstEdge = 0x0U, kSPI_ClockPhaseSecondEdge } |
SPI clock phase configuration. More... | |
enum | _spi_txfifo_watermark { kSPI_TxFifo0 = 0, kSPI_TxFifo1 = 1, kSPI_TxFifo2 = 2, kSPI_TxFifo3 = 3, kSPI_TxFifo4 = 4, kSPI_TxFifo5 = 5, kSPI_TxFifo6 = 6, kSPI_TxFifo7 = 7 } |
txFIFO watermark values More... | |
enum | _spi_rxfifo_watermark { kSPI_RxFifo1 = 0, kSPI_RxFifo2 = 1, kSPI_RxFifo3 = 2, kSPI_RxFifo4 = 3, kSPI_RxFifo5 = 4, kSPI_RxFifo6 = 5, kSPI_RxFifo7 = 6, kSPI_RxFifo8 = 7 } |
rxFIFO watermark values More... | |
enum | _spi_data_width { kSPI_Data4Bits = 3, kSPI_Data5Bits = 4, kSPI_Data6Bits = 5, kSPI_Data7Bits = 6, kSPI_Data8Bits = 7, kSPI_Data9Bits = 8, kSPI_Data10Bits = 9, kSPI_Data11Bits = 10, kSPI_Data12Bits = 11, kSPI_Data13Bits = 12, kSPI_Data14Bits = 13, kSPI_Data15Bits = 14, kSPI_Data16Bits = 15 } |
Transfer data width. More... | |
enum | _spi_ssel { kSPI_Ssel0 = 0, kSPI_Ssel1 = 1, kSPI_Ssel2 = 2, kSPI_Ssel3 = 3 } |
Slave select. More... | |
enum | _spi_spol |
ssel polarity | |
enum | { kStatus_SPI_Busy = MAKE_STATUS(kStatusGroup_LPC_SPI, 0), kStatus_SPI_Idle = MAKE_STATUS(kStatusGroup_LPC_SPI, 1), kStatus_SPI_Error = MAKE_STATUS(kStatusGroup_LPC_SPI, 2), kStatus_SPI_BaudrateNotSupport, kStatus_SPI_Timeout = MAKE_STATUS(kStatusGroup_LPC_SPI, 4) } |
SPI transfer status. More... | |
enum | _spi_interrupt_enable { kSPI_RxLvlIrq = SPI_FIFOINTENSET_RXLVL_MASK, kSPI_TxLvlIrq = SPI_FIFOINTENSET_TXLVL_MASK } |
SPI interrupt sources. More... | |
enum | _spi_statusflags { kSPI_TxEmptyFlag = SPI_FIFOSTAT_TXEMPTY_MASK, kSPI_TxNotFullFlag = SPI_FIFOSTAT_TXNOTFULL_MASK, kSPI_RxNotEmptyFlag = SPI_FIFOSTAT_RXNOTEMPTY_MASK, kSPI_RxFullFlag = SPI_FIFOSTAT_RXFULL_MASK } |
SPI status flags. More... | |
Variables | |
volatile uint8_t | s_dummyData [] |
SPI default SSEL COUNT. More... | |
Driver version | |
#define | FSL_SPI_DRIVER_VERSION (MAKE_VERSION(2, 3, 2)) |
SPI driver version. More... | |
struct _spi_delay_config |
Note: The DLY register controls several programmable delays related to SPI signalling, it stands for how many SPI clock time will be inserted. The maxinun value of these delay time is 15.
Data Fields | |
uint8_t | preDelay |
Delay between SSEL assertion and the beginning of transfer. More... | |
uint8_t | postDelay |
Delay between the end of transfer and SSEL deassertion. More... | |
uint8_t | frameDelay |
Delay between frame to frame. More... | |
uint8_t | transferDelay |
Delay between transfer to transfer. More... | |
uint8_t _spi_delay_config::preDelay |
uint8_t _spi_delay_config::postDelay |
uint8_t _spi_delay_config::frameDelay |
uint8_t _spi_delay_config::transferDelay |
struct _spi_master_config |
Data Fields | |
bool | enableLoopback |
Enable loopback for test purpose. | |
bool | enableMaster |
Enable SPI at initialization time. | |
spi_clock_polarity_t | polarity |
Clock polarity. | |
spi_clock_phase_t | phase |
Clock phase. | |
spi_shift_direction_t | direction |
MSB or LSB. | |
uint32_t | baudRate_Bps |
Baud Rate for SPI in Hz. | |
spi_data_width_t | dataWidth |
Width of the data. | |
spi_ssel_t | sselNum |
Slave select number. | |
spi_spol_t | sselPol |
Configure active CS polarity. | |
uint8_t | txWatermark |
txFIFO watermark | |
uint8_t | rxWatermark |
rxFIFO watermark | |
spi_delay_config_t | delayConfig |
Delay configuration. More... | |
spi_delay_config_t _spi_master_config::delayConfig |
struct _spi_slave_config |
Data Fields | |
bool | enableSlave |
Enable SPI at initialization time. | |
spi_clock_polarity_t | polarity |
Clock polarity. | |
spi_clock_phase_t | phase |
Clock phase. | |
spi_shift_direction_t | direction |
MSB or LSB. | |
spi_data_width_t | dataWidth |
Width of the data. | |
spi_spol_t | sselPol |
Configure active CS polarity. | |
uint8_t | txWatermark |
txFIFO watermark | |
uint8_t | rxWatermark |
rxFIFO watermark | |
struct _spi_transfer |
Data Fields | |
const uint8_t * | txData |
Send buffer. | |
uint8_t * | rxData |
Receive buffer. | |
uint32_t | configFlags |
Additional option to control transfer, spi_xfer_option_t. More... | |
size_t | dataSize |
Transfer bytes. | |
uint32_t _spi_transfer::configFlags |
struct _spi_half_duplex_transfer |
Data Fields | |
const uint8_t * | txData |
Send buffer. | |
uint8_t * | rxData |
Receive buffer. | |
size_t | txDataSize |
Transfer bytes for transmit. | |
size_t | rxDataSize |
Transfer bytes. | |
uint32_t | configFlags |
Transfer configuration flags, spi_xfer_option_t. More... | |
bool | isPcsAssertInTransfer |
If PCS pin keep assert between transmit and receive. More... | |
bool | isTransmitFirst |
True for transmit first and false for receive first. More... | |
uint32_t _spi_half_duplex_transfer::configFlags |
bool _spi_half_duplex_transfer::isPcsAssertInTransfer |
true for assert and false for deassert.
bool _spi_half_duplex_transfer::isTransmitFirst |
struct _spi_config |
struct _spi_master_handle |
Data Fields | |
const uint8_t *volatile | txData |
Transfer buffer. | |
uint8_t *volatile | rxData |
Receive buffer. | |
volatile size_t | txRemainingBytes |
Number of data to be transmitted [in bytes]. | |
volatile size_t | rxRemainingBytes |
Number of data to be received [in bytes]. | |
volatile int8_t | toReceiveCount |
The number of data expected to receive in data width. More... | |
size_t | totalByteCount |
A number of transfer bytes. | |
volatile uint32_t | state |
SPI internal state. | |
spi_master_callback_t | callback |
SPI callback. | |
void * | userData |
Callback parameter. | |
uint8_t | dataWidth |
Width of the data [Valid values: 1 to 16]. | |
uint8_t | sselNum |
Slave select number to be asserted when transferring data [Valid values: 0 to 3]. | |
uint32_t | configFlags |
Additional option to control transfer. | |
uint8_t | txWatermark |
txFIFO watermark | |
uint8_t | rxWatermark |
rxFIFO watermark | |
volatile int8_t _spi_master_handle::toReceiveCount |
Since the received count and sent count should be the same to complete the transfer, if the sent count is x and the received count is y, toReceiveCount is x-y.
#define FSL_SPI_DRIVER_VERSION (MAKE_VERSION(2, 3, 2)) |
#define SPI_DUMMYDATA (0x00U) |
#define SPI_RETRY_TIMES 0U /* Define to zero means keep waiting until the flag is assert/deassert. */ |
typedef enum _spi_xfer_option spi_xfer_option_t |
typedef enum _spi_shift_direction spi_shift_direction_t |
typedef enum _spi_clock_polarity spi_clock_polarity_t |
typedef enum _spi_clock_phase spi_clock_phase_t |
typedef struct _spi_delay_config spi_delay_config_t |
Note: The DLY register controls several programmable delays related to SPI signalling, it stands for how many SPI clock time will be inserted. The maxinun value of these delay time is 15.
typedef struct _spi_master_config spi_master_config_t |
typedef struct _spi_slave_config spi_slave_config_t |
typedef void(* flexcomm_spi_master_irq_handler_t)(SPI_Type *base, spi_master_handle_t *handle) |
typedef void(* flexcomm_spi_slave_irq_handler_t)(SPI_Type *base, spi_slave_handle_t *handle) |
enum _spi_xfer_option |
enum _spi_shift_direction |
enum _spi_clock_polarity |
enum _spi_clock_phase |
enum _spi_data_width |
enum _spi_ssel |
anonymous enum |
enum _spi_statusflags |
volatile uint8_t s_dummyData[] |
Global variable for dummy data value setting.