![]() |
ISSDK
1.7
IoT Sensing Software Development Kit
|
The fxlc95000.h contains the FXLC95000L Digital Accelerometer command definitions and access macros. The commands and definitions are valid only when ISF1P195K GetAccelDataWithCI is running on FXLC95000. Refer to Section 2 of FXLC95000CL Data Sheet for details on ISF and associated ISF1P195K_SW_REFERENCE_RM for ISF1P195K software. More...
Go to the source code of this file.
Macros | |
#define | FXLC95000_HDR_SIZE 4 |
Size of fixed header bytes in sensor commands. More... | |
#define | FXLC95000_SAMPLE_OFFSET 16 |
Time stamp and XYZ Data Register Offset. More... | |
#define | FXLC95000_BUILD_ID_OFFSET 12 |
Offset of 2-Byte ISF1.1_95k_Build_ID in Device Info Response. More... | |
#define | FXLC95000_BUILD_ID_SIZE 2 |
The FXLC95000 Size of ISF1.1_95k_Build_ID. More... | |
#define | FXLC95000_BUILD_ID 0x36C2 |
The FXLC95000 BCD encoded ISF1.1_95k_Build_ID. More... | |
#define | FXLC95000_RESERVED_ID 0xFFFF |
The FXLC95000 Reserved filed bytes. More... | |
#define | FXLC95000_PART_NUMBER_OFFSET 14 |
Offset of 2-Byte SA95000 Part Number in Device Info Response. More... | |
#define | FXLC95000_PART_NUMBER_SIZE 2 |
The FXLC95000 Size of Part Number. More... | |
#define | FXLC95000_PART_NUMBER 0x5000 |
The FXLC95000 2-byte packed BCD encoded Part Number (BCD for Last 4 characters). More... | |
#define | FXLC95000_I2C_ADDRESS 0x4C |
The FXLC95000 I2C Slave Address. More... | |
#define | FXLC95000_SET_ODR_CMD_HDR 0x02, 0x02, 0x03, 0x04 |
The FXLC95000 Set Report Rate Command Header Bytes. More... | |
#define | FXLC95000_SET_RESOLUTION_CMD_HDR 0x02, 0x02, 0x07, 0x01 |
The FXLC95000 Set Resolution Command Header Bytes. More... | |
#define | FXLC95000_SET_RANGE_CMD_HDR 0x02, 0x02, 0x08, 0x01 |
The FXLC95000 Set Range Command Header Bytes. More... | |
#define | FXLC95000_SST_ODR_PAYLOAD(x) (x & 0xFF000000) >> 24, (x & 0xFF0000) >> 16, (x & 0xFF00) >> 8, (x & 0xFF) |
The FXLC95000 Set Report Rate Payload Bytes. More... | |
#define | FXLC95000_ACCEL_RANGE_2G 0x40 |
The FXLC95000 FS Range 2G. More... | |
#define | FXLC95000_ACCEL_RANGE_4G 0x80 |
The FXLC95000 FS Range 4G. More... | |
#define | FXLC95000_ACCEL_RANGE_8G 0xC0 |
The FXLC95000 FS Range 8G. More... | |
#define | FXLC95000_ACCEL_RESOLUTION_10_BIT 0x0C |
The FXLC95000 Resoultion 10-Bit. More... | |
#define | FXLC95000_ACCEL_RESOLUTION_12_BIT 0x08 |
The FXLC95000 Resoultion 12-Bit. More... | |
#define | FXLC95000_ACCEL_RESOLUTION_14_BIT 0x04 |
The FXLC95000 Resoultion 14-Bit. More... | |
#define | FXLC95000_ACCEL_RESOLUTION_16_BIT 0x00 |
The FXLC95000 Resoultion 16-Bit. More... | |
The fxlc95000.h contains the FXLC95000L Digital Accelerometer command definitions and access macros. The commands and definitions are valid only when ISF1P195K GetAccelDataWithCI is running on FXLC95000. Refer to Section 2 of FXLC95000CL Data Sheet for details on ISF and associated ISF1P195K_SW_REFERENCE_RM for ISF1P195K software.
Definition in file fxlc95000.h.
#define FXLC95000_ACCEL_RANGE_2G 0x40 |
The FXLC95000 FS Range 2G.
Definition at line 55 of file fxlc95000.h.
#define FXLC95000_ACCEL_RANGE_4G 0x80 |
The FXLC95000 FS Range 4G.
Definition at line 58 of file fxlc95000.h.
#define FXLC95000_ACCEL_RANGE_8G 0xC0 |
The FXLC95000 FS Range 8G.
Definition at line 61 of file fxlc95000.h.
#define FXLC95000_ACCEL_RESOLUTION_10_BIT 0x0C |
The FXLC95000 Resoultion 10-Bit.
Definition at line 64 of file fxlc95000.h.
#define FXLC95000_ACCEL_RESOLUTION_12_BIT 0x08 |
The FXLC95000 Resoultion 12-Bit.
Definition at line 67 of file fxlc95000.h.
#define FXLC95000_ACCEL_RESOLUTION_14_BIT 0x04 |
The FXLC95000 Resoultion 14-Bit.
Definition at line 70 of file fxlc95000.h.
#define FXLC95000_ACCEL_RESOLUTION_16_BIT 0x00 |
The FXLC95000 Resoultion 16-Bit.
Definition at line 73 of file fxlc95000.h.
#define FXLC95000_BUILD_ID 0x36C2 |
The FXLC95000 BCD encoded ISF1.1_95k_Build_ID.
Definition at line 25 of file fxlc95000.h.
Referenced by fxlc95000_enSensor(), and main().
#define FXLC95000_BUILD_ID_OFFSET 12 |
Offset of 2-Byte ISF1.1_95k_Build_ID in Device Info Response.
Definition at line 19 of file fxlc95000.h.
#define FXLC95000_BUILD_ID_SIZE 2 |
The FXLC95000 Size of ISF1.1_95k_Build_ID.
Definition at line 22 of file fxlc95000.h.
#define FXLC95000_HDR_SIZE 4 |
Size of fixed header bytes in sensor commands.
Definition at line 13 of file fxlc95000.h.
#define FXLC95000_I2C_ADDRESS 0x4C |
The FXLC95000 I2C Slave Address.
Definition at line 40 of file fxlc95000.h.
#define FXLC95000_PART_NUMBER 0x5000 |
The FXLC95000 2-byte packed BCD encoded Part Number (BCD for Last 4 characters).
Definition at line 37 of file fxlc95000.h.
#define FXLC95000_PART_NUMBER_OFFSET 14 |
Offset of 2-Byte SA95000 Part Number in Device Info Response.
Definition at line 31 of file fxlc95000.h.
#define FXLC95000_PART_NUMBER_SIZE 2 |
The FXLC95000 Size of Part Number.
Definition at line 34 of file fxlc95000.h.
#define FXLC95000_RESERVED_ID 0xFFFF |
The FXLC95000 Reserved filed bytes.
Definition at line 28 of file fxlc95000.h.
#define FXLC95000_SAMPLE_OFFSET 16 |
Time stamp and XYZ Data Register Offset.
Definition at line 16 of file fxlc95000.h.
#define FXLC95000_SET_ODR_CMD_HDR 0x02, 0x02, 0x03, 0x04 |
The FXLC95000 Set Report Rate Command Header Bytes.
Definition at line 43 of file fxlc95000.h.
#define FXLC95000_SET_RANGE_CMD_HDR 0x02, 0x02, 0x08, 0x01 |
The FXLC95000 Set Range Command Header Bytes.
Definition at line 49 of file fxlc95000.h.
#define FXLC95000_SET_RESOLUTION_CMD_HDR 0x02, 0x02, 0x07, 0x01 |
The FXLC95000 Set Resolution Command Header Bytes.
Definition at line 46 of file fxlc95000.h.
#define FXLC95000_SST_ODR_PAYLOAD | ( | x | ) | (x & 0xFF000000) >> 24, (x & 0xFF0000) >> 16, (x & 0xFF00) >> 8, (x & 0xFF) |
The FXLC95000 Set Report Rate Payload Bytes.
Definition at line 52 of file fxlc95000.h.