Read Guidance

This document consists of sections titled with Driver Overview, Data Structures, Enumerations, Functions, etc., each with an overview list and detailed documentation. It is recommended to read the Driver Overview first for it includes a comprehensive description of the peripheral, driver and driver changes. Other sections give detailed information for APIs, enums, macros, etc., for your further reference.

Driver Overview
	CADC Peripheral and Driver Overview
	Content including 1) peripheral features, work logic and work method; 2) driver design logic and use method; 3) typical use case.

	The Driver Change Log
	The current CADC driver version is 2.0.0.

Data Structures
struct	cadc_sample_slot_independentParallel_mode_disabled_t
	The structure of the disabled sample slots in independent parallel mode. More...

union	cadc_sample_slot_disabled_t
	The union of disabled sample slot for each scan mode. More...

struct	cadc_sample_slot_config_t
	The structure for configuring the sample slot. More...

struct	cadc_scan_ctrl_seq_mode_t
	Cadc scan control for sequential scan mode. More...

struct	cadc_scan_ctrl_simultParallel_mode_t
	Cadc scan control for simultaneous parallel scan mode. More...

struct	cadc_scan_ctrl_independent_parallel_mode_converterA_t
	The scan ctrl struture for converterA in independent scan mode. More...

struct	cadc_scan_ctrl_independent_parallel_mode_converterB_t
	The scan ctrl struture for converterB in independent scan mode. More...

union	cadc_scan_ctrl_independent_parallel_mode_t
	The union for converters in independent parallel mode. More...

union	cadc_scan_control_t
	The union of the scan control for each scan mode. More...

struct	cadc_converter_config_t
	The structure for configuring each converter. More...

struct	cadc_config_t
	The structure for configuring the Cyclic ADC's setting. More...

Enumerations
enum	_cadc_misc_status_flags { kCADC_ZeroCrossingInterruptFlag = ADC_STAT_ZCI_MASK, kCADC_HighLimitInterruptFlag = ADC_STAT_HLMTI_MASK, kCADC_LowLimitInterruptFlag = ADC_STAT_LLMTI_MASK, kCADC_ConverterAInProgressFlag = ADC_STAT_CIP0_MASK, kCADC_ConverterBInProgressFlag = ADC_STAT_CIP1_MASK, kCADC_ConverterAEndOfScanFlag = ADC_STAT_EOSI0_MASK, kCADC_ConverterBEndOfScanFlag = ADC_STAT_EOSI1_MASK }
	CADC miscellaneous status flags used to tell peripheral's miscellaneous status, such as zerocrossing, end of scan flags. More...

enum	_cadc_converter_power_status_flags { kCADC_ConverterAPowerDownFlag = ADC_PWR_PSTS0_MASK, kCADC_ConverterBPowerDownFlag = ADC_PWR_PSTS1_MASK }
	The enumeration of converter power status. More...

enum	_cadc_interrupt_enable { kCADC_Sample0ScanInterruptEnable = 1UL << 0UL, kCADC_Sample1ScanInterruptEnable = 1UL << 1UL, kCADC_Sample2ScanInterruptEnable = 1UL << 2UL, kCADC_Sample3ScanInterruptEnable = 1UL << 3UL, kCADC_Sample4ScanInterruptEnable = 1UL << 4UL, kCADC_Sample5ScanInterruptEnable = 1UL << 5UL, kCADC_Sample6ScanInterruptEnable = 1UL << 6UL, kCADC_Sample7ScanInterruptEnable = 1UL << 7UL, kCADC_Sample8ScanInterruptEnable = 1UL << 8UL, kCADC_Sample9ScanInterruptEnable = 1UL << 9UL, kCADC_Sample10ScanInterruptEnable = 1UL << 10UL, kCADC_Sample11ScanInterruptEnable = 1UL << 11UL, kCADC_Sample12ScanInterruptEnable = 1UL << 12UL, kCADC_Sample13ScanInterruptEnable = 1UL << 13UL, kCADC_Sample14ScanInterruptEnable = 1UL << 14UL, kCADC_Sample15ScanInterruptEnable = 1UL << 15UL, kCADC_Sample16ScanInterruptEnable = 1UL << 16UL, kCADC_Sample17ScanInterruptEnable = 1UL << 17UL, kCADC_Sample18ScanInterruptEnable = 1UL << 18UL, kCADC_Sample19ScanInterruptEnable = 1UL << 19UL, kCADC_HighLimitInterruptEnable = ((uint32_t)ADC_CTRL1_HLMTIE_MASK << 16UL), kCADC_LowLimitInterruptEnable = ((uint32_t)ADC_CTRL1_LLMTIE_MASK << 16UL), kCADC_ZeroCrossingInterruptEnable = ((uint32_t)ADC_CTRL1_ZCIE_MASK << 16UL), kCADC_ConversionCompleteInterrupt0Enable = ((uint32_t)ADC_CTRL1_EOSIE0_MASK << 16UL), kCADC_ConversionCompleteInterrupt1Enable = ((uint32_t)ADC_CTRL2_EOSIE1_MASK << 12UL) }
	CADC Interrupts enumeration. More...

enum	cadc_converter_id_t { kCADC_ConverterA = 0x1U, kCADC_ConverterB = 0x2U }
	CADC Converter identifier. More...

enum	cadc_idle_work_mode_t { kCADC_IdleKeepNormal = 0U, kCADC_IdleAutoPowerDown }
	The enumeration of work mode when the module is not used. More...

enum	cadc_dma_trigger_source_t { kCADC_DMATrigSrcEndofScan = 0U, kCADC_DMATrigSrcSampleReady = 1U }
	The enumeration of DMA trigger source. More...

enum	cadc_scan_mode_t { kCADC_ScanModeOnceSequential = 0U, kCADC_ScanModeOnceParallelIndependent = 1U, kCADC_ScanModeLoopSequential = 2U, kCADC_ScanModeLoopParallelIndependent = 3U, kCADC_ScanModeTriggeredSequential = 4U, kCADC_ScanModeTriggeredParallelIndependent = 5U, kCADC_ScanModeOnceParallelSimultaneous = 1U << 4U, kCADC_ScanModeLoopParallelSimultaneous = 3U << 4U, kCADC_ScanModeTriggeredParallelSimultaneous = 5U << 4U }
	The enumeration of dual converter's scan mode. More...

enum	cadc_reference_voltage_source_t { kCADC_ReferenceVoltageVrefPad = 0U, kCADC_ReferenceVoltageChannelPad = 1U }
	The enumeration of converter's reference voltage source. More...

enum	cadc_channel_gain_t { kCADC_SignalGainX1 = 0U, kCADC_SignalGainX2 = 1U, kCADC_SignalGainX4 = 2U }
	The enumeration of sample slot connected channel gain. More...

enum	cadc_channel_mode_t { kCADC_ANA0_1_SingleEnd = 1UL << 0UL, kCADC_ANA0_1_FullyDifferential = 2UL << 0UL, kCADC_ANA0_1_UnipolarDifferential = 3UL << 0UL, kCADC_ANA2_3_SingleEnd = 1UL << 3UL, kCADC_ANA2_3_FullyDifferential = 2UL << 3UL, kCADC_ANA2_3_UnipolarDifferential = 3UL << 3UL, kCADC_ANB0_1_SingleEnd = 1UL << 6UL, kCADC_ANB0_1_FullyDifferential = 2UL << 6UL, kCADC_ANB0_1_UnipolarDifferential = 3UL << 6UL, kCADC_ANB2_3_SingleEnd = 1UL << 9UL, kCADC_ANB2_3_FullyDifferential = 2UL << 9UL, kCADC_ANB2_3_UnipolarDifferential = 3UL << 9UL, kCADC_ANA4_5_SingleEnd = 1UL << 12UL, kCADC_ANA4_5_FullyDifferential = 2UL << 12UL, kCADC_ANA4_5_UnipolarDifferential = 3UL << 12UL, kCADC_ANA6_7_SingleEnd = 1UL << 15UL, kCADC_ANA6_7_FullyDifferential = 2UL << 15UL, kCADC_ANA6_7_UnipolarDifferential = 3UL << 15UL, kCADC_ANA6_InternalTempSensor_ANA7_Normal = 4UL << 15UL, kCADC_ANA6_Normal_ANA7_InternalAnalogInput = 5UL << 15UL, kCADC_ANA6_InternalTempSensor_ANA7_InternalAnalogInput = 6UL << 15UL, kCADC_ANB4_5_SingleEnd = 1UL << 18UL, kCADC_ANB4_5_FullyDifferential = 2UL << 18UL, kCADC_ANB4_5_UnipolarDifferential = 3UL << 18UL, kCADC_ANB6_7_SingleEnd = 1UL << 21UL, kCADC_ANB6_7_FullyDifferential = 2UL << 21UL, kCADC_ANB6_7_UnipolarDifferential = 3UL << 21UL, kCADC_ANB6_InternalTempSensor_ANB7_Normal = 4UL << 21UL, kCADC_ANB6_Normal_ANB7_InternalAnalogInput = 5UL << 21UL, kCADC_ANB6_InternalTempSensor_ANB7_InternalAnalogInput = 6UL << 21UL }
	The enumeration of all channels' channel mode. More...

enum	cadc_channel_number_t { kCADC_SingleEndANA0_DiffANA0pANA1n = 0U, kCADC_SingleEndANA1_DiffANA0pANA1n = 1U, kCADC_SingleEndANA2_DiffANA2pANA3n = 2U, kCADC_SingleEndANA3_DiffANA2pANA3n = 3U, kCADC_SingleEndANA4_DiffANA4pANA5n = 4U, kCADC_SingleEndANA5_DiffANA4pANA5n = 5U, kCADC_SingleEndANA6_DiffANA6pANA7n = 6U, kCADC_SingleEndANA7_DiffANA6pANA7n = 7U, kCADC_SingleEndANB0_DiffANB0pANB1n = 8U, kCADC_SingleEndANB1_DiffANB0pANB1n = 9U, kCADC_SingleEndANB2_DiffANB2pANB3n = 10U, kCADC_SingleEndANB3_DiffANB2pANB3n = 11U, kCADC_SingleEndANB4_DiffANB4pANB5n = 12U, kCADC_SingleEndANB5_DiffANB4pANB5n = 13U, kCADC_SingleEndANB6_DiffANB6pANB7n = 14U, kCADC_SingleEndANB7_DiffANB6pANB7n = 15U, kCADC_ADCATemperatureSensor = 16U, kCADC_ADCAAnalogInput = 17U, kCADC_ADCBTemperatureSensor = 18U, kCADC_ADCBAnalogInput = 19U }
	The enumerator of all channels that can be routed to the specific sample slot. More...

enum	cadc_sample_slot_mask_t { , kCADC_SampleSlot0Mask = 1UL << 0UL, kCADC_SampleSlot1Mask = 1UL << 1UL, kCADC_SampleSlot2Mask = 1UL << 2UL, kCADC_SampleSlot3Mask = 1UL << 3UL, kCADC_SampleSlot4Mask = 1UL << 4UL, kCADC_SampleSlot5Mask = 1UL << 5UL, kCADC_SampleSlot6Mask = 1UL << 6UL, kCADC_SampleSlot7Mask = 1UL << 7UL, kCADC_SampleSlot8Mask = 1UL << 8UL, kCADC_SampleSlot9Mask = 1UL << 9UL, kCADC_SampleSlot10Mask = 1UL << 10UL, kCADC_SampleSlot11Mask = 1UL << 11UL, kCADC_SampleSlot12Mask = 1UL << 12UL, kCADC_SampleSlot13Mask = 1UL << 13UL, kCADC_SampleSlot14Mask = 1UL << 14UL, kCADC_SampleSlot15Mask = 1UL << 15UL, kCADC_SampleSlot16Mask = 1UL << 16UL, kCADC_SampleSlot17Mask = 1UL << 17UL, kCADC_SampleSlot18Mask = 1UL << 18UL, kCADC_SampleSlot19Mask = 1UL << 19UL, kCADC_AllSampleSlotsMask = 0xFFFFFUL }
	The enumeration of sample slot mask. More...

enum	cadc_sample_slot_index_t { kCADC_SampleSlot0Index = 0U, kCADC_SampleSlot1Index = 1U, kCADC_SampleSlot2Index = 2U, kCADC_SampleSlot3Index = 3U, kCADC_SampleSlot4Index = 4U, kCADC_SampleSlot5Index = 5U, kCADC_SampleSlot6Index = 6U, kCADC_SampleSlot7Index = 7U, kCADC_SampleSlot8Index = 8U, kCADC_SampleSlot9Index = 9U, kCADC_SampleSlot10Index = 10U, kCADC_SampleSlot11Index = 11U, kCADC_SampleSlot12Index = 12U, kCADC_SampleSlot13Index = 13U, kCADC_SampleSlot14Index = 14U, kCADC_SampleSlot15Index = 15U, kCADC_SampleSlot16Index = 16U, kCADC_SampleSlot17Index = 17U, kCADC_SampleSlot18Index = 18U, kCADC_SampleSlot19Index = 19U }
	The enumeration of sample slot index. More...

enum	cadc_sample_slot_sequential_mode_disabled_t { kCADC_Sample0Disabled = 1UL << 0UL, kCADC_Sample1Disabled = 1UL << 1UL, kCADC_Sample2Disabled = 1UL << 2UL, kCADC_Sample3Disabled = 1UL << 3UL, kCADC_Sample4Disabled = 1UL << 4UL, kCADC_Sample5Disabled = 1UL << 5UL, kCADC_Sample6Disabled = 1UL << 6UL, kCADC_Sample7Disabled = 1UL << 7UL, kCADC_Sample8Disabled = 1UL << 8UL, kCADC_Sample9Disabled = 1UL << 9UL, kCADC_Sample10Disabled = 1UL << 10UL, kCADC_Sample11Disabled = 1UL << 11UL, kCADC_Sample12Disabled = 1UL << 12UL, kCADC_Sample13Disabled = 1UL << 13UL, kCADC_Sample14Disabled = 1UL << 14UL, kCADC_Sample15Disabled = 1UL << 15UL, kCADC_Sample16Disabled = 1UL << 16UL, kCADC_Sample17Disabled = 1UL << 17UL, kCADC_Sample18Disabled = 1UL << 18UL, kCADC_Sample19Disabled = 1UL << 19UL }
	The enumeration for the sample slot to be disabled in sequential mode. More...

enum	cadc_sample_slot_simultParallel_mode_disabled_t { kCADC_Sample0_8Disabled = 1UL << 0UL, kCADC_Sample1_9Disabled = 1UL << 1UL, kCADC_Sample2_10Disabled = 1UL << 2UL, kCADC_Sample3_11Disabled = 1UL << 3UL, kCADC_Sample4_12Disabled = 1UL << 4UL, kCADC_Sample5_13Disabled = 1UL << 5UL, kCADC_Sample6_14Disabled = 1UL << 6UL, kCADC_Sample7_15Disabled = 1UL << 7UL, kCADC_Sample16_18Disabled = 1UL << 16UL, kCADC_Sample17_19Disabled = 1UL << 17UL }
	The enumeration for the sample slot to be disabled in simultaneous parallel mode. More...

enum	cadc_sample_slot_independentParallel_mode_convA_disabled_t { kCADC_ConvASample0Disabled = 1U << 0U, kCADC_ConvASample1Disabled = 1U << 1U, kCADC_ConvASample2Disabled = 1U << 2U, kCADC_ConvASample3Disabled = 1U << 3U, kCADC_ConvASample4Disabled = 1U << 4U, kCADC_ConvASample5Disabled = 1U << 5U, kCADC_ConvASample6Disabled = 1U << 6U, kCADC_ConvASample7Disabled = 1U << 7U, kCADC_ConvASample16Disabled = (1U << (16U - 8U)), kCADC_ConvASample17Disabled = (1U << (17U - 8U)) }
	The enumeration for the sample slot to be disabled for the converter A in independent parallel mode. More...

enum	cadc_sample_slot_independentParallel_mode_convB_disabled_t { kCADC_ConvBSample8Disabled = (1UL << (8U - 8U)), kCADC_ConvBSample9Disabled = (1UL << (9U - 8U)), kCADC_ConvBSample10Disabled = (1UL << (10U - 8U)), kCADC_ConvBSample11Disabled = (1UL << (11U - 8U)), kCADC_ConvBSample12Disabled = (1UL << (12U - 8UL)), kCADC_ConvBSample13Disabled = (1UL << (13U - 8U)), kCADC_ConvBSample14Disabled = (1UL << (14U - 8U)), kCADC_ConvBSample15Disabled = (1UL << (15U - 8U)), kCADC_ConvBSample18Disabled = (1UL << (18U - 8U)), kCADC_ConvBSample19Disabled = (1UL << (19U - 8U)) }
	The enumeration for the sample slot to be disabled for the converter B in independent parallel mode. More...

enum	cadc_sample_slot_zero_crossing_mode_t { kCADC_ZeroCrossingDisabled = 0U, kCADC_ZeroCrossingForPtoNSign = 1U, kCADC_ZeroCrossingForNtoPSign = 2U, kCADC_ZeroCrossingForAnySignChanged = 3U }
	The enumeration for the sample slot's zero crossing event. More...

Driver version
#define	FSL_CADC_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))

Initialization and deinitialization Interfaces
void	CADC_Init (ADC_Type base, const cadc_config_t psConfig)
	Initializes the CADC module, such as scan mode, DMA trigger source, interrupt mask and so on. More...

void	CADC_GetDefaultConfig (cadc_config_t *psConfig)
	Gets an available pre-defined options(such as scan mode, DMA trigger source, interrupt mask and so on) for module's configuration. More...

void	CADC_Deinit (ADC_Type *base)
	De-initializes the CADC module, including power down both converter and disable the clock(Optional). More...

Scan related Interfaces
static void	CADC_SetScanMode (ADC_Type *base, cadc_scan_mode_t eScanMode)
	Sets the scan mode(such as Sequential scan mode, Simultaneous parallel scan mode, Independent parallel scan mode) of dual converters. More...

static void	CADC_SetScanControl (ADC_Type *base, cadc_scan_control_t uScanControl)
	The function provides the ability to pause and await new sync in the conversion sequence. More...

Channel control Interfaces
void	CADC_SetChannelMode (ADC_Type *base, cadc_channel_mode_t eChannelMode)
	Sets mode for the specific channel(Each channel can be set as single-end, fully differential and unipolar differential(Optional) mode). More...

void	CADC_SetChannelGain (ADC_Type *base, cadc_channel_number_t eChannelNumber, cadc_channel_gain_t eChannelGain)
	Sets the gain(Supports X1, X2, X4) of selected channel. More...

Sample Slot Control Interfaces
void	CADC_GetSampleSlotDefaultConfig (cadc_sample_slot_config_t *psConfig)
	Gets sample slot default configuration including zero crossing mode, high limit value, low limit value and offset value. More...

void	CADC_SetSampleSlotConfig (ADC_Type base, cadc_sample_slot_index_t eSampleIndex, const cadc_sample_slot_config_t psConfig)
	Configures the options(including zero crossing mode, high limit value, low limit value and offset value) for sample slot. More...

void	CADC_SetSampleSlotZeroCrossingMode (ADC_Type *base, cadc_sample_slot_index_t eSampleIndex, cadc_sample_slot_zero_crossing_mode_t eZeroCrossingMode)
	Sets zero-crossing mode for the selected sample slot. More...

void	CADC_RouteChannelToSampleSlot (ADC_Type *base, cadc_sample_slot_index_t eSampleIndex, cadc_channel_number_t eChannelNumber)
	Routes the channel to the sample slot. More...

static void	CADC_SetSampleSlotLowLimitValue (ADC_Type *base, cadc_sample_slot_index_t eSampleIndex, uint16_t u16LowLimitValue)
	Sets the low limit value(-32768 ~ 32767 with lower three bits of fixed value 0) for the specific sample slot. More...

static void	CADC_SetSampleSlotHighLimitValue (ADC_Type *base, cadc_sample_slot_index_t eSampleIndex, uint16_t u16HighLimitValue)
	Sets the high limit value(-32768 ~ 32767 with lower three bits of fixed value 0) for the specific sample slot. More...

static void	CADC_SetSampleSlotOffsetValue (ADC_Type *base, cadc_sample_slot_index_t eSampleIndex, uint16_t u16OffsetValue)
	Sets the offset value(-32768 ~ 32767 with lower three bits of fixed value 0) for the specific sample slot. More...

static uint16_t	CADC_GetSampleSlotResultValue (ADC_Type *base, cadc_sample_slot_index_t eSampleIndex)
	Gets the sample result value. More...

Converters Control Interfaces
void	CADC_GetConverterDefaultConfig (cadc_converter_config_t *psConfig)
	Gets available pre-defined settings(such as clock divisor, reference voltage source, and so on) for each converter's configuration. More...

void	CADC_SetConverterConfig (ADC_Type base, cadc_converter_id_t eConverterId, const cadc_converter_config_t psConfig)
	Configures the options(such as clock divisor, reference voltage source, and so on) for the converter. More...

static void	CADC_EnableConverter (ADC_Type *base, cadc_converter_id_t eConverterId, bool bEnable)
	Changes the converter to stop mode or normal mode. More...

static void	CADC_EnableConverterSyncInput (ADC_Type *base, cadc_converter_id_t eConverterId, bool bEnable)
	Enables/Disables the external sync input pulse to initiate a scan. More...

static void	CADC_DoSoftwareTriggerConverter (ADC_Type *base, cadc_converter_id_t eConverterId)
	Uses software trigger to start a conversion sequence. More...

static void	CADC_SetConverterClockDivisor (ADC_Type *base, cadc_converter_id_t eConverterId, uint16_t u16ClockDivisor)
	Sets clock divisor(Range from 0 to 63) for converterA and conveter B. More...

void	CADC_SetConverterReferenceVoltageSource (ADC_Type *base, cadc_converter_id_t eConverterId, cadc_reference_voltage_source_t eHighReferenceVoltage, cadc_reference_voltage_source_t eLowReferenceVoltage)
	Sets converter's reference voltage source(Including high reference voltage source and low reference voltage source). More...

void	CADC_EnableConverterPower (ADC_Type *base, cadc_converter_id_t eConverterId, bool bEnable)
	Powers up/down the specific converter. More...

static void	CADC_EnableConverterDMA (ADC_Type *base, cadc_converter_id_t eConverterId, bool bEnable)
	Enables/Disables the converter's DMA feature. More...

Power Control Interfaces
static void	CADC_SetPowerUpDelay (ADC_Type *base, uint16_t u16PowerUpDelay)
	Sets power up delay(The number of ADC clocks to power up the converters before allowing a scan to start). More...

static void	CADC_EnableAutoPowerDownMode (ADC_Type *base, bool bEnable)
	Enables/Disables auto-powerdown converters when the module is not in use for a scan. More...

DMA Control Interfaces
static void	CADC_SetDMATriggerSource (ADC_Type *base, cadc_dma_trigger_source_t eDMATriggerSource)
	Sets DMA trigger source(available selections are "End of scan" and "Sample Ready"). More...

Interrupt Control Interfaces
static void	CADC_EnableInterrupts (ADC_Type *base, uint32_t u32Mask)
	Enables the interrupts(such as high/low limit interrupts, end of scan interrupts, and so on). More...

static void	CADC_DisableInterrupts (ADC_Type *base, uint32_t u32Mask)
	Disables the interrupts(such as high/low limit interrupts, end of scan interrupts, and so on). More...

ADC Status Flag Interfaces
static uint16_t	CADC_GetMiscStatusFlags (ADC_Type *base)
	Gets Miscellaneous status flags, such as end of scan status flag, high/low limit interrupt flags and so on. More...

static void	CADC_ClearMiscStatusFlags (ADC_Type *base, uint16_t u16Flags)
	Clears Miscellaneous status flags(Only for "end of scan" status flags). More...

static uint32_t	CADC_GetSampleSlotReadyStatusFlags (ADC_Type *base)
	Gets sample slots ready status flag, those status flags are cleared by reading the corresponding sample slots' result. More...

static uint32_t	CADC_GetSampleSlotLowLimitStatusFlags (ADC_Type *base)
	Gets sample slot low limit status flags(Each bit represents one sample slot). More...

static void	CADC_ClearSampleSlotLowLimitStatusFlags (ADC_Type *base, uint32_t u32SampleMask)
	Clears sample slot's low limit status flags(Each bit represents one sample slot). More...

static uint32_t	CADC_GetSampleSlotHighLimitStatusFlags (ADC_Type *base)
	Gets sample slot high limit status flags(Each bit represents one sample slot). More...

static void	CADC_ClearSampleSlotHighLimitStatusFlags (ADC_Type *base, uint32_t u32SampleMask)
	Clears sample slot's high limit status flags(Each bit represents one sample slot). More...

static uint32_t	CADC_GetSampleSlotZeroCrossingStatusFlags (ADC_Type *base)
	Gets sample slot zero crossing status flags(Each bit represents one sample slot). More...

static void	CADC_ClearSampleSlotZeroCrossingStatusFlags (ADC_Type *base, uint32_t u32SampleMask)
	Clears sample slot's zero crossing status flags(Each bit represents one sample slot). More...

static uint16_t	CADC_GetPowerStatusFlags (ADC_Type *base)
	Gets converters power status(Those power status can not be cleared). More...

Data Structure Documentation

struct cadc_sample_slot_independentParallel_mode_disabled_t

Data Fields
cadc_sample_slot_independentParallel_mode_convA_disabled_t	eConverterA
	The sample slot to be disabled for the converter A, when the scan mode is set as independent parallel mode. More...

cadc_sample_slot_independentParallel_mode_convB_disabled_t	eConverterB
	The sample slot to be disabled for the converter B, when the scan mode is set as independent parallel mode. More...

Field Documentation

cadc_sample_slot_independentParallel_mode_convA_disabled_t cadc_sample_slot_independentParallel_mode_disabled_t::eConverterA

cadc_sample_slot_independentParallel_mode_convB_disabled_t cadc_sample_slot_independentParallel_mode_disabled_t::eConverterB

union cadc_sample_slot_disabled_t

Data Fields
uint32_t	u32SampleDisVal
	The 32 bits width of disabled sample slot value. More...

cadc_sample_slot_sequential_mode_disabled_t	eSequentialModeDisSample
	If the scan mode is selected as sequential mode, the application must use this member to set the disabled sample slot. More...

cadc_sample_slot_simultParallel_mode_disabled_t	eSimultParallelModeDisSample
	In simultaneous parallel scan mode, the application must use this member to set the disabled sample slot. More...

cadc_sample_slot_independentParallel_mode_disabled_t	sIndependentParallelModeDisSample
	In independent parallel scan mode, the application must use this member to set the disabled sample slot. More...

Field Documentation

uint32_t cadc_sample_slot_disabled_t::u32SampleDisVal

This member used to get the disabled sample slot which sets in different scan modes in word type. This member is not recommended to be used to set the disabled sample slot. This member is designed to be used in driver level only, the application should not use this member.

cadc_sample_slot_sequential_mode_disabled_t cadc_sample_slot_disabled_t::eSequentialModeDisSample

This member is used to set disabled sample slot when the scan mode is selected as sequential mode. The scan will stop at the first disabled sample slot in that mode. So for the application, this member should be set as one sample slot index that the scan will stop.

cadc_sample_slot_simultParallel_mode_disabled_t cadc_sample_slot_disabled_t::eSimultParallelModeDisSample

In that scan mode, the scan will stop when either converter encounters a disabled sample.

cadc_sample_slot_independentParallel_mode_disabled_t cadc_sample_slot_disabled_t::sIndependentParallelModeDisSample

In that scan mode, the converter will stop scan when it encounters a disabled sample slot. In this mode, the disabled sample slot for converterA and converterB may different.

struct cadc_sample_slot_config_t

Data Fields
cadc_sample_slot_zero_crossing_mode_t	eZeroCrossingMode
	Zero crossing mode. More...

uint16_t	u16HighLimitValue
	High limit value. More...

uint16_t	u16LowLimitValue
	Low limit value. More...

uint16_t	u16OffsetValue
	Offset value. More...

Field Documentation

cadc_sample_slot_zero_crossing_mode_t cadc_sample_slot_config_t::eZeroCrossingMode

uint16_t cadc_sample_slot_config_t::u16HighLimitValue

Original value formation as hardware register, with 3-bits left shifted.

uint16_t cadc_sample_slot_config_t::u16LowLimitValue

Original value formation as hardware register, with 3-bits left shifted.

uint16_t cadc_sample_slot_config_t::u16OffsetValue

Original value formation as hardware register, with 3-bits left shifted.

struct cadc_scan_ctrl_seq_mode_t

Note: Each member of this structure represent one bit of the word. Asserted the structure's member means delay sample until a new sync input occurs. Cleared the structure's member means perform sample immediately after the completion of the current sample.

Data Fields
uint32_t	bitSample0: 1U
	Control whether delay sample0 until a new sync input occurs. More...

uint32_t	bitSample1: 1U
	Control whether delay sample1 until a new sync input occurs. More...

uint32_t	bitSample2: 1U
	Control whether delay sample2 until a new sync input occurs. More...

uint32_t	bitSample3: 1U
	Control whether delay sample3 until a new sync input occurs. More...

uint32_t	bitSample4: 1U
	Control whether delay sample4 until a new sync input occurs. More...

uint32_t	bitSample5: 1U
	Control whether delay sample5 until a new sync input occurs. More...

uint32_t	bitSample6: 1U
	Control whether delay sample6 until a new sync input occurs. More...

uint32_t	bitSample7: 1U
	Control whether delay sample7 until a new sync input occurs. More...

uint32_t	bitSample8: 1U
	Control whether delay sample8 until a new sync input occurs. More...

uint32_t	bitSample9: 1U
	Control whether delay sample9 until a new sync input occurs. More...

uint32_t	bitSample10: 1U
	Control whether delay sample10 until a new sync input occurs. More...

uint32_t	bitSample11: 1U
	Control whether delay sample11 until a new sync input occurs. More...

uint32_t	bitSample12: 1U
	Control whether delay sample12 until a new sync input occurs. More...

uint32_t	bitSample13: 1U
	Control whether delay sample13 until a new sync input occurs. More...

uint32_t	bitSample14: 1U
	Control whether delay sample14 until a new sync input occurs. More...

uint32_t	bitSample15: 1U
	Control whether delay sample15 until a new sync input occurs. More...

uint32_t	bitSample16: 1U
	Control whether delay sample16 until a new sync input occurs. More...

uint32_t	bitSample17: 1U
	Control whether delay sample17 until a new sync input occurs. More...

uint32_t	bitSample18: 1U
	Control whether delay sample18 until a new sync input occurs. More...

uint32_t	bitSample19: 1U
	Control whether delay sample19 until a new sync input occurs. More...

uint32_t	bitsReserved: 12U
	Reserved 12 bits. More...

Field Documentation

uint32_t cadc_scan_ctrl_seq_mode_t::bitSample0

uint32_t cadc_scan_ctrl_seq_mode_t::bitSample1

uint32_t cadc_scan_ctrl_seq_mode_t::bitSample2

uint32_t cadc_scan_ctrl_seq_mode_t::bitSample3

uint32_t cadc_scan_ctrl_seq_mode_t::bitSample4

uint32_t cadc_scan_ctrl_seq_mode_t::bitSample5

uint32_t cadc_scan_ctrl_seq_mode_t::bitSample6

uint32_t cadc_scan_ctrl_seq_mode_t::bitSample7

uint32_t cadc_scan_ctrl_seq_mode_t::bitSample8

uint32_t cadc_scan_ctrl_seq_mode_t::bitSample9

uint32_t cadc_scan_ctrl_seq_mode_t::bitSample10

uint32_t cadc_scan_ctrl_seq_mode_t::bitSample11

uint32_t cadc_scan_ctrl_seq_mode_t::bitSample12

uint32_t cadc_scan_ctrl_seq_mode_t::bitSample13

uint32_t cadc_scan_ctrl_seq_mode_t::bitSample14

uint32_t cadc_scan_ctrl_seq_mode_t::bitSample15

uint32_t cadc_scan_ctrl_seq_mode_t::bitSample16

uint32_t cadc_scan_ctrl_seq_mode_t::bitSample17

uint32_t cadc_scan_ctrl_seq_mode_t::bitSample18

uint32_t cadc_scan_ctrl_seq_mode_t::bitSample19

uint32_t cadc_scan_ctrl_seq_mode_t::bitsReserved

struct cadc_scan_ctrl_simultParallel_mode_t

Note: Each member of this structure represent one bit of the word. Asserted the structure's member means delay sample until a new sync input occurs. Cleared the structure's member means perform sample immediately after the completion of the current sample.

Data Fields
uint32_t	bitSample0_8: 1U
	Control whether delay sample0 and sample8 until a new sync input occurs. More...

uint32_t	bitSample1_9: 1U
	Control whether delay sample1 and sample9 until a new sync input occurs. More...

uint32_t	bitSample2_10: 1U
	Control whether delay sample2 and sample10 until a new sync input occurs. More...

uint32_t	bitSample3_11: 1U
	Control whether delay sample3 and sample11 until a new sync input occurs. More...

uint32_t	bitsReserved1: 4U
	Reserved 4 bits. More...

uint32_t	bitSample4_12: 1U
	Control whether delay sample4 and sample12 until a new sync input occurs. More...

uint32_t	bitSample5_13: 1U
	Control whether delay sample5 and sample13 until a new sync input occurs. More...

uint32_t	bitSample6_14: 1U
	Control whether delay sample6 and sample14 until a new sync input occurs. More...

uint32_t	bitSample7_15: 1U
	Control whether delay sample7 and sample15 until a new sync input occurs. More...

uint32_t	bitsReserved2: 4U
	Reserved 4 bits. More...

uint32_t	bitSample16_18: 1U
	Control whether delay sample16 and sample18 until a new sync input occurs. More...

uint32_t	bitSample17_19: 1U
	Control whether delay sample17 and sample19 until a new sync input occurs. More...

uint32_t	bitsReserved3: 14U
	Reserved 14 bits. More...

Field Documentation

uint32_t cadc_scan_ctrl_simultParallel_mode_t::bitSample0_8

uint32_t cadc_scan_ctrl_simultParallel_mode_t::bitSample1_9

uint32_t cadc_scan_ctrl_simultParallel_mode_t::bitSample2_10

uint32_t cadc_scan_ctrl_simultParallel_mode_t::bitSample3_11

uint32_t cadc_scan_ctrl_simultParallel_mode_t::bitsReserved1

uint32_t cadc_scan_ctrl_simultParallel_mode_t::bitSample4_12

uint32_t cadc_scan_ctrl_simultParallel_mode_t::bitSample5_13

uint32_t cadc_scan_ctrl_simultParallel_mode_t::bitSample6_14

uint32_t cadc_scan_ctrl_simultParallel_mode_t::bitSample7_15

uint32_t cadc_scan_ctrl_simultParallel_mode_t::bitsReserved2

uint32_t cadc_scan_ctrl_simultParallel_mode_t::bitSample16_18

uint32_t cadc_scan_ctrl_simultParallel_mode_t::bitSample17_19

uint32_t cadc_scan_ctrl_simultParallel_mode_t::bitsReserved3

struct cadc_scan_ctrl_independent_parallel_mode_converterA_t

Data Fields
uint32_t	bitSample0: 1U
	Control whether delay converterA's sample0 until a new sync input occurs. More...

uint32_t	bitSample1: 1U
	Control whether delay converterA's sample1 until a new sync input occurs. More...

uint32_t	bitSample2: 1U
	Control whether delay converterA's sample2 until a new sync input occurs. More...

uint32_t	bitSample3: 1U
	Control whether delay converterA's sample3 until a new sync input occurs. More...

uint32_t	bitsReserved1: 4U
	Reserved 4 bits. More...

uint32_t	bitSample4: 1U
	Control whether delay converterA's sample4 until a new sync input occurs. More...

uint32_t	bitSample5: 1U
	Control whether delay converterA's sample5 until a new sync input occurs. More...

uint32_t	bitSample6: 1U
	Control whether delay converterA's sample6 until a new sync input occurs. More...

uint32_t	bitSample7: 1U
	Control whether delay converterA's sample7 until a new sync input occurs. More...

uint32_t	bitsReserved2: 4U
	Reserved 4 bits.

uint32_t	bitSample16: 1U
	Control whether delay converterA's sample16 until a new sync input occurs. More...

uint32_t	bitSample17: 1U
	Control whether delay converterA's sample17 until a new sync input occurs. More...

uint32_t	bitsReserved3: 14U
	Reserved 14 bits. More...

Field Documentation

uint32_t cadc_scan_ctrl_independent_parallel_mode_converterA_t::bitSample0

uint32_t cadc_scan_ctrl_independent_parallel_mode_converterA_t::bitSample1

uint32_t cadc_scan_ctrl_independent_parallel_mode_converterA_t::bitSample2

uint32_t cadc_scan_ctrl_independent_parallel_mode_converterA_t::bitSample3

uint32_t cadc_scan_ctrl_independent_parallel_mode_converterA_t::bitsReserved1

uint32_t cadc_scan_ctrl_independent_parallel_mode_converterA_t::bitSample4

uint32_t cadc_scan_ctrl_independent_parallel_mode_converterA_t::bitSample5

uint32_t cadc_scan_ctrl_independent_parallel_mode_converterA_t::bitSample6

uint32_t cadc_scan_ctrl_independent_parallel_mode_converterA_t::bitSample7

uint32_t cadc_scan_ctrl_independent_parallel_mode_converterA_t::bitSample16

uint32_t cadc_scan_ctrl_independent_parallel_mode_converterA_t::bitSample17

uint32_t cadc_scan_ctrl_independent_parallel_mode_converterA_t::bitsReserved3

struct cadc_scan_ctrl_independent_parallel_mode_converterB_t

Data Fields
uint32_t	bitsReserved1: 4U
	Reserved 4 bits. More...

uint32_t	bitSample8: 1U
	Control whether delay converterB's sample8 until a new sync input occurs. More...

uint32_t	bitSample9: 1U
	Control whether delay converterB's sample9 until a new sync input occurs. More...

uint32_t	bitSample10: 1U
	Control whether delay converterB's sample10 until a new sync input occurs. More...

uint32_t	bitSample11: 1U
	Control whether delay converterB's sample11 until a new sync input occurs. More...

uint32_t	bitsReserved2: 4U
	Reserved 4 bits. More...

uint32_t	bitSample12: 1U
	Control whether delay converterB's sample12 until a new sync input occurs. More...

uint32_t	bitSample13: 1U
	Control whether delay converterB's sample13 until a new sync input occurs. More...

uint32_t	bitSample14: 1U
	Control whether delay converterB's sample14 until a new sync input occurs. More...

uint32_t	bitSample15: 1U
	Control whether delay converterB's sample15 until a new sync input occurs. More...

uint32_t	bitsReserved3: 2U
	Reserved 2 bits. More...

uint32_t	bitSample18: 1U
	Control whether delay converterB's sample18 until a new sync input occurs. More...

uint32_t	bitSample19: 1U
	Control whether delay converterB's sample19 until a new sync input occurs. More...

uint32_t	bitsReserved4: 12U
	Reserved 12 bits. More...

Field Documentation

uint32_t cadc_scan_ctrl_independent_parallel_mode_converterB_t::bitsReserved1

uint32_t cadc_scan_ctrl_independent_parallel_mode_converterB_t::bitSample8

uint32_t cadc_scan_ctrl_independent_parallel_mode_converterB_t::bitSample9

uint32_t cadc_scan_ctrl_independent_parallel_mode_converterB_t::bitSample10

uint32_t cadc_scan_ctrl_independent_parallel_mode_converterB_t::bitSample11

uint32_t cadc_scan_ctrl_independent_parallel_mode_converterB_t::bitsReserved2

uint32_t cadc_scan_ctrl_independent_parallel_mode_converterB_t::bitSample12

uint32_t cadc_scan_ctrl_independent_parallel_mode_converterB_t::bitSample13

uint32_t cadc_scan_ctrl_independent_parallel_mode_converterB_t::bitSample14

uint32_t cadc_scan_ctrl_independent_parallel_mode_converterB_t::bitSample15

uint32_t cadc_scan_ctrl_independent_parallel_mode_converterB_t::bitsReserved3

uint32_t cadc_scan_ctrl_independent_parallel_mode_converterB_t::bitSample18

uint32_t cadc_scan_ctrl_independent_parallel_mode_converterB_t::bitSample19

uint32_t cadc_scan_ctrl_independent_parallel_mode_converterB_t::bitsReserved4

union cadc_scan_ctrl_independent_parallel_mode_t

Data Fields
cadc_scan_ctrl_independent_parallel_mode_converterA_t	sConverterA
	Scan control for converterA. More...

cadc_scan_ctrl_independent_parallel_mode_converterB_t	sConverterB
	Scan control for converterB. More...

Field Documentation

cadc_scan_ctrl_independent_parallel_mode_converterA_t cadc_scan_ctrl_independent_parallel_mode_t::sConverterA

cadc_scan_ctrl_independent_parallel_mode_converterB_t cadc_scan_ctrl_independent_parallel_mode_t::sConverterB

union cadc_scan_control_t

Data Fields
uint32_t	u32ScanCtrlVal
	The 32 bits value of the scan control value. More...

cadc_scan_ctrl_seq_mode_t	sSequential
	Scan control for sequential scan mode. More...

cadc_scan_ctrl_simultParallel_mode_t	sSimultParallel
	Scan control for simultaneous parallel scan mode. More...

cadc_scan_ctrl_independent_parallel_mode_t	uIndependentParallel
	Scan control for independent scan mode. More...

Field Documentation

uint32_t cadc_scan_control_t::u32ScanCtrlVal

cadc_scan_ctrl_seq_mode_t cadc_scan_control_t::sSequential

cadc_scan_ctrl_simultParallel_mode_t cadc_scan_control_t::sSimultParallel

cadc_scan_ctrl_independent_parallel_mode_t cadc_scan_control_t::uIndependentParallel

struct cadc_converter_config_t

Data Fields
uint16_t	u16ClockDivisor
	Converter's clock divisor for the clock source. More...

cadc_reference_voltage_source_t	eHighReferenceVoltageSource
	High voltage reference source. More...

cadc_reference_voltage_source_t	eLowReferenceVoltageSource
	Low reference voltage source. More...

bool	bEnableDMA
	Enable/Disable DMA. More...

bool	bPowerUp
	Power up or power down the converter. More...

bool	bScanInitBySync
	The member user to control the initiate method of the scan. More...

Field Documentation

uint16_t cadc_converter_config_t::u16ClockDivisor

Available setting range is 0-63.

When the clockDivisor is 0, the divisor is 2.
For all other clockDivisor values, the divisor is 1 more than the decimal value of clockDivisor: clockDivisor + 1

cadc_reference_voltage_source_t cadc_converter_config_t::eHighReferenceVoltageSource

cadc_reference_voltage_source_t cadc_converter_config_t::eLowReferenceVoltageSource

bool cadc_converter_config_t::bEnableDMA

bool cadc_converter_config_t::bPowerUp

bool cadc_converter_config_t::bScanInitBySync

true Use a SYNC input pulse or START command to initiate a scan.
false Scan is initiated by the assertion of START command only.

struct cadc_config_t

Data Fields
cadc_idle_work_mode_t	eIdleWorkMode
	Idle work mode for the module. More...

cadc_dma_trigger_source_t	eDMATriggerSource
	Selects the dma trigger source for the module. More...

uint16_t	u16PowerUpDelay
	The number of ADC clocks to power up the converters (if powered up), before allowing a scan to start. More...

uint32_t	u32EnabledInterruptMask
	The mask of the interrupts to be enabled, should be the OR'ed value of _cadc_interrupt. More...

cadc_scan_mode_t	eScanMode
	The scan mode of the module. More...

cadc_sample_slot_disabled_t	uDisabledSampleSlot
	The member used to config the which sample slot is disabled for the scan. More...

cadc_scan_control_t	uScanControl
	Scan control provides the ability to pause and await a new sync signal while current sample completed. More...

uint32_t	u32ChannelModeMask
	The mask of each channel's mode, should be the OR'ed value of cadc_channel_mode_t. More...

cadc_channel_gain_t	eChannelGain [CADC_SAMPLE_SLOTS_COUNT]
	The gain value for each channel. More...

cadc_channel_number_t	eSampleSlot [CADC_SAMPLE_SLOTS_COUNT]
	The channel assigned to each sample slot. More...

cadc_converter_config_t	sConverterA
	The configuration for converterA. More...

cadc_converter_config_t	sConverterB
	The configuration for converterB. More...

Field Documentation

cadc_idle_work_mode_t cadc_config_t::eIdleWorkMode

cadc_dma_trigger_source_t cadc_config_t::eDMATriggerSource

uint16_t cadc_config_t::u16PowerUpDelay

The available range is 0 to 63 .

uint32_t cadc_config_t::u32EnabledInterruptMask

cadc_scan_mode_t cadc_config_t::eScanMode

cadc_sample_slot_disabled_t cadc_config_t::uDisabledSampleSlot

The scan will continue until the first disabled sample slot is encountered.

cadc_scan_control_t cadc_config_t::uScanControl

uint32_t cadc_config_t::u32ChannelModeMask

Each channel supports single-end and differential(Fully differentail and Unipolar differential). Some devices also support alternate source mode.

cadc_channel_gain_t cadc_config_t::eChannelGain[CADC_SAMPLE_SLOTS_COUNT]

Each element of the array represents the gain of the channel. E.g. eChannelGain[0] means channel gain of channel0, which is ANA0.

cadc_channel_number_t cadc_config_t::eSampleSlot[CADC_SAMPLE_SLOTS_COUNT]

The index of the array represents sample slot index.

cadc_converter_config_t cadc_config_t::sConverterA

cadc_converter_config_t cadc_config_t::sConverterB

Enumeration Type Documentation

enum _cadc_misc_status_flags

Enumerator
kCADC_ZeroCrossingInterruptFlag	Zero crossing encountered. IRQ pending if enabled Zero Crossing Interrupt.
kCADC_HighLimitInterruptFlag	High limit exceeded flag. IRQ pending if enabled high limit interrupt.
kCADC_LowLimitInterruptFlag	Low limit exceeded flag. IRQ pending if enabled low limit interrupt.
kCADC_ConverterAInProgressFlag	Conversion in progress, converter A.
kCADC_ConverterBInProgressFlag	Conversion in progress, converter B.
kCADC_ConverterAEndOfScanFlag	End of scan, converter A.
kCADC_ConverterBEndOfScanFlag	End of scan, converter B.

enum _cadc_converter_power_status_flags

Enumerator
kCADC_ConverterAPowerDownFlag	The converterA is powered down.
kCADC_ConverterBPowerDownFlag	The converterB is powered down.

enum _cadc_interrupt_enable

Enumerator
kCADC_Sample0ScanInterruptEnable	If sample0 is converted, generate the scan interrupt.
kCADC_Sample1ScanInterruptEnable	If sample1 is converted, generate the scan interrupt.
kCADC_Sample2ScanInterruptEnable	If sample2 is converted, generate the scan interrupt.
kCADC_Sample3ScanInterruptEnable	If sample3 is converted, generate the scan interrupt.
kCADC_Sample4ScanInterruptEnable	If sample4 is converted, generate the scan interrupt.
kCADC_Sample5ScanInterruptEnable	If sample5 is converted, generate the scan interrupt.
kCADC_Sample6ScanInterruptEnable	If sample6 is converted, generate the scan interrupt.
kCADC_Sample7ScanInterruptEnable	If sample7 is converted, generate the scan interrupt.
kCADC_Sample8ScanInterruptEnable	If sample8 is converted, generate the scan interrupt.
kCADC_Sample9ScanInterruptEnable	If sample9 is converted, generate the scan interrupt.
kCADC_Sample10ScanInterruptEnable	If sample10 is converted, generate the scan interrupt.
kCADC_Sample11ScanInterruptEnable	If sample11 is converted, generate the scan interrupt.
kCADC_Sample12ScanInterruptEnable	If sample12 is converted, generate the scan interrupt.
kCADC_Sample13ScanInterruptEnable	If sample13 is converted, generate the scan interrupt.
kCADC_Sample14ScanInterruptEnable	If sample14 is converted, generate the scan interrupt.
kCADC_Sample15ScanInterruptEnable	If sample15 is converted, generate the scan interrupt.
kCADC_Sample16ScanInterruptEnable	If sample16 is converted, generate the scan interrupt.
kCADC_Sample17ScanInterruptEnable	If sample17 is converted, generate the scan interrupt.
kCADC_Sample18ScanInterruptEnable	If sample18 is converted, generate the scan interrupt.
kCADC_Sample19ScanInterruptEnable	If sample19 is converted, generate the scan interrupt.
kCADC_HighLimitInterruptEnable	If the result value is greater than the high limit value, generate high limit interrupt.
kCADC_LowLimitInterruptEnable	If the result value is less than the low limit value, generate low limit interrupt.
kCADC_ZeroCrossingInterruptEnable	If the current value has a sign change from the previous result in the selected zero crossing mode, generate the zero crossing mode.
kCADC_ConversionCompleteInterrupt0Enable	Upon the completion of the scan, generate the end of scan interrupt, when the scan mode is selected as sequential mode or simultaneous parallel mode. For looping scan mode, the interrupt will trigger after the completion of each iteration of loop.
kCADC_ConversionCompleteInterrupt1Enable	When the scan mode is independent parallel mode, up the completion of the converter scan, generate te end of scan interrupt. For looping scan mode, the interrupt will trigger after the completion of each iteration of loop.

enum cadc_converter_id_t

Enumerator
kCADC_ConverterA	Converter A.
kCADC_ConverterB	Converter B.

enum cadc_idle_work_mode_t

Enumerator
kCADC_IdleKeepNormal	Keep normal.
kCADC_IdleAutoPowerDown	Fall into power down mode automatically.

enum cadc_dma_trigger_source_t

Enumerator
kCADC_DMATrigSrcEndofScan	DMA trigger source is end of scan interrupt.
kCADC_DMATrigSrcSampleReady	DMA trigger source is RDY bits.

enum cadc_scan_mode_t

Enumerator
kCADC_ScanModeOnceSequential	Once (single) sequential.
kCADC_ScanModeOnceParallelIndependent	Once parallel independently.
kCADC_ScanModeLoopSequential	Loop sequential.
kCADC_ScanModeLoopParallelIndependent	Loop parallel independently.
kCADC_ScanModeTriggeredSequential	Triggered sequential.
kCADC_ScanModeTriggeredParallelIndependent	Triggered parallel independently.
kCADC_ScanModeOnceParallelSimultaneous	Once parallel simultaneously.
kCADC_ScanModeLoopParallelSimultaneous	Loop parallel simultaneously.
kCADC_ScanModeTriggeredParallelSimultaneous	Triggered parallel simultaneously.

enum cadc_reference_voltage_source_t

Enumerator
kCADC_ReferenceVoltageVrefPad	VREF pin.
kCADC_ReferenceVoltageChannelPad	ANx2 or ANx3 pin.

enum cadc_channel_gain_t

Enumerator
kCADC_SignalGainX1	Gain x1.
kCADC_SignalGainX2	Gain x2.
kCADC_SignalGainX4	Gain x4.

enum cadc_channel_mode_t

Enumerator
kCADC_ANA0_1_SingleEnd	ANA0 and ANA1 both configured as single ended inputs.
kCADC_ANA0_1_FullyDifferential	ANA0 configured as fully differential positive input, ANA1 configured as fully differential negative input.
kCADC_ANA0_1_UnipolarDifferential	ANA0 configured as unipolar differential positive input, ANA1 configured as unipolar differential negative input.
kCADC_ANA2_3_SingleEnd	ANA2 and ANA3 both configured as single ended inputs.
kCADC_ANA2_3_FullyDifferential	ANA2 configured as fully differential positive input, ANA3 configured as fully differential negative input.
kCADC_ANA2_3_UnipolarDifferential	ANA2 configured as unipolar differential positive input, ANA3 configured as unipolar differential negative input.
kCADC_ANB0_1_SingleEnd	ANB0 and ANB1 both configured as single ended inputs.
kCADC_ANB0_1_FullyDifferential	ANB0 configured as fully differential positive input, ANB1 configured as fully differential negative input.
kCADC_ANB0_1_UnipolarDifferential	ANB0 configured as unipolar differential positive input, ANB1 configured as unipolar differential negative input.
kCADC_ANB2_3_SingleEnd	ANB2 and ANB3 both configured as single ended inputs.
kCADC_ANB2_3_FullyDifferential	ANB2 configured as fully differential positive input, ANB3 configured as fully differential negative input.
kCADC_ANB2_3_UnipolarDifferential	ANB2 configured as unipolar differential positive input, ANB3 configured as unipolar differential negative input.
kCADC_ANA4_5_SingleEnd	ANA4 and ANA5 both configured as single ended inputs.
kCADC_ANA4_5_FullyDifferential	ANA4 configured as fully differential positive input, ANA5 configured as fully differential negative input.
kCADC_ANA4_5_UnipolarDifferential	ANA4 configured as unipolar differential positive input, ANA5 configured as unipolar differential negative input.
kCADC_ANA6_7_SingleEnd	ANA6 and ANA7 both configured as single ended inputs.
kCADC_ANA6_7_FullyDifferential	ANA6 configured as fully differential positive input, ANA7 configured as fully differential negative input.
kCADC_ANA6_7_UnipolarDifferential	ANA6 configured as unipolar differential positive input, ANA7 configured as unipolar differential negative input.
kCADC_ANA6_InternalTempSensor_ANA7_Normal	ANA6 configured as Internal temperature sensor, ANA7 configured as normal single-end operate mode.
kCADC_ANA6_Normal_ANA7_InternalAnalogInput	ANA6 configured as normal single-end operate mode, ANA7 configuread as internal analog input.
kCADC_ANA6_InternalTempSensor_ANA7_InternalAnalogInput	ANA6 configured as internal temperature sensor, ANA7 configured as internal analog input.
kCADC_ANB4_5_SingleEnd	ANB4 and ANB5 both configured as single ended inputs.
kCADC_ANB4_5_FullyDifferential	ANB4 configured as fully differential positive input, ANB5 configured as fully differential negative input.
kCADC_ANB4_5_UnipolarDifferential	ANB4 configured as unipolar differential positive input, ANB5 configured as unipolar differential negative input.
kCADC_ANB6_7_SingleEnd	ANB6 and ANB7 both configured as single ended inputs.
kCADC_ANB6_7_FullyDifferential	ANB6 configured as fully differential positive input, ANB7 configured as fully differential negative input.
kCADC_ANB6_7_UnipolarDifferential	ANB6 configured as unipolar differential positive input, ANB7 configured as unipolar differential negative input.
kCADC_ANB6_InternalTempSensor_ANB7_Normal	ANB6 configured as internal temperature sensor, ANB7 configured as normal single-end operate mode.
kCADC_ANB6_Normal_ANB7_InternalAnalogInput	ANB6 configured as normal single-end operate mode, ANB7 configuread as internal analog input.
kCADC_ANB6_InternalTempSensor_ANB7_InternalAnalogInput	ANB6 configured as internal temperature sensor, ANB7 configured as internal analog input.

enum cadc_channel_number_t

Enumerator
kCADC_SingleEndANA0_DiffANA0pANA1n	Single Endned ANA0 Signal Or Differential ANA0+, ANA1- signal.
kCADC_SingleEndANA1_DiffANA0pANA1n	Single Endned ANA1 Signal Or Differential ANA0+, ANA1- signal.
kCADC_SingleEndANA2_DiffANA2pANA3n	Single Endned ANA2 Signal Or Differential ANA2+, ANA3- signal.
kCADC_SingleEndANA3_DiffANA2pANA3n	Single Endned ANA3 Signal Or Differential ANA2+, ANA3- signal.
kCADC_SingleEndANA4_DiffANA4pANA5n	Single Endned ANA4 Signal Or Differential ANA4+, ANA5- signal.
kCADC_SingleEndANA5_DiffANA4pANA5n	Single Endned ANA5 Signal Or Differential ANA4+, ANA5- signal.
kCADC_SingleEndANA6_DiffANA6pANA7n	Single Endned ANA6 Signal Or Differential ANA6+, ANA7- signal.
kCADC_SingleEndANA7_DiffANA6pANA7n	Single Endned ANA7 Signal Or Differential ANA6+, ANA7- signal.
kCADC_SingleEndANB0_DiffANB0pANB1n	Single Endned ANB0 Signal Or Differential ANB0+, ANB1- signal.
kCADC_SingleEndANB1_DiffANB0pANB1n	Single Endned ANB1 Signal Or Differential ANB0+, ANB1- signal.
kCADC_SingleEndANB2_DiffANB2pANB3n	Single Endned ANB2 Signal Or Differential ANB2+, ANB3- signal.
kCADC_SingleEndANB3_DiffANB2pANB3n	Single Endned ANB3 Signal Or Differential ANB2+, ANB3- signal.
kCADC_SingleEndANB4_DiffANB4pANB5n	Single Endned ANB4 Signal Or Differential ANB4+, ANB5- signal.
kCADC_SingleEndANB5_DiffANB4pANB5n	Single Endned ANB5 Signal Or Differential ANB4+, ANB5- signal.
kCADC_SingleEndANB6_DiffANB6pANB7n	Single Endned ANB6 Signal Or Differential ANB6+, ANB7- signal.
kCADC_SingleEndANB7_DiffANB6pANB7n	Single Endned ANB7 Signal Or Differential ANB6+, ANB7- signal.
kCADC_ADCATemperatureSensor	Single Ended ADCA Temperature sensor.
kCADC_ADCAAnalogInput	Single Ended ADCA analog input for on-chip generated signals.
kCADC_ADCBTemperatureSensor	Single Ended ADCB Temperature sensor.
kCADC_ADCBAnalogInput	Single Ended ADCB analog input for on-chip generated signals.

enum cadc_sample_slot_mask_t

Enumerator
kCADC_SampleSlot0Mask	The mask of sample slot0.
kCADC_SampleSlot1Mask	The mask of sample slot1.
kCADC_SampleSlot2Mask	The mask of sample slot2.
kCADC_SampleSlot3Mask	The mask of sample slot3.
kCADC_SampleSlot4Mask	The mask of sample slot4.
kCADC_SampleSlot5Mask	The mask of sample slot5.
kCADC_SampleSlot6Mask	The mask of sample slot6.
kCADC_SampleSlot7Mask	The mask of sample slot7.
kCADC_SampleSlot8Mask	The mask of sample slot8.
kCADC_SampleSlot9Mask	The mask of sample slot9.
kCADC_SampleSlot10Mask	The mask of sample slot10.
kCADC_SampleSlot11Mask	The mask of sample slot11.
kCADC_SampleSlot12Mask	The mask of sample slot12.
kCADC_SampleSlot13Mask	The mask of sample slot13.
kCADC_SampleSlot14Mask	The mask of sample slot14.
kCADC_SampleSlot15Mask	The mask of sample slot15.
kCADC_SampleSlot16Mask	The mask of sample slot16.
kCADC_SampleSlot17Mask	The mask of sample slot17.
kCADC_SampleSlot18Mask	The mask of sample slot18.
kCADC_SampleSlot19Mask	The mask of sample slot19.
kCADC_AllSampleSlotsMask	The mask of all sample slots.

enum cadc_sample_slot_index_t

Enumerator
kCADC_SampleSlot0Index	The index of sample slot0.
kCADC_SampleSlot1Index	The index of sample slot1.
kCADC_SampleSlot2Index	The index of sample slot2.
kCADC_SampleSlot3Index	The index of sample slot3.
kCADC_SampleSlot4Index	The index of sample slot4.
kCADC_SampleSlot5Index	The index of sample slot5.
kCADC_SampleSlot6Index	The index of sample slot6.
kCADC_SampleSlot7Index	The index of sample slot7.
kCADC_SampleSlot8Index	The index of sample slot8.
kCADC_SampleSlot9Index	The index of sample slot9.
kCADC_SampleSlot10Index	The index of sample slot10.
kCADC_SampleSlot11Index	The index of sample slot11.
kCADC_SampleSlot12Index	The index of sample slot12.
kCADC_SampleSlot13Index	The index of sample slot13.
kCADC_SampleSlot14Index	The index of sample slot14.
kCADC_SampleSlot15Index	The index of sample slot15.
kCADC_SampleSlot16Index	The index of sample slot16.
kCADC_SampleSlot17Index	The index of sample slot17.
kCADC_SampleSlot18Index	The index of sample slot18.
kCADC_SampleSlot19Index	The index of sample slot19.

enum cadc_sample_slot_sequential_mode_disabled_t

Enumerator
kCADC_Sample0Disabled	Disable Sample slot0, the scan will stop at sample slot0 in sequential scan mode.
kCADC_Sample1Disabled	Disable Sample slot1, the scan will stop at sample slot1 in sequential scan mode.
kCADC_Sample2Disabled	Disable Sample slot2, the scan will stop at sample slot2 in sequential scan mode.
kCADC_Sample3Disabled	Disable Sample slot3, the scan will stop at sample slot3 in sequential scan mode.
kCADC_Sample4Disabled	Disable Sample slot4, the scan will stop at sample slot4 in sequential scan mode.
kCADC_Sample5Disabled	Disable Sample slot5, the scan will stop at sample slot5 in sequential scan mode.
kCADC_Sample6Disabled	Disable Sample slot6, the scan will stop at sample slot6 in sequential scan mode.
kCADC_Sample7Disabled	Disable Sample slot7, the scan will stop at sample slot7 in sequential scan mode.
kCADC_Sample8Disabled	Disable Sample slot8, the scan will stop at sample slot8 in sequential scan mode.
kCADC_Sample9Disabled	Disable Sample slot9, the scan will stop at sample slot9 in sequential scan mode.
kCADC_Sample10Disabled	Disable Sample slot10, the scan will stop at sample slot10 in sequential scan mode.
kCADC_Sample11Disabled	Disable Sample slot11, the scan will stop at sample slot11 in sequential scan mode.
kCADC_Sample12Disabled	Disable Sample slot12, the scan will stop at sample slot12 in sequential scan mode.
kCADC_Sample13Disabled	Disable Sample slot13, the scan will stop at sample slot13 in sequential scan mode.
kCADC_Sample14Disabled	Disable Sample slot14, the scan will stop at sample slot14 in sequential scan mode.
kCADC_Sample15Disabled	Disable Sample slot15, the scan will stop at sample slot15 in sequential scan mode.
kCADC_Sample16Disabled	Disable Sample slot16, the scan will stop at sample slot16 in sequential scan mode.
kCADC_Sample17Disabled	Disable Sample slot17, the scan will stop at sample slot17 in sequential scan mode.
kCADC_Sample18Disabled	Disable Sample slot18, the scan will stop at sample slot18 in sequential scan mode.
kCADC_Sample19Disabled	Disable Sample slot19, the scan will stop at sample slot19 in sequential scan mode.

enum cadc_sample_slot_simultParallel_mode_disabled_t

Enumerator
kCADC_Sample0_8Disabled	Disable Sample slot0 and Sample Slot 8, in the simultaneous parallel mode the converter A and converter B will stop at Sample slot0 and Sample slot 8.
kCADC_Sample1_9Disabled	Disable Sample slot1 and Sample Slot 9, in the simultaneous parallel mode the converter A and converter B will stop at Sample slot1 and Sample slot 9.
kCADC_Sample2_10Disabled	Disable Sample slot2 and Sample Slot 10, in the simultaneous parallel mode the converter A and converter B will stop at Sample slot2 and Sample slot 10.
kCADC_Sample3_11Disabled	Disable Sample slot3 and Sample Slot 11, in the simultaneous parallel mode the converter A and converter B will stop at Sample slot3 and Sample slot 11.
kCADC_Sample4_12Disabled	Disable Sample slot4 and Sample Slot 12, in the simultaneous parallel mode the converter A and converter B will stop at Sample slot4 and Sample slot 12.
kCADC_Sample5_13Disabled	Disable Sample slot5 and Sample Slot 13, in the simultaneous parallel mode the converter A and converter B will stop at Sample slot5 and Sample slot 13.
kCADC_Sample6_14Disabled	Disable Sample slot6 and Sample Slot 14, in the simultaneous parallel mode the converter A and converter B will stop at Sample slot7 and Sample slot 14.
kCADC_Sample7_15Disabled	Disable Sample slot7 and Sample Slot 15, in the simultaneous parallel mode the converter A and converter B will stop at Sample slot7 and Sample slot 15.
kCADC_Sample16_18Disabled	Disable Sample slot16 and Sample Slot 18, in the simultaneous parallel mode the converter A and converter B will stop at Sample slot16 and Sample slot 18.
kCADC_Sample17_19Disabled	Disable Sample slot17 and Sample Slot 19, in the simultaneous parallel mode the converter A and converter B will stop at Sample slot17 and Sample slot 19.

enum cadc_sample_slot_independentParallel_mode_convA_disabled_t

Enumerator
kCADC_ConvASample0Disabled	Disable Sample slot0, the scan will stop at sample slot0 in sequential scan mode.
kCADC_ConvASample1Disabled	Disable Sample slot1, the scan will stop at sample slot1 in sequential scan mode.
kCADC_ConvASample2Disabled	Disable Sample slot2, the scan will stop at sample slot2 in sequential scan mode.
kCADC_ConvASample3Disabled	Disable Sample slot3, the scan will stop at sample slot3 in sequential scan mode.
kCADC_ConvASample4Disabled	Disable Sample slot4, the scan will stop at sample slot4 in sequential scan mode.
kCADC_ConvASample5Disabled	Disable Sample slot5, the scan will stop at sample slot5 in sequential scan mode.
kCADC_ConvASample6Disabled	Disable Sample slot6, the scan will stop at sample slot6 in sequential scan mode.
kCADC_ConvASample7Disabled	Disable Sample slot7, the scan will stop at sample slot7 in sequential scan mode.
kCADC_ConvASample16Disabled	Disable Sample slot16, the scan will stop at sample slot16 in sequential scan mode.
kCADC_ConvASample17Disabled	Disable Sample slot17, the scan will stop at sample slot17 in sequential scan mode.

enum cadc_sample_slot_independentParallel_mode_convB_disabled_t

Enumerator
kCADC_ConvBSample8Disabled	Disable Sample slot8, the scan will stop at sample slot8 in sequential scan mode.
kCADC_ConvBSample9Disabled	Disable Sample slot9, the scan will stop at sample slot9 in sequential scan mode.
kCADC_ConvBSample10Disabled	Disable Sample slot10, the scan will stop at sample slot10 in sequential scan mode.
kCADC_ConvBSample11Disabled	Disable Sample slot11, the scan will stop at sample slot11 in sequential scan mode.
kCADC_ConvBSample12Disabled	Disable Sample slot12, the scan will stop at sample slot12 in sequential scan mode.
kCADC_ConvBSample13Disabled	Disable Sample slot13, the scan will stop at sample slot13 in sequential scan mode.
kCADC_ConvBSample14Disabled	Disable Sample slot14, the scan will stop at sample slot14 in sequential scan mode.
kCADC_ConvBSample15Disabled	Disable Sample slot15, the scan will stop at sample slot15 in sequential scan mode.
kCADC_ConvBSample18Disabled	Disable Sample slot18, the scan will stop at sample slot18 in sequential scan mode.
kCADC_ConvBSample19Disabled	Disable Sample slot19, the scan will stop at sample slot19 in sequential scan mode.

enum cadc_sample_slot_zero_crossing_mode_t

Enumerator
kCADC_ZeroCrossingDisabled	Zero Crossing disabled.
kCADC_ZeroCrossingForPtoNSign	Zero Crossing enabled for positive to negative sign change.
kCADC_ZeroCrossingForNtoPSign	Zero Crossing enabled for negative to positive sign change.
kCADC_ZeroCrossingForAnySignChanged	Zero Crossing enabled for any sign change.

Function Documentation

void CADC_Init	(	ADC_Type *	base,
		const cadc_config_t *	psConfig
	)

This function is to make the initialization for using CADC module. The operations are:

Enable the clock for CADC.
Set power up delay and Idle work mode.
Set DMA trigger source.
Enable the interrupts(Including High/Low limit interrupt, zero crossing interrupt interrupt, end of scan interrupt and each sample slot's scan interrupt).
Set scan mode.
Set disabled sample slot for the scan.
Set scan control options.
Set selected channels' mode.
Set gain for each channel.
Config conterA and converterB.

Note: The high limit value, low limit value, offset value and zerocrossing mode of each sample slot will not be configured in this function, to set those options, the APIs in "Sample Slot Control Interfaces" function group can be used.

Parameters

base	CADC peripheral base address.
psConfig	Pointer to configuration structure. See cadc_config_t.

void CADC_GetDefaultConfig ( cadc_config_t * psConfig )

This function initializes the module's configuration structure with an available settings. The default value are:

psConfig->eDMATriggerSource = kCADC_DMATrigSrcEndofScan;
psConfig->eIdleWorkMode = kCADC_IdleKeepNormal;
psConfig-s>u16PowerUpDelay = 26U;
psConfig->u32EnabledInterruptMask = 0U;
psConfig->eScanMode = kCADC_ScanModeTriggeredParallelSimultaneous;
psConfig->uDisabledSampleSlot.u32SampleDisVal = 0xFF0F0UL;
psConfig->uScanControl.u32ScanCtrlVal         = 0x0UL;
psConfig->eChannelGain[x] = kCADC_SignalGainX1;
psConfig->sampleSlotScanInterruptEnableMask = kCADC_NonSampleSlotMask;
For the default setting of converter, please see CADC_GetConverterDefaultConfig().

Parameters

psConfig Pointer to configuration structure. See cadc_config_t.

void CADC_Deinit ( ADC_Type * base )

This function is to make the de-initialization for using CADC module. The operations are:

Power down both converter.
Disable the clock for CADC.

Parameters

base	CADC peripheral base address.

static void CADC_SetScanMode	(	ADC_Type *	base,
		cadc_scan_mode_t	eScanMode
	)

inlinestatic

Parameters

base	CADC peripheral base address.
eScanMode	Dual converters' scan mode, please see cadc_scan_mode_t for details.

static void CADC_SetScanControl	(	ADC_Type *	base,
		cadc_scan_control_t	uScanControl
	)

inlinestatic

Parameters

base	CADC peripheral base address.
uScanControl	The scan control value, please refer to cadc_scan_control_t for details.

void CADC_SetChannelMode	(	ADC_Type *	base,
		cadc_channel_mode_t	eChannelMode
	)

Parameters

base	CADC peripheral base address.
eChannelMode	The channel mode to be set, please refer to cadc_channel_mode_t for details.

void CADC_SetChannelGain	(	ADC_Type *	base,
		cadc_channel_number_t	eChannelNumber,
		cadc_channel_gain_t	eChannelGain
	)

Parameters

base	CADC peripheral base address.
eChannelNumber	The number of channel, please refer to cadc_channel_number_t.
eChannelGain	The gain amplification, please refer to cadc_channel_gain_t for details.

void CADC_GetSampleSlotDefaultConfig ( cadc_sample_slot_config_t * psConfig )

psConfig->eZeroCrossingMode = kCADC_ZeroCrossingDisabled;
psConfig->u16HighLimitValue  = 0x7FF8U;
psConfig->u16LowLimitValue   = 0x0U;
psConfig->u16OffsetValue     = 0x0U;

Parameters

psConfig Pointer to configuration structure. See cadc_sample_slot_config_t.

void CADC_SetSampleSlotConfig	(	ADC_Type *	base,
		cadc_sample_slot_index_t	eSampleIndex,
		const cadc_sample_slot_config_t *	psConfig
	)

Note: This function can be used to set high limit value, low limit value, offset value and zerocrossing mode of the sample slot.

Parameters

base	CADC peripheral base address.
eSampleIndex	Index of sample slot in conversion sequence. Please refer to cadc_sample_slot_index_t.
psConfig	Pointer to configuration structure. See cadc_sample_slot_config_t.

void CADC_SetSampleSlotZeroCrossingMode	(	ADC_Type *	base,
		cadc_sample_slot_index_t	eSampleIndex,
		cadc_sample_slot_zero_crossing_mode_t	eZeroCrossingMode
	)

Parameters

base	CADC peripheral base address.
eSampleIndex	The index of sample slot. Please refer to cadc_sample_slot_index_t for details.
eZeroCrossingMode	Zero crossing mode, please refer to cadc_sample_slot_zero_crossing_mode_t for details.

void CADC_RouteChannelToSampleSlot	(	ADC_Type *	base,
		cadc_sample_slot_index_t	eSampleIndex,
		cadc_channel_number_t	eChannelNumber
	)

Parameters

base	CADC peripheral base address.
eSampleIndex	The index of sample slot, please refer to cadc_sample_slot_index_t for details.
eChannelNumber	Sample channel number, please refer to cadc_channel_number_t for details.

static void CADC_SetSampleSlotLowLimitValue	(	ADC_Type *	base,
		cadc_sample_slot_index_t	eSampleIndex,
		uint16_t	u16LowLimitValue
	)

inlinestatic

Parameters

base	CADC peripheral base address.
eSampleIndex	The index of sample slot. Please refer to cadc_sample_slot_index_t for details.
u16LowLimitValue	Low limit value(-32768 ~ 32767 with lower three bits of fixed value 0). Original value formation as hardware register, with 3-bits left shifted.

static void CADC_SetSampleSlotHighLimitValue	(	ADC_Type *	base,
		cadc_sample_slot_index_t	eSampleIndex,
		uint16_t	u16HighLimitValue
	)

inlinestatic

Parameters

base	CADC peripheral base address.
eSampleIndex	The index of sample slot. Please refer to cadc_sample_slot_index_t for details.
u16HighLimitValue	High limit value(-32768 ~ 32767 with lower three bits of fixed value 0). Original value formation as hardware register, with 3-bits left shifted.

static void CADC_SetSampleSlotOffsetValue	(	ADC_Type *	base,
		cadc_sample_slot_index_t	eSampleIndex,
		uint16_t	u16OffsetValue
	)

inlinestatic

Parameters

base	CADC peripheral base address.
eSampleIndex	The index of sample slot. Please refer to cadc_sample_slot_index_t for details.
u16OffsetValue	Offset value(-32768 ~ 32767 with lower three bits of fixed value 0). Original value formation as hardware register, with 3-bits left shifted.

static uint16_t CADC_GetSampleSlotResultValue	(	ADC_Type *	base,
		cadc_sample_slot_index_t	eSampleIndex
	)

inlinestatic

This function is to get the sample result value. The returned value keeps it original formation just like in hardware result register. It includes the sign bit as the MSB and 3-bit left shifted value.

Parameters

base	CADC peripheral base address.
eSampleIndex	Index of sample slot. For the counts of sample slots, please refer to cadc_sample_slot_index_t for details.

Returns: Sample's conversion value.

void CADC_GetConverterDefaultConfig ( cadc_converter_config_t * psConfig )

This function initializes each converter's configuration structure with an available settings. The default value are:

psConfig->u16ClockDivisor = 4U;(ADC clock = Peripheral clock / 5)
psConfig->eSpeedMode = kCADC_SpeedMode0; (Chip specific)
psConfig->eHighReferenceVoltageSource = kCADC_ReferenceVoltageVrefPad;
psConfig->eLowReferenceVoltageSource = kCADC_ReferenceVoltageVrefPad;
psConfig->u16SampleWindowCount = 0U; (Chip specific)
psConfig->bEnableDMA         = false;
psConfig->bPowerUp   = false;
psConfig->bScanInitBySync  = true;

Parameters

psConfig Pointer to configuration structure. See cadc_converter_config_t.

void CADC_SetConverterConfig	(	ADC_Type *	base,
		cadc_converter_id_t	eConverterId,
		const cadc_converter_config_t *	psConfig
	)

This function can be used to configure the converter The operations are:

Set clock divisor;
Set reference voltage source
Enable/Disable DMA
Power-up/power-down converter

Parameters

base	CADC peripheral base address.
eConverterId	The converter Id. See cadc_converter_id_t.
psConfig	Pointer to configuration structure. See cadc_converter_config_t.

static void CADC_EnableConverter	(	ADC_Type *	base,
		cadc_converter_id_t	eConverterId,
		bool	bEnable
	)

inlinestatic

The conversion should only be launched after the converter is in normal mode. When in stop mode, the current scan is stopped and no further scans can start. All the software trigger and hardware trigger are ignored.

Parameters

base	CADC peripheral base address.
eConverterId	The converter Id. See cadc_converter_id_t.
bEnable	Used to change the operation mode. true Changed to normal mode. false Changed to stop mode

static void CADC_EnableConverterSyncInput	(	ADC_Type *	base,
		cadc_converter_id_t	eConverterId,
		bool	bEnable
	)

inlinestatic

Note: When in "Once" scan mode, this gate would be off automatically after an available sync is received. User needs to enable the input again manually if another sync signal is wanted.

Parameters

base	CADC peripheral base address.
eConverterId	The converter Id. See cadc_converter_id_t.
bEnable	Enable the feature or not. true Used a SYNC input pulse or START command to initiate a scan. false Only use the START command to initiate a scan.

static void CADC_DoSoftwareTriggerConverter	(	ADC_Type *	base,
		cadc_converter_id_t	eConverterId
	)

inlinestatic

This function is to do the software trigger to the converter. The software trigger can used to start a conversion sequence.

Parameters

base	CADC peripheral base address.
eConverterId	The ID of the converter to be started. See cadc_converter_id_t.

static void CADC_SetConverterClockDivisor	(	ADC_Type *	base,
		cadc_converter_id_t	eConverterId,
		uint16_t	u16ClockDivisor
	)

inlinestatic

Parameters

base	CADC peripheral base address.
eConverterId	The converter Id. See cadc_converter_id_t.
u16ClockDivisor	Converter's clock divisor for the clock source.Available setting range is 0-63. When the clockDivisor is 0, the divisor is 2. For all other clockDivisor values, the divisor is 1 more than the decimal value of clockDivisor: clockDivisor + 1

void CADC_SetConverterReferenceVoltageSource	(	ADC_Type *	base,
		cadc_converter_id_t	eConverterId,
		cadc_reference_voltage_source_t	eHighReferenceVoltage,
		cadc_reference_voltage_source_t	eLowReferenceVoltage
	)

Parameters

base	CADC peripheral base address.
eConverterId	The converter Id. See cadc_converter_id_t.
eHighReferenceVoltage	High voltage reference source, please refer to cadc_reference_voltage_source_t.
eLowReferenceVoltage	Low voltage reference source, please refer to cadc_reference_voltage_source_t.

void CADC_EnableConverterPower	(	ADC_Type *	base,
		cadc_converter_id_t	eConverterId,
		bool	bEnable
	)

This function is to enable the power for the converter. The converter should be powered up before the conversion. Once this API is called to power up the converter, the converter would be powered on after a few moment (so-called power up delay, the function CADC_SetPowerUpDelay() can be used to set the power up delay), so that the power would be stable.

Parameters

base	CADC peripheral base address.
eConverterId	The converter to be powered. See cadc_converter_id_t.
bEnable	Powers up/down the converter. true Power up the specific converter. false Power down the specific converter.

static void CADC_EnableConverterDMA	(	ADC_Type *	base,
		cadc_converter_id_t	eConverterId,
		bool	bEnable
	)

inlinestatic

Parameters

base	CADC peripheral base address.
eConverterId	The converter id. See cadc_converter_id_t.
bEnable	Enables/Disables the DMA. true Enable the converter's DMA. false Disable the converter's DMA.

static void CADC_SetPowerUpDelay	(	ADC_Type *	base,
		uint16_t	u16PowerUpDelay
	)

inlinestatic

Parameters

base	CADC peripheral base address.
u16PowerUpDelay	The number of ADC clocks to power up an ADC converter. Ranges from 0 to 63.

static void CADC_EnableAutoPowerDownMode	(	ADC_Type *	base,
		bool	bEnable
	)

inlinestatic

Parameters

base	CADC peripheral base address.
bEnable	Enable/Disable auto-powerdown mode. true Enable auto-powerdown mode, so when the module is not in use, it will auto-powerdown. false Disable auto-powerdown mode, so when the module is not in use, the power will still on.

static void CADC_SetDMATriggerSource	(	ADC_Type *	base,
		cadc_dma_trigger_source_t	eDMATriggerSource
	)

inlinestatic

Parameters

base	CADC peripheral base address.
eDMATriggerSource	DMA trigger source. Please refer to cadc_dma_trigger_source_t for details.

static void CADC_EnableInterrupts	(	ADC_Type *	base,
		uint32_t	u32Mask
	)

inlinestatic

Parameters

base	CADC peripheral base address.
u32Mask	Mask value for converters interrupt events. Should be the OR'ed value of _cadc_interrupt_enable.

static void CADC_DisableInterrupts	(	ADC_Type *	base,
		uint32_t	u32Mask
	)

inlinestatic

Parameters

base	CADC peripheral base address.
u32Mask	Mask value for converts interrupt events. Should be the OR'ed value of _cadc_interrupt_enable.

static uint16_t CADC_GetMiscStatusFlags ( ADC_Type * base )

inlinestatic

Note: This API will return the current status of the ADC module, including high limit interrupt status, low limit status flag, zero crossing interrupt status, End of scan interrupt status, conversion in progress status. But some status flags are not included in this function. To get sample slot ready status flag, please invoking CADC_GetSampleSlotReadyStatusFlags(), to get sample slot limit violations status please invoking CADC_ClearSampleSlotLowLimitStatusFlags() and CADC_GetSampleSlotHighLimitStatusFlags(), to get zerocrossing status please invoking CADC_GetSampleSlotZeroCrossingStatusFlags(). To get converters' power status please invoke CADC_GetPowerStatusFlag().

Parameters

base	CADC peripheral base address.

Returns: Mask value for the event flags. See _cadc_misc_status_flags.

static void CADC_ClearMiscStatusFlags	(	ADC_Type *	base,
		uint16_t	u16Flags
	)

inlinestatic

Note: Only kCADC_ConverterAEndOfScanFlag and kCADC_ConverterBEndOfScanFlag can be cleared. And sample slot related status flags can not be cleared in this function. To clear the status flags of limit violations, please invoking CADC_ClearSampleSlotLowLimitStatusFlags() and CADC_ClearSampleSlotHighLimitStatusFlags(), to clear the status flags of zero crossing mode, please invoking CADC_ClearSampleSlotZeroCrossingStatusFlags().

Parameters

base	CADC peripheral base address.
flags	Mask value for the event flags to be cleared. See _cadc_misc_status_flags. Only the enumeration kCADC_ConverterAEndOfScanFlag and kCADC_ConverterBEndOfScanFlag are useful.

static uint32_t CADC_GetSampleSlotReadyStatusFlags ( ADC_Type * base )

inlinestatic

Parameters

base	CADC peripheral base address.

static uint32_t CADC_GetSampleSlotLowLimitStatusFlags ( ADC_Type * base )

inlinestatic

Parameters

base	CADC peripheral base address.

Returns: The value of all sample slots' low limit status. Each bit represents one sample slot.

static void CADC_ClearSampleSlotLowLimitStatusFlags	(	ADC_Type *	base,
		uint32_t	u32SampleMask
	)

inlinestatic

Parameters

base	CADC peripheral base address.
u32SampleMask	Mask value of sample slots. This parameter should be the OR'ed value of cadc_sample_slot_mask_t.

static uint32_t CADC_GetSampleSlotHighLimitStatusFlags ( ADC_Type * base )

inlinestatic

Parameters

base	CADC peripheral base address.

Returns: The value of all sample slots' high limit status. Each bit represents each sample slot.

static void CADC_ClearSampleSlotHighLimitStatusFlags	(	ADC_Type *	base,
		uint32_t	u32SampleMask
	)

inlinestatic

Parameters

base	CADC peripheral base address.
u32SampleMask	Mask value of sample slots. This parameter should be the OR'ed value of cadc_sample_slot_mask_t.

static uint32_t CADC_GetSampleSlotZeroCrossingStatusFlags ( ADC_Type * base )

inlinestatic

Parameters

base	CADC peripheral base address.

Returns: The value of all sample slots' zero crossing status. Each bit represents each sample slot.

static void CADC_ClearSampleSlotZeroCrossingStatusFlags	(	ADC_Type *	base,
		uint32_t	u32SampleMask
	)

inlinestatic

Parameters

base	CADC peripheral base address.
u32SampleMask	Mask value of sample slots. This parameter should be the OR'ed value of cadc_sample_slot_mask_t.

static uint16_t CADC_GetPowerStatusFlags ( ADC_Type * base )

inlinestatic

Parameters

base	CADC peripheral base address.

Returns: The mask value of the converters' power status flag, see _cadc_converter_power_status_flags.

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Initialization and deinitialization Interfaces

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Sample Slot Control Interfaces

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DMA Control Interfaces

Interrupt Control Interfaces

ADC Status Flag Interfaces

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